diff options
Diffstat (limited to 'fw/midi-dials/build')
105 files changed, 83176 insertions, 0 deletions
diff --git a/fw/midi-dials/build/curebuffer.d b/fw/midi-dials/build/curebuffer.d new file mode 100644 index 0000000..6d4eda6 --- /dev/null +++ b/fw/midi-dials/build/curebuffer.d @@ -0,0 +1,4 @@ +build/curebuffer.o: Src/curelib_src/curebuffer.c \ + Inc/curelib_inc/curebuffer.h + +Inc/curelib_inc/curebuffer.h: diff --git a/fw/midi-dials/build/curebuffer.lst b/fw/midi-dials/build/curebuffer.lst new file mode 100644 index 0000000..a18b01c --- /dev/null +++ b/fw/midi-dials/build/curebuffer.lst @@ -0,0 +1,1319 @@ +ARM GAS /tmp/ccYZCOLV.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "curebuffer.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.cureRingBufferU8Free,"ax",%progbits + 16 .align 1 + 17 .global cureRingBufferU8Free + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 cureRingBufferU8Free: + 24 .LFB1: + 25 .file 1 "Src/curelib_src/curebuffer.c" + 1:Src/curelib_src/curebuffer.c **** /* + 2:Src/curelib_src/curebuffer.c **** ******************************************************************************* + 3:Src/curelib_src/curebuffer.c **** * [curebuffer.c] + 4:Src/curelib_src/curebuffer.c **** * This module is for FIFO buffer. + 5:Src/curelib_src/curebuffer.c **** * + 6:Src/curelib_src/curebuffer.c **** * This program is under the terms of the GPLv3. + 7:Src/curelib_src/curebuffer.c **** * https://www.gnu.org/licenses/gpl-3.0.html + 8:Src/curelib_src/curebuffer.c **** * + 9:Src/curelib_src/curebuffer.c **** * Copyright(c) 2017 Keshikan (www.keshikan.net) + 10:Src/curelib_src/curebuffer.c **** ******************************************************************************* + 11:Src/curelib_src/curebuffer.c **** */ + 12:Src/curelib_src/curebuffer.c **** + 13:Src/curelib_src/curebuffer.c **** #include "curebuffer.h" + 14:Src/curelib_src/curebuffer.c **** #include <stdint.h> + 15:Src/curelib_src/curebuffer.c **** #include <stdlib.h> + 16:Src/curelib_src/curebuffer.c **** + 17:Src/curelib_src/curebuffer.c **** + 18:Src/curelib_src/curebuffer.c **** ///////////////////////////// + 19:Src/curelib_src/curebuffer.c **** //methods for uint8_t FIFO. + 20:Src/curelib_src/curebuffer.c **** ///////////////////////////// + 21:Src/curelib_src/curebuffer.c **** + 22:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU8Init(RingBufferU8 *rbuf, uint16_t buflen) + 23:Src/curelib_src/curebuffer.c **** { + 24:Src/curelib_src/curebuffer.c **** + 25:Src/curelib_src/curebuffer.c **** uint32_t i; + 26:Src/curelib_src/curebuffer.c **** + 27:Src/curelib_src/curebuffer.c **** cureRingBufferU8Free(rbuf); + 28:Src/curelib_src/curebuffer.c **** + 29:Src/curelib_src/curebuffer.c **** rbuf->buffer = (uint8_t *)malloc( buflen * sizeof(uint8_t) ); + 30:Src/curelib_src/curebuffer.c **** if(NULL == rbuf->buffer){ + 31:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 32:Src/curelib_src/curebuffer.c **** } + 33:Src/curelib_src/curebuffer.c **** for(i=0; i<buflen; i++){ + ARM GAS /tmp/ccYZCOLV.s page 2 + + + 34:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 35:Src/curelib_src/curebuffer.c **** } + 36:Src/curelib_src/curebuffer.c **** + 37:Src/curelib_src/curebuffer.c **** rbuf->length = buflen; + 38:Src/curelib_src/curebuffer.c **** + 39:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 40:Src/curelib_src/curebuffer.c **** } + 41:Src/curelib_src/curebuffer.c **** + 42:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU8Free(RingBufferU8 *rbuf) + 43:Src/curelib_src/curebuffer.c **** { + 26 .loc 1 43 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 10B5 push {r4, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 8 + 34 .cfi_offset 4, -8 + 35 .cfi_offset 14, -4 + 36 0002 0400 movs r4, r0 + 44:Src/curelib_src/curebuffer.c **** if(NULL != rbuf->buffer){ + 37 .loc 1 44 0 + 38 0004 8068 ldr r0, [r0, #8] + 39 .LVL1: + 40 0006 0028 cmp r0, #0 + 41 0008 01D0 beq .L2 + 45:Src/curelib_src/curebuffer.c **** free(rbuf->buffer); + 42 .loc 1 45 0 + 43 000a FFF7FEFF bl free + 44 .LVL2: + 45 .L2: + 46:Src/curelib_src/curebuffer.c **** } + 47:Src/curelib_src/curebuffer.c **** + 48:Src/curelib_src/curebuffer.c **** rbuf->idx_front = rbuf->idx_rear = 0; + 46 .loc 1 48 0 + 47 000e 0023 movs r3, #0 + 48 0010 6380 strh r3, [r4, #2] + 49 0012 2380 strh r3, [r4] + 49:Src/curelib_src/curebuffer.c **** rbuf->length = 0; + 50 .loc 1 49 0 + 51 0014 A380 strh r3, [r4, #4] + 50:Src/curelib_src/curebuffer.c **** + 51:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 52:Src/curelib_src/curebuffer.c **** } + 52 .loc 1 52 0 + 53 0016 0120 movs r0, #1 + 54 @ sp needed + 55 .LVL3: + 56 0018 10BD pop {r4, pc} + 57 .cfi_endproc + 58 .LFE1: + 60 .section .text.cureRingBufferU8Init,"ax",%progbits + 61 .align 1 + 62 .global cureRingBufferU8Init + 63 .syntax unified + 64 .code 16 + ARM GAS /tmp/ccYZCOLV.s page 3 + + + 65 .thumb_func + 66 .fpu softvfp + 68 cureRingBufferU8Init: + 69 .LFB0: + 23:Src/curelib_src/curebuffer.c **** + 70 .loc 1 23 0 + 71 .cfi_startproc + 72 @ args = 0, pretend = 0, frame = 0 + 73 @ frame_needed = 0, uses_anonymous_args = 0 + 74 .LVL4: + 75 0000 70B5 push {r4, r5, r6, lr} + 76 .LCFI1: + 77 .cfi_def_cfa_offset 16 + 78 .cfi_offset 4, -16 + 79 .cfi_offset 5, -12 + 80 .cfi_offset 6, -8 + 81 .cfi_offset 14, -4 + 82 0002 0500 movs r5, r0 + 83 0004 0C00 movs r4, r1 + 27:Src/curelib_src/curebuffer.c **** + 84 .loc 1 27 0 + 85 0006 FFF7FEFF bl cureRingBufferU8Free + 86 .LVL5: + 29:Src/curelib_src/curebuffer.c **** if(NULL == rbuf->buffer){ + 87 .loc 1 29 0 + 88 000a 2600 movs r6, r4 + 89 000c 2000 movs r0, r4 + 90 000e FFF7FEFF bl malloc + 91 .LVL6: + 92 0012 A860 str r0, [r5, #8] + 30:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 93 .loc 1 30 0 + 94 0014 0028 cmp r0, #0 + 95 0016 0BD0 beq .L7 + 33:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 96 .loc 1 33 0 + 97 0018 0023 movs r3, #0 + 98 001a 04E0 b .L5 + 99 .LVL7: + 100 .L6: + 34:Src/curelib_src/curebuffer.c **** } + 101 .loc 1 34 0 discriminator 3 + 102 001c AA68 ldr r2, [r5, #8] + 103 001e D218 adds r2, r2, r3 + 104 0020 0021 movs r1, #0 + 105 0022 1170 strb r1, [r2] + 33:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 106 .loc 1 33 0 discriminator 3 + 107 0024 0133 adds r3, r3, #1 + 108 .LVL8: + 109 .L5: + 33:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 110 .loc 1 33 0 is_stmt 0 discriminator 1 + 111 0026 9E42 cmp r6, r3 + 112 0028 F8D8 bhi .L6 + 37:Src/curelib_src/curebuffer.c **** + 113 .loc 1 37 0 is_stmt 1 + ARM GAS /tmp/ccYZCOLV.s page 4 + + + 114 002a AC80 strh r4, [r5, #4] + 39:Src/curelib_src/curebuffer.c **** } + 115 .loc 1 39 0 + 116 002c 0120 movs r0, #1 + 117 .LVL9: + 118 .L4: + 40:Src/curelib_src/curebuffer.c **** + 119 .loc 1 40 0 + 120 @ sp needed + 121 .LVL10: + 122 002e 70BD pop {r4, r5, r6, pc} + 123 .LVL11: + 124 .L7: + 31:Src/curelib_src/curebuffer.c **** } + 125 .loc 1 31 0 + 126 0030 0020 movs r0, #0 + 127 0032 FCE7 b .L4 + 128 .cfi_endproc + 129 .LFE0: + 131 .section .text.cureRingBufferU8Enqueue,"ax",%progbits + 132 .align 1 + 133 .global cureRingBufferU8Enqueue + 134 .syntax unified + 135 .code 16 + 136 .thumb_func + 137 .fpu softvfp + 139 cureRingBufferU8Enqueue: + 140 .LFB2: + 53:Src/curelib_src/curebuffer.c **** + 54:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU8Enqueue(RingBufferU8 *rbuf, uint8_t *inputc) + 55:Src/curelib_src/curebuffer.c **** { + 141 .loc 1 55 0 + 142 .cfi_startproc + 143 @ args = 0, pretend = 0, frame = 0 + 144 @ frame_needed = 0, uses_anonymous_args = 0 + 145 .LVL12: + 146 0000 10B5 push {r4, lr} + 147 .LCFI2: + 148 .cfi_def_cfa_offset 8 + 149 .cfi_offset 4, -8 + 150 .cfi_offset 14, -4 + 56:Src/curelib_src/curebuffer.c **** if( ((rbuf->idx_front +1)&(rbuf->length -1)) == rbuf->idx_rear ){//buffer overrun error occurs. + 151 .loc 1 56 0 + 152 0002 0288 ldrh r2, [r0] + 153 0004 541C adds r4, r2, #1 + 154 0006 8388 ldrh r3, [r0, #4] + 155 0008 013B subs r3, r3, #1 + 156 000a 2340 ands r3, r4 + 157 000c 4488 ldrh r4, [r0, #2] + 158 000e A342 cmp r3, r4 + 159 0010 0CD0 beq .L10 + 57:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 58:Src/curelib_src/curebuffer.c **** }else{ + 59:Src/curelib_src/curebuffer.c **** + 60:Src/curelib_src/curebuffer.c **** rbuf->buffer[rbuf->idx_front]= *inputc; + 160 .loc 1 60 0 + 161 0012 0B78 ldrb r3, [r1] + ARM GAS /tmp/ccYZCOLV.s page 5 + + + 162 0014 8168 ldr r1, [r0, #8] + 163 .LVL13: + 164 0016 8B54 strb r3, [r1, r2] + 61:Src/curelib_src/curebuffer.c **** rbuf->idx_front++; + 165 .loc 1 61 0 + 166 0018 0388 ldrh r3, [r0] + 167 001a 0133 adds r3, r3, #1 + 168 001c 9BB2 uxth r3, r3 + 62:Src/curelib_src/curebuffer.c **** rbuf->idx_front &= (rbuf->length -1); + 169 .loc 1 62 0 + 170 001e 8288 ldrh r2, [r0, #4] + 171 0020 013A subs r2, r2, #1 + 172 0022 12B2 sxth r2, r2 + 173 0024 1340 ands r3, r2 + 174 0026 0380 strh r3, [r0] + 63:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 175 .loc 1 63 0 + 176 0028 0120 movs r0, #1 + 177 .LVL14: + 178 .L9: + 64:Src/curelib_src/curebuffer.c **** } + 65:Src/curelib_src/curebuffer.c **** } + 179 .loc 1 65 0 + 180 @ sp needed + 181 002a 10BD pop {r4, pc} + 182 .LVL15: + 183 .L10: + 57:Src/curelib_src/curebuffer.c **** }else{ + 184 .loc 1 57 0 + 185 002c 0020 movs r0, #0 + 186 .LVL16: + 187 002e FCE7 b .L9 + 188 .cfi_endproc + 189 .LFE2: + 191 .section .text.cureRingBufferU8Dequeue,"ax",%progbits + 192 .align 1 + 193 .global cureRingBufferU8Dequeue + 194 .syntax unified + 195 .code 16 + 196 .thumb_func + 197 .fpu softvfp + 199 cureRingBufferU8Dequeue: + 200 .LFB3: + 66:Src/curelib_src/curebuffer.c **** + 67:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU8Dequeue(RingBufferU8 *rbuf, uint8_t *ret) + 68:Src/curelib_src/curebuffer.c **** { + 201 .loc 1 68 0 + 202 .cfi_startproc + 203 @ args = 0, pretend = 0, frame = 0 + 204 @ frame_needed = 0, uses_anonymous_args = 0 + 205 @ link register save eliminated. + 206 .LVL17: + 69:Src/curelib_src/curebuffer.c **** if(rbuf->idx_front == rbuf->idx_rear){//if buffer underrun error occurs. + 207 .loc 1 69 0 + 208 0000 0288 ldrh r2, [r0] + 209 0002 4388 ldrh r3, [r0, #2] + 210 0004 9A42 cmp r2, r3 + ARM GAS /tmp/ccYZCOLV.s page 6 + + + 211 0006 0CD0 beq .L13 + 70:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 71:Src/curelib_src/curebuffer.c **** }else{ + 72:Src/curelib_src/curebuffer.c **** + 73:Src/curelib_src/curebuffer.c **** *ret = (rbuf->buffer[rbuf->idx_rear]); + 212 .loc 1 73 0 + 213 0008 8268 ldr r2, [r0, #8] + 214 000a D35C ldrb r3, [r2, r3] + 215 000c 0B70 strb r3, [r1] + 74:Src/curelib_src/curebuffer.c **** rbuf->idx_rear++; + 216 .loc 1 74 0 + 217 000e 4388 ldrh r3, [r0, #2] + 218 0010 0133 adds r3, r3, #1 + 219 0012 9BB2 uxth r3, r3 + 75:Src/curelib_src/curebuffer.c **** rbuf->idx_rear &= (rbuf->length -1); + 220 .loc 1 75 0 + 221 0014 8288 ldrh r2, [r0, #4] + 222 0016 013A subs r2, r2, #1 + 223 0018 12B2 sxth r2, r2 + 224 001a 1340 ands r3, r2 + 225 001c 4380 strh r3, [r0, #2] + 76:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 226 .loc 1 76 0 + 227 001e 0120 movs r0, #1 + 228 .LVL18: + 229 .L12: + 77:Src/curelib_src/curebuffer.c **** } + 78:Src/curelib_src/curebuffer.c **** } + 230 .loc 1 78 0 + 231 @ sp needed + 232 0020 7047 bx lr + 233 .LVL19: + 234 .L13: + 70:Src/curelib_src/curebuffer.c **** }else{ + 235 .loc 1 70 0 + 236 0022 0020 movs r0, #0 + 237 .LVL20: + 238 0024 FCE7 b .L12 + 239 .cfi_endproc + 240 .LFE3: + 242 .section .text._cureRingBufferU8GetUsedSize,"ax",%progbits + 243 .align 1 + 244 .global _cureRingBufferU8GetUsedSize + 245 .syntax unified + 246 .code 16 + 247 .thumb_func + 248 .fpu softvfp + 250 _cureRingBufferU8GetUsedSize: + 251 .LFB4: + 79:Src/curelib_src/curebuffer.c **** + 80:Src/curelib_src/curebuffer.c **** //debug + 81:Src/curelib_src/curebuffer.c **** uint16_t _cureRingBufferU8GetUsedSize(RingBufferU8 *rbuf) + 82:Src/curelib_src/curebuffer.c **** { + 252 .loc 1 82 0 + 253 .cfi_startproc + 254 @ args = 0, pretend = 0, frame = 0 + 255 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccYZCOLV.s page 7 + + + 256 @ link register save eliminated. + 257 .LVL21: + 83:Src/curelib_src/curebuffer.c **** if(rbuf->idx_front >= rbuf->idx_rear){ + 258 .loc 1 83 0 + 259 0000 0388 ldrh r3, [r0] + 260 0002 4288 ldrh r2, [r0, #2] + 261 0004 9342 cmp r3, r2 + 262 0006 05D2 bcs .L17 + 84:Src/curelib_src/curebuffer.c **** return rbuf->idx_front - rbuf->idx_rear; + 85:Src/curelib_src/curebuffer.c **** }else{ + 86:Src/curelib_src/curebuffer.c **** return rbuf->idx_front + rbuf->length - rbuf->idx_rear; + 263 .loc 1 86 0 + 264 0008 8088 ldrh r0, [r0, #4] + 265 .LVL22: + 266 000a 1818 adds r0, r3, r0 + 267 000c 80B2 uxth r0, r0 + 268 000e 801A subs r0, r0, r2 + 269 0010 80B2 uxth r0, r0 + 270 .L16: + 87:Src/curelib_src/curebuffer.c **** } + 88:Src/curelib_src/curebuffer.c **** + 89:Src/curelib_src/curebuffer.c **** } + 271 .loc 1 89 0 + 272 @ sp needed + 273 0012 7047 bx lr + 274 .LVL23: + 275 .L17: + 84:Src/curelib_src/curebuffer.c **** return rbuf->idx_front - rbuf->idx_rear; + 276 .loc 1 84 0 + 277 0014 981A subs r0, r3, r2 + 278 .LVL24: + 279 0016 80B2 uxth r0, r0 + 280 0018 FBE7 b .L16 + 281 .cfi_endproc + 282 .LFE4: + 284 .section .text.cureRingBuffer16Free,"ax",%progbits + 285 .align 1 + 286 .global cureRingBuffer16Free + 287 .syntax unified + 288 .code 16 + 289 .thumb_func + 290 .fpu softvfp + 292 cureRingBuffer16Free: + 293 .LFB6: + 90:Src/curelib_src/curebuffer.c **** + 91:Src/curelib_src/curebuffer.c **** ///////////////////////////// + 92:Src/curelib_src/curebuffer.c **** //methods for int16_t FIFO. + 93:Src/curelib_src/curebuffer.c **** ///////////////////////////// + 94:Src/curelib_src/curebuffer.c **** + 95:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBuffer16Init(RingBuffer16 *rbuf, uint16_t buflen) + 96:Src/curelib_src/curebuffer.c **** { + 97:Src/curelib_src/curebuffer.c **** + 98:Src/curelib_src/curebuffer.c **** uint32_t i; + 99:Src/curelib_src/curebuffer.c **** + 100:Src/curelib_src/curebuffer.c **** cureRingBuffer16Free(rbuf); + 101:Src/curelib_src/curebuffer.c **** + 102:Src/curelib_src/curebuffer.c **** rbuf->buffer = (int16_t *)malloc( buflen * sizeof(int16_t) ); + ARM GAS /tmp/ccYZCOLV.s page 8 + + + 103:Src/curelib_src/curebuffer.c **** if(NULL == rbuf->buffer){ + 104:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 105:Src/curelib_src/curebuffer.c **** } + 106:Src/curelib_src/curebuffer.c **** for(i=0; i<buflen; i++){ + 107:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 108:Src/curelib_src/curebuffer.c **** } + 109:Src/curelib_src/curebuffer.c **** rbuf->length = buflen; + 110:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 111:Src/curelib_src/curebuffer.c **** } + 112:Src/curelib_src/curebuffer.c **** + 113:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBuffer16Free(RingBuffer16 *rbuf) + 114:Src/curelib_src/curebuffer.c **** { + 294 .loc 1 114 0 + 295 .cfi_startproc + 296 @ args = 0, pretend = 0, frame = 0 + 297 @ frame_needed = 0, uses_anonymous_args = 0 + 298 .LVL25: + 299 0000 10B5 push {r4, lr} + 300 .LCFI3: + 301 .cfi_def_cfa_offset 8 + 302 .cfi_offset 4, -8 + 303 .cfi_offset 14, -4 + 304 0002 0400 movs r4, r0 + 115:Src/curelib_src/curebuffer.c **** if(NULL != rbuf->buffer){ + 305 .loc 1 115 0 + 306 0004 8068 ldr r0, [r0, #8] + 307 .LVL26: + 308 0006 0028 cmp r0, #0 + 309 0008 01D0 beq .L19 + 116:Src/curelib_src/curebuffer.c **** free(rbuf->buffer); + 310 .loc 1 116 0 + 311 000a FFF7FEFF bl free + 312 .LVL27: + 313 .L19: + 117:Src/curelib_src/curebuffer.c **** } + 118:Src/curelib_src/curebuffer.c **** + 119:Src/curelib_src/curebuffer.c **** rbuf->idx_front = rbuf->idx_rear = 0; + 314 .loc 1 119 0 + 315 000e 0023 movs r3, #0 + 316 0010 6380 strh r3, [r4, #2] + 317 0012 2380 strh r3, [r4] + 120:Src/curelib_src/curebuffer.c **** rbuf->length = 0; + 318 .loc 1 120 0 + 319 0014 A380 strh r3, [r4, #4] + 121:Src/curelib_src/curebuffer.c **** + 122:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 123:Src/curelib_src/curebuffer.c **** } + 320 .loc 1 123 0 + 321 0016 0120 movs r0, #1 + 322 @ sp needed + 323 .LVL28: + 324 0018 10BD pop {r4, pc} + 325 .cfi_endproc + 326 .LFE6: + 328 .section .text.cureRingBuffer16Init,"ax",%progbits + 329 .align 1 + 330 .global cureRingBuffer16Init + ARM GAS /tmp/ccYZCOLV.s page 9 + + + 331 .syntax unified + 332 .code 16 + 333 .thumb_func + 334 .fpu softvfp + 336 cureRingBuffer16Init: + 337 .LFB5: + 96:Src/curelib_src/curebuffer.c **** + 338 .loc 1 96 0 + 339 .cfi_startproc + 340 @ args = 0, pretend = 0, frame = 0 + 341 @ frame_needed = 0, uses_anonymous_args = 0 + 342 .LVL29: + 343 0000 70B5 push {r4, r5, r6, lr} + 344 .LCFI4: + 345 .cfi_def_cfa_offset 16 + 346 .cfi_offset 4, -16 + 347 .cfi_offset 5, -12 + 348 .cfi_offset 6, -8 + 349 .cfi_offset 14, -4 + 350 0002 0400 movs r4, r0 + 351 0004 0E00 movs r6, r1 + 100:Src/curelib_src/curebuffer.c **** + 352 .loc 1 100 0 + 353 0006 FFF7FEFF bl cureRingBuffer16Free + 354 .LVL30: + 102:Src/curelib_src/curebuffer.c **** if(NULL == rbuf->buffer){ + 355 .loc 1 102 0 + 356 000a 3500 movs r5, r6 + 357 000c 7000 lsls r0, r6, #1 + 358 000e FFF7FEFF bl malloc + 359 .LVL31: + 360 0012 A060 str r0, [r4, #8] + 103:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 361 .loc 1 103 0 + 362 0014 0028 cmp r0, #0 + 363 0016 0DD0 beq .L24 + 106:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 364 .loc 1 106 0 + 365 0018 0023 movs r3, #0 + 366 001a 06E0 b .L22 + 367 .LVL32: + 368 .L23: + 107:Src/curelib_src/curebuffer.c **** } + 369 .loc 1 107 0 discriminator 3 + 370 001c 5A00 lsls r2, r3, #1 + 371 001e A168 ldr r1, [r4, #8] + 372 0020 8C46 mov ip, r1 + 373 0022 6244 add r2, r2, ip + 374 0024 0021 movs r1, #0 + 375 0026 1180 strh r1, [r2] + 106:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 376 .loc 1 106 0 discriminator 3 + 377 0028 0133 adds r3, r3, #1 + 378 .LVL33: + 379 .L22: + 106:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 380 .loc 1 106 0 is_stmt 0 discriminator 1 + ARM GAS /tmp/ccYZCOLV.s page 10 + + + 381 002a 9D42 cmp r5, r3 + 382 002c F6D8 bhi .L23 + 109:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 383 .loc 1 109 0 is_stmt 1 + 384 002e A680 strh r6, [r4, #4] + 110:Src/curelib_src/curebuffer.c **** } + 385 .loc 1 110 0 + 386 0030 0120 movs r0, #1 + 387 .LVL34: + 388 .L21: + 111:Src/curelib_src/curebuffer.c **** + 389 .loc 1 111 0 + 390 @ sp needed + 391 .LVL35: + 392 0032 70BD pop {r4, r5, r6, pc} + 393 .LVL36: + 394 .L24: + 104:Src/curelib_src/curebuffer.c **** } + 395 .loc 1 104 0 + 396 0034 0020 movs r0, #0 + 397 0036 FCE7 b .L21 + 398 .cfi_endproc + 399 .LFE5: + 401 .section .text.cureRingBuffer16Enqueue,"ax",%progbits + 402 .align 1 + 403 .global cureRingBuffer16Enqueue + 404 .syntax unified + 405 .code 16 + 406 .thumb_func + 407 .fpu softvfp + 409 cureRingBuffer16Enqueue: + 410 .LFB7: + 124:Src/curelib_src/curebuffer.c **** + 125:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBuffer16Enqueue(RingBuffer16 *rbuf, int16_t *inputc) + 126:Src/curelib_src/curebuffer.c **** { + 411 .loc 1 126 0 + 412 .cfi_startproc + 413 @ args = 0, pretend = 0, frame = 0 + 414 @ frame_needed = 0, uses_anonymous_args = 0 + 415 .LVL37: + 416 0000 10B5 push {r4, lr} + 417 .LCFI5: + 418 .cfi_def_cfa_offset 8 + 419 .cfi_offset 4, -8 + 420 .cfi_offset 14, -4 + 127:Src/curelib_src/curebuffer.c **** if( ((rbuf->idx_front +1)&(rbuf->length -1)) == rbuf->idx_rear ){//buffer overrun error occurs. + 421 .loc 1 127 0 + 422 0002 0288 ldrh r2, [r0] + 423 0004 541C adds r4, r2, #1 + 424 0006 8388 ldrh r3, [r0, #4] + 425 0008 013B subs r3, r3, #1 + 426 000a 2340 ands r3, r4 + 427 000c 4488 ldrh r4, [r0, #2] + 428 000e A342 cmp r3, r4 + 429 0010 0ED0 beq .L27 + 128:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 129:Src/curelib_src/curebuffer.c **** }else{ + ARM GAS /tmp/ccYZCOLV.s page 11 + + + 130:Src/curelib_src/curebuffer.c **** rbuf->buffer[rbuf->idx_front]= *inputc; + 430 .loc 1 130 0 + 431 0012 5200 lsls r2, r2, #1 + 432 0014 0023 movs r3, #0 + 433 0016 CB5E ldrsh r3, [r1, r3] + 434 .LVL38: + 435 0018 8168 ldr r1, [r0, #8] + 436 001a 8B52 strh r3, [r1, r2] + 131:Src/curelib_src/curebuffer.c **** rbuf->idx_front++; + 437 .loc 1 131 0 + 438 001c 0388 ldrh r3, [r0] + 439 001e 0133 adds r3, r3, #1 + 440 0020 9BB2 uxth r3, r3 + 132:Src/curelib_src/curebuffer.c **** rbuf->idx_front &= (rbuf->length -1); + 441 .loc 1 132 0 + 442 0022 8288 ldrh r2, [r0, #4] + 443 0024 013A subs r2, r2, #1 + 444 0026 12B2 sxth r2, r2 + 445 0028 1340 ands r3, r2 + 446 002a 0380 strh r3, [r0] + 133:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 447 .loc 1 133 0 + 448 002c 0120 movs r0, #1 + 449 .LVL39: + 450 .L26: + 134:Src/curelib_src/curebuffer.c **** } + 135:Src/curelib_src/curebuffer.c **** } + 451 .loc 1 135 0 + 452 @ sp needed + 453 002e 10BD pop {r4, pc} + 454 .LVL40: + 455 .L27: + 128:Src/curelib_src/curebuffer.c **** }else{ + 456 .loc 1 128 0 + 457 0030 0020 movs r0, #0 + 458 .LVL41: + 459 0032 FCE7 b .L26 + 460 .cfi_endproc + 461 .LFE7: + 463 .section .text.cureRingBuffer16EnqueueIgnoreErr,"ax",%progbits + 464 .align 1 + 465 .global cureRingBuffer16EnqueueIgnoreErr + 466 .syntax unified + 467 .code 16 + 468 .thumb_func + 469 .fpu softvfp + 471 cureRingBuffer16EnqueueIgnoreErr: + 472 .LFB8: + 136:Src/curelib_src/curebuffer.c **** + 137:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBuffer16EnqueueIgnoreErr(RingBuffer16 *rbuf, int16_t *inputc) + 138:Src/curelib_src/curebuffer.c **** { + 473 .loc 1 138 0 + 474 .cfi_startproc + 475 @ args = 0, pretend = 0, frame = 0 + 476 @ frame_needed = 0, uses_anonymous_args = 0 + 477 @ link register save eliminated. + 478 .LVL42: + ARM GAS /tmp/ccYZCOLV.s page 12 + + + 139:Src/curelib_src/curebuffer.c **** + 140:Src/curelib_src/curebuffer.c **** rbuf->buffer[rbuf->idx_front]= *inputc; + 479 .loc 1 140 0 + 480 0000 0388 ldrh r3, [r0] + 481 0002 5B00 lsls r3, r3, #1 + 482 0004 0022 movs r2, #0 + 483 0006 8A5E ldrsh r2, [r1, r2] + 484 .LVL43: + 485 0008 8168 ldr r1, [r0, #8] + 486 000a CA52 strh r2, [r1, r3] + 141:Src/curelib_src/curebuffer.c **** rbuf->idx_front++; + 487 .loc 1 141 0 + 488 000c 0388 ldrh r3, [r0] + 489 000e 0133 adds r3, r3, #1 + 490 0010 9BB2 uxth r3, r3 + 142:Src/curelib_src/curebuffer.c **** rbuf->idx_front &= (rbuf->length -1); + 491 .loc 1 142 0 + 492 0012 8288 ldrh r2, [r0, #4] + 493 0014 013A subs r2, r2, #1 + 494 0016 12B2 sxth r2, r2 + 495 0018 1340 ands r3, r2 + 496 001a 0380 strh r3, [r0] + 143:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 144:Src/curelib_src/curebuffer.c **** + 145:Src/curelib_src/curebuffer.c **** } + 497 .loc 1 145 0 + 498 001c 0120 movs r0, #1 + 499 .LVL44: + 500 @ sp needed + 501 001e 7047 bx lr + 502 .cfi_endproc + 503 .LFE8: + 505 .section .text.cureRingBuffer16Dequeue,"ax",%progbits + 506 .align 1 + 507 .global cureRingBuffer16Dequeue + 508 .syntax unified + 509 .code 16 + 510 .thumb_func + 511 .fpu softvfp + 513 cureRingBuffer16Dequeue: + 514 .LFB9: + 146:Src/curelib_src/curebuffer.c **** + 147:Src/curelib_src/curebuffer.c **** + 148:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBuffer16Dequeue(RingBuffer16 *rbuf, int16_t *ret) + 149:Src/curelib_src/curebuffer.c **** { + 515 .loc 1 149 0 + 516 .cfi_startproc + 517 @ args = 0, pretend = 0, frame = 0 + 518 @ frame_needed = 0, uses_anonymous_args = 0 + 519 @ link register save eliminated. + 520 .LVL45: + 150:Src/curelib_src/curebuffer.c **** if(rbuf->idx_front == rbuf->idx_rear){//if buffer underrun error occurs. + 521 .loc 1 150 0 + 522 0000 0288 ldrh r2, [r0] + 523 0002 4388 ldrh r3, [r0, #2] + 524 0004 9A42 cmp r2, r3 + 525 0006 0DD0 beq .L31 + ARM GAS /tmp/ccYZCOLV.s page 13 + + + 151:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 152:Src/curelib_src/curebuffer.c **** }else{ + 153:Src/curelib_src/curebuffer.c **** *ret = (rbuf->buffer[rbuf->idx_rear]); + 526 .loc 1 153 0 + 527 0008 5B00 lsls r3, r3, #1 + 528 000a 8268 ldr r2, [r0, #8] + 529 000c 9B5E ldrsh r3, [r3, r2] + 530 000e 0B80 strh r3, [r1] + 154:Src/curelib_src/curebuffer.c **** rbuf->idx_rear++; + 531 .loc 1 154 0 + 532 0010 4388 ldrh r3, [r0, #2] + 533 0012 0133 adds r3, r3, #1 + 534 0014 9BB2 uxth r3, r3 + 155:Src/curelib_src/curebuffer.c **** rbuf->idx_rear &= (rbuf->length -1); + 535 .loc 1 155 0 + 536 0016 8288 ldrh r2, [r0, #4] + 537 0018 013A subs r2, r2, #1 + 538 001a 12B2 sxth r2, r2 + 539 001c 1340 ands r3, r2 + 540 001e 4380 strh r3, [r0, #2] + 156:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 541 .loc 1 156 0 + 542 0020 0120 movs r0, #1 + 543 .LVL46: + 544 .L30: + 157:Src/curelib_src/curebuffer.c **** } + 158:Src/curelib_src/curebuffer.c **** } + 545 .loc 1 158 0 + 546 @ sp needed + 547 0022 7047 bx lr + 548 .LVL47: + 549 .L31: + 151:Src/curelib_src/curebuffer.c **** }else{ + 550 .loc 1 151 0 + 551 0024 0020 movs r0, #0 + 552 .LVL48: + 553 0026 FCE7 b .L30 + 554 .cfi_endproc + 555 .LFE9: + 557 .section .text.cureRingBuffer16GetElement,"ax",%progbits + 558 .align 1 + 559 .global cureRingBuffer16GetElement + 560 .syntax unified + 561 .code 16 + 562 .thumb_func + 563 .fpu softvfp + 565 cureRingBuffer16GetElement: + 566 .LFB10: + 159:Src/curelib_src/curebuffer.c **** + 160:Src/curelib_src/curebuffer.c **** + 161:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBuffer16GetElement(RingBuffer16 *rbuf, int16_t *ret, uint16_t delaynum, uint1 + 162:Src/curelib_src/curebuffer.c **** { + 567 .loc 1 162 0 + 568 .cfi_startproc + 569 @ args = 0, pretend = 0, frame = 0 + 570 @ frame_needed = 0, uses_anonymous_args = 0 + 571 .LVL49: + ARM GAS /tmp/ccYZCOLV.s page 14 + + + 572 0000 10B5 push {r4, lr} + 573 .LCFI6: + 574 .cfi_def_cfa_offset 8 + 575 .cfi_offset 4, -8 + 576 .cfi_offset 14, -4 + 163:Src/curelib_src/curebuffer.c **** + 164:Src/curelib_src/curebuffer.c **** if(rbuf->idx_front >= delaynum){ + 577 .loc 1 164 0 + 578 0002 0488 ldrh r4, [r0] + 579 0004 9442 cmp r4, r2 + 580 0006 0AD2 bcs .L35 + 165:Src/curelib_src/curebuffer.c **** rbuf->idx_rear = rbuf->idx_front - delaynum; + 166:Src/curelib_src/curebuffer.c **** }else{ + 167:Src/curelib_src/curebuffer.c **** rbuf->idx_rear = delay_buffer_length - (delaynum - rbuf->idx_front); + 581 .loc 1 167 0 + 582 0008 A41A subs r4, r4, r2 + 583 000a A4B2 uxth r4, r4 + 584 000c E318 adds r3, r4, r3 + 585 .LVL50: + 586 000e 4380 strh r3, [r0, #2] + 587 .L34: + 168:Src/curelib_src/curebuffer.c **** } + 169:Src/curelib_src/curebuffer.c **** *ret = (rbuf->buffer[rbuf->idx_rear]); + 588 .loc 1 169 0 + 589 0010 8268 ldr r2, [r0, #8] + 590 .LVL51: + 591 0012 4388 ldrh r3, [r0, #2] + 592 0014 5B00 lsls r3, r3, #1 + 593 0016 9B5E ldrsh r3, [r3, r2] + 594 0018 0B80 strh r3, [r1] + 170:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 171:Src/curelib_src/curebuffer.c **** + 172:Src/curelib_src/curebuffer.c **** } + 595 .loc 1 172 0 + 596 001a 0120 movs r0, #1 + 597 .LVL52: + 598 @ sp needed + 599 001c 10BD pop {r4, pc} + 600 .LVL53: + 601 .L35: + 165:Src/curelib_src/curebuffer.c **** }else{ + 602 .loc 1 165 0 + 603 001e A41A subs r4, r4, r2 + 604 0020 4480 strh r4, [r0, #2] + 605 0022 F5E7 b .L34 + 606 .cfi_endproc + 607 .LFE10: + 609 .section .text.cureRingBufferU32Free,"ax",%progbits + 610 .align 1 + 611 .global cureRingBufferU32Free + 612 .syntax unified + 613 .code 16 + 614 .thumb_func + 615 .fpu softvfp + 617 cureRingBufferU32Free: + 618 .LFB12: + 173:Src/curelib_src/curebuffer.c **** + ARM GAS /tmp/ccYZCOLV.s page 15 + + + 174:Src/curelib_src/curebuffer.c **** ///////////////////////////// + 175:Src/curelib_src/curebuffer.c **** //methods for uint32_t FIFO. + 176:Src/curelib_src/curebuffer.c **** ///////////////////////////// + 177:Src/curelib_src/curebuffer.c **** + 178:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU32Init(RingBuffer32 *rbuf, uint16_t buflen) + 179:Src/curelib_src/curebuffer.c **** { + 180:Src/curelib_src/curebuffer.c **** + 181:Src/curelib_src/curebuffer.c **** uint32_t i; + 182:Src/curelib_src/curebuffer.c **** + 183:Src/curelib_src/curebuffer.c **** cureRingBufferU32Free(rbuf); + 184:Src/curelib_src/curebuffer.c **** + 185:Src/curelib_src/curebuffer.c **** rbuf->buffer = (uint32_t *)malloc( buflen * sizeof(uint32_t) ); + 186:Src/curelib_src/curebuffer.c **** if(NULL == rbuf->buffer){ + 187:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 188:Src/curelib_src/curebuffer.c **** } + 189:Src/curelib_src/curebuffer.c **** for(i=0; i<buflen; i++){ + 190:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 191:Src/curelib_src/curebuffer.c **** } + 192:Src/curelib_src/curebuffer.c **** rbuf->length = buflen; + 193:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 194:Src/curelib_src/curebuffer.c **** } + 195:Src/curelib_src/curebuffer.c **** + 196:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU32Free(RingBuffer32 *rbuf) + 197:Src/curelib_src/curebuffer.c **** { + 619 .loc 1 197 0 + 620 .cfi_startproc + 621 @ args = 0, pretend = 0, frame = 0 + 622 @ frame_needed = 0, uses_anonymous_args = 0 + 623 .LVL54: + 624 0000 10B5 push {r4, lr} + 625 .LCFI7: + 626 .cfi_def_cfa_offset 8 + 627 .cfi_offset 4, -8 + 628 .cfi_offset 14, -4 + 629 0002 0400 movs r4, r0 + 198:Src/curelib_src/curebuffer.c **** if(NULL != rbuf->buffer){ + 630 .loc 1 198 0 + 631 0004 8068 ldr r0, [r0, #8] + 632 .LVL55: + 633 0006 0028 cmp r0, #0 + 634 0008 01D0 beq .L37 + 199:Src/curelib_src/curebuffer.c **** free(rbuf->buffer); + 635 .loc 1 199 0 + 636 000a FFF7FEFF bl free + 637 .LVL56: + 638 .L37: + 200:Src/curelib_src/curebuffer.c **** } + 201:Src/curelib_src/curebuffer.c **** + 202:Src/curelib_src/curebuffer.c **** rbuf->idx_front = rbuf->idx_rear = 0; + 639 .loc 1 202 0 + 640 000e 0023 movs r3, #0 + 641 0010 6380 strh r3, [r4, #2] + 642 0012 2380 strh r3, [r4] + 203:Src/curelib_src/curebuffer.c **** rbuf->length = 0; + 643 .loc 1 203 0 + 644 0014 A380 strh r3, [r4, #4] + 204:Src/curelib_src/curebuffer.c **** + ARM GAS /tmp/ccYZCOLV.s page 16 + + + 205:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 206:Src/curelib_src/curebuffer.c **** } + 645 .loc 1 206 0 + 646 0016 0120 movs r0, #1 + 647 @ sp needed + 648 .LVL57: + 649 0018 10BD pop {r4, pc} + 650 .cfi_endproc + 651 .LFE12: + 653 .section .text.cureRingBufferU32Init,"ax",%progbits + 654 .align 1 + 655 .global cureRingBufferU32Init + 656 .syntax unified + 657 .code 16 + 658 .thumb_func + 659 .fpu softvfp + 661 cureRingBufferU32Init: + 662 .LFB11: + 179:Src/curelib_src/curebuffer.c **** + 663 .loc 1 179 0 + 664 .cfi_startproc + 665 @ args = 0, pretend = 0, frame = 0 + 666 @ frame_needed = 0, uses_anonymous_args = 0 + 667 .LVL58: + 668 0000 70B5 push {r4, r5, r6, lr} + 669 .LCFI8: + 670 .cfi_def_cfa_offset 16 + 671 .cfi_offset 4, -16 + 672 .cfi_offset 5, -12 + 673 .cfi_offset 6, -8 + 674 .cfi_offset 14, -4 + 675 0002 0400 movs r4, r0 + 676 0004 0E00 movs r6, r1 + 183:Src/curelib_src/curebuffer.c **** + 677 .loc 1 183 0 + 678 0006 FFF7FEFF bl cureRingBufferU32Free + 679 .LVL59: + 185:Src/curelib_src/curebuffer.c **** if(NULL == rbuf->buffer){ + 680 .loc 1 185 0 + 681 000a 3500 movs r5, r6 + 682 000c B000 lsls r0, r6, #2 + 683 000e FFF7FEFF bl malloc + 684 .LVL60: + 685 0012 A060 str r0, [r4, #8] + 186:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 686 .loc 1 186 0 + 687 0014 0028 cmp r0, #0 + 688 0016 0DD0 beq .L42 + 189:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 689 .loc 1 189 0 + 690 0018 0023 movs r3, #0 + 691 001a 06E0 b .L40 + 692 .LVL61: + 693 .L41: + 190:Src/curelib_src/curebuffer.c **** } + 694 .loc 1 190 0 discriminator 3 + 695 001c 9A00 lsls r2, r3, #2 + ARM GAS /tmp/ccYZCOLV.s page 17 + + + 696 001e A168 ldr r1, [r4, #8] + 697 0020 8C46 mov ip, r1 + 698 0022 6244 add r2, r2, ip + 699 0024 0021 movs r1, #0 + 700 0026 1160 str r1, [r2] + 189:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 701 .loc 1 189 0 discriminator 3 + 702 0028 0133 adds r3, r3, #1 + 703 .LVL62: + 704 .L40: + 189:Src/curelib_src/curebuffer.c **** rbuf->buffer[i] = 0; + 705 .loc 1 189 0 is_stmt 0 discriminator 1 + 706 002a 9D42 cmp r5, r3 + 707 002c F6D8 bhi .L41 + 192:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 708 .loc 1 192 0 is_stmt 1 + 709 002e A680 strh r6, [r4, #4] + 193:Src/curelib_src/curebuffer.c **** } + 710 .loc 1 193 0 + 711 0030 0120 movs r0, #1 + 712 .LVL63: + 713 .L39: + 194:Src/curelib_src/curebuffer.c **** + 714 .loc 1 194 0 + 715 @ sp needed + 716 .LVL64: + 717 0032 70BD pop {r4, r5, r6, pc} + 718 .LVL65: + 719 .L42: + 187:Src/curelib_src/curebuffer.c **** } + 720 .loc 1 187 0 + 721 0034 0020 movs r0, #0 + 722 0036 FCE7 b .L39 + 723 .cfi_endproc + 724 .LFE11: + 726 .section .text.cureRingBufferU32Enqueue,"ax",%progbits + 727 .align 1 + 728 .global cureRingBufferU32Enqueue + 729 .syntax unified + 730 .code 16 + 731 .thumb_func + 732 .fpu softvfp + 734 cureRingBufferU32Enqueue: + 735 .LFB13: + 207:Src/curelib_src/curebuffer.c **** + 208:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU32Enqueue(RingBuffer32 *rbuf, uint32_t *inputc) + 209:Src/curelib_src/curebuffer.c **** { + 736 .loc 1 209 0 + 737 .cfi_startproc + 738 @ args = 0, pretend = 0, frame = 0 + 739 @ frame_needed = 0, uses_anonymous_args = 0 + 740 .LVL66: + 741 0000 10B5 push {r4, lr} + 742 .LCFI9: + 743 .cfi_def_cfa_offset 8 + 744 .cfi_offset 4, -8 + 745 .cfi_offset 14, -4 + ARM GAS /tmp/ccYZCOLV.s page 18 + + + 210:Src/curelib_src/curebuffer.c **** if( ((rbuf->idx_front +1)&(rbuf->length -1)) == rbuf->idx_rear ){//buffer overrun error occurs. + 746 .loc 1 210 0 + 747 0002 0288 ldrh r2, [r0] + 748 0004 541C adds r4, r2, #1 + 749 0006 8388 ldrh r3, [r0, #4] + 750 0008 013B subs r3, r3, #1 + 751 000a 2340 ands r3, r4 + 752 000c 4488 ldrh r4, [r0, #2] + 753 000e A342 cmp r3, r4 + 754 0010 0DD0 beq .L45 + 211:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 212:Src/curelib_src/curebuffer.c **** }else{ + 213:Src/curelib_src/curebuffer.c **** rbuf->buffer[rbuf->idx_front]= *inputc; + 755 .loc 1 213 0 + 756 0012 9200 lsls r2, r2, #2 + 757 0014 0B68 ldr r3, [r1] + 758 0016 8168 ldr r1, [r0, #8] + 759 .LVL67: + 760 0018 8B50 str r3, [r1, r2] + 214:Src/curelib_src/curebuffer.c **** rbuf->idx_front++; + 761 .loc 1 214 0 + 762 001a 0388 ldrh r3, [r0] + 763 001c 0133 adds r3, r3, #1 + 764 001e 9BB2 uxth r3, r3 + 215:Src/curelib_src/curebuffer.c **** rbuf->idx_front &= (rbuf->length -1); + 765 .loc 1 215 0 + 766 0020 8288 ldrh r2, [r0, #4] + 767 0022 013A subs r2, r2, #1 + 768 0024 12B2 sxth r2, r2 + 769 0026 1340 ands r3, r2 + 770 0028 0380 strh r3, [r0] + 216:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 771 .loc 1 216 0 + 772 002a 0120 movs r0, #1 + 773 .LVL68: + 774 .L44: + 217:Src/curelib_src/curebuffer.c **** } + 218:Src/curelib_src/curebuffer.c **** } + 775 .loc 1 218 0 + 776 @ sp needed + 777 002c 10BD pop {r4, pc} + 778 .LVL69: + 779 .L45: + 211:Src/curelib_src/curebuffer.c **** }else{ + 780 .loc 1 211 0 + 781 002e 0020 movs r0, #0 + 782 .LVL70: + 783 0030 FCE7 b .L44 + 784 .cfi_endproc + 785 .LFE13: + 787 .section .text.cureRingBufferU32EnqueueIgnoreErr,"ax",%progbits + 788 .align 1 + 789 .global cureRingBufferU32EnqueueIgnoreErr + 790 .syntax unified + 791 .code 16 + 792 .thumb_func + 793 .fpu softvfp + ARM GAS /tmp/ccYZCOLV.s page 19 + + + 795 cureRingBufferU32EnqueueIgnoreErr: + 796 .LFB14: + 219:Src/curelib_src/curebuffer.c **** + 220:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU32EnqueueIgnoreErr(RingBuffer32 *rbuf, uint32_t *inputc) + 221:Src/curelib_src/curebuffer.c **** { + 797 .loc 1 221 0 + 798 .cfi_startproc + 799 @ args = 0, pretend = 0, frame = 0 + 800 @ frame_needed = 0, uses_anonymous_args = 0 + 801 @ link register save eliminated. + 802 .LVL71: + 222:Src/curelib_src/curebuffer.c **** + 223:Src/curelib_src/curebuffer.c **** rbuf->buffer[rbuf->idx_front]= *inputc; + 803 .loc 1 223 0 + 804 0000 0388 ldrh r3, [r0] + 805 0002 9B00 lsls r3, r3, #2 + 806 0004 0A68 ldr r2, [r1] + 807 0006 8168 ldr r1, [r0, #8] + 808 .LVL72: + 809 0008 CA50 str r2, [r1, r3] + 224:Src/curelib_src/curebuffer.c **** rbuf->idx_front++; + 810 .loc 1 224 0 + 811 000a 0388 ldrh r3, [r0] + 812 000c 0133 adds r3, r3, #1 + 813 000e 9BB2 uxth r3, r3 + 225:Src/curelib_src/curebuffer.c **** rbuf->idx_front &= (rbuf->length -1); + 814 .loc 1 225 0 + 815 0010 8288 ldrh r2, [r0, #4] + 816 0012 013A subs r2, r2, #1 + 817 0014 12B2 sxth r2, r2 + 818 0016 1340 ands r3, r2 + 819 0018 0380 strh r3, [r0] + 226:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 227:Src/curelib_src/curebuffer.c **** + 228:Src/curelib_src/curebuffer.c **** } + 820 .loc 1 228 0 + 821 001a 0120 movs r0, #1 + 822 .LVL73: + 823 @ sp needed + 824 001c 7047 bx lr + 825 .cfi_endproc + 826 .LFE14: + 828 .section .text.cureRingBufferU32Dequeue,"ax",%progbits + 829 .align 1 + 830 .global cureRingBufferU32Dequeue + 831 .syntax unified + 832 .code 16 + 833 .thumb_func + 834 .fpu softvfp + 836 cureRingBufferU32Dequeue: + 837 .LFB15: + 229:Src/curelib_src/curebuffer.c **** + 230:Src/curelib_src/curebuffer.c **** + 231:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU32Dequeue(RingBuffer32 *rbuf, uint32_t *ret) + 232:Src/curelib_src/curebuffer.c **** { + 838 .loc 1 232 0 + 839 .cfi_startproc + ARM GAS /tmp/ccYZCOLV.s page 20 + + + 840 @ args = 0, pretend = 0, frame = 0 + 841 @ frame_needed = 0, uses_anonymous_args = 0 + 842 @ link register save eliminated. + 843 .LVL74: + 233:Src/curelib_src/curebuffer.c **** if(rbuf->idx_front == rbuf->idx_rear){//if buffer underrun error occurs. + 844 .loc 1 233 0 + 845 0000 0288 ldrh r2, [r0] + 846 0002 4388 ldrh r3, [r0, #2] + 847 0004 9A42 cmp r2, r3 + 848 0006 0DD0 beq .L49 + 234:Src/curelib_src/curebuffer.c **** return BUFFER_FAILURE; + 235:Src/curelib_src/curebuffer.c **** }else{ + 236:Src/curelib_src/curebuffer.c **** *ret = (rbuf->buffer[rbuf->idx_rear]); + 849 .loc 1 236 0 + 850 0008 8268 ldr r2, [r0, #8] + 851 000a 9B00 lsls r3, r3, #2 + 852 000c 9B58 ldr r3, [r3, r2] + 853 000e 0B60 str r3, [r1] + 237:Src/curelib_src/curebuffer.c **** rbuf->idx_rear++; + 854 .loc 1 237 0 + 855 0010 4388 ldrh r3, [r0, #2] + 856 0012 0133 adds r3, r3, #1 + 857 0014 9BB2 uxth r3, r3 + 238:Src/curelib_src/curebuffer.c **** rbuf->idx_rear &= (rbuf->length -1); + 858 .loc 1 238 0 + 859 0016 8288 ldrh r2, [r0, #4] + 860 0018 013A subs r2, r2, #1 + 861 001a 12B2 sxth r2, r2 + 862 001c 1340 ands r3, r2 + 863 001e 4380 strh r3, [r0, #2] + 239:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 864 .loc 1 239 0 + 865 0020 0120 movs r0, #1 + 866 .LVL75: + 867 .L48: + 240:Src/curelib_src/curebuffer.c **** } + 241:Src/curelib_src/curebuffer.c **** } + 868 .loc 1 241 0 + 869 @ sp needed + 870 0022 7047 bx lr + 871 .LVL76: + 872 .L49: + 234:Src/curelib_src/curebuffer.c **** }else{ + 873 .loc 1 234 0 + 874 0024 0020 movs r0, #0 + 875 .LVL77: + 876 0026 FCE7 b .L48 + 877 .cfi_endproc + 878 .LFE15: + 880 .section .text.cureRingBufferU32GetElement,"ax",%progbits + 881 .align 1 + 882 .global cureRingBufferU32GetElement + 883 .syntax unified + 884 .code 16 + 885 .thumb_func + 886 .fpu softvfp + 888 cureRingBufferU32GetElement: + ARM GAS /tmp/ccYZCOLV.s page 21 + + + 889 .LFB16: + 242:Src/curelib_src/curebuffer.c **** + 243:Src/curelib_src/curebuffer.c **** + 244:Src/curelib_src/curebuffer.c **** BUFFER_STATUS cureRingBufferU32GetElement(RingBuffer32 *rbuf, uint32_t *ret, uint16_t delaynum, uin + 245:Src/curelib_src/curebuffer.c **** { + 890 .loc 1 245 0 + 891 .cfi_startproc + 892 @ args = 0, pretend = 0, frame = 0 + 893 @ frame_needed = 0, uses_anonymous_args = 0 + 894 .LVL78: + 895 0000 10B5 push {r4, lr} + 896 .LCFI10: + 897 .cfi_def_cfa_offset 8 + 898 .cfi_offset 4, -8 + 899 .cfi_offset 14, -4 + 246:Src/curelib_src/curebuffer.c **** uint16_t buf; + 247:Src/curelib_src/curebuffer.c **** + 248:Src/curelib_src/curebuffer.c **** + 249:Src/curelib_src/curebuffer.c **** if(rbuf->idx_front >= delaynum){ + 900 .loc 1 249 0 + 901 0002 0488 ldrh r4, [r0] + 902 0004 9442 cmp r4, r2 + 903 0006 09D2 bcs .L53 + 250:Src/curelib_src/curebuffer.c **** buf = rbuf->idx_front - delaynum; + 251:Src/curelib_src/curebuffer.c **** }else{ + 252:Src/curelib_src/curebuffer.c **** buf = delay_buffer_length - (delaynum - rbuf->idx_front); + 904 .loc 1 252 0 + 905 0008 A41A subs r4, r4, r2 + 906 000a A4B2 uxth r4, r4 + 907 000c E418 adds r4, r4, r3 + 908 000e A4B2 uxth r4, r4 + 909 .LVL79: + 910 .L52: + 253:Src/curelib_src/curebuffer.c **** } + 254:Src/curelib_src/curebuffer.c **** *ret = (rbuf->buffer[buf]); + 911 .loc 1 254 0 + 912 0010 8368 ldr r3, [r0, #8] + 913 .LVL80: + 914 0012 A400 lsls r4, r4, #2 + 915 .LVL81: + 916 0014 E358 ldr r3, [r4, r3] + 917 0016 0B60 str r3, [r1] + 255:Src/curelib_src/curebuffer.c **** return BUFFER_SUCCESS; + 256:Src/curelib_src/curebuffer.c **** + 257:Src/curelib_src/curebuffer.c **** } + 918 .loc 1 257 0 + 919 0018 0120 movs r0, #1 + 920 .LVL82: + 921 @ sp needed + 922 001a 10BD pop {r4, pc} + 923 .LVL83: + 924 .L53: + 250:Src/curelib_src/curebuffer.c **** }else{ + 925 .loc 1 250 0 + 926 001c A41A subs r4, r4, r2 + 927 001e A4B2 uxth r4, r4 + 928 .LVL84: + ARM GAS /tmp/ccYZCOLV.s page 22 + + + 929 0020 F6E7 b .L52 + 930 .cfi_endproc + 931 .LFE16: + 933 .text + 934 .Letext0: + 935 .file 2 "/usr/include/newlib/machine/_default_types.h" + 936 .file 3 "/usr/include/newlib/sys/_stdint.h" + 937 .file 4 "Inc/curelib_inc/curebuffer.h" + 938 .file 5 "/usr/include/newlib/sys/lock.h" + 939 .file 6 "/usr/include/newlib/sys/_types.h" + 940 .file 7 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 941 .file 8 "/usr/include/newlib/sys/reent.h" + 942 .file 9 "/usr/include/newlib/stdlib.h" + ARM GAS /tmp/ccYZCOLV.s page 23 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 curebuffer.c + /tmp/ccYZCOLV.s:16 .text.cureRingBufferU8Free:0000000000000000 $t + /tmp/ccYZCOLV.s:23 .text.cureRingBufferU8Free:0000000000000000 cureRingBufferU8Free + /tmp/ccYZCOLV.s:61 .text.cureRingBufferU8Init:0000000000000000 $t + /tmp/ccYZCOLV.s:68 .text.cureRingBufferU8Init:0000000000000000 cureRingBufferU8Init + /tmp/ccYZCOLV.s:132 .text.cureRingBufferU8Enqueue:0000000000000000 $t + /tmp/ccYZCOLV.s:139 .text.cureRingBufferU8Enqueue:0000000000000000 cureRingBufferU8Enqueue + /tmp/ccYZCOLV.s:192 .text.cureRingBufferU8Dequeue:0000000000000000 $t + /tmp/ccYZCOLV.s:199 .text.cureRingBufferU8Dequeue:0000000000000000 cureRingBufferU8Dequeue + /tmp/ccYZCOLV.s:243 .text._cureRingBufferU8GetUsedSize:0000000000000000 $t + /tmp/ccYZCOLV.s:250 .text._cureRingBufferU8GetUsedSize:0000000000000000 _cureRingBufferU8GetUsedSize + /tmp/ccYZCOLV.s:285 .text.cureRingBuffer16Free:0000000000000000 $t + /tmp/ccYZCOLV.s:292 .text.cureRingBuffer16Free:0000000000000000 cureRingBuffer16Free + /tmp/ccYZCOLV.s:329 .text.cureRingBuffer16Init:0000000000000000 $t + /tmp/ccYZCOLV.s:336 .text.cureRingBuffer16Init:0000000000000000 cureRingBuffer16Init + /tmp/ccYZCOLV.s:402 .text.cureRingBuffer16Enqueue:0000000000000000 $t + /tmp/ccYZCOLV.s:409 .text.cureRingBuffer16Enqueue:0000000000000000 cureRingBuffer16Enqueue + /tmp/ccYZCOLV.s:464 .text.cureRingBuffer16EnqueueIgnoreErr:0000000000000000 $t + /tmp/ccYZCOLV.s:471 .text.cureRingBuffer16EnqueueIgnoreErr:0000000000000000 cureRingBuffer16EnqueueIgnoreErr + /tmp/ccYZCOLV.s:506 .text.cureRingBuffer16Dequeue:0000000000000000 $t + /tmp/ccYZCOLV.s:513 .text.cureRingBuffer16Dequeue:0000000000000000 cureRingBuffer16Dequeue + /tmp/ccYZCOLV.s:558 .text.cureRingBuffer16GetElement:0000000000000000 $t + /tmp/ccYZCOLV.s:565 .text.cureRingBuffer16GetElement:0000000000000000 cureRingBuffer16GetElement + /tmp/ccYZCOLV.s:610 .text.cureRingBufferU32Free:0000000000000000 $t + /tmp/ccYZCOLV.s:617 .text.cureRingBufferU32Free:0000000000000000 cureRingBufferU32Free + /tmp/ccYZCOLV.s:654 .text.cureRingBufferU32Init:0000000000000000 $t + /tmp/ccYZCOLV.s:661 .text.cureRingBufferU32Init:0000000000000000 cureRingBufferU32Init + /tmp/ccYZCOLV.s:727 .text.cureRingBufferU32Enqueue:0000000000000000 $t + /tmp/ccYZCOLV.s:734 .text.cureRingBufferU32Enqueue:0000000000000000 cureRingBufferU32Enqueue + /tmp/ccYZCOLV.s:788 .text.cureRingBufferU32EnqueueIgnoreErr:0000000000000000 $t + /tmp/ccYZCOLV.s:795 .text.cureRingBufferU32EnqueueIgnoreErr:0000000000000000 cureRingBufferU32EnqueueIgnoreErr + /tmp/ccYZCOLV.s:829 .text.cureRingBufferU32Dequeue:0000000000000000 $t + /tmp/ccYZCOLV.s:836 .text.cureRingBufferU32Dequeue:0000000000000000 cureRingBufferU32Dequeue + /tmp/ccYZCOLV.s:881 .text.cureRingBufferU32GetElement:0000000000000000 $t + /tmp/ccYZCOLV.s:888 .text.cureRingBufferU32GetElement:0000000000000000 cureRingBufferU32GetElement + +UNDEFINED SYMBOLS +free +malloc diff --git a/fw/midi-dials/build/curebuffer.o b/fw/midi-dials/build/curebuffer.o Binary files differnew file mode 100644 index 0000000..5aa0d8d --- /dev/null +++ b/fw/midi-dials/build/curebuffer.o diff --git a/fw/midi-dials/build/main.d b/fw/midi-dials/build/main.d new file mode 100644 index 0000000..db09d4d --- /dev/null +++ b/fw/midi-dials/build/main.d @@ -0,0 +1,126 @@ +build/main.o: Src/main.c Inc/main.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h Inc/usb_device.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Inc/usbd_conf.h Inc/device_conf.h Inc/curelib_inc/curemisc.h \ + Inc/curelib_inc/curebuffer.h Inc/usbd_midi_if.h \ + Middlewares/USBMIDI/Inc/usbd_midi.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ + Inc/usbd_desc.h + +Inc/main.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Inc/usb_device.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Inc/usbd_conf.h: + +Inc/device_conf.h: + +Inc/curelib_inc/curemisc.h: + +Inc/curelib_inc/curebuffer.h: + +Inc/usbd_midi_if.h: + +Middlewares/USBMIDI/Inc/usbd_midi.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: + +Inc/usbd_desc.h: diff --git a/fw/midi-dials/build/main.lst b/fw/midi-dials/build/main.lst new file mode 100644 index 0000000..67ea82a --- /dev/null +++ b/fw/midi-dials/build/main.lst @@ -0,0 +1,1163 @@ +ARM GAS /tmp/cclvWDtP.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "main.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.MX_GPIO_Init,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 MX_GPIO_Init: + 23 .LFB48: + 24 .file 1 "Src/main.c" + 1:Src/main.c **** + 2:Src/main.c **** #include "main.h" + 3:Src/main.c **** #include "usb_device.h" + 4:Src/main.c **** + 5:Src/main.c **** #include "device_conf.h" + 6:Src/main.c **** #include "curemisc.h" + 7:Src/main.c **** #include "curebuffer.h" + 8:Src/main.c **** #include "usbd_midi_if.h" + 9:Src/main.c **** #include "usbd_midi.h" + 10:Src/main.c **** + 11:Src/main.c **** #define HYST 50 + 12:Src/main.c **** + 13:Src/main.c **** ADC_HandleTypeDef hadc; + 14:Src/main.c **** DMA_HandleTypeDef hdma_adc; + 15:Src/main.c **** + 16:Src/main.c **** PCD_HandleTypeDef hpcd_USB_FS; + 17:Src/main.c **** + 18:Src/main.c **** void SystemClock_Config(void); + 19:Src/main.c **** static void MX_GPIO_Init(void); + 20:Src/main.c **** static void MX_DMA_Init(void); + 21:Src/main.c **** static void MX_ADC_Init(void); + 22:Src/main.c **** static void MX_USB_PCD_Init(void); + 23:Src/main.c **** + 24:Src/main.c **** uint16_t ADC_val[8]; + 25:Src/main.c **** uint16_t ADC_val_old[8]; + 26:Src/main.c **** uint8_t dial[8]; + 27:Src/main.c **** uint8_t dial_mapping[8] = {1, 2, 3, 4, 5, 6, 7, 0}; + 28:Src/main.c **** uint16_t dial_div[8] = {32, 32, 32, 32, 32, 32, 32, 256}; + 29:Src/main.c **** + 30:Src/main.c **** uint8_t midi_packet[4] = {0x0B, 0xB0, 0x00, 0x00}; + 31:Src/main.c **** + 32:Src/main.c **** int main(void) + 33:Src/main.c **** { + 34:Src/main.c **** HAL_Init(); + ARM GAS /tmp/cclvWDtP.s page 2 + + + 35:Src/main.c **** + 36:Src/main.c **** SystemClock_Config(); + 37:Src/main.c **** + 38:Src/main.c **** MX_GPIO_Init(); + 39:Src/main.c **** MX_DMA_Init(); + 40:Src/main.c **** MX_ADC_Init(); + 41:Src/main.c **** MX_USB_MIDI_INIT(); + 42:Src/main.c **** + 43:Src/main.c **** HAL_ADC_Start_DMA(&hadc, ADC_val, 8); + 44:Src/main.c **** + 45:Src/main.c **** + 46:Src/main.c **** if(FUNC_ERROR == midiInit() ){ + 47:Src/main.c **** while(1){ + 48:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, SET); + 49:Src/main.c **** HAL_Delay(500); + 50:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, RESET); + 51:Src/main.c **** HAL_Delay(500); + 52:Src/main.c **** } + 53:Src/main.c **** } + 54:Src/main.c **** + 55:Src/main.c **** //Wait usb configuration. + 56:Src/main.c **** while(1){ + 57:Src/main.c **** + 58:Src/main.c **** if(USBD_STATE_CONFIGURED == hUsbDeviceFS.dev_state){ + 59:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, SET); + 60:Src/main.c **** break; + 61:Src/main.c **** }else{ + 62:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, RESET); + 63:Src/main.c **** } + 64:Src/main.c **** } + 65:Src/main.c **** + 66:Src/main.c **** while (1) + 67:Src/main.c **** { + 68:Src/main.c **** while(1){ + 69:Src/main.c **** if(USBD_STATE_CONFIGURED == hUsbDeviceFS.dev_state){ + 70:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, SET); + 71:Src/main.c **** break; + 72:Src/main.c **** }else{ + 73:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, SET); + 74:Src/main.c **** HAL_Delay(200); + 75:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, RESET); + 76:Src/main.c **** HAL_Delay(200); + 77:Src/main.c **** } + 78:Src/main.c **** } + 79:Src/main.c **** + 80:Src/main.c **** midiProcess(); + 81:Src/main.c **** for(uint8_t i = 0; i <= 7; i++){ + 82:Src/main.c **** if(ADC_val[dial_mapping[i]] >= (ADC_val_old[dial_mapping[i]] + HYST) || ADC_val[dial_mapping[ + 83:Src/main.c **** ADC_val_old[dial_mapping[i]] = ADC_val[dial_mapping[i]]; + 84:Src/main.c **** dial[i] = (uint8_t)((ADC_val[dial_mapping[i]]/dial_div[i]) & 0x7F); + 85:Src/main.c **** midi_packet[3] = dial[i]; + 86:Src/main.c **** midi_packet[1] = 0xB0 + i; + 87:Src/main.c **** sendMidiMessage(midi_packet, 4); + 88:Src/main.c **** USBD_MIDI_SendPacket(); + 89:Src/main.c **** HAL_Delay(2); + 90:Src/main.c **** } + 91:Src/main.c **** } + ARM GAS /tmp/cclvWDtP.s page 3 + + + 92:Src/main.c **** //USBD_MIDI_SendData(&hUsbDeviceFS, midi_packet, 4); + 93:Src/main.c **** + 94:Src/main.c **** + 95:Src/main.c **** } + 96:Src/main.c **** } + 97:Src/main.c **** + 98:Src/main.c **** void SystemClock_Config(void) + 99:Src/main.c **** { + 100:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 101:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 102:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + 103:Src/main.c **** + 104:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI14|RCC_OSCILLATORTYPE_HSI48; + 105:Src/main.c **** RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + 106:Src/main.c **** RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; + 107:Src/main.c **** RCC_OscInitStruct.HSI14CalibrationValue = 16; + 108:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 109:Src/main.c **** HAL_RCC_OscConfig(&RCC_OscInitStruct); + 110:Src/main.c **** + 111:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 112:Src/main.c **** |RCC_CLOCKTYPE_PCLK1; + 113:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI48; + 114:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 115:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 116:Src/main.c **** HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1); + 117:Src/main.c **** + 118:Src/main.c **** PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB; + 119:Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + 120:Src/main.c **** HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); + 121:Src/main.c **** + 122:Src/main.c **** } + 123:Src/main.c **** + 124:Src/main.c **** static void MX_ADC_Init(void) + 125:Src/main.c **** { + 126:Src/main.c **** + 127:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 128:Src/main.c **** + 129:Src/main.c **** hadc.Instance = ADC1; + 130:Src/main.c **** hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + 131:Src/main.c **** hadc.Init.Resolution = ADC_RESOLUTION_12B; + 132:Src/main.c **** hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 133:Src/main.c **** hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + 134:Src/main.c **** hadc.Init.EOCSelection = ADC_EOC_SEQ_CONV; + 135:Src/main.c **** hadc.Init.LowPowerAutoWait = DISABLE; + 136:Src/main.c **** hadc.Init.LowPowerAutoPowerOff = DISABLE; + 137:Src/main.c **** hadc.Init.ContinuousConvMode = ENABLE; + 138:Src/main.c **** hadc.Init.DiscontinuousConvMode = DISABLE; + 139:Src/main.c **** hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 140:Src/main.c **** hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 141:Src/main.c **** hadc.Init.DMAContinuousRequests = ENABLE; + 142:Src/main.c **** hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + 143:Src/main.c **** HAL_ADC_Init(&hadc); + 144:Src/main.c **** + 145:Src/main.c **** sConfig.Rank = ADC_RANK_CHANNEL_NUMBER; + 146:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_71CYCLES_5; + 147:Src/main.c **** sConfig.Channel = ADC_CHANNEL_1; + 148:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + ARM GAS /tmp/cclvWDtP.s page 4 + + + 149:Src/main.c **** + 150:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; + 151:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 152:Src/main.c **** + 153:Src/main.c **** sConfig.Channel = ADC_CHANNEL_3; + 154:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 155:Src/main.c **** + 156:Src/main.c **** sConfig.Channel = ADC_CHANNEL_4; + 157:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 158:Src/main.c **** + 159:Src/main.c **** sConfig.Channel = ADC_CHANNEL_5; + 160:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 161:Src/main.c **** + 162:Src/main.c **** sConfig.Channel = ADC_CHANNEL_6; + 163:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 164:Src/main.c **** + 165:Src/main.c **** sConfig.Channel = ADC_CHANNEL_7; + 166:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 167:Src/main.c **** + 168:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; + 169:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 170:Src/main.c **** } + 171:Src/main.c **** + 172:Src/main.c **** static void MX_USB_PCD_Init(void) + 173:Src/main.c **** { + 174:Src/main.c **** + 175:Src/main.c **** hpcd_USB_FS.Instance = USB; + 176:Src/main.c **** hpcd_USB_FS.Init.dev_endpoints = 8; + 177:Src/main.c **** hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; + 178:Src/main.c **** hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED; + 179:Src/main.c **** hpcd_USB_FS.Init.low_power_enable = DISABLE; + 180:Src/main.c **** hpcd_USB_FS.Init.lpm_enable = DISABLE; + 181:Src/main.c **** hpcd_USB_FS.Init.battery_charging_enable = DISABLE; + 182:Src/main.c **** HAL_PCD_Init(&hpcd_USB_FS); + 183:Src/main.c **** } + 184:Src/main.c **** + 185:Src/main.c **** + 186:Src/main.c **** static void MX_DMA_Init(void) + 187:Src/main.c **** { + 188:Src/main.c **** __HAL_RCC_DMA1_CLK_ENABLE(); + 189:Src/main.c **** + 190:Src/main.c **** HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0); + 191:Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); + 192:Src/main.c **** } + 193:Src/main.c **** + 194:Src/main.c **** + 195:Src/main.c **** static void MX_GPIO_Init(void) + 196:Src/main.c **** { + 25 .loc 1 196 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 32 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 0000 30B5 push {r4, r5, lr} + 30 .LCFI0: + 31 .cfi_def_cfa_offset 12 + 32 .cfi_offset 4, -12 + 33 .cfi_offset 5, -8 + ARM GAS /tmp/cclvWDtP.s page 5 + + + 34 .cfi_offset 14, -4 + 35 0002 89B0 sub sp, sp, #36 + 36 .LCFI1: + 37 .cfi_def_cfa_offset 48 + 197:Src/main.c **** + 198:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 38 .loc 1 198 0 + 39 0004 1422 movs r2, #20 + 40 0006 0021 movs r1, #0 + 41 0008 03A8 add r0, sp, #12 + 42 000a FFF7FEFF bl memset + 43 .LVL0: + 44 .LBB2: + 199:Src/main.c **** + 200:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 45 .loc 1 200 0 + 46 000e 134B ldr r3, .L2 + 47 0010 5969 ldr r1, [r3, #20] + 48 0012 8020 movs r0, #128 + 49 0014 C002 lsls r0, r0, #11 + 50 0016 0143 orrs r1, r0 + 51 0018 5961 str r1, [r3, #20] + 52 001a 5A69 ldr r2, [r3, #20] + 53 001c 0240 ands r2, r0 + 54 001e 0192 str r2, [sp, #4] + 55 0020 019A ldr r2, [sp, #4] + 56 .LBE2: + 57 .LBB3: + 201:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 58 .loc 1 201 0 + 59 0022 5A69 ldr r2, [r3, #20] + 60 0024 8021 movs r1, #128 + 61 0026 8902 lsls r1, r1, #10 + 62 0028 0A43 orrs r2, r1 + 63 002a 5A61 str r2, [r3, #20] + 64 002c 5B69 ldr r3, [r3, #20] + 65 002e 0B40 ands r3, r1 + 66 0030 0293 str r3, [sp, #8] + 67 0032 029B ldr r3, [sp, #8] + 68 .LBE3: + 202:Src/main.c **** + 203:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, GPIO_PIN_RESET); + 69 .loc 1 203 0 + 70 0034 8025 movs r5, #128 + 71 0036 AD01 lsls r5, r5, #6 + 72 0038 094C ldr r4, .L2+4 + 73 003a 0022 movs r2, #0 + 74 003c 2900 movs r1, r5 + 75 003e 2000 movs r0, r4 + 76 0040 FFF7FEFF bl HAL_GPIO_WritePin + 77 .LVL1: + 204:Src/main.c **** + 205:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_13; + 78 .loc 1 205 0 + 79 0044 0395 str r5, [sp, #12] + 206:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; + 80 .loc 1 206 0 + ARM GAS /tmp/cclvWDtP.s page 6 + + + 81 0046 0123 movs r3, #1 + 82 0048 0493 str r3, [sp, #16] + 207:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 83 .loc 1 207 0 + 84 004a 0023 movs r3, #0 + 85 004c 0593 str r3, [sp, #20] + 208:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; + 86 .loc 1 208 0 + 87 004e 0693 str r3, [sp, #24] + 209:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 88 .loc 1 209 0 + 89 0050 03A9 add r1, sp, #12 + 90 0052 2000 movs r0, r4 + 91 0054 FFF7FEFF bl HAL_GPIO_Init + 92 .LVL2: + 210:Src/main.c **** } + 93 .loc 1 210 0 + 94 0058 09B0 add sp, sp, #36 + 95 @ sp needed + 96 005a 30BD pop {r4, r5, pc} + 97 .L3: + 98 .align 2 + 99 .L2: + 100 005c 00100240 .word 1073876992 + 101 0060 00040048 .word 1207960576 + 102 .cfi_endproc + 103 .LFE48: + 105 .section .text.MX_DMA_Init,"ax",%progbits + 106 .align 1 + 107 .syntax unified + 108 .code 16 + 109 .thumb_func + 110 .fpu softvfp + 112 MX_DMA_Init: + 113 .LFB47: + 187:Src/main.c **** __HAL_RCC_DMA1_CLK_ENABLE(); + 114 .loc 1 187 0 + 115 .cfi_startproc + 116 @ args = 0, pretend = 0, frame = 8 + 117 @ frame_needed = 0, uses_anonymous_args = 0 + 118 0000 00B5 push {lr} + 119 .LCFI2: + 120 .cfi_def_cfa_offset 4 + 121 .cfi_offset 14, -4 + 122 0002 83B0 sub sp, sp, #12 + 123 .LCFI3: + 124 .cfi_def_cfa_offset 16 + 125 .LBB4: + 188:Src/main.c **** + 126 .loc 1 188 0 + 127 0004 094A ldr r2, .L5 + 128 0006 5169 ldr r1, [r2, #20] + 129 0008 0123 movs r3, #1 + 130 000a 1943 orrs r1, r3 + 131 000c 5161 str r1, [r2, #20] + 132 000e 5269 ldr r2, [r2, #20] + 133 0010 1340 ands r3, r2 + ARM GAS /tmp/cclvWDtP.s page 7 + + + 134 0012 0193 str r3, [sp, #4] + 135 0014 019B ldr r3, [sp, #4] + 136 .LBE4: + 190:Src/main.c **** HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn); + 137 .loc 1 190 0 + 138 0016 0022 movs r2, #0 + 139 0018 0021 movs r1, #0 + 140 001a 0920 movs r0, #9 + 141 001c FFF7FEFF bl HAL_NVIC_SetPriority + 142 .LVL3: + 191:Src/main.c **** } + 143 .loc 1 191 0 + 144 0020 0920 movs r0, #9 + 145 0022 FFF7FEFF bl HAL_NVIC_EnableIRQ + 146 .LVL4: + 192:Src/main.c **** + 147 .loc 1 192 0 + 148 0026 03B0 add sp, sp, #12 + 149 @ sp needed + 150 0028 00BD pop {pc} + 151 .L6: + 152 002a C046 .align 2 + 153 .L5: + 154 002c 00100240 .word 1073876992 + 155 .cfi_endproc + 156 .LFE47: + 158 .section .text.MX_ADC_Init,"ax",%progbits + 159 .align 1 + 160 .syntax unified + 161 .code 16 + 162 .thumb_func + 163 .fpu softvfp + 165 MX_ADC_Init: + 166 .LFB45: + 125:Src/main.c **** + 167 .loc 1 125 0 + 168 .cfi_startproc + 169 @ args = 0, pretend = 0, frame = 16 + 170 @ frame_needed = 0, uses_anonymous_args = 0 + 171 0000 F0B5 push {r4, r5, r6, r7, lr} + 172 .LCFI4: + 173 .cfi_def_cfa_offset 20 + 174 .cfi_offset 4, -20 + 175 .cfi_offset 5, -16 + 176 .cfi_offset 6, -12 + 177 .cfi_offset 7, -8 + 178 .cfi_offset 14, -4 + 179 0002 85B0 sub sp, sp, #20 + 180 .LCFI5: + 181 .cfi_def_cfa_offset 40 + 127:Src/main.c **** + 182 .loc 1 127 0 + 183 0004 0C22 movs r2, #12 + 184 0006 0021 movs r1, #0 + 185 0008 01A8 add r0, sp, #4 + 186 000a FFF7FEFF bl memset + 187 .LVL5: + ARM GAS /tmp/cclvWDtP.s page 8 + + + 129:Src/main.c **** hadc.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1; + 188 .loc 1 129 0 + 189 000e 264C ldr r4, .L8 + 190 0010 264B ldr r3, .L8+4 + 191 0012 2360 str r3, [r4] + 130:Src/main.c **** hadc.Init.Resolution = ADC_RESOLUTION_12B; + 192 .loc 1 130 0 + 193 0014 0023 movs r3, #0 + 194 0016 6360 str r3, [r4, #4] + 131:Src/main.c **** hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 195 .loc 1 131 0 + 196 0018 A360 str r3, [r4, #8] + 132:Src/main.c **** hadc.Init.ScanConvMode = ADC_SCAN_DIRECTION_FORWARD; + 197 .loc 1 132 0 + 198 001a E360 str r3, [r4, #12] + 133:Src/main.c **** hadc.Init.EOCSelection = ADC_EOC_SEQ_CONV; + 199 .loc 1 133 0 + 200 001c 0125 movs r5, #1 + 201 001e 2561 str r5, [r4, #16] + 134:Src/main.c **** hadc.Init.LowPowerAutoWait = DISABLE; + 202 .loc 1 134 0 + 203 0020 0826 movs r6, #8 + 204 0022 6661 str r6, [r4, #20] + 135:Src/main.c **** hadc.Init.LowPowerAutoPowerOff = DISABLE; + 205 .loc 1 135 0 + 206 0024 2376 strb r3, [r4, #24] + 136:Src/main.c **** hadc.Init.ContinuousConvMode = ENABLE; + 207 .loc 1 136 0 + 208 0026 6376 strb r3, [r4, #25] + 137:Src/main.c **** hadc.Init.DiscontinuousConvMode = DISABLE; + 209 .loc 1 137 0 + 210 0028 A576 strb r5, [r4, #26] + 138:Src/main.c **** hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 211 .loc 1 138 0 + 212 002a E376 strb r3, [r4, #27] + 139:Src/main.c **** hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 213 .loc 1 139 0 + 214 002c C222 movs r2, #194 + 215 002e FF32 adds r2, r2, #255 + 216 0030 E261 str r2, [r4, #28] + 140:Src/main.c **** hadc.Init.DMAContinuousRequests = ENABLE; + 217 .loc 1 140 0 + 218 0032 2362 str r3, [r4, #32] + 141:Src/main.c **** hadc.Init.Overrun = ADC_OVR_DATA_PRESERVED; + 219 .loc 1 141 0 + 220 0034 2433 adds r3, r3, #36 + 221 0036 E554 strb r5, [r4, r3] + 142:Src/main.c **** HAL_ADC_Init(&hadc); + 222 .loc 1 142 0 + 223 0038 A562 str r5, [r4, #40] + 143:Src/main.c **** + 224 .loc 1 143 0 + 225 003a 2000 movs r0, r4 + 226 003c FFF7FEFF bl HAL_ADC_Init + 227 .LVL6: + 145:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_71CYCLES_5; + 228 .loc 1 145 0 + ARM GAS /tmp/cclvWDtP.s page 9 + + + 229 0040 8023 movs r3, #128 + 230 0042 5B01 lsls r3, r3, #5 + 231 0044 0293 str r3, [sp, #8] + 146:Src/main.c **** sConfig.Channel = ADC_CHANNEL_1; + 232 .loc 1 146 0 + 233 0046 0627 movs r7, #6 + 234 0048 0397 str r7, [sp, #12] + 147:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 235 .loc 1 147 0 + 236 004a 0195 str r5, [sp, #4] + 148:Src/main.c **** + 237 .loc 1 148 0 + 238 004c 01A9 add r1, sp, #4 + 239 004e 2000 movs r0, r4 + 240 0050 FFF7FEFF bl HAL_ADC_ConfigChannel + 241 .LVL7: + 150:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 242 .loc 1 150 0 + 243 0054 0223 movs r3, #2 + 244 0056 0193 str r3, [sp, #4] + 151:Src/main.c **** + 245 .loc 1 151 0 + 246 0058 01A9 add r1, sp, #4 + 247 005a 2000 movs r0, r4 + 248 005c FFF7FEFF bl HAL_ADC_ConfigChannel + 249 .LVL8: + 153:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 250 .loc 1 153 0 + 251 0060 0323 movs r3, #3 + 252 0062 0193 str r3, [sp, #4] + 154:Src/main.c **** + 253 .loc 1 154 0 + 254 0064 01A9 add r1, sp, #4 + 255 0066 2000 movs r0, r4 + 256 0068 FFF7FEFF bl HAL_ADC_ConfigChannel + 257 .LVL9: + 156:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 258 .loc 1 156 0 + 259 006c 0423 movs r3, #4 + 260 006e 0193 str r3, [sp, #4] + 157:Src/main.c **** + 261 .loc 1 157 0 + 262 0070 01A9 add r1, sp, #4 + 263 0072 2000 movs r0, r4 + 264 0074 FFF7FEFF bl HAL_ADC_ConfigChannel + 265 .LVL10: + 159:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 266 .loc 1 159 0 + 267 0078 0523 movs r3, #5 + 268 007a 0193 str r3, [sp, #4] + 160:Src/main.c **** + 269 .loc 1 160 0 + 270 007c 01A9 add r1, sp, #4 + 271 007e 2000 movs r0, r4 + 272 0080 FFF7FEFF bl HAL_ADC_ConfigChannel + 273 .LVL11: + 162:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + ARM GAS /tmp/cclvWDtP.s page 10 + + + 274 .loc 1 162 0 + 275 0084 0197 str r7, [sp, #4] + 163:Src/main.c **** + 276 .loc 1 163 0 + 277 0086 01A9 add r1, sp, #4 + 278 0088 2000 movs r0, r4 + 279 008a FFF7FEFF bl HAL_ADC_ConfigChannel + 280 .LVL12: + 165:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 281 .loc 1 165 0 + 282 008e 0723 movs r3, #7 + 283 0090 0193 str r3, [sp, #4] + 166:Src/main.c **** + 284 .loc 1 166 0 + 285 0092 01A9 add r1, sp, #4 + 286 0094 2000 movs r0, r4 + 287 0096 FFF7FEFF bl HAL_ADC_ConfigChannel + 288 .LVL13: + 168:Src/main.c **** HAL_ADC_ConfigChannel(&hadc, &sConfig); + 289 .loc 1 168 0 + 290 009a 0196 str r6, [sp, #4] + 169:Src/main.c **** } + 291 .loc 1 169 0 + 292 009c 01A9 add r1, sp, #4 + 293 009e 2000 movs r0, r4 + 294 00a0 FFF7FEFF bl HAL_ADC_ConfigChannel + 295 .LVL14: + 170:Src/main.c **** + 296 .loc 1 170 0 + 297 00a4 05B0 add sp, sp, #20 + 298 @ sp needed + 299 00a6 F0BD pop {r4, r5, r6, r7, pc} + 300 .L9: + 301 .align 2 + 302 .L8: + 303 00a8 00000000 .word hadc + 304 00ac 00240140 .word 1073816576 + 305 .cfi_endproc + 306 .LFE45: + 308 .section .text.SystemClock_Config,"ax",%progbits + 309 .align 1 + 310 .global SystemClock_Config + 311 .syntax unified + 312 .code 16 + 313 .thumb_func + 314 .fpu softvfp + 316 SystemClock_Config: + 317 .LFB44: + 99:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 318 .loc 1 99 0 + 319 .cfi_startproc + 320 @ args = 0, pretend = 0, frame = 96 + 321 @ frame_needed = 0, uses_anonymous_args = 0 + 322 0000 10B5 push {r4, lr} + 323 .LCFI6: + 324 .cfi_def_cfa_offset 8 + 325 .cfi_offset 4, -8 + ARM GAS /tmp/cclvWDtP.s page 11 + + + 326 .cfi_offset 14, -4 + 327 0002 98B0 sub sp, sp, #96 + 328 .LCFI7: + 329 .cfi_def_cfa_offset 104 + 100:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 330 .loc 1 100 0 + 331 0004 3022 movs r2, #48 + 332 0006 0021 movs r1, #0 + 333 0008 0CA8 add r0, sp, #48 + 334 000a FFF7FEFF bl memset + 335 .LVL15: + 101:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInit = {0}; + 336 .loc 1 101 0 + 337 000e 1022 movs r2, #16 + 338 0010 0021 movs r1, #0 + 339 0012 07A8 add r0, sp, #28 + 340 0014 FFF7FEFF bl memset + 341 .LVL16: + 102:Src/main.c **** + 342 .loc 1 102 0 + 343 0018 1C22 movs r2, #28 + 344 001a 0021 movs r1, #0 + 345 001c 6846 mov r0, sp + 346 001e FFF7FEFF bl memset + 347 .LVL17: + 104:Src/main.c **** RCC_OscInitStruct.HSI48State = RCC_HSI48_ON; + 348 .loc 1 104 0 + 349 0022 3023 movs r3, #48 + 350 0024 0B93 str r3, [sp, #44] + 105:Src/main.c **** RCC_OscInitStruct.HSI14State = RCC_HSI14_ON; + 351 .loc 1 105 0 + 352 0026 2F3B subs r3, r3, #47 + 353 0028 1393 str r3, [sp, #76] + 106:Src/main.c **** RCC_OscInitStruct.HSI14CalibrationValue = 16; + 354 .loc 1 106 0 + 355 002a 1093 str r3, [sp, #64] + 107:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; + 356 .loc 1 107 0 + 357 002c 0F33 adds r3, r3, #15 + 358 002e 1193 str r3, [sp, #68] + 109:Src/main.c **** + 359 .loc 1 109 0 + 360 0030 0BA8 add r0, sp, #44 + 361 0032 FFF7FEFF bl HAL_RCC_OscConfig + 362 .LVL18: + 111:Src/main.c **** |RCC_CLOCKTYPE_PCLK1; + 363 .loc 1 111 0 + 364 0036 0723 movs r3, #7 + 365 0038 0793 str r3, [sp, #28] + 113:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 366 .loc 1 113 0 + 367 003a 043B subs r3, r3, #4 + 368 003c 0893 str r3, [sp, #32] + 114:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; + 369 .loc 1 114 0 + 370 003e 0024 movs r4, #0 + 371 0040 0994 str r4, [sp, #36] + ARM GAS /tmp/cclvWDtP.s page 12 + + + 115:Src/main.c **** HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1); + 372 .loc 1 115 0 + 373 0042 0A94 str r4, [sp, #40] + 116:Src/main.c **** + 374 .loc 1 116 0 + 375 0044 0121 movs r1, #1 + 376 0046 07A8 add r0, sp, #28 + 377 0048 FFF7FEFF bl HAL_RCC_ClockConfig + 378 .LVL19: + 118:Src/main.c **** PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48; + 379 .loc 1 118 0 + 380 004c 8023 movs r3, #128 + 381 004e 9B02 lsls r3, r3, #10 + 382 0050 0093 str r3, [sp] + 119:Src/main.c **** HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit); + 383 .loc 1 119 0 + 384 0052 0694 str r4, [sp, #24] + 120:Src/main.c **** + 385 .loc 1 120 0 + 386 0054 6846 mov r0, sp + 387 0056 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig + 388 .LVL20: + 122:Src/main.c **** + 389 .loc 1 122 0 + 390 005a 18B0 add sp, sp, #96 + 391 @ sp needed + 392 005c 10BD pop {r4, pc} + 393 .cfi_endproc + 394 .LFE44: + 396 .global __aeabi_uidiv + 397 .section .text.main,"ax",%progbits + 398 .align 1 + 399 .global main + 400 .syntax unified + 401 .code 16 + 402 .thumb_func + 403 .fpu softvfp + 405 main: + 406 .LFB43: + 33:Src/main.c **** HAL_Init(); + 407 .loc 1 33 0 + 408 .cfi_startproc + 409 @ args = 0, pretend = 0, frame = 0 + 410 @ frame_needed = 0, uses_anonymous_args = 0 + 411 0000 70B5 push {r4, r5, r6, lr} + 412 .LCFI8: + 413 .cfi_def_cfa_offset 16 + 414 .cfi_offset 4, -16 + 415 .cfi_offset 5, -12 + 416 .cfi_offset 6, -8 + 417 .cfi_offset 14, -4 + 34:Src/main.c **** + 418 .loc 1 34 0 + 419 0002 FFF7FEFF bl HAL_Init + 420 .LVL21: + 36:Src/main.c **** + 421 .loc 1 36 0 + ARM GAS /tmp/cclvWDtP.s page 13 + + + 422 0006 FFF7FEFF bl SystemClock_Config + 423 .LVL22: + 38:Src/main.c **** MX_DMA_Init(); + 424 .loc 1 38 0 + 425 000a FFF7FEFF bl MX_GPIO_Init + 426 .LVL23: + 39:Src/main.c **** MX_ADC_Init(); + 427 .loc 1 39 0 + 428 000e FFF7FEFF bl MX_DMA_Init + 429 .LVL24: + 40:Src/main.c **** MX_USB_MIDI_INIT(); + 430 .loc 1 40 0 + 431 0012 FFF7FEFF bl MX_ADC_Init + 432 .LVL25: + 41:Src/main.c **** + 433 .loc 1 41 0 + 434 0016 FFF7FEFF bl MX_USB_MIDI_INIT + 435 .LVL26: + 43:Src/main.c **** + 436 .loc 1 43 0 + 437 001a 0822 movs r2, #8 + 438 001c 4049 ldr r1, .L23 + 439 001e 4148 ldr r0, .L23+4 + 440 0020 FFF7FEFF bl HAL_ADC_Start_DMA + 441 .LVL27: + 46:Src/main.c **** while(1){ + 442 .loc 1 46 0 + 443 0024 FFF7FEFF bl midiInit + 444 .LVL28: + 445 0028 0028 cmp r0, #0 + 446 002a 15D1 bne .L12 + 447 .L13: + 48:Src/main.c **** HAL_Delay(500); + 448 .loc 1 48 0 discriminator 1 + 449 002c 8026 movs r6, #128 + 450 002e B601 lsls r6, r6, #6 + 451 0030 3D4D ldr r5, .L23+8 + 452 0032 0122 movs r2, #1 + 453 0034 3100 movs r1, r6 + 454 0036 2800 movs r0, r5 + 455 0038 FFF7FEFF bl HAL_GPIO_WritePin + 456 .LVL29: + 49:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, RESET); + 457 .loc 1 49 0 discriminator 1 + 458 003c FA24 movs r4, #250 + 459 003e 6400 lsls r4, r4, #1 + 460 0040 2000 movs r0, r4 + 461 0042 FFF7FEFF bl HAL_Delay + 462 .LVL30: + 50:Src/main.c **** HAL_Delay(500); + 463 .loc 1 50 0 discriminator 1 + 464 0046 0022 movs r2, #0 + 465 0048 3100 movs r1, r6 + 466 004a 2800 movs r0, r5 + 467 004c FFF7FEFF bl HAL_GPIO_WritePin + 468 .LVL31: + 51:Src/main.c **** } + ARM GAS /tmp/cclvWDtP.s page 14 + + + 469 .loc 1 51 0 discriminator 1 + 470 0050 2000 movs r0, r4 + 471 0052 FFF7FEFF bl HAL_Delay + 472 .LVL32: + 473 0056 E9E7 b .L13 + 474 .L12: + 58:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, SET); + 475 .loc 1 58 0 + 476 0058 344A ldr r2, .L23+12 + 477 005a FE23 movs r3, #254 + 478 005c 5B00 lsls r3, r3, #1 + 479 005e D35C ldrb r3, [r2, r3] + 480 0060 032B cmp r3, #3 + 481 0062 06D0 beq .L22 + 62:Src/main.c **** } + 482 .loc 1 62 0 + 483 0064 8021 movs r1, #128 + 484 0066 0022 movs r2, #0 + 485 0068 8901 lsls r1, r1, #6 + 486 006a 2F48 ldr r0, .L23+8 + 487 006c FFF7FEFF bl HAL_GPIO_WritePin + 488 .LVL33: + 58:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, SET); + 489 .loc 1 58 0 + 490 0070 F2E7 b .L12 + 491 .L22: + 59:Src/main.c **** break; + 492 .loc 1 59 0 + 493 0072 8021 movs r1, #128 + 494 0074 0122 movs r2, #1 + 495 0076 8901 lsls r1, r1, #6 + 496 0078 2B48 ldr r0, .L23+8 + 497 007a FFF7FEFF bl HAL_GPIO_WritePin + 498 .LVL34: + 60:Src/main.c **** }else{ + 499 .loc 1 60 0 + 500 007e 12E0 b .L15 + 501 .L16: + 73:Src/main.c **** HAL_Delay(200); + 502 .loc 1 73 0 + 503 0080 8025 movs r5, #128 + 504 0082 AD01 lsls r5, r5, #6 + 505 0084 284C ldr r4, .L23+8 + 506 0086 0122 movs r2, #1 + 507 0088 2900 movs r1, r5 + 508 008a 2000 movs r0, r4 + 509 008c FFF7FEFF bl HAL_GPIO_WritePin + 510 .LVL35: + 74:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, RESET); + 511 .loc 1 74 0 + 512 0090 C820 movs r0, #200 + 513 0092 FFF7FEFF bl HAL_Delay + 514 .LVL36: + 75:Src/main.c **** HAL_Delay(200); + 515 .loc 1 75 0 + 516 0096 0022 movs r2, #0 + 517 0098 2900 movs r1, r5 + ARM GAS /tmp/cclvWDtP.s page 15 + + + 518 009a 2000 movs r0, r4 + 519 009c FFF7FEFF bl HAL_GPIO_WritePin + 520 .LVL37: + 76:Src/main.c **** } + 521 .loc 1 76 0 + 522 00a0 C820 movs r0, #200 + 523 00a2 FFF7FEFF bl HAL_Delay + 524 .LVL38: + 525 .L15: + 69:Src/main.c **** HAL_GPIO_WritePin(GPIOB, GPIO_PIN_13, SET); + 526 .loc 1 69 0 + 527 00a6 214A ldr r2, .L23+12 + 528 00a8 FE23 movs r3, #254 + 529 00aa 5B00 lsls r3, r3, #1 + 530 00ac D35C ldrb r3, [r2, r3] + 531 00ae 032B cmp r3, #3 + 532 00b0 E6D1 bne .L16 + 70:Src/main.c **** break; + 533 .loc 1 70 0 + 534 00b2 8021 movs r1, #128 + 535 00b4 0122 movs r2, #1 + 536 00b6 8901 lsls r1, r1, #6 + 537 00b8 1B48 ldr r0, .L23+8 + 538 00ba FFF7FEFF bl HAL_GPIO_WritePin + 539 .LVL39: + 80:Src/main.c **** for(uint8_t i = 0; i <= 7; i++){ + 540 .loc 1 80 0 + 541 00be FFF7FEFF bl midiProcess + 542 .LVL40: + 543 .LBB5: + 81:Src/main.c **** if(ADC_val[dial_mapping[i]] >= (ADC_val_old[dial_mapping[i]] + HYST) || ADC_val[dial_mapping[ + 544 .loc 1 81 0 + 545 00c2 0024 movs r4, #0 + 546 00c4 1AE0 b .L17 + 547 .LVL41: + 548 .L19: + 83:Src/main.c **** dial[i] = (uint8_t)((ADC_val[dial_mapping[i]]/dial_div[i]) & 0x7F); + 549 .loc 1 83 0 + 550 00c6 5200 lsls r2, r2, #1 + 551 00c8 194B ldr r3, .L23+16 + 552 00ca D052 strh r0, [r2, r3] + 84:Src/main.c **** midi_packet[3] = dial[i]; + 553 .loc 1 84 0 + 554 00cc 6A00 lsls r2, r5, #1 + 555 00ce 194B ldr r3, .L23+20 + 556 00d0 D15A ldrh r1, [r2, r3] + 557 00d2 FFF7FEFF bl __aeabi_uidiv + 558 .LVL42: + 559 00d6 7F23 movs r3, #127 + 560 00d8 0340 ands r3, r0 + 561 00da 174A ldr r2, .L23+24 + 562 00dc 5355 strb r3, [r2, r5] + 85:Src/main.c **** midi_packet[1] = 0xB0 + i; + 563 .loc 1 85 0 + 564 00de 1748 ldr r0, .L23+28 + 565 00e0 C370 strb r3, [r0, #3] + 86:Src/main.c **** sendMidiMessage(midi_packet, 4); + ARM GAS /tmp/cclvWDtP.s page 16 + + + 566 .loc 1 86 0 + 567 00e2 2300 movs r3, r4 + 568 00e4 503B subs r3, r3, #80 + 569 00e6 4370 strb r3, [r0, #1] + 87:Src/main.c **** USBD_MIDI_SendPacket(); + 570 .loc 1 87 0 + 571 00e8 0421 movs r1, #4 + 572 00ea FFF7FEFF bl sendMidiMessage + 573 .LVL43: + 88:Src/main.c **** HAL_Delay(2); + 574 .loc 1 88 0 + 575 00ee FFF7FEFF bl USBD_MIDI_SendPacket + 576 .LVL44: + 89:Src/main.c **** } + 577 .loc 1 89 0 + 578 00f2 0220 movs r0, #2 + 579 00f4 FFF7FEFF bl HAL_Delay + 580 .LVL45: + 581 .L20: + 81:Src/main.c **** if(ADC_val[dial_mapping[i]] >= (ADC_val_old[dial_mapping[i]] + HYST) || ADC_val[dial_mapping[ + 582 .loc 1 81 0 discriminator 2 + 583 00f8 0134 adds r4, r4, #1 + 584 .LVL46: + 585 00fa E4B2 uxtb r4, r4 + 586 .LVL47: + 587 .L17: + 81:Src/main.c **** if(ADC_val[dial_mapping[i]] >= (ADC_val_old[dial_mapping[i]] + HYST) || ADC_val[dial_mapping[ + 588 .loc 1 81 0 is_stmt 0 discriminator 1 + 589 00fc 072C cmp r4, #7 + 590 00fe D2D8 bhi .L15 + 82:Src/main.c **** ADC_val_old[dial_mapping[i]] = ADC_val[dial_mapping[i]]; + 591 .loc 1 82 0 is_stmt 1 + 592 0100 2500 movs r5, r4 + 593 0102 0F4B ldr r3, .L23+32 + 594 0104 1A5D ldrb r2, [r3, r4] + 595 0106 5300 lsls r3, r2, #1 + 596 0108 0549 ldr r1, .L23 + 597 010a 585A ldrh r0, [r3, r1] + 598 010c 084E ldr r6, .L23+16 + 599 010e 9B5B ldrh r3, [r3, r6] + 600 0110 1E00 movs r6, r3 + 601 0112 3236 adds r6, r6, #50 + 602 0114 B042 cmp r0, r6 + 603 0116 D6DA bge .L19 + 82:Src/main.c **** ADC_val_old[dial_mapping[i]] = ADC_val[dial_mapping[i]]; + 604 .loc 1 82 0 is_stmt 0 discriminator 1 + 605 0118 323B subs r3, r3, #50 + 606 011a 9842 cmp r0, r3 + 607 011c ECDC bgt .L20 + 608 011e D2E7 b .L19 + 609 .L24: + 610 .align 2 + 611 .L23: + 612 0120 00000000 .word ADC_val + 613 0124 00000000 .word hadc + 614 0128 00040048 .word 1207960576 + 615 012c 00000000 .word hUsbDeviceFS + ARM GAS /tmp/cclvWDtP.s page 17 + + + 616 0130 00000000 .word ADC_val_old + 617 0134 00000000 .word .LANCHOR1 + 618 0138 00000000 .word dial + 619 013c 00000000 .word .LANCHOR2 + 620 0140 00000000 .word .LANCHOR0 + 621 .LBE5: + 622 .cfi_endproc + 623 .LFE43: + 625 .section .text.Error_Handler,"ax",%progbits + 626 .align 1 + 627 .global Error_Handler + 628 .syntax unified + 629 .code 16 + 630 .thumb_func + 631 .fpu softvfp + 633 Error_Handler: + 634 .LFB49: + 211:Src/main.c **** + 212:Src/main.c **** void Error_Handler(void) + 213:Src/main.c **** { + 635 .loc 1 213 0 is_stmt 1 + 636 .cfi_startproc + 637 @ Volatile: function does not return. + 638 @ args = 0, pretend = 0, frame = 0 + 639 @ frame_needed = 0, uses_anonymous_args = 0 + 640 0000 70B5 push {r4, r5, r6, lr} + 641 .LCFI9: + 642 .cfi_def_cfa_offset 16 + 643 .cfi_offset 4, -16 + 644 .cfi_offset 5, -12 + 645 .cfi_offset 6, -8 + 646 .cfi_offset 14, -4 + 647 .L26: + 214:Src/main.c **** while(1){ + 215:Src/main.c **** HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,1); + 648 .loc 1 215 0 discriminator 1 + 649 0002 8025 movs r5, #128 + 650 0004 AD01 lsls r5, r5, #6 + 651 0006 094C ldr r4, .L27 + 652 0008 0122 movs r2, #1 + 653 000a 2900 movs r1, r5 + 654 000c 2000 movs r0, r4 + 655 000e FFF7FEFF bl HAL_GPIO_WritePin + 656 .LVL48: + 216:Src/main.c **** HAL_Delay(100); + 657 .loc 1 216 0 discriminator 1 + 658 0012 6420 movs r0, #100 + 659 0014 FFF7FEFF bl HAL_Delay + 660 .LVL49: + 217:Src/main.c **** HAL_GPIO_WritePin(GPIOB,GPIO_PIN_13,0); + 661 .loc 1 217 0 discriminator 1 + 662 0018 0022 movs r2, #0 + 663 001a 2900 movs r1, r5 + 664 001c 2000 movs r0, r4 + 665 001e FFF7FEFF bl HAL_GPIO_WritePin + 666 .LVL50: + 218:Src/main.c **** HAL_Delay(100); + ARM GAS /tmp/cclvWDtP.s page 18 + + + 667 .loc 1 218 0 discriminator 1 + 668 0022 6420 movs r0, #100 + 669 0024 FFF7FEFF bl HAL_Delay + 670 .LVL51: + 671 0028 EBE7 b .L26 + 672 .L28: + 673 002a C046 .align 2 + 674 .L27: + 675 002c 00040048 .word 1207960576 + 676 .cfi_endproc + 677 .LFE49: + 679 .global midi_packet + 680 .global dial_div + 681 .global dial_mapping + 682 .comm dial,8,4 + 683 .comm ADC_val_old,16,4 + 684 .comm ADC_val,16,4 + 685 .comm hpcd_USB_FS,628,4 + 686 .comm hdma_adc,68,4 + 687 .comm hadc,64,4 + 688 .section .data.dial_div,"aw",%progbits + 689 .align 2 + 690 .set .LANCHOR1,. + 0 + 693 dial_div: + 694 0000 2000 .short 32 + 695 0002 2000 .short 32 + 696 0004 2000 .short 32 + 697 0006 2000 .short 32 + 698 0008 2000 .short 32 + 699 000a 2000 .short 32 + 700 000c 2000 .short 32 + 701 000e 0001 .short 256 + 702 .section .data.dial_mapping,"aw",%progbits + 703 .align 2 + 704 .set .LANCHOR0,. + 0 + 707 dial_mapping: + 708 0000 01 .byte 1 + 709 0001 02 .byte 2 + 710 0002 03 .byte 3 + 711 0003 04 .byte 4 + 712 0004 05 .byte 5 + 713 0005 06 .byte 6 + 714 0006 07 .byte 7 + 715 0007 00 .byte 0 + 716 .section .data.midi_packet,"aw",%progbits + 717 .align 2 + 718 .set .LANCHOR2,. + 0 + 721 midi_packet: + 722 0000 0B .byte 11 + 723 0001 B0 .byte -80 + 724 0002 00 .byte 0 + 725 0003 00 .byte 0 + 726 .text + 727 .Letext0: + 728 .file 2 "/usr/include/newlib/machine/_default_types.h" + 729 .file 3 "/usr/include/newlib/sys/_stdint.h" + 730 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + ARM GAS /tmp/cclvWDtP.s page 19 + + + 731 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 732 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 733 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 734 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h" + 735 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h" + 736 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + 737 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 738 .file 12 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 739 .file 13 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h" + 740 .file 14 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h" + 741 .file 15 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 742 .file 16 "/usr/include/newlib/sys/lock.h" + 743 .file 17 "/usr/include/newlib/sys/_types.h" + 744 .file 18 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 745 .file 19 "/usr/include/newlib/sys/reent.h" + 746 .file 20 "/usr/include/newlib/stdlib.h" + 747 .file 21 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h" + 748 .file 22 "Inc/usb_device.h" + 749 .file 23 "Inc/curelib_inc/curemisc.h" + 750 .file 24 "Middlewares/USBMIDI/Inc/usbd_midi.h" + 751 .file 25 "Inc/usbd_desc.h" + 752 .file 26 "Inc/usbd_midi_if.h" + 753 .file 27 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h" + 754 .file 28 "<built-in>" + ARM GAS /tmp/cclvWDtP.s page 20 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 main.c + /tmp/cclvWDtP.s:16 .text.MX_GPIO_Init:0000000000000000 $t + /tmp/cclvWDtP.s:22 .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init + /tmp/cclvWDtP.s:100 .text.MX_GPIO_Init:000000000000005c $d + /tmp/cclvWDtP.s:106 .text.MX_DMA_Init:0000000000000000 $t + /tmp/cclvWDtP.s:112 .text.MX_DMA_Init:0000000000000000 MX_DMA_Init + /tmp/cclvWDtP.s:154 .text.MX_DMA_Init:000000000000002c $d + /tmp/cclvWDtP.s:159 .text.MX_ADC_Init:0000000000000000 $t + /tmp/cclvWDtP.s:165 .text.MX_ADC_Init:0000000000000000 MX_ADC_Init + /tmp/cclvWDtP.s:303 .text.MX_ADC_Init:00000000000000a8 $d + *COM*:0000000000000040 hadc + /tmp/cclvWDtP.s:309 .text.SystemClock_Config:0000000000000000 $t + /tmp/cclvWDtP.s:316 .text.SystemClock_Config:0000000000000000 SystemClock_Config + /tmp/cclvWDtP.s:398 .text.main:0000000000000000 $t + /tmp/cclvWDtP.s:405 .text.main:0000000000000000 main + /tmp/cclvWDtP.s:612 .text.main:0000000000000120 $d + *COM*:0000000000000010 ADC_val + *COM*:0000000000000010 ADC_val_old + *COM*:0000000000000008 dial + /tmp/cclvWDtP.s:626 .text.Error_Handler:0000000000000000 $t + /tmp/cclvWDtP.s:633 .text.Error_Handler:0000000000000000 Error_Handler + /tmp/cclvWDtP.s:675 .text.Error_Handler:000000000000002c $d + /tmp/cclvWDtP.s:721 .data.midi_packet:0000000000000000 midi_packet + /tmp/cclvWDtP.s:693 .data.dial_div:0000000000000000 dial_div + /tmp/cclvWDtP.s:707 .data.dial_mapping:0000000000000000 dial_mapping + *COM*:0000000000000274 hpcd_USB_FS + *COM*:0000000000000044 hdma_adc + /tmp/cclvWDtP.s:689 .data.dial_div:0000000000000000 $d + /tmp/cclvWDtP.s:703 .data.dial_mapping:0000000000000000 $d + /tmp/cclvWDtP.s:717 .data.midi_packet:0000000000000000 $d + +UNDEFINED SYMBOLS +memset +HAL_GPIO_WritePin +HAL_GPIO_Init +HAL_NVIC_SetPriority +HAL_NVIC_EnableIRQ +HAL_ADC_Init +HAL_ADC_ConfigChannel +HAL_RCC_OscConfig +HAL_RCC_ClockConfig +HAL_RCCEx_PeriphCLKConfig +__aeabi_uidiv +HAL_Init +MX_USB_MIDI_INIT +HAL_ADC_Start_DMA +midiInit +HAL_Delay +midiProcess +sendMidiMessage +USBD_MIDI_SendPacket +hUsbDeviceFS diff --git a/fw/midi-dials/build/main.o b/fw/midi-dials/build/main.o Binary files differnew file mode 100644 index 0000000..0b7b5ea --- /dev/null +++ b/fw/midi-dials/build/main.o diff --git a/fw/midi-dials/build/midi-dials.bin b/fw/midi-dials/build/midi-dials.bin Binary files differnew file mode 100755 index 0000000..3b74a5a --- /dev/null +++ b/fw/midi-dials/build/midi-dials.bin diff --git a/fw/midi-dials/build/midi-dials.elf b/fw/midi-dials/build/midi-dials.elf Binary files differnew file mode 100755 index 0000000..c8db902 --- /dev/null +++ b/fw/midi-dials/build/midi-dials.elf diff --git a/fw/midi-dials/build/midi-dials.hex b/fw/midi-dials/build/midi-dials.hex new file mode 100644 index 0000000..42a4578 --- /dev/null +++ b/fw/midi-dials/build/midi-dials.hex @@ -0,0 +1,1104 @@ +:020000040800F2
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diff --git a/fw/midi-dials/build/midi-dials.map b/fw/midi-dials/build/midi-dials.map new file mode 100644 index 0000000..e9a9dc1 --- /dev/null +++ b/fw/midi-dials/build/midi-dials.map @@ -0,0 +1,3036 @@ +Archive member included to satisfy reference by file (symbol) + +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-atexit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o (atexit) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-exit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o (exit) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-fini.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o (__libc_fini_array) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-impure.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-exit.o) (_global_impure_ptr) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o (__libc_init_array) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) + build/curebuffer.o (malloc) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-memset.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o (memset) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) (_free_r) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) (_malloc_r) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-sbrkr.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) (_sbrk_r) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__atexit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-atexit.o) (__register_exitproc) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__call_atexit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__atexit.o) (__call_exitprocs) +/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-mlock.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) (__malloc_lock) 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0x00000000200009b4 APP_Rx_Buffer + COMMON 0x0000000020000ab4 0x4 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) + 0x0000000020000ab4 errno + 0x0000000020000ab8 . = ALIGN (0x4) + 0x0000000020000ab8 _ebss = . + 0x0000000020000ab8 __bss_end__ = _ebss + +._user_heap_stack + 0x0000000020000ab8 0x600 load address 0x00000000080044a0 + 0x0000000020000ab8 . = ALIGN (0x8) + 0x0000000020000ab8 PROVIDE (end = .) + [!provide] PROVIDE (_end = .) + 0x0000000020000cb8 . = (. + _Min_Heap_Size) + *fill* 0x0000000020000ab8 0x200 + 0x00000000200010b8 . = (. + _Min_Stack_Size) + *fill* 0x0000000020000cb8 0x400 + 0x00000000200010b8 . = ALIGN (0x8) + +/DISCARD/ + libc.a(*) + libm.a(*) + libgcc.a(*) + +.ARM.attributes + 0x0000000000000000 0x28 + *(.ARM.attributes) + .ARM.attributes + 0x0000000000000000 0x1e /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o + .ARM.attributes + 0x000000000000001e 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o + .ARM.attributes + 0x000000000000004a 0x31 build/main.o + .ARM.attributes + 0x000000000000007b 0x31 build/stm32f0xx_it.o + .ARM.attributes + 0x00000000000000ac 0x31 build/stm32f0xx_hal_msp.o + .ARM.attributes + 0x00000000000000dd 0x31 build/stm32f0xx_ll_usb.o + .ARM.attributes + 0x000000000000010e 0x31 build/stm32f0xx_hal_adc.o + .ARM.attributes + 0x000000000000013f 0x31 build/stm32f0xx_hal_rcc.o + .ARM.attributes + 0x0000000000000170 0x31 build/stm32f0xx_hal_rcc_ex.o + .ARM.attributes + 0x00000000000001a1 0x31 build/stm32f0xx_hal.o + .ARM.attributes + 0x00000000000001d2 0x31 build/stm32f0xx_hal_gpio.o + .ARM.attributes + 0x0000000000000203 0x31 build/stm32f0xx_hal_dma.o + .ARM.attributes + 0x0000000000000234 0x31 build/stm32f0xx_hal_cortex.o + .ARM.attributes + 0x0000000000000265 0x31 build/stm32f0xx_hal_pcd.o + .ARM.attributes + 0x0000000000000296 0x31 build/stm32f0xx_hal_pcd_ex.o + .ARM.attributes + 0x00000000000002c7 0x31 build/usb_device.o + .ARM.attributes + 0x00000000000002f8 0x31 build/usbd_conf.o + .ARM.attributes + 0x0000000000000329 0x31 build/usbd_desc.o + .ARM.attributes + 0x000000000000035a 0x31 build/usbd_midi_if.o + .ARM.attributes + 0x000000000000038b 0x31 build/usbd_core.o + .ARM.attributes + 0x00000000000003bc 0x31 build/usbd_ctlreq.o + .ARM.attributes + 0x00000000000003ed 0x31 build/usbd_ioreq.o + .ARM.attributes + 0x000000000000041e 0x31 build/usbd_midi.o + .ARM.attributes + 0x000000000000044f 0x31 build/curebuffer.o + .ARM.attributes + 0x0000000000000480 0x31 build/system_stm32f0xx.o + .ARM.attributes + 0x00000000000004b1 0x21 build/startup_stm32f072xb.o + .ARM.attributes + 0x00000000000004d2 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-impure.o) + .ARM.attributes + 0x00000000000004fe 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) + .ARM.attributes + 0x000000000000052a 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) + .ARM.attributes + 0x0000000000000556 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-memset.o) + .ARM.attributes + 0x0000000000000582 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) + .ARM.attributes + 0x00000000000005ae 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) + .ARM.attributes + 0x00000000000005da 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-sbrkr.o) + .ARM.attributes + 0x0000000000000606 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-mlock.o) + .ARM.attributes + 0x0000000000000632 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) + .ARM.attributes + 0x000000000000065e 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libnosys.a(sbrk.o) + .ARM.attributes + 0x000000000000068a 0x1e /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_udivsi3.o) + .ARM.attributes + 0x00000000000006a8 0x1e /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_dvmd_tls.o) + .ARM.attributes + 0x00000000000006c6 0x2c /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtend.o + .ARM.attributes + 0x00000000000006f2 0x1e /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtn.o +OUTPUT(build/midi-dials.elf elf32-littlearm) + +.comment 0x0000000000000000 0xae + .comment 0x0000000000000000 0x57 /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o + 0x58 (size before relaxing) + .comment 0x0000000000000057 0x58 build/main.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_it.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal_msp.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_ll_usb.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal_adc.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal_rcc.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal_rcc_ex.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal_gpio.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal_dma.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal_cortex.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal_pcd.o + .comment 0x0000000000000057 0x58 build/stm32f0xx_hal_pcd_ex.o + .comment 0x0000000000000057 0x58 build/usb_device.o + .comment 0x0000000000000057 0x58 build/usbd_conf.o + .comment 0x0000000000000057 0x58 build/usbd_desc.o + .comment 0x0000000000000057 0x58 build/usbd_midi_if.o + .comment 0x0000000000000057 0x58 build/usbd_core.o + .comment 0x0000000000000057 0x58 build/usbd_ctlreq.o + .comment 0x0000000000000057 0x58 build/usbd_ioreq.o + .comment 0x0000000000000057 0x58 build/usbd_midi.o + .comment 0x0000000000000057 0x58 build/curebuffer.o + .comment 0x0000000000000057 0x58 build/system_stm32f0xx.o + .comment 0x0000000000000057 0x57 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-impure.o) + 0x58 (size before relaxing) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-memset.o) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-sbrkr.o) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-mlock.o) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libnosys.a(sbrk.o) + .comment 0x00000000000000ae 0x58 /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtend.o + +.debug_info 0x0000000000000000 0x1ca1a + .debug_info 0x0000000000000000 0x258a build/main.o + .debug_info 0x000000000000258a 0x9a0 build/stm32f0xx_it.o + .debug_info 0x0000000000002f2a 0xa35 build/stm32f0xx_hal_msp.o + .debug_info 0x000000000000395f 0x16b5 build/stm32f0xx_ll_usb.o + .debug_info 0x0000000000005014 0xfdf build/stm32f0xx_hal_adc.o + .debug_info 0x0000000000005ff3 0xade build/stm32f0xx_hal_rcc.o + .debug_info 0x0000000000006ad1 0x7c3 build/stm32f0xx_hal_rcc_ex.o + .debug_info 0x0000000000007294 0x7f4 build/stm32f0xx_hal.o + .debug_info 0x0000000000007a88 0x703 build/stm32f0xx_hal_gpio.o + .debug_info 0x000000000000818b 0x8ea build/stm32f0xx_hal_dma.o + .debug_info 0x0000000000008a75 0x8b7 build/stm32f0xx_hal_cortex.o + .debug_info 0x000000000000932c 0x13e4 build/stm32f0xx_hal_pcd.o + .debug_info 0x000000000000a710 0xa73 build/stm32f0xx_hal_pcd_ex.o + .debug_info 0x000000000000b183 0x1034 build/usb_device.o + .debug_info 0x000000000000c1b7 0x2276 build/usbd_conf.o + .debug_info 0x000000000000e42d 0xeae build/usbd_desc.o + .debug_info 0x000000000000f2db 0x1749 build/usbd_midi_if.o + .debug_info 0x0000000000010a24 0x16a6 build/usbd_core.o + .debug_info 0x00000000000120ca 0x1873 build/usbd_ctlreq.o + .debug_info 0x000000000001393d 0x117d build/usbd_ioreq.o + .debug_info 0x0000000000014aba 0x17fb build/usbd_midi.o + .debug_info 0x00000000000162b5 0xfd5 build/curebuffer.o + .debug_info 0x000000000001728a 0x2d3 build/system_stm32f0xx.o + .debug_info 0x000000000001755d 0x22 build/startup_stm32f072xb.o + .debug_info 0x000000000001757f 0x8a4 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-impure.o) + .debug_info 0x0000000000017e23 0x109 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) + .debug_info 0x0000000000017f2c 0x921 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) + .debug_info 0x000000000001884d 0xe1d /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-memset.o) + .debug_info 0x000000000001966a 0xaba /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) + .debug_info 0x000000000001a124 0xb74 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) + .debug_info 0x000000000001ac98 0x95a /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-sbrkr.o) + .debug_info 0x000000000001b5f2 0x8d7 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-mlock.o) + .debug_info 0x000000000001bec9 0xa75 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) + .debug_info 0x000000000001c93e 0x90 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libnosys.a(sbrk.o) + .debug_info 0x000000000001c9ce 0x26 /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_udivsi3.o) + .debug_info 0x000000000001c9f4 0x26 /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_dvmd_tls.o) + +.debug_abbrev 0x0000000000000000 0x47d8 + .debug_abbrev 0x0000000000000000 0x2b2 build/main.o + .debug_abbrev 0x00000000000002b2 0x183 build/stm32f0xx_it.o + .debug_abbrev 0x0000000000000435 0x1d0 build/stm32f0xx_hal_msp.o + .debug_abbrev 0x0000000000000605 0x303 build/stm32f0xx_ll_usb.o + .debug_abbrev 0x0000000000000908 0x28c build/stm32f0xx_hal_adc.o + .debug_abbrev 0x0000000000000b94 0x269 build/stm32f0xx_hal_rcc.o + .debug_abbrev 0x0000000000000dfd 0x208 build/stm32f0xx_hal_rcc_ex.o + .debug_abbrev 0x0000000000001005 0x209 build/stm32f0xx_hal.o + .debug_abbrev 0x000000000000120e 0x213 build/stm32f0xx_hal_gpio.o + .debug_abbrev 0x0000000000001421 0x252 build/stm32f0xx_hal_dma.o + .debug_abbrev 0x0000000000001673 0x279 build/stm32f0xx_hal_cortex.o + .debug_abbrev 0x00000000000018ec 0x2c8 build/stm32f0xx_hal_pcd.o + .debug_abbrev 0x0000000000001bb4 0x256 build/stm32f0xx_hal_pcd_ex.o + .debug_abbrev 0x0000000000001e0a 0x209 build/usb_device.o + .debug_abbrev 0x0000000000002013 0x317 build/usbd_conf.o + .debug_abbrev 0x000000000000232a 0x284 build/usbd_desc.o + .debug_abbrev 0x00000000000025ae 0x337 build/usbd_midi_if.o + .debug_abbrev 0x00000000000028e5 0x2e2 build/usbd_core.o + .debug_abbrev 0x0000000000002bc7 0x325 build/usbd_ctlreq.o + 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/usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) + .debug_abbrev 0x0000000000003edb 0x295 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) + .debug_abbrev 0x0000000000004170 0x1df /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-sbrkr.o) + .debug_abbrev 0x000000000000434f 0x1a1 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-mlock.o) + .debug_abbrev 0x00000000000044f0 0x22e /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) + .debug_abbrev 0x000000000000471e 0x92 /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libnosys.a(sbrk.o) + .debug_abbrev 0x00000000000047b0 0x14 /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_udivsi3.o) + .debug_abbrev 0x00000000000047c4 0x14 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build/main.o +ADC_val_old build/main.o +AHBPrescTable build/system_stm32f0xx.o + build/stm32f0xx_hal_rcc.o +APBPrescTable build/system_stm32f0xx.o + build/stm32f0xx_hal_rcc.o +APP_Rx_Buffer build/usbd_midi.o + build/usbd_midi_if.o +APP_Rx_length build/usbd_midi.o +APP_Rx_ptr_in build/usbd_midi.o + build/usbd_midi_if.o +APP_Rx_ptr_out build/usbd_midi.o +CEC_CAN_IRQHandler build/startup_stm32f072xb.o +DMA1_Channel1_IRQHandler build/stm32f0xx_it.o +DMA1_Channel2_3_IRQHandler build/startup_stm32f072xb.o +DMA1_Channel4_5_6_7_IRQHandler build/startup_stm32f072xb.o +Default_Handler build/startup_stm32f072xb.o +EXTI0_1_IRQHandler build/startup_stm32f072xb.o +EXTI2_3_IRQHandler build/startup_stm32f072xb.o +EXTI4_15_IRQHandler build/startup_stm32f072xb.o +Error_Handler build/main.o + build/stm32f0xx_hal_msp.o +FLASH_IRQHandler build/startup_stm32f072xb.o +FLASH_PageErase build/stm32f0xx_hal_flash_ex.o + build/stm32f0xx_hal_flash.o +FLASH_WaitForLastOperation build/stm32f0xx_hal_flash.o + build/stm32f0xx_hal_flash_ex.o +FS_Desc build/usbd_desc.o + build/usb_device.o +HAL_ADCEx_Calibration_Start build/stm32f0xx_hal_adc_ex.o +HAL_ADC_AnalogWDGConfig build/stm32f0xx_hal_adc.o +HAL_ADC_ConfigChannel build/stm32f0xx_hal_adc.o + build/main.o +HAL_ADC_ConvCpltCallback build/stm32f0xx_hal_adc.o +HAL_ADC_ConvHalfCpltCallback build/stm32f0xx_hal_adc.o +HAL_ADC_DeInit build/stm32f0xx_hal_adc.o +HAL_ADC_ErrorCallback build/stm32f0xx_hal_adc.o +HAL_ADC_GetError build/stm32f0xx_hal_adc.o +HAL_ADC_GetState build/stm32f0xx_hal_adc.o +HAL_ADC_GetValue build/stm32f0xx_hal_adc.o +HAL_ADC_IRQHandler build/stm32f0xx_hal_adc.o +HAL_ADC_Init build/stm32f0xx_hal_adc.o + build/main.o +HAL_ADC_LevelOutOfWindowCallback build/stm32f0xx_hal_adc.o +HAL_ADC_MspDeInit build/stm32f0xx_hal_msp.o +HAL_ADC_MspInit build/stm32f0xx_hal_msp.o +HAL_ADC_PollForConversion build/stm32f0xx_hal_adc.o +HAL_ADC_PollForEvent build/stm32f0xx_hal_adc.o +HAL_ADC_Start build/stm32f0xx_hal_adc.o +HAL_ADC_Start_DMA build/stm32f0xx_hal_adc.o + build/main.o +HAL_ADC_Start_IT build/stm32f0xx_hal_adc.o +HAL_ADC_Stop build/stm32f0xx_hal_adc.o +HAL_ADC_Stop_DMA build/stm32f0xx_hal_adc.o +HAL_ADC_Stop_IT build/stm32f0xx_hal_adc.o +HAL_DBGMCU_DisableDBGStandbyMode build/stm32f0xx_hal.o +HAL_DBGMCU_DisableDBGStopMode build/stm32f0xx_hal.o +HAL_DBGMCU_EnableDBGStandbyMode build/stm32f0xx_hal.o +HAL_DBGMCU_EnableDBGStopMode build/stm32f0xx_hal.o +HAL_DMA_Abort build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_adc.o +HAL_DMA_Abort_IT build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_i2c.o +HAL_DMA_DeInit build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_msp.o +HAL_DMA_GetError build/stm32f0xx_hal_dma.o +HAL_DMA_GetState build/stm32f0xx_hal_dma.o +HAL_DMA_IRQHandler build/stm32f0xx_hal_dma.o + build/stm32f0xx_it.o +HAL_DMA_Init build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_msp.o +HAL_DMA_PollForTransfer build/stm32f0xx_hal_dma.o +HAL_DMA_RegisterCallback build/stm32f0xx_hal_dma.o +HAL_DMA_Start build/stm32f0xx_hal_dma.o +HAL_DMA_Start_IT build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_i2c.o + build/stm32f0xx_hal_adc.o +HAL_DMA_UnRegisterCallback build/stm32f0xx_hal_dma.o +HAL_DeInit build/stm32f0xx_hal.o +HAL_Delay build/stm32f0xx_hal.o + build/usbd_conf.o + build/stm32f0xx_hal_pcd_ex.o + build/main.o +HAL_EXTI_ClearConfigLine build/stm32f0xx_hal_exti.o +HAL_EXTI_ClearPending build/stm32f0xx_hal_exti.o +HAL_EXTI_GenerateSWI build/stm32f0xx_hal_exti.o +HAL_EXTI_GetConfigLine build/stm32f0xx_hal_exti.o +HAL_EXTI_GetHandle build/stm32f0xx_hal_exti.o +HAL_EXTI_GetPending build/stm32f0xx_hal_exti.o +HAL_EXTI_IRQHandler build/stm32f0xx_hal_exti.o +HAL_EXTI_RegisterCallback build/stm32f0xx_hal_exti.o +HAL_EXTI_SetConfigLine build/stm32f0xx_hal_exti.o +HAL_FLASHEx_Erase build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_Erase_IT build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_OBErase build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_OBGetConfig build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_OBGetUserData build/stm32f0xx_hal_flash_ex.o +HAL_FLASHEx_OBProgram build/stm32f0xx_hal_flash_ex.o +HAL_FLASH_EndOfOperationCallback build/stm32f0xx_hal_flash.o +HAL_FLASH_GetError build/stm32f0xx_hal_flash.o +HAL_FLASH_IRQHandler build/stm32f0xx_hal_flash.o +HAL_FLASH_Lock build/stm32f0xx_hal_flash.o +HAL_FLASH_OB_Launch build/stm32f0xx_hal_flash.o +HAL_FLASH_OB_Lock build/stm32f0xx_hal_flash.o +HAL_FLASH_OB_Unlock build/stm32f0xx_hal_flash.o +HAL_FLASH_OperationErrorCallback build/stm32f0xx_hal_flash.o +HAL_FLASH_Program build/stm32f0xx_hal_flash.o +HAL_FLASH_Program_IT build/stm32f0xx_hal_flash.o +HAL_FLASH_Unlock build/stm32f0xx_hal_flash.o +HAL_GPIO_DeInit build/stm32f0xx_hal_gpio.o + build/stm32f0xx_hal_msp.o +HAL_GPIO_EXTI_Callback build/stm32f0xx_hal_gpio.o +HAL_GPIO_EXTI_IRQHandler build/stm32f0xx_hal_gpio.o +HAL_GPIO_Init build/stm32f0xx_hal_gpio.o + build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_msp.o + build/main.o +HAL_GPIO_LockPin build/stm32f0xx_hal_gpio.o +HAL_GPIO_ReadPin build/stm32f0xx_hal_gpio.o +HAL_GPIO_TogglePin build/stm32f0xx_hal_gpio.o +HAL_GPIO_WritePin build/stm32f0xx_hal_gpio.o + build/main.o +HAL_GetDEVID build/stm32f0xx_hal.o +HAL_GetHalVersion build/stm32f0xx_hal.o +HAL_GetREVID build/stm32f0xx_hal.o +HAL_GetTick build/stm32f0xx_hal.o + build/stm32f0xx_hal_pcd_ex.o + build/stm32f0xx_hal_flash.o + build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal_i2c.o + build/stm32f0xx_hal_rcc_ex.o + build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_adc_ex.o + build/stm32f0xx_hal_adc.o +HAL_GetTickFreq build/stm32f0xx_hal.o +HAL_GetTickPrio build/stm32f0xx_hal.o +HAL_GetUIDw0 build/stm32f0xx_hal.o +HAL_GetUIDw1 build/stm32f0xx_hal.o +HAL_GetUIDw2 build/stm32f0xx_hal.o +HAL_I2CEx_ConfigAnalogFilter build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_ConfigDigitalFilter build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_DisableFastModePlus build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_DisableWakeUp build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_EnableFastModePlus build/stm32f0xx_hal_i2c_ex.o +HAL_I2CEx_EnableWakeUp build/stm32f0xx_hal_i2c_ex.o +HAL_I2C_AbortCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_AddrCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_DeInit build/stm32f0xx_hal_i2c.o +HAL_I2C_DisableListen_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_ER_IRQHandler build/stm32f0xx_hal_i2c.o +HAL_I2C_EV_IRQHandler build/stm32f0xx_hal_i2c.o +HAL_I2C_EnableListen_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_ErrorCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_GetError build/stm32f0xx_hal_i2c.o +HAL_I2C_GetMode build/stm32f0xx_hal_i2c.o +HAL_I2C_GetState build/stm32f0xx_hal_i2c.o +HAL_I2C_Init build/stm32f0xx_hal_i2c.o +HAL_I2C_IsDeviceReady build/stm32f0xx_hal_i2c.o +HAL_I2C_ListenCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_MasterRxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_MasterTxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Abort_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Receive build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Receive_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Receive_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Seq_Receive_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Seq_Receive_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Seq_Transmit_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Seq_Transmit_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Transmit build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Transmit_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Master_Transmit_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_MemRxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_MemTxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Read build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Read_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Read_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Write build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Write_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Mem_Write_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_MspDeInit build/stm32f0xx_hal_i2c.o +HAL_I2C_MspInit build/stm32f0xx_hal_i2c.o +HAL_I2C_SlaveRxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_SlaveTxCpltCallback build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Receive build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Receive_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Receive_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Seq_Receive_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Seq_Receive_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Seq_Transmit_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Seq_Transmit_IT build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Transmit build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Transmit_DMA build/stm32f0xx_hal_i2c.o +HAL_I2C_Slave_Transmit_IT build/stm32f0xx_hal_i2c.o +HAL_IncTick build/stm32f0xx_hal.o + build/stm32f0xx_it.o +HAL_Init build/stm32f0xx_hal.o + build/main.o +HAL_InitTick build/stm32f0xx_hal.o + build/stm32f0xx_hal_rcc.o +HAL_MspDeInit build/stm32f0xx_hal.o +HAL_MspInit build/stm32f0xx_hal_msp.o +HAL_NVIC_ClearPendingIRQ build/stm32f0xx_hal_cortex.o +HAL_NVIC_DisableIRQ build/stm32f0xx_hal_cortex.o + build/usbd_conf.o +HAL_NVIC_EnableIRQ build/stm32f0xx_hal_cortex.o + build/usbd_conf.o + build/main.o +HAL_NVIC_GetPendingIRQ build/stm32f0xx_hal_cortex.o +HAL_NVIC_GetPriority build/stm32f0xx_hal_cortex.o +HAL_NVIC_SetPendingIRQ build/stm32f0xx_hal_cortex.o +HAL_NVIC_SetPriority build/stm32f0xx_hal_cortex.o + build/usbd_conf.o + build/stm32f0xx_hal.o + build/main.o +HAL_NVIC_SystemReset build/stm32f0xx_hal_cortex.o +HAL_PCDEx_ActivateBCD build/stm32f0xx_hal_pcd_ex.o +HAL_PCDEx_ActivateLPM build/stm32f0xx_hal_pcd_ex.o + build/stm32f0xx_hal_pcd.o +HAL_PCDEx_BCD_Callback build/stm32f0xx_hal_pcd_ex.o +HAL_PCDEx_BCD_VBUSDetect build/stm32f0xx_hal_pcd_ex.o +HAL_PCDEx_DeActivateBCD build/stm32f0xx_hal_pcd_ex.o +HAL_PCDEx_DeActivateLPM build/stm32f0xx_hal_pcd_ex.o +HAL_PCDEx_LPM_Callback build/stm32f0xx_hal_pcd_ex.o + build/stm32f0xx_hal_pcd.o +HAL_PCDEx_PMAConfig build/stm32f0xx_hal_pcd_ex.o + build/usbd_conf.o +HAL_PCDEx_SetConnectionState build/usbd_conf.o +HAL_PCD_ActivateRemoteWakeup build/stm32f0xx_hal_pcd.o +HAL_PCD_ConnectCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_DataInStageCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_DataOutStageCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_DeActivateRemoteWakeup build/stm32f0xx_hal_pcd.o +HAL_PCD_DeInit build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_DevConnect build/stm32f0xx_hal_pcd.o +HAL_PCD_DevDisconnect build/stm32f0xx_hal_pcd.o +HAL_PCD_DisconnectCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_EP_Close build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_EP_ClrStall build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_EP_Flush build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_EP_GetRxCount build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_EP_Open build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_EP_Receive build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_EP_SetStall build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_EP_Transmit build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_GetState build/stm32f0xx_hal_pcd.o +HAL_PCD_IRQHandler build/stm32f0xx_hal_pcd.o + build/stm32f0xx_it.o +HAL_PCD_ISOINIncompleteCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_ISOOUTIncompleteCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_Init build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_MspDeInit build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_MspInit build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_ResetCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_ResumeCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_SOFCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_SetAddress build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_SetupStageCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PCD_Start build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_Stop build/stm32f0xx_hal_pcd.o + build/usbd_conf.o +HAL_PCD_SuspendCallback build/usbd_conf.o + build/stm32f0xx_hal_pcd.o +HAL_PWREx_DisableVddio2Monitor build/stm32f0xx_hal_pwr_ex.o +HAL_PWREx_EnableVddio2Monitor build/stm32f0xx_hal_pwr_ex.o +HAL_PWREx_Vddio2MonitorCallback build/stm32f0xx_hal_pwr_ex.o +HAL_PWREx_Vddio2Monitor_IRQHandler build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_ConfigPVD build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_DeInit build/stm32f0xx_hal_pwr.o +HAL_PWR_DisableBkUpAccess build/stm32f0xx_hal_pwr.o +HAL_PWR_DisablePVD build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_DisableSEVOnPend build/stm32f0xx_hal_pwr.o +HAL_PWR_DisableSleepOnExit build/stm32f0xx_hal_pwr.o +HAL_PWR_DisableWakeUpPin build/stm32f0xx_hal_pwr.o +HAL_PWR_EnableBkUpAccess build/stm32f0xx_hal_pwr.o +HAL_PWR_EnablePVD build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_EnableSEVOnPend build/stm32f0xx_hal_pwr.o +HAL_PWR_EnableSleepOnExit build/stm32f0xx_hal_pwr.o +HAL_PWR_EnableWakeUpPin build/stm32f0xx_hal_pwr.o +HAL_PWR_EnterSLEEPMode build/stm32f0xx_hal_pwr.o +HAL_PWR_EnterSTANDBYMode build/stm32f0xx_hal_pwr.o +HAL_PWR_EnterSTOPMode build/stm32f0xx_hal_pwr.o +HAL_PWR_PVDCallback build/stm32f0xx_hal_pwr_ex.o +HAL_PWR_PVD_IRQHandler build/stm32f0xx_hal_pwr_ex.o +HAL_RCCEx_CRSConfig build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRSGetSynchronizationInfo build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRSSoftwareSynchronizationGenerate build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRSWaitSynchronization build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_ErrorCallback build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_ExpectedSyncCallback build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_IRQHandler build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_SyncOkCallback build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_CRS_SyncWarnCallback build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_GetPeriphCLKConfig build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_GetPeriphCLKFreq build/stm32f0xx_hal_rcc_ex.o +HAL_RCCEx_PeriphCLKConfig build/stm32f0xx_hal_rcc_ex.o + build/main.o +HAL_RCC_CSSCallback build/stm32f0xx_hal_rcc.o +HAL_RCC_ClockConfig build/stm32f0xx_hal_rcc.o + build/main.o +HAL_RCC_DeInit build/stm32f0xx_hal_rcc.o +HAL_RCC_DisableCSS build/stm32f0xx_hal_rcc.o +HAL_RCC_EnableCSS build/stm32f0xx_hal_rcc.o +HAL_RCC_GetClockConfig build/stm32f0xx_hal_rcc.o +HAL_RCC_GetHCLKFreq build/stm32f0xx_hal_rcc.o +HAL_RCC_GetOscConfig build/stm32f0xx_hal_rcc.o +HAL_RCC_GetPCLK1Freq build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_rcc_ex.o +HAL_RCC_GetSysClockFreq build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_rcc_ex.o +HAL_RCC_MCOConfig build/stm32f0xx_hal_rcc.o +HAL_RCC_NMI_IRQHandler build/stm32f0xx_hal_rcc.o +HAL_RCC_OscConfig build/stm32f0xx_hal_rcc.o + build/main.o +HAL_ResumeTick build/stm32f0xx_hal.o +HAL_SYSTICK_CLKSourceConfig build/stm32f0xx_hal_cortex.o +HAL_SYSTICK_Callback build/stm32f0xx_hal_cortex.o +HAL_SYSTICK_Config build/stm32f0xx_hal_cortex.o + build/stm32f0xx_hal.o +HAL_SYSTICK_IRQHandler build/stm32f0xx_hal_cortex.o +HAL_SetTickFreq build/stm32f0xx_hal.o +HAL_SuspendTick build/stm32f0xx_hal.o +HardFault_Handler build/stm32f0xx_it.o +I2C1_IRQHandler build/startup_stm32f072xb.o +I2C2_IRQHandler build/startup_stm32f072xb.o +MX_USB_DEVICE_Init build/usb_device.o +MX_USB_MIDI_INIT build/usb_device.o + build/main.o +NMI_Handler build/stm32f0xx_it.o +PVD_VDDIO2_IRQHandler build/startup_stm32f072xb.o +PendSV_Handler build/stm32f0xx_it.o +RCC_CRS_IRQHandler build/startup_stm32f072xb.o +RTC_IRQHandler build/startup_stm32f072xb.o +Reset_Handler build/startup_stm32f072xb.o +SPI1_IRQHandler build/startup_stm32f072xb.o +SPI2_IRQHandler build/startup_stm32f072xb.o +SVC_Handler build/stm32f0xx_it.o +SysTick_Handler build/stm32f0xx_it.o +SystemClock_Config build/main.o +SystemCoreClock build/system_stm32f0xx.o + build/stm32f0xx_hal.o + build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_adc.o +SystemCoreClockUpdate build/system_stm32f0xx.o +SystemInit build/system_stm32f0xx.o + build/startup_stm32f072xb.o +TIM14_IRQHandler build/startup_stm32f072xb.o +TIM15_IRQHandler build/startup_stm32f072xb.o +TIM16_IRQHandler build/startup_stm32f072xb.o +TIM17_IRQHandler build/startup_stm32f072xb.o +TIM1_BRK_UP_TRG_COM_IRQHandler build/startup_stm32f072xb.o +TIM1_CC_IRQHandler build/startup_stm32f072xb.o +TIM2_IRQHandler build/startup_stm32f072xb.o +TIM3_IRQHandler build/startup_stm32f072xb.o +TIM6_DAC_IRQHandler build/startup_stm32f072xb.o +TIM7_IRQHandler build/startup_stm32f072xb.o +TSC_IRQHandler build/startup_stm32f072xb.o +USART1_IRQHandler build/startup_stm32f072xb.o +USART2_IRQHandler build/startup_stm32f072xb.o +USART3_4_IRQHandler build/startup_stm32f072xb.o +USBD_ClrClassConfig build/usbd_core.o + build/usbd_ctlreq.o +USBD_CtlContinueRx build/usbd_ioreq.o + build/usbd_core.o +USBD_CtlContinueSendData build/usbd_ioreq.o + build/usbd_core.o +USBD_CtlError build/usbd_ctlreq.o +USBD_CtlPrepareRx build/usbd_ioreq.o +USBD_CtlReceiveStatus build/usbd_ioreq.o + build/usbd_core.o +USBD_CtlSendData build/usbd_ioreq.o + build/usbd_ctlreq.o +USBD_CtlSendStatus build/usbd_ioreq.o + build/usbd_ctlreq.o + build/usbd_core.o +USBD_DeInit build/usbd_core.o +USBD_FS_ConfigStrDescriptor build/usbd_desc.o +USBD_FS_DeviceDesc build/usbd_desc.o +USBD_FS_DeviceDescriptor build/usbd_desc.o +USBD_FS_InterfaceStrDescriptor build/usbd_desc.o +USBD_FS_LangIDStrDescriptor build/usbd_desc.o +USBD_FS_ManufacturerStrDescriptor build/usbd_desc.o +USBD_FS_ProductStrDescriptor build/usbd_desc.o +USBD_FS_SerialStrDescriptor build/usbd_desc.o +USBD_GetRxCount build/usbd_ioreq.o +USBD_GetString build/usbd_ctlreq.o + build/usbd_desc.o +USBD_Init build/usbd_core.o + build/usb_device.o +USBD_Interface_fops_FS build/usbd_midi_if.o + build/usb_device.o +USBD_LL_ClearStallEP build/usbd_conf.o + build/usbd_ctlreq.o +USBD_LL_CloseEP build/usbd_conf.o + build/usbd_midi.o +USBD_LL_DataInStage build/usbd_core.o + build/usbd_conf.o +USBD_LL_DataOutStage build/usbd_core.o + build/usbd_conf.o +USBD_LL_DeInit build/usbd_conf.o + build/usbd_core.o +USBD_LL_Delay build/usbd_conf.o +USBD_LL_DevConnected build/usbd_core.o + build/usbd_conf.o +USBD_LL_DevDisconnected build/usbd_core.o + build/usbd_conf.o +USBD_LL_FlushEP build/usbd_conf.o +USBD_LL_GetRxDataSize build/usbd_conf.o + build/usbd_ioreq.o +USBD_LL_Init build/usbd_conf.o + build/usbd_core.o +USBD_LL_IsStallEP build/usbd_conf.o + build/usbd_ctlreq.o +USBD_LL_IsoINIncomplete build/usbd_core.o + build/usbd_conf.o +USBD_LL_IsoOUTIncomplete build/usbd_core.o + build/usbd_conf.o +USBD_LL_OpenEP build/usbd_conf.o + build/usbd_midi.o + build/usbd_core.o +USBD_LL_PrepareReceive build/usbd_conf.o + build/usbd_midi.o + build/usbd_ioreq.o + build/usbd_core.o +USBD_LL_Reset build/usbd_core.o + build/usbd_conf.o +USBD_LL_Resume build/usbd_core.o + build/usbd_conf.o +USBD_LL_SOF build/usbd_core.o + build/usbd_conf.o +USBD_LL_SetSpeed build/usbd_core.o + build/usbd_conf.o +USBD_LL_SetUSBAddress build/usbd_conf.o + build/usbd_ctlreq.o +USBD_LL_SetupStage build/usbd_core.o + build/usbd_conf.o +USBD_LL_StallEP build/usbd_conf.o + build/usbd_ctlreq.o + build/usbd_core.o +USBD_LL_Start build/usbd_conf.o + build/usbd_core.o +USBD_LL_Stop build/usbd_conf.o + build/usbd_core.o +USBD_LL_Suspend build/usbd_core.o + build/usbd_conf.o +USBD_LL_Transmit build/usbd_conf.o + build/usbd_midi.o + build/usbd_ioreq.o +USBD_LangIDDesc build/usbd_desc.o +USBD_MIDI build/usbd_midi.o + build/usb_device.o +USBD_MIDI_CfgDesc build/usbd_midi.o +USBD_MIDI_RegisterInterface build/usbd_midi.o + build/usb_device.o +USBD_MIDI_SendPacket build/usbd_midi.o + build/usbd_midi_if.o + build/main.o +USBD_ParseSetupRequest build/usbd_ctlreq.o + build/usbd_core.o +USBD_RegisterClass build/usbd_core.o + build/usb_device.o +USBD_RunTestMode build/usbd_core.o +USBD_SetClassConfig build/usbd_core.o + build/usbd_ctlreq.o +USBD_Start build/usbd_core.o + build/usb_device.o +USBD_StdDevReq build/usbd_ctlreq.o + build/usbd_core.o +USBD_StdEPReq build/usbd_ctlreq.o + build/usbd_core.o +USBD_StdItfReq build/usbd_ctlreq.o + build/usbd_core.o +USBD_Stop build/usbd_core.o +USBD_StrDesc build/usbd_desc.o +USBD_static_free build/usbd_conf.o +USB_ActivateEndpoint build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_ActivateRemoteWakeup build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_ClearInterrupts build/stm32f0xx_ll_usb.o +USB_CoreInit build/stm32f0xx_ll_usb.o +USB_DeActivateRemoteWakeup build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_DeactivateEndpoint build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_DevConnect build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_DevDisconnect build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_DevInit build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_DisableGlobalInt build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_EP0_OutStart build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_EPClearStall build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_EPSetStall build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_EPStartXfer build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_EnableGlobalInt build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_FlushRxFifo build/stm32f0xx_ll_usb.o +USB_FlushTxFifo build/stm32f0xx_ll_usb.o +USB_IRQHandler build/stm32f0xx_it.o +USB_ReadDevAllInEpInterrupt build/stm32f0xx_ll_usb.o +USB_ReadDevAllOutEpInterrupt build/stm32f0xx_ll_usb.o +USB_ReadDevInEPInterrupt build/stm32f0xx_ll_usb.o +USB_ReadDevOutEPInterrupt build/stm32f0xx_ll_usb.o +USB_ReadInterrupts build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_ReadPMA build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_ReadPacket build/stm32f0xx_ll_usb.o +USB_Rx_Buffer build/usbd_midi.o +USB_SetCurrentMode build/stm32f0xx_ll_usb.o +USB_SetDevAddress build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_SetDevSpeed build/stm32f0xx_ll_usb.o +USB_StopDevice build/stm32f0xx_ll_usb.o + build/stm32f0xx_hal_pcd.o +USB_Tx_State build/usbd_midi.o +USB_WritePMA build/stm32f0xx_ll_usb.o +USB_WritePacket build/stm32f0xx_ll_usb.o +WWDG_IRQHandler build/startup_stm32f072xb.o +_ITM_deregisterTMCloneTable /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o +_ITM_registerTMCloneTable /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o +__TMC_END__ /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtend.o + /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o +__aeabi_idiv0 /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_dvmd_tls.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_udivsi3.o) +__aeabi_ldiv0 /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_dvmd_tls.o) +__aeabi_uidiv /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_udivsi3.o) + build/system_stm32f0xx.o + build/stm32f0xx_hal_dma.o + build/stm32f0xx_hal.o + build/stm32f0xx_hal_rcc_ex.o + build/stm32f0xx_hal_rcc.o + build/stm32f0xx_hal_adc.o + build/main.o +__aeabi_uidivmod /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_udivsi3.o) + build/usbd_core.o +__atexit_dummy /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__atexit.o) +__bss_end__ /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +__bss_start__ /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +__call_exitprocs /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__call_atexit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__atexit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-exit.o) +__deregister_frame_info /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o +__dso_handle /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o +__fini_array_end /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-fini.o) +__fini_array_start /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-fini.o) +__init_array_end /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) +__init_array_start /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) +__libc_fini_array /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-fini.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +__libc_init_array /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) + build/startup_stm32f072xb.o + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +__malloc_free_list /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) +__malloc_lock /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-mlock.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) +__malloc_sbrk_start /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) +__malloc_unlock /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-mlock.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) +__on_exit_args /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__atexit.o) +__preinit_array_end /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) +__preinit_array_start /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) +__register_exitproc /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__atexit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-atexit.o) +__register_frame_info /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crtbegin.o +__sf_fake_stderr /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-impure.o) +__sf_fake_stdin /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-impure.o) +__sf_fake_stdout /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-impure.o) +__stack /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +__udivsi3 /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/libgcc.a(_udivsi3.o) +_cureRingBufferU8GetUsedSize build/curebuffer.o + build/usbd_midi_if.o +_ebss build/startup_stm32f072xb.o +_edata build/startup_stm32f072xb.o +_estack build/startup_stm32f072xb.o +_exit /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libnosys.a(_exit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-exit.o) +_fini /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-fini.o) +_free_r /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-freer.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) +_global_atexit /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__call_atexit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__atexit.o) +_global_impure_ptr /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-impure.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-exit.o) +_impure_ptr /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-impure.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) +_init /usr/lib/gcc/arm-none-eabi/7.3.1/thumb/v6-m/crti.o + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-init.o) +_mainCRTStartup /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +_malloc_r /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) +_reclaim_reent /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) +_sbrk /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libnosys.a(sbrk.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-sbrkr.o) +_sbrk_r /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-sbrkr.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-nano-mallocr.o) +_sbss build/startup_stm32f072xb.o +_sdata build/startup_stm32f072xb.o +_sidata build/startup_stm32f072xb.o +_start /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +analyzed_status build/usbd_midi_if.o +atexit /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-atexit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +cleanup_glue /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) +cureRingBuffer16Dequeue build/curebuffer.o +cureRingBuffer16Enqueue build/curebuffer.o +cureRingBuffer16EnqueueIgnoreErr build/curebuffer.o +cureRingBuffer16Free build/curebuffer.o +cureRingBuffer16GetElement build/curebuffer.o +cureRingBuffer16Init build/curebuffer.o +cureRingBufferU32Dequeue build/curebuffer.o +cureRingBufferU32Enqueue build/curebuffer.o +cureRingBufferU32EnqueueIgnoreErr build/curebuffer.o +cureRingBufferU32Free build/curebuffer.o +cureRingBufferU32GetElement build/curebuffer.o +cureRingBufferU32Init build/curebuffer.o +cureRingBufferU8Dequeue build/curebuffer.o + build/usbd_midi_if.o +cureRingBufferU8Enqueue build/curebuffer.o + build/usbd_midi_if.o +cureRingBufferU8Free build/curebuffer.o +cureRingBufferU8Init build/curebuffer.o + build/usbd_midi_if.o +dial build/main.o +dial_div build/main.o +dial_mapping build/main.o +end /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libnosys.a(sbrk.o) +errno /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-reent.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-sbrkr.o) +exit /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-exit.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +free /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) + build/curebuffer.o +g_pfnVectors build/startup_stm32f072xb.o +hUsbDeviceFS build/usb_device.o + build/main.o +hadc build/main.o +hardware_init_hook /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +hdma_adc build/main.o + build/stm32f0xx_hal_msp.o + build/stm32f0xx_it.o +hpcd_USB_FS build/usbd_conf.o + build/main.o + build/stm32f0xx_it.o +isJackRxBufEmpty build/usbd_midi_if.o +isRxBufEmpty build/usbd_midi_if.o +isUsbRxBufEmpty build/usbd_midi_if.o +main build/main.o + build/startup_stm32f072xb.o + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +malloc /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-malloc.o) + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-__atexit.o) + build/curebuffer.o +memset /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/libc_nano.a(lib_a-memset.o) + build/stm32f0xx_hal_msp.o + build/main.o + /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +midiEventIsGenerated build/usbd_midi_if.o +midiGenerateUsbPacket build/usbd_midi_if.o +midiGetFromJackRx build/usbd_midi_if.o +midiGetFromUsbRx build/usbd_midi_if.o +midiInit build/usbd_midi_if.o + build/main.o +midiProcess build/usbd_midi_if.o + build/main.o +midiSetFromJackRx build/usbd_midi_if.o +midi_event build/usbd_midi_if.o +midi_packet build/main.o +pFlash build/stm32f0xx_hal_flash.o + build/stm32f0xx_hal_flash_ex.o +pInstance build/usbd_midi.o +rbuf_jack_rx build/usbd_midi_if.o +rbuf_usb_rx build/usbd_midi_if.o +rx_midi_msg build/usbd_midi_if.o +sendMidiMessage build/usbd_midi_if.o + build/main.o +software_init_hook /usr/lib/gcc/arm-none-eabi/7.3.1/../../../arm-none-eabi/lib/thumb/v6-m/crt0.o +uwTick build/stm32f0xx_hal.o +uwTickFreq build/stm32f0xx_hal.o +uwTickPrio build/stm32f0xx_hal.o + build/stm32f0xx_hal_rcc.o diff --git a/fw/midi-dials/build/startup_stm32f072xb.d b/fw/midi-dials/build/startup_stm32f072xb.d new file mode 100644 index 0000000..1c25e32 --- /dev/null +++ b/fw/midi-dials/build/startup_stm32f072xb.d @@ -0,0 +1 @@ +build/startup_stm32f072xb.o: startup_stm32f072xb.s diff --git a/fw/midi-dials/build/startup_stm32f072xb.o b/fw/midi-dials/build/startup_stm32f072xb.o Binary files differnew file mode 100644 index 0000000..e3e308e --- /dev/null +++ b/fw/midi-dials/build/startup_stm32f072xb.o diff --git a/fw/midi-dials/build/stm32f0xx_hal.d b/fw/midi-dials/build/stm32f0xx_hal.d new file mode 100644 index 0000000..158a9a5 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal.d @@ -0,0 +1,86 @@ +build/stm32f0xx_hal.o: Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal.lst b/fw/midi-dials/build/stm32f0xx_hal.lst new file mode 100644 index 0000000..9f4a7b1 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal.lst @@ -0,0 +1,1454 @@ +ARM GAS /tmp/ccZrwUTS.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_MspInit,"ax",%progbits + 16 .align 1 + 17 .weak HAL_MspInit + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_MspInit: + 24 .LFB42: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @file stm32f0xx_hal.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * This is the common part of the HAL initialization + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @verbatim + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ============================================================================== + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ##### How to use this driver ##### + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ============================================================================== + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** The common HAL driver contains a set of generic and common APIs that can be + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** used by the PPP peripheral drivers and the user to start using the HAL. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** The HAL contains two APIs categories: + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) HAL Initialization and de-initialization functions + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) HAL Control functions + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @endverbatim + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @attention + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * All rights reserved.</center></h2> + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * This software component is licensed by ST under BSD 3-Clause license, + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * the "License"; You may not use this file except in compliance with the + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * License. You may obtain a copy of the License at: + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * opensource.org/licenses/BSD-3-Clause + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ****************************************************************************** + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + ARM GAS /tmp/ccZrwUTS.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Includes ------------------------------------------------------------------*/ + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #include "stm32f0xx_hal.h" + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @addtogroup STM32F0xx_HAL_Driver + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL HAL + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief HAL module driver. + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #ifdef HAL_MODULE_ENABLED + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private typedef -----------------------------------------------------------*/ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private define ------------------------------------------------------------*/ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Private_Constants HAL Private Constants + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief STM32F0xx HAL Driver version number V1.7.3 + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_MAIN (0x01U) /*!< [31:24] main version */ + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_SUB1 (0x07U) /*!< [23:16] sub1 version */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_SUB2 (0x03U) /*!< [15:8] sub2 version */ + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION_RC (0x00U) /*!< [7:0] release candidate */ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define __STM32F0xx_HAL_VERSION ((__STM32F0xx_HAL_VERSION_MAIN << 24U)\ + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** |(__STM32F0xx_HAL_VERSION_SUB1 << 16U)\ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** |(__STM32F0xx_HAL_VERSION_SUB2 << 8U )\ + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** |(__STM32F0xx_HAL_VERSION_RC)) + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #define IDCODE_DEVID_MASK (0x00000FFFU) + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private macro -------------------------------------------------------------*/ + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Private_Macros HAL Private Macros + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Exported variables ---------------------------------------------------------*/ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Private_Variables HAL Exported Variables + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __IO uint32_t uwTick; + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t uwTickPrio = (1UL << __NVIC_PRIO_BITS); /* Invalid PRIO */ + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef uwTickFreq = HAL_TICK_FREQ_DEFAULT; /* 1KHz */ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Private function prototypes -----------------------------------------------*/ + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Exported functions ---------------------------------------------------------*/ + ARM GAS /tmp/ccZrwUTS.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Exported_Functions HAL Exported Functions + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Initialization and de-initialization functions + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @verbatim + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ##### Initialization and de-initialization functions ##### + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] This section provides functions allowing to: + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Initializes the Flash interface, the NVIC allocation and initial clock + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** configuration. It initializes the systick also when timeout is needed + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** and the backup domain when enabled. + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) de-Initializes common part of the HAL. + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Configure The time base source to have 1ms time base with a dedicated + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** Tick interrupt priority. + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) SysTick timer is used by default as source of time base, but user + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** can eventually implement his proper time base source (a general purpose + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** timer for example or other time source), keeping in mind that Time base + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** duration should be kept 1ms since PPP_TIMEOUT_VALUEs are defined and + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** handled in milliseconds basis. + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) Time base configuration function (HAL_InitTick ()) is called automatically + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** at the beginning of the program after reset by HAL_Init() or at any time + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** when clock is configured, by HAL_RCC_ClockConfig(). + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) Source of time base is configured to generate interrupts at regular + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** time intervals. Care must be taken if HAL_Delay() is called from a + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** peripheral ISR process, the Tick interrupt line must have higher priority + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (numerically lower) than the peripheral interrupt. Otherwise the caller + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ISR process will be blocked. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (++) functions affecting time base configurations are declared as __Weak + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** to make override possible in case of other implementations in user file. + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @endverbatim + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function configures the Flash prefetch, + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Configures time base source, NVIC and Low level hardware + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is called at the beginning of program after reset and before + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * the clock configuration + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note The time base configuration is based on HSI clock when exiting from Reset. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Once done, time base tick start incrementing. + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * In the default implementation,Systick is used as source of time base. + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The tick variable is incremented each 1ms in its ISR. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval HAL status + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef HAL_Init(void) + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Configure Flash prefetch */ + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #if (PREFETCH_ENABLE != 0) + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #endif /* PREFETCH_ENABLE */ + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + ARM GAS /tmp/ccZrwUTS.s page 4 + + + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_InitTick(TICK_INT_PRIORITY); + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Init the low level hardware */ + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_MspInit(); + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Return function status */ + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_OK; + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function de-Initialize common part of the HAL and stops the SysTick + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * of time base. + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is optional. + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval HAL status + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef HAL_DeInit(void) + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Reset of all peripherals */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB1_FORCE_RESET(); + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB2_FORCE_RESET(); + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_AHB_FORCE_RESET(); + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* De-Init the low level hardware */ + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_MspDeInit(); + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Return function status */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_OK; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Initialize the MSP. + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_MspInit(void) + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 26 .loc 1 189 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed, + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** the HAL_MspInit could be implemented in the user file + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 31 .loc 1 193 0 + 32 @ sp needed + 33 0000 7047 bx lr + 34 .cfi_endproc + 35 .LFE42: + 37 .section .text.HAL_MspDeInit,"ax",%progbits + ARM GAS /tmp/ccZrwUTS.s page 5 + + + 38 .align 1 + 39 .weak HAL_MspDeInit + 40 .syntax unified + 41 .code 16 + 42 .thumb_func + 43 .fpu softvfp + 45 HAL_MspDeInit: + 46 .LFB43: + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief DeInitializes the MSP. + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_MspDeInit(void) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 47 .loc 1 200 0 + 48 .cfi_startproc + 49 @ args = 0, pretend = 0, frame = 0 + 50 @ frame_needed = 0, uses_anonymous_args = 0 + 51 @ link register save eliminated. + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* NOTE : This function should not be modified, when the callback is needed, + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** the HAL_MspDeInit could be implemented in the user file + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 52 .loc 1 204 0 + 53 @ sp needed + 54 0000 7047 bx lr + 55 .cfi_endproc + 56 .LFE43: + 58 .section .text.HAL_DeInit,"ax",%progbits + 59 .align 1 + 60 .global HAL_DeInit + 61 .syntax unified + 62 .code 16 + 63 .thumb_func + 64 .fpu softvfp + 66 HAL_DeInit: + 67 .LFB41: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Reset of all peripherals */ + 68 .loc 1 166 0 + 69 .cfi_startproc + 70 @ args = 0, pretend = 0, frame = 0 + 71 @ frame_needed = 0, uses_anonymous_args = 0 + 72 0000 10B5 push {r4, lr} + 73 .LCFI0: + 74 .cfi_def_cfa_offset 8 + 75 .cfi_offset 4, -8 + 76 .cfi_offset 14, -4 + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET(); + 77 .loc 1 168 0 + 78 0002 074B ldr r3, .L4 + 79 0004 0121 movs r1, #1 + 80 0006 4942 rsbs r1, r1, #0 + 81 0008 1961 str r1, [r3, #16] + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 82 .loc 1 169 0 + 83 000a 0022 movs r2, #0 + ARM GAS /tmp/ccZrwUTS.s page 6 + + + 84 000c 1A61 str r2, [r3, #16] + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_APB2_RELEASE_RESET(); + 85 .loc 1 171 0 + 86 000e D960 str r1, [r3, #12] + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 87 .loc 1 172 0 + 88 0010 DA60 str r2, [r3, #12] + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __HAL_RCC_AHB_RELEASE_RESET(); + 89 .loc 1 174 0 + 90 0012 9962 str r1, [r3, #40] + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 91 .loc 1 175 0 + 92 0014 9A62 str r2, [r3, #40] + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 93 .loc 1 178 0 + 94 0016 FFF7FEFF bl HAL_MspDeInit + 95 .LVL0: + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 96 .loc 1 182 0 + 97 001a 0020 movs r0, #0 + 98 @ sp needed + 99 001c 10BD pop {r4, pc} + 100 .L5: + 101 001e C046 .align 2 + 102 .L4: + 103 0020 00100240 .word 1073876992 + 104 .cfi_endproc + 105 .LFE41: + 107 .global __aeabi_uidiv + 108 .section .text.HAL_InitTick,"ax",%progbits + 109 .align 1 + 110 .weak HAL_InitTick + 111 .syntax unified + 112 .code 16 + 113 .thumb_func + 114 .fpu softvfp + 116 HAL_InitTick: + 117 .LFB44: + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function configures the source of the time base. + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The time source is configured to have 1ms time base with a dedicated + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Tick interrupt priority. + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is called automatically at the beginning of program after + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * reset by HAL_Init() or at any time when clock is reconfigured by HAL_RCC_ClockConfig(). + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation, SysTick timer is the source of time base. + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * It is used to generate interrupts at regular time intervals. + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * Care must be taken if HAL_Delay() is called from a peripheral ISR process, + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The SysTick interrupt must have higher priority (numerically lower) + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * than the peripheral interrupt. Otherwise the caller ISR process will be blocked. + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * The function is declared as __Weak to be overwritten in case of other + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementation in user file. + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @param TickPriority Tick interrupt priority. + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval HAL status + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + ARM GAS /tmp/ccZrwUTS.s page 7 + + + 118 .loc 1 223 0 + 119 .cfi_startproc + 120 @ args = 0, pretend = 0, frame = 0 + 121 @ frame_needed = 0, uses_anonymous_args = 0 + 122 .LVL1: + 123 0000 10B5 push {r4, lr} + 124 .LCFI1: + 125 .cfi_def_cfa_offset 8 + 126 .cfi_offset 4, -8 + 127 .cfi_offset 14, -4 + 128 0002 0400 movs r4, r0 + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /*Configure the SysTick to have interrupt in 1ms time basis*/ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U) + 129 .loc 1 225 0 + 130 0004 0F4B ldr r3, .L11 + 131 0006 1978 ldrb r1, [r3] + 132 0008 FA20 movs r0, #250 + 133 .LVL2: + 134 000a 8000 lsls r0, r0, #2 + 135 000c FFF7FEFF bl __aeabi_uidiv + 136 .LVL3: + 137 0010 0100 movs r1, r0 + 138 0012 0D4B ldr r3, .L11+4 + 139 0014 1868 ldr r0, [r3] + 140 0016 FFF7FEFF bl __aeabi_uidiv + 141 .LVL4: + 142 001a FFF7FEFF bl HAL_SYSTICK_Config + 143 .LVL5: + 144 001e 0028 cmp r0, #0 + 145 0020 0DD1 bne .L8 + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_ERROR; + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Configure the SysTick IRQ priority */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (TickPriority < (1UL << __NVIC_PRIO_BITS)) + 146 .loc 1 231 0 + 147 0022 032C cmp r4, #3 + 148 0024 01D9 bls .L10 + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U); + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickPrio = TickPriority; + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** else + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_ERROR; + 149 .loc 1 238 0 + 150 0026 0120 movs r0, #1 + 151 0028 0AE0 b .L7 + 152 .L10: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickPrio = TickPriority; + 153 .loc 1 233 0 + 154 002a 0130 adds r0, r0, #1 + 155 002c 0022 movs r2, #0 + 156 002e 2100 movs r1, r4 + 157 0030 4042 rsbs r0, r0, #0 + 158 0032 FFF7FEFF bl HAL_NVIC_SetPriority + ARM GAS /tmp/ccZrwUTS.s page 8 + + + 159 .LVL6: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 160 .loc 1 234 0 + 161 0036 054B ldr r3, .L11+8 + 162 0038 1C60 str r4, [r3] + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Return function status */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return HAL_OK; + 163 .loc 1 242 0 + 164 003a 0020 movs r0, #0 + 165 003c 00E0 b .L7 + 166 .L8: + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 167 .loc 1 227 0 + 168 003e 0120 movs r0, #1 + 169 .L7: + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 170 .loc 1 243 0 + 171 @ sp needed + 172 .LVL7: + 173 0040 10BD pop {r4, pc} + 174 .L12: + 175 0042 C046 .align 2 + 176 .L11: + 177 0044 00000000 .word .LANCHOR0 + 178 0048 00000000 .word SystemCoreClock + 179 004c 00000000 .word .LANCHOR1 + 180 .cfi_endproc + 181 .LFE44: + 183 .section .text.HAL_Init,"ax",%progbits + 184 .align 1 + 185 .global HAL_Init + 186 .syntax unified + 187 .code 16 + 188 .thumb_func + 189 .fpu softvfp + 191 HAL_Init: + 192 .LFB40: + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Configure Flash prefetch */ + 193 .loc 1 142 0 + 194 .cfi_startproc + 195 @ args = 0, pretend = 0, frame = 0 + 196 @ frame_needed = 0, uses_anonymous_args = 0 + 197 0000 10B5 push {r4, lr} + 198 .LCFI2: + 199 .cfi_def_cfa_offset 8 + 200 .cfi_offset 4, -8 + 201 .cfi_offset 14, -4 + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** #endif /* PREFETCH_ENABLE */ + 202 .loc 1 145 0 + 203 0002 064A ldr r2, .L14 + 204 0004 1368 ldr r3, [r2] + 205 0006 1021 movs r1, #16 + 206 0008 0B43 orrs r3, r1 + 207 000a 1360 str r3, [r2] + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + ARM GAS /tmp/ccZrwUTS.s page 9 + + + 208 .loc 1 150 0 + 209 000c 0020 movs r0, #0 + 210 000e FFF7FEFF bl HAL_InitTick + 211 .LVL8: + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 212 .loc 1 153 0 + 213 0012 FFF7FEFF bl HAL_MspInit + 214 .LVL9: + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 215 .loc 1 157 0 + 216 0016 0020 movs r0, #0 + 217 @ sp needed + 218 0018 10BD pop {r4, pc} + 219 .L15: + 220 001a C046 .align 2 + 221 .L14: + 222 001c 00200240 .word 1073881088 + 223 .cfi_endproc + 224 .LFE40: + 226 .section .text.HAL_IncTick,"ax",%progbits + 227 .align 1 + 228 .weak HAL_IncTick + 229 .syntax unified + 230 .code 16 + 231 .thumb_func + 232 .fpu softvfp + 234 HAL_IncTick: + 235 .LFB45: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @} + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group2 HAL Control functions + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief HAL Control functions + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @verbatim + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** ##### HAL Control functions ##### + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** =============================================================================== + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** [..] This section provides functions allowing to: + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Provide a tick value in millisecond + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Provide a blocking delay in millisecond + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Suspend the time base source interrupt + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Resume the time base source interrupt + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Get the HAL API driver version + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Get the device identifier + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Get the device revision identifier + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Enable/Disable Debug module during Sleep mode + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Enable/Disable Debug module during STOP mode + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** (+) Enable/Disable Debug module during STANDBY mode + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** @endverbatim + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @{ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + ARM GAS /tmp/ccZrwUTS.s page 10 + + + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function is called to increment a global variable "uwTick" + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * used as application time base. + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation, this variable is incremented each 1ms + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * in SysTick ISR. + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_IncTick(void) + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 236 .loc 1 282 0 + 237 .cfi_startproc + 238 @ args = 0, pretend = 0, frame = 0 + 239 @ frame_needed = 0, uses_anonymous_args = 0 + 240 @ link register save eliminated. + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTick += uwTickFreq; + 241 .loc 1 283 0 + 242 0000 034A ldr r2, .L17 + 243 0002 1168 ldr r1, [r2] + 244 0004 034B ldr r3, .L17+4 + 245 0006 1B78 ldrb r3, [r3] + 246 0008 5B18 adds r3, r3, r1 + 247 000a 1360 str r3, [r2] + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 248 .loc 1 284 0 + 249 @ sp needed + 250 000c 7047 bx lr + 251 .L18: + 252 000e C046 .align 2 + 253 .L17: + 254 0010 00000000 .word uwTick + 255 0014 00000000 .word .LANCHOR0 + 256 .cfi_endproc + 257 .LFE45: + 259 .section .text.HAL_GetTick,"ax",%progbits + 260 .align 1 + 261 .weak HAL_GetTick + 262 .syntax unified + 263 .code 16 + 264 .thumb_func + 265 .fpu softvfp + 267 HAL_GetTick: + 268 .LFB46: + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Provides a tick value in millisecond. + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval tick value + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak uint32_t HAL_GetTick(void) + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 269 .loc 1 293 0 + 270 .cfi_startproc + 271 @ args = 0, pretend = 0, frame = 0 + 272 @ frame_needed = 0, uses_anonymous_args = 0 + 273 @ link register save eliminated. + ARM GAS /tmp/ccZrwUTS.s page 11 + + + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return uwTick; + 274 .loc 1 294 0 + 275 0000 014B ldr r3, .L20 + 276 0002 1868 ldr r0, [r3] + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 277 .loc 1 295 0 + 278 @ sp needed + 279 0004 7047 bx lr + 280 .L21: + 281 0006 C046 .align 2 + 282 .L20: + 283 0008 00000000 .word uwTick + 284 .cfi_endproc + 285 .LFE46: + 287 .section .text.HAL_GetTickPrio,"ax",%progbits + 288 .align 1 + 289 .global HAL_GetTickPrio + 290 .syntax unified + 291 .code 16 + 292 .thumb_func + 293 .fpu softvfp + 295 HAL_GetTickPrio: + 296 .LFB47: + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function returns a tick priority. + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval tick priority + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetTickPrio(void) + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 297 .loc 1 302 0 + 298 .cfi_startproc + 299 @ args = 0, pretend = 0, frame = 0 + 300 @ frame_needed = 0, uses_anonymous_args = 0 + 301 @ link register save eliminated. + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return uwTickPrio; + 302 .loc 1 303 0 + 303 0000 014B ldr r3, .L23 + 304 0002 1868 ldr r0, [r3] + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 305 .loc 1 304 0 + 306 @ sp needed + 307 0004 7047 bx lr + 308 .L24: + 309 0006 C046 .align 2 + 310 .L23: + 311 0008 00000000 .word .LANCHOR1 + 312 .cfi_endproc + 313 .LFE47: + 315 .section .text.HAL_SetTickFreq,"ax",%progbits + 316 .align 1 + 317 .global HAL_SetTickFreq + 318 .syntax unified + 319 .code 16 + 320 .thumb_func + 321 .fpu softvfp + 323 HAL_SetTickFreq: + ARM GAS /tmp/ccZrwUTS.s page 12 + + + 324 .LFB48: + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Set new tick Freq. + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval status + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef HAL_SetTickFreq(HAL_TickFreqTypeDef Freq) + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 325 .loc 1 311 0 + 326 .cfi_startproc + 327 @ args = 0, pretend = 0, frame = 0 + 328 @ frame_needed = 0, uses_anonymous_args = 0 + 329 .LVL10: + 330 0000 10B5 push {r4, lr} + 331 .LCFI3: + 332 .cfi_def_cfa_offset 8 + 333 .cfi_offset 4, -8 + 334 .cfi_offset 14, -4 + 335 .LVL11: + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_StatusTypeDef status = HAL_OK; + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** assert_param(IS_TICKFREQ(Freq)); + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (uwTickFreq != Freq) + 336 .loc 1 317 0 + 337 0002 084B ldr r3, .L28 + 338 0004 1C78 ldrb r4, [r3] + 339 0006 8442 cmp r4, r0 + 340 0008 09D0 beq .L27 + 341 .LVL12: + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Back up uwTickFreq frequency */ + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** prevTickFreq = uwTickFreq; + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Update uwTickFreq global variable used by HAL_InitTick() */ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickFreq = Freq; + 342 .loc 1 323 0 + 343 000a 1870 strb r0, [r3] + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Apply the new tick Freq */ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** status = HAL_InitTick(uwTickPrio); + 344 .loc 1 326 0 + 345 000c 064B ldr r3, .L28+4 + 346 000e 1868 ldr r0, [r3] + 347 .LVL13: + 348 0010 FFF7FEFF bl HAL_InitTick + 349 .LVL14: + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (status != HAL_OK) + 350 .loc 1 328 0 + 351 0014 0028 cmp r0, #0 + 352 0016 03D0 beq .L26 + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Restore previous tick frequency */ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uwTickFreq = prevTickFreq; + 353 .loc 1 331 0 + ARM GAS /tmp/ccZrwUTS.s page 13 + + + 354 0018 024B ldr r3, .L28 + 355 001a 1C70 strb r4, [r3] + 356 001c 00E0 b .L26 + 357 .LVL15: + 358 .L27: + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef prevTickFreq; + 359 .loc 1 312 0 + 360 001e 0020 movs r0, #0 + 361 .LVL16: + 362 .L26: + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return status; + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 363 .loc 1 336 0 + 364 @ sp needed + 365 0020 10BD pop {r4, pc} + 366 .L29: + 367 0022 C046 .align 2 + 368 .L28: + 369 0024 00000000 .word .LANCHOR0 + 370 0028 00000000 .word .LANCHOR1 + 371 .cfi_endproc + 372 .LFE48: + 374 .section .text.HAL_GetTickFreq,"ax",%progbits + 375 .align 1 + 376 .global HAL_GetTickFreq + 377 .syntax unified + 378 .code 16 + 379 .thumb_func + 380 .fpu softvfp + 382 HAL_GetTickFreq: + 383 .LFB49: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief return tick frequency. + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval tick period in Hz + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** HAL_TickFreqTypeDef HAL_GetTickFreq(void) + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 384 .loc 1 343 0 + 385 .cfi_startproc + 386 @ args = 0, pretend = 0, frame = 0 + 387 @ frame_needed = 0, uses_anonymous_args = 0 + 388 @ link register save eliminated. + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return uwTickFreq; + 389 .loc 1 344 0 + 390 0000 014B ldr r3, .L31 + 391 0002 1878 ldrb r0, [r3] + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 392 .loc 1 345 0 + 393 @ sp needed + 394 0004 7047 bx lr + 395 .L32: + 396 0006 C046 .align 2 + 397 .L31: + ARM GAS /tmp/ccZrwUTS.s page 14 + + + 398 0008 00000000 .word .LANCHOR0 + 399 .cfi_endproc + 400 .LFE49: + 402 .section .text.HAL_Delay,"ax",%progbits + 403 .align 1 + 404 .weak HAL_Delay + 405 .syntax unified + 406 .code 16 + 407 .thumb_func + 408 .fpu softvfp + 410 HAL_Delay: + 411 .LFB50: + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This function provides accurate delay (in milliseconds) based + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * on variable incremented. + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * It is used to generate interrupts at regular time intervals where uwTick + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is incremented. + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note ThiS function is declared as __weak to be overwritten in case of other + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @param Delay specifies the delay time length, in milliseconds. + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_Delay(uint32_t Delay) + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 412 .loc 1 359 0 + 413 .cfi_startproc + 414 @ args = 0, pretend = 0, frame = 0 + 415 @ frame_needed = 0, uses_anonymous_args = 0 + 416 .LVL17: + 417 0000 70B5 push {r4, r5, r6, lr} + 418 .LCFI4: + 419 .cfi_def_cfa_offset 16 + 420 .cfi_offset 4, -16 + 421 .cfi_offset 5, -12 + 422 .cfi_offset 6, -8 + 423 .cfi_offset 14, -4 + 424 0002 0400 movs r4, r0 + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t tickstart = HAL_GetTick(); + 425 .loc 1 360 0 + 426 0004 FFF7FEFF bl HAL_GetTick + 427 .LVL18: + 428 0008 0500 movs r5, r0 + 429 .LVL19: + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t wait = Delay; + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Add a freq to guarantee minimum wait */ + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** if (wait < HAL_MAX_DELAY) + 430 .loc 1 364 0 + 431 000a 631C adds r3, r4, #1 + 432 000c 02D0 beq .L35 + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** wait += (uint32_t)(uwTickFreq); + 433 .loc 1 366 0 + 434 000e 044B ldr r3, .L36 + 435 0010 1B78 ldrb r3, [r3] + ARM GAS /tmp/ccZrwUTS.s page 15 + + + 436 0012 E418 adds r4, r4, r3 + 437 .LVL20: + 438 .L35: + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** while((HAL_GetTick() - tickstart) < wait) + 439 .loc 1 369 0 discriminator 1 + 440 0014 FFF7FEFF bl HAL_GetTick + 441 .LVL21: + 442 0018 401B subs r0, r0, r5 + 443 001a A042 cmp r0, r4 + 444 001c FAD3 bcc .L35 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 445 .loc 1 372 0 + 446 @ sp needed + 447 .LVL22: + 448 .LVL23: + 449 001e 70BD pop {r4, r5, r6, pc} + 450 .L37: + 451 .align 2 + 452 .L36: + 453 0020 00000000 .word .LANCHOR0 + 454 .cfi_endproc + 455 .LFE50: + 457 .section .text.HAL_SuspendTick,"ax",%progbits + 458 .align 1 + 459 .weak HAL_SuspendTick + 460 .syntax unified + 461 .code 16 + 462 .thumb_func + 463 .fpu softvfp + 465 HAL_SuspendTick: + 466 .LFB51: + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Suspend Tick increment. + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_SuspendTick() + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is called, the the SysTick interrupt will be disabled and so Tick increment + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is suspended. + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_SuspendTick(void) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 467 .loc 1 386 0 + 468 .cfi_startproc + 469 @ args = 0, pretend = 0, frame = 0 + 470 @ frame_needed = 0, uses_anonymous_args = 0 + 471 @ link register save eliminated. + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Disable SysTick Interrupt */ + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** CLEAR_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk); + 472 .loc 1 388 0 + ARM GAS /tmp/ccZrwUTS.s page 16 + + + 473 0000 024A ldr r2, .L39 + 474 0002 1368 ldr r3, [r2] + 475 0004 0221 movs r1, #2 + 476 0006 8B43 bics r3, r1 + 477 0008 1360 str r3, [r2] + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 478 .loc 1 389 0 + 479 @ sp needed + 480 000a 7047 bx lr + 481 .L40: + 482 .align 2 + 483 .L39: + 484 000c 10E000E0 .word -536813552 + 485 .cfi_endproc + 486 .LFE51: + 488 .section .text.HAL_ResumeTick,"ax",%progbits + 489 .align 1 + 490 .weak HAL_ResumeTick + 491 .syntax unified + 492 .code 16 + 493 .thumb_func + 494 .fpu softvfp + 496 HAL_ResumeTick: + 497 .LFB52: + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Resume Tick increment. + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note In the default implementation , SysTick timer is the source of time base. It is + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * used to generate interrupts at regular time intervals. Once HAL_ResumeTick() + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is called, the the SysTick interrupt will be enabled and so Tick increment + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * is resumed. + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @note This function is declared as __weak to be overwritten in case of other + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * implementations in user file. + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** __weak void HAL_ResumeTick(void) + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 498 .loc 1 402 0 + 499 .cfi_startproc + 500 @ args = 0, pretend = 0, frame = 0 + 501 @ frame_needed = 0, uses_anonymous_args = 0 + 502 @ link register save eliminated. + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /* Enable SysTick Interrupt */ + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** SET_BIT(SysTick->CTRL,SysTick_CTRL_TICKINT_Msk); + 503 .loc 1 404 0 + 504 0000 024A ldr r2, .L42 + 505 0002 1368 ldr r3, [r2] + 506 0004 0221 movs r1, #2 + 507 0006 0B43 orrs r3, r1 + 508 0008 1360 str r3, [r2] + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 509 .loc 1 405 0 + 510 @ sp needed + 511 000a 7047 bx lr + 512 .L43: + 513 .align 2 + 514 .L42: + ARM GAS /tmp/ccZrwUTS.s page 17 + + + 515 000c 10E000E0 .word -536813552 + 516 .cfi_endproc + 517 .LFE52: + 519 .section .text.HAL_GetHalVersion,"ax",%progbits + 520 .align 1 + 521 .global HAL_GetHalVersion + 522 .syntax unified + 523 .code 16 + 524 .thumb_func + 525 .fpu softvfp + 527 HAL_GetHalVersion: + 528 .LFB53: + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief This method returns the HAL revision + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval version 0xXYZR (8bits for each decimal, R for RC) + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetHalVersion(void) + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 529 .loc 1 412 0 + 530 .cfi_startproc + 531 @ args = 0, pretend = 0, frame = 0 + 532 @ frame_needed = 0, uses_anonymous_args = 0 + 533 @ link register save eliminated. + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return __STM32F0xx_HAL_VERSION; + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 534 .loc 1 414 0 + 535 0000 0048 ldr r0, .L45 + 536 @ sp needed + 537 0002 7047 bx lr + 538 .L46: + 539 .align 2 + 540 .L45: + 541 0004 00030701 .word 17236736 + 542 .cfi_endproc + 543 .LFE53: + 545 .section .text.HAL_GetREVID,"ax",%progbits + 546 .align 1 + 547 .global HAL_GetREVID + 548 .syntax unified + 549 .code 16 + 550 .thumb_func + 551 .fpu softvfp + 553 HAL_GetREVID: + 554 .LFB54: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns the device revision identifier. + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device revision identifier + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetREVID(void) + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 555 .loc 1 421 0 + 556 .cfi_startproc + 557 @ args = 0, pretend = 0, frame = 0 + 558 @ frame_needed = 0, uses_anonymous_args = 0 + 559 @ link register save eliminated. + ARM GAS /tmp/ccZrwUTS.s page 18 + + + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return((DBGMCU->IDCODE) >> 16U); + 560 .loc 1 422 0 + 561 0000 014B ldr r3, .L48 + 562 0002 1868 ldr r0, [r3] + 563 0004 000C lsrs r0, r0, #16 + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 564 .loc 1 423 0 + 565 @ sp needed + 566 0006 7047 bx lr + 567 .L49: + 568 .align 2 + 569 .L48: + 570 0008 00580140 .word 1073829888 + 571 .cfi_endproc + 572 .LFE54: + 574 .section .text.HAL_GetDEVID,"ax",%progbits + 575 .align 1 + 576 .global HAL_GetDEVID + 577 .syntax unified + 578 .code 16 + 579 .thumb_func + 580 .fpu softvfp + 582 HAL_GetDEVID: + 583 .LFB55: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns the device identifier. + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetDEVID(void) + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 584 .loc 1 430 0 + 585 .cfi_startproc + 586 @ args = 0, pretend = 0, frame = 0 + 587 @ frame_needed = 0, uses_anonymous_args = 0 + 588 @ link register save eliminated. + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return((DBGMCU->IDCODE) & IDCODE_DEVID_MASK); + 589 .loc 1 431 0 + 590 0000 024B ldr r3, .L51 + 591 0002 1868 ldr r0, [r3] + 592 0004 0005 lsls r0, r0, #20 + 593 0006 000D lsrs r0, r0, #20 + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 594 .loc 1 432 0 + 595 @ sp needed + 596 0008 7047 bx lr + 597 .L52: + 598 000a C046 .align 2 + 599 .L51: + 600 000c 00580140 .word 1073829888 + 601 .cfi_endproc + 602 .LFE55: + 604 .section .text.HAL_GetUIDw0,"ax",%progbits + 605 .align 1 + 606 .global HAL_GetUIDw0 + 607 .syntax unified + 608 .code 16 + ARM GAS /tmp/ccZrwUTS.s page 19 + + + 609 .thumb_func + 610 .fpu softvfp + 612 HAL_GetUIDw0: + 613 .LFB56: + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns first word of the unique device identifier (UID based on 96 bits) + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetUIDw0(void) + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 614 .loc 1 439 0 + 615 .cfi_startproc + 616 @ args = 0, pretend = 0, frame = 0 + 617 @ frame_needed = 0, uses_anonymous_args = 0 + 618 @ link register save eliminated. + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return(READ_REG(*((uint32_t *)UID_BASE))); + 619 .loc 1 440 0 + 620 0000 014B ldr r3, .L54 + 621 0002 1868 ldr r0, [r3] + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 622 .loc 1 441 0 + 623 @ sp needed + 624 0004 7047 bx lr + 625 .L55: + 626 0006 C046 .align 2 + 627 .L54: + 628 0008 ACF7FF1F .word 536868780 + 629 .cfi_endproc + 630 .LFE56: + 632 .section .text.HAL_GetUIDw1,"ax",%progbits + 633 .align 1 + 634 .global HAL_GetUIDw1 + 635 .syntax unified + 636 .code 16 + 637 .thumb_func + 638 .fpu softvfp + 640 HAL_GetUIDw1: + 641 .LFB57: + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns second word of the unique device identifier (UID based on 96 bits) + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetUIDw1(void) + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 642 .loc 1 448 0 + 643 .cfi_startproc + 644 @ args = 0, pretend = 0, frame = 0 + 645 @ frame_needed = 0, uses_anonymous_args = 0 + 646 @ link register save eliminated. + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 4U)))); + 647 .loc 1 449 0 + 648 0000 014B ldr r3, .L57 + 649 0002 1868 ldr r0, [r3] + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 650 .loc 1 450 0 + ARM GAS /tmp/ccZrwUTS.s page 20 + + + 651 @ sp needed + 652 0004 7047 bx lr + 653 .L58: + 654 0006 C046 .align 2 + 655 .L57: + 656 0008 B0F7FF1F .word 536868784 + 657 .cfi_endproc + 658 .LFE57: + 660 .section .text.HAL_GetUIDw2,"ax",%progbits + 661 .align 1 + 662 .global HAL_GetUIDw2 + 663 .syntax unified + 664 .code 16 + 665 .thumb_func + 666 .fpu softvfp + 668 HAL_GetUIDw2: + 669 .LFB58: + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Returns third word of the unique device identifier (UID based on 96 bits) + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval Device identifier + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** uint32_t HAL_GetUIDw2(void) + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 670 .loc 1 457 0 + 671 .cfi_startproc + 672 @ args = 0, pretend = 0, frame = 0 + 673 @ frame_needed = 0, uses_anonymous_args = 0 + 674 @ link register save eliminated. + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** return(READ_REG(*((uint32_t *)(UID_BASE + 8U)))); + 675 .loc 1 458 0 + 676 0000 014B ldr r3, .L60 + 677 0002 1868 ldr r0, [r3] + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 678 .loc 1 459 0 + 679 @ sp needed + 680 0004 7047 bx lr + 681 .L61: + 682 0006 C046 .align 2 + 683 .L60: + 684 0008 B4F7FF1F .word 536868788 + 685 .cfi_endproc + 686 .LFE58: + 688 .section .text.HAL_DBGMCU_EnableDBGStopMode,"ax",%progbits + 689 .align 1 + 690 .global HAL_DBGMCU_EnableDBGStopMode + 691 .syntax unified + 692 .code 16 + 693 .thumb_func + 694 .fpu softvfp + 696 HAL_DBGMCU_EnableDBGStopMode: + 697 .LFB59: + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Enable the Debug Module during STOP mode + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + ARM GAS /tmp/ccZrwUTS.s page 21 + + + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_EnableDBGStopMode(void) + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 698 .loc 1 466 0 + 699 .cfi_startproc + 700 @ args = 0, pretend = 0, frame = 0 + 701 @ frame_needed = 0, uses_anonymous_args = 0 + 702 @ link register save eliminated. + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 703 .loc 1 467 0 + 704 0000 024A ldr r2, .L63 + 705 0002 5368 ldr r3, [r2, #4] + 706 0004 0221 movs r1, #2 + 707 0006 0B43 orrs r3, r1 + 708 0008 5360 str r3, [r2, #4] + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 709 .loc 1 468 0 + 710 @ sp needed + 711 000a 7047 bx lr + 712 .L64: + 713 .align 2 + 714 .L63: + 715 000c 00580140 .word 1073829888 + 716 .cfi_endproc + 717 .LFE59: + 719 .section .text.HAL_DBGMCU_DisableDBGStopMode,"ax",%progbits + 720 .align 1 + 721 .global HAL_DBGMCU_DisableDBGStopMode + 722 .syntax unified + 723 .code 16 + 724 .thumb_func + 725 .fpu softvfp + 727 HAL_DBGMCU_DisableDBGStopMode: + 728 .LFB60: + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Disable the Debug Module during STOP mode + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_DisableDBGStopMode(void) + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 729 .loc 1 475 0 + 730 .cfi_startproc + 731 @ args = 0, pretend = 0, frame = 0 + 732 @ frame_needed = 0, uses_anonymous_args = 0 + 733 @ link register save eliminated. + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); + 734 .loc 1 476 0 + 735 0000 024A ldr r2, .L66 + 736 0002 5368 ldr r3, [r2, #4] + 737 0004 0221 movs r1, #2 + 738 0006 8B43 bics r3, r1 + 739 0008 5360 str r3, [r2, #4] + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 740 .loc 1 477 0 + 741 @ sp needed + 742 000a 7047 bx lr + 743 .L67: + ARM GAS /tmp/ccZrwUTS.s page 22 + + + 744 .align 2 + 745 .L66: + 746 000c 00580140 .word 1073829888 + 747 .cfi_endproc + 748 .LFE60: + 750 .section .text.HAL_DBGMCU_EnableDBGStandbyMode,"ax",%progbits + 751 .align 1 + 752 .global HAL_DBGMCU_EnableDBGStandbyMode + 753 .syntax unified + 754 .code 16 + 755 .thumb_func + 756 .fpu softvfp + 758 HAL_DBGMCU_EnableDBGStandbyMode: + 759 .LFB61: + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Enable the Debug Module during STANDBY mode + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_EnableDBGStandbyMode(void) + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 760 .loc 1 484 0 + 761 .cfi_startproc + 762 @ args = 0, pretend = 0, frame = 0 + 763 @ frame_needed = 0, uses_anonymous_args = 0 + 764 @ link register save eliminated. + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 765 .loc 1 485 0 + 766 0000 024A ldr r2, .L69 + 767 0002 5368 ldr r3, [r2, #4] + 768 0004 0421 movs r1, #4 + 769 0006 0B43 orrs r3, r1 + 770 0008 5360 str r3, [r2, #4] + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 771 .loc 1 486 0 + 772 @ sp needed + 773 000a 7047 bx lr + 774 .L70: + 775 .align 2 + 776 .L69: + 777 000c 00580140 .word 1073829888 + 778 .cfi_endproc + 779 .LFE61: + 781 .section .text.HAL_DBGMCU_DisableDBGStandbyMode,"ax",%progbits + 782 .align 1 + 783 .global HAL_DBGMCU_DisableDBGStandbyMode + 784 .syntax unified + 785 .code 16 + 786 .thumb_func + 787 .fpu softvfp + 789 HAL_DBGMCU_DisableDBGStandbyMode: + 790 .LFB62: + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** /** + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @brief Disable the Debug Module during STANDBY mode + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** * @retval None + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** */ + ARM GAS /tmp/ccZrwUTS.s page 23 + + + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** void HAL_DBGMCU_DisableDBGStandbyMode(void) + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** { + 791 .loc 1 493 0 + 792 .cfi_startproc + 793 @ args = 0, pretend = 0, frame = 0 + 794 @ frame_needed = 0, uses_anonymous_args = 0 + 795 @ link register save eliminated. + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); + 796 .loc 1 494 0 + 797 0000 024A ldr r2, .L72 + 798 0002 5368 ldr r3, [r2, #4] + 799 0004 0421 movs r1, #4 + 800 0006 8B43 bics r3, r1 + 801 0008 5360 str r3, [r2, #4] + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal.c **** } + 802 .loc 1 495 0 + 803 @ sp needed + 804 000a 7047 bx lr + 805 .L73: + 806 .align 2 + 807 .L72: + 808 000c 00580140 .word 1073829888 + 809 .cfi_endproc + 810 .LFE62: + 812 .global uwTickFreq + 813 .global uwTickPrio + 814 .comm uwTick,4,4 + 815 .section .data.uwTickFreq,"aw",%progbits + 816 .set .LANCHOR0,. + 0 + 819 uwTickFreq: + 820 0000 01 .byte 1 + 821 .section .data.uwTickPrio,"aw",%progbits + 822 .align 2 + 823 .set .LANCHOR1,. + 0 + 826 uwTickPrio: + 827 0000 04000000 .word 4 + 828 .text + 829 .Letext0: + 830 .file 2 "/usr/include/newlib/machine/_default_types.h" + 831 .file 3 "/usr/include/newlib/sys/_stdint.h" + 832 .file 4 "Drivers/CMSIS/Include/core_cm0.h" + 833 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 834 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 835 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 836 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 837 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h" + ARM GAS /tmp/ccZrwUTS.s page 24 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal.c + /tmp/ccZrwUTS.s:16 .text.HAL_MspInit:0000000000000000 $t + /tmp/ccZrwUTS.s:23 .text.HAL_MspInit:0000000000000000 HAL_MspInit + /tmp/ccZrwUTS.s:38 .text.HAL_MspDeInit:0000000000000000 $t + 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.text.HAL_GetTick:0000000000000008 $d + /tmp/ccZrwUTS.s:288 .text.HAL_GetTickPrio:0000000000000000 $t + /tmp/ccZrwUTS.s:295 .text.HAL_GetTickPrio:0000000000000000 HAL_GetTickPrio + /tmp/ccZrwUTS.s:311 .text.HAL_GetTickPrio:0000000000000008 $d + /tmp/ccZrwUTS.s:316 .text.HAL_SetTickFreq:0000000000000000 $t + /tmp/ccZrwUTS.s:323 .text.HAL_SetTickFreq:0000000000000000 HAL_SetTickFreq + /tmp/ccZrwUTS.s:369 .text.HAL_SetTickFreq:0000000000000024 $d + /tmp/ccZrwUTS.s:375 .text.HAL_GetTickFreq:0000000000000000 $t + /tmp/ccZrwUTS.s:382 .text.HAL_GetTickFreq:0000000000000000 HAL_GetTickFreq + /tmp/ccZrwUTS.s:398 .text.HAL_GetTickFreq:0000000000000008 $d + /tmp/ccZrwUTS.s:403 .text.HAL_Delay:0000000000000000 $t + /tmp/ccZrwUTS.s:410 .text.HAL_Delay:0000000000000000 HAL_Delay + /tmp/ccZrwUTS.s:453 .text.HAL_Delay:0000000000000020 $d + /tmp/ccZrwUTS.s:458 .text.HAL_SuspendTick:0000000000000000 $t + /tmp/ccZrwUTS.s:465 .text.HAL_SuspendTick:0000000000000000 HAL_SuspendTick + /tmp/ccZrwUTS.s:484 .text.HAL_SuspendTick:000000000000000c $d + /tmp/ccZrwUTS.s:489 .text.HAL_ResumeTick:0000000000000000 $t + /tmp/ccZrwUTS.s:496 .text.HAL_ResumeTick:0000000000000000 HAL_ResumeTick + /tmp/ccZrwUTS.s:515 .text.HAL_ResumeTick:000000000000000c $d + /tmp/ccZrwUTS.s:520 .text.HAL_GetHalVersion:0000000000000000 $t + /tmp/ccZrwUTS.s:527 .text.HAL_GetHalVersion:0000000000000000 HAL_GetHalVersion + /tmp/ccZrwUTS.s:541 .text.HAL_GetHalVersion:0000000000000004 $d + /tmp/ccZrwUTS.s:546 .text.HAL_GetREVID:0000000000000000 $t + /tmp/ccZrwUTS.s:553 .text.HAL_GetREVID:0000000000000000 HAL_GetREVID + /tmp/ccZrwUTS.s:570 .text.HAL_GetREVID:0000000000000008 $d + /tmp/ccZrwUTS.s:575 .text.HAL_GetDEVID:0000000000000000 $t + /tmp/ccZrwUTS.s:582 .text.HAL_GetDEVID:0000000000000000 HAL_GetDEVID + /tmp/ccZrwUTS.s:600 .text.HAL_GetDEVID:000000000000000c $d + /tmp/ccZrwUTS.s:605 .text.HAL_GetUIDw0:0000000000000000 $t + /tmp/ccZrwUTS.s:612 .text.HAL_GetUIDw0:0000000000000000 HAL_GetUIDw0 + /tmp/ccZrwUTS.s:628 .text.HAL_GetUIDw0:0000000000000008 $d + /tmp/ccZrwUTS.s:633 .text.HAL_GetUIDw1:0000000000000000 $t + /tmp/ccZrwUTS.s:640 .text.HAL_GetUIDw1:0000000000000000 HAL_GetUIDw1 + /tmp/ccZrwUTS.s:656 .text.HAL_GetUIDw1:0000000000000008 $d + /tmp/ccZrwUTS.s:661 .text.HAL_GetUIDw2:0000000000000000 $t + /tmp/ccZrwUTS.s:668 .text.HAL_GetUIDw2:0000000000000000 HAL_GetUIDw2 + ARM GAS /tmp/ccZrwUTS.s page 25 + + + /tmp/ccZrwUTS.s:684 .text.HAL_GetUIDw2:0000000000000008 $d + /tmp/ccZrwUTS.s:689 .text.HAL_DBGMCU_EnableDBGStopMode:0000000000000000 $t + /tmp/ccZrwUTS.s:696 .text.HAL_DBGMCU_EnableDBGStopMode:0000000000000000 HAL_DBGMCU_EnableDBGStopMode + /tmp/ccZrwUTS.s:715 .text.HAL_DBGMCU_EnableDBGStopMode:000000000000000c $d + /tmp/ccZrwUTS.s:720 .text.HAL_DBGMCU_DisableDBGStopMode:0000000000000000 $t + /tmp/ccZrwUTS.s:727 .text.HAL_DBGMCU_DisableDBGStopMode:0000000000000000 HAL_DBGMCU_DisableDBGStopMode + /tmp/ccZrwUTS.s:746 .text.HAL_DBGMCU_DisableDBGStopMode:000000000000000c $d + /tmp/ccZrwUTS.s:751 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000000000000 $t + /tmp/ccZrwUTS.s:758 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000000000000 HAL_DBGMCU_EnableDBGStandbyMode + /tmp/ccZrwUTS.s:777 .text.HAL_DBGMCU_EnableDBGStandbyMode:000000000000000c $d + /tmp/ccZrwUTS.s:782 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000000000000 $t + /tmp/ccZrwUTS.s:789 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000000000000 HAL_DBGMCU_DisableDBGStandbyMode + /tmp/ccZrwUTS.s:808 .text.HAL_DBGMCU_DisableDBGStandbyMode:000000000000000c $d + /tmp/ccZrwUTS.s:819 .data.uwTickFreq:0000000000000000 uwTickFreq + /tmp/ccZrwUTS.s:826 .data.uwTickPrio:0000000000000000 uwTickPrio + /tmp/ccZrwUTS.s:822 .data.uwTickPrio:0000000000000000 $d + +UNDEFINED SYMBOLS +__aeabi_uidiv +HAL_SYSTICK_Config +HAL_NVIC_SetPriority +SystemCoreClock diff --git a/fw/midi-dials/build/stm32f0xx_hal.o b/fw/midi-dials/build/stm32f0xx_hal.o Binary files differnew file mode 100644 index 0000000..27bd647 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_adc.d b/fw/midi-dials/build/stm32f0xx_hal_adc.d new file mode 100644 index 0000000..7fe9033 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_adc.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_adc.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_adc.lst b/fw/midi-dials/build/stm32f0xx_hal_adc.lst new file mode 100644 index 0000000..1fd49cb --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_adc.lst @@ -0,0 +1,5976 @@ +ARM GAS /tmp/ccnlUpWq.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_adc.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.ADC_ConversionStop,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 ADC_ConversionStop: + 23 .LFB64: + 24 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @file stm32f0xx_hal_adc.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief This file provides firmware functions to manage the following + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * functionalities of the Analog to Digital Convertor (ADC) + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Initialization and Configuration of ADC + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + Operation functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Start, stop, get result of conversions of regular + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * group, using 3 possible modes: polling, interruption or DMA. + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + Control functions + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Channels configuration on regular group + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Analog Watchdog configuration + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + State functions + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ ADC state machine management + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Interrupts and flags management + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Other functions (extended functions) are available in file + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "stm32f0xx_hal_adc_ex.c". + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================================== + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### ADC peripheral features ##### + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================================== + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Interrupt generation at the end of regular conversion and in case of + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** analog watchdog or overrun events. + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Single and continuous conversion modes. + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Scan mode for conversion of several channels sequentially. + ARM GAS /tmp/ccnlUpWq.s page 2 + + + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Data alignment with in-built data coherency. + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Programmable sampling time (common for all channels) + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC conversion of regular group. + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) External trigger (timer or EXTI) with configurable polarity + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) DMA request generation for transfer of conversions data of regular group. + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC calibration + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** slower speed. + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Vdda or to an external voltage reference). + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### How to use this driver ##### + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================================== + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Configuration of top level parameters related to ADC *** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Enable the ADC interface + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) As prerequisite, ADC clock must be configured at RCC top level. + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Caution: On STM32F0, ADC clock frequency max is 14MHz (refer + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** to device datasheet). + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Therefore, ADC clock prescaler must be configured in + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function of ADC clock source frequency to remain below + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** this maximum frequency. + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Two clock settings are mandatory: + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) ADC clock (core clock, also possibly conversion clock). + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) ADC clock (conversions clock). + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Two possible clock sources: synchronous clock derived from APB clock + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** or asynchronous clock derived from ADC dedicated HSI RC oscillator + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** 14MHz. + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** If asynchronous clock is selected, parameter "HSI14State" must be set either: + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** - to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** the HSI14 oscillator enable/disable (if not used to supply the main + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** system clock): feature used if ADC mode LowPowerAutoPowerOff is + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** enabled. + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** - to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** always enabled: can be used to supply the main system clock. + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Example: + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Into HAL_ADC_MspInit() (recommended code location) or with + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** other device clock parameters configuration: + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory) + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HI14 enable or let under control of ADC: (optional: if asynchronous clock + ARM GAS /tmp/ccnlUpWq.s page 3 + + + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitTypeDef RCC_OscInitStructure; + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14; + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT; + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL; + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.PLL... (optional if used for system clock) + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure); + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC clock source and clock prescaler are configured at ADC level with + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** parameter "ClockPrescaler" using function HAL_ADC_Init(). + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) ADC pins configuration + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Enable the clock for the ADC GPIOs + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_ENABLE() + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure these ADC pins in analog mode + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_GPIO_Init() + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions: + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure the NVIC for ADC + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(ADCx_IRQn) + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** into the function of corresponding ADC interruption vector + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADCx_IRQHandler(). + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of DMA: + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure the DMA (DMA channel, mode normal or circular, ...) + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_DMA_Init(). + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure the NVIC for DMA + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn) + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler() + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** into the function of corresponding DMA interruption vector + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** DMAx_Channelx_IRQHandler(). + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Configuration of ADC, group regular, channels parameters *** + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ================================================================ + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Configure the ADC parameters (resolution, data alignment, ...) + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** and regular group parameters (conversion trigger, sequencer, ...) + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Init(). + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Configure the channels for regular group parameters (channel number, + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** channel rank into sequencer, ..., into regular group) + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_ConfigChannel(). + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, configure the analog watchdog parameters (channels + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** monitored, thresholds, ...) + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_AnalogWDGConfig(). + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Execution of ADC conversions *** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ==================================== + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, perform an automatic ADC calibration to improve the + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** conversion accuracy + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADCEx_Calibration_Start(). + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) ADC driver can be used among three modes: polling, interruption, + ARM GAS /tmp/ccnlUpWq.s page 4 + + + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** transfer by DMA. + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC conversion by polling: + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Start() + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Wait for ADC conversion completion + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_PollForConversion() + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Retrieve conversion results + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_GetValue() + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Stop() + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC conversion by interruption: + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Start_IT() + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback() + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (this function must be implemented in user program) + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Retrieve conversion results + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_GetValue() + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Stop_IT() + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC conversion with transfer by DMA: + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Start_DMA() + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback() + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (these functions must be implemented in user program) + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Conversion results are automatically transferred by DMA into + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** destination variable address. + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Stop_DMA() + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (@) Callback functions must be implemented in user program: + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_ErrorCallback() + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog) + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_ConvCpltCallback() + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_ConvHalfCpltCallback + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Deinitialization of ADC *** + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Disable the ADC interface + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC clock can be hard reset and disabled at RCC top level. + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Hard reset of ADC peripherals + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET(). + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC clock disable + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using the equivalent macro/functions as configuration step. + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Example: + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Into HAL_ADC_MspDeInit() (recommended code location) or with + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** other device clock parameters configuration: + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14; + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_OFF; (if not used for system clock + ARM GAS /tmp/ccnlUpWq.s page 5 + + + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure); + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) ADC pins configuration + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Disable the clock for the ADC GPIOs + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_DISABLE() + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions: + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Disable the NVIC for ADC + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_DisableIRQ(ADCx_IRQn) + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of DMA: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Deinitialize the DMA + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_DMA_DeInit(). + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Disable the NVIC for DMA + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn) + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Callback registration *** + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================= + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1, + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** allows the user to configure dynamically the driver callbacks. + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Use Functions @ref HAL_ADC_RegisterCallback() + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** to register an interrupt callback. + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvCpltCallback : ADC conversion complete callback + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ErrorCallback : ADC error callback + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** and a pointer to the user callback function. + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** weak function. + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle, + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** and the Callback ID. + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This function allows to reset following callbacks: + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvCpltCallback : ADC conversion complete callback + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ErrorCallback : ADC error callback + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** all callbacks are set to the corresponding weak functions: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback(). + ARM GAS /tmp/ccnlUpWq.s page 6 + + + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Exception done for MspInit and MspDeInit functions that are + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** these callbacks are null (not registered beforehand). + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only. + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state, + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Then, the user first registers the MspInit/MspDeInit user callbacks + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit() + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** or @ref HAL_ADC_Init() function. + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** not defined, the callback registration feature is not available and all callbacks + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** are set to the corresponding weak functions. + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ****************************************************************************** + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @attention + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * All rights reserved.</center></h2> + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This software component is licensed by ST under BSD 3-Clause license, + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the "License"; You may not use this file except in compliance with the + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * License. You may obtain a copy of the License at: + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * opensource.org/licenses/BSD-3-Clause + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ****************************************************************************** + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Includes ------------------------------------------------------------------*/ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #include "stm32f0xx_hal.h" + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @addtogroup STM32F0xx_HAL_Driver + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC ADC + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief ADC HAL module driver + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #ifdef HAL_ADC_MODULE_ENABLED + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private typedef -----------------------------------------------------------*/ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private define ------------------------------------------------------------*/ + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Constants ADC Private Constants + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + ARM GAS /tmp/ccnlUpWq.s page 7 + + + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Fixed timeout values for ADC calibration, enable settling time, disable */ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* settling time. */ + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Values defined to be higher than worst cases: low clock frequency, */ + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* maximum prescaler. */ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unit: ms */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_ENABLE_TIMEOUT ( 2U) + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_DISABLE_TIMEOUT ( 2U) + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_STOP_CONVERSION_TIMEOUT ( 2U) + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for ADC stabilization time. */ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */ + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unit: us */ + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_STAB_DELAY_US ( 1U) + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for temperature sensor stabilization time. */ + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unit: us */ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_TEMPSENSOR_DELAY_US ( 10U) + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private macro -------------------------------------------------------------*/ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private variables ---------------------------------------------------------*/ + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private function prototypes -----------------------------------------------*/ + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc); + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc); + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc); + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma); + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma); + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAError(DMA_HandleTypeDef *hdma); + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Exported functions ---------------------------------------------------------*/ + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions ADC Exported Functions + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initialization and Configuration functions + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Initialization and de-initialization functions ##### + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to: + ARM GAS /tmp/ccnlUpWq.s page 8 + + + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Initialize and configure the ADC. + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) De-initialize the ADC + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initializes the ADC peripheral and regular group according to + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameters specified in structure "ADC_InitTypeDef". + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note As prerequisite, ADC clock must be configured at RCC top level + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * depending on both possible clock sources: APB clock of HSI clock. + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * See commented example code below that can be copied and uncommented + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * into HAL_ADC_MspInit(). + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * coming from ADC state reset. Following calls to this function can + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * be used to reconfigure some parameters of ADC_InitTypeDef + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * structure on the fly, without modifying MSP configuration. If ADC + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * MSP has to be modified again, HAL_ADC_DeInit() must be called + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * before HAL_ADC_Init(). + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_InitTypeDef". + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function configures the ADC within 2 scopes: scope of entire + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC and scope of regular group. For parameters details, see comments + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_InitTypeDef". + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc) + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpCFGR1 = 0U; + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check ADC handle */ + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(hadc == NULL) + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler)); + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution)); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign)); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode)); + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode)); + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv)); + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun)); + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait)); + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff)); + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */ + ARM GAS /tmp/ccnlUpWq.s page 9 + + + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* at RCC top level depending on both possible clock sources: */ + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* APB clock or HSI clock. */ + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Refer to header of this file for more details on clock enabling procedure*/ + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Actions performed only if ADC is coming from state reset: */ + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Initialization of ADC MSP */ + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC voltage regulator enable */ + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->State == HAL_ADC_STATE_RESET) + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Initialize ADC error code */ + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allocate lock resource and initialize it */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Lock = HAL_UNLOCKED; + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the ADC Callback settings */ + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->MspInitCallback == NULL) + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the low level hardware */ + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback(hadc); + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the low level hardware */ + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_MspInit(hadc); + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */ + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* correctly completed. */ + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* and if there is no conversion on going on regular group (ADC can be */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enabled anyway, in case of call of this function to update a parameter */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* on the fly). */ + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) && + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL); + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated only when ADC is disabled: */ + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC clock mode */ + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC clock prescaler */ + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC resolution */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET) + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Some parameters of this register are not reset, since they are set */ + ARM GAS /tmp/ccnlUpWq.s page 10 + + + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by other functions and must be kept in case of usage of this */ + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* function on the fly (update of a parameter of ADC_InitTypeDef */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* without needing to reconfigure all other ADC groups/channels */ + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameters): */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - internal measurement paths: Vbat, temperature sensor, Vref */ + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (set into HAL_ADC_ConfigChannel() ) */ + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC resolution */ + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR1, + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_RES , + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.Resolution ); + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC clock mode: clock source AHB or HSI with */ + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* selectable prescaler */ + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR2 , + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR2_CKMODE , + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ClockPrescaler ); + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC: */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - discontinuous mode */ + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - LowPowerAutoWait mode */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - LowPowerAutoPowerOff mode */ + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - continuous conversion mode */ + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - overrun */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - external trigger to start conversion */ + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - external trigger polarity */ + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - data alignment */ + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - resolution */ + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - scan direction */ + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - DMA continuous request */ + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN | + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTDLY | + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONT | + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVRMOD | + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTSEL | + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTEN | + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_ALIGN | + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_SCANDIR | + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACFG ); + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) | + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable discontinuous mode only if continuous mode is disabled */ + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.DiscontinuousConvMode == ENABLE) + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.ContinuousConvMode == DISABLE) + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the selected ADC group regular discontinuous mode */ + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= ADC_CFGR1_DISCEN; + ARM GAS /tmp/ccnlUpWq.s page 11 + + + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC regular group discontinuous was intended to be enabled, */ + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* but ADC regular group modes continuous and sequencer discontinuous */ + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* cannot be enabled simultaneously. */ + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable external trigger if trigger selection is different of software */ + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* start. */ + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: This configuration keeps the hardware feature of parameter */ + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ExternalTrigConvEdge "trigger edge none" equivalent to */ + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* software start. */ + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START) + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= ( hadc->Init.ExternalTrigConv | + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC configuration register with previous settings */ + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= tmpCFGR1; + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (obsolete): sampling time set in this function if parameter */ + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "SamplingTimeCommon" has been set to a valid sampling time. */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Otherwise, sampling time is set into ADC channel initialization */ + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* structure with parameter "SamplingTime" (obsolete). */ + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the old sample time */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the new sample time */ + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR |= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon); + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check back that ADC registers have effectively been configured to */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ensure of no potential problem of ADC core IP clocking. */ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check through register CFGR1 (excluding analog watchdog configuration: */ + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* set into separate dedicated function, and bits of ADC resolution set */ + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* out of temporary variable 'tmpCFGR1'). */ + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1 + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to none */ + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the ADC state */ + ARM GAS /tmp/ccnlUpWq.s page 12 + + + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_ERROR_INTERNAL); + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Deinitialize the ADC peripheral registers to their default reset + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * values, with deinitialization of the ADC MSP. + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note For devices with several ADCs: reset of ADC common registers is done + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * only if all ADCs sharing the same common group are disabled. + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * If this is not the case, reset of these common parameters reset is + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * bypassed without error reporting: it can be the intended behaviour in + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * case of reset of a single ADC while the other ADCs sharing the same + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * common group is still running. + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc) + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check ADC handle */ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(hadc == NULL) + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + ARM GAS /tmp/ccnlUpWq.s page 13 + + + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL); + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop potential conversion on going, on regular group */ + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC peripheral */ + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR) + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state */ + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_READY; + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */ + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* correctly completed. */ + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR) + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Reset ADC registers ========== */ + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register IER */ + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR | + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOS | ADC_IT_EOC | + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOSMP | ADC_IT_RDY ) ); + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register ISR */ + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_OVR | + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOS | ADC_FLAG_EOC | + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOSMP | ADC_FLAG_RDY ) ); + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CR */ + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "read-set": no direct reset applicable. */ + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CFGR1 */ + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_ + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_ + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CFGR2 */ + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Update of ADC clock mode is conditioned to ADC state disabled: */ + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* already done above. */ + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE; + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register SMPR */ + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~ADC_SMPR_SMP; + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register TR1 */ + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccnlUpWq.s page 14 + + + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CHSELR */ + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 | + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_ + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_ + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_ + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register DR */ + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* bits in access mode read only, no direct reset applicable*/ + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CCR */ + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR &= ~(ADC_CCR_ALL); + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Hard reset ADC peripheral ========== */ + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Performs a global reset of the entire ADC peripheral: ADC state is */ + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* forced to a similar state after device power-on. */ + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If needed, copy-paste and uncomment the following reset code into */ + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */ + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* */ + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* __HAL_RCC_ADC1_FORCE_RESET() */ + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* __HAL_RCC_ADC1_RELEASE_RESET() */ + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->MspDeInitCallback == NULL) + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* DeInit the low level hardware */ + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback(hadc); + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* DeInit the low level hardware */ + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_MspDeInit(hadc); + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to none */ + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_RESET; + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initializes the ADC MSP. + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccnlUpWq.s page 15 + + + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_MspInit must be implemented in the user file. + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DeInitializes the ADC MSP. + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_MspDeInit must be implemented in the user file. + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Register a User ADC Callback + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * To be used instead of the weak predefined callback + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the configuration information for the specified ADC. + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param CallbackID ID of the callback to be registered + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values: + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param pCallback pointer to the Callback function + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Callb + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK; + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (pCallback == NULL) + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0) + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccnlUpWq.s page 16 + + + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID : + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = pCallback; + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID : + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = pCallback; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = pCallback; + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID : + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = pCallback; + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = pCallback; + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback; + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State) + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = pCallback; + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback; + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + ARM GAS /tmp/ccnlUpWq.s page 17 + + + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return status; + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Unregister a ADC Callback + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC callback is redirected to the weak predefined callback + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the configuration information for the specified ADC. + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param CallbackID ID of the callback to be unregistered + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values: + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Cal + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK; + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0) + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID : + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID : + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID : + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID : + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback; + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */ + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccnlUpWq.s page 18 + + + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */ + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State) + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID) + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID : + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID : + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default : + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */ + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK; + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */ + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR; + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return status; + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group2 IO operation functions +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief IO operation functions +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== + ARM GAS /tmp/ccnlUpWq.s page 19 + + +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### IO operation functions ##### +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to: +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group. +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group. +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Poll for conversion complete on regular group. +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Poll for conversion event. +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Get result of regular channel conversion. +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group and enable interruptions. +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group and disable interruptions. +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Handle ADC interrupt request +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group and enable DMA transfer. +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group and disable ADC DMA transfer. +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group. +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: None. +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc) +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */ +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */ +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccnlUpWq.s page 20 + + +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */ +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */ +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */ +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable ADC peripheral. +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc) +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */ +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); + ARM GAS /tmp/ccnlUpWq.s page 21 + + +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Wait for regular group conversion to be completed. +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note ADC conversion flags EOS (end of sequence) and EOC (end of +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * conversion) are cleared by this function, with an exception: +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * if low power feature "LowPowerAutoWait" is enabled, flags are +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * not cleared to not interfere with this feature until data register +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * is read using function HAL_ADC_GetValue(). +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function cannot be used in a particular setup: ADC configured +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * in DMA mode and polling for end of each conversion (ADC init +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV). +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * In this case, DMA resets the flag EOC and polling cannot be +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * performed on each conversion. Nevertheless, polling can still +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * be performed on the complete sequence (ADC init +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV). +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Timeout Timeout value in millisecond. +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart; +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_Flag_EOC; +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If end of conversion selected to end of sequence */ +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV) +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_Flag_EOC = ADC_FLAG_EOS; +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If end of conversion selected to end of each conversion */ +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else /* ADC_EOC_SINGLE_CONV */ +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification that ADC configuration is compliant with polling for */ +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* each conversion: */ +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Particular case is ADC configured in DMA mode and ADC sequencer with */ +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* several ranks and polling for end of each conversion. */ +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* For code simplicity sake, this particular case is generalized to */ +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC configured in DMA mode and and polling for end of each conversion. */ +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN)) +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); + ARM GAS /tmp/ccnlUpWq.s page 22 + + +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS); +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait until End of Conversion flag is raised */ +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC)) +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY) +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout)) +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to timeout */ +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_TIMEOUT; +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine */ +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */ +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccnlUpWq.s page 23 + + +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */ +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear end of conversion flag of regular group if low power feature */ +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature */ +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* until data register is read using function HAL_ADC_GetValue(). */ +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoWait == DISABLE) +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag */ +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS)); +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */ +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Poll for conversion event. +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param EventType the ADC event type. +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values: +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg ADC_AWD_EVENT: ADC Analog watchdog event +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg ADC_OVR_EVENT: ADC Overrun event +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Timeout Timeout value in millisecond. +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeou +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0; +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EVENT_TYPE(EventType)); +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check selected event flag */ +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET) +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */ +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY) +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to timeout */ +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT); +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ + ARM GAS /tmp/ccnlUpWq.s page 24 + + +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_TIMEOUT; +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch(EventType) +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Analog watchdog (level out of window) event */ +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case ADC_AWD_EVENT: +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC analog watchdog flag */ +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Overrun event */ +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default: /* Case ADC_OVR_EVENT */ +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If overrun is set to overwrite previous data, overrun event is not */ +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* considered as an error. */ +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun ") */ +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR); +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to overrun */ +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC Overrun flag */ +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */ +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group with interruption. +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - EOC (end of conversion of regular group) or EOS (end of +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * sequence of regular group) depending on ADC initialization +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - overrun (if available) +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc) +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + ARM GAS /tmp/ccnlUpWq.s page 25 + + +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */ +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */ +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */ +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC end of conversion interrupt */ +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC overrun interrupt */ +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch(hadc->Init.EOCSelection) +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case ADC_EOC_SEQ_CONV: +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */ +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default: +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */ +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ + ARM GAS /tmp/ccnlUpWq.s page 26 + + +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */ +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable interruption of +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * end-of-conversion, disable ADC peripheral. +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc) +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */ +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of conversion interrupt for regular group */ +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC overrun interrupt */ +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR)); +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ + ARM GAS /tmp/ccnlUpWq.s page 27 + + +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group and transfers result +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * through DMA. +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - DMA transfer complete +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - DMA half transfer +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - overrun +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param pData The destination Buffer address. +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Length The length of data to be transferred from ADC peripheral to memory. +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */ +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */ +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */ +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE) +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc); +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */ +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */ +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */ +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY); +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */ +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc); +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */ +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */ +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA transfer complete callback */ +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt; + ARM GAS /tmp/ccnlUpWq.s page 28 + + +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA half transfer complete callback */ +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt; +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA error callback */ +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError; +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */ +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* start (in case of SW start): */ +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */ +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */ +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */ +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR)); +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC overrun interrupt */ +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC DMA mode */ +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN; +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start the DMA channel */ +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length); +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */ +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */ +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */ +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */ +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART; +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY; +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC peripheral. +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function. +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc) +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); + ARM GAS /tmp/ccnlUpWq.s page 29 + + +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */ +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc); +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */ +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */ +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN; +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop while */ +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* while DMA transfer is on going) */ +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle); +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if DMA channel effectively disabled */ +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_OK) +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC overrun interrupt */ +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */ +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */ +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* in memory a potential failing status. */ +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc); +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_Disable(hadc); +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */ +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK) +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Get ADC regular group conversion result. +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Reading register DR automatically clears ADC flag EOC + ARM GAS /tmp/ccnlUpWq.s page 30 + + +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC group regular end of unitary conversion). +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function does not clear ADC flag EOS +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC group regular end of sequence conversion). +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Occurrence of flag EOS rising: +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - If sequencer is composed of 1 rank, flag EOS is equivalent +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * to flag EOC. +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - If sequencer is composed of several ranks, during the scan +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * sequence flag EOC only is raised, at the end of the scan sequence +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * both flags EOC and EOS are raised. +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * To clear this flag, either use function: +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * model polling: @ref HAL_ADC_PollForConversion() +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS). +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval ADC group regular conversion data +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc) +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: EOC flag is not cleared here by software because automatically */ +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* cleared by hardware when reading register DR. */ +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC converted value */ +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->Instance->DR; +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Handles ADC interrupt request. +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc) +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection)); +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check End of Conversion flag for regular group ========== */ +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) || +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL)) +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ + ARM GAS /tmp/ccnlUpWq.s page 31 + + +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */ +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */ +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: into callback, to determine if conversion has been triggered */ +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* from EOC or EOS, possibility to use: */ +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */ +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback(hadc); +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag */ +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */ +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion flags clear induces the release of the preserved data.*/ +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Therefore, if the preserved data value is needed, it must be */ +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* read preliminarily into HAL_ADC_ConvCpltCallback(). */ +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) ); +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check Analog watchdog flags ========== */ +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD)) +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1); +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback(hadc); +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_LevelOutOfWindowCallback(hadc); +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + ARM GAS /tmp/ccnlUpWq.s page 32 + + +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC Analog watchdog flag */ +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD); +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check Overrun flag ========== */ +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR)) +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If overrun is set to overwrite previous data (default setting), */ +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun event is not considered as an error. */ +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */ +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun ") */ +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Exception for usage with DMA overrun event always considered as an */ +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* error. */ +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) || +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to overrun */ +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR); +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC overrun flag */ +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback(hadc); +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the Overrun flag */ +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR); +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Conversion complete callback in non blocking mode +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc) +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ConvCpltCallback must be implemented in the user file. +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Conversion DMA half-transfer callback in non blocking mode +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle + ARM GAS /tmp/ccnlUpWq.s page 33 + + +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc) +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file. +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Analog watchdog callback in non blocking mode. +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc) +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file. +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief ADC error callback in non blocking mode +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC conversion with interruption or transfer by DMA) +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc) +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc); +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed, +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ErrorCallback must be implemented in the user file. +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Peripheral Control functions +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Peripheral Control functions ##### +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to: +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Configure channels on regular group + ARM GAS /tmp/ccnlUpWq.s page 34 + + +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Configure the analog watchdog +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Configures the the selected channel to be linked to the regular +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * group. +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note In case of usage of internal measurement channels: +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * VrefInt/Vbat/TempSensor. +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Sampling time constraints must be respected (sampling time can be +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * adjusted in function of ADC clock frequency and sampling time +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * setting). +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Refer to device datasheet for timings values, parameters TS_vrefint, +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * TS_vbat, TS_temp (values rough order: 5us to 17us). +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * These internal paths can be be disabled using function +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * HAL_ADC_DeInit(). +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes channel into regular group, following +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_ChannelConfTypeDef" on the fly, without reseting +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the ADC. +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_ChannelConfTypeDef". +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param sConfig Structure of ADC channel for regular group. +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig) +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(sConfig->Channel)); +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANK(sConfig->Rank)); +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime)); +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion on going on regular group: */ +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Channel number */ +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Channel sampling time */ +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */ +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configure channel: depending on rank setting, add it or remove it from */ + ARM GAS /tmp/ccnlUpWq.s page 35 + + +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC conversion sequencer. */ +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->Rank != ADC_RANK_NONE) +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Regular sequence configuration */ +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the channel selection register from the selected channel */ +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel); +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */ +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (obsolete): sampling time set in this function with */ +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameter "SamplingTime" (obsolete) only if not already set into */ +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC initialization structure with parameter "SamplingTimeCommon". */ +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon)) +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Modify sampling time if needed (not needed in case of reoccurrence */ +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* for several channels programmed consecutively into the sequencer) */ +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc)) +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */ +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the old sample time */ +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~(ADC_SMPR_SMP); +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the new sample time */ +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime); +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* internal measurement paths enable: If internal channel selected, */ +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enable dedicated internal buffers and path. */ +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: these internal measurement paths can be disabled using */ +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_ADC_DeInit() or removing the channel from sequencer with */ +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channel configuration parameter "Rank". */ +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_16 is selected, enable Temp. sensor measurement path. */ +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_17 is selected, enable VREFINT measurement path. */ +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_18 is selected, enable VBAT measurement path. */ +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Temp. sensor is selected, wait for stabilization delay */ +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for temperature sensor stabilization time */ +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Compute number of CPU cycles to wait for */ +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U)); +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index--; +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Regular sequence configuration */ +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset the channel selection register from the selected channel */ + ARM GAS /tmp/ccnlUpWq.s page 36 + + +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel); +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */ +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* internal measurement paths disable: If internal channel selected, */ +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* disable dedicated internal buffers and path. */ +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel)) +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_16 is selected, disable Temp. sensor measurement path. */ +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_17 is selected, disable VREFINT measurement path. */ +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_18 is selected, disable VBAT measurement path. */ +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel); +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If a conversion is on going on regular group, no update on regular */ +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channel could be done on neither of the channel configuration structure */ +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameters. */ +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Configures the analog watchdog. +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly: +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes the selected analog watchdog, following +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the ADC. +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state. +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_AnalogWDGConfTypeDef". +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param AnalogWDGConfig Structure of ADC analog watchdog configuration +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* Analog +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDHighThresholdShifted; +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDLowThresholdShifted; +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + ARM GAS /tmp/ccnlUpWq.s page 37 + + +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode)); +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode)); +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verify if threshold is within the selected ADC resolution */ +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold)); +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold)); +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG) +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel)); +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */ +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc); +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */ +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */ +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion on going on regular group: */ +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Analog watchdog channels */ +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Analog watchdog thresholds */ +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of analog watchdog: */ +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set the analog watchdog enable mode: one or overall group of */ +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channels. */ +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set the Analog watchdog channel (is not used if watchdog */ +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* mode "all channels": ADC_CFGR_AWD1SGL=0). */ +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL | +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDCH ); +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode | +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Shift the offset in function of the selected ADC resolution: Thresholds*/ +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */ +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThre +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the high and low thresholds */ +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT); +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the ADC Analog watchdog flag (in case of left enabled by */ +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */ +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* or HAL_ADC_PollForEvent(). */ +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD); +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configure ADC Analog watchdog interrupt */ +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(AnalogWDGConfig->ITMode == ENABLE) +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC Analog watchdog interrupt */ +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD); +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else + ARM GAS /tmp/ccnlUpWq.s page 38 + + +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC Analog watchdog interrupt */ +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD); +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If a conversion is on going on regular group, no update could be done */ +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* on neither of the AWD configuration structure parameters. */ +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR; +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */ +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc); +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */ +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status; +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Peripheral State functions +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Peripheral State and Errors functions ##### +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================================================== +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This subsection provides functions to get in run-time the status of the +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** peripheral. +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Check the ADC state +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Check the ADC error code +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Return the ADC state +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note ADC state machine is managed by bitfields, ADC status must be +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * compared with states bits. +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For example: +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) " +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) " +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL state +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ + ARM GAS /tmp/ccnlUpWq.s page 39 + + +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc) +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */ +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->State; +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Return the ADC error code +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval ADC Error Code +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc) +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->ErrorCode; +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @} +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{ +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enable the selected ADC. +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC must be disabled +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * and voltage regulator must be enabled (done into HAL_ADC_Init()). +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note If low power mode AutoPowerOff is enabled, power-on/off phases are +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * performed automatically by hardware. +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * In this mode, this function is useless and must not be called because +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * flag ADC_FLAG_RDY is not usable. +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Therefore, this function must be called under condition of +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)". +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc) +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC enable and wait for ADC ready (in case of ADC is disabled or */ +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enabling phase not yet completed: flag ADC ready not yet set). */ +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */ +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* causes: ADC clock not running, ...). */ +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET) +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if conditions to enable the ADC are fulfilled */ +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_ENABLING_CONDITIONS(hadc) == RESET) + ARM GAS /tmp/ccnlUpWq.s page 40 + + +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */ +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE(hadc); +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for ADC stabilization time */ +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Compute number of CPU cycles to wait for */ +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U)); +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index--; +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for ADC effectively enabled */ +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET) +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT) +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */ +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Disable the selected ADC. +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * stopped. +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc) +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification if ADC is not already disabled: */ + ARM GAS /tmp/ccnlUpWq.s page 41 + + +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */ +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* disabled. */ +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) != RESET) +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if conditions to disable the ADC are fulfilled */ +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_DISABLING_CONDITIONS(hadc) != RESET) +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC peripheral */ +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE(hadc); +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for ADC effectively disabled */ +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN)) +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT) +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */ +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion. +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * stopped to disable the ADC. +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status. +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc) +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 25 .loc 1 2311 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccnlUpWq.s page 42 + + + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 .LVL0: + 30 0000 70B5 push {r4, r5, r6, lr} + 31 .LCFI0: + 32 .cfi_def_cfa_offset 16 + 33 .cfi_offset 4, -16 + 34 .cfi_offset 5, -12 + 35 .cfi_offset 6, -8 + 36 .cfi_offset 14, -4 + 37 0002 0400 movs r4, r0 + 38 .LVL1: +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification if ADC is not already stopped on regular group to bypass */ +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* this function if not needed. */ +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc)) + 39 .loc 1 2319 0 + 40 0004 0368 ldr r3, [r0] + 41 0006 9A68 ldr r2, [r3, #8] + 42 0008 5207 lsls r2, r2, #29 + 43 000a 21D5 bpl .L6 +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop potential conversion on going on regular group */ +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */ +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) && + 44 .loc 1 2324 0 + 45 000c 9A68 ldr r2, [r3, #8] + 46 000e 5207 lsls r2, r2, #29 + 47 0010 06D5 bpl .L3 +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) + 48 .loc 1 2325 0 discriminator 1 + 49 0012 9A68 ldr r2, [r3, #8] +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) ) + 50 .loc 1 2324 0 discriminator 1 + 51 0014 9207 lsls r2, r2, #30 + 52 0016 03D4 bmi .L3 +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop conversions on regular group */ +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTP; + 53 .loc 1 2328 0 + 54 0018 9A68 ldr r2, [r3, #8] + 55 001a 1021 movs r1, #16 + 56 001c 0A43 orrs r2, r1 + 57 001e 9A60 str r2, [r3, #8] + 58 .L3: +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for conversion effectively stopped */ +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */ +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick(); + 59 .loc 1 2333 0 + 60 0020 FFF7FEFF bl HAL_GetTick + 61 .LVL2: + ARM GAS /tmp/ccnlUpWq.s page 43 + + + 62 0024 0500 movs r5, r0 + 63 .LVL3: + 64 .L4: +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET) + 65 .loc 1 2335 0 + 66 0026 2368 ldr r3, [r4] + 67 0028 9B68 ldr r3, [r3, #8] + 68 002a 5B07 lsls r3, r3, #29 + 69 002c 0ED5 bpl .L7 +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT) + 70 .loc 1 2337 0 + 71 002e FFF7FEFF bl HAL_GetTick + 72 .LVL4: + 73 0032 401B subs r0, r0, r5 + 74 0034 0228 cmp r0, #2 + 75 0036 F6D9 bls .L4 +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */ +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL); + 76 .loc 1 2340 0 + 77 0038 A36B ldr r3, [r4, #56] + 78 003a 1022 movs r2, #16 + 79 003c 1343 orrs r3, r2 + 80 003e A363 str r3, [r4, #56] +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); + 81 .loc 1 2343 0 + 82 0040 E36B ldr r3, [r4, #60] + 83 0042 0F3A subs r2, r2, #15 + 84 0044 1343 orrs r3, r2 + 85 0046 E363 str r3, [r4, #60] +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR; + 86 .loc 1 2345 0 + 87 0048 0120 movs r0, #1 + 88 004a 02E0 b .L2 + 89 .L7: +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */ +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK; + 90 .loc 1 2352 0 + 91 004c 0020 movs r0, #0 + 92 004e 00E0 b .L2 + 93 .LVL5: + 94 .L6: + 95 0050 0020 movs r0, #0 + 96 .LVL6: + 97 .L2: +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 98 .loc 1 2353 0 + ARM GAS /tmp/ccnlUpWq.s page 44 + + + 99 @ sp needed + 100 .LVL7: + 101 0052 70BD pop {r4, r5, r6, pc} + 102 .cfi_endproc + 103 .LFE64: + 105 .section .text.ADC_Disable,"ax",%progbits + 106 .align 1 + 107 .syntax unified + 108 .code 16 + 109 .thumb_func + 110 .fpu softvfp + 112 ADC_Disable: + 113 .LFB63: +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 114 .loc 1 2254 0 + 115 .cfi_startproc + 116 @ args = 0, pretend = 0, frame = 0 + 117 @ frame_needed = 0, uses_anonymous_args = 0 + 118 .LVL8: + 119 0000 70B5 push {r4, r5, r6, lr} + 120 .LCFI1: + 121 .cfi_def_cfa_offset 16 + 122 .cfi_offset 4, -16 + 123 .cfi_offset 5, -12 + 124 .cfi_offset 6, -8 + 125 .cfi_offset 14, -4 + 126 0002 0400 movs r4, r0 + 127 .LVL9: +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 128 .loc 1 2260 0 + 129 0004 0268 ldr r2, [r0] + 130 0006 9168 ldr r1, [r2, #8] + 131 0008 0323 movs r3, #3 + 132 000a 0B40 ands r3, r1 + 133 000c 012B cmp r3, #1 + 134 000e 01D0 beq .L16 +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 135 .loc 1 2299 0 + 136 0010 0020 movs r0, #0 + 137 .LVL10: + 138 .L9: +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 139 .loc 1 2300 0 + 140 @ sp needed + 141 .LVL11: + 142 0012 70BD pop {r4, r5, r6, pc} + 143 .LVL12: + 144 .L16: +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 145 .loc 1 2260 0 discriminator 1 + 146 0014 1368 ldr r3, [r2] + 147 0016 DB07 lsls r3, r3, #31 + 148 0018 02D4 bmi .L10 +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 149 .loc 1 2260 0 is_stmt 0 discriminator 4 + 150 001a D368 ldr r3, [r2, #12] + 151 001c 1B04 lsls r3, r3, #16 + ARM GAS /tmp/ccnlUpWq.s page 45 + + + 152 001e 2DD5 bpl .L15 + 153 .L10: +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 154 .loc 1 2263 0 is_stmt 1 + 155 0020 9168 ldr r1, [r2, #8] + 156 0022 0523 movs r3, #5 + 157 0024 0B40 ands r3, r1 + 158 0026 012B cmp r3, #1 + 159 0028 09D0 beq .L17 +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 160 .loc 1 2271 0 + 161 002a A36B ldr r3, [r4, #56] + 162 002c 1022 movs r2, #16 + 163 002e 1343 orrs r3, r2 + 164 0030 A363 str r3, [r4, #56] +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 165 .loc 1 2274 0 + 166 0032 E36B ldr r3, [r4, #60] + 167 0034 0F3A subs r2, r2, #15 + 168 0036 1343 orrs r3, r2 + 169 0038 E363 str r3, [r4, #60] +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 170 .loc 1 2276 0 + 171 003a 0120 movs r0, #1 + 172 .LVL13: + 173 003c E9E7 b .L9 + 174 .LVL14: + 175 .L17: +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 176 .loc 1 2266 0 + 177 003e 9368 ldr r3, [r2, #8] + 178 0040 0221 movs r1, #2 + 179 0042 0B43 orrs r3, r1 + 180 0044 9360 str r3, [r2, #8] + 181 0046 2368 ldr r3, [r4] + 182 0048 0322 movs r2, #3 + 183 004a 1A60 str r2, [r3] +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 184 .loc 1 2281 0 + 185 004c FFF7FEFF bl HAL_GetTick + 186 .LVL15: + 187 0050 0500 movs r5, r0 + 188 .LVL16: + 189 .L12: +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 190 .loc 1 2283 0 + 191 0052 2368 ldr r3, [r4] + 192 0054 9B68 ldr r3, [r3, #8] + 193 0056 DB07 lsls r3, r3, #31 + 194 0058 0ED5 bpl .L18 +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 195 .loc 1 2285 0 + 196 005a FFF7FEFF bl HAL_GetTick + 197 .LVL17: + 198 005e 401B subs r0, r0, r5 + 199 0060 0228 cmp r0, #2 + 200 0062 F6D9 bls .L12 + ARM GAS /tmp/ccnlUpWq.s page 46 + + +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 201 .loc 1 2288 0 + 202 0064 A36B ldr r3, [r4, #56] + 203 0066 1022 movs r2, #16 + 204 0068 1343 orrs r3, r2 + 205 006a A363 str r3, [r4, #56] +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 206 .loc 1 2291 0 + 207 006c E36B ldr r3, [r4, #60] + 208 006e 0F3A subs r2, r2, #15 + 209 0070 1343 orrs r3, r2 + 210 0072 E363 str r3, [r4, #60] +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 211 .loc 1 2293 0 + 212 0074 0120 movs r0, #1 + 213 0076 CCE7 b .L9 + 214 .L18: +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 215 .loc 1 2299 0 + 216 0078 0020 movs r0, #0 + 217 007a CAE7 b .L9 + 218 .LVL18: + 219 .L15: + 220 007c 0020 movs r0, #0 + 221 .LVL19: + 222 007e C8E7 b .L9 + 223 .cfi_endproc + 224 .LFE63: + 226 .global __aeabi_uidiv + 227 .section .text.ADC_Enable,"ax",%progbits + 228 .align 1 + 229 .syntax unified + 230 .code 16 + 231 .thumb_func + 232 .fpu softvfp + 234 ADC_Enable: + 235 .LFB62: +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U; + 236 .loc 1 2189 0 + 237 .cfi_startproc + 238 @ args = 0, pretend = 0, frame = 8 + 239 @ frame_needed = 0, uses_anonymous_args = 0 + 240 .LVL20: + 241 0000 30B5 push {r4, r5, lr} + 242 .LCFI2: + 243 .cfi_def_cfa_offset 12 + 244 .cfi_offset 4, -12 + 245 .cfi_offset 5, -8 + 246 .cfi_offset 14, -4 + 247 0002 83B0 sub sp, sp, #12 + 248 .LCFI3: + 249 .cfi_def_cfa_offset 24 + 250 0004 0400 movs r4, r0 + 251 .LVL21: +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 252 .loc 1 2191 0 + 253 0006 0023 movs r3, #0 + ARM GAS /tmp/ccnlUpWq.s page 47 + + + 254 0008 0193 str r3, [sp, #4] +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 255 .loc 1 2197 0 + 256 000a 0368 ldr r3, [r0] + 257 000c 9968 ldr r1, [r3, #8] + 258 000e 0322 movs r2, #3 + 259 0010 0A40 ands r2, r1 + 260 0012 012A cmp r2, #1 + 261 0014 0ED0 beq .L29 + 262 .L20: +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 263 .loc 1 2200 0 + 264 0016 9968 ldr r1, [r3, #8] + 265 0018 204A ldr r2, .L32 + 266 001a 1142 tst r1, r2 + 267 001c 12D1 bne .L30 +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 268 .loc 1 2212 0 + 269 001e 9A68 ldr r2, [r3, #8] + 270 0020 0121 movs r1, #1 + 271 0022 0A43 orrs r2, r1 + 272 0024 9A60 str r2, [r3, #8] +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 273 .loc 1 2216 0 + 274 0026 1E4B ldr r3, .L32+4 + 275 0028 1868 ldr r0, [r3] + 276 .LVL22: + 277 002a 1E49 ldr r1, .L32+8 + 278 002c FFF7FEFF bl __aeabi_uidiv + 279 .LVL23: + 280 0030 0190 str r0, [sp, #4] +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 281 .loc 1 2217 0 + 282 0032 15E0 b .L23 + 283 .LVL24: + 284 .L29: +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 285 .loc 1 2197 0 discriminator 1 + 286 0034 1A68 ldr r2, [r3] + 287 0036 D207 lsls r2, r2, #31 + 288 0038 2DD4 bmi .L27 +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 289 .loc 1 2197 0 is_stmt 0 discriminator 4 + 290 003a DA68 ldr r2, [r3, #12] + 291 003c 1204 lsls r2, r2, #16 + 292 003e EAD5 bpl .L20 +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 293 .loc 1 2243 0 is_stmt 1 + 294 0040 0020 movs r0, #0 + 295 .LVL25: + 296 0042 08E0 b .L21 + 297 .LVL26: + 298 .L30: +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 299 .loc 1 2203 0 + 300 0044 A36B ldr r3, [r4, #56] + 301 0046 1022 movs r2, #16 + ARM GAS /tmp/ccnlUpWq.s page 48 + + + 302 0048 1343 orrs r3, r2 + 303 004a A363 str r3, [r4, #56] +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 304 .loc 1 2206 0 + 305 004c E36B ldr r3, [r4, #60] + 306 004e 0F3A subs r2, r2, #15 + 307 0050 1343 orrs r3, r2 + 308 0052 E363 str r3, [r4, #60] +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 309 .loc 1 2208 0 + 310 0054 0120 movs r0, #1 + 311 .LVL27: + 312 .L21: +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 313 .loc 1 2244 0 + 314 0056 03B0 add sp, sp, #12 + 315 @ sp needed + 316 .LVL28: + 317 0058 30BD pop {r4, r5, pc} + 318 .LVL29: + 319 .L24: +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 320 .loc 1 2219 0 + 321 005a 019B ldr r3, [sp, #4] + 322 005c 013B subs r3, r3, #1 + 323 005e 0193 str r3, [sp, #4] + 324 .L23: +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 325 .loc 1 2217 0 + 326 0060 019B ldr r3, [sp, #4] + 327 0062 002B cmp r3, #0 + 328 0064 F9D1 bne .L24 +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 329 .loc 1 2223 0 + 330 0066 FFF7FEFF bl HAL_GetTick + 331 .LVL30: + 332 006a 0500 movs r5, r0 + 333 .LVL31: + 334 .L25: +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 335 .loc 1 2226 0 + 336 006c 2368 ldr r3, [r4] + 337 006e 1B68 ldr r3, [r3] + 338 0070 DB07 lsls r3, r3, #31 + 339 0072 0ED4 bmi .L31 +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 340 .loc 1 2228 0 + 341 0074 FFF7FEFF bl HAL_GetTick + 342 .LVL32: + 343 0078 401B subs r0, r0, r5 + 344 007a 0228 cmp r0, #2 + 345 007c F6D9 bls .L25 +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 346 .loc 1 2231 0 + 347 007e A36B ldr r3, [r4, #56] + 348 0080 1022 movs r2, #16 + 349 0082 1343 orrs r3, r2 + ARM GAS /tmp/ccnlUpWq.s page 49 + + + 350 0084 A363 str r3, [r4, #56] +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 351 .loc 1 2234 0 + 352 0086 E36B ldr r3, [r4, #60] + 353 0088 0F3A subs r2, r2, #15 + 354 008a 1343 orrs r3, r2 + 355 008c E363 str r3, [r4, #60] +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 356 .loc 1 2236 0 + 357 008e 0120 movs r0, #1 + 358 0090 E1E7 b .L21 + 359 .L31: +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 360 .loc 1 2243 0 + 361 0092 0020 movs r0, #0 + 362 0094 DFE7 b .L21 + 363 .LVL33: + 364 .L27: + 365 0096 0020 movs r0, #0 + 366 .LVL34: + 367 0098 DDE7 b .L21 + 368 .L33: + 369 009a C046 .align 2 + 370 .L32: + 371 009c 17000080 .word -2147483625 + 372 00a0 00000000 .word SystemCoreClock + 373 00a4 40420F00 .word 1000000 + 374 .cfi_endproc + 375 .LFE62: + 377 .section .text.HAL_ADC_MspInit,"ax",%progbits + 378 .align 1 + 379 .weak HAL_ADC_MspInit + 380 .syntax unified + 381 .code 16 + 382 .thumb_func + 383 .fpu softvfp + 385 HAL_ADC_MspInit: + 386 .LFB42: + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 387 .loc 1 775 0 + 388 .cfi_startproc + 389 @ args = 0, pretend = 0, frame = 0 + 390 @ frame_needed = 0, uses_anonymous_args = 0 + 391 @ link register save eliminated. + 392 .LVL35: + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 393 .loc 1 782 0 + 394 @ sp needed + 395 0000 7047 bx lr + 396 .cfi_endproc + 397 .LFE42: + 399 .section .text.HAL_ADC_Init,"ax",%progbits + 400 .align 1 + 401 .global HAL_ADC_Init + 402 .syntax unified + 403 .code 16 + 404 .thumb_func + ARM GAS /tmp/ccnlUpWq.s page 50 + + + 405 .fpu softvfp + 407 HAL_ADC_Init: + 408 .LFB40: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 409 .loc 1 407 0 + 410 .cfi_startproc + 411 @ args = 0, pretend = 0, frame = 0 + 412 @ frame_needed = 0, uses_anonymous_args = 0 + 413 .LVL36: + 414 0000 70B5 push {r4, r5, r6, lr} + 415 .LCFI4: + 416 .cfi_def_cfa_offset 16 + 417 .cfi_offset 4, -16 + 418 .cfi_offset 5, -12 + 419 .cfi_offset 6, -8 + 420 .cfi_offset 14, -4 + 421 0002 041E subs r4, r0, #0 + 422 .LVL37: + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 423 .loc 1 412 0 + 424 0004 00D1 bne .LCB388 + 425 0006 B1E0 b .L49 @long jump + 426 .LCB388: + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 427 .loc 1 441 0 + 428 0008 836B ldr r3, [r0, #56] + 429 000a 002B cmp r3, #0 + 430 000c 7ED0 beq .L51 + 431 .LVL38: + 432 .L37: + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) && + 433 .loc 1 474 0 + 434 000e A36B ldr r3, [r4, #56] + 435 0010 DB06 lsls r3, r3, #27 + 436 0012 00D5 bpl .LCB398 + 437 0014 A4E0 b .L38 @long jump + 438 .LCB398: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 439 .loc 1 476 0 + 440 0016 2168 ldr r1, [r4] + 441 0018 8B68 ldr r3, [r1, #8] + 442 001a 0422 movs r2, #4 + 443 001c 1A40 ands r2, r3 + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) ) + 444 .loc 1 475 0 + 445 001e 00D0 beq .LCB404 + 446 0020 9EE0 b .L38 @long jump + 447 .LCB404: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 448 .loc 1 479 0 + 449 0022 A36B ldr r3, [r4, #56] + 450 0024 5248 ldr r0, .L56 + 451 0026 0340 ands r3, r0 + 452 0028 0630 adds r0, r0, #6 + 453 002a FF30 adds r0, r0, #255 + 454 002c 0343 orrs r3, r0 + 455 002e A363 str r3, [r4, #56] + ARM GAS /tmp/ccnlUpWq.s page 51 + + + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 456 .loc 1 488 0 + 457 0030 8868 ldr r0, [r1, #8] + 458 0032 0323 movs r3, #3 + 459 0034 0340 ands r3, r0 + 460 0036 012B cmp r3, #1 + 461 0038 6ED0 beq .L52 + 462 .L39: + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_RES , + 463 .loc 1 499 0 + 464 003a CB68 ldr r3, [r1, #12] + 465 003c 1820 movs r0, #24 + 466 003e 8343 bics r3, r0 + 467 0040 A068 ldr r0, [r4, #8] + 468 0042 0343 orrs r3, r0 + 469 0044 CB60 str r3, [r1, #12] + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR2_CKMODE , + 470 .loc 1 505 0 + 471 0046 2168 ldr r1, [r4] + 472 0048 0B69 ldr r3, [r1, #16] + 473 004a 9B00 lsls r3, r3, #2 + 474 004c 9B08 lsrs r3, r3, #2 + 475 004e 6068 ldr r0, [r4, #4] + 476 0050 0343 orrs r3, r0 + 477 0052 0B61 str r3, [r1, #16] + 478 .L40: + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | + 479 .loc 1 522 0 + 480 0054 2168 ldr r1, [r4] + 481 0056 CB68 ldr r3, [r1, #12] + 482 0058 4648 ldr r0, .L56+4 + 483 005a 0340 ands r3, r0 + 484 005c CB60 str r3, [r1, #12] + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 485 .loc 1 533 0 + 486 005e 237E ldrb r3, [r4, #24] + 487 0060 9B03 lsls r3, r3, #14 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 488 .loc 1 534 0 + 489 0062 617E ldrb r1, [r4, #25] + 490 0064 C903 lsls r1, r1, #15 + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) | + 491 .loc 1 533 0 + 492 0066 0B43 orrs r3, r1 + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 493 .loc 1 535 0 + 494 0068 A17E ldrb r1, [r4, #26] + 495 006a 4803 lsls r0, r1, #13 + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) | + 496 .loc 1 534 0 + 497 006c 0343 orrs r3, r0 + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 498 .loc 1 536 0 + 499 006e A06A ldr r0, [r4, #40] + 500 0070 0128 cmp r0, #1 + 501 0072 58D0 beq .L50 + 502 0074 8020 movs r0, #128 + ARM GAS /tmp/ccnlUpWq.s page 52 + + + 503 0076 4001 lsls r0, r0, #5 + 504 .L41: + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) | + 505 .loc 1 535 0 + 506 0078 0343 orrs r3, r0 + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 507 .loc 1 536 0 + 508 007a E068 ldr r0, [r4, #12] + 509 007c 0343 orrs r3, r0 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 510 .loc 1 538 0 + 511 007e 2069 ldr r0, [r4, #16] + 512 0080 0228 cmp r0, #2 + 513 0082 52D0 beq .L53 + 514 .L42: + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) | + 515 .loc 1 537 0 + 516 0084 1343 orrs r3, r2 + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 517 .loc 1 539 0 + 518 0086 2422 movs r2, #36 + 519 0088 A25C ldrb r2, [r4, r2] + 520 008a 5200 lsls r2, r2, #1 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 521 .loc 1 538 0 + 522 008c 1343 orrs r3, r2 + 523 .LVL39: + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 524 .loc 1 542 0 + 525 008e E27E ldrb r2, [r4, #27] + 526 0090 012A cmp r2, #1 + 527 0092 4CD0 beq .L54 + 528 .L43: + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 529 .loc 1 568 0 + 530 0094 E269 ldr r2, [r4, #28] + 531 0096 C221 movs r1, #194 + 532 0098 FF31 adds r1, r1, #255 + 533 009a 8A42 cmp r2, r1 + 534 009c 02D0 beq .L45 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge ); + 535 .loc 1 570 0 + 536 009e 216A ldr r1, [r4, #32] + 537 00a0 0A43 orrs r2, r1 + 538 00a2 1343 orrs r3, r2 + 539 .LVL40: + 540 .L45: + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 541 .loc 1 575 0 + 542 00a4 2168 ldr r1, [r4] + 543 00a6 CA68 ldr r2, [r1, #12] + 544 00a8 1A43 orrs r2, r3 + 545 00aa CA60 str r2, [r1, #12] + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 546 .loc 1 583 0 + 547 00ac E26A ldr r2, [r4, #44] + 548 00ae 8021 movs r1, #128 + ARM GAS /tmp/ccnlUpWq.s page 53 + + + 549 00b0 4905 lsls r1, r1, #21 + 550 00b2 8A42 cmp r2, r1 + 551 00b4 0DD0 beq .L46 + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 552 .loc 1 583 0 is_stmt 0 discriminator 1 + 553 00b6 012A cmp r2, #1 + 554 00b8 0BD0 beq .L46 + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 555 .loc 1 583 0 discriminator 2 + 556 00ba 022A cmp r2, #2 + 557 00bc 09D0 beq .L46 + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 558 .loc 1 583 0 discriminator 3 + 559 00be 032A cmp r2, #3 + 560 00c0 07D0 beq .L46 + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 561 .loc 1 583 0 discriminator 4 + 562 00c2 042A cmp r2, #4 + 563 00c4 05D0 beq .L46 + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 564 .loc 1 583 0 discriminator 5 + 565 00c6 052A cmp r2, #5 + 566 00c8 03D0 beq .L46 + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 567 .loc 1 583 0 discriminator 6 + 568 00ca 062A cmp r2, #6 + 569 00cc 01D0 beq .L46 + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 570 .loc 1 583 0 discriminator 7 + 571 00ce 072A cmp r2, #7 + 572 00d0 0AD1 bne .L47 + 573 .L46: + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 574 .loc 1 587 0 is_stmt 1 + 575 00d2 2068 ldr r0, [r4] + 576 00d4 4169 ldr r1, [r0, #20] + 577 00d6 0722 movs r2, #7 + 578 00d8 9143 bics r1, r2 + 579 00da 4161 str r1, [r0, #20] + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 580 .loc 1 590 0 + 581 00dc 2068 ldr r0, [r4] + 582 00de 4169 ldr r1, [r0, #20] + 583 00e0 E56A ldr r5, [r4, #44] + 584 00e2 2A40 ands r2, r5 + 585 00e4 0A43 orrs r2, r1 + 586 00e6 4261 str r2, [r0, #20] + 587 .L47: + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1) + 588 .loc 1 598 0 + 589 00e8 2268 ldr r2, [r4] + 590 00ea D268 ldr r2, [r2, #12] + 591 00ec 2249 ldr r1, .L56+8 + 592 00ee 0A40 ands r2, r1 + 593 00f0 9A42 cmp r2, r3 + 594 00f2 2BD0 beq .L55 + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + ARM GAS /tmp/ccnlUpWq.s page 54 + + + 595 .loc 1 612 0 + 596 00f4 A36B ldr r3, [r4, #56] + 597 .LVL41: + 598 00f6 1222 movs r2, #18 + 599 00f8 9343 bics r3, r2 + 600 00fa 023A subs r2, r2, #2 + 601 00fc 1343 orrs r3, r2 + 602 00fe A363 str r3, [r4, #56] + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 603 .loc 1 617 0 + 604 0100 E36B ldr r3, [r4, #60] + 605 0102 0F3A subs r2, r2, #15 + 606 0104 1343 orrs r3, r2 + 607 0106 E363 str r3, [r4, #60] + 608 .LVL42: + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 609 .loc 1 619 0 + 610 0108 0120 movs r0, #1 + 611 010a 2EE0 b .L36 + 612 .LVL43: + 613 .L51: + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 614 .loc 1 444 0 + 615 010c C363 str r3, [r0, #60] + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 616 .loc 1 447 0 + 617 010e 3422 movs r2, #52 + 618 0110 8354 strb r3, [r0, r2] + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 619 .loc 1 465 0 + 620 0112 FFF7FEFF bl HAL_ADC_MspInit + 621 .LVL44: + 622 0116 7AE7 b .L37 + 623 .L52: + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 624 .loc 1 488 0 discriminator 1 + 625 0118 0B68 ldr r3, [r1] + 626 011a DB07 lsls r3, r3, #31 + 627 011c 9AD4 bmi .L40 + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 628 .loc 1 488 0 is_stmt 0 discriminator 4 + 629 011e CB68 ldr r3, [r1, #12] + 630 0120 1B04 lsls r3, r3, #16 + 631 0122 97D4 bmi .L40 + 632 0124 89E7 b .L39 + 633 .L50: + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign | + 634 .loc 1 536 0 is_stmt 1 + 635 0126 1000 movs r0, r2 + 636 0128 A6E7 b .L41 + 637 .L53: + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) ); + 638 .loc 1 538 0 + 639 012a 0422 movs r2, #4 + 640 012c AAE7 b .L42 + 641 .LVL45: + 642 .L54: + ARM GAS /tmp/ccnlUpWq.s page 55 + + + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 643 .loc 1 544 0 + 644 012e 0029 cmp r1, #0 + 645 0130 03D1 bne .L44 + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 646 .loc 1 547 0 + 647 0132 8022 movs r2, #128 + 648 0134 5202 lsls r2, r2, #9 + 649 0136 1343 orrs r3, r2 + 650 .LVL46: + 651 0138 ACE7 b .L43 + 652 .L44: + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 653 .loc 1 556 0 + 654 013a A26B ldr r2, [r4, #56] + 655 013c 2021 movs r1, #32 + 656 013e 0A43 orrs r2, r1 + 657 0140 A263 str r2, [r4, #56] + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 658 .loc 1 559 0 + 659 0142 E26B ldr r2, [r4, #60] + 660 0144 1F39 subs r1, r1, #31 + 661 0146 0A43 orrs r2, r1 + 662 0148 E263 str r2, [r4, #60] + 663 014a A3E7 b .L43 + 664 .L55: + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 665 .loc 1 602 0 + 666 014c 0023 movs r3, #0 + 667 .LVL47: + 668 014e E363 str r3, [r4, #60] + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 669 .loc 1 605 0 + 670 0150 A36B ldr r3, [r4, #56] + 671 0152 0322 movs r2, #3 + 672 0154 9343 bics r3, r2 + 673 0156 023A subs r2, r2, #2 + 674 0158 1343 orrs r3, r2 + 675 015a A363 str r3, [r4, #56] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpCFGR1 = 0U; + 676 .loc 1 408 0 + 677 015c 0020 movs r0, #0 + 678 015e 04E0 b .L36 + 679 .LVL48: + 680 .L38: + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 681 .loc 1 626 0 + 682 0160 A36B ldr r3, [r4, #56] + 683 0162 1022 movs r2, #16 + 684 0164 1343 orrs r3, r2 + 685 0166 A363 str r3, [r4, #56] + 686 .LVL49: + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 687 .loc 1 628 0 + 688 0168 0120 movs r0, #1 + 689 .LVL50: + 690 .L36: + ARM GAS /tmp/ccnlUpWq.s page 56 + + + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 691 .loc 1 633 0 + 692 @ sp needed + 693 .LVL51: + 694 016a 70BD pop {r4, r5, r6, pc} + 695 .LVL52: + 696 .L49: + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 697 .loc 1 414 0 + 698 016c 0120 movs r0, #1 + 699 .LVL53: + 700 016e FCE7 b .L36 + 701 .L57: + 702 .align 2 + 703 .L56: + 704 0170 FDFEFFFF .word -259 + 705 0174 1902FEFF .word -130535 + 706 0178 E7FF3F83 .word -2092957721 + 707 .cfi_endproc + 708 .LFE40: + 710 .section .text.HAL_ADC_MspDeInit,"ax",%progbits + 711 .align 1 + 712 .weak HAL_ADC_MspDeInit + 713 .syntax unified + 714 .code 16 + 715 .thumb_func + 716 .fpu softvfp + 718 HAL_ADC_MspDeInit: + 719 .LFB43: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 720 .loc 1 790 0 + 721 .cfi_startproc + 722 @ args = 0, pretend = 0, frame = 0 + 723 @ frame_needed = 0, uses_anonymous_args = 0 + 724 @ link register save eliminated. + 725 .LVL54: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 726 .loc 1 797 0 + 727 @ sp needed + 728 0000 7047 bx lr + 729 .cfi_endproc + 730 .LFE43: + 732 .section .text.HAL_ADC_DeInit,"ax",%progbits + 733 .align 1 + 734 .global HAL_ADC_DeInit + 735 .syntax unified + 736 .code 16 + 737 .thumb_func + 738 .fpu softvfp + 740 HAL_ADC_DeInit: + 741 .LFB41: + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 742 .loc 1 649 0 + 743 .cfi_startproc + 744 @ args = 0, pretend = 0, frame = 0 + 745 @ frame_needed = 0, uses_anonymous_args = 0 + 746 .LVL55: + ARM GAS /tmp/ccnlUpWq.s page 57 + + + 747 0000 70B5 push {r4, r5, r6, lr} + 748 .LCFI5: + 749 .cfi_def_cfa_offset 16 + 750 .cfi_offset 4, -16 + 751 .cfi_offset 5, -12 + 752 .cfi_offset 6, -8 + 753 .cfi_offset 14, -4 + 754 0002 041E subs r4, r0, #0 + 755 .LVL56: + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 756 .loc 1 653 0 + 757 0004 43D0 beq .L63 + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 758 .loc 1 662 0 + 759 0006 836B ldr r3, [r0, #56] + 760 0008 0222 movs r2, #2 + 761 000a 1343 orrs r3, r2 + 762 000c 8363 str r3, [r0, #56] + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 763 .loc 1 665 0 + 764 000e FFF7FEFF bl ADC_ConversionStop + 765 .LVL57: + 766 0012 051E subs r5, r0, #0 + 767 .LVL58: + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 768 .loc 1 668 0 + 769 0014 06D0 beq .L64 + 770 .LVL59: + 771 .L61: + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 772 .loc 1 684 0 + 773 0016 012D cmp r5, #1 + 774 0018 0DD1 bne .L65 + 775 .L62: + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 776 .loc 1 762 0 + 777 001a 3423 movs r3, #52 + 778 001c 0022 movs r2, #0 + 779 001e E254 strb r2, [r4, r3] + 780 .LVL60: + 781 .L60: + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 782 .loc 1 766 0 + 783 0020 2800 movs r0, r5 + 784 @ sp needed + 785 .LVL61: + 786 0022 70BD pop {r4, r5, r6, pc} + 787 .LVL62: + 788 .L64: + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 789 .loc 1 671 0 + 790 0024 2000 movs r0, r4 + 791 .LVL63: + 792 0026 FFF7FEFF bl ADC_Disable + 793 .LVL64: + 794 002a 0500 movs r5, r0 + 795 .LVL65: + ARM GAS /tmp/ccnlUpWq.s page 58 + + + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 796 .loc 1 674 0 + 797 002c 0128 cmp r0, #1 + 798 002e F2D0 beq .L61 + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 799 .loc 1 677 0 + 800 0030 0123 movs r3, #1 + 801 0032 A363 str r3, [r4, #56] + 802 0034 EFE7 b .L61 + 803 .LVL66: + 804 .L65: + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOS | ADC_IT_EOC | + 805 .loc 1 689 0 + 806 0036 2168 ldr r1, [r4] + 807 0038 4B68 ldr r3, [r1, #4] + 808 003a 9F22 movs r2, #159 + 809 003c 9343 bics r3, r2 + 810 003e 4B60 str r3, [r1, #4] + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOS | ADC_FLAG_EOC | + 811 .loc 1 694 0 + 812 0040 2368 ldr r3, [r4] + 813 0042 1A60 str r2, [r3] + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_ + 814 .loc 1 703 0 + 815 0044 2268 ldr r2, [r4] + 816 0046 D368 ldr r3, [r2, #12] + 817 0048 1249 ldr r1, .L66 + 818 004a 0B40 ands r3, r1 + 819 004c D360 str r3, [r2, #12] + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 820 .loc 1 711 0 + 821 004e 2268 ldr r2, [r4] + 822 0050 1369 ldr r3, [r2, #16] + 823 0052 9B00 lsls r3, r3, #2 + 824 0054 9B08 lsrs r3, r3, #2 + 825 0056 1361 str r3, [r2, #16] + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 826 .loc 1 714 0 + 827 0058 2268 ldr r2, [r4] + 828 005a 5369 ldr r3, [r2, #20] + 829 005c 0721 movs r1, #7 + 830 005e 8B43 bics r3, r1 + 831 0060 5361 str r3, [r2, #20] + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 832 .loc 1 717 0 + 833 0062 2268 ldr r2, [r4] + 834 0064 136A ldr r3, [r2, #32] + 835 0066 0C49 ldr r1, .L66+4 + 836 0068 0B40 ands r3, r1 + 837 006a 1362 str r3, [r2, #32] + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_ + 838 .loc 1 720 0 + 839 006c 2268 ldr r2, [r4] + 840 006e 936A ldr r3, [r2, #40] + 841 0070 DB0C lsrs r3, r3, #19 + 842 0072 DB04 lsls r3, r3, #19 + 843 0074 9362 str r3, [r2, #40] + ARM GAS /tmp/ccnlUpWq.s page 59 + + + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 844 .loc 1 730 0 + 845 0076 094A ldr r2, .L66+8 + 846 0078 1368 ldr r3, [r2] + 847 007a 0949 ldr r1, .L66+12 + 848 007c 0B40 ands r3, r1 + 849 007e 1360 str r3, [r2] + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 850 .loc 1 751 0 + 851 0080 2000 movs r0, r4 + 852 0082 FFF7FEFF bl HAL_ADC_MspDeInit + 853 .LVL67: + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 854 .loc 1 755 0 + 855 0086 0023 movs r3, #0 + 856 0088 E363 str r3, [r4, #60] + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 857 .loc 1 758 0 + 858 008a A363 str r3, [r4, #56] + 859 008c C5E7 b .L62 + 860 .LVL68: + 861 .L63: + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 862 .loc 1 655 0 + 863 008e 0125 movs r5, #1 + 864 0090 C6E7 b .L60 + 865 .L67: + 866 0092 C046 .align 2 + 867 .L66: + 868 0094 00023E83 .word -2093088256 + 869 0098 00F000F0 .word -268374016 + 870 009c 08270140 .word 1073817352 + 871 00a0 FFFF3FFE .word -29360129 + 872 .cfi_endproc + 873 .LFE41: + 875 .section .text.HAL_ADC_Start,"ax",%progbits + 876 .align 1 + 877 .global HAL_ADC_Start + 878 .syntax unified + 879 .code 16 + 880 .thumb_func + 881 .fpu softvfp + 883 HAL_ADC_Start: + 884 .LFB44: +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 885 .loc 1 1028 0 + 886 .cfi_startproc + 887 @ args = 0, pretend = 0, frame = 0 + 888 @ frame_needed = 0, uses_anonymous_args = 0 + 889 .LVL69: + 890 0000 10B5 push {r4, lr} + 891 .LCFI6: + 892 .cfi_def_cfa_offset 8 + 893 .cfi_offset 4, -8 + 894 .cfi_offset 14, -4 + 895 0002 0400 movs r4, r0 + 896 .LVL70: + ARM GAS /tmp/ccnlUpWq.s page 60 + + +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 897 .loc 1 1035 0 + 898 0004 0368 ldr r3, [r0] + 899 0006 9B68 ldr r3, [r3, #8] + 900 0008 5B07 lsls r3, r3, #29 + 901 000a 23D4 bmi .L71 +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 902 .loc 1 1038 0 + 903 000c 3423 movs r3, #52 + 904 000e C35C ldrb r3, [r0, r3] + 905 0010 012B cmp r3, #1 + 906 0012 21D0 beq .L72 +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 907 .loc 1 1038 0 is_stmt 0 discriminator 2 + 908 0014 3423 movs r3, #52 + 909 0016 0122 movs r2, #1 + 910 0018 C254 strb r2, [r0, r3] +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 911 .loc 1 1043 0 is_stmt 1 discriminator 2 + 912 001a 437E ldrb r3, [r0, #25] + 913 001c 012B cmp r3, #1 + 914 001e 14D1 bne .L74 +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 915 .loc 1 1029 0 + 916 0020 0020 movs r0, #0 + 917 .LVL71: + 918 .L70: +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A + 919 .loc 1 1054 0 + 920 0022 A36B ldr r3, [r4, #56] + 921 0024 0D4A ldr r2, .L75 + 922 0026 1A40 ands r2, r3 + 923 0028 8023 movs r3, #128 + 924 002a 5B00 lsls r3, r3, #1 + 925 002c 1343 orrs r3, r2 + 926 002e A363 str r3, [r4, #56] +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 927 .loc 1 1059 0 + 928 0030 0023 movs r3, #0 + 929 0032 E363 str r3, [r4, #60] +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 930 .loc 1 1064 0 + 931 0034 3422 movs r2, #52 + 932 0036 A354 strb r3, [r4, r2] +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 933 .loc 1 1069 0 + 934 0038 2368 ldr r3, [r4] + 935 003a 183A subs r2, r2, #24 + 936 003c 1A60 str r2, [r3] +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 937 .loc 1 1075 0 + 938 003e 2268 ldr r2, [r4] + 939 0040 9368 ldr r3, [r2, #8] + 940 0042 0421 movs r1, #4 + 941 0044 0B43 orrs r3, r1 + 942 0046 9360 str r3, [r2, #8] + 943 .L69: + ARM GAS /tmp/ccnlUpWq.s page 61 + + +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 944 .loc 1 1085 0 + 945 @ sp needed + 946 .LVL72: + 947 0048 10BD pop {r4, pc} + 948 .LVL73: + 949 .L74: +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 950 .loc 1 1045 0 + 951 004a FFF7FEFF bl ADC_Enable + 952 .LVL74: +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 953 .loc 1 1049 0 + 954 004e 0028 cmp r0, #0 + 955 0050 E7D0 beq .L70 + 956 0052 F9E7 b .L69 + 957 .LVL75: + 958 .L71: +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 959 .loc 1 1080 0 + 960 0054 0220 movs r0, #2 + 961 .LVL76: + 962 0056 F7E7 b .L69 + 963 .LVL77: + 964 .L72: +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 965 .loc 1 1038 0 + 966 0058 0220 movs r0, #2 + 967 .LVL78: + 968 005a F5E7 b .L69 + 969 .L76: + 970 .align 2 + 971 .L75: + 972 005c FEF0FFFF .word -3842 + 973 .cfi_endproc + 974 .LFE44: + 976 .section .text.HAL_ADC_Stop,"ax",%progbits + 977 .align 1 + 978 .global HAL_ADC_Stop + 979 .syntax unified + 980 .code 16 + 981 .thumb_func + 982 .fpu softvfp + 984 HAL_ADC_Stop: + 985 .LFB45: +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 986 .loc 1 1093 0 + 987 .cfi_startproc + 988 @ args = 0, pretend = 0, frame = 0 + 989 @ frame_needed = 0, uses_anonymous_args = 0 + 990 .LVL79: + 991 0000 10B5 push {r4, lr} + 992 .LCFI7: + 993 .cfi_def_cfa_offset 8 + 994 .cfi_offset 4, -8 + 995 .cfi_offset 14, -4 + 996 0002 0400 movs r4, r0 + ARM GAS /tmp/ccnlUpWq.s page 62 + + + 997 .LVL80: +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 998 .loc 1 1100 0 + 999 0004 3423 movs r3, #52 + 1000 0006 C35C ldrb r3, [r0, r3] + 1001 0008 012B cmp r3, #1 + 1002 000a 17D0 beq .L80 +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1003 .loc 1 1100 0 is_stmt 0 discriminator 2 + 1004 000c 3423 movs r3, #52 + 1005 000e 0122 movs r2, #1 + 1006 0010 C254 strb r2, [r0, r3] +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1007 .loc 1 1103 0 is_stmt 1 discriminator 2 + 1008 0012 FFF7FEFF bl ADC_ConversionStop + 1009 .LVL81: +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1010 .loc 1 1106 0 discriminator 2 + 1011 0016 0028 cmp r0, #0 + 1012 0018 03D0 beq .L81 + 1013 .LVL82: + 1014 .L79: +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1015 .loc 1 1122 0 + 1016 001a 3423 movs r3, #52 + 1017 001c 0022 movs r2, #0 + 1018 001e E254 strb r2, [r4, r3] + 1019 .LVL83: + 1020 .L78: +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1021 .loc 1 1126 0 + 1022 @ sp needed + 1023 .LVL84: + 1024 0020 10BD pop {r4, pc} + 1025 .LVL85: + 1026 .L81: +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1027 .loc 1 1109 0 + 1028 0022 2000 movs r0, r4 + 1029 .LVL86: + 1030 0024 FFF7FEFF bl ADC_Disable + 1031 .LVL87: +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1032 .loc 1 1112 0 + 1033 0028 0028 cmp r0, #0 + 1034 002a F6D1 bne .L79 +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1035 .loc 1 1115 0 + 1036 002c A36B ldr r3, [r4, #56] + 1037 002e 044A ldr r2, .L82 + 1038 0030 1340 ands r3, r2 + 1039 0032 0432 adds r2, r2, #4 + 1040 0034 FF32 adds r2, r2, #255 + 1041 0036 1343 orrs r3, r2 + 1042 0038 A363 str r3, [r4, #56] + 1043 003a EEE7 b .L79 + 1044 .LVL88: + ARM GAS /tmp/ccnlUpWq.s page 63 + + + 1045 .L80: +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1046 .loc 1 1100 0 + 1047 003c 0220 movs r0, #2 + 1048 .LVL89: + 1049 003e EFE7 b .L78 + 1050 .L83: + 1051 .align 2 + 1052 .L82: + 1053 0040 FEFEFFFF .word -258 + 1054 .cfi_endproc + 1055 .LFE45: + 1057 .section .text.HAL_ADC_PollForConversion,"ax",%progbits + 1058 .align 1 + 1059 .global HAL_ADC_PollForConversion + 1060 .syntax unified + 1061 .code 16 + 1062 .thumb_func + 1063 .fpu softvfp + 1065 HAL_ADC_PollForConversion: + 1066 .LFB46: +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart; + 1067 .loc 1 1147 0 + 1068 .cfi_startproc + 1069 @ args = 0, pretend = 0, frame = 0 + 1070 @ frame_needed = 0, uses_anonymous_args = 0 + 1071 .LVL90: + 1072 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1073 .LCFI8: + 1074 .cfi_def_cfa_offset 24 + 1075 .cfi_offset 3, -24 + 1076 .cfi_offset 4, -20 + 1077 .cfi_offset 5, -16 + 1078 .cfi_offset 6, -12 + 1079 .cfi_offset 7, -8 + 1080 .cfi_offset 14, -4 + 1081 0002 0400 movs r4, r0 + 1082 0004 0D00 movs r5, r1 +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1083 .loc 1 1155 0 + 1084 0006 4369 ldr r3, [r0, #20] + 1085 0008 082B cmp r3, #8 + 1086 000a 26D0 beq .L93 +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1087 .loc 1 1168 0 + 1088 000c 0368 ldr r3, [r0] + 1089 000e DB68 ldr r3, [r3, #12] + 1090 0010 DB07 lsls r3, r3, #31 + 1091 0012 19D4 bmi .L96 +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1092 .loc 1 1180 0 + 1093 0014 0C26 movs r6, #12 + 1094 .L85: + 1095 .LVL91: +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1096 .loc 1 1185 0 + 1097 0016 FFF7FEFF bl HAL_GetTick + ARM GAS /tmp/ccnlUpWq.s page 64 + + + 1098 .LVL92: + 1099 001a 0700 movs r7, r0 + 1100 .LVL93: + 1101 .L88: +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1102 .loc 1 1188 0 + 1103 001c 2368 ldr r3, [r4] + 1104 001e 1A68 ldr r2, [r3] + 1105 0020 1642 tst r6, r2 + 1106 0022 1CD1 bne .L97 +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1107 .loc 1 1191 0 + 1108 0024 6B1C adds r3, r5, #1 + 1109 0026 F9D0 beq .L88 +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1110 .loc 1 1193 0 + 1111 0028 002D cmp r5, #0 + 1112 002a 04D0 beq .L89 +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1113 .loc 1 1193 0 is_stmt 0 discriminator 1 + 1114 002c FFF7FEFF bl HAL_GetTick + 1115 .LVL94: + 1116 0030 C01B subs r0, r0, r7 + 1117 0032 A842 cmp r0, r5 + 1118 0034 F2D9 bls .L88 + 1119 .L89: +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1120 .loc 1 1196 0 is_stmt 1 + 1121 0036 A36B ldr r3, [r4, #56] + 1122 0038 0422 movs r2, #4 + 1123 003a 1343 orrs r3, r2 + 1124 003c A363 str r3, [r4, #56] +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1125 .loc 1 1199 0 + 1126 003e 3423 movs r3, #52 + 1127 0040 0022 movs r2, #0 + 1128 0042 E254 strb r2, [r4, r3] +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1129 .loc 1 1201 0 + 1130 0044 0320 movs r0, #3 + 1131 0046 07E0 b .L86 + 1132 .LVL95: + 1133 .L96: +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1134 .loc 1 1171 0 + 1135 0048 836B ldr r3, [r0, #56] + 1136 004a 2022 movs r2, #32 + 1137 004c 1343 orrs r3, r2 + 1138 004e 8363 str r3, [r0, #56] +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1139 .loc 1 1174 0 + 1140 0050 3423 movs r3, #52 + 1141 0052 0022 movs r2, #0 + 1142 0054 C254 strb r2, [r0, r3] +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1143 .loc 1 1176 0 + 1144 0056 0120 movs r0, #1 + ARM GAS /tmp/ccnlUpWq.s page 65 + + + 1145 .LVL96: + 1146 .L86: +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1147 .loc 1 1254 0 + 1148 @ sp needed + 1149 .LVL97: + 1150 .LVL98: + 1151 0058 F8BD pop {r3, r4, r5, r6, r7, pc} + 1152 .LVL99: + 1153 .L93: +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1154 .loc 1 1157 0 + 1155 005a 0826 movs r6, #8 + 1156 005c DBE7 b .L85 + 1157 .LVL100: + 1158 .L97: +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1159 .loc 1 1207 0 + 1160 005e A16B ldr r1, [r4, #56] + 1161 0060 8022 movs r2, #128 + 1162 0062 9200 lsls r2, r2, #2 + 1163 0064 0A43 orrs r2, r1 + 1164 0066 A263 str r2, [r4, #56] +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1165 .loc 1 1211 0 + 1166 0068 D968 ldr r1, [r3, #12] + 1167 006a C022 movs r2, #192 + 1168 006c 1201 lsls r2, r2, #4 + 1169 006e 1142 tst r1, r2 + 1170 0070 13D1 bne .L91 +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1171 .loc 1 1212 0 discriminator 1 + 1172 0072 A27E ldrb r2, [r4, #26] +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1173 .loc 1 1211 0 discriminator 1 + 1174 0074 002A cmp r2, #0 + 1175 0076 10D1 bne .L91 +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1176 .loc 1 1215 0 + 1177 0078 1A68 ldr r2, [r3] + 1178 007a 1207 lsls r2, r2, #28 + 1179 007c 0DD5 bpl .L91 +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1180 .loc 1 1219 0 + 1181 007e 9A68 ldr r2, [r3, #8] + 1182 0080 5207 lsls r2, r2, #29 + 1183 0082 12D4 bmi .L92 +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1184 .loc 1 1225 0 + 1185 0084 5A68 ldr r2, [r3, #4] + 1186 0086 0C21 movs r1, #12 + 1187 0088 8A43 bics r2, r1 + 1188 008a 5A60 str r2, [r3, #4] +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1189 .loc 1 1228 0 + 1190 008c A36B ldr r3, [r4, #56] + 1191 008e 0C4A ldr r2, .L98 + ARM GAS /tmp/ccnlUpWq.s page 66 + + + 1192 0090 1340 ands r3, r2 + 1193 0092 0432 adds r2, r2, #4 + 1194 0094 FF32 adds r2, r2, #255 + 1195 0096 1343 orrs r3, r2 + 1196 0098 A363 str r3, [r4, #56] + 1197 .L91: +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1198 .loc 1 1246 0 + 1199 009a 237E ldrb r3, [r4, #24] + 1200 009c 002B cmp r3, #0 + 1201 009e 0DD1 bne .L95 +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1202 .loc 1 1249 0 + 1203 00a0 2368 ldr r3, [r4] + 1204 00a2 0C22 movs r2, #12 + 1205 00a4 1A60 str r2, [r3] +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1206 .loc 1 1253 0 + 1207 00a6 0020 movs r0, #0 + 1208 00a8 D6E7 b .L86 + 1209 .L92: +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1210 .loc 1 1235 0 + 1211 00aa A36B ldr r3, [r4, #56] + 1212 00ac 2022 movs r2, #32 + 1213 00ae 1343 orrs r3, r2 + 1214 00b0 A363 str r3, [r4, #56] +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1215 .loc 1 1238 0 + 1216 00b2 E36B ldr r3, [r4, #60] + 1217 00b4 1F3A subs r2, r2, #31 + 1218 00b6 1343 orrs r3, r2 + 1219 00b8 E363 str r3, [r4, #60] + 1220 00ba EEE7 b .L91 + 1221 .L95: +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1222 .loc 1 1253 0 + 1223 00bc 0020 movs r0, #0 + 1224 00be CBE7 b .L86 + 1225 .L99: + 1226 .align 2 + 1227 .L98: + 1228 00c0 FEFEFFFF .word -258 + 1229 .cfi_endproc + 1230 .LFE46: + 1232 .section .text.HAL_ADC_PollForEvent,"ax",%progbits + 1233 .align 1 + 1234 .global HAL_ADC_PollForEvent + 1235 .syntax unified + 1236 .code 16 + 1237 .thumb_func + 1238 .fpu softvfp + 1240 HAL_ADC_PollForEvent: + 1241 .LFB47: +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0; + 1242 .loc 1 1267 0 + 1243 .cfi_startproc + ARM GAS /tmp/ccnlUpWq.s page 67 + + + 1244 @ args = 0, pretend = 0, frame = 0 + 1245 @ frame_needed = 0, uses_anonymous_args = 0 + 1246 .LVL101: + 1247 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1248 .LCFI9: + 1249 .cfi_def_cfa_offset 24 + 1250 .cfi_offset 3, -24 + 1251 .cfi_offset 4, -20 + 1252 .cfi_offset 5, -16 + 1253 .cfi_offset 6, -12 + 1254 .cfi_offset 7, -8 + 1255 .cfi_offset 14, -4 + 1256 0002 0500 movs r5, r0 + 1257 0004 0C00 movs r4, r1 + 1258 0006 1600 movs r6, r2 + 1259 .LVL102: +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1260 .loc 1 1275 0 + 1261 0008 FFF7FEFF bl HAL_GetTick + 1262 .LVL103: + 1263 000c 0700 movs r7, r0 + 1264 .LVL104: + 1265 .L102: +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1266 .loc 1 1278 0 + 1267 000e 2A68 ldr r2, [r5] + 1268 0010 1368 ldr r3, [r2] + 1269 0012 2340 ands r3, r4 + 1270 0014 A342 cmp r3, r4 + 1271 0016 11D0 beq .L110 +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1272 .loc 1 1281 0 + 1273 0018 731C adds r3, r6, #1 + 1274 001a F8D0 beq .L102 +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1275 .loc 1 1283 0 + 1276 001c 002E cmp r6, #0 + 1277 001e 04D0 beq .L103 +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1278 .loc 1 1283 0 is_stmt 0 discriminator 1 + 1279 0020 FFF7FEFF bl HAL_GetTick + 1280 .LVL105: + 1281 0024 C01B subs r0, r0, r7 + 1282 0026 B042 cmp r0, r6 + 1283 0028 F1D9 bls .L102 + 1284 .L103: +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1285 .loc 1 1286 0 is_stmt 1 + 1286 002a AB6B ldr r3, [r5, #56] + 1287 002c 0422 movs r2, #4 + 1288 002e 1343 orrs r3, r2 + 1289 0030 AB63 str r3, [r5, #56] +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1290 .loc 1 1289 0 + 1291 0032 3423 movs r3, #52 + 1292 0034 0022 movs r2, #0 + 1293 0036 EA54 strb r2, [r5, r3] + ARM GAS /tmp/ccnlUpWq.s page 68 + + +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1294 .loc 1 1291 0 + 1295 0038 0320 movs r0, #3 + 1296 003a 07E0 b .L104 + 1297 .L110: +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1298 .loc 1 1296 0 + 1299 003c 802C cmp r4, #128 + 1300 003e 06D0 beq .L111 +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1301 .loc 1 1313 0 + 1302 0040 AB6A ldr r3, [r5, #40] + 1303 0042 012B cmp r3, #1 + 1304 0044 0CD0 beq .L112 + 1305 .L108: +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1306 .loc 1 1323 0 + 1307 0046 1023 movs r3, #16 + 1308 0048 1360 str r3, [r2] +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1309 .loc 1 1328 0 + 1310 004a 0020 movs r0, #0 + 1311 .L104: +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1312 .loc 1 1329 0 + 1313 @ sp needed + 1314 .LVL106: + 1315 .LVL107: + 1316 .LVL108: + 1317 .LVL109: + 1318 004c F8BD pop {r3, r4, r5, r6, r7, pc} + 1319 .LVL110: + 1320 .L111: +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1321 .loc 1 1301 0 + 1322 004e A96B ldr r1, [r5, #56] + 1323 0050 8023 movs r3, #128 + 1324 0052 5B02 lsls r3, r3, #9 + 1325 0054 0B43 orrs r3, r1 + 1326 0056 AB63 str r3, [r5, #56] +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1327 .loc 1 1304 0 + 1328 0058 8023 movs r3, #128 + 1329 005a 1360 str r3, [r2] +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1330 .loc 1 1328 0 + 1331 005c 0020 movs r0, #0 +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1332 .loc 1 1305 0 + 1333 005e F5E7 b .L104 + 1334 .L112: +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1335 .loc 1 1316 0 + 1336 0060 A96B ldr r1, [r5, #56] + 1337 0062 8023 movs r3, #128 + 1338 0064 DB00 lsls r3, r3, #3 + 1339 0066 0B43 orrs r3, r1 + ARM GAS /tmp/ccnlUpWq.s page 69 + + + 1340 0068 AB63 str r3, [r5, #56] +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1341 .loc 1 1319 0 + 1342 006a EB6B ldr r3, [r5, #60] + 1343 006c 0221 movs r1, #2 + 1344 006e 0B43 orrs r3, r1 + 1345 0070 EB63 str r3, [r5, #60] + 1346 0072 E8E7 b .L108 + 1347 .cfi_endproc + 1348 .LFE47: + 1350 .section .text.HAL_ADC_Start_IT,"ax",%progbits + 1351 .align 1 + 1352 .global HAL_ADC_Start_IT + 1353 .syntax unified + 1354 .code 16 + 1355 .thumb_func + 1356 .fpu softvfp + 1358 HAL_ADC_Start_IT: + 1359 .LFB48: +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1360 .loc 1 1343 0 + 1361 .cfi_startproc + 1362 @ args = 0, pretend = 0, frame = 0 + 1363 @ frame_needed = 0, uses_anonymous_args = 0 + 1364 .LVL111: + 1365 0000 10B5 push {r4, lr} + 1366 .LCFI10: + 1367 .cfi_def_cfa_offset 8 + 1368 .cfi_offset 4, -8 + 1369 .cfi_offset 14, -4 + 1370 0002 0400 movs r4, r0 + 1371 .LVL112: +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1372 .loc 1 1350 0 + 1373 0004 0368 ldr r3, [r0] + 1374 0006 9B68 ldr r3, [r3, #8] + 1375 0008 5B07 lsls r3, r3, #29 + 1376 000a 36D4 bmi .L119 +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1377 .loc 1 1353 0 + 1378 000c 3423 movs r3, #52 + 1379 000e C35C ldrb r3, [r0, r3] + 1380 0010 012B cmp r3, #1 + 1381 0012 34D0 beq .L120 +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1382 .loc 1 1353 0 is_stmt 0 discriminator 2 + 1383 0014 3423 movs r3, #52 + 1384 0016 0122 movs r2, #1 + 1385 0018 C254 strb r2, [r0, r3] +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1386 .loc 1 1358 0 is_stmt 1 discriminator 2 + 1387 001a 437E ldrb r3, [r0, #25] + 1388 001c 012B cmp r3, #1 + 1389 001e 21D1 bne .L123 +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1390 .loc 1 1344 0 + 1391 0020 0020 movs r0, #0 + ARM GAS /tmp/ccnlUpWq.s page 70 + + + 1392 .LVL113: + 1393 .L115: +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A + 1394 .loc 1 1369 0 + 1395 0022 A36B ldr r3, [r4, #56] + 1396 0024 174A ldr r2, .L124 + 1397 0026 1A40 ands r2, r3 + 1398 0028 8023 movs r3, #128 + 1399 002a 5B00 lsls r3, r3, #1 + 1400 002c 1343 orrs r3, r2 + 1401 002e A363 str r3, [r4, #56] +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1402 .loc 1 1374 0 + 1403 0030 0023 movs r3, #0 + 1404 0032 E363 str r3, [r4, #60] +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1405 .loc 1 1379 0 + 1406 0034 3422 movs r2, #52 + 1407 0036 A354 strb r3, [r4, r2] +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1408 .loc 1 1384 0 + 1409 0038 2368 ldr r3, [r4] + 1410 003a 183A subs r2, r2, #24 + 1411 003c 1A60 str r2, [r3] +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1412 .loc 1 1388 0 + 1413 003e 6369 ldr r3, [r4, #20] + 1414 0040 082B cmp r3, #8 + 1415 0042 14D1 bne .L122 +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR)); + 1416 .loc 1 1391 0 + 1417 0044 2268 ldr r2, [r4] + 1418 0046 5368 ldr r3, [r2, #4] + 1419 0048 0421 movs r1, #4 + 1420 004a 8B43 bics r3, r1 + 1421 004c 5360 str r3, [r2, #4] +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1422 .loc 1 1392 0 + 1423 004e 2268 ldr r2, [r4] + 1424 0050 5368 ldr r3, [r2, #4] + 1425 0052 1431 adds r1, r1, #20 + 1426 0054 0B43 orrs r3, r1 + 1427 0056 5360 str r3, [r2, #4] + 1428 .L118: +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1429 .loc 1 1404 0 + 1430 0058 2268 ldr r2, [r4] + 1431 005a 9368 ldr r3, [r2, #8] + 1432 005c 0421 movs r1, #4 + 1433 005e 0B43 orrs r3, r1 + 1434 0060 9360 str r3, [r2, #8] + 1435 .L114: +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1436 .loc 1 1414 0 + 1437 @ sp needed + 1438 .LVL114: + 1439 0062 10BD pop {r4, pc} + ARM GAS /tmp/ccnlUpWq.s page 71 + + + 1440 .LVL115: + 1441 .L123: +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1442 .loc 1 1360 0 + 1443 0064 FFF7FEFF bl ADC_Enable + 1444 .LVL116: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1445 .loc 1 1364 0 + 1446 0068 0028 cmp r0, #0 + 1447 006a DAD0 beq .L115 + 1448 006c F9E7 b .L114 + 1449 .LVL117: + 1450 .L122: +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break; + 1451 .loc 1 1396 0 + 1452 006e 2268 ldr r2, [r4] + 1453 0070 5368 ldr r3, [r2, #4] + 1454 0072 1C21 movs r1, #28 + 1455 0074 0B43 orrs r3, r1 + 1456 0076 5360 str r3, [r2, #4] +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1457 .loc 1 1397 0 + 1458 0078 EEE7 b .L118 + 1459 .LVL118: + 1460 .L119: +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1461 .loc 1 1409 0 + 1462 007a 0220 movs r0, #2 + 1463 .LVL119: + 1464 007c F1E7 b .L114 + 1465 .LVL120: + 1466 .L120: +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1467 .loc 1 1353 0 + 1468 007e 0220 movs r0, #2 + 1469 .LVL121: + 1470 0080 EFE7 b .L114 + 1471 .L125: + 1472 0082 C046 .align 2 + 1473 .L124: + 1474 0084 FEF0FFFF .word -3842 + 1475 .cfi_endproc + 1476 .LFE48: + 1478 .section .text.HAL_ADC_Stop_IT,"ax",%progbits + 1479 .align 1 + 1480 .global HAL_ADC_Stop_IT + 1481 .syntax unified + 1482 .code 16 + 1483 .thumb_func + 1484 .fpu softvfp + 1486 HAL_ADC_Stop_IT: + 1487 .LFB49: +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1488 .loc 1 1424 0 + 1489 .cfi_startproc + 1490 @ args = 0, pretend = 0, frame = 0 + 1491 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccnlUpWq.s page 72 + + + 1492 .LVL122: + 1493 0000 10B5 push {r4, lr} + 1494 .LCFI11: + 1495 .cfi_def_cfa_offset 8 + 1496 .cfi_offset 4, -8 + 1497 .cfi_offset 14, -4 + 1498 0002 0400 movs r4, r0 + 1499 .LVL123: +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1500 .loc 1 1431 0 + 1501 0004 3423 movs r3, #52 + 1502 0006 C35C ldrb r3, [r0, r3] + 1503 0008 012B cmp r3, #1 + 1504 000a 1CD0 beq .L129 +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1505 .loc 1 1431 0 is_stmt 0 discriminator 2 + 1506 000c 3423 movs r3, #52 + 1507 000e 0122 movs r2, #1 + 1508 0010 C254 strb r2, [r0, r3] +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1509 .loc 1 1434 0 is_stmt 1 discriminator 2 + 1510 0012 FFF7FEFF bl ADC_ConversionStop + 1511 .LVL124: +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1512 .loc 1 1437 0 discriminator 2 + 1513 0016 0028 cmp r0, #0 + 1514 0018 03D0 beq .L130 + 1515 .LVL125: + 1516 .L128: +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1517 .loc 1 1457 0 + 1518 001a 3423 movs r3, #52 + 1519 001c 0022 movs r2, #0 + 1520 001e E254 strb r2, [r4, r3] + 1521 .LVL126: + 1522 .L127: +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1523 .loc 1 1461 0 + 1524 @ sp needed + 1525 .LVL127: + 1526 0020 10BD pop {r4, pc} + 1527 .LVL128: + 1528 .L130: +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1529 .loc 1 1441 0 + 1530 0022 2268 ldr r2, [r4] + 1531 0024 5368 ldr r3, [r2, #4] + 1532 0026 1C21 movs r1, #28 + 1533 0028 8B43 bics r3, r1 + 1534 002a 5360 str r3, [r2, #4] +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1535 .loc 1 1444 0 + 1536 002c 2000 movs r0, r4 + 1537 .LVL129: + 1538 002e FFF7FEFF bl ADC_Disable + 1539 .LVL130: +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccnlUpWq.s page 73 + + + 1540 .loc 1 1447 0 + 1541 0032 0028 cmp r0, #0 + 1542 0034 F1D1 bne .L128 +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1543 .loc 1 1450 0 + 1544 0036 A36B ldr r3, [r4, #56] + 1545 0038 044A ldr r2, .L131 + 1546 003a 1340 ands r3, r2 + 1547 003c 0432 adds r2, r2, #4 + 1548 003e FF32 adds r2, r2, #255 + 1549 0040 1343 orrs r3, r2 + 1550 0042 A363 str r3, [r4, #56] + 1551 0044 E9E7 b .L128 + 1552 .LVL131: + 1553 .L129: +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1554 .loc 1 1431 0 + 1555 0046 0220 movs r0, #2 + 1556 .LVL132: + 1557 0048 EAE7 b .L127 + 1558 .L132: + 1559 004a C046 .align 2 + 1560 .L131: + 1561 004c FEFEFFFF .word -258 + 1562 .cfi_endproc + 1563 .LFE49: + 1565 .section .text.HAL_ADC_Start_DMA,"ax",%progbits + 1566 .align 1 + 1567 .global HAL_ADC_Start_DMA + 1568 .syntax unified + 1569 .code 16 + 1570 .thumb_func + 1571 .fpu softvfp + 1573 HAL_ADC_Start_DMA: + 1574 .LFB50: +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1575 .loc 1 1477 0 + 1576 .cfi_startproc + 1577 @ args = 0, pretend = 0, frame = 0 + 1578 @ frame_needed = 0, uses_anonymous_args = 0 + 1579 .LVL133: + 1580 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 1581 .LCFI12: + 1582 .cfi_def_cfa_offset 24 + 1583 .cfi_offset 3, -24 + 1584 .cfi_offset 4, -20 + 1585 .cfi_offset 5, -16 + 1586 .cfi_offset 6, -12 + 1587 .cfi_offset 7, -8 + 1588 .cfi_offset 14, -4 + 1589 0002 0400 movs r4, r0 + 1590 0004 0E00 movs r6, r1 + 1591 0006 1700 movs r7, r2 + 1592 .LVL134: +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1593 .loc 1 1484 0 + 1594 0008 0368 ldr r3, [r0] + ARM GAS /tmp/ccnlUpWq.s page 74 + + + 1595 000a 9B68 ldr r3, [r3, #8] + 1596 000c 5B07 lsls r3, r3, #29 + 1597 000e 3ED4 bmi .L136 +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1598 .loc 1 1487 0 + 1599 0010 3423 movs r3, #52 + 1600 0012 C35C ldrb r3, [r0, r3] + 1601 0014 012B cmp r3, #1 + 1602 0016 3CD0 beq .L137 +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1603 .loc 1 1487 0 is_stmt 0 discriminator 2 + 1604 0018 3423 movs r3, #52 + 1605 001a 0122 movs r2, #1 + 1606 .LVL135: + 1607 001c C254 strb r2, [r0, r3] +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1608 .loc 1 1492 0 is_stmt 1 discriminator 2 + 1609 001e 437E ldrb r3, [r0, #25] + 1610 0020 012B cmp r3, #1 + 1611 0022 32D0 beq .L138 +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1612 .loc 1 1494 0 + 1613 0024 FFF7FEFF bl ADC_Enable + 1614 .LVL136: + 1615 0028 051E subs r5, r0, #0 + 1616 .LVL137: +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1617 .loc 1 1498 0 + 1618 002a 2CD1 bne .L134 + 1619 .LVL138: + 1620 .L135: +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A + 1621 .loc 1 1503 0 + 1622 002c A36B ldr r3, [r4, #56] + 1623 002e 1A4A ldr r2, .L139 + 1624 0030 1A40 ands r2, r3 + 1625 0032 8023 movs r3, #128 + 1626 0034 5B00 lsls r3, r3, #1 + 1627 0036 1343 orrs r3, r2 + 1628 0038 A363 str r3, [r4, #56] +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1629 .loc 1 1508 0 + 1630 003a 0023 movs r3, #0 + 1631 003c E363 str r3, [r4, #60] +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1632 .loc 1 1513 0 + 1633 003e 3422 movs r2, #52 + 1634 0040 A354 strb r3, [r4, r2] +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1635 .loc 1 1516 0 + 1636 0042 236B ldr r3, [r4, #48] + 1637 0044 154A ldr r2, .L139+4 + 1638 0046 9A62 str r2, [r3, #40] +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1639 .loc 1 1519 0 + 1640 0048 236B ldr r3, [r4, #48] + 1641 004a 154A ldr r2, .L139+8 + ARM GAS /tmp/ccnlUpWq.s page 75 + + + 1642 004c DA62 str r2, [r3, #44] +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1643 .loc 1 1522 0 + 1644 004e 236B ldr r3, [r4, #48] + 1645 0050 144A ldr r2, .L139+12 + 1646 0052 1A63 str r2, [r3, #48] +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1647 .loc 1 1531 0 + 1648 0054 2368 ldr r3, [r4] + 1649 0056 1C22 movs r2, #28 + 1650 0058 1A60 str r2, [r3] +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1651 .loc 1 1534 0 + 1652 005a 2268 ldr r2, [r4] + 1653 005c 5368 ldr r3, [r2, #4] + 1654 005e 1021 movs r1, #16 + 1655 0060 0B43 orrs r3, r1 + 1656 0062 5360 str r3, [r2, #4] +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1657 .loc 1 1537 0 + 1658 0064 2268 ldr r2, [r4] + 1659 0066 D368 ldr r3, [r2, #12] + 1660 0068 0F39 subs r1, r1, #15 + 1661 006a 0B43 orrs r3, r1 + 1662 006c D360 str r3, [r2, #12] +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1663 .loc 1 1540 0 + 1664 006e 2168 ldr r1, [r4] + 1665 0070 4031 adds r1, r1, #64 + 1666 0072 3B00 movs r3, r7 + 1667 0074 3200 movs r2, r6 + 1668 0076 206B ldr r0, [r4, #48] + 1669 0078 FFF7FEFF bl HAL_DMA_Start_IT + 1670 .LVL139: +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1671 .loc 1 1546 0 + 1672 007c 2268 ldr r2, [r4] + 1673 007e 9368 ldr r3, [r2, #8] + 1674 0080 0421 movs r1, #4 + 1675 0082 0B43 orrs r3, r1 + 1676 0084 9360 str r3, [r2, #8] + 1677 .L134: +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1678 .loc 1 1556 0 + 1679 0086 2800 movs r0, r5 + 1680 @ sp needed + 1681 .LVL140: + 1682 .LVL141: + 1683 .LVL142: + 1684 0088 F8BD pop {r3, r4, r5, r6, r7, pc} + 1685 .LVL143: + 1686 .L138: +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1687 .loc 1 1478 0 + 1688 008a 0025 movs r5, #0 + 1689 008c CEE7 b .L135 + 1690 .LVL144: + ARM GAS /tmp/ccnlUpWq.s page 76 + + + 1691 .L136: +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1692 .loc 1 1551 0 + 1693 008e 0225 movs r5, #2 + 1694 0090 F9E7 b .L134 + 1695 .L137: +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1696 .loc 1 1487 0 + 1697 0092 0225 movs r5, #2 + 1698 0094 F7E7 b .L134 + 1699 .L140: + 1700 0096 C046 .align 2 + 1701 .L139: + 1702 0098 FEF0FFFF .word -3842 + 1703 009c 00000000 .word ADC_DMAConvCplt + 1704 00a0 00000000 .word ADC_DMAHalfConvCplt + 1705 00a4 00000000 .word ADC_DMAError + 1706 .cfi_endproc + 1707 .LFE50: + 1709 .section .text.HAL_ADC_Stop_DMA,"ax",%progbits + 1710 .align 1 + 1711 .global HAL_ADC_Stop_DMA + 1712 .syntax unified + 1713 .code 16 + 1714 .thumb_func + 1715 .fpu softvfp + 1717 HAL_ADC_Stop_DMA: + 1718 .LFB51: +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 1719 .loc 1 1566 0 + 1720 .cfi_startproc + 1721 @ args = 0, pretend = 0, frame = 0 + 1722 @ frame_needed = 0, uses_anonymous_args = 0 + 1723 .LVL145: + 1724 0000 70B5 push {r4, r5, r6, lr} + 1725 .LCFI13: + 1726 .cfi_def_cfa_offset 16 + 1727 .cfi_offset 4, -16 + 1728 .cfi_offset 5, -12 + 1729 .cfi_offset 6, -8 + 1730 .cfi_offset 14, -4 + 1731 0002 0500 movs r5, r0 + 1732 .LVL146: +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1733 .loc 1 1573 0 + 1734 0004 3423 movs r3, #52 + 1735 0006 C35C ldrb r3, [r0, r3] + 1736 0008 012B cmp r3, #1 + 1737 000a 32D0 beq .L147 +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1738 .loc 1 1573 0 is_stmt 0 discriminator 2 + 1739 000c 3423 movs r3, #52 + 1740 000e 0122 movs r2, #1 + 1741 0010 C254 strb r2, [r0, r3] +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1742 .loc 1 1576 0 is_stmt 1 discriminator 2 + 1743 0012 FFF7FEFF bl ADC_ConversionStop + ARM GAS /tmp/ccnlUpWq.s page 77 + + + 1744 .LVL147: + 1745 0016 041E subs r4, r0, #0 + 1746 .LVL148: +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1747 .loc 1 1579 0 discriminator 2 + 1748 0018 04D0 beq .L148 + 1749 .LVL149: + 1750 .L143: +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1751 .loc 1 1622 0 + 1752 001a 3423 movs r3, #52 + 1753 001c 0022 movs r2, #0 + 1754 001e EA54 strb r2, [r5, r3] + 1755 .LVL150: + 1756 .L142: +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1757 .loc 1 1626 0 + 1758 0020 2000 movs r0, r4 + 1759 @ sp needed + 1760 .LVL151: + 1761 0022 70BD pop {r4, r5, r6, pc} + 1762 .LVL152: + 1763 .L148: +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1764 .loc 1 1582 0 + 1765 0024 2A68 ldr r2, [r5] + 1766 0026 D368 ldr r3, [r2, #12] + 1767 0028 0121 movs r1, #1 + 1768 002a 8B43 bics r3, r1 + 1769 002c D360 str r3, [r2, #12] +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1770 .loc 1 1586 0 + 1771 002e 286B ldr r0, [r5, #48] + 1772 .LVL153: + 1773 0030 FFF7FEFF bl HAL_DMA_Abort + 1774 .LVL154: + 1775 0034 041E subs r4, r0, #0 + 1776 .LVL155: +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1777 .loc 1 1589 0 + 1778 0036 03D0 beq .L144 +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1779 .loc 1 1592 0 + 1780 0038 AB6B ldr r3, [r5, #56] + 1781 003a 4022 movs r2, #64 + 1782 003c 1343 orrs r3, r2 + 1783 003e AB63 str r3, [r5, #56] + 1784 .L144: +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1785 .loc 1 1596 0 + 1786 0040 2A68 ldr r2, [r5] + 1787 0042 5368 ldr r3, [r2, #4] + 1788 0044 1021 movs r1, #16 + 1789 0046 8B43 bics r3, r1 + 1790 0048 5360 str r3, [r2, #4] +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1791 .loc 1 1601 0 + ARM GAS /tmp/ccnlUpWq.s page 78 + + + 1792 004a 002C cmp r4, #0 + 1793 004c 0DD1 bne .L145 +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1794 .loc 1 1603 0 + 1795 004e 2800 movs r0, r5 + 1796 .LVL156: + 1797 0050 FFF7FEFF bl ADC_Disable + 1798 .LVL157: + 1799 0054 0400 movs r4, r0 + 1800 .LVL158: + 1801 .L146: +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1802 .loc 1 1611 0 + 1803 0056 002C cmp r4, #0 + 1804 0058 DFD1 bne .L143 +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1805 .loc 1 1614 0 + 1806 005a AB6B ldr r3, [r5, #56] + 1807 005c 064A ldr r2, .L149 + 1808 005e 1340 ands r3, r2 + 1809 0060 0432 adds r2, r2, #4 + 1810 0062 FF32 adds r2, r2, #255 + 1811 0064 1343 orrs r3, r2 + 1812 0066 AB63 str r3, [r5, #56] + 1813 0068 D7E7 b .L143 + 1814 .LVL159: + 1815 .L145: +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1816 .loc 1 1607 0 + 1817 006a 2800 movs r0, r5 + 1818 .LVL160: + 1819 006c FFF7FEFF bl ADC_Disable + 1820 .LVL161: + 1821 0070 F1E7 b .L146 + 1822 .LVL162: + 1823 .L147: +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1824 .loc 1 1573 0 + 1825 0072 0224 movs r4, #2 + 1826 0074 D4E7 b .L142 + 1827 .L150: + 1828 0076 C046 .align 2 + 1829 .L149: + 1830 0078 FEFEFFFF .word -258 + 1831 .cfi_endproc + 1832 .LFE51: + 1834 .section .text.HAL_ADC_GetValue,"ax",%progbits + 1835 .align 1 + 1836 .global HAL_ADC_GetValue + 1837 .syntax unified + 1838 .code 16 + 1839 .thumb_func + 1840 .fpu softvfp + 1842 HAL_ADC_GetValue: + 1843 .LFB52: +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 1844 .loc 1 1648 0 + ARM GAS /tmp/ccnlUpWq.s page 79 + + + 1845 .cfi_startproc + 1846 @ args = 0, pretend = 0, frame = 0 + 1847 @ frame_needed = 0, uses_anonymous_args = 0 + 1848 @ link register save eliminated. + 1849 .LVL163: +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1850 .loc 1 1656 0 + 1851 0000 0368 ldr r3, [r0] + 1852 0002 186C ldr r0, [r3, #64] + 1853 .LVL164: +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1854 .loc 1 1657 0 + 1855 @ sp needed + 1856 0004 7047 bx lr + 1857 .cfi_endproc + 1858 .LFE52: + 1860 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits + 1861 .align 1 + 1862 .weak HAL_ADC_ConvCpltCallback + 1863 .syntax unified + 1864 .code 16 + 1865 .thumb_func + 1866 .fpu softvfp + 1868 HAL_ADC_ConvCpltCallback: + 1869 .LFB54: +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 1870 .loc 1 1790 0 + 1871 .cfi_startproc + 1872 @ args = 0, pretend = 0, frame = 0 + 1873 @ frame_needed = 0, uses_anonymous_args = 0 + 1874 @ link register save eliminated. + 1875 .LVL165: +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1876 .loc 1 1797 0 + 1877 @ sp needed + 1878 0000 7047 bx lr + 1879 .cfi_endproc + 1880 .LFE54: + 1882 .section .text.ADC_DMAConvCplt,"ax",%progbits + 1883 .align 1 + 1884 .syntax unified + 1885 .code 16 + 1886 .thumb_func + 1887 .fpu softvfp + 1889 ADC_DMAConvCplt: + 1890 .LFB65: +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA transfer complete callback. +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle. +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma) +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1891 .loc 1 2362 0 + 1892 .cfi_startproc + ARM GAS /tmp/ccnlUpWq.s page 80 + + + 1893 @ args = 0, pretend = 0, frame = 0 + 1894 @ frame_needed = 0, uses_anonymous_args = 0 + 1895 .LVL166: + 1896 0000 10B5 push {r4, lr} + 1897 .LCFI14: + 1898 .cfi_def_cfa_offset 8 + 1899 .cfi_offset 4, -8 + 1900 .cfi_offset 14, -4 +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + 1901 .loc 1 2364 0 + 1902 0002 436A ldr r3, [r0, #36] + 1903 .LVL167: +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */ +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA)) + 1904 .loc 1 2367 0 + 1905 0004 9A6B ldr r2, [r3, #56] + 1906 0006 5021 movs r1, #80 + 1907 0008 1142 tst r1, r2 + 1908 000a 03D0 beq .L158 +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC); +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */ +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */ +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) && +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */ +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) ) +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */ +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */ +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */ +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */ +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */ +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */ +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS); +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY); +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */ +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */ +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL); +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + ARM GAS /tmp/ccnlUpWq.s page 81 + + +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Conversion complete callback */ +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback(hadc); +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc); +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else +2414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Call DMA error callback */ +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback(hdma); + 1909 .loc 1 2416 0 + 1910 000c 1B6B ldr r3, [r3, #48] + 1911 .LVL168: + 1912 000e 1B6B ldr r3, [r3, #48] + 1913 0010 9847 blx r3 + 1914 .LVL169: + 1915 .L153: +2417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1916 .loc 1 2419 0 + 1917 @ sp needed + 1918 0012 10BD pop {r4, pc} + 1919 .LVL170: + 1920 .L158: +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1921 .loc 1 2370 0 + 1922 0014 996B ldr r1, [r3, #56] + 1923 0016 8022 movs r2, #128 + 1924 0018 9200 lsls r2, r2, #2 + 1925 001a 0A43 orrs r2, r1 + 1926 001c 9A63 str r2, [r3, #56] +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1927 .loc 1 2374 0 + 1928 001e 1A68 ldr r2, [r3] + 1929 0020 D068 ldr r0, [r2, #12] + 1930 .LVL171: + 1931 0022 C021 movs r1, #192 + 1932 0024 0901 lsls r1, r1, #4 + 1933 0026 0842 tst r0, r1 + 1934 0028 13D1 bne .L155 +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1935 .loc 1 2375 0 discriminator 1 + 1936 002a 997E ldrb r1, [r3, #26] +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 1937 .loc 1 2374 0 discriminator 1 + 1938 002c 0029 cmp r1, #0 + 1939 002e 10D1 bne .L155 +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 1940 .loc 1 2378 0 + 1941 0030 1168 ldr r1, [r2] + 1942 0032 0907 lsls r1, r1, #28 + 1943 0034 0DD5 bpl .L155 +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + ARM GAS /tmp/ccnlUpWq.s page 82 + + + 1944 .loc 1 2382 0 + 1945 0036 9168 ldr r1, [r2, #8] + 1946 0038 4907 lsls r1, r1, #29 + 1947 003a 0ED4 bmi .L156 +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1948 .loc 1 2388 0 + 1949 003c 5168 ldr r1, [r2, #4] + 1950 003e 0C20 movs r0, #12 + 1951 0040 8143 bics r1, r0 + 1952 0042 5160 str r1, [r2, #4] +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 1953 .loc 1 2391 0 + 1954 0044 9A6B ldr r2, [r3, #56] + 1955 0046 0949 ldr r1, .L159 + 1956 0048 0A40 ands r2, r1 + 1957 004a 0431 adds r1, r1, #4 + 1958 004c FF31 adds r1, r1, #255 + 1959 004e 0A43 orrs r2, r1 + 1960 0050 9A63 str r2, [r3, #56] + 1961 .L155: +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 1962 .loc 1 2410 0 + 1963 0052 1800 movs r0, r3 + 1964 0054 FFF7FEFF bl HAL_ADC_ConvCpltCallback + 1965 .LVL172: + 1966 0058 DBE7 b .L153 + 1967 .LVL173: + 1968 .L156: +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 1969 .loc 1 2398 0 + 1970 005a 9A6B ldr r2, [r3, #56] + 1971 005c 2021 movs r1, #32 + 1972 005e 0A43 orrs r2, r1 + 1973 0060 9A63 str r2, [r3, #56] +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 1974 .loc 1 2401 0 + 1975 0062 DA6B ldr r2, [r3, #60] + 1976 0064 1F39 subs r1, r1, #31 + 1977 0066 0A43 orrs r2, r1 + 1978 0068 DA63 str r2, [r3, #60] + 1979 006a F2E7 b .L155 + 1980 .L160: + 1981 .align 2 + 1982 .L159: + 1983 006c FEFEFFFF .word -258 + 1984 .cfi_endproc + 1985 .LFE65: + 1987 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits + 1988 .align 1 + 1989 .weak HAL_ADC_ConvHalfCpltCallback + 1990 .syntax unified + 1991 .code 16 + 1992 .thumb_func + 1993 .fpu softvfp + 1995 HAL_ADC_ConvHalfCpltCallback: + 1996 .LFB55: +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + ARM GAS /tmp/ccnlUpWq.s page 83 + + + 1997 .loc 1 1805 0 + 1998 .cfi_startproc + 1999 @ args = 0, pretend = 0, frame = 0 + 2000 @ frame_needed = 0, uses_anonymous_args = 0 + 2001 @ link register save eliminated. + 2002 .LVL174: +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2003 .loc 1 1812 0 + 2004 @ sp needed + 2005 0000 7047 bx lr + 2006 .cfi_endproc + 2007 .LFE55: + 2009 .section .text.ADC_DMAHalfConvCplt,"ax",%progbits + 2010 .align 1 + 2011 .syntax unified + 2012 .code 16 + 2013 .thumb_func + 2014 .fpu softvfp + 2016 ADC_DMAHalfConvCplt: + 2017 .LFB66: +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA half transfer complete callback. +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle. +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +2425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma) +2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2018 .loc 1 2427 0 + 2019 .cfi_startproc + 2020 @ args = 0, pretend = 0, frame = 0 + 2021 @ frame_needed = 0, uses_anonymous_args = 0 + 2022 .LVL175: + 2023 0000 10B5 push {r4, lr} + 2024 .LCFI15: + 2025 .cfi_def_cfa_offset 8 + 2026 .cfi_offset 4, -8 + 2027 .cfi_offset 14, -4 +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + 2028 .loc 1 2429 0 + 2029 0002 406A ldr r0, [r0, #36] + 2030 .LVL176: +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Half conversion callback */ +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback(hadc); +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvHalfCpltCallback(hadc); + 2031 .loc 1 2435 0 + 2032 0004 FFF7FEFF bl HAL_ADC_ConvHalfCpltCallback + 2033 .LVL177: +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2034 .loc 1 2437 0 + 2035 @ sp needed + 2036 0008 10BD pop {r4, pc} + ARM GAS /tmp/ccnlUpWq.s page 84 + + + 2037 .cfi_endproc + 2038 .LFE66: + 2040 .section .text.HAL_ADC_LevelOutOfWindowCallback,"ax",%progbits + 2041 .align 1 + 2042 .weak HAL_ADC_LevelOutOfWindowCallback + 2043 .syntax unified + 2044 .code 16 + 2045 .thumb_func + 2046 .fpu softvfp + 2048 HAL_ADC_LevelOutOfWindowCallback: + 2049 .LFB56: +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2050 .loc 1 1820 0 + 2051 .cfi_startproc + 2052 @ args = 0, pretend = 0, frame = 0 + 2053 @ frame_needed = 0, uses_anonymous_args = 0 + 2054 @ link register save eliminated. + 2055 .LVL178: +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2056 .loc 1 1827 0 + 2057 @ sp needed + 2058 0000 7047 bx lr + 2059 .cfi_endproc + 2060 .LFE56: + 2062 .section .text.HAL_ADC_ErrorCallback,"ax",%progbits + 2063 .align 1 + 2064 .weak HAL_ADC_ErrorCallback + 2065 .syntax unified + 2066 .code 16 + 2067 .thumb_func + 2068 .fpu softvfp + 2070 HAL_ADC_ErrorCallback: + 2071 .LFB57: +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */ + 2072 .loc 1 1836 0 + 2073 .cfi_startproc + 2074 @ args = 0, pretend = 0, frame = 0 + 2075 @ frame_needed = 0, uses_anonymous_args = 0 + 2076 @ link register save eliminated. + 2077 .LVL179: +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2078 .loc 1 1843 0 + 2079 @ sp needed + 2080 0000 7047 bx lr + 2081 .cfi_endproc + 2082 .LFE57: + 2084 .section .text.ADC_DMAError,"ax",%progbits + 2085 .align 1 + 2086 .syntax unified + 2087 .code 16 + 2088 .thumb_func + 2089 .fpu softvfp + 2091 ADC_DMAError: + 2092 .LFB67: +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA error callback + ARM GAS /tmp/ccnlUpWq.s page 85 + + +2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle. +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */ +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAError(DMA_HandleTypeDef *hdma) +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2093 .loc 1 2445 0 + 2094 .cfi_startproc + 2095 @ args = 0, pretend = 0, frame = 0 + 2096 @ frame_needed = 0, uses_anonymous_args = 0 + 2097 .LVL180: + 2098 0000 10B5 push {r4, lr} + 2099 .LCFI16: + 2100 .cfi_def_cfa_offset 8 + 2101 .cfi_offset 4, -8 + 2102 .cfi_offset 14, -4 +2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */ +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; + 2103 .loc 1 2447 0 + 2104 0002 406A ldr r0, [r0, #36] + 2105 .LVL181: +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */ +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA); + 2106 .loc 1 2450 0 + 2107 0004 836B ldr r3, [r0, #56] + 2108 0006 4022 movs r2, #64 + 2109 0008 1343 orrs r3, r2 + 2110 000a 8363 str r3, [r0, #56] +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to DMA error */ +2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA); + 2111 .loc 1 2453 0 + 2112 000c C36B ldr r3, [r0, #60] + 2113 000e 3C3A subs r2, r2, #60 + 2114 0010 1343 orrs r3, r2 + 2115 0012 C363 str r3, [r0, #60] +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** +2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Error callback */ +2456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1) +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback(hadc); +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc); + 2116 .loc 1 2459 0 + 2117 0014 FFF7FEFF bl HAL_ADC_ErrorCallback + 2118 .LVL182: +2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2119 .loc 1 2461 0 + 2120 @ sp needed + 2121 0018 10BD pop {r4, pc} + 2122 .cfi_endproc + 2123 .LFE67: + 2125 .section .text.HAL_ADC_IRQHandler,"ax",%progbits + 2126 .align 1 + 2127 .global HAL_ADC_IRQHandler + 2128 .syntax unified + 2129 .code 16 + ARM GAS /tmp/ccnlUpWq.s page 86 + + + 2130 .thumb_func + 2131 .fpu softvfp + 2133 HAL_ADC_IRQHandler: + 2134 .LFB53: +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 2135 .loc 1 1665 0 + 2136 .cfi_startproc + 2137 @ args = 0, pretend = 0, frame = 0 + 2138 @ frame_needed = 0, uses_anonymous_args = 0 + 2139 .LVL183: + 2140 0000 10B5 push {r4, lr} + 2141 .LCFI17: + 2142 .cfi_def_cfa_offset 8 + 2143 .cfi_offset 4, -8 + 2144 .cfi_offset 14, -4 + 2145 0002 0400 movs r4, r0 +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) + 2146 .loc 1 1672 0 + 2147 0004 0368 ldr r3, [r0] + 2148 0006 1A68 ldr r2, [r3] + 2149 0008 5207 lsls r2, r2, #29 + 2150 000a 02D5 bpl .L167 +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) + 2151 .loc 1 1672 0 is_stmt 0 discriminator 1 + 2152 000c 5A68 ldr r2, [r3, #4] + 2153 000e 5207 lsls r2, r2, #29 + 2154 0010 05D4 bmi .L168 + 2155 .L167: +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2156 .loc 1 1673 0 is_stmt 1 discriminator 3 + 2157 0012 1A68 ldr r2, [r3] +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) ) + 2158 .loc 1 1672 0 discriminator 3 + 2159 0014 1207 lsls r2, r2, #28 + 2160 0016 29D5 bpl .L169 +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2161 .loc 1 1673 0 + 2162 0018 5A68 ldr r2, [r3, #4] + 2163 001a 1207 lsls r2, r2, #28 + 2164 001c 26D5 bpl .L169 + 2165 .L168: +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2166 .loc 1 1676 0 + 2167 001e A26B ldr r2, [r4, #56] + 2168 0020 D206 lsls r2, r2, #27 + 2169 0022 04D4 bmi .L170 +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2170 .loc 1 1679 0 + 2171 0024 A16B ldr r1, [r4, #56] + 2172 0026 8022 movs r2, #128 + 2173 0028 9200 lsls r2, r2, #2 + 2174 002a 0A43 orrs r2, r1 + 2175 002c A263 str r2, [r4, #56] + 2176 .L170: +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2177 .loc 1 1684 0 + 2178 002e D968 ldr r1, [r3, #12] + ARM GAS /tmp/ccnlUpWq.s page 87 + + + 2179 0030 C022 movs r2, #192 + 2180 0032 1201 lsls r2, r2, #4 + 2181 0034 1142 tst r1, r2 + 2182 0036 13D1 bne .L171 +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2183 .loc 1 1685 0 discriminator 1 + 2184 0038 A27E ldrb r2, [r4, #26] +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) + 2185 .loc 1 1684 0 discriminator 1 + 2186 003a 002A cmp r2, #0 + 2187 003c 10D1 bne .L171 +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2188 .loc 1 1688 0 + 2189 003e 1A68 ldr r2, [r3] + 2190 0040 1207 lsls r2, r2, #28 + 2191 0042 0DD5 bpl .L171 +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2192 .loc 1 1692 0 + 2193 0044 9A68 ldr r2, [r3, #8] + 2194 0046 5207 lsls r2, r2, #29 + 2195 0048 31D4 bmi .L172 +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2196 .loc 1 1698 0 + 2197 004a 5A68 ldr r2, [r3, #4] + 2198 004c 0C21 movs r1, #12 + 2199 004e 8A43 bics r2, r1 + 2200 0050 5A60 str r2, [r3, #4] +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY, + 2201 .loc 1 1701 0 + 2202 0052 A36B ldr r3, [r4, #56] + 2203 0054 204A ldr r2, .L178 + 2204 0056 1340 ands r3, r2 + 2205 0058 0432 adds r2, r2, #4 + 2206 005a FF32 adds r2, r2, #255 + 2207 005c 1343 orrs r3, r2 + 2208 005e A363 str r3, [r4, #56] + 2209 .L171: +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2210 .loc 1 1722 0 + 2211 0060 2000 movs r0, r4 + 2212 .LVL184: + 2213 0062 FFF7FEFF bl HAL_ADC_ConvCpltCallback + 2214 .LVL185: +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2215 .loc 1 1731 0 + 2216 0066 2368 ldr r3, [r4] + 2217 0068 0C22 movs r2, #12 + 2218 006a 1A60 str r2, [r3] + 2219 .L169: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2220 .loc 1 1735 0 + 2221 006c 2368 ldr r3, [r4] + 2222 006e 1A68 ldr r2, [r3] + 2223 0070 1206 lsls r2, r2, #24 + 2224 0072 02D5 bpl .L173 +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2225 .loc 1 1735 0 is_stmt 0 discriminator 1 + ARM GAS /tmp/ccnlUpWq.s page 88 + + + 2226 0074 5B68 ldr r3, [r3, #4] + 2227 0076 1B06 lsls r3, r3, #24 + 2228 0078 22D4 bmi .L177 + 2229 .L173: +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2230 .loc 1 1753 0 is_stmt 1 + 2231 007a 2368 ldr r3, [r4] + 2232 007c 1A68 ldr r2, [r3] + 2233 007e D206 lsls r2, r2, #27 + 2234 0080 14D5 bpl .L166 +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2235 .loc 1 1753 0 is_stmt 0 discriminator 1 + 2236 0082 5A68 ldr r2, [r3, #4] + 2237 0084 D206 lsls r2, r2, #27 + 2238 0086 11D5 bpl .L166 +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2239 .loc 1 1761 0 is_stmt 1 + 2240 0088 A26A ldr r2, [r4, #40] + 2241 008a 012A cmp r2, #1 + 2242 008c 02D0 beq .L175 +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2243 .loc 1 1762 0 discriminator 1 + 2244 008e DA68 ldr r2, [r3, #12] +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) ) + 2245 .loc 1 1761 0 discriminator 1 + 2246 0090 D207 lsls r2, r2, #31 + 2247 0092 08D5 bpl .L176 + 2248 .L175: +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2249 .loc 1 1765 0 + 2250 0094 E26B ldr r2, [r4, #60] + 2251 0096 0221 movs r1, #2 + 2252 0098 0A43 orrs r2, r1 + 2253 009a E263 str r2, [r4, #60] +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2254 .loc 1 1768 0 + 2255 009c 1022 movs r2, #16 + 2256 009e 1A60 str r2, [r3] +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2257 .loc 1 1773 0 + 2258 00a0 2000 movs r0, r4 + 2259 00a2 FFF7FEFF bl HAL_ADC_ErrorCallback + 2260 .LVL186: + 2261 .L176: +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2262 .loc 1 1778 0 + 2263 00a6 2368 ldr r3, [r4] + 2264 00a8 1022 movs r2, #16 + 2265 00aa 1A60 str r2, [r3] + 2266 .L166: +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2267 .loc 1 1781 0 + 2268 @ sp needed + 2269 .LVL187: + 2270 00ac 10BD pop {r4, pc} + 2271 .LVL188: + 2272 .L172: + ARM GAS /tmp/ccnlUpWq.s page 89 + + +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2273 .loc 1 1708 0 + 2274 00ae A36B ldr r3, [r4, #56] + 2275 00b0 2022 movs r2, #32 + 2276 00b2 1343 orrs r3, r2 + 2277 00b4 A363 str r3, [r4, #56] +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2278 .loc 1 1711 0 + 2279 00b6 E36B ldr r3, [r4, #60] + 2280 00b8 1F3A subs r2, r2, #31 + 2281 00ba 1343 orrs r3, r2 + 2282 00bc E363 str r3, [r4, #60] + 2283 00be CFE7 b .L171 + 2284 .LVL189: + 2285 .L177: +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2286 .loc 1 1738 0 + 2287 00c0 A26B ldr r2, [r4, #56] + 2288 00c2 8023 movs r3, #128 + 2289 00c4 5B02 lsls r3, r3, #9 + 2290 00c6 1343 orrs r3, r2 + 2291 00c8 A363 str r3, [r4, #56] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */ + 2292 .loc 1 1743 0 + 2293 00ca 2000 movs r0, r4 + 2294 00cc FFF7FEFF bl HAL_ADC_LevelOutOfWindowCallback + 2295 .LVL190: +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2296 .loc 1 1747 0 + 2297 00d0 2368 ldr r3, [r4] + 2298 00d2 8022 movs r2, #128 + 2299 00d4 1A60 str r2, [r3] + 2300 00d6 D0E7 b .L173 + 2301 .L179: + 2302 .align 2 + 2303 .L178: + 2304 00d8 FEFEFFFF .word -258 + 2305 .cfi_endproc + 2306 .LFE53: + 2308 .section .text.HAL_ADC_ConfigChannel,"ax",%progbits + 2309 .align 1 + 2310 .global HAL_ADC_ConfigChannel + 2311 .syntax unified + 2312 .code 16 + 2313 .thumb_func + 2314 .fpu softvfp + 2316 HAL_ADC_ConfigChannel: + 2317 .LFB58: +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2318 .loc 1 1890 0 + 2319 .cfi_startproc + 2320 @ args = 0, pretend = 0, frame = 8 + 2321 @ frame_needed = 0, uses_anonymous_args = 0 + 2322 .LVL191: + 2323 0000 30B5 push {r4, r5, lr} + 2324 .LCFI18: + 2325 .cfi_def_cfa_offset 12 + ARM GAS /tmp/ccnlUpWq.s page 90 + + + 2326 .cfi_offset 4, -12 + 2327 .cfi_offset 5, -8 + 2328 .cfi_offset 14, -4 + 2329 0002 83B0 sub sp, sp, #12 + 2330 .LCFI19: + 2331 .cfi_def_cfa_offset 24 + 2332 0004 0400 movs r4, r0 + 2333 .LVL192: +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2334 .loc 1 1892 0 + 2335 0006 0023 movs r3, #0 + 2336 0008 0193 str r3, [sp, #4] +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2337 .loc 1 1905 0 + 2338 000a 3433 adds r3, r3, #52 + 2339 000c C35C ldrb r3, [r0, r3] + 2340 000e 012B cmp r3, #1 + 2341 0010 00D1 bne .LCB2176 + 2342 0012 8AE0 b .L190 @long jump + 2343 .LCB2176: +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2344 .loc 1 1905 0 is_stmt 0 discriminator 2 + 2345 0014 3423 movs r3, #52 + 2346 0016 0122 movs r2, #1 + 2347 0018 C254 strb r2, [r0, r3] +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2348 .loc 1 1913 0 is_stmt 1 discriminator 2 + 2349 001a 0368 ldr r3, [r0] + 2350 001c 9A68 ldr r2, [r3, #8] + 2351 001e 5207 lsls r2, r2, #29 + 2352 0020 75D4 bmi .L182 +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2353 .loc 1 1917 0 + 2354 0022 434A ldr r2, .L201 + 2355 0024 4868 ldr r0, [r1, #4] + 2356 .LVL193: + 2357 0026 9042 cmp r0, r2 + 2358 0028 56D0 beq .L183 +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2359 .loc 1 1921 0 + 2360 002a 9A6A ldr r2, [r3, #40] + 2361 002c 0120 movs r0, #1 + 2362 002e 0D68 ldr r5, [r1] + 2363 0030 A840 lsls r0, r0, r5 + 2364 0032 0243 orrs r2, r0 + 2365 0034 9A62 str r2, [r3, #40] +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2366 .loc 1 1928 0 + 2367 0036 E36A ldr r3, [r4, #44] + 2368 0038 8022 movs r2, #128 + 2369 003a 5205 lsls r2, r2, #21 + 2370 003c 9342 cmp r3, r2 + 2371 003e 1ED0 beq .L184 +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2372 .loc 1 1928 0 is_stmt 0 discriminator 1 + 2373 0040 012B cmp r3, #1 + 2374 0042 1CD0 beq .L184 + ARM GAS /tmp/ccnlUpWq.s page 91 + + +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2375 .loc 1 1928 0 discriminator 2 + 2376 0044 022B cmp r3, #2 + 2377 0046 1AD0 beq .L184 +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2378 .loc 1 1928 0 discriminator 3 + 2379 0048 032B cmp r3, #3 + 2380 004a 18D0 beq .L184 +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2381 .loc 1 1928 0 discriminator 4 + 2382 004c 042B cmp r3, #4 + 2383 004e 16D0 beq .L184 +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2384 .loc 1 1928 0 discriminator 5 + 2385 0050 052B cmp r3, #5 + 2386 0052 14D0 beq .L184 +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2387 .loc 1 1928 0 discriminator 6 + 2388 0054 062B cmp r3, #6 + 2389 0056 12D0 beq .L184 +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2390 .loc 1 1928 0 discriminator 7 + 2391 0058 072B cmp r3, #7 + 2392 005a 10D0 beq .L184 +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2393 .loc 1 1932 0 is_stmt 1 + 2394 005c 2268 ldr r2, [r4] + 2395 005e 5069 ldr r0, [r2, #20] + 2396 0060 0723 movs r3, #7 + 2397 0062 0340 ands r3, r0 + 2398 0064 8868 ldr r0, [r1, #8] + 2399 0066 9842 cmp r0, r3 + 2400 0068 09D0 beq .L184 +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2401 .loc 1 1936 0 + 2402 006a 5069 ldr r0, [r2, #20] + 2403 006c 0723 movs r3, #7 + 2404 006e 9843 bics r0, r3 + 2405 0070 5061 str r0, [r2, #20] +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2406 .loc 1 1939 0 + 2407 0072 2068 ldr r0, [r4] + 2408 0074 4269 ldr r2, [r0, #20] + 2409 0076 8D68 ldr r5, [r1, #8] + 2410 0078 2B40 ands r3, r5 + 2411 007a 1343 orrs r3, r2 + 2412 007c 4361 str r3, [r0, #20] + 2413 .L184: +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2414 .loc 1 1949 0 + 2415 007e 0B68 ldr r3, [r1] + 2416 0080 1A00 movs r2, r3 + 2417 0082 103A subs r2, r2, #16 + 2418 0084 022A cmp r2, #2 + 2419 0086 4CD8 bhi .L191 +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2420 .loc 1 1954 0 + ARM GAS /tmp/ccnlUpWq.s page 92 + + + 2421 0088 2A4A ldr r2, .L201+4 + 2422 008a 1268 ldr r2, [r2] + 2423 008c 102B cmp r3, #16 + 2424 008e 0ED0 beq .L192 +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2425 .loc 1 1954 0 is_stmt 0 discriminator 1 + 2426 0090 112B cmp r3, #17 + 2427 0092 09D0 beq .L198 +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2428 .loc 1 1954 0 + 2429 0094 8023 movs r3, #128 + 2430 0096 5B04 lsls r3, r3, #17 + 2431 .L186: +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2432 .loc 1 1954 0 discriminator 8 + 2433 0098 1343 orrs r3, r2 + 2434 009a 264A ldr r2, .L201+4 + 2435 009c 1360 str r3, [r2] +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2436 .loc 1 1957 0 is_stmt 1 discriminator 8 + 2437 009e 0B68 ldr r3, [r1] + 2438 00a0 102B cmp r3, #16 + 2439 00a2 07D0 beq .L199 +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2440 .loc 1 1891 0 + 2441 00a4 0020 movs r0, #0 + 2442 00a6 37E0 b .L185 + 2443 .L198: +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2444 .loc 1 1954 0 + 2445 00a8 8023 movs r3, #128 + 2446 00aa DB03 lsls r3, r3, #15 + 2447 00ac F4E7 b .L186 + 2448 .L192: + 2449 00ae 8023 movs r3, #128 + 2450 00b0 1B04 lsls r3, r3, #16 + 2451 00b2 F1E7 b .L186 + 2452 .L199: +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U) + 2453 .loc 1 1961 0 + 2454 00b4 204B ldr r3, .L201+8 + 2455 00b6 1868 ldr r0, [r3] + 2456 00b8 2049 ldr r1, .L201+12 + 2457 .LVL194: + 2458 00ba FFF7FEFF bl __aeabi_uidiv + 2459 .LVL195: + 2460 00be 8300 lsls r3, r0, #2 + 2461 00c0 1818 adds r0, r3, r0 + 2462 00c2 4300 lsls r3, r0, #1 + 2463 00c4 0193 str r3, [sp, #4] +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2464 .loc 1 1962 0 + 2465 00c6 02E0 b .L187 + 2466 .L188: +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2467 .loc 1 1964 0 + 2468 00c8 019B ldr r3, [sp, #4] + ARM GAS /tmp/ccnlUpWq.s page 93 + + + 2469 00ca 013B subs r3, r3, #1 + 2470 00cc 0193 str r3, [sp, #4] + 2471 .L187: +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2472 .loc 1 1962 0 + 2473 00ce 019B ldr r3, [sp, #4] + 2474 00d0 002B cmp r3, #0 + 2475 00d2 F9D1 bne .L188 +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2476 .loc 1 1891 0 + 2477 00d4 0020 movs r0, #0 + 2478 00d6 1FE0 b .L185 + 2479 .LVL196: + 2480 .L183: +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2481 .loc 1 1973 0 + 2482 00d8 9A6A ldr r2, [r3, #40] + 2483 00da 0120 movs r0, #1 + 2484 00dc 0D68 ldr r5, [r1] + 2485 00de A840 lsls r0, r0, r5 + 2486 00e0 8243 bics r2, r0 + 2487 00e2 9A62 str r2, [r3, #40] +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2488 .loc 1 1978 0 + 2489 00e4 0B68 ldr r3, [r1] + 2490 00e6 1A00 movs r2, r3 + 2491 00e8 103A subs r2, r2, #16 + 2492 00ea 022A cmp r2, #2 + 2493 00ec 1BD8 bhi .L195 +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2494 .loc 1 1983 0 + 2495 00ee 114A ldr r2, .L201+4 + 2496 00f0 1268 ldr r2, [r2] + 2497 00f2 102B cmp r3, #16 + 2498 00f4 09D0 beq .L196 +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2499 .loc 1 1983 0 is_stmt 0 discriminator 1 + 2500 00f6 112B cmp r3, #17 + 2501 00f8 05D0 beq .L200 +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2502 .loc 1 1983 0 + 2503 00fa 114B ldr r3, .L201+16 + 2504 .L189: +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2505 .loc 1 1983 0 discriminator 8 + 2506 00fc 1340 ands r3, r2 + 2507 00fe 0D4A ldr r2, .L201+4 + 2508 0100 1360 str r3, [r2] +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2509 .loc 1 1891 0 is_stmt 1 discriminator 8 + 2510 0102 0020 movs r0, #0 + 2511 0104 08E0 b .L185 + 2512 .L200: +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2513 .loc 1 1983 0 + 2514 0106 0F4B ldr r3, .L201+20 + 2515 0108 F8E7 b .L189 + ARM GAS /tmp/ccnlUpWq.s page 94 + + + 2516 .L196: + 2517 010a 0F4B ldr r3, .L201+24 + 2518 010c F6E7 b .L189 + 2519 .LVL197: + 2520 .L182: +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2521 .loc 1 1995 0 + 2522 010e 836B ldr r3, [r0, #56] + 2523 0110 2022 movs r2, #32 + 2524 0112 1343 orrs r3, r2 + 2525 0114 8363 str r3, [r0, #56] + 2526 .LVL198: +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2527 .loc 1 1997 0 + 2528 0116 0120 movs r0, #1 + 2529 .LVL199: + 2530 .L185: +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2531 .loc 1 2001 0 + 2532 0118 3423 movs r3, #52 + 2533 011a 0022 movs r2, #0 + 2534 011c E254 strb r2, [r4, r3] + 2535 .LVL200: + 2536 .L181: +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2537 .loc 1 2005 0 + 2538 011e 03B0 add sp, sp, #12 + 2539 @ sp needed + 2540 .LVL201: + 2541 0120 30BD pop {r4, r5, pc} + 2542 .LVL202: + 2543 .L191: +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U; + 2544 .loc 1 1891 0 + 2545 0122 0020 movs r0, #0 + 2546 0124 F8E7 b .L185 + 2547 .L195: + 2548 0126 0020 movs r0, #0 + 2549 0128 F6E7 b .L185 + 2550 .LVL203: + 2551 .L190: +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2552 .loc 1 1905 0 + 2553 012a 0220 movs r0, #2 + 2554 .LVL204: + 2555 012c F7E7 b .L181 + 2556 .L202: + 2557 012e C046 .align 2 + 2558 .L201: + 2559 0130 01100000 .word 4097 + 2560 0134 08270140 .word 1073817352 + 2561 0138 00000000 .word SystemCoreClock + 2562 013c 40420F00 .word 1000000 + 2563 0140 FFFFFFFE .word -16777217 + 2564 0144 FFFFBFFF .word -4194305 + 2565 0148 FFFF7FFF .word -8388609 + 2566 .cfi_endproc + ARM GAS /tmp/ccnlUpWq.s page 95 + + + 2567 .LFE58: + 2569 .section .text.HAL_ADC_AnalogWDGConfig,"ax",%progbits + 2570 .align 1 + 2571 .global HAL_ADC_AnalogWDGConfig + 2572 .syntax unified + 2573 .code 16 + 2574 .thumb_func + 2575 .fpu softvfp + 2577 HAL_ADC_AnalogWDGConfig: + 2578 .LFB59: +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 2579 .loc 1 2023 0 + 2580 .cfi_startproc + 2581 @ args = 0, pretend = 0, frame = 0 + 2582 @ frame_needed = 0, uses_anonymous_args = 0 + 2583 .LVL205: + 2584 0000 70B5 push {r4, r5, r6, lr} + 2585 .LCFI20: + 2586 .cfi_def_cfa_offset 16 + 2587 .cfi_offset 4, -16 + 2588 .cfi_offset 5, -12 + 2589 .cfi_offset 6, -8 + 2590 .cfi_offset 14, -4 + 2591 .LVL206: +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2592 .loc 1 2044 0 + 2593 0002 3423 movs r3, #52 + 2594 0004 C35C ldrb r3, [r0, r3] + 2595 0006 012B cmp r3, #1 + 2596 0008 49D0 beq .L208 +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2597 .loc 1 2044 0 is_stmt 0 discriminator 2 + 2598 000a 3423 movs r3, #52 + 2599 000c 0122 movs r2, #1 + 2600 000e C254 strb r2, [r0, r3] +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2601 .loc 1 2051 0 is_stmt 1 discriminator 2 + 2602 0010 0368 ldr r3, [r0] + 2603 0012 9A68 ldr r2, [r3, #8] + 2604 0014 5207 lsls r2, r2, #29 + 2605 0016 38D4 bmi .L205 +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN | + 2606 .loc 1 2058 0 + 2607 0018 DA68 ldr r2, [r3, #12] + 2608 001a 224C ldr r4, .L210 + 2609 001c 2240 ands r2, r4 + 2610 001e DA60 str r2, [r3, #12] +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 2611 .loc 1 2062 0 + 2612 0020 0468 ldr r4, [r0] + 2613 0022 E368 ldr r3, [r4, #12] +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2614 .loc 1 2063 0 + 2615 0024 4A68 ldr r2, [r1, #4] + 2616 0026 9206 lsls r2, r2, #26 +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) ); + 2617 .loc 1 2062 0 + ARM GAS /tmp/ccnlUpWq.s page 96 + + + 2618 0028 0D68 ldr r5, [r1] + 2619 002a 2A43 orrs r2, r5 + 2620 002c 1343 orrs r3, r2 + 2621 002e E360 str r3, [r4, #12] +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres + 2622 .loc 1 2067 0 + 2623 0030 0468 ldr r4, [r0] + 2624 0032 E368 ldr r3, [r4, #12] + 2625 0034 DB08 lsrs r3, r3, #3 + 2626 0036 0322 movs r2, #3 + 2627 0038 1340 ands r3, r2 + 2628 003a 5B00 lsls r3, r3, #1 + 2629 003c CD68 ldr r5, [r1, #12] + 2630 003e 9D40 lsls r5, r5, r3 + 2631 0040 2B00 movs r3, r5 + 2632 .LVL207: +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2633 .loc 1 2068 0 + 2634 0042 E568 ldr r5, [r4, #12] + 2635 0044 ED08 lsrs r5, r5, #3 + 2636 0046 2A40 ands r2, r5 + 2637 0048 5200 lsls r2, r2, #1 + 2638 004a 0D69 ldr r5, [r1, #16] + 2639 004c 9540 lsls r5, r5, r2 + 2640 .LVL208: +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) | + 2641 .loc 1 2071 0 + 2642 004e 226A ldr r2, [r4, #32] + 2643 0050 154E ldr r6, .L210+4 + 2644 0052 3240 ands r2, r6 + 2645 0054 2262 str r2, [r4, #32] +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted ); + 2646 .loc 1 2072 0 + 2647 0056 0468 ldr r4, [r0] + 2648 0058 226A ldr r2, [r4, #32] + 2649 005a 1B04 lsls r3, r3, #16 + 2650 .LVL209: + 2651 005c 2B43 orrs r3, r5 + 2652 005e 1343 orrs r3, r2 + 2653 0060 2362 str r3, [r4, #32] +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2654 .loc 1 2078 0 + 2655 0062 0368 ldr r3, [r0] + 2656 0064 8022 movs r2, #128 + 2657 0066 1A60 str r2, [r3] +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** { + 2658 .loc 1 2081 0 + 2659 0068 0B7A ldrb r3, [r1, #8] + 2660 006a 012B cmp r3, #1 + 2661 006c 06D0 beq .L209 +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2662 .loc 1 2089 0 + 2663 006e 0268 ldr r2, [r0] + 2664 0070 5368 ldr r3, [r2, #4] + 2665 0072 8021 movs r1, #128 + 2666 .LVL210: + 2667 0074 8B43 bics r3, r1 + ARM GAS /tmp/ccnlUpWq.s page 97 + + + 2668 0076 5360 str r3, [r2, #4] +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2669 .loc 1 2024 0 + 2670 0078 0023 movs r3, #0 + 2671 007a 0BE0 b .L207 + 2672 .LVL211: + 2673 .L209: +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2674 .loc 1 2084 0 + 2675 007c 0268 ldr r2, [r0] + 2676 007e 5368 ldr r3, [r2, #4] + 2677 0080 8021 movs r1, #128 + 2678 .LVL212: + 2679 0082 0B43 orrs r3, r1 + 2680 0084 5360 str r3, [r2, #4] +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2681 .loc 1 2024 0 + 2682 0086 0023 movs r3, #0 + 2683 0088 04E0 b .L207 + 2684 .LVL213: + 2685 .L205: +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2686 .loc 1 2098 0 + 2687 008a 836B ldr r3, [r0, #56] + 2688 008c 2022 movs r2, #32 + 2689 008e 1343 orrs r3, r2 + 2690 0090 8363 str r3, [r0, #56] + 2691 .LVL214: +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2692 .loc 1 2100 0 + 2693 0092 0123 movs r3, #1 + 2694 .LVL215: + 2695 .L207: +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2696 .loc 1 2105 0 + 2697 0094 3422 movs r2, #52 + 2698 0096 0021 movs r1, #0 + 2699 0098 8154 strb r1, [r0, r2] + 2700 .LVL216: + 2701 .L204: +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2702 .loc 1 2109 0 + 2703 009a 1800 movs r0, r3 + 2704 .LVL217: + 2705 @ sp needed + 2706 009c 70BD pop {r4, r5, r6, pc} + 2707 .LVL218: + 2708 .L208: +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2709 .loc 1 2044 0 + 2710 009e 0223 movs r3, #2 + 2711 00a0 FBE7 b .L204 + 2712 .L211: + 2713 00a2 C046 .align 2 + 2714 .L210: + 2715 00a4 FFFF3F83 .word -2092957697 + 2716 00a8 00F000F0 .word -268374016 + ARM GAS /tmp/ccnlUpWq.s page 98 + + + 2717 .cfi_endproc + 2718 .LFE59: + 2720 .section .text.HAL_ADC_GetState,"ax",%progbits + 2721 .align 1 + 2722 .global HAL_ADC_GetState + 2723 .syntax unified + 2724 .code 16 + 2725 .thumb_func + 2726 .fpu softvfp + 2728 HAL_ADC_GetState: + 2729 .LFB60: +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */ + 2730 .loc 1 2145 0 + 2731 .cfi_startproc + 2732 @ args = 0, pretend = 0, frame = 0 + 2733 @ frame_needed = 0, uses_anonymous_args = 0 + 2734 @ link register save eliminated. + 2735 .LVL219: +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2736 .loc 1 2150 0 + 2737 0000 806B ldr r0, [r0, #56] + 2738 .LVL220: +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2739 .loc 1 2151 0 + 2740 @ sp needed + 2741 0002 7047 bx lr + 2742 .cfi_endproc + 2743 .LFE60: + 2745 .section .text.HAL_ADC_GetError,"ax",%progbits + 2746 .align 1 + 2747 .global HAL_ADC_GetError + 2748 .syntax unified + 2749 .code 16 + 2750 .thumb_func + 2751 .fpu softvfp + 2753 HAL_ADC_GetError: + 2754 .LFB61: +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->ErrorCode; + 2755 .loc 1 2159 0 + 2756 .cfi_startproc + 2757 @ args = 0, pretend = 0, frame = 0 + 2758 @ frame_needed = 0, uses_anonymous_args = 0 + 2759 @ link register save eliminated. + 2760 .LVL221: +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** } + 2761 .loc 1 2160 0 + 2762 0000 C06B ldr r0, [r0, #60] + 2763 .LVL222: +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** + 2764 .loc 1 2161 0 + 2765 @ sp needed + 2766 0002 7047 bx lr + 2767 .cfi_endproc + 2768 .LFE61: + 2770 .text + 2771 .Letext0: + 2772 .file 2 "/usr/include/newlib/machine/_default_types.h" + ARM GAS /tmp/ccnlUpWq.s page 99 + + + 2773 .file 3 "/usr/include/newlib/sys/_stdint.h" + 2774 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 2775 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 2776 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 2777 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 2778 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 2779 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 2780 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccnlUpWq.s page 100 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_adc.c + /tmp/ccnlUpWq.s:16 .text.ADC_ConversionStop:0000000000000000 $t + /tmp/ccnlUpWq.s:22 .text.ADC_ConversionStop:0000000000000000 ADC_ConversionStop + /tmp/ccnlUpWq.s:106 .text.ADC_Disable:0000000000000000 $t + /tmp/ccnlUpWq.s:112 .text.ADC_Disable:0000000000000000 ADC_Disable + /tmp/ccnlUpWq.s:228 .text.ADC_Enable:0000000000000000 $t + /tmp/ccnlUpWq.s:234 .text.ADC_Enable:0000000000000000 ADC_Enable + /tmp/ccnlUpWq.s:371 .text.ADC_Enable:000000000000009c $d + /tmp/ccnlUpWq.s:378 .text.HAL_ADC_MspInit:0000000000000000 $t + /tmp/ccnlUpWq.s:385 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit + /tmp/ccnlUpWq.s:400 .text.HAL_ADC_Init:0000000000000000 $t + /tmp/ccnlUpWq.s:407 .text.HAL_ADC_Init:0000000000000000 HAL_ADC_Init + /tmp/ccnlUpWq.s:704 .text.HAL_ADC_Init:0000000000000170 $d + /tmp/ccnlUpWq.s:711 .text.HAL_ADC_MspDeInit:0000000000000000 $t + /tmp/ccnlUpWq.s:718 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit + /tmp/ccnlUpWq.s:733 .text.HAL_ADC_DeInit:0000000000000000 $t + /tmp/ccnlUpWq.s:740 .text.HAL_ADC_DeInit:0000000000000000 HAL_ADC_DeInit + /tmp/ccnlUpWq.s:868 .text.HAL_ADC_DeInit:0000000000000094 $d + /tmp/ccnlUpWq.s:876 .text.HAL_ADC_Start:0000000000000000 $t + /tmp/ccnlUpWq.s:883 .text.HAL_ADC_Start:0000000000000000 HAL_ADC_Start + /tmp/ccnlUpWq.s:972 .text.HAL_ADC_Start:000000000000005c $d + /tmp/ccnlUpWq.s:977 .text.HAL_ADC_Stop:0000000000000000 $t + /tmp/ccnlUpWq.s:984 .text.HAL_ADC_Stop:0000000000000000 HAL_ADC_Stop + /tmp/ccnlUpWq.s:1053 .text.HAL_ADC_Stop:0000000000000040 $d + /tmp/ccnlUpWq.s:1058 .text.HAL_ADC_PollForConversion:0000000000000000 $t + /tmp/ccnlUpWq.s:1065 .text.HAL_ADC_PollForConversion:0000000000000000 HAL_ADC_PollForConversion + /tmp/ccnlUpWq.s:1228 .text.HAL_ADC_PollForConversion:00000000000000c0 $d + /tmp/ccnlUpWq.s:1233 .text.HAL_ADC_PollForEvent:0000000000000000 $t + /tmp/ccnlUpWq.s:1240 .text.HAL_ADC_PollForEvent:0000000000000000 HAL_ADC_PollForEvent + /tmp/ccnlUpWq.s:1351 .text.HAL_ADC_Start_IT:0000000000000000 $t + /tmp/ccnlUpWq.s:1358 .text.HAL_ADC_Start_IT:0000000000000000 HAL_ADC_Start_IT + /tmp/ccnlUpWq.s:1474 .text.HAL_ADC_Start_IT:0000000000000084 $d + /tmp/ccnlUpWq.s:1479 .text.HAL_ADC_Stop_IT:0000000000000000 $t + /tmp/ccnlUpWq.s:1486 .text.HAL_ADC_Stop_IT:0000000000000000 HAL_ADC_Stop_IT + /tmp/ccnlUpWq.s:1561 .text.HAL_ADC_Stop_IT:000000000000004c $d + /tmp/ccnlUpWq.s:1566 .text.HAL_ADC_Start_DMA:0000000000000000 $t + /tmp/ccnlUpWq.s:1573 .text.HAL_ADC_Start_DMA:0000000000000000 HAL_ADC_Start_DMA + /tmp/ccnlUpWq.s:1702 .text.HAL_ADC_Start_DMA:0000000000000098 $d + /tmp/ccnlUpWq.s:1889 .text.ADC_DMAConvCplt:0000000000000000 ADC_DMAConvCplt + /tmp/ccnlUpWq.s:2016 .text.ADC_DMAHalfConvCplt:0000000000000000 ADC_DMAHalfConvCplt + /tmp/ccnlUpWq.s:2091 .text.ADC_DMAError:0000000000000000 ADC_DMAError + /tmp/ccnlUpWq.s:1710 .text.HAL_ADC_Stop_DMA:0000000000000000 $t + /tmp/ccnlUpWq.s:1717 .text.HAL_ADC_Stop_DMA:0000000000000000 HAL_ADC_Stop_DMA + /tmp/ccnlUpWq.s:1830 .text.HAL_ADC_Stop_DMA:0000000000000078 $d + /tmp/ccnlUpWq.s:1835 .text.HAL_ADC_GetValue:0000000000000000 $t + /tmp/ccnlUpWq.s:1842 .text.HAL_ADC_GetValue:0000000000000000 HAL_ADC_GetValue + /tmp/ccnlUpWq.s:1861 .text.HAL_ADC_ConvCpltCallback:0000000000000000 $t + /tmp/ccnlUpWq.s:1868 .text.HAL_ADC_ConvCpltCallback:0000000000000000 HAL_ADC_ConvCpltCallback + /tmp/ccnlUpWq.s:1883 .text.ADC_DMAConvCplt:0000000000000000 $t + /tmp/ccnlUpWq.s:1983 .text.ADC_DMAConvCplt:000000000000006c $d + /tmp/ccnlUpWq.s:1988 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 $t + /tmp/ccnlUpWq.s:1995 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 HAL_ADC_ConvHalfCpltCallback + /tmp/ccnlUpWq.s:2010 .text.ADC_DMAHalfConvCplt:0000000000000000 $t + /tmp/ccnlUpWq.s:2041 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 $t + /tmp/ccnlUpWq.s:2048 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 HAL_ADC_LevelOutOfWindowCallback + /tmp/ccnlUpWq.s:2063 .text.HAL_ADC_ErrorCallback:0000000000000000 $t + ARM GAS /tmp/ccnlUpWq.s page 101 + + + /tmp/ccnlUpWq.s:2070 .text.HAL_ADC_ErrorCallback:0000000000000000 HAL_ADC_ErrorCallback + /tmp/ccnlUpWq.s:2085 .text.ADC_DMAError:0000000000000000 $t + /tmp/ccnlUpWq.s:2126 .text.HAL_ADC_IRQHandler:0000000000000000 $t + /tmp/ccnlUpWq.s:2133 .text.HAL_ADC_IRQHandler:0000000000000000 HAL_ADC_IRQHandler + /tmp/ccnlUpWq.s:2304 .text.HAL_ADC_IRQHandler:00000000000000d8 $d + /tmp/ccnlUpWq.s:2309 .text.HAL_ADC_ConfigChannel:0000000000000000 $t + /tmp/ccnlUpWq.s:2316 .text.HAL_ADC_ConfigChannel:0000000000000000 HAL_ADC_ConfigChannel + /tmp/ccnlUpWq.s:2559 .text.HAL_ADC_ConfigChannel:0000000000000130 $d + /tmp/ccnlUpWq.s:2570 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 $t + /tmp/ccnlUpWq.s:2577 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 HAL_ADC_AnalogWDGConfig + /tmp/ccnlUpWq.s:2715 .text.HAL_ADC_AnalogWDGConfig:00000000000000a4 $d + /tmp/ccnlUpWq.s:2721 .text.HAL_ADC_GetState:0000000000000000 $t + /tmp/ccnlUpWq.s:2728 .text.HAL_ADC_GetState:0000000000000000 HAL_ADC_GetState + /tmp/ccnlUpWq.s:2746 .text.HAL_ADC_GetError:0000000000000000 $t + /tmp/ccnlUpWq.s:2753 .text.HAL_ADC_GetError:0000000000000000 HAL_ADC_GetError + +UNDEFINED SYMBOLS +HAL_GetTick +__aeabi_uidiv +SystemCoreClock +HAL_DMA_Start_IT +HAL_DMA_Abort diff --git a/fw/midi-dials/build/stm32f0xx_hal_adc.o b/fw/midi-dials/build/stm32f0xx_hal_adc.o Binary files differnew file mode 100644 index 0000000..4b8bda9 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_adc.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_adc_ex.d b/fw/midi-dials/build/stm32f0xx_hal_adc_ex.d new file mode 100644 index 0000000..48ccdfe --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_adc_ex.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_adc_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_adc_ex.lst b/fw/midi-dials/build/stm32f0xx_hal_adc_ex.lst new file mode 100644 index 0000000..10ac331 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_adc_ex.lst @@ -0,0 +1,382 @@ +ARM GAS /tmp/ccrR1nOM.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_adc_ex.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_ADCEx_Calibration_Start,"ax",%progbits + 16 .align 1 + 17 .global HAL_ADCEx_Calibration_Start + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_ADCEx_Calibration_Start: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @file stm32f0xx_hal_adc_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @brief This file provides firmware functions to manage the following + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * functionalities of the Analog to Digital Convertor (ADC) + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + Operation functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * ++ Calibration (ADC automatic self-calibration) + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * Other functions (generic functions) are available in file + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * "stm32f0xx_hal_adc.c". + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** @verbatim + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** [..] + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** (@) Sections "ADC peripheral features" and "How to use this driver" are + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** available in file of generic functions "stm32l1xx_hal_adc.c". + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** [..] + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** @endverbatim + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ****************************************************************************** + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @attention + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * All rights reserved.</center></h2> + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * This software component is licensed by ST under BSD 3-Clause license, + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * the "License"; You may not use this file except in compliance with the + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * License. You may obtain a copy of the License at: + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * opensource.org/licenses/BSD-3-Clause + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ****************************************************************************** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/ + ARM GAS /tmp/ccrR1nOM.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** #include "stm32f0xx_hal.h" + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @defgroup ADCEx ADCEx + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @brief ADC HAL module driver + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** #ifdef HAL_ADC_MODULE_ENABLED + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private define ------------------------------------------------------------*/ + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Private_Constants ADCEx Private Constants + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Fixed timeout values for ADC calibration, enable settling time, disable */ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* settling time. */ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Values defined to be higher than worst cases: low clock frequency, */ + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* maximum prescaler. */ + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */ + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* prescaler 4. */ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Unit: ms */ + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** #define ADC_DISABLE_TIMEOUT 2 + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** #define ADC_CALIBRATION_TIMEOUT 2U + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @} + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private macros -------------------------------------------------------------*/ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private variables ---------------------------------------------------------*/ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Private functions ---------------------------------------------------------*/ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions ADCEx Exported Functions + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** @defgroup ADCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @brief Extended Initialization and Configuration functions + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** @verbatim + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** =============================================================================== + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ##### IO operation functions ##### + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** =============================================================================== + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** [..] This section provides functions allowing to: + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** (+) Perform the ADC calibration. + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** @endverbatim + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @{ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @brief Perform an ADC automatic self-calibration + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * Calibration prerequisite: ADC must be disabled (execute this + ARM GAS /tmp/ccrR1nOM.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * function before HAL_ADC_Start() or after HAL_ADC_Stop() ). + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @note Calibration factor can be read after calibration, using function + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * HAL_ADC_GetValue() (value on 7 bits: from DR[6;0]). + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @param hadc ADC handle + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** * @retval HAL status + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** */ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc) + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 26 .loc 1 98 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 70B5 push {r4, r5, r6, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 4, -16 + 35 .cfi_offset 5, -12 + 36 .cfi_offset 6, -8 + 37 .cfi_offset 14, -4 + 38 0002 0400 movs r4, r0 + 39 .LVL1: + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK; + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** uint32_t tickstart = 0U; + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** uint32_t backup_setting_adc_dma_transfer = 0; /* Note: Variable not declared as volatile because + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Check the parameters */ + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance)); + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Process locked */ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** __HAL_LOCK(hadc); + 40 .loc 1 107 0 + 41 0004 3423 movs r3, #52 + 42 0006 C35C ldrb r3, [r0, r3] + 43 0008 012B cmp r3, #1 + 44 000a 4CD0 beq .L8 + 45 .loc 1 107 0 is_stmt 0 discriminator 2 + 46 000c 3423 movs r3, #52 + 47 000e 0122 movs r2, #1 + 48 0010 C254 strb r2, [r0, r3] + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Calibration prerequisite: ADC must be disabled. */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** if (ADC_IS_ENABLE(hadc) == RESET) + 49 .loc 1 110 0 is_stmt 1 discriminator 2 + 50 0012 0368 ldr r3, [r0] + 51 0014 9968 ldr r1, [r3, #8] + 52 0016 0232 adds r2, r2, #2 + 53 0018 0A40 ands r2, r1 + 54 001a 012A cmp r2, #1 + 55 001c 05D1 bne .L3 + 56 .loc 1 110 0 is_stmt 0 discriminator 1 + 57 001e 1A68 ldr r2, [r3] + 58 0020 D207 lsls r2, r2, #31 + 59 0022 37D4 bmi .L4 + 60 .loc 1 110 0 discriminator 4 + 61 0024 DA68 ldr r2, [r3, #12] + 62 0026 1204 lsls r2, r2, #16 + ARM GAS /tmp/ccrR1nOM.s page 4 + + + 63 0028 34D4 bmi .L4 + 64 .L3: + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Set ADC state */ + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, + 65 .loc 1 113 0 is_stmt 1 + 66 002a A26B ldr r2, [r4, #56] + 67 002c 1F49 ldr r1, .L10 + 68 002e 0A40 ands r2, r1 + 69 0030 0631 adds r1, r1, #6 + 70 0032 FF31 adds r1, r1, #255 + 71 0034 0A43 orrs r2, r1 + 72 0036 A263 str r2, [r4, #56] + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_REG_BUSY, + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL); + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Disable ADC DMA transfer request during calibration */ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Note: Specificity of this STM32 serie: Calibration factor is */ + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* available in data register and also transfered by DMA. */ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* To not insert ADC calibration factor among ADC conversion data */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* in array variable, DMA transfer must be disabled during */ + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* calibration. */ + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** backup_setting_adc_dma_transfer = READ_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_D + 73 .loc 1 123 0 + 74 0038 DE68 ldr r6, [r3, #12] + 75 003a 0131 adds r1, r1, #1 + 76 003c 0E40 ands r6, r1 + 77 .LVL2: + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** CLEAR_BIT(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN | ADC_CFGR1_DMACFG); + 78 .loc 1 124 0 + 79 003e DA68 ldr r2, [r3, #12] + 80 0040 8A43 bics r2, r1 + 81 0042 DA60 str r2, [r3, #12] + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Start ADC calibration */ + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** hadc->Instance->CR |= ADC_CR_ADCAL; + 82 .loc 1 127 0 + 83 0044 2268 ldr r2, [r4] + 84 0046 9168 ldr r1, [r2, #8] + 85 0048 8023 movs r3, #128 + 86 004a 1B06 lsls r3, r3, #24 + 87 004c 0B43 orrs r3, r1 + 88 004e 9360 str r3, [r2, #8] + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** tickstart = HAL_GetTick(); + 89 .loc 1 129 0 + 90 0050 FFF7FEFF bl HAL_GetTick + 91 .LVL3: + 92 0054 0500 movs r5, r0 + 93 .LVL4: + 94 .L5: + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Wait for calibration completion */ + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADCAL)) + 95 .loc 1 132 0 + 96 0056 2368 ldr r3, [r4] + 97 0058 9A68 ldr r2, [r3, #8] + ARM GAS /tmp/ccrR1nOM.s page 5 + + + 98 005a 002A cmp r2, #0 + 99 005c 0FDA bge .L9 + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** if((HAL_GetTick() - tickstart) > ADC_CALIBRATION_TIMEOUT) + 100 .loc 1 134 0 + 101 005e FFF7FEFF bl HAL_GetTick + 102 .LVL5: + 103 0062 401B subs r0, r0, r5 + 104 0064 0228 cmp r0, #2 + 105 0066 F6D9 bls .L5 + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, + 106 .loc 1 137 0 + 107 0068 A36B ldr r3, [r4, #56] + 108 006a 1222 movs r2, #18 + 109 006c 9343 bics r3, r2 + 110 006e 023A subs r2, r2, #2 + 111 0070 1343 orrs r3, r2 + 112 0072 A363 str r3, [r4, #56] + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_ERROR_INTERNAL); + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Process unlocked */ + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); + 113 .loc 1 142 0 + 114 0074 3423 movs r3, #52 + 115 0076 0022 movs r2, #0 + 116 0078 E254 strb r2, [r4, r3] + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** return HAL_ERROR; + 117 .loc 1 144 0 + 118 007a 0120 movs r0, #1 + 119 007c 12E0 b .L2 + 120 .L9: + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Restore ADC DMA transfer request after calibration */ + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** SET_BIT(hadc->Instance->CFGR1, backup_setting_adc_dma_transfer); + 121 .loc 1 149 0 + 122 007e DA68 ldr r2, [r3, #12] + 123 0080 1643 orrs r6, r2 + 124 .LVL6: + 125 0082 DE60 str r6, [r3, #12] + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Set ADC state */ + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** ADC_STATE_CLR_SET(hadc->State, + 126 .loc 1 152 0 + 127 0084 A36B ldr r3, [r4, #56] + 128 0086 0322 movs r2, #3 + 129 0088 9343 bics r3, r2 + 130 008a 023A subs r2, r2, #2 + 131 008c 1343 orrs r3, r2 + 132 008e A363 str r3, [r4, #56] + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** uint32_t tickstart = 0U; + 133 .loc 1 99 0 + ARM GAS /tmp/ccrR1nOM.s page 6 + + + 134 0090 0020 movs r0, #0 + 135 0092 04E0 b .L7 + 136 .LVL7: + 137 .L4: + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_BUSY_INTERNAL, + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** HAL_ADC_STATE_READY); + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** else + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** { + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Update ADC state machine to error */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG); + 138 .loc 1 159 0 + 139 0094 A36B ldr r3, [r4, #56] + 140 0096 2022 movs r2, #32 + 141 0098 1343 orrs r3, r2 + 142 009a A363 str r3, [r4, #56] + 143 .LVL8: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** tmp_hal_status = HAL_ERROR; + 144 .loc 1 161 0 + 145 009c 0120 movs r0, #1 + 146 .LVL9: + 147 .L7: + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Process unlocked */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** __HAL_UNLOCK(hadc); + 148 .loc 1 165 0 + 149 009e 3423 movs r3, #52 + 150 00a0 0022 movs r2, #0 + 151 00a2 E254 strb r2, [r4, r3] + 152 .LVL10: + 153 .L2: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** /* Return function status */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** return tmp_hal_status; + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** } + 154 .loc 1 169 0 + 155 @ sp needed + 156 .LVL11: + 157 00a4 70BD pop {r4, r5, r6, pc} + 158 .LVL12: + 159 .L8: + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc_ex.c **** + 160 .loc 1 107 0 + 161 00a6 0220 movs r0, #2 + 162 .LVL13: + 163 00a8 FCE7 b .L2 + 164 .L11: + 165 00aa C046 .align 2 + 166 .L10: + 167 00ac FDFEFFFF .word -259 + 168 .cfi_endproc + 169 .LFE40: + 171 .text + 172 .Letext0: + 173 .file 2 "/usr/include/newlib/machine/_default_types.h" + ARM GAS /tmp/ccrR1nOM.s page 7 + + + 174 .file 3 "/usr/include/newlib/sys/_stdint.h" + 175 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 176 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 177 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 178 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 179 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 180 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 181 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccrR1nOM.s page 8 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_adc_ex.c + /tmp/ccrR1nOM.s:16 .text.HAL_ADCEx_Calibration_Start:0000000000000000 $t + /tmp/ccrR1nOM.s:23 .text.HAL_ADCEx_Calibration_Start:0000000000000000 HAL_ADCEx_Calibration_Start + /tmp/ccrR1nOM.s:167 .text.HAL_ADCEx_Calibration_Start:00000000000000ac $d + +UNDEFINED SYMBOLS +HAL_GetTick diff --git a/fw/midi-dials/build/stm32f0xx_hal_adc_ex.o b/fw/midi-dials/build/stm32f0xx_hal_adc_ex.o Binary files differnew file mode 100644 index 0000000..dc0fdd9 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_adc_ex.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_cortex.d b/fw/midi-dials/build/stm32f0xx_hal_cortex.d new file mode 100644 index 0000000..cd6456a --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_cortex.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_cortex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_cortex.lst b/fw/midi-dials/build/stm32f0xx_hal_cortex.lst new file mode 100644 index 0000000..4017aae --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_cortex.lst @@ -0,0 +1,3024 @@ +ARM GAS /tmp/ccwGqVnP.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_cortex.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_NVIC_SetPriority,"ax",%progbits + 16 .align 1 + 17 .global HAL_NVIC_SetPriority + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_NVIC_SetPriority: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @file stm32f0xx_hal_cortex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief CORTEX HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * functionalities of the CORTEX: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + Peripheral Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @verbatim + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ##### How to use this driver ##### + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** *** How to configure Interrupts using CORTEX HAL driver *** + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** =========================================================== + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** This section provides functions allowing to configure the NVIC interrupts (IRQ). + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** The Cortex-M0 exceptions are managed by CMSIS functions. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#) Enable and Configure the priority of the selected IRQ Channels. + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** The priority can be 0..3. + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** -@- Lower priority values gives higher priority. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** -@- Priority Order: + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#@) Lowest priority. + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#@) Lowest hardware priority (IRQn position). + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#) Configure the priority of the selected IRQ Channels using HAL_NVIC_SetPriority() + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (#) Enable the selected IRQ Channels using HAL_NVIC_EnableIRQ() + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + ARM GAS /tmp/ccwGqVnP.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** -@- Negative value of IRQn_Type are not allowed. + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** *** How to configure Systick using CORTEX HAL driver *** + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ======================================================== + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** Setup SysTick Timer for time base. + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) The HAL_SYSTICK_Config()function calls the SysTick_Config() function which + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** is a CMSIS function that: + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Configures the SysTick Reload register with value passed as function parameter. + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Configures the SysTick IRQ priority to the lowest value (0x03). + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Resets the SysTick Counter register. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Configures the SysTick Counter clock source to be Core Clock Source (HCLK). + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Enables the SysTick Interrupt. + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Starts the SysTick Counter. + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) You can change the SysTick Clock source to be HCLK_Div8 by calling the macro + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK_DIV8) just after the + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_Config() function call. The HAL_SYSTICK_CLKSourceConfig() macro is defined + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** inside the stm32f0xx_hal_cortex.h file. + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) You can change the SysTick IRQ priority by calling the + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_NVIC_SetPriority(SysTick_IRQn,...) function just after the HAL_SYSTICK_Config() function + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** call. The HAL_NVIC_SetPriority() call the NVIC_SetPriority() function which is a CMSIS funct + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (+) To adjust the SysTick time base, use the following formula: + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** Reload Value = SysTick Counter Clock (Hz) x Desired Time base (s) + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Reload Value is the parameter to be passed for HAL_SYSTICK_Config() function + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (++) Reload Value should not exceed 0xFFFFFF + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @endverbatim + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ****************************************************************************** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @attention + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * All rights reserved.</center></h2> + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This software component is licensed by ST under BSD 3-Clause license, + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * the "License"; You may not use this file except in compliance with the + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * License. You may obtain a copy of the License at: + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * opensource.org/licenses/BSD-3-Clause + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ****************************************************************************** + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Includes ------------------------------------------------------------------*/ + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** #include "stm32f0xx_hal.h" + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX CORTEX + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief CORTEX CORTEX HAL module driver + ARM GAS /tmp/ccwGqVnP.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** #ifdef HAL_CORTEX_MODULE_ENABLED + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private typedef -----------------------------------------------------------*/ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private define ------------------------------------------------------------*/ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private macro -------------------------------------------------------------*/ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private variables ---------------------------------------------------------*/ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Private function prototypes -----------------------------------------------*/ + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Exported functions ---------------------------------------------------------*/ + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and de-initialization functions + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Initialization and Configuration functions + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @verbatim + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ##### Initialization and de-initialization functions ##### + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** This section provides the CORTEX HAL driver functions allowing to configure Interrupts + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** Systick functionalities + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @endverbatim + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Sets the priority of an interrupt. + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number . + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to stm32f0xx.h file) + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param PreemptPriority The preemption priority for the IRQn channel. + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be a value between 0 and 3. + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * A lower priority value indicates a higher priority + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param SubPriority the subpriority level for the IRQ channel. + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * with stm32f0xx devices, this parameter is a dummy value and it is ignored, because + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * no subpriority supported in Cortex M0 based products. + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 26 .loc 1 137 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 70B5 push {r4, r5, r6, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 4, -16 + 35 .cfi_offset 5, -12 + ARM GAS /tmp/ccwGqVnP.s page 4 + + + 36 .cfi_offset 6, -8 + 37 .cfi_offset 14, -4 + 38 .LVL1: + 39 .LBB32: + 40 .LBB33: + 41 .file 2 "Drivers/CMSIS/Include/core_cm0.h" + 1:Drivers/CMSIS/Include/core_cm0.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/core_cm0.h **** * @file core_cm0.h + 3:Drivers/CMSIS/Include/core_cm0.h **** * @brief CMSIS Cortex-M0 Core Peripheral Access Layer Header File + 4:Drivers/CMSIS/Include/core_cm0.h **** * @version V5.0.5 + 5:Drivers/CMSIS/Include/core_cm0.h **** * @date 28. May 2018 + 6:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/core_cm0.h **** /* + 8:Drivers/CMSIS/Include/core_cm0.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/core_cm0.h **** * + 10:Drivers/CMSIS/Include/core_cm0.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/core_cm0.h **** * + 12:Drivers/CMSIS/Include/core_cm0.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/core_cm0.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/core_cm0.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/core_cm0.h **** * + 16:Drivers/CMSIS/Include/core_cm0.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/core_cm0.h **** * + 18:Drivers/CMSIS/Include/core_cm0.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/core_cm0.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/core_cm0.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/core_cm0.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/core_cm0.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/core_cm0.h **** */ + 24:Drivers/CMSIS/Include/core_cm0.h **** + 25:Drivers/CMSIS/Include/core_cm0.h **** #if defined ( __ICCARM__ ) + 26:Drivers/CMSIS/Include/core_cm0.h **** #pragma system_include /* treat file as system include file for MISRA check */ + 27:Drivers/CMSIS/Include/core_cm0.h **** #elif defined (__clang__) + 28:Drivers/CMSIS/Include/core_cm0.h **** #pragma clang system_header /* treat file as system include file */ + 29:Drivers/CMSIS/Include/core_cm0.h **** #endif + 30:Drivers/CMSIS/Include/core_cm0.h **** + 31:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CORE_CM0_H_GENERIC + 32:Drivers/CMSIS/Include/core_cm0.h **** #define __CORE_CM0_H_GENERIC + 33:Drivers/CMSIS/Include/core_cm0.h **** + 34:Drivers/CMSIS/Include/core_cm0.h **** #include <stdint.h> + 35:Drivers/CMSIS/Include/core_cm0.h **** + 36:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 37:Drivers/CMSIS/Include/core_cm0.h **** extern "C" { + 38:Drivers/CMSIS/Include/core_cm0.h **** #endif + 39:Drivers/CMSIS/Include/core_cm0.h **** + 40:Drivers/CMSIS/Include/core_cm0.h **** /** + 41:Drivers/CMSIS/Include/core_cm0.h **** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions + 42:Drivers/CMSIS/Include/core_cm0.h **** CMSIS violates the following MISRA-C:2004 rules: + 43:Drivers/CMSIS/Include/core_cm0.h **** + 44:Drivers/CMSIS/Include/core_cm0.h **** \li Required Rule 8.5, object/function definition in header file.<br> + 45:Drivers/CMSIS/Include/core_cm0.h **** Function definitions in header files are used to allow 'inlining'. + 46:Drivers/CMSIS/Include/core_cm0.h **** + 47:Drivers/CMSIS/Include/core_cm0.h **** \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br> + 48:Drivers/CMSIS/Include/core_cm0.h **** Unions are used for effective representation of core registers. + 49:Drivers/CMSIS/Include/core_cm0.h **** + 50:Drivers/CMSIS/Include/core_cm0.h **** \li Advisory Rule 19.7, Function-like macro defined.<br> + 51:Drivers/CMSIS/Include/core_cm0.h **** Function-like macros are used to allow more efficient code. + ARM GAS /tmp/ccwGqVnP.s page 5 + + + 52:Drivers/CMSIS/Include/core_cm0.h **** */ + 53:Drivers/CMSIS/Include/core_cm0.h **** + 54:Drivers/CMSIS/Include/core_cm0.h **** + 55:Drivers/CMSIS/Include/core_cm0.h **** /******************************************************************************* + 56:Drivers/CMSIS/Include/core_cm0.h **** * CMSIS definitions + 57:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 58:Drivers/CMSIS/Include/core_cm0.h **** /** + 59:Drivers/CMSIS/Include/core_cm0.h **** \ingroup Cortex_M0 + 60:Drivers/CMSIS/Include/core_cm0.h **** @{ + 61:Drivers/CMSIS/Include/core_cm0.h **** */ + 62:Drivers/CMSIS/Include/core_cm0.h **** + 63:Drivers/CMSIS/Include/core_cm0.h **** #include "cmsis_version.h" + 64:Drivers/CMSIS/Include/core_cm0.h **** + 65:Drivers/CMSIS/Include/core_cm0.h **** /* CMSIS CM0 definitions */ + 66:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) /*!< \deprecated [31:16] C + 67:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) /*!< \deprecated [15:0] C + 68:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_CMSIS_VERSION ((__CM0_CMSIS_VERSION_MAIN << 16U) | \ + 69:Drivers/CMSIS/Include/core_cm0.h **** __CM0_CMSIS_VERSION_SUB ) /*!< \deprecated CMSIS HAL + 70:Drivers/CMSIS/Include/core_cm0.h **** + 71:Drivers/CMSIS/Include/core_cm0.h **** #define __CORTEX_M (0U) /*!< Cortex-M Core */ + 72:Drivers/CMSIS/Include/core_cm0.h **** + 73:Drivers/CMSIS/Include/core_cm0.h **** /** __FPU_USED indicates whether an FPU is used or not. + 74:Drivers/CMSIS/Include/core_cm0.h **** This core does not support an FPU at all + 75:Drivers/CMSIS/Include/core_cm0.h **** */ + 76:Drivers/CMSIS/Include/core_cm0.h **** #define __FPU_USED 0U + 77:Drivers/CMSIS/Include/core_cm0.h **** + 78:Drivers/CMSIS/Include/core_cm0.h **** #if defined ( __CC_ARM ) + 79:Drivers/CMSIS/Include/core_cm0.h **** #if defined __TARGET_FPU_VFP + 80:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 81:Drivers/CMSIS/Include/core_cm0.h **** #endif + 82:Drivers/CMSIS/Include/core_cm0.h **** + 83:Drivers/CMSIS/Include/core_cm0.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) + 84:Drivers/CMSIS/Include/core_cm0.h **** #if defined __ARM_PCS_VFP + 85:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 86:Drivers/CMSIS/Include/core_cm0.h **** #endif + 87:Drivers/CMSIS/Include/core_cm0.h **** + 88:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __GNUC__ ) + 89:Drivers/CMSIS/Include/core_cm0.h **** #if defined (__VFP_FP__) && !defined(__SOFTFP__) + 90:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 91:Drivers/CMSIS/Include/core_cm0.h **** #endif + 92:Drivers/CMSIS/Include/core_cm0.h **** + 93:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __ICCARM__ ) + 94:Drivers/CMSIS/Include/core_cm0.h **** #if defined __ARMVFP__ + 95:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 96:Drivers/CMSIS/Include/core_cm0.h **** #endif + 97:Drivers/CMSIS/Include/core_cm0.h **** + 98:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __TI_ARM__ ) + 99:Drivers/CMSIS/Include/core_cm0.h **** #if defined __TI_VFP_SUPPORT__ + 100:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 101:Drivers/CMSIS/Include/core_cm0.h **** #endif + 102:Drivers/CMSIS/Include/core_cm0.h **** + 103:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __TASKING__ ) + 104:Drivers/CMSIS/Include/core_cm0.h **** #if defined __FPU_VFP__ + 105:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 106:Drivers/CMSIS/Include/core_cm0.h **** #endif + 107:Drivers/CMSIS/Include/core_cm0.h **** + 108:Drivers/CMSIS/Include/core_cm0.h **** #elif defined ( __CSMC__ ) + ARM GAS /tmp/ccwGqVnP.s page 6 + + + 109:Drivers/CMSIS/Include/core_cm0.h **** #if ( __CSMC__ & 0x400U) + 110:Drivers/CMSIS/Include/core_cm0.h **** #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)" + 111:Drivers/CMSIS/Include/core_cm0.h **** #endif + 112:Drivers/CMSIS/Include/core_cm0.h **** + 113:Drivers/CMSIS/Include/core_cm0.h **** #endif + 114:Drivers/CMSIS/Include/core_cm0.h **** + 115:Drivers/CMSIS/Include/core_cm0.h **** #include "cmsis_compiler.h" /* CMSIS compiler specific defines */ + 116:Drivers/CMSIS/Include/core_cm0.h **** + 117:Drivers/CMSIS/Include/core_cm0.h **** + 118:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 119:Drivers/CMSIS/Include/core_cm0.h **** } + 120:Drivers/CMSIS/Include/core_cm0.h **** #endif + 121:Drivers/CMSIS/Include/core_cm0.h **** + 122:Drivers/CMSIS/Include/core_cm0.h **** #endif /* __CORE_CM0_H_GENERIC */ + 123:Drivers/CMSIS/Include/core_cm0.h **** + 124:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CMSIS_GENERIC + 125:Drivers/CMSIS/Include/core_cm0.h **** + 126:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CORE_CM0_H_DEPENDANT + 127:Drivers/CMSIS/Include/core_cm0.h **** #define __CORE_CM0_H_DEPENDANT + 128:Drivers/CMSIS/Include/core_cm0.h **** + 129:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 130:Drivers/CMSIS/Include/core_cm0.h **** extern "C" { + 131:Drivers/CMSIS/Include/core_cm0.h **** #endif + 132:Drivers/CMSIS/Include/core_cm0.h **** + 133:Drivers/CMSIS/Include/core_cm0.h **** /* check device defines and use defaults */ + 134:Drivers/CMSIS/Include/core_cm0.h **** #if defined __CHECK_DEVICE_DEFINES + 135:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __CM0_REV + 136:Drivers/CMSIS/Include/core_cm0.h **** #define __CM0_REV 0x0000U + 137:Drivers/CMSIS/Include/core_cm0.h **** #warning "__CM0_REV not defined in device header file; using default!" + 138:Drivers/CMSIS/Include/core_cm0.h **** #endif + 139:Drivers/CMSIS/Include/core_cm0.h **** + 140:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __NVIC_PRIO_BITS + 141:Drivers/CMSIS/Include/core_cm0.h **** #define __NVIC_PRIO_BITS 2U + 142:Drivers/CMSIS/Include/core_cm0.h **** #warning "__NVIC_PRIO_BITS not defined in device header file; using default!" + 143:Drivers/CMSIS/Include/core_cm0.h **** #endif + 144:Drivers/CMSIS/Include/core_cm0.h **** + 145:Drivers/CMSIS/Include/core_cm0.h **** #ifndef __Vendor_SysTickConfig + 146:Drivers/CMSIS/Include/core_cm0.h **** #define __Vendor_SysTickConfig 0U + 147:Drivers/CMSIS/Include/core_cm0.h **** #warning "__Vendor_SysTickConfig not defined in device header file; using default!" + 148:Drivers/CMSIS/Include/core_cm0.h **** #endif + 149:Drivers/CMSIS/Include/core_cm0.h **** #endif + 150:Drivers/CMSIS/Include/core_cm0.h **** + 151:Drivers/CMSIS/Include/core_cm0.h **** /* IO definitions (access restrictions to peripheral registers) */ + 152:Drivers/CMSIS/Include/core_cm0.h **** /** + 153:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_glob_defs CMSIS Global Defines + 154:Drivers/CMSIS/Include/core_cm0.h **** + 155:Drivers/CMSIS/Include/core_cm0.h **** <strong>IO Type Qualifiers</strong> are used + 156:Drivers/CMSIS/Include/core_cm0.h **** \li to specify the access to peripheral variables. + 157:Drivers/CMSIS/Include/core_cm0.h **** \li for automatic generation of peripheral register debug information. + 158:Drivers/CMSIS/Include/core_cm0.h **** */ + 159:Drivers/CMSIS/Include/core_cm0.h **** #ifdef __cplusplus + 160:Drivers/CMSIS/Include/core_cm0.h **** #define __I volatile /*!< Defines 'read only' permissions */ + 161:Drivers/CMSIS/Include/core_cm0.h **** #else + 162:Drivers/CMSIS/Include/core_cm0.h **** #define __I volatile const /*!< Defines 'read only' permissions */ + 163:Drivers/CMSIS/Include/core_cm0.h **** #endif + 164:Drivers/CMSIS/Include/core_cm0.h **** #define __O volatile /*!< Defines 'write only' permissions */ + 165:Drivers/CMSIS/Include/core_cm0.h **** #define __IO volatile /*!< Defines 'read / write' permissions */ + ARM GAS /tmp/ccwGqVnP.s page 7 + + + 166:Drivers/CMSIS/Include/core_cm0.h **** + 167:Drivers/CMSIS/Include/core_cm0.h **** /* following defines should be used for structure members */ + 168:Drivers/CMSIS/Include/core_cm0.h **** #define __IM volatile const /*! Defines 'read only' structure member permissions */ + 169:Drivers/CMSIS/Include/core_cm0.h **** #define __OM volatile /*! Defines 'write only' structure member permissions */ + 170:Drivers/CMSIS/Include/core_cm0.h **** #define __IOM volatile /*! Defines 'read / write' structure member permissions */ + 171:Drivers/CMSIS/Include/core_cm0.h **** + 172:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group Cortex_M0 */ + 173:Drivers/CMSIS/Include/core_cm0.h **** + 174:Drivers/CMSIS/Include/core_cm0.h **** + 175:Drivers/CMSIS/Include/core_cm0.h **** + 176:Drivers/CMSIS/Include/core_cm0.h **** /******************************************************************************* + 177:Drivers/CMSIS/Include/core_cm0.h **** * Register Abstraction + 178:Drivers/CMSIS/Include/core_cm0.h **** Core Register contain: + 179:Drivers/CMSIS/Include/core_cm0.h **** - Core Register + 180:Drivers/CMSIS/Include/core_cm0.h **** - Core NVIC Register + 181:Drivers/CMSIS/Include/core_cm0.h **** - Core SCB Register + 182:Drivers/CMSIS/Include/core_cm0.h **** - Core SysTick Register + 183:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 184:Drivers/CMSIS/Include/core_cm0.h **** /** + 185:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_core_register Defines and Type Definitions + 186:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions and defines for Cortex-M processor based devices. + 187:Drivers/CMSIS/Include/core_cm0.h **** */ + 188:Drivers/CMSIS/Include/core_cm0.h **** + 189:Drivers/CMSIS/Include/core_cm0.h **** /** + 190:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 191:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_CORE Status and Control Registers + 192:Drivers/CMSIS/Include/core_cm0.h **** \brief Core Register type definitions. + 193:Drivers/CMSIS/Include/core_cm0.h **** @{ + 194:Drivers/CMSIS/Include/core_cm0.h **** */ + 195:Drivers/CMSIS/Include/core_cm0.h **** + 196:Drivers/CMSIS/Include/core_cm0.h **** /** + 197:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Application Program Status Register (APSR). + 198:Drivers/CMSIS/Include/core_cm0.h **** */ + 199:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 200:Drivers/CMSIS/Include/core_cm0.h **** { + 201:Drivers/CMSIS/Include/core_cm0.h **** struct + 202:Drivers/CMSIS/Include/core_cm0.h **** { + 203:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:28; /*!< bit: 0..27 Reserved */ + 204:Drivers/CMSIS/Include/core_cm0.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 205:Drivers/CMSIS/Include/core_cm0.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 206:Drivers/CMSIS/Include/core_cm0.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 207:Drivers/CMSIS/Include/core_cm0.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 208:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 209:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 210:Drivers/CMSIS/Include/core_cm0.h **** } APSR_Type; + 211:Drivers/CMSIS/Include/core_cm0.h **** + 212:Drivers/CMSIS/Include/core_cm0.h **** /* APSR Register Definitions */ + 213:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_N_Pos 31U /*!< APSR + 214:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_N_Msk (1UL << APSR_N_Pos) /*!< APSR + 215:Drivers/CMSIS/Include/core_cm0.h **** + 216:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_Z_Pos 30U /*!< APSR + 217:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_Z_Msk (1UL << APSR_Z_Pos) /*!< APSR + 218:Drivers/CMSIS/Include/core_cm0.h **** + 219:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_C_Pos 29U /*!< APSR + 220:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_C_Msk (1UL << APSR_C_Pos) /*!< APSR + 221:Drivers/CMSIS/Include/core_cm0.h **** + 222:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_V_Pos 28U /*!< APSR + ARM GAS /tmp/ccwGqVnP.s page 8 + + + 223:Drivers/CMSIS/Include/core_cm0.h **** #define APSR_V_Msk (1UL << APSR_V_Pos) /*!< APSR + 224:Drivers/CMSIS/Include/core_cm0.h **** + 225:Drivers/CMSIS/Include/core_cm0.h **** + 226:Drivers/CMSIS/Include/core_cm0.h **** /** + 227:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Interrupt Program Status Register (IPSR). + 228:Drivers/CMSIS/Include/core_cm0.h **** */ + 229:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 230:Drivers/CMSIS/Include/core_cm0.h **** { + 231:Drivers/CMSIS/Include/core_cm0.h **** struct + 232:Drivers/CMSIS/Include/core_cm0.h **** { + 233:Drivers/CMSIS/Include/core_cm0.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 234:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:23; /*!< bit: 9..31 Reserved */ + 235:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 236:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 237:Drivers/CMSIS/Include/core_cm0.h **** } IPSR_Type; + 238:Drivers/CMSIS/Include/core_cm0.h **** + 239:Drivers/CMSIS/Include/core_cm0.h **** /* IPSR Register Definitions */ + 240:Drivers/CMSIS/Include/core_cm0.h **** #define IPSR_ISR_Pos 0U /*!< IPSR + 241:Drivers/CMSIS/Include/core_cm0.h **** #define IPSR_ISR_Msk (0x1FFUL /*<< IPSR_ISR_Pos*/) /*!< IPSR + 242:Drivers/CMSIS/Include/core_cm0.h **** + 243:Drivers/CMSIS/Include/core_cm0.h **** + 244:Drivers/CMSIS/Include/core_cm0.h **** /** + 245:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Special-Purpose Program Status Registers (xPSR). + 246:Drivers/CMSIS/Include/core_cm0.h **** */ + 247:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 248:Drivers/CMSIS/Include/core_cm0.h **** { + 249:Drivers/CMSIS/Include/core_cm0.h **** struct + 250:Drivers/CMSIS/Include/core_cm0.h **** { + 251:Drivers/CMSIS/Include/core_cm0.h **** uint32_t ISR:9; /*!< bit: 0.. 8 Exception number */ + 252:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:15; /*!< bit: 9..23 Reserved */ + 253:Drivers/CMSIS/Include/core_cm0.h **** uint32_t T:1; /*!< bit: 24 Thumb bit (read 0) */ + 254:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved1:3; /*!< bit: 25..27 Reserved */ + 255:Drivers/CMSIS/Include/core_cm0.h **** uint32_t V:1; /*!< bit: 28 Overflow condition code flag */ + 256:Drivers/CMSIS/Include/core_cm0.h **** uint32_t C:1; /*!< bit: 29 Carry condition code flag */ + 257:Drivers/CMSIS/Include/core_cm0.h **** uint32_t Z:1; /*!< bit: 30 Zero condition code flag */ + 258:Drivers/CMSIS/Include/core_cm0.h **** uint32_t N:1; /*!< bit: 31 Negative condition code flag */ + 259:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 260:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 261:Drivers/CMSIS/Include/core_cm0.h **** } xPSR_Type; + 262:Drivers/CMSIS/Include/core_cm0.h **** + 263:Drivers/CMSIS/Include/core_cm0.h **** /* xPSR Register Definitions */ + 264:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_N_Pos 31U /*!< xPSR + 265:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_N_Msk (1UL << xPSR_N_Pos) /*!< xPSR + 266:Drivers/CMSIS/Include/core_cm0.h **** + 267:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_Z_Pos 30U /*!< xPSR + 268:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_Z_Msk (1UL << xPSR_Z_Pos) /*!< xPSR + 269:Drivers/CMSIS/Include/core_cm0.h **** + 270:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_C_Pos 29U /*!< xPSR + 271:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_C_Msk (1UL << xPSR_C_Pos) /*!< xPSR + 272:Drivers/CMSIS/Include/core_cm0.h **** + 273:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_V_Pos 28U /*!< xPSR + 274:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_V_Msk (1UL << xPSR_V_Pos) /*!< xPSR + 275:Drivers/CMSIS/Include/core_cm0.h **** + 276:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_T_Pos 24U /*!< xPSR + 277:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR + 278:Drivers/CMSIS/Include/core_cm0.h **** + 279:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_ISR_Pos 0U /*!< xPSR + ARM GAS /tmp/ccwGqVnP.s page 9 + + + 280:Drivers/CMSIS/Include/core_cm0.h **** #define xPSR_ISR_Msk (0x1FFUL /*<< xPSR_ISR_Pos*/) /*!< xPSR + 281:Drivers/CMSIS/Include/core_cm0.h **** + 282:Drivers/CMSIS/Include/core_cm0.h **** + 283:Drivers/CMSIS/Include/core_cm0.h **** /** + 284:Drivers/CMSIS/Include/core_cm0.h **** \brief Union type to access the Control Registers (CONTROL). + 285:Drivers/CMSIS/Include/core_cm0.h **** */ + 286:Drivers/CMSIS/Include/core_cm0.h **** typedef union + 287:Drivers/CMSIS/Include/core_cm0.h **** { + 288:Drivers/CMSIS/Include/core_cm0.h **** struct + 289:Drivers/CMSIS/Include/core_cm0.h **** { + 290:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved0:1; /*!< bit: 0 Reserved */ + 291:Drivers/CMSIS/Include/core_cm0.h **** uint32_t SPSEL:1; /*!< bit: 1 Stack to be used */ + 292:Drivers/CMSIS/Include/core_cm0.h **** uint32_t _reserved1:30; /*!< bit: 2..31 Reserved */ + 293:Drivers/CMSIS/Include/core_cm0.h **** } b; /*!< Structure used for bit access */ + 294:Drivers/CMSIS/Include/core_cm0.h **** uint32_t w; /*!< Type used for word access */ + 295:Drivers/CMSIS/Include/core_cm0.h **** } CONTROL_Type; + 296:Drivers/CMSIS/Include/core_cm0.h **** + 297:Drivers/CMSIS/Include/core_cm0.h **** /* CONTROL Register Definitions */ + 298:Drivers/CMSIS/Include/core_cm0.h **** #define CONTROL_SPSEL_Pos 1U /*!< CONT + 299:Drivers/CMSIS/Include/core_cm0.h **** #define CONTROL_SPSEL_Msk (1UL << CONTROL_SPSEL_Pos) /*!< CONT + 300:Drivers/CMSIS/Include/core_cm0.h **** + 301:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_CORE */ + 302:Drivers/CMSIS/Include/core_cm0.h **** + 303:Drivers/CMSIS/Include/core_cm0.h **** + 304:Drivers/CMSIS/Include/core_cm0.h **** /** + 305:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 306:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_NVIC Nested Vectored Interrupt Controller (NVIC) + 307:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions for the NVIC Registers + 308:Drivers/CMSIS/Include/core_cm0.h **** @{ + 309:Drivers/CMSIS/Include/core_cm0.h **** */ + 310:Drivers/CMSIS/Include/core_cm0.h **** + 311:Drivers/CMSIS/Include/core_cm0.h **** /** + 312:Drivers/CMSIS/Include/core_cm0.h **** \brief Structure type to access the Nested Vectored Interrupt Controller (NVIC). + 313:Drivers/CMSIS/Include/core_cm0.h **** */ + 314:Drivers/CMSIS/Include/core_cm0.h **** typedef struct + 315:Drivers/CMSIS/Include/core_cm0.h **** { + 316:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ISER[1U]; /*!< Offset: 0x000 (R/W) Interrupt Set Enable Register */ + 317:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED0[31U]; + 318:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ICER[1U]; /*!< Offset: 0x080 (R/W) Interrupt Clear Enable Register + 319:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RSERVED1[31U]; + 320:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ISPR[1U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * + 321:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED2[31U]; + 322:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ICPR[1U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register + 323:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED3[31U]; + 324:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED4[64U]; + 325:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t IP[8U]; /*!< Offset: 0x300 (R/W) Interrupt Priority Register */ + 326:Drivers/CMSIS/Include/core_cm0.h **** } NVIC_Type; + 327:Drivers/CMSIS/Include/core_cm0.h **** + 328:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_NVIC */ + 329:Drivers/CMSIS/Include/core_cm0.h **** + 330:Drivers/CMSIS/Include/core_cm0.h **** + 331:Drivers/CMSIS/Include/core_cm0.h **** /** + 332:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 333:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_SCB System Control Block (SCB) + 334:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions for the System Control Block Registers + 335:Drivers/CMSIS/Include/core_cm0.h **** @{ + 336:Drivers/CMSIS/Include/core_cm0.h **** */ + ARM GAS /tmp/ccwGqVnP.s page 10 + + + 337:Drivers/CMSIS/Include/core_cm0.h **** + 338:Drivers/CMSIS/Include/core_cm0.h **** /** + 339:Drivers/CMSIS/Include/core_cm0.h **** \brief Structure type to access the System Control Block (SCB). + 340:Drivers/CMSIS/Include/core_cm0.h **** */ + 341:Drivers/CMSIS/Include/core_cm0.h **** typedef struct + 342:Drivers/CMSIS/Include/core_cm0.h **** { + 343:Drivers/CMSIS/Include/core_cm0.h **** __IM uint32_t CPUID; /*!< Offset: 0x000 (R/ ) CPUID Base Register */ + 344:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t ICSR; /*!< Offset: 0x004 (R/W) Interrupt Control and State Regi + 345:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED0; + 346:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t AIRCR; /*!< Offset: 0x00C (R/W) Application Interrupt and Reset + 347:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t SCR; /*!< Offset: 0x010 (R/W) System Control Register */ + 348:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register * + 349:Drivers/CMSIS/Include/core_cm0.h **** uint32_t RESERVED1; + 350:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t SHP[2U]; /*!< Offset: 0x01C (R/W) System Handlers Priority Registe + 351:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t SHCSR; /*!< Offset: 0x024 (R/W) System Handler Control and State + 352:Drivers/CMSIS/Include/core_cm0.h **** } SCB_Type; + 353:Drivers/CMSIS/Include/core_cm0.h **** + 354:Drivers/CMSIS/Include/core_cm0.h **** /* SCB CPUID Register Definitions */ + 355:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_IMPLEMENTER_Pos 24U /*!< SCB + 356:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) /*!< SCB + 357:Drivers/CMSIS/Include/core_cm0.h **** + 358:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_VARIANT_Pos 20U /*!< SCB + 359:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) /*!< SCB + 360:Drivers/CMSIS/Include/core_cm0.h **** + 361:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_ARCHITECTURE_Pos 16U /*!< SCB + 362:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) /*!< SCB + 363:Drivers/CMSIS/Include/core_cm0.h **** + 364:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_PARTNO_Pos 4U /*!< SCB + 365:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) /*!< SCB + 366:Drivers/CMSIS/Include/core_cm0.h **** + 367:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_REVISION_Pos 0U /*!< SCB + 368:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CPUID_REVISION_Msk (0xFUL /*<< SCB_CPUID_REVISION_Pos*/) /*!< SCB + 369:Drivers/CMSIS/Include/core_cm0.h **** + 370:Drivers/CMSIS/Include/core_cm0.h **** /* SCB Interrupt Control State Register Definitions */ + 371:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_NMIPENDSET_Pos 31U /*!< SCB + 372:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_NMIPENDSET_Msk (1UL << SCB_ICSR_NMIPENDSET_Pos) /*!< SCB + 373:Drivers/CMSIS/Include/core_cm0.h **** + 374:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVSET_Pos 28U /*!< SCB + 375:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVSET_Msk (1UL << SCB_ICSR_PENDSVSET_Pos) /*!< SCB + 376:Drivers/CMSIS/Include/core_cm0.h **** + 377:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVCLR_Pos 27U /*!< SCB + 378:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSVCLR_Msk (1UL << SCB_ICSR_PENDSVCLR_Pos) /*!< SCB + 379:Drivers/CMSIS/Include/core_cm0.h **** + 380:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTSET_Pos 26U /*!< SCB + 381:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTSET_Msk (1UL << SCB_ICSR_PENDSTSET_Pos) /*!< SCB + 382:Drivers/CMSIS/Include/core_cm0.h **** + 383:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTCLR_Pos 25U /*!< SCB + 384:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_PENDSTCLR_Msk (1UL << SCB_ICSR_PENDSTCLR_Pos) /*!< SCB + 385:Drivers/CMSIS/Include/core_cm0.h **** + 386:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB + 387:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB + 388:Drivers/CMSIS/Include/core_cm0.h **** + 389:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB + 390:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_ISRPENDING_Msk (1UL << SCB_ICSR_ISRPENDING_Pos) /*!< SCB + 391:Drivers/CMSIS/Include/core_cm0.h **** + 392:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTPENDING_Pos 12U /*!< SCB + 393:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTPENDING_Msk (0x1FFUL << SCB_ICSR_VECTPENDING_Pos) /*!< SCB + ARM GAS /tmp/ccwGqVnP.s page 11 + + + 394:Drivers/CMSIS/Include/core_cm0.h **** + 395:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTACTIVE_Pos 0U /*!< SCB + 396:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_ICSR_VECTACTIVE_Msk (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/) /*!< SCB + 397:Drivers/CMSIS/Include/core_cm0.h **** + 398:Drivers/CMSIS/Include/core_cm0.h **** /* SCB Application Interrupt and Reset Control Register Definitions */ + 399:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEY_Pos 16U /*!< SCB + 400:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEY_Msk (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos) /*!< SCB + 401:Drivers/CMSIS/Include/core_cm0.h **** + 402:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEYSTAT_Pos 16U /*!< SCB + 403:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTKEYSTAT_Msk (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos) /*!< SCB + 404:Drivers/CMSIS/Include/core_cm0.h **** + 405:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_ENDIANESS_Pos 15U /*!< SCB + 406:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_ENDIANESS_Msk (1UL << SCB_AIRCR_ENDIANESS_Pos) /*!< SCB + 407:Drivers/CMSIS/Include/core_cm0.h **** + 408:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_SYSRESETREQ_Pos 2U /*!< SCB + 409:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_SYSRESETREQ_Msk (1UL << SCB_AIRCR_SYSRESETREQ_Pos) /*!< SCB + 410:Drivers/CMSIS/Include/core_cm0.h **** + 411:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTCLRACTIVE_Pos 1U /*!< SCB + 412:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_AIRCR_VECTCLRACTIVE_Msk (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos) /*!< SCB + 413:Drivers/CMSIS/Include/core_cm0.h **** + 414:Drivers/CMSIS/Include/core_cm0.h **** /* SCB System Control Register Definitions */ + 415:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SEVONPEND_Pos 4U /*!< SCB + 416:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SEVONPEND_Msk (1UL << SCB_SCR_SEVONPEND_Pos) /*!< SCB + 417:Drivers/CMSIS/Include/core_cm0.h **** + 418:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPDEEP_Pos 2U /*!< SCB + 419:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPDEEP_Msk (1UL << SCB_SCR_SLEEPDEEP_Pos) /*!< SCB + 420:Drivers/CMSIS/Include/core_cm0.h **** + 421:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPONEXIT_Pos 1U /*!< SCB + 422:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SCR_SLEEPONEXIT_Msk (1UL << SCB_SCR_SLEEPONEXIT_Pos) /*!< SCB + 423:Drivers/CMSIS/Include/core_cm0.h **** + 424:Drivers/CMSIS/Include/core_cm0.h **** /* SCB Configuration Control Register Definitions */ + 425:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_STKALIGN_Pos 9U /*!< SCB + 426:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_STKALIGN_Msk (1UL << SCB_CCR_STKALIGN_Pos) /*!< SCB + 427:Drivers/CMSIS/Include/core_cm0.h **** + 428:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_UNALIGN_TRP_Pos 3U /*!< SCB + 429:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_CCR_UNALIGN_TRP_Msk (1UL << SCB_CCR_UNALIGN_TRP_Pos) /*!< SCB + 430:Drivers/CMSIS/Include/core_cm0.h **** + 431:Drivers/CMSIS/Include/core_cm0.h **** /* SCB System Handler Control and State Register Definitions */ + 432:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SHCSR_SVCALLPENDED_Pos 15U /*!< SCB + 433:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_SHCSR_SVCALLPENDED_Msk (1UL << SCB_SHCSR_SVCALLPENDED_Pos) /*!< SCB + 434:Drivers/CMSIS/Include/core_cm0.h **** + 435:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_SCB */ + 436:Drivers/CMSIS/Include/core_cm0.h **** + 437:Drivers/CMSIS/Include/core_cm0.h **** + 438:Drivers/CMSIS/Include/core_cm0.h **** /** + 439:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 440:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_SysTick System Tick Timer (SysTick) + 441:Drivers/CMSIS/Include/core_cm0.h **** \brief Type definitions for the System Timer Registers. + 442:Drivers/CMSIS/Include/core_cm0.h **** @{ + 443:Drivers/CMSIS/Include/core_cm0.h **** */ + 444:Drivers/CMSIS/Include/core_cm0.h **** + 445:Drivers/CMSIS/Include/core_cm0.h **** /** + 446:Drivers/CMSIS/Include/core_cm0.h **** \brief Structure type to access the System Timer (SysTick). + 447:Drivers/CMSIS/Include/core_cm0.h **** */ + 448:Drivers/CMSIS/Include/core_cm0.h **** typedef struct + 449:Drivers/CMSIS/Include/core_cm0.h **** { + 450:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regis + ARM GAS /tmp/ccwGqVnP.s page 12 + + + 451:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t LOAD; /*!< Offset: 0x004 (R/W) SysTick Reload Value Register */ + 452:Drivers/CMSIS/Include/core_cm0.h **** __IOM uint32_t VAL; /*!< Offset: 0x008 (R/W) SysTick Current Value Register * + 453:Drivers/CMSIS/Include/core_cm0.h **** __IM uint32_t CALIB; /*!< Offset: 0x00C (R/ ) SysTick Calibration Register */ + 454:Drivers/CMSIS/Include/core_cm0.h **** } SysTick_Type; + 455:Drivers/CMSIS/Include/core_cm0.h **** + 456:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Control / Status Register Definitions */ + 457:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_COUNTFLAG_Pos 16U /*!< SysT + 458:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_COUNTFLAG_Msk (1UL << SysTick_CTRL_COUNTFLAG_Pos) /*!< SysT + 459:Drivers/CMSIS/Include/core_cm0.h **** + 460:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_CLKSOURCE_Pos 2U /*!< SysT + 461:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_CLKSOURCE_Msk (1UL << SysTick_CTRL_CLKSOURCE_Pos) /*!< SysT + 462:Drivers/CMSIS/Include/core_cm0.h **** + 463:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_TICKINT_Pos 1U /*!< SysT + 464:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_TICKINT_Msk (1UL << SysTick_CTRL_TICKINT_Pos) /*!< SysT + 465:Drivers/CMSIS/Include/core_cm0.h **** + 466:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_ENABLE_Pos 0U /*!< SysT + 467:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CTRL_ENABLE_Msk (1UL /*<< SysTick_CTRL_ENABLE_Pos*/) /*!< SysT + 468:Drivers/CMSIS/Include/core_cm0.h **** + 469:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Reload Register Definitions */ + 470:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_LOAD_RELOAD_Pos 0U /*!< SysT + 471:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_LOAD_RELOAD_Msk (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/) /*!< SysT + 472:Drivers/CMSIS/Include/core_cm0.h **** + 473:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Current Register Definitions */ + 474:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_VAL_CURRENT_Pos 0U /*!< SysT + 475:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_VAL_CURRENT_Msk (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/) /*!< SysT + 476:Drivers/CMSIS/Include/core_cm0.h **** + 477:Drivers/CMSIS/Include/core_cm0.h **** /* SysTick Calibration Register Definitions */ + 478:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_NOREF_Pos 31U /*!< SysT + 479:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_NOREF_Msk (1UL << SysTick_CALIB_NOREF_Pos) /*!< SysT + 480:Drivers/CMSIS/Include/core_cm0.h **** + 481:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_SKEW_Pos 30U /*!< SysT + 482:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_SKEW_Msk (1UL << SysTick_CALIB_SKEW_Pos) /*!< SysT + 483:Drivers/CMSIS/Include/core_cm0.h **** + 484:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT + 485:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT + 486:Drivers/CMSIS/Include/core_cm0.h **** + 487:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_SysTick */ + 488:Drivers/CMSIS/Include/core_cm0.h **** + 489:Drivers/CMSIS/Include/core_cm0.h **** + 490:Drivers/CMSIS/Include/core_cm0.h **** /** + 491:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 492:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) + 493:Drivers/CMSIS/Include/core_cm0.h **** \brief Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible ove + 494:Drivers/CMSIS/Include/core_cm0.h **** Therefore they are not covered by the Cortex-M0 header file. + 495:Drivers/CMSIS/Include/core_cm0.h **** @{ + 496:Drivers/CMSIS/Include/core_cm0.h **** */ + 497:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_CoreDebug */ + 498:Drivers/CMSIS/Include/core_cm0.h **** + 499:Drivers/CMSIS/Include/core_cm0.h **** + 500:Drivers/CMSIS/Include/core_cm0.h **** /** + 501:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 502:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_core_bitfield Core register bit field macros + 503:Drivers/CMSIS/Include/core_cm0.h **** \brief Macros for use with bit field definitions (xxx_Pos, xxx_Msk). + 504:Drivers/CMSIS/Include/core_cm0.h **** @{ + 505:Drivers/CMSIS/Include/core_cm0.h **** */ + 506:Drivers/CMSIS/Include/core_cm0.h **** + 507:Drivers/CMSIS/Include/core_cm0.h **** /** + ARM GAS /tmp/ccwGqVnP.s page 13 + + + 508:Drivers/CMSIS/Include/core_cm0.h **** \brief Mask and shift a bit field value for use in a register bit range. + 509:Drivers/CMSIS/Include/core_cm0.h **** \param[in] field Name of the register bit field. + 510:Drivers/CMSIS/Include/core_cm0.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. + 511:Drivers/CMSIS/Include/core_cm0.h **** \return Masked and shifted value. + 512:Drivers/CMSIS/Include/core_cm0.h **** */ + 513:Drivers/CMSIS/Include/core_cm0.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) + 514:Drivers/CMSIS/Include/core_cm0.h **** + 515:Drivers/CMSIS/Include/core_cm0.h **** /** + 516:Drivers/CMSIS/Include/core_cm0.h **** \brief Mask and shift a register value to extract a bit filed value. + 517:Drivers/CMSIS/Include/core_cm0.h **** \param[in] field Name of the register bit field. + 518:Drivers/CMSIS/Include/core_cm0.h **** \param[in] value Value of register. This parameter is interpreted as an uint32_t type. + 519:Drivers/CMSIS/Include/core_cm0.h **** \return Masked and shifted bit field value. + 520:Drivers/CMSIS/Include/core_cm0.h **** */ + 521:Drivers/CMSIS/Include/core_cm0.h **** #define _FLD2VAL(field, value) (((uint32_t)(value) & field ## _Msk) >> field ## _Pos) + 522:Drivers/CMSIS/Include/core_cm0.h **** + 523:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of group CMSIS_core_bitfield */ + 524:Drivers/CMSIS/Include/core_cm0.h **** + 525:Drivers/CMSIS/Include/core_cm0.h **** + 526:Drivers/CMSIS/Include/core_cm0.h **** /** + 527:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_core_register + 528:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_core_base Core Definitions + 529:Drivers/CMSIS/Include/core_cm0.h **** \brief Definitions for base addresses, unions, and structures. + 530:Drivers/CMSIS/Include/core_cm0.h **** @{ + 531:Drivers/CMSIS/Include/core_cm0.h **** */ + 532:Drivers/CMSIS/Include/core_cm0.h **** + 533:Drivers/CMSIS/Include/core_cm0.h **** /* Memory mapping of Core Hardware */ + 534:Drivers/CMSIS/Include/core_cm0.h **** #define SCS_BASE (0xE000E000UL) /*!< System Control Space Bas + 535:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick_BASE (SCS_BASE + 0x0010UL) /*!< SysTick Base Address */ + 536:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_BASE (SCS_BASE + 0x0100UL) /*!< NVIC Base Address */ + 537:Drivers/CMSIS/Include/core_cm0.h **** #define SCB_BASE (SCS_BASE + 0x0D00UL) /*!< System Control Block Bas + 538:Drivers/CMSIS/Include/core_cm0.h **** + 539:Drivers/CMSIS/Include/core_cm0.h **** #define SCB ((SCB_Type *) SCB_BASE ) /*!< SCB configuration struct + 540:Drivers/CMSIS/Include/core_cm0.h **** #define SysTick ((SysTick_Type *) SysTick_BASE ) /*!< SysTick configuration st + 541:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC ((NVIC_Type *) NVIC_BASE ) /*!< NVIC configuration struc + 542:Drivers/CMSIS/Include/core_cm0.h **** + 543:Drivers/CMSIS/Include/core_cm0.h **** + 544:Drivers/CMSIS/Include/core_cm0.h **** /*@} */ + 545:Drivers/CMSIS/Include/core_cm0.h **** + 546:Drivers/CMSIS/Include/core_cm0.h **** + 547:Drivers/CMSIS/Include/core_cm0.h **** + 548:Drivers/CMSIS/Include/core_cm0.h **** /******************************************************************************* + 549:Drivers/CMSIS/Include/core_cm0.h **** * Hardware Abstraction Layer + 550:Drivers/CMSIS/Include/core_cm0.h **** Core Function Interface contains: + 551:Drivers/CMSIS/Include/core_cm0.h **** - Core NVIC Functions + 552:Drivers/CMSIS/Include/core_cm0.h **** - Core SysTick Functions + 553:Drivers/CMSIS/Include/core_cm0.h **** - Core Register Access Functions + 554:Drivers/CMSIS/Include/core_cm0.h **** ******************************************************************************/ + 555:Drivers/CMSIS/Include/core_cm0.h **** /** + 556:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference + 557:Drivers/CMSIS/Include/core_cm0.h **** */ + 558:Drivers/CMSIS/Include/core_cm0.h **** + 559:Drivers/CMSIS/Include/core_cm0.h **** + 560:Drivers/CMSIS/Include/core_cm0.h **** + 561:Drivers/CMSIS/Include/core_cm0.h **** /* ########################## NVIC functions #################################### */ + 562:Drivers/CMSIS/Include/core_cm0.h **** /** + 563:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_Core_FunctionInterface + 564:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_NVICFunctions NVIC Functions + ARM GAS /tmp/ccwGqVnP.s page 14 + + + 565:Drivers/CMSIS/Include/core_cm0.h **** \brief Functions that manage interrupts and exceptions via the NVIC. + 566:Drivers/CMSIS/Include/core_cm0.h **** @{ + 567:Drivers/CMSIS/Include/core_cm0.h **** */ + 568:Drivers/CMSIS/Include/core_cm0.h **** + 569:Drivers/CMSIS/Include/core_cm0.h **** #ifdef CMSIS_NVIC_VIRTUAL + 570:Drivers/CMSIS/Include/core_cm0.h **** #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE + 571:Drivers/CMSIS/Include/core_cm0.h **** #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h" + 572:Drivers/CMSIS/Include/core_cm0.h **** #endif + 573:Drivers/CMSIS/Include/core_cm0.h **** #include CMSIS_NVIC_VIRTUAL_HEADER_FILE + 574:Drivers/CMSIS/Include/core_cm0.h **** #else + 575:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping + 576:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping + 577:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_EnableIRQ __NVIC_EnableIRQ + 578:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetEnableIRQ __NVIC_GetEnableIRQ + 579:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_DisableIRQ __NVIC_DisableIRQ + 580:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ + 581:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ + 582:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ + 583:Drivers/CMSIS/Include/core_cm0.h **** /*#define NVIC_GetActive __NVIC_GetActive not available for Cortex-M0 */ + 584:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetPriority __NVIC_SetPriority + 585:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetPriority __NVIC_GetPriority + 586:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SystemReset __NVIC_SystemReset + 587:Drivers/CMSIS/Include/core_cm0.h **** #endif /* CMSIS_NVIC_VIRTUAL */ + 588:Drivers/CMSIS/Include/core_cm0.h **** + 589:Drivers/CMSIS/Include/core_cm0.h **** #ifdef CMSIS_VECTAB_VIRTUAL + 590:Drivers/CMSIS/Include/core_cm0.h **** #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE + 591:Drivers/CMSIS/Include/core_cm0.h **** #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h" + 592:Drivers/CMSIS/Include/core_cm0.h **** #endif + 593:Drivers/CMSIS/Include/core_cm0.h **** #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE + 594:Drivers/CMSIS/Include/core_cm0.h **** #else + 595:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_SetVector __NVIC_SetVector + 596:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_GetVector __NVIC_GetVector + 597:Drivers/CMSIS/Include/core_cm0.h **** #endif /* (CMSIS_VECTAB_VIRTUAL) */ + 598:Drivers/CMSIS/Include/core_cm0.h **** + 599:Drivers/CMSIS/Include/core_cm0.h **** #define NVIC_USER_IRQ_OFFSET 16 + 600:Drivers/CMSIS/Include/core_cm0.h **** + 601:Drivers/CMSIS/Include/core_cm0.h **** + 602:Drivers/CMSIS/Include/core_cm0.h **** /* The following EXC_RETURN values are saved the LR on exception entry */ + 603:Drivers/CMSIS/Include/core_cm0.h **** #define EXC_RETURN_HANDLER (0xFFFFFFF1UL) /* return to Handler mode, uses MSP after ret + 604:Drivers/CMSIS/Include/core_cm0.h **** #define EXC_RETURN_THREAD_MSP (0xFFFFFFF9UL) /* return to Thread mode, uses MSP after retu + 605:Drivers/CMSIS/Include/core_cm0.h **** #define EXC_RETURN_THREAD_PSP (0xFFFFFFFDUL) /* return to Thread mode, uses PSP after retu + 606:Drivers/CMSIS/Include/core_cm0.h **** + 607:Drivers/CMSIS/Include/core_cm0.h **** + 608:Drivers/CMSIS/Include/core_cm0.h **** /* Interrupt Priorities are WORD accessible only under Armv6-M */ + 609:Drivers/CMSIS/Include/core_cm0.h **** /* The following MACROS handle generation of the register offset and byte masks */ + 610:Drivers/CMSIS/Include/core_cm0.h **** #define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL) + 611:Drivers/CMSIS/Include/core_cm0.h **** #define _SHP_IDX(IRQn) ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >> 2UL) ) + 612:Drivers/CMSIS/Include/core_cm0.h **** #define _IP_IDX(IRQn) ( (((uint32_t)(int32_t)(IRQn)) >> 2UL) ) + 613:Drivers/CMSIS/Include/core_cm0.h **** + 614:Drivers/CMSIS/Include/core_cm0.h **** #define __NVIC_SetPriorityGrouping(X) (void)(X) + 615:Drivers/CMSIS/Include/core_cm0.h **** #define __NVIC_GetPriorityGrouping() (0U) + 616:Drivers/CMSIS/Include/core_cm0.h **** + 617:Drivers/CMSIS/Include/core_cm0.h **** /** + 618:Drivers/CMSIS/Include/core_cm0.h **** \brief Enable Interrupt + 619:Drivers/CMSIS/Include/core_cm0.h **** \details Enables a device specific interrupt in the NVIC interrupt controller. + 620:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 621:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + ARM GAS /tmp/ccwGqVnP.s page 15 + + + 622:Drivers/CMSIS/Include/core_cm0.h **** */ + 623:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) + 624:Drivers/CMSIS/Include/core_cm0.h **** { + 625:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 626:Drivers/CMSIS/Include/core_cm0.h **** { + 627:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 628:Drivers/CMSIS/Include/core_cm0.h **** } + 629:Drivers/CMSIS/Include/core_cm0.h **** } + 630:Drivers/CMSIS/Include/core_cm0.h **** + 631:Drivers/CMSIS/Include/core_cm0.h **** + 632:Drivers/CMSIS/Include/core_cm0.h **** /** + 633:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Interrupt Enable status + 634:Drivers/CMSIS/Include/core_cm0.h **** \details Returns a device specific interrupt enable status from the NVIC interrupt controller. + 635:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 636:Drivers/CMSIS/Include/core_cm0.h **** \return 0 Interrupt is not enabled. + 637:Drivers/CMSIS/Include/core_cm0.h **** \return 1 Interrupt is enabled. + 638:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 639:Drivers/CMSIS/Include/core_cm0.h **** */ + 640:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn) + 641:Drivers/CMSIS/Include/core_cm0.h **** { + 642:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 643:Drivers/CMSIS/Include/core_cm0.h **** { + 644:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL) + 645:Drivers/CMSIS/Include/core_cm0.h **** } + 646:Drivers/CMSIS/Include/core_cm0.h **** else + 647:Drivers/CMSIS/Include/core_cm0.h **** { + 648:Drivers/CMSIS/Include/core_cm0.h **** return(0U); + 649:Drivers/CMSIS/Include/core_cm0.h **** } + 650:Drivers/CMSIS/Include/core_cm0.h **** } + 651:Drivers/CMSIS/Include/core_cm0.h **** + 652:Drivers/CMSIS/Include/core_cm0.h **** + 653:Drivers/CMSIS/Include/core_cm0.h **** /** + 654:Drivers/CMSIS/Include/core_cm0.h **** \brief Disable Interrupt + 655:Drivers/CMSIS/Include/core_cm0.h **** \details Disables a device specific interrupt in the NVIC interrupt controller. + 656:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 657:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 658:Drivers/CMSIS/Include/core_cm0.h **** */ + 659:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn) + 660:Drivers/CMSIS/Include/core_cm0.h **** { + 661:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 662:Drivers/CMSIS/Include/core_cm0.h **** { + 663:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 664:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 665:Drivers/CMSIS/Include/core_cm0.h **** __ISB(); + 666:Drivers/CMSIS/Include/core_cm0.h **** } + 667:Drivers/CMSIS/Include/core_cm0.h **** } + 668:Drivers/CMSIS/Include/core_cm0.h **** + 669:Drivers/CMSIS/Include/core_cm0.h **** + 670:Drivers/CMSIS/Include/core_cm0.h **** /** + 671:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Pending Interrupt + 672:Drivers/CMSIS/Include/core_cm0.h **** \details Reads the NVIC pending register and returns the pending bit for the specified device spe + 673:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 674:Drivers/CMSIS/Include/core_cm0.h **** \return 0 Interrupt status is not pending. + 675:Drivers/CMSIS/Include/core_cm0.h **** \return 1 Interrupt status is pending. + 676:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 677:Drivers/CMSIS/Include/core_cm0.h **** */ + 678:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn) + ARM GAS /tmp/ccwGqVnP.s page 16 + + + 679:Drivers/CMSIS/Include/core_cm0.h **** { + 680:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 681:Drivers/CMSIS/Include/core_cm0.h **** { + 682:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL) + 683:Drivers/CMSIS/Include/core_cm0.h **** } + 684:Drivers/CMSIS/Include/core_cm0.h **** else + 685:Drivers/CMSIS/Include/core_cm0.h **** { + 686:Drivers/CMSIS/Include/core_cm0.h **** return(0U); + 687:Drivers/CMSIS/Include/core_cm0.h **** } + 688:Drivers/CMSIS/Include/core_cm0.h **** } + 689:Drivers/CMSIS/Include/core_cm0.h **** + 690:Drivers/CMSIS/Include/core_cm0.h **** + 691:Drivers/CMSIS/Include/core_cm0.h **** /** + 692:Drivers/CMSIS/Include/core_cm0.h **** \brief Set Pending Interrupt + 693:Drivers/CMSIS/Include/core_cm0.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. + 694:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 695:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 696:Drivers/CMSIS/Include/core_cm0.h **** */ + 697:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn) + 698:Drivers/CMSIS/Include/core_cm0.h **** { + 699:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 700:Drivers/CMSIS/Include/core_cm0.h **** { + 701:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 702:Drivers/CMSIS/Include/core_cm0.h **** } + 703:Drivers/CMSIS/Include/core_cm0.h **** } + 704:Drivers/CMSIS/Include/core_cm0.h **** + 705:Drivers/CMSIS/Include/core_cm0.h **** + 706:Drivers/CMSIS/Include/core_cm0.h **** /** + 707:Drivers/CMSIS/Include/core_cm0.h **** \brief Clear Pending Interrupt + 708:Drivers/CMSIS/Include/core_cm0.h **** \details Clears the pending bit of a device specific interrupt in the NVIC pending register. + 709:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Device specific interrupt number. + 710:Drivers/CMSIS/Include/core_cm0.h **** \note IRQn must not be negative. + 711:Drivers/CMSIS/Include/core_cm0.h **** */ + 712:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn) + 713:Drivers/CMSIS/Include/core_cm0.h **** { + 714:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 715:Drivers/CMSIS/Include/core_cm0.h **** { + 716:Drivers/CMSIS/Include/core_cm0.h **** NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); + 717:Drivers/CMSIS/Include/core_cm0.h **** } + 718:Drivers/CMSIS/Include/core_cm0.h **** } + 719:Drivers/CMSIS/Include/core_cm0.h **** + 720:Drivers/CMSIS/Include/core_cm0.h **** + 721:Drivers/CMSIS/Include/core_cm0.h **** /** + 722:Drivers/CMSIS/Include/core_cm0.h **** \brief Set Interrupt Priority + 723:Drivers/CMSIS/Include/core_cm0.h **** \details Sets the priority of a device specific interrupt or a processor exception. + 724:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 725:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 726:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number. + 727:Drivers/CMSIS/Include/core_cm0.h **** \param [in] priority Priority to set. + 728:Drivers/CMSIS/Include/core_cm0.h **** \note The priority cannot be set for every processor exception. + 729:Drivers/CMSIS/Include/core_cm0.h **** */ + 730:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) + 731:Drivers/CMSIS/Include/core_cm0.h **** { + 732:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 42 .loc 2 732 0 + 43 0002 0028 cmp r0, #0 + 44 0004 11DB blt .L2 + ARM GAS /tmp/ccwGqVnP.s page 17 + + + 733:Drivers/CMSIS/Include/core_cm0.h **** { + 734:Drivers/CMSIS/Include/core_cm0.h **** NVIC->IP[_IP_IDX(IRQn)] = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn)) + 45 .loc 2 734 0 + 46 0006 8308 lsrs r3, r0, #2 + 47 0008 144D ldr r5, .L4 + 48 000a C033 adds r3, r3, #192 + 49 000c 9B00 lsls r3, r3, #2 + 50 000e 5C59 ldr r4, [r3, r5] + 51 0010 0322 movs r2, #3 + 52 .LVL2: + 53 0012 1040 ands r0, r2 + 54 .LVL3: + 55 0014 C000 lsls r0, r0, #3 + 56 0016 FC32 adds r2, r2, #252 + 57 0018 1600 movs r6, r2 + 58 001a 8640 lsls r6, r6, r0 + 59 001c B443 bics r4, r6 + 735:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 60 .loc 2 735 0 + 61 001e 8901 lsls r1, r1, #6 + 62 .LVL4: + 63 0020 0A40 ands r2, r1 + 64 0022 8240 lsls r2, r2, r0 + 734:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 65 .loc 2 734 0 + 66 0024 2243 orrs r2, r4 + 67 0026 5A51 str r2, [r3, r5] + 68 .LVL5: + 69 .L1: + 70 .LBE33: + 71 .LBE32: + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_SetPriority(IRQn,PreemptPriority); + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 72 .loc 1 141 0 + 73 @ sp needed + 74 0028 70BD pop {r4, r5, r6, pc} + 75 .LVL6: + 76 .L2: + 77 .LBB35: + 78 .LBB34: + 736:Drivers/CMSIS/Include/core_cm0.h **** } + 737:Drivers/CMSIS/Include/core_cm0.h **** else + 738:Drivers/CMSIS/Include/core_cm0.h **** { + 739:Drivers/CMSIS/Include/core_cm0.h **** SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn)) + 79 .loc 2 739 0 + 80 002a C0B2 uxtb r0, r0 + 81 002c 0F23 movs r3, #15 + 82 002e 0340 ands r3, r0 + 83 0030 083B subs r3, r3, #8 + 84 0032 9B08 lsrs r3, r3, #2 + 85 0034 0633 adds r3, r3, #6 + 86 0036 9B00 lsls r3, r3, #2 + 87 0038 094A ldr r2, .L4+4 + 88 .LVL7: + 89 003a 9446 mov ip, r2 + ARM GAS /tmp/ccwGqVnP.s page 18 + + + 90 003c 6344 add r3, r3, ip + 91 003e 5D68 ldr r5, [r3, #4] + 92 0040 0324 movs r4, #3 + 93 0042 2040 ands r0, r4 + 94 .LVL8: + 95 0044 C000 lsls r0, r0, #3 + 96 0046 FF22 movs r2, #255 + 97 0048 1400 movs r4, r2 + 98 004a 8440 lsls r4, r4, r0 + 99 004c A543 bics r5, r4 + 740:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 100 .loc 2 740 0 + 101 004e 8901 lsls r1, r1, #6 + 102 .LVL9: + 103 0050 1140 ands r1, r2 + 104 0052 8140 lsls r1, r1, r0 + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 105 .loc 2 739 0 + 106 0054 2943 orrs r1, r5 + 107 0056 5960 str r1, [r3, #4] + 108 .LVL10: + 109 .LBE34: + 110 .LBE35: + 111 .loc 1 141 0 + 112 0058 E6E7 b .L1 + 113 .L5: + 114 005a C046 .align 2 + 115 .L4: + 116 005c 00E100E0 .word -536813312 + 117 0060 00ED00E0 .word -536810240 + 118 .cfi_endproc + 119 .LFE40: + 121 .section .text.HAL_NVIC_EnableIRQ,"ax",%progbits + 122 .align 1 + 123 .global HAL_NVIC_EnableIRQ + 124 .syntax unified + 125 .code 16 + 126 .thumb_func + 127 .fpu softvfp + 129 HAL_NVIC_EnableIRQ: + 130 .LFB41: + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Enables a device specific interrupt in the NVIC interrupt controller. + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @note To configure interrupts priority correctly, the NVIC_PriorityGroupConfig() + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * function should be called before. + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 131 .loc 1 153 0 + 132 .cfi_startproc + 133 @ args = 0, pretend = 0, frame = 0 + 134 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccwGqVnP.s page 19 + + + 135 @ link register save eliminated. + 136 .LVL11: + 137 .LBB36: + 138 .LBB37: + 625:Drivers/CMSIS/Include/core_cm0.h **** { + 139 .loc 2 625 0 + 140 0000 0028 cmp r0, #0 + 141 0002 05DB blt .L6 + 627:Drivers/CMSIS/Include/core_cm0.h **** } + 142 .loc 2 627 0 + 143 0004 1F23 movs r3, #31 + 144 0006 1840 ands r0, r3 + 145 .LVL12: + 146 0008 1E3B subs r3, r3, #30 + 147 000a 8340 lsls r3, r3, r0 + 148 000c 014A ldr r2, .L8 + 149 000e 1360 str r3, [r2] + 150 .LVL13: + 151 .L6: + 152 .LBE37: + 153 .LBE36: + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Enable interrupt */ + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_EnableIRQ(IRQn); + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 154 .loc 1 159 0 + 155 @ sp needed + 156 0010 7047 bx lr + 157 .L9: + 158 0012 C046 .align 2 + 159 .L8: + 160 0014 00E100E0 .word -536813312 + 161 .cfi_endproc + 162 .LFE41: + 164 .section .text.HAL_NVIC_DisableIRQ,"ax",%progbits + 165 .align 1 + 166 .global HAL_NVIC_DisableIRQ + 167 .syntax unified + 168 .code 16 + 169 .thumb_func + 170 .fpu softvfp + 172 HAL_NVIC_DisableIRQ: + 173 .LFB42: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Disables a device specific interrupt in the NVIC interrupt controller. + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_DisableIRQ(IRQn_Type IRQn) + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 174 .loc 1 169 0 + 175 .cfi_startproc + ARM GAS /tmp/ccwGqVnP.s page 20 + + + 176 @ args = 0, pretend = 0, frame = 0 + 177 @ frame_needed = 0, uses_anonymous_args = 0 + 178 @ link register save eliminated. + 179 .LVL14: + 180 .LBB38: + 181 .LBB39: + 661:Drivers/CMSIS/Include/core_cm0.h **** { + 182 .loc 2 661 0 + 183 0000 0028 cmp r0, #0 + 184 0002 0ADB blt .L10 + 663:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); + 185 .loc 2 663 0 + 186 0004 1F23 movs r3, #31 + 187 0006 1840 ands r0, r3 + 188 .LVL15: + 189 0008 1E3B subs r3, r3, #30 + 190 000a 8340 lsls r3, r3, r0 + 191 000c 0349 ldr r1, .L12 + 192 000e 8022 movs r2, #128 + 193 0010 8B50 str r3, [r1, r2] + 194 .LBB40: + 195 .LBB41: + 196 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h" + 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** + 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h + 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file + 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4 + 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018 + 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/ + 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /* + 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved. + 9:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0 + 11:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may + 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License. + 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at + 15:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0 + 17:Drivers/CMSIS/Include/cmsis_gcc.h **** * + 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software + 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT + 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and + 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License. + 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 24:Drivers/CMSIS/Include/cmsis_gcc.h **** + 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H + 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H + 27:Drivers/CMSIS/Include/cmsis_gcc.h **** + 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */ + 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion" + 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion" + 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter" + 33:Drivers/CMSIS/Include/cmsis_gcc.h **** + 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */ + ARM GAS /tmp/ccwGqVnP.s page 21 + + + 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin + 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0) + 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 38:Drivers/CMSIS/Include/cmsis_gcc.h **** + 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */ + 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM + 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm + 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE + 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline + 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE + 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline + 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE + 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline + 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN + 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) + 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) + 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK + 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) + 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED + 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1))) + 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT + 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1))) + 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION + 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1))) + 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */ + 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; }; + 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v) + 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE + 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; }; + 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))- + 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ + 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; }; + 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + ARM GAS /tmp/ccwGqVnP.s page 22 + + + 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add + 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE + 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; }; + 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))- + 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ + 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push + 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked" + 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes" + 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; }; + 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop + 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add + 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED + 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) + 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT + 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict + 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 116:Drivers/CMSIS/Include/cmsis_gcc.h **** + 117:Drivers/CMSIS/Include/cmsis_gcc.h **** + 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */ + 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface + 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions + 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 123:Drivers/CMSIS/Include/cmsis_gcc.h **** + 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts + 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR. + 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void) + 130:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory"); + 132:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 133:Drivers/CMSIS/Include/cmsis_gcc.h **** + 134:Drivers/CMSIS/Include/cmsis_gcc.h **** + 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts + 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR. + 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void) + 141:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory"); + 143:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 144:Drivers/CMSIS/Include/cmsis_gcc.h **** + 145:Drivers/CMSIS/Include/cmsis_gcc.h **** + 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register + 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register. + ARM GAS /tmp/ccwGqVnP.s page 23 + + + 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value + 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void) + 152:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 154:Drivers/CMSIS/Include/cmsis_gcc.h **** + 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) ); + 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 157:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 158:Drivers/CMSIS/Include/cmsis_gcc.h **** + 159:Drivers/CMSIS/Include/cmsis_gcc.h **** + 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure) + 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode. + 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value + 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void) + 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); + 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 174:Drivers/CMSIS/Include/cmsis_gcc.h **** + 175:Drivers/CMSIS/Include/cmsis_gcc.h **** + 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register + 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register. + 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control) + 182:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory"); + 184:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 185:Drivers/CMSIS/Include/cmsis_gcc.h **** + 186:Drivers/CMSIS/Include/cmsis_gcc.h **** + 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure) + 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state. + 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set + 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control) + 194:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory"); + 196:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 198:Drivers/CMSIS/Include/cmsis_gcc.h **** + 199:Drivers/CMSIS/Include/cmsis_gcc.h **** + 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register + 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register. + 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value + 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void) + ARM GAS /tmp/ccwGqVnP.s page 24 + + + 206:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 208:Drivers/CMSIS/Include/cmsis_gcc.h **** + 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) ); + 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 211:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 212:Drivers/CMSIS/Include/cmsis_gcc.h **** + 213:Drivers/CMSIS/Include/cmsis_gcc.h **** + 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register + 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register. + 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value + 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void) + 220:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 222:Drivers/CMSIS/Include/cmsis_gcc.h **** + 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) ); + 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** + 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register + 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. + 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value + 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void) + 234:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 236:Drivers/CMSIS/Include/cmsis_gcc.h **** + 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) ); + 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 239:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 240:Drivers/CMSIS/Include/cmsis_gcc.h **** + 241:Drivers/CMSIS/Include/cmsis_gcc.h **** + 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer + 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP). + 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void) + 248:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 250:Drivers/CMSIS/Include/cmsis_gcc.h **** + 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) ); + 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 253:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 254:Drivers/CMSIS/Include/cmsis_gcc.h **** + 255:Drivers/CMSIS/Include/cmsis_gcc.h **** + 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure) + 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s + 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value + 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void) + ARM GAS /tmp/ccwGqVnP.s page 25 + + + 263:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 265:Drivers/CMSIS/Include/cmsis_gcc.h **** + 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) ); + 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 268:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 270:Drivers/CMSIS/Include/cmsis_gcc.h **** + 271:Drivers/CMSIS/Include/cmsis_gcc.h **** + 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer + 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP). + 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack) + 278:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : ); + 280:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 281:Drivers/CMSIS/Include/cmsis_gcc.h **** + 282:Drivers/CMSIS/Include/cmsis_gcc.h **** + 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta + 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set + 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack) + 290:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : ); + 292:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 294:Drivers/CMSIS/Include/cmsis_gcc.h **** + 295:Drivers/CMSIS/Include/cmsis_gcc.h **** + 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer + 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP). + 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void) + 302:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 304:Drivers/CMSIS/Include/cmsis_gcc.h **** + 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) ); + 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 307:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 308:Drivers/CMSIS/Include/cmsis_gcc.h **** + 309:Drivers/CMSIS/Include/cmsis_gcc.h **** + 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure) + 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat + 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value + 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void) + 317:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 319:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccwGqVnP.s page 26 + + + 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) ); + 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 322:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 324:Drivers/CMSIS/Include/cmsis_gcc.h **** + 325:Drivers/CMSIS/Include/cmsis_gcc.h **** + 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer + 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP). + 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack) + 332:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : ); + 334:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 335:Drivers/CMSIS/Include/cmsis_gcc.h **** + 336:Drivers/CMSIS/Include/cmsis_gcc.h **** + 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) + 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set + 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) + 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); + 346:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 348:Drivers/CMSIS/Include/cmsis_gcc.h **** + 349:Drivers/CMSIS/Include/cmsis_gcc.h **** + 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure) + 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state. + 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value + 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void) + 357:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 359:Drivers/CMSIS/Include/cmsis_gcc.h **** + 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) ); + 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 362:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 363:Drivers/CMSIS/Include/cmsis_gcc.h **** + 364:Drivers/CMSIS/Include/cmsis_gcc.h **** + 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure) + 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state. + 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set + 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack) + 371:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : ); + 373:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 375:Drivers/CMSIS/Include/cmsis_gcc.h **** + 376:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccwGqVnP.s page 27 + + + 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask + 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register. + 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void) + 383:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 385:Drivers/CMSIS/Include/cmsis_gcc.h **** + 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory"); + 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 388:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 389:Drivers/CMSIS/Include/cmsis_gcc.h **** + 390:Drivers/CMSIS/Include/cmsis_gcc.h **** + 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure) + 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg + 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value + 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 400:Drivers/CMSIS/Include/cmsis_gcc.h **** + 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); + 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 403:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 405:Drivers/CMSIS/Include/cmsis_gcc.h **** + 406:Drivers/CMSIS/Include/cmsis_gcc.h **** + 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask + 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register. + 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask) + 413:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory"); + 415:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 416:Drivers/CMSIS/Include/cmsis_gcc.h **** + 417:Drivers/CMSIS/Include/cmsis_gcc.h **** + 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure) + 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state. + 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask + 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask) + 425:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory"); + 427:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 429:Drivers/CMSIS/Include/cmsis_gcc.h **** + 430:Drivers/CMSIS/Include/cmsis_gcc.h **** + 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) + ARM GAS /tmp/ccwGqVnP.s page 28 + + + 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ + 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR. + 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void) + 440:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory"); + 442:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 443:Drivers/CMSIS/Include/cmsis_gcc.h **** + 444:Drivers/CMSIS/Include/cmsis_gcc.h **** + 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ + 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR. + 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes. + 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void) + 451:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); + 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** + 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority + 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. + 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void) + 462:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 464:Drivers/CMSIS/Include/cmsis_gcc.h **** + 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) ); + 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 467:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 468:Drivers/CMSIS/Include/cmsis_gcc.h **** + 469:Drivers/CMSIS/Include/cmsis_gcc.h **** + 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure) + 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state. + 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value + 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void) + 477:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 479:Drivers/CMSIS/Include/cmsis_gcc.h **** + 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) ); + 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 482:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 484:Drivers/CMSIS/Include/cmsis_gcc.h **** + 485:Drivers/CMSIS/Include/cmsis_gcc.h **** + 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority + 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register. + 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccwGqVnP.s page 29 + + + 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri) + 492:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory"); + 494:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 495:Drivers/CMSIS/Include/cmsis_gcc.h **** + 496:Drivers/CMSIS/Include/cmsis_gcc.h **** + 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure) + 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state. + 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri) + 504:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory"); + 506:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 508:Drivers/CMSIS/Include/cmsis_gcc.h **** + 509:Drivers/CMSIS/Include/cmsis_gcc.h **** + 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable + 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. + 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set + 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) + 517:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory"); + 519:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 520:Drivers/CMSIS/Include/cmsis_gcc.h **** + 521:Drivers/CMSIS/Include/cmsis_gcc.h **** + 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask + 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register. + 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void) + 528:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 530:Drivers/CMSIS/Include/cmsis_gcc.h **** + 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) ); + 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 533:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 534:Drivers/CMSIS/Include/cmsis_gcc.h **** + 535:Drivers/CMSIS/Include/cmsis_gcc.h **** + 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure) + 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state. + 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value + 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void) + 543:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 545:Drivers/CMSIS/Include/cmsis_gcc.h **** + 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) ); + 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + ARM GAS /tmp/ccwGqVnP.s page 30 + + + 548:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 550:Drivers/CMSIS/Include/cmsis_gcc.h **** + 551:Drivers/CMSIS/Include/cmsis_gcc.h **** + 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask + 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register. + 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask) + 558:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory"); + 560:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 561:Drivers/CMSIS/Include/cmsis_gcc.h **** + 562:Drivers/CMSIS/Include/cmsis_gcc.h **** + 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure) + 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. + 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set + 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) + 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); + 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 574:Drivers/CMSIS/Include/cmsis_gcc.h **** + 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \ + 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \ + 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */ + 578:Drivers/CMSIS/Include/cmsis_gcc.h **** + 579:Drivers/CMSIS/Include/cmsis_gcc.h **** + 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) + 582:Drivers/CMSIS/Include/cmsis_gcc.h **** + 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit + 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 588:Drivers/CMSIS/Include/cmsis_gcc.h **** + 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM). + 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void) + 593:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) ); + 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 603:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 604:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccwGqVnP.s page 31 + + + 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)) + 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure) + 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 610:Drivers/CMSIS/Include/cmsis_gcc.h **** + 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in + 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value + 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void) + 615:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) ); + 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** + 627:Drivers/CMSIS/Include/cmsis_gcc.h **** + 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit + 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 633:Drivers/CMSIS/Include/cmsis_gcc.h **** + 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM). + 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit) + 638:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit)); + 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 646:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 647:Drivers/CMSIS/Include/cmsis_gcc.h **** + 648:Drivers/CMSIS/Include/cmsis_gcc.h **** + 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) + 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 654:Drivers/CMSIS/Include/cmsis_gcc.h **** + 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s + 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set + 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit) + 659:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI + ARM GAS /tmp/ccwGqVnP.s page 32 + + + 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit; + 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit)); + 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 666:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 668:Drivers/CMSIS/Include/cmsis_gcc.h **** + 669:Drivers/CMSIS/Include/cmsis_gcc.h **** + 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit + 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure + 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 675:Drivers/CMSIS/Include/cmsis_gcc.h **** + 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM). + 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void) + 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); + 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 690:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 691:Drivers/CMSIS/Include/cmsis_gcc.h **** + 692:Drivers/CMSIS/Include/cmsis_gcc.h **** + 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure) + 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always. + 698:Drivers/CMSIS/Include/cmsis_gcc.h **** + 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec + 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value + 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void) + 703:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; + 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) ); + 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; + 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 712:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 714:Drivers/CMSIS/Include/cmsis_gcc.h **** + 715:Drivers/CMSIS/Include/cmsis_gcc.h **** + 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit + 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + ARM GAS /tmp/ccwGqVnP.s page 33 + + + 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure + 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode. + 721:Drivers/CMSIS/Include/cmsis_gcc.h **** + 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM). + 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set + 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit) + 726:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ + 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit)); + 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 734:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 735:Drivers/CMSIS/Include/cmsis_gcc.h **** + 736:Drivers/CMSIS/Include/cmsis_gcc.h **** + 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure + 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. + 742:Drivers/CMSIS/Include/cmsis_gcc.h **** + 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu + 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set + 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit) + 747:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))) + 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI + 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit; + 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit)); + 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 754:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 756:Drivers/CMSIS/Include/cmsis_gcc.h **** + 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \ + 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */ + 759:Drivers/CMSIS/Include/cmsis_gcc.h **** + 760:Drivers/CMSIS/Include/cmsis_gcc.h **** + 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR + 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register. + 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value + 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void) + 767:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr) + 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr(); + 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + ARM GAS /tmp/ccwGqVnP.s page 34 + + + 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; + 777:Drivers/CMSIS/Include/cmsis_gcc.h **** + 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) ); + 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); + 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U); + 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 784:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 785:Drivers/CMSIS/Include/cmsis_gcc.h **** + 786:Drivers/CMSIS/Include/cmsis_gcc.h **** + 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR + 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register. + 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set + 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr) + 793:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ + 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) + 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed + 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) + 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ + 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); + 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory"); + 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr; + 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 807:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 808:Drivers/CMSIS/Include/cmsis_gcc.h **** + 809:Drivers/CMSIS/Include/cmsis_gcc.h **** + 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */ + 811:Drivers/CMSIS/Include/cmsis_gcc.h **** + 812:Drivers/CMSIS/Include/cmsis_gcc.h **** + 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */ + 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface + 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions + 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{ + 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 818:Drivers/CMSIS/Include/cmsis_gcc.h **** + 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2. + 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l" + 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */ + 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__) + 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r) + 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r) + 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r) + 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else + 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r) + 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r) + 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r) + 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + 831:Drivers/CMSIS/Include/cmsis_gcc.h **** + 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccwGqVnP.s page 35 + + + 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation + 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes. + 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop") + 837:Drivers/CMSIS/Include/cmsis_gcc.h **** + 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt + 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o + 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi") + 843:Drivers/CMSIS/Include/cmsis_gcc.h **** + 844:Drivers/CMSIS/Include/cmsis_gcc.h **** + 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event + 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter + 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs. + 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe") + 851:Drivers/CMSIS/Include/cmsis_gcc.h **** + 852:Drivers/CMSIS/Include/cmsis_gcc.h **** + 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event + 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. + 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") + 858:Drivers/CMSIS/Include/cmsis_gcc.h **** + 859:Drivers/CMSIS/Include/cmsis_gcc.h **** + 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier + 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor, + 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory, + 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed. + 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void) + 867:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory"); + 869:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 870:Drivers/CMSIS/Include/cmsis_gcc.h **** + 871:Drivers/CMSIS/Include/cmsis_gcc.h **** + 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier + 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier. + 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete. + 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void) + 878:Drivers/CMSIS/Include/cmsis_gcc.h **** { + 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory"); + 197 .loc 3 879 0 + 198 .syntax divided + 199 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 200 0012 BFF34F8F dsb 0xF + 201 @ 0 "" 2 + 202 .thumb + 203 .syntax unified + 204 .LBE41: + 205 .LBE40: + 206 .LBB42: + ARM GAS /tmp/ccwGqVnP.s page 36 + + + 207 .LBB43: + 868:Drivers/CMSIS/Include/cmsis_gcc.h **** } + 208 .loc 3 868 0 + 209 .syntax divided + 210 @ 868 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 211 0016 BFF36F8F isb 0xF + 212 @ 0 "" 2 + 213 .LVL16: + 214 .thumb + 215 .syntax unified + 216 .L10: + 217 .LBE43: + 218 .LBE42: + 219 .LBE39: + 220 .LBE38: + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Disable interrupt */ + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_DisableIRQ(IRQn); + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 221 .loc 1 175 0 + 222 @ sp needed + 223 001a 7047 bx lr + 224 .L13: + 225 .align 2 + 226 .L12: + 227 001c 00E100E0 .word -536813312 + 228 .cfi_endproc + 229 .LFE42: + 231 .section .text.HAL_NVIC_SystemReset,"ax",%progbits + 232 .align 1 + 233 .global HAL_NVIC_SystemReset + 234 .syntax unified + 235 .code 16 + 236 .thumb_func + 237 .fpu softvfp + 239 HAL_NVIC_SystemReset: + 240 .LFB43: + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Initiates a system reset request to reset the MCU. + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_SystemReset(void) + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 241 .loc 1 182 0 + 242 .cfi_startproc + 243 @ Volatile: function does not return. + 244 @ args = 0, pretend = 0, frame = 0 + 245 @ frame_needed = 0, uses_anonymous_args = 0 + 246 @ link register save eliminated. + 247 .LBB50: + 248 .LBB51: + 249 .LBB52: + 250 .LBB53: + 251 .loc 3 879 0 + ARM GAS /tmp/ccwGqVnP.s page 37 + + + 252 .syntax divided + 253 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 254 0000 BFF34F8F dsb 0xF + 255 @ 0 "" 2 + 256 .thumb + 257 .syntax unified + 258 .LBE53: + 259 .LBE52: + 741:Drivers/CMSIS/Include/core_cm0.h **** } + 742:Drivers/CMSIS/Include/core_cm0.h **** } + 743:Drivers/CMSIS/Include/core_cm0.h **** + 744:Drivers/CMSIS/Include/core_cm0.h **** + 745:Drivers/CMSIS/Include/core_cm0.h **** /** + 746:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Interrupt Priority + 747:Drivers/CMSIS/Include/core_cm0.h **** \details Reads the priority of a device specific interrupt or a processor exception. + 748:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 749:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 750:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number. + 751:Drivers/CMSIS/Include/core_cm0.h **** \return Interrupt Priority. + 752:Drivers/CMSIS/Include/core_cm0.h **** Value is aligned automatically to the implemented priority bits of the microc + 753:Drivers/CMSIS/Include/core_cm0.h **** */ + 754:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn) + 755:Drivers/CMSIS/Include/core_cm0.h **** { + 756:Drivers/CMSIS/Include/core_cm0.h **** + 757:Drivers/CMSIS/Include/core_cm0.h **** if ((int32_t)(IRQn) >= 0) + 758:Drivers/CMSIS/Include/core_cm0.h **** { + 759:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - + 760:Drivers/CMSIS/Include/core_cm0.h **** } + 761:Drivers/CMSIS/Include/core_cm0.h **** else + 762:Drivers/CMSIS/Include/core_cm0.h **** { + 763:Drivers/CMSIS/Include/core_cm0.h **** return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - + 764:Drivers/CMSIS/Include/core_cm0.h **** } + 765:Drivers/CMSIS/Include/core_cm0.h **** } + 766:Drivers/CMSIS/Include/core_cm0.h **** + 767:Drivers/CMSIS/Include/core_cm0.h **** + 768:Drivers/CMSIS/Include/core_cm0.h **** /** + 769:Drivers/CMSIS/Include/core_cm0.h **** \brief Encode Priority + 770:Drivers/CMSIS/Include/core_cm0.h **** \details Encodes the priority for an interrupt with the given priority group, + 771:Drivers/CMSIS/Include/core_cm0.h **** preemptive priority value, and subpriority value. + 772:Drivers/CMSIS/Include/core_cm0.h **** In case of a conflict between priority grouping and available + 773:Drivers/CMSIS/Include/core_cm0.h **** priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. + 774:Drivers/CMSIS/Include/core_cm0.h **** \param [in] PriorityGroup Used priority group. + 775:Drivers/CMSIS/Include/core_cm0.h **** \param [in] PreemptPriority Preemptive priority value (starting from 0). + 776:Drivers/CMSIS/Include/core_cm0.h **** \param [in] SubPriority Subpriority value (starting from 0). + 777:Drivers/CMSIS/Include/core_cm0.h **** \return Encoded priority. Value can be used in the function \ref NVIC_SetP + 778:Drivers/CMSIS/Include/core_cm0.h **** */ + 779:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uin + 780:Drivers/CMSIS/Include/core_cm0.h **** { + 781:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 782:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PreemptPriorityBits; + 783:Drivers/CMSIS/Include/core_cm0.h **** uint32_t SubPriorityBits; + 784:Drivers/CMSIS/Include/core_cm0.h **** + 785:Drivers/CMSIS/Include/core_cm0.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + 786:Drivers/CMSIS/Include/core_cm0.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 787:Drivers/CMSIS/Include/core_cm0.h **** + 788:Drivers/CMSIS/Include/core_cm0.h **** return ( + 789:Drivers/CMSIS/Include/core_cm0.h **** ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits + ARM GAS /tmp/ccwGqVnP.s page 38 + + + 790:Drivers/CMSIS/Include/core_cm0.h **** ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) + 791:Drivers/CMSIS/Include/core_cm0.h **** ); + 792:Drivers/CMSIS/Include/core_cm0.h **** } + 793:Drivers/CMSIS/Include/core_cm0.h **** + 794:Drivers/CMSIS/Include/core_cm0.h **** + 795:Drivers/CMSIS/Include/core_cm0.h **** /** + 796:Drivers/CMSIS/Include/core_cm0.h **** \brief Decode Priority + 797:Drivers/CMSIS/Include/core_cm0.h **** \details Decodes an interrupt priority value with a given priority group to + 798:Drivers/CMSIS/Include/core_cm0.h **** preemptive priority value and subpriority value. + 799:Drivers/CMSIS/Include/core_cm0.h **** In case of a conflict between priority grouping and available + 800:Drivers/CMSIS/Include/core_cm0.h **** priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set. + 801:Drivers/CMSIS/Include/core_cm0.h **** \param [in] Priority Priority value, which can be retrieved with the function \ref NVIC + 802:Drivers/CMSIS/Include/core_cm0.h **** \param [in] PriorityGroup Used priority group. + 803:Drivers/CMSIS/Include/core_cm0.h **** \param [out] pPreemptPriority Preemptive priority value (starting from 0). + 804:Drivers/CMSIS/Include/core_cm0.h **** \param [out] pSubPriority Subpriority value (starting from 0). + 805:Drivers/CMSIS/Include/core_cm0.h **** */ + 806:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* cons + 807:Drivers/CMSIS/Include/core_cm0.h **** { + 808:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used + 809:Drivers/CMSIS/Include/core_cm0.h **** uint32_t PreemptPriorityBits; + 810:Drivers/CMSIS/Include/core_cm0.h **** uint32_t SubPriorityBits; + 811:Drivers/CMSIS/Include/core_cm0.h **** + 812:Drivers/CMSIS/Include/core_cm0.h **** PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NV + 813:Drivers/CMSIS/Include/core_cm0.h **** SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint + 814:Drivers/CMSIS/Include/core_cm0.h **** + 815:Drivers/CMSIS/Include/core_cm0.h **** *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1 + 816:Drivers/CMSIS/Include/core_cm0.h **** *pSubPriority = (Priority ) & (uint32_t)((1UL << (SubPriorityBits )) - 1 + 817:Drivers/CMSIS/Include/core_cm0.h **** } + 818:Drivers/CMSIS/Include/core_cm0.h **** + 819:Drivers/CMSIS/Include/core_cm0.h **** + 820:Drivers/CMSIS/Include/core_cm0.h **** + 821:Drivers/CMSIS/Include/core_cm0.h **** /** + 822:Drivers/CMSIS/Include/core_cm0.h **** \brief Set Interrupt Vector + 823:Drivers/CMSIS/Include/core_cm0.h **** \details Sets an interrupt vector in SRAM based interrupt vector table. + 824:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 825:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 826:Drivers/CMSIS/Include/core_cm0.h **** Address 0 must be mapped to SRAM. + 827:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number + 828:Drivers/CMSIS/Include/core_cm0.h **** \param [in] vector Address of interrupt handler function + 829:Drivers/CMSIS/Include/core_cm0.h **** */ + 830:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) + 831:Drivers/CMSIS/Include/core_cm0.h **** { + 832:Drivers/CMSIS/Include/core_cm0.h **** uint32_t *vectors = (uint32_t *)0x0U; + 833:Drivers/CMSIS/Include/core_cm0.h **** vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector; + 834:Drivers/CMSIS/Include/core_cm0.h **** } + 835:Drivers/CMSIS/Include/core_cm0.h **** + 836:Drivers/CMSIS/Include/core_cm0.h **** + 837:Drivers/CMSIS/Include/core_cm0.h **** /** + 838:Drivers/CMSIS/Include/core_cm0.h **** \brief Get Interrupt Vector + 839:Drivers/CMSIS/Include/core_cm0.h **** \details Reads an interrupt vector from interrupt vector table. + 840:Drivers/CMSIS/Include/core_cm0.h **** The interrupt number can be positive to specify a device specific interrupt, + 841:Drivers/CMSIS/Include/core_cm0.h **** or negative to specify a processor exception. + 842:Drivers/CMSIS/Include/core_cm0.h **** \param [in] IRQn Interrupt number. + 843:Drivers/CMSIS/Include/core_cm0.h **** \return Address of interrupt handler function + 844:Drivers/CMSIS/Include/core_cm0.h **** */ + 845:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn) + 846:Drivers/CMSIS/Include/core_cm0.h **** { + ARM GAS /tmp/ccwGqVnP.s page 39 + + + 847:Drivers/CMSIS/Include/core_cm0.h **** uint32_t *vectors = (uint32_t *)0x0U; + 848:Drivers/CMSIS/Include/core_cm0.h **** return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET]; + 849:Drivers/CMSIS/Include/core_cm0.h **** } + 850:Drivers/CMSIS/Include/core_cm0.h **** + 851:Drivers/CMSIS/Include/core_cm0.h **** + 852:Drivers/CMSIS/Include/core_cm0.h **** /** + 853:Drivers/CMSIS/Include/core_cm0.h **** \brief System Reset + 854:Drivers/CMSIS/Include/core_cm0.h **** \details Initiates a system reset request to reset the MCU. + 855:Drivers/CMSIS/Include/core_cm0.h **** */ + 856:Drivers/CMSIS/Include/core_cm0.h **** __NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void) + 857:Drivers/CMSIS/Include/core_cm0.h **** { + 858:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); /* Ensure all outstanding memor + 859:Drivers/CMSIS/Include/core_cm0.h **** buffered write are completed + 860:Drivers/CMSIS/Include/core_cm0.h **** SCB->AIRCR = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | + 260 .loc 2 860 0 + 261 0004 034B ldr r3, .L16 + 262 0006 044A ldr r2, .L16+4 + 263 0008 DA60 str r2, [r3, #12] + 264 .LBB54: + 265 .LBB55: + 266 .loc 3 879 0 + 267 .syntax divided + 268 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 269 000a BFF34F8F dsb 0xF + 270 @ 0 "" 2 + 271 .thumb + 272 .syntax unified + 273 .L15: + 274 .LBE55: + 275 .LBE54: + 861:Drivers/CMSIS/Include/core_cm0.h **** SCB_AIRCR_SYSRESETREQ_Msk); + 862:Drivers/CMSIS/Include/core_cm0.h **** __DSB(); /* Ensure completion of memory + 863:Drivers/CMSIS/Include/core_cm0.h **** + 864:Drivers/CMSIS/Include/core_cm0.h **** for(;;) /* wait until reset */ + 865:Drivers/CMSIS/Include/core_cm0.h **** { + 866:Drivers/CMSIS/Include/core_cm0.h **** __NOP(); + 276 .loc 2 866 0 + 277 .syntax divided + 278 @ 866 "Drivers/CMSIS/Include/core_cm0.h" 1 + 279 000e C046 nop + 280 @ 0 "" 2 + 281 .thumb + 282 .syntax unified + 283 0010 FDE7 b .L15 + 284 .L17: + 285 0012 C046 .align 2 + 286 .L16: + 287 0014 00ED00E0 .word -536810240 + 288 0018 0400FA05 .word 100270084 + 289 .LBE51: + 290 .LBE50: + 291 .cfi_endproc + 292 .LFE43: + 294 .section .text.HAL_SYSTICK_Config,"ax",%progbits + 295 .align 1 + 296 .global HAL_SYSTICK_Config + 297 .syntax unified + ARM GAS /tmp/ccwGqVnP.s page 40 + + + 298 .code 16 + 299 .thumb_func + 300 .fpu softvfp + 302 HAL_SYSTICK_Config: + 303 .LFB44: + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* System Reset */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_SystemReset(); + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Initializes the System Timer and its interrupt, and starts the System Tick Timer. + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * Counter is in free running mode to generate periodic interrupts. + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param TicksNumb Specifies the ticks Number of ticks between two interrupts. + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval status: - 0 Function succeeded. + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * - 1 Function failed. + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb) + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 304 .loc 1 195 0 + 305 .cfi_startproc + 306 @ args = 0, pretend = 0, frame = 0 + 307 @ frame_needed = 0, uses_anonymous_args = 0 + 308 @ link register save eliminated. + 309 .LVL17: + 310 .LBB56: + 311 .LBB57: + 867:Drivers/CMSIS/Include/core_cm0.h **** } + 868:Drivers/CMSIS/Include/core_cm0.h **** } + 869:Drivers/CMSIS/Include/core_cm0.h **** + 870:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of CMSIS_Core_NVICFunctions */ + 871:Drivers/CMSIS/Include/core_cm0.h **** + 872:Drivers/CMSIS/Include/core_cm0.h **** + 873:Drivers/CMSIS/Include/core_cm0.h **** /* ########################## FPU functions #################################### */ + 874:Drivers/CMSIS/Include/core_cm0.h **** /** + 875:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_Core_FunctionInterface + 876:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_FpuFunctions FPU Functions + 877:Drivers/CMSIS/Include/core_cm0.h **** \brief Function that provides FPU type. + 878:Drivers/CMSIS/Include/core_cm0.h **** @{ + 879:Drivers/CMSIS/Include/core_cm0.h **** */ + 880:Drivers/CMSIS/Include/core_cm0.h **** + 881:Drivers/CMSIS/Include/core_cm0.h **** /** + 882:Drivers/CMSIS/Include/core_cm0.h **** \brief get FPU type + 883:Drivers/CMSIS/Include/core_cm0.h **** \details returns the FPU type + 884:Drivers/CMSIS/Include/core_cm0.h **** \returns + 885:Drivers/CMSIS/Include/core_cm0.h **** - \b 0: No FPU + 886:Drivers/CMSIS/Include/core_cm0.h **** - \b 1: Single precision FPU + 887:Drivers/CMSIS/Include/core_cm0.h **** - \b 2: Double + Single precision FPU + 888:Drivers/CMSIS/Include/core_cm0.h **** */ + 889:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t SCB_GetFPUType(void) + 890:Drivers/CMSIS/Include/core_cm0.h **** { + 891:Drivers/CMSIS/Include/core_cm0.h **** return 0U; /* No FPU */ + 892:Drivers/CMSIS/Include/core_cm0.h **** } + 893:Drivers/CMSIS/Include/core_cm0.h **** + 894:Drivers/CMSIS/Include/core_cm0.h **** + 895:Drivers/CMSIS/Include/core_cm0.h **** /*@} end of CMSIS_Core_FpuFunctions */ + 896:Drivers/CMSIS/Include/core_cm0.h **** + 897:Drivers/CMSIS/Include/core_cm0.h **** + ARM GAS /tmp/ccwGqVnP.s page 41 + + + 898:Drivers/CMSIS/Include/core_cm0.h **** + 899:Drivers/CMSIS/Include/core_cm0.h **** /* ################################## SysTick function ######################################## + 900:Drivers/CMSIS/Include/core_cm0.h **** /** + 901:Drivers/CMSIS/Include/core_cm0.h **** \ingroup CMSIS_Core_FunctionInterface + 902:Drivers/CMSIS/Include/core_cm0.h **** \defgroup CMSIS_Core_SysTickFunctions SysTick Functions + 903:Drivers/CMSIS/Include/core_cm0.h **** \brief Functions that configure the System. + 904:Drivers/CMSIS/Include/core_cm0.h **** @{ + 905:Drivers/CMSIS/Include/core_cm0.h **** */ + 906:Drivers/CMSIS/Include/core_cm0.h **** + 907:Drivers/CMSIS/Include/core_cm0.h **** #if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U) + 908:Drivers/CMSIS/Include/core_cm0.h **** + 909:Drivers/CMSIS/Include/core_cm0.h **** /** + 910:Drivers/CMSIS/Include/core_cm0.h **** \brief System Tick Configuration + 911:Drivers/CMSIS/Include/core_cm0.h **** \details Initializes the System Timer and its interrupt, and starts the System Tick Timer. + 912:Drivers/CMSIS/Include/core_cm0.h **** Counter is in free running mode to generate periodic interrupts. + 913:Drivers/CMSIS/Include/core_cm0.h **** \param [in] ticks Number of ticks between two interrupts. + 914:Drivers/CMSIS/Include/core_cm0.h **** \return 0 Function succeeded. + 915:Drivers/CMSIS/Include/core_cm0.h **** \return 1 Function failed. + 916:Drivers/CMSIS/Include/core_cm0.h **** \note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the + 917:Drivers/CMSIS/Include/core_cm0.h **** function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>. + 918:Drivers/CMSIS/Include/core_cm0.h **** must contain a vendor-specific implementation of this function. + 919:Drivers/CMSIS/Include/core_cm0.h **** */ + 920:Drivers/CMSIS/Include/core_cm0.h **** __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks) + 921:Drivers/CMSIS/Include/core_cm0.h **** { + 922:Drivers/CMSIS/Include/core_cm0.h **** if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) + 312 .loc 2 922 0 + 313 0000 0138 subs r0, r0, #1 + 314 .LVL18: + 315 0002 0A4B ldr r3, .L21 + 316 0004 9842 cmp r0, r3 + 317 0006 0FD8 bhi .L20 + 923:Drivers/CMSIS/Include/core_cm0.h **** { + 924:Drivers/CMSIS/Include/core_cm0.h **** return (1UL); /* Reload value impossible */ + 925:Drivers/CMSIS/Include/core_cm0.h **** } + 926:Drivers/CMSIS/Include/core_cm0.h **** + 927:Drivers/CMSIS/Include/core_cm0.h **** SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */ + 318 .loc 2 927 0 + 319 0008 094A ldr r2, .L21+4 + 320 000a 5060 str r0, [r2, #4] + 321 .LVL19: + 322 .LBB58: + 323 .LBB59: + 739:Drivers/CMSIS/Include/core_cm0.h **** (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn))); + 324 .loc 2 739 0 + 325 000c 0948 ldr r0, .L21+8 + 326 .LVL20: + 327 000e 036A ldr r3, [r0, #32] + 328 0010 1B02 lsls r3, r3, #8 + 329 0012 1B0A lsrs r3, r3, #8 + 330 0014 C021 movs r1, #192 + 331 0016 0906 lsls r1, r1, #24 + 332 0018 0B43 orrs r3, r1 + 333 001a 0362 str r3, [r0, #32] + 334 .LVL21: + 335 .LBE59: + 336 .LBE58: + 928:Drivers/CMSIS/Include/core_cm0.h **** NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Int + ARM GAS /tmp/ccwGqVnP.s page 42 + + + 929:Drivers/CMSIS/Include/core_cm0.h **** SysTick->VAL = 0UL; /* Load the SysTick Counter Val + 337 .loc 2 929 0 + 338 001c 0023 movs r3, #0 + 339 001e 9360 str r3, [r2, #8] + 930:Drivers/CMSIS/Include/core_cm0.h **** SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk | + 340 .loc 2 930 0 + 341 0020 0733 adds r3, r3, #7 + 342 0022 1360 str r3, [r2] + 931:Drivers/CMSIS/Include/core_cm0.h **** SysTick_CTRL_TICKINT_Msk | + 932:Drivers/CMSIS/Include/core_cm0.h **** SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTi + 933:Drivers/CMSIS/Include/core_cm0.h **** return (0UL); /* Function successful */ + 343 .loc 2 933 0 + 344 0024 0020 movs r0, #0 + 345 .LVL22: + 346 .L18: + 347 .LBE57: + 348 .LBE56: + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return SysTick_Config(TicksNumb); + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 349 .loc 1 197 0 + 350 @ sp needed + 351 0026 7047 bx lr + 352 .LVL23: + 353 .L20: + 354 .LBB61: + 355 .LBB60: + 924:Drivers/CMSIS/Include/core_cm0.h **** } + 356 .loc 2 924 0 + 357 0028 0120 movs r0, #1 + 358 .LVL24: + 359 .LBE60: + 360 .LBE61: + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return SysTick_Config(TicksNumb); + 361 .loc 1 196 0 + 362 002a FCE7 b .L18 + 363 .L22: + 364 .align 2 + 365 .L21: + 366 002c FFFFFF00 .word 16777215 + 367 0030 10E000E0 .word -536813552 + 368 0034 00ED00E0 .word -536810240 + 369 .cfi_endproc + 370 .LFE44: + 372 .section .text.HAL_NVIC_GetPriority,"ax",%progbits + 373 .align 1 + 374 .global HAL_NVIC_GetPriority + 375 .syntax unified + 376 .code 16 + 377 .thumb_func + 378 .fpu softvfp + 380 HAL_NVIC_GetPriority: + 381 .LFB45: + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @} + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions + ARM GAS /tmp/ccwGqVnP.s page 43 + + + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Cortex control functions + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @verbatim + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ##### Peripheral Control functions ##### + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** ============================================================================== + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** [..] + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** This subsection provides a set of functions allowing to control the CORTEX + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** (NVIC, SYSTICK) functionalities. + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** @endverbatim + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @{ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Gets the priority of an interrupt. + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPriority(IRQn_Type IRQn) + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 382 .loc 1 227 0 + 383 .cfi_startproc + 384 @ args = 0, pretend = 0, frame = 0 + 385 @ frame_needed = 0, uses_anonymous_args = 0 + 386 @ link register save eliminated. + 387 .LVL25: + 388 .LBB64: + 389 .LBB65: + 757:Drivers/CMSIS/Include/core_cm0.h **** { + 390 .loc 2 757 0 + 391 0000 0028 cmp r0, #0 + 392 0002 0CDB blt .L24 + 759:Drivers/CMSIS/Include/core_cm0.h **** } + 393 .loc 2 759 0 + 394 0004 8308 lsrs r3, r0, #2 + 395 0006 C033 adds r3, r3, #192 + 396 0008 9B00 lsls r3, r3, #2 + 397 000a 0E4A ldr r2, .L26 + 398 000c 9B58 ldr r3, [r3, r2] + 399 000e 0322 movs r2, #3 + 400 0010 1040 ands r0, r2 + 401 .LVL26: + 402 0012 C000 lsls r0, r0, #3 + 403 0014 C340 lsrs r3, r3, r0 + 404 0016 9B09 lsrs r3, r3, #6 + 405 0018 0320 movs r0, #3 + 406 001a 1840 ands r0, r3 + 407 .LVL27: + 408 .L23: + 409 .LBE65: + 410 .LBE64: + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Get priority for Cortex-M system or device specific interrupts */ + ARM GAS /tmp/ccwGqVnP.s page 44 + + + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return NVIC_GetPriority(IRQn); + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 411 .loc 1 230 0 + 412 @ sp needed + 413 001c 7047 bx lr + 414 .LVL28: + 415 .L24: + 416 .LBB67: + 417 .LBB66: + 763:Drivers/CMSIS/Include/core_cm0.h **** } + 418 .loc 2 763 0 + 419 001e C0B2 uxtb r0, r0 + 420 0020 0F23 movs r3, #15 + 421 0022 0340 ands r3, r0 + 422 0024 083B subs r3, r3, #8 + 423 0026 9B08 lsrs r3, r3, #2 + 424 0028 0633 adds r3, r3, #6 + 425 002a 9B00 lsls r3, r3, #2 + 426 002c 064A ldr r2, .L26+4 + 427 002e 9446 mov ip, r2 + 428 0030 6344 add r3, r3, ip + 429 0032 5B68 ldr r3, [r3, #4] + 430 0034 0322 movs r2, #3 + 431 0036 1040 ands r0, r2 + 432 .LVL29: + 433 0038 C000 lsls r0, r0, #3 + 434 003a C340 lsrs r3, r3, r0 + 435 003c 9B09 lsrs r3, r3, #6 + 436 003e 0320 movs r0, #3 + 437 0040 1840 ands r0, r3 + 438 .LVL30: + 439 .LBE66: + 440 .LBE67: + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 441 .loc 1 229 0 + 442 0042 EBE7 b .L23 + 443 .L27: + 444 .align 2 + 445 .L26: + 446 0044 00E100E0 .word -536813312 + 447 0048 00ED00E0 .word -536810240 + 448 .cfi_endproc + 449 .LFE45: + 451 .section .text.HAL_NVIC_SetPendingIRQ,"ax",%progbits + 452 .align 1 + 453 .global HAL_NVIC_SetPendingIRQ + 454 .syntax unified + 455 .code 16 + 456 .thumb_func + 457 .fpu softvfp + 459 HAL_NVIC_SetPendingIRQ: + 460 .LFB46: + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Sets Pending bit of an external interrupt. + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + ARM GAS /tmp/ccwGqVnP.s page 45 + + + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn) + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 461 .loc 1 240 0 + 462 .cfi_startproc + 463 @ args = 0, pretend = 0, frame = 0 + 464 @ frame_needed = 0, uses_anonymous_args = 0 + 465 @ link register save eliminated. + 466 .LVL31: + 467 .LBB68: + 468 .LBB69: + 699:Drivers/CMSIS/Include/core_cm0.h **** { + 469 .loc 2 699 0 + 470 0000 0028 cmp r0, #0 + 471 0002 07DB blt .L28 + 701:Drivers/CMSIS/Include/core_cm0.h **** } + 472 .loc 2 701 0 + 473 0004 1F23 movs r3, #31 + 474 0006 1840 ands r0, r3 + 475 .LVL32: + 476 0008 1E3B subs r3, r3, #30 + 477 000a 8340 lsls r3, r3, r0 + 478 000c 0249 ldr r1, .L30 + 479 000e 8022 movs r2, #128 + 480 0010 5200 lsls r2, r2, #1 + 481 0012 8B50 str r3, [r1, r2] + 482 .LVL33: + 483 .L28: + 484 .LBE69: + 485 .LBE68: + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Set interrupt pending */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_SetPendingIRQ(IRQn); + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 486 .loc 1 246 0 + 487 @ sp needed + 488 0014 7047 bx lr + 489 .L31: + 490 0016 C046 .align 2 + 491 .L30: + 492 0018 00E100E0 .word -536813312 + 493 .cfi_endproc + 494 .LFE46: + 496 .section .text.HAL_NVIC_GetPendingIRQ,"ax",%progbits + 497 .align 1 + 498 .global HAL_NVIC_GetPendingIRQ + 499 .syntax unified + 500 .code 16 + 501 .thumb_func + 502 .fpu softvfp + 504 HAL_NVIC_GetPendingIRQ: + 505 .LFB47: + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + ARM GAS /tmp/ccwGqVnP.s page 46 + + + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Gets Pending Interrupt (reads the pending register in the NVIC + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * and returns the pending bit for the specified interrupt). + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval status: - 0 Interrupt status is not pending. + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * - 1 Interrupt status is pending. + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn) + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 506 .loc 1 258 0 + 507 .cfi_startproc + 508 @ args = 0, pretend = 0, frame = 0 + 509 @ frame_needed = 0, uses_anonymous_args = 0 + 510 @ link register save eliminated. + 511 .LVL34: + 512 .LBB70: + 513 .LBB71: + 680:Drivers/CMSIS/Include/core_cm0.h **** { + 514 .loc 2 680 0 + 515 0000 0028 cmp r0, #0 + 516 0002 09DB blt .L34 + 682:Drivers/CMSIS/Include/core_cm0.h **** } + 517 .loc 2 682 0 + 518 0004 054A ldr r2, .L35 + 519 0006 8023 movs r3, #128 + 520 0008 5B00 lsls r3, r3, #1 + 521 000a D358 ldr r3, [r2, r3] + 522 000c 1F22 movs r2, #31 + 523 000e 1040 ands r0, r2 + 524 .LVL35: + 525 0010 C340 lsrs r3, r3, r0 + 526 0012 0120 movs r0, #1 + 527 0014 1840 ands r0, r3 + 528 .LVL36: + 529 .L32: + 530 .LBE71: + 531 .LBE70: + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Return 1 if pending else 0 */ + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** return NVIC_GetPendingIRQ(IRQn); + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 532 .loc 1 264 0 + 533 @ sp needed + 534 0016 7047 bx lr + 535 .LVL37: + 536 .L34: + 537 .LBB73: + 538 .LBB72: + 686:Drivers/CMSIS/Include/core_cm0.h **** } + 539 .loc 2 686 0 + 540 0018 0020 movs r0, #0 + 541 .LVL38: + 542 .LBE72: + ARM GAS /tmp/ccwGqVnP.s page 47 + + + 543 .LBE73: + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 544 .loc 1 263 0 + 545 001a FCE7 b .L32 + 546 .L36: + 547 .align 2 + 548 .L35: + 549 001c 00E100E0 .word -536813312 + 550 .cfi_endproc + 551 .LFE47: + 553 .section .text.HAL_NVIC_ClearPendingIRQ,"ax",%progbits + 554 .align 1 + 555 .global HAL_NVIC_ClearPendingIRQ + 556 .syntax unified + 557 .code 16 + 558 .thumb_func + 559 .fpu softvfp + 561 HAL_NVIC_ClearPendingIRQ: + 562 .LFB48: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Clears the pending bit of an external interrupt. + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param IRQn External interrupt number. + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be an enumerator of IRQn_Type enumeration + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSI + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn) + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 563 .loc 1 274 0 + 564 .cfi_startproc + 565 @ args = 0, pretend = 0, frame = 0 + 566 @ frame_needed = 0, uses_anonymous_args = 0 + 567 @ link register save eliminated. + 568 .LVL39: + 569 .LBB74: + 570 .LBB75: + 714:Drivers/CMSIS/Include/core_cm0.h **** { + 571 .loc 2 714 0 + 572 0000 0028 cmp r0, #0 + 573 0002 07DB blt .L37 + 716:Drivers/CMSIS/Include/core_cm0.h **** } + 574 .loc 2 716 0 + 575 0004 1F23 movs r3, #31 + 576 0006 1840 ands r0, r3 + 577 .LVL40: + 578 0008 1E3B subs r3, r3, #30 + 579 000a 8340 lsls r3, r3, r0 + 580 000c 0249 ldr r1, .L39 + 581 000e C022 movs r2, #192 + 582 0010 5200 lsls r2, r2, #1 + 583 0012 8B50 str r3, [r1, r2] + 584 .LVL41: + 585 .L37: + 586 .LBE75: + 587 .LBE74: + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + ARM GAS /tmp/ccwGqVnP.s page 48 + + + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Clear pending interrupt */ + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** NVIC_ClearPendingIRQ(IRQn); + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 588 .loc 1 280 0 + 589 @ sp needed + 590 0014 7047 bx lr + 591 .L40: + 592 0016 C046 .align 2 + 593 .L39: + 594 0018 00E100E0 .word -536813312 + 595 .cfi_endproc + 596 .LFE48: + 598 .section .text.HAL_SYSTICK_CLKSourceConfig,"ax",%progbits + 599 .align 1 + 600 .global HAL_SYSTICK_CLKSourceConfig + 601 .syntax unified + 602 .code 16 + 603 .thumb_func + 604 .fpu softvfp + 606 HAL_SYSTICK_CLKSourceConfig: + 607 .LFB49: + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief Configures the SysTick clock source. + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @param CLKSource specifies the SysTick clock source. + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * This parameter can be one of the following values: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK_DIV8: AHB clock divided by 8 selected as SysTick clock + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @arg SYSTICK_CLKSOURCE_HCLK: AHB clock selected as SysTick clock source. + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource) + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 608 .loc 1 291 0 + 609 .cfi_startproc + 610 @ args = 0, pretend = 0, frame = 0 + 611 @ frame_needed = 0, uses_anonymous_args = 0 + 612 @ link register save eliminated. + 613 .LVL42: + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* Check the parameters */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** assert_param(IS_SYSTICK_CLK_SOURCE(CLKSource)); + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** if (CLKSource == SYSTICK_CLKSOURCE_HCLK) + 614 .loc 1 294 0 + 615 0000 0428 cmp r0, #4 + 616 0002 05D0 beq .L44 + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** SysTick->CTRL |= SYSTICK_CLKSOURCE_HCLK; + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** else + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** SysTick->CTRL &= ~SYSTICK_CLKSOURCE_HCLK; + 617 .loc 1 300 0 + 618 0004 054A ldr r2, .L45 + 619 0006 1368 ldr r3, [r2] + 620 0008 0421 movs r1, #4 + 621 000a 8B43 bics r3, r1 + ARM GAS /tmp/ccwGqVnP.s page 49 + + + 622 000c 1360 str r3, [r2] + 623 .L41: + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 624 .loc 1 302 0 + 625 @ sp needed + 626 000e 7047 bx lr + 627 .L44: + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 628 .loc 1 296 0 + 629 0010 024A ldr r2, .L45 + 630 0012 1368 ldr r3, [r2] + 631 0014 0421 movs r1, #4 + 632 0016 0B43 orrs r3, r1 + 633 0018 1360 str r3, [r2] + 634 001a F8E7 b .L41 + 635 .L46: + 636 .align 2 + 637 .L45: + 638 001c 10E000E0 .word -536813552 + 639 .cfi_endproc + 640 .LFE49: + 642 .section .text.HAL_SYSTICK_Callback,"ax",%progbits + 643 .align 1 + 644 .weak HAL_SYSTICK_Callback + 645 .syntax unified + 646 .code 16 + 647 .thumb_func + 648 .fpu softvfp + 650 HAL_SYSTICK_Callback: + 651 .LFB51: + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief This function handles SYSTICK interrupt request. + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** void HAL_SYSTICK_IRQHandler(void) + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /** + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @brief SYSTICK callback. + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** * @retval None + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** __weak void HAL_SYSTICK_Callback(void) + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** { + 652 .loc 1 318 0 + 653 .cfi_startproc + 654 @ args = 0, pretend = 0, frame = 0 + 655 @ frame_needed = 0, uses_anonymous_args = 0 + 656 @ link register save eliminated. + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** the HAL_SYSTICK_Callback could be implemented in the user file + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** */ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 657 .loc 1 322 0 + ARM GAS /tmp/ccwGqVnP.s page 50 + + + 658 @ sp needed + 659 0000 7047 bx lr + 660 .cfi_endproc + 661 .LFE51: + 663 .section .text.HAL_SYSTICK_IRQHandler,"ax",%progbits + 664 .align 1 + 665 .global HAL_SYSTICK_IRQHandler + 666 .syntax unified + 667 .code 16 + 668 .thumb_func + 669 .fpu softvfp + 671 HAL_SYSTICK_IRQHandler: + 672 .LFB50: + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** HAL_SYSTICK_Callback(); + 673 .loc 1 309 0 + 674 .cfi_startproc + 675 @ args = 0, pretend = 0, frame = 0 + 676 @ frame_needed = 0, uses_anonymous_args = 0 + 677 0000 10B5 push {r4, lr} + 678 .LCFI1: + 679 .cfi_def_cfa_offset 8 + 680 .cfi_offset 4, -8 + 681 .cfi_offset 14, -4 + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** } + 682 .loc 1 310 0 + 683 0002 FFF7FEFF bl HAL_SYSTICK_Callback + 684 .LVL43: + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_cortex.c **** + 685 .loc 1 311 0 + 686 @ sp needed + 687 0006 10BD pop {r4, pc} + 688 .cfi_endproc + 689 .LFE50: + 691 .text + 692 .Letext0: + 693 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 694 .file 5 "/usr/include/newlib/machine/_default_types.h" + 695 .file 6 "/usr/include/newlib/sys/_stdint.h" + 696 .file 7 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 697 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccwGqVnP.s page 51 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_cortex.c + /tmp/ccwGqVnP.s:16 .text.HAL_NVIC_SetPriority:0000000000000000 $t + /tmp/ccwGqVnP.s:23 .text.HAL_NVIC_SetPriority:0000000000000000 HAL_NVIC_SetPriority + /tmp/ccwGqVnP.s:116 .text.HAL_NVIC_SetPriority:000000000000005c $d + /tmp/ccwGqVnP.s:122 .text.HAL_NVIC_EnableIRQ:0000000000000000 $t + /tmp/ccwGqVnP.s:129 .text.HAL_NVIC_EnableIRQ:0000000000000000 HAL_NVIC_EnableIRQ + /tmp/ccwGqVnP.s:160 .text.HAL_NVIC_EnableIRQ:0000000000000014 $d + /tmp/ccwGqVnP.s:165 .text.HAL_NVIC_DisableIRQ:0000000000000000 $t + /tmp/ccwGqVnP.s:172 .text.HAL_NVIC_DisableIRQ:0000000000000000 HAL_NVIC_DisableIRQ + /tmp/ccwGqVnP.s:227 .text.HAL_NVIC_DisableIRQ:000000000000001c $d + /tmp/ccwGqVnP.s:232 .text.HAL_NVIC_SystemReset:0000000000000000 $t + /tmp/ccwGqVnP.s:239 .text.HAL_NVIC_SystemReset:0000000000000000 HAL_NVIC_SystemReset + /tmp/ccwGqVnP.s:287 .text.HAL_NVIC_SystemReset:0000000000000014 $d + /tmp/ccwGqVnP.s:295 .text.HAL_SYSTICK_Config:0000000000000000 $t + /tmp/ccwGqVnP.s:302 .text.HAL_SYSTICK_Config:0000000000000000 HAL_SYSTICK_Config + /tmp/ccwGqVnP.s:366 .text.HAL_SYSTICK_Config:000000000000002c $d + /tmp/ccwGqVnP.s:373 .text.HAL_NVIC_GetPriority:0000000000000000 $t + /tmp/ccwGqVnP.s:380 .text.HAL_NVIC_GetPriority:0000000000000000 HAL_NVIC_GetPriority + /tmp/ccwGqVnP.s:446 .text.HAL_NVIC_GetPriority:0000000000000044 $d + /tmp/ccwGqVnP.s:452 .text.HAL_NVIC_SetPendingIRQ:0000000000000000 $t + /tmp/ccwGqVnP.s:459 .text.HAL_NVIC_SetPendingIRQ:0000000000000000 HAL_NVIC_SetPendingIRQ + /tmp/ccwGqVnP.s:492 .text.HAL_NVIC_SetPendingIRQ:0000000000000018 $d + /tmp/ccwGqVnP.s:497 .text.HAL_NVIC_GetPendingIRQ:0000000000000000 $t + /tmp/ccwGqVnP.s:504 .text.HAL_NVIC_GetPendingIRQ:0000000000000000 HAL_NVIC_GetPendingIRQ + /tmp/ccwGqVnP.s:549 .text.HAL_NVIC_GetPendingIRQ:000000000000001c $d + /tmp/ccwGqVnP.s:554 .text.HAL_NVIC_ClearPendingIRQ:0000000000000000 $t + /tmp/ccwGqVnP.s:561 .text.HAL_NVIC_ClearPendingIRQ:0000000000000000 HAL_NVIC_ClearPendingIRQ + /tmp/ccwGqVnP.s:594 .text.HAL_NVIC_ClearPendingIRQ:0000000000000018 $d + /tmp/ccwGqVnP.s:599 .text.HAL_SYSTICK_CLKSourceConfig:0000000000000000 $t + /tmp/ccwGqVnP.s:606 .text.HAL_SYSTICK_CLKSourceConfig:0000000000000000 HAL_SYSTICK_CLKSourceConfig + /tmp/ccwGqVnP.s:638 .text.HAL_SYSTICK_CLKSourceConfig:000000000000001c $d + /tmp/ccwGqVnP.s:643 .text.HAL_SYSTICK_Callback:0000000000000000 $t + /tmp/ccwGqVnP.s:650 .text.HAL_SYSTICK_Callback:0000000000000000 HAL_SYSTICK_Callback + /tmp/ccwGqVnP.s:664 .text.HAL_SYSTICK_IRQHandler:0000000000000000 $t + /tmp/ccwGqVnP.s:671 .text.HAL_SYSTICK_IRQHandler:0000000000000000 HAL_SYSTICK_IRQHandler + +NO UNDEFINED SYMBOLS diff --git a/fw/midi-dials/build/stm32f0xx_hal_cortex.o b/fw/midi-dials/build/stm32f0xx_hal_cortex.o Binary files differnew file mode 100644 index 0000000..c2207f1 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_cortex.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_dma.d b/fw/midi-dials/build/stm32f0xx_hal_dma.d new file mode 100644 index 0000000..a298840 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_dma.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_dma.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_dma.lst b/fw/midi-dials/build/stm32f0xx_hal_dma.lst new file mode 100644 index 0000000..0e4e1aa --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_dma.lst @@ -0,0 +1,2507 @@ +ARM GAS /tmp/ccPStHDw.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_dma.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.DMA_SetConfig,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 DMA_SetConfig: + 23 .LFB52: + 24 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @file stm32f0xx_hal_dma.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DMA HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * functionalities of the Direct Memory Access (DMA) peripheral: + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + Initialization and de-initialization functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + IO operation functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + Peripheral State and errors functions + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================================================== + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### How to use this driver ##### + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================================================== + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Enable and configure the peripheral to be connected to the DMA Channel + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (except for internal SRAM / FLASH memories: no initialization is + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** necessary). Please refer to Reference manual for connection between peripherals + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** and DMA requests . + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) For a given Channel, program the required configuration through the following parameters: + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Transfer Direction, Source and Destination data formats, + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Circular or Normal mode, Channel Priority level, Source and Destination Increment mode, + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** using HAL_DMA_Init() function. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Use HAL_DMA_GetState() function to return the DMA state and HAL_DMA_GetError() in case of er + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** detection. + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (#) Use HAL_DMA_Abort() function to abort the current transfer + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** -@- In Memory-to-Memory transfer mode, Circular mode is not allowed. + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** Polling mode IO operation *** + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ================================= + ARM GAS /tmp/ccPStHDw.s page 2 + + + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Start() to start DMA transfer after the configuration of Source + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** address and destination address and the Length of data to be transferred + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_PollForTransfer() to poll for the end of current transfer, in this + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case a fixed Timeout can be configured by User depending from his application. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** Interrupt mode IO operation *** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =================================== + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the DMA interrupt priority using HAL_NVIC_SetPriority() + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Enable the DMA IRQ handler using HAL_NVIC_EnableIRQ() + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Start_IT() to start DMA transfer after the configuration of + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Source address and destination address and the Length of data to be transferred. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** In this case the DMA interrupt is configured + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Use HAL_DMA_Channel_IRQHandler() called under DMA_IRQHandler() Interrupt subroutine + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) At the end of data transfer HAL_DMA_IRQHandler() function is executed and user can + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** add his own function by customization of function pointer XferCpltCallback and + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** XferErrorCallback (i.e a member of DMA handle structure). + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** *** DMA HAL driver macros list *** + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ============================================= + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Below the list of most used macros in DMA HAL driver. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (@) You can refer to the DMA HAL driver header file for more useful macros + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @attention + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * All rights reserved.</center></h2> + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * This software component is licensed by ST under BSD 3-Clause license, + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the "License"; You may not use this file except in compliance with the + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * License. You may obtain a copy of the License at: + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * opensource.org/licenses/BSD-3-Clause + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ****************************************************************************** + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Includes ------------------------------------------------------------------*/ + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #include "stm32f0xx_hal.h" + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @addtogroup STM32F0xx_HAL_Driver + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA DMA + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DMA HAL module driver + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #ifdef HAL_DMA_MODULE_ENABLED + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccPStHDw.s page 3 + + + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private typedef -----------------------------------------------------------*/ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private define ------------------------------------------------------------*/ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private macro -------------------------------------------------------------*/ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private variables ---------------------------------------------------------*/ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Private function prototypes -----------------------------------------------*/ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Private_Functions DMA Private Functions + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Exported functions ---------------------------------------------------------*/ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions DMA Exported Functions + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group1 Initialization and de-initialization functions + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Initialization and de-initialization functions + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### Initialization and de-initialization functions ##### + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** This section provides functions allowing to initialize the DMA Channel source + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** and destination addresses, incrementation and data sizes, transfer direction, + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** circular/normal mode selection, memory-to-memory mode selection and Channel priority value. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** The HAL_DMA_Init() function follows the DMA configuration procedures as described in + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** reference manual. + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Initialize the DMA according to the specified + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * parameters in the DMA_InitTypeDef and initialize the associated handle. + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma Pointer to a DMA_HandleTypeDef structure that contains + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma) + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(NULL == hdma) + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + ARM GAS /tmp/ccPStHDw.s page 4 + + + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_DIRECTION(hdma->Init.Direction)); + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_INC_STATE(hdma->Init.PeriphInc)); + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_INC_STATE(hdma->Init.MemInc)); + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_DATA_SIZE(hdma->Init.PeriphDataAlignment)); + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_DATA_SIZE(hdma->Init.MemDataAlignment)); + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_MODE(hdma->Init.Mode)); + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_PRIORITY(hdma->Init.Priority)); + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get the CR register value */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp = hdma->Instance->CCR; + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC, DIR bits */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_DIR)); + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Prepare the DMA Channel configuration */ + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tmp |= hdma->Init.Direction | + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Write to DMA Channel CR register */ + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR = tmp; + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialize DmaBaseAddress and ChannelIndex parameters used + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** by HAL_DMA_IRQHandler() and HAL_DMA_PollForTransfer() */ + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialise the error code */ + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Initialize the DMA state*/ + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Allocate lock resource and initialize it */ + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Lock = HAL_UNLOCKED; + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief DeInitialize the DMA peripheral + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_DeInit(DMA_HandleTypeDef *hdma) + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(NULL == hdma) + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + ARM GAS /tmp/ccPStHDw.s page 5 + + + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_ALL_INSTANCE(hdma->Instance)); + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the selected DMA Channelx */ + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel control register */ + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR = 0U; + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel Number of Data to Transfer register */ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CNDTR = 0U; + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel peripheral address register */ + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = 0U; + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset DMA Channel memory address register */ + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = 0U; + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get DMA Base Address */ + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CalcBaseAndBitshift(hdma); + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clean callbacks */ + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset the error code */ + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Reset the DMA state */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_RESET; + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group2 Input and Output operation functions + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief I/O operation functions + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### IO operation functions ##### + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] This section provides functions allowing to: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the source, destination address and data length and Start DMA transfer + ARM GAS /tmp/ccPStHDw.s page 6 + + + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Configure the source, destination address and data length and + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** Start DMA transfer with interrupt + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Abort DMA transfer + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Poll for transfer complete + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Handle DMA interrupt request + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Start the DMA Transfer. + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the peripheral */ + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the Peripheral */ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Remain BUSY */ + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_BUSY; + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccPStHDw.s page 7 + + + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Start the DMA Transfer with interrupt enabled. + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddres + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the parameters */ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** assert_param(IS_DMA_BUFFER_SIZE(DataLength)); + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change DMA peripheral state */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_BUSY; + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NONE; + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the peripheral */ + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure the source, destination address and the data length */ + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength); + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the transfer complete, & transfer error interrupts */ + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half transfer interrupt is optional: enable it only if associated callback is available */ + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(NULL != hdma->XferHalfCpltCallback ) + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= (DMA_IT_TC | DMA_IT_TE); + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Enable the Peripheral */ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR |= DMA_CCR_EN; + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Remain BUSY */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_BUSY; + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + ARM GAS /tmp/ccPStHDw.s page 8 + + + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Abort the DMA Transfer. + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma) + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY) + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable DMA IT */ + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the channel */ + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state*/ + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Abort the DMA Transfer in Interrupt mode. + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_Abort_IT(DMA_HandleTypeDef *hdma) + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_BUSY != hdma->State) + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccPStHDw.s page 9 + + + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable DMA IT */ + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the channel */ + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_CCR_EN; + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Call User Abort callback */ + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->XferAbortCallback != NULL) + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback(hdma); + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Polling for transfer complete. + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CompleteLevel Specifies the DMA level complete. + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param Timeout Timeout duration. + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tickstart = 0U; + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_BUSY != hdma->State) + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* no transfer ongoing */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NO_XFER; + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Polling mode not supported in circular mode */ + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if (RESET != (hdma->Instance->CCR & DMA_CCR_CIRC)) + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_NOT_SUPPORTED; + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get the level transfer complete flag */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_FULL_TRANSFER == CompleteLevel) + ARM GAS /tmp/ccPStHDw.s page 10 + + + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Complete flag */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** temp = DMA_FLAG_TC1 << hdma->ChannelIndex; + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half Transfer Complete flag */ + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** temp = DMA_FLAG_HT1 << hdma->ChannelIndex; + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Get tick */ + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** tickstart = HAL_GetTick(); + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** while(RESET == (hdma->DmaBaseAddress->ISR & temp)) + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(RESET != (hdma->DmaBaseAddress->ISR & (DMA_FLAG_TE1 << hdma->ChannelIndex))) + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State= HAL_DMA_STATE_READY; + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check for the Timeout */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(Timeout != HAL_MAX_DELAY) + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TIMEOUT; + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_FULL_TRANSFER == CompleteLevel) + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the transfer complete flag */ + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccPStHDw.s page 11 + + + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* The selected Channelx EN bit is cleared (DMA is disabled and + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** all transfers are complete) */ + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process unlocked */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_OK; + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Handle DMA interrupt request. + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval None + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma) + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half Transfer Complete Interrupt management ******************************/ + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((RESET != (flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_ + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */ + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the half transfer interrupt */ + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the half transfer complete flag */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_HT1 << hdma->ChannelIndex; + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA peripheral state is not updated in Half Transfer */ + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* State is updated only in Transfer Complete case */ + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->XferHalfCpltCallback != NULL) + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Half transfer callback */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback(hdma); + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Complete Interrupt management ***********************************/ + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else if ((RESET != (flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex))) && (RESET != (source_it & DM + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U) + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Disable the transfer complete & transfer error interrupts */ + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* if the DMA mode is not CIRCULAR */ + ARM GAS /tmp/ccPStHDw.s page 12 + + + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_TE); + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear the transfer complete flag */ + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_TC1 << hdma->ChannelIndex; + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->XferCpltCallback != NULL) + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer complete callback */ + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback(hdma); + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer Error Interrupt management ***************************************/ + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & D + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* When a DMA transfer error occurs */ + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* A hardware clear of its EN bits is performed */ + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Then, disable all DMA interrupts */ + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~(DMA_IT_TC | DMA_IT_HT | DMA_IT_TE); + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = DMA_FLAG_GL1 << hdma->ChannelIndex; + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Update error code */ + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ErrorCode = HAL_DMA_ERROR_TE; + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Change the DMA state */ + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->State = HAL_DMA_STATE_READY; + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process Unlocked */ + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->XferErrorCallback != NULL) + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Transfer error callback */ + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback(hdma); + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Register callbacks + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CallbackID User Callback identifer + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param pCallback pointer to private callback function which has pointer to + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a DMA_HandleTypeDef structure as parameter. + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + ARM GAS /tmp/ccPStHDw.s page 13 + + + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_RegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Callb + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** switch (CallbackID) + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = pCallback; + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = pCallback; + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = pCallback; + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = pCallback; + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** default: + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief UnRegister callbacks + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param CallbackID User Callback identifer + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * a HAL_DMA_CallbackIDTypeDef ENUM as parameter. + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef HAL_DMA_UnRegisterCallback(DMA_HandleTypeDef *hdma, HAL_DMA_CallbackIDTypeDef Cal + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Process locked */ + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_LOCK(hdma); + ARM GAS /tmp/ccPStHDw.s page 14 + + + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(HAL_DMA_STATE_READY == hdma->State) + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** switch (CallbackID) + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_CPLT_CB_ID: + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_HALFCPLT_CB_ID: + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ERROR_CB_ID: + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ABORT_CB_ID: + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** case HAL_DMA_XFER_ALL_CB_ID: + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferCpltCallback = NULL; + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** default: + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** status = HAL_ERROR; + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Release Lock */ + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return status; + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @defgroup DMA_Exported_Functions_Group3 Peripheral State functions + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Peripheral State functions + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @verbatim + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** ##### State and Errors functions ##### + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** =============================================================================== + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** [..] + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** This subsection provides functions allowing to + ARM GAS /tmp/ccPStHDw.s page 15 + + + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Check the DMA state + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** (+) Get error code + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** @endverbatim + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Returns the DMA state. + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL state + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma) + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->State; + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Return the DMA error code + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval DMA Error Code + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma) + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->ErrorCode; + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @} + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** @addtogroup DMA_Private_Functions + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @{ + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief Set the DMA Transfer parameters. + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Channel. + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param SrcAddress The source memory Buffer address + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DstAddress The destination memory Buffer address + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param DataLength The length of data to be transferred from source to destination + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval HAL status + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32 + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 25 .loc 1 827 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 0 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 .LVL0: + ARM GAS /tmp/ccPStHDw.s page 16 + + + 30 0000 70B5 push {r4, r5, r6, lr} + 31 .LCFI0: + 32 .cfi_def_cfa_offset 16 + 33 .cfi_offset 4, -16 + 34 .cfi_offset 5, -12 + 35 .cfi_offset 6, -8 + 36 .cfi_offset 14, -4 + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Clear all flags */ + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress->IFCR = (DMA_FLAG_GL1 << hdma->ChannelIndex); + 37 .loc 1 829 0 + 38 0002 C56B ldr r5, [r0, #60] + 39 0004 0124 movs r4, #1 + 40 0006 066C ldr r6, [r0, #64] + 41 0008 B440 lsls r4, r4, r6 + 42 000a 6C60 str r4, [r5, #4] + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel data length */ + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CNDTR = DataLength; + 43 .loc 1 832 0 + 44 000c 0468 ldr r4, [r0] + 45 000e 6360 str r3, [r4, #4] + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Memory to Peripheral */ + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH) + 46 .loc 1 835 0 + 47 0010 4368 ldr r3, [r0, #4] + 48 .LVL1: + 49 0012 102B cmp r3, #16 + 50 0014 04D0 beq .L4 + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = DstAddress; + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel source address */ + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = SrcAddress; + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Peripheral to Memory */ + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel source address */ + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CPAR = SrcAddress; + 51 .loc 1 847 0 + 52 0016 0368 ldr r3, [r0] + 53 0018 9960 str r1, [r3, #8] + 54 .LVL2: + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Configure DMA Channel destination address */ + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CMAR = DstAddress; + 55 .loc 1 850 0 + 56 001a 0368 ldr r3, [r0] + 57 001c DA60 str r2, [r3, #12] + 58 .L1: + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 59 .loc 1 852 0 + 60 @ sp needed + 61 001e 70BD pop {r4, r5, r6, pc} + ARM GAS /tmp/ccPStHDw.s page 17 + + + 62 .LVL3: + 63 .L4: + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 64 .loc 1 838 0 + 65 0020 0368 ldr r3, [r0] + 66 0022 9A60 str r2, [r3, #8] + 67 .LVL4: + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 68 .loc 1 841 0 + 69 0024 0368 ldr r3, [r0] + 70 0026 D960 str r1, [r3, #12] + 71 0028 F9E7 b .L1 + 72 .cfi_endproc + 73 .LFE52: + 75 .global __aeabi_uidiv + 76 .section .text.DMA_CalcBaseAndBitshift,"ax",%progbits + 77 .align 1 + 78 .syntax unified + 79 .code 16 + 80 .thumb_func + 81 .fpu softvfp + 83 DMA_CalcBaseAndBitshift: + 84 .LFB53: + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /** + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @brief set the DMA base address and channel index depending on DMA instance + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @param hdma pointer to a DMA_HandleTypeDef structure that contains + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * the configuration information for the specified DMA Stream. + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** * @retval None + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** */ + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** static void DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 85 .loc 1 861 0 + 86 .cfi_startproc + 87 @ args = 0, pretend = 0, frame = 0 + 88 @ frame_needed = 0, uses_anonymous_args = 0 + 89 .LVL5: + 90 0000 10B5 push {r4, lr} + 91 .LCFI1: + 92 .cfi_def_cfa_offset 8 + 93 .cfi_offset 4, -8 + 94 .cfi_offset 14, -4 + 95 0002 0400 movs r4, r0 + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #if defined (DMA2) + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* calculation of the channel index */ + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if ((uint32_t)(hdma->Instance) < (uint32_t)(DMA2_Channel1)) + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA1 */ + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Ch + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** else + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA2 */ + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Ch + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA2; + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccPStHDw.s page 18 + + + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #else + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* calculation of the channel index */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* DMA1 */ + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Chan + 96 .loc 1 879 0 + 97 0004 0368 ldr r3, [r0] + 98 0006 064A ldr r2, .L6 + 99 0008 9446 mov ip, r2 + 100 000a 6344 add r3, r3, ip + 101 000c 1800 movs r0, r3 + 102 .LVL6: + 103 000e 1421 movs r1, #20 + 104 0010 FFF7FEFF bl __aeabi_uidiv + 105 .LVL7: + 106 0014 8000 lsls r0, r0, #2 + 107 0016 2064 str r0, [r4, #64] + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->DmaBaseAddress = DMA1; + 108 .loc 1 880 0 + 109 0018 024B ldr r3, .L6+4 + 110 001a E363 str r3, [r4, #60] + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** #endif + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 111 .loc 1 882 0 + 112 @ sp needed + 113 .LVL8: + 114 001c 10BD pop {r4, pc} + 115 .L7: + 116 001e C046 .align 2 + 117 .L6: + 118 0020 F8FFFDBF .word -1073872904 + 119 0024 00000240 .word 1073872896 + 120 .cfi_endproc + 121 .LFE53: + 123 .section .text.HAL_DMA_Init,"ax",%progbits + 124 .align 1 + 125 .global HAL_DMA_Init + 126 .syntax unified + 127 .code 16 + 128 .thumb_func + 129 .fpu softvfp + 131 HAL_DMA_Init: + 132 .LFB40: + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t tmp = 0U; + 133 .loc 1 139 0 + 134 .cfi_startproc + 135 @ args = 0, pretend = 0, frame = 0 + 136 @ frame_needed = 0, uses_anonymous_args = 0 + 137 .LVL9: + 138 0000 70B5 push {r4, r5, r6, lr} + 139 .LCFI2: + 140 .cfi_def_cfa_offset 16 + 141 .cfi_offset 4, -16 + 142 .cfi_offset 5, -12 + 143 .cfi_offset 6, -8 + 144 .cfi_offset 14, -4 + 145 0002 041E subs r4, r0, #0 + 146 .LVL10: + ARM GAS /tmp/ccPStHDw.s page 19 + + + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 147 .loc 1 143 0 + 148 0004 20D0 beq .L10 + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 149 .loc 1 159 0 + 150 0006 2125 movs r5, #33 + 151 0008 0223 movs r3, #2 + 152 000a 4355 strb r3, [r0, r5] + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 153 .loc 1 162 0 + 154 000c 0168 ldr r1, [r0] + 155 000e 0B68 ldr r3, [r1] + 156 .LVL11: + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \ + 157 .loc 1 165 0 + 158 0010 0E4A ldr r2, .L11 + 159 0012 1A40 ands r2, r3 + 160 .LVL12: + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 161 .loc 1 170 0 + 162 0014 4368 ldr r3, [r0, #4] + 163 0016 8068 ldr r0, [r0, #8] + 164 .LVL13: + 165 0018 0343 orrs r3, r0 + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment | + 166 .loc 1 171 0 + 167 001a E068 ldr r0, [r4, #12] + 168 001c 0343 orrs r3, r0 + 169 001e 2069 ldr r0, [r4, #16] + 170 0020 0343 orrs r3, r0 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.Mode | hdma->Init.Priority; + 171 .loc 1 172 0 + 172 0022 6069 ldr r0, [r4, #20] + 173 0024 0343 orrs r3, r0 + 174 0026 A069 ldr r0, [r4, #24] + 175 0028 0343 orrs r3, r0 + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 176 .loc 1 173 0 + 177 002a E069 ldr r0, [r4, #28] + 178 002c 0343 orrs r3, r0 + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Init.PeriphInc | hdma->Init.MemInc | + 179 .loc 1 170 0 + 180 002e 1343 orrs r3, r2 + 181 .LVL14: + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 182 .loc 1 176 0 + 183 0030 0B60 str r3, [r1] + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 184 .loc 1 180 0 + 185 0032 2000 movs r0, r4 + 186 0034 FFF7FEFF bl DMA_CalcBaseAndBitshift + 187 .LVL15: + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 188 .loc 1 183 0 + 189 0038 0023 movs r3, #0 + 190 003a A363 str r3, [r4, #56] + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + ARM GAS /tmp/ccPStHDw.s page 20 + + + 191 .loc 1 186 0 + 192 003c 0122 movs r2, #1 + 193 003e 6255 strb r2, [r4, r5] + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 194 .loc 1 189 0 + 195 0040 1F32 adds r2, r2, #31 + 196 0042 A354 strb r3, [r4, r2] + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 197 .loc 1 191 0 + 198 0044 0020 movs r0, #0 + 199 .L9: + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 200 .loc 1 192 0 + 201 @ sp needed + 202 .LVL16: + 203 0046 70BD pop {r4, r5, r6, pc} + 204 .LVL17: + 205 .L10: + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 206 .loc 1 145 0 + 207 0048 0120 movs r0, #1 + 208 .LVL18: + 209 004a FCE7 b .L9 + 210 .L12: + 211 .align 2 + 212 .L11: + 213 004c 0FC0FFFF .word -16369 + 214 .cfi_endproc + 215 .LFE40: + 217 .section .text.HAL_DMA_DeInit,"ax",%progbits + 218 .align 1 + 219 .global HAL_DMA_DeInit + 220 .syntax unified + 221 .code 16 + 222 .thumb_func + 223 .fpu softvfp + 225 HAL_DMA_DeInit: + 226 .LFB41: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** /* Check the DMA handle allocation */ + 227 .loc 1 201 0 + 228 .cfi_startproc + 229 @ args = 0, pretend = 0, frame = 0 + 230 @ frame_needed = 0, uses_anonymous_args = 0 + 231 .LVL19: + 232 0000 70B5 push {r4, r5, r6, lr} + 233 .LCFI3: + 234 .cfi_def_cfa_offset 16 + 235 .cfi_offset 4, -16 + 236 .cfi_offset 5, -12 + 237 .cfi_offset 6, -8 + 238 .cfi_offset 14, -4 + 239 0002 041E subs r4, r0, #0 + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 240 .loc 1 203 0 + 241 0004 1ED0 beq .L15 + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 242 .loc 1 212 0 + ARM GAS /tmp/ccPStHDw.s page 21 + + + 243 0006 0268 ldr r2, [r0] + 244 0008 1368 ldr r3, [r2] + 245 000a 0126 movs r6, #1 + 246 000c B343 bics r3, r6 + 247 000e 1360 str r3, [r2] + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 248 .loc 1 215 0 + 249 0010 0368 ldr r3, [r0] + 250 0012 0025 movs r5, #0 + 251 0014 1D60 str r5, [r3] + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 252 .loc 1 218 0 + 253 0016 0368 ldr r3, [r0] + 254 0018 5D60 str r5, [r3, #4] + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 255 .loc 1 221 0 + 256 001a 0368 ldr r3, [r0] + 257 001c 9D60 str r5, [r3, #8] + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 258 .loc 1 224 0 + 259 001e 0368 ldr r3, [r0] + 260 0020 DD60 str r5, [r3, #12] + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 261 .loc 1 227 0 + 262 0022 FFF7FEFF bl DMA_CalcBaseAndBitshift + 263 .LVL20: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 264 .loc 1 230 0 + 265 0026 E36B ldr r3, [r4, #60] + 266 0028 226C ldr r2, [r4, #64] + 267 002a 9640 lsls r6, r6, r2 + 268 002c 5E60 str r6, [r3, #4] + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 269 .loc 1 233 0 + 270 002e A562 str r5, [r4, #40] + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 271 .loc 1 234 0 + 272 0030 E562 str r5, [r4, #44] + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 273 .loc 1 235 0 + 274 0032 2563 str r5, [r4, #48] + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 275 .loc 1 236 0 + 276 0034 6563 str r5, [r4, #52] + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 277 .loc 1 239 0 + 278 0036 A563 str r5, [r4, #56] + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 279 .loc 1 242 0 + 280 0038 2123 movs r3, #33 + 281 003a E554 strb r5, [r4, r3] + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 282 .loc 1 245 0 + 283 003c 013B subs r3, r3, #1 + 284 003e E554 strb r5, [r4, r3] + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 285 .loc 1 247 0 + ARM GAS /tmp/ccPStHDw.s page 22 + + + 286 0040 0020 movs r0, #0 + 287 .L14: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 288 .loc 1 248 0 + 289 @ sp needed + 290 .LVL21: + 291 0042 70BD pop {r4, r5, r6, pc} + 292 .LVL22: + 293 .L15: + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 294 .loc 1 205 0 + 295 0044 0120 movs r0, #1 + 296 .LVL23: + 297 0046 FCE7 b .L14 + 298 .cfi_endproc + 299 .LFE41: + 301 .section .text.HAL_DMA_Start,"ax",%progbits + 302 .align 1 + 303 .global HAL_DMA_Start + 304 .syntax unified + 305 .code 16 + 306 .thumb_func + 307 .fpu softvfp + 309 HAL_DMA_Start: + 310 .LFB42: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 311 .loc 1 283 0 + 312 .cfi_startproc + 313 @ args = 0, pretend = 0, frame = 0 + 314 @ frame_needed = 0, uses_anonymous_args = 0 + 315 .LVL24: + 316 0000 70B5 push {r4, r5, r6, lr} + 317 .LCFI4: + 318 .cfi_def_cfa_offset 16 + 319 .cfi_offset 4, -16 + 320 .cfi_offset 5, -12 + 321 .cfi_offset 6, -8 + 322 .cfi_offset 14, -4 + 323 0002 0400 movs r4, r0 + 324 .LVL25: + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 325 .loc 1 290 0 + 326 0004 2020 movs r0, #32 + 327 .LVL26: + 328 0006 205C ldrb r0, [r4, r0] + 329 0008 0128 cmp r0, #1 + 330 000a 1ED0 beq .L19 + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 331 .loc 1 290 0 is_stmt 0 discriminator 2 + 332 000c 2020 movs r0, #32 + 333 000e 0125 movs r5, #1 + 334 0010 2554 strb r5, [r4, r0] + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 335 .loc 1 292 0 is_stmt 1 discriminator 2 + 336 0012 0130 adds r0, r0, #1 + 337 0014 205C ldrb r0, [r4, r0] + 338 0016 0128 cmp r0, #1 + ARM GAS /tmp/ccPStHDw.s page 23 + + + 339 0018 04D0 beq .L20 + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 340 .loc 1 311 0 + 341 001a 2023 movs r3, #32 + 342 .LVL27: + 343 001c 0022 movs r2, #0 + 344 .LVL28: + 345 001e E254 strb r2, [r4, r3] + 346 .LVL29: + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 347 .loc 1 314 0 + 348 0020 0220 movs r0, #2 + 349 .LVL30: + 350 .L17: + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 351 .loc 1 318 0 + 352 @ sp needed + 353 .LVL31: + 354 0022 70BD pop {r4, r5, r6, pc} + 355 .LVL32: + 356 .L20: + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 357 .loc 1 295 0 + 358 0024 2030 adds r0, r0, #32 + 359 0026 0135 adds r5, r5, #1 + 360 0028 2554 strb r5, [r4, r0] + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 361 .loc 1 297 0 + 362 002a 0020 movs r0, #0 + 363 002c A063 str r0, [r4, #56] + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 364 .loc 1 300 0 + 365 002e 2668 ldr r6, [r4] + 366 0030 3068 ldr r0, [r6] + 367 0032 013D subs r5, r5, #1 + 368 0034 A843 bics r0, r5 + 369 0036 3060 str r0, [r6] + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 370 .loc 1 303 0 + 371 0038 2000 movs r0, r4 + 372 003a FFF7FEFF bl DMA_SetConfig + 373 .LVL33: + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 374 .loc 1 306 0 + 375 003e 2268 ldr r2, [r4] + 376 0040 1368 ldr r3, [r2] + 377 0042 2B43 orrs r3, r5 + 378 0044 1360 str r3, [r2] + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 379 .loc 1 284 0 + 380 0046 0020 movs r0, #0 + 381 0048 EBE7 b .L17 + 382 .LVL34: + 383 .L19: + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 384 .loc 1 290 0 + 385 004a 0220 movs r0, #2 + ARM GAS /tmp/ccPStHDw.s page 24 + + + 386 004c E9E7 b .L17 + 387 .cfi_endproc + 388 .LFE42: + 390 .section .text.HAL_DMA_Start_IT,"ax",%progbits + 391 .align 1 + 392 .global HAL_DMA_Start_IT + 393 .syntax unified + 394 .code 16 + 395 .thumb_func + 396 .fpu softvfp + 398 HAL_DMA_Start_IT: + 399 .LFB43: + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 400 .loc 1 330 0 + 401 .cfi_startproc + 402 @ args = 0, pretend = 0, frame = 0 + 403 @ frame_needed = 0, uses_anonymous_args = 0 + 404 .LVL35: + 405 0000 70B5 push {r4, r5, r6, lr} + 406 .LCFI5: + 407 .cfi_def_cfa_offset 16 + 408 .cfi_offset 4, -16 + 409 .cfi_offset 5, -12 + 410 .cfi_offset 6, -8 + 411 .cfi_offset 14, -4 + 412 0002 0400 movs r4, r0 + 413 .LVL36: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 414 .loc 1 337 0 + 415 0004 2020 movs r0, #32 + 416 .LVL37: + 417 0006 205C ldrb r0, [r4, r0] + 418 0008 0128 cmp r0, #1 + 419 000a 32D0 beq .L26 + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 420 .loc 1 337 0 is_stmt 0 discriminator 2 + 421 000c 2020 movs r0, #32 + 422 000e 0125 movs r5, #1 + 423 0010 2554 strb r5, [r4, r0] + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 424 .loc 1 339 0 is_stmt 1 discriminator 2 + 425 0012 0130 adds r0, r0, #1 + 426 0014 205C ldrb r0, [r4, r0] + 427 0016 0128 cmp r0, #1 + 428 0018 04D0 beq .L27 + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 429 .loc 1 370 0 + 430 001a 2023 movs r3, #32 + 431 .LVL38: + 432 001c 0022 movs r2, #0 + 433 .LVL39: + 434 001e E254 strb r2, [r4, r3] + 435 .LVL40: + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 436 .loc 1 373 0 + 437 0020 0220 movs r0, #2 + 438 .LVL41: + ARM GAS /tmp/ccPStHDw.s page 25 + + + 439 .L22: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 440 .loc 1 377 0 + 441 @ sp needed + 442 .LVL42: + 443 0022 70BD pop {r4, r5, r6, pc} + 444 .LVL43: + 445 .L27: + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 446 .loc 1 342 0 + 447 0024 2030 adds r0, r0, #32 + 448 0026 0135 adds r5, r5, #1 + 449 0028 2554 strb r5, [r4, r0] + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 450 .loc 1 344 0 + 451 002a 0020 movs r0, #0 + 452 002c A063 str r0, [r4, #56] + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 453 .loc 1 347 0 + 454 002e 2568 ldr r5, [r4] + 455 0030 2868 ldr r0, [r5] + 456 0032 0126 movs r6, #1 + 457 0034 B043 bics r0, r6 + 458 0036 2860 str r0, [r5] + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 459 .loc 1 350 0 + 460 0038 2000 movs r0, r4 + 461 003a FFF7FEFF bl DMA_SetConfig + 462 .LVL44: + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 463 .loc 1 354 0 + 464 003e E36A ldr r3, [r4, #44] + 465 0040 002B cmp r3, #0 + 466 0042 0BD0 beq .L24 + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 467 .loc 1 356 0 + 468 0044 2268 ldr r2, [r4] + 469 0046 1368 ldr r3, [r2] + 470 0048 0E21 movs r1, #14 + 471 004a 0B43 orrs r3, r1 + 472 004c 1360 str r3, [r2] + 473 .L25: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 474 .loc 1 365 0 + 475 004e 2268 ldr r2, [r4] + 476 0050 1368 ldr r3, [r2] + 477 0052 0121 movs r1, #1 + 478 0054 0B43 orrs r3, r1 + 479 0056 1360 str r3, [r2] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 480 .loc 1 331 0 + 481 0058 0020 movs r0, #0 + 482 005a E2E7 b .L22 + 483 .L24: + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->Instance->CCR &= ~DMA_IT_HT; + 484 .loc 1 360 0 + 485 005c 2268 ldr r2, [r4] + ARM GAS /tmp/ccPStHDw.s page 26 + + + 486 005e 1368 ldr r3, [r2] + 487 0060 0A21 movs r1, #10 + 488 0062 0B43 orrs r3, r1 + 489 0064 1360 str r3, [r2] + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 490 .loc 1 361 0 + 491 0066 2268 ldr r2, [r4] + 492 0068 1368 ldr r3, [r2] + 493 006a 0639 subs r1, r1, #6 + 494 006c 8B43 bics r3, r1 + 495 006e 1360 str r3, [r2] + 496 0070 EDE7 b .L25 + 497 .LVL45: + 498 .L26: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 499 .loc 1 337 0 + 500 0072 0220 movs r0, #2 + 501 0074 D5E7 b .L22 + 502 .cfi_endproc + 503 .LFE43: + 505 .section .text.HAL_DMA_Abort,"ax",%progbits + 506 .align 1 + 507 .global HAL_DMA_Abort + 508 .syntax unified + 509 .code 16 + 510 .thumb_func + 511 .fpu softvfp + 513 HAL_DMA_Abort: + 514 .LFB44: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** if(hdma->State != HAL_DMA_STATE_BUSY) + 515 .loc 1 386 0 + 516 .cfi_startproc + 517 @ args = 0, pretend = 0, frame = 0 + 518 @ frame_needed = 0, uses_anonymous_args = 0 + 519 .LVL46: + 520 0000 10B5 push {r4, lr} + 521 .LCFI6: + 522 .cfi_def_cfa_offset 8 + 523 .cfi_offset 4, -8 + 524 .cfi_offset 14, -4 + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 525 .loc 1 387 0 + 526 0002 2123 movs r3, #33 + 527 0004 C35C ldrb r3, [r0, r3] + 528 0006 022B cmp r3, #2 + 529 0008 06D0 beq .L29 + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 530 .loc 1 390 0 + 531 000a 0423 movs r3, #4 + 532 000c 8363 str r3, [r0, #56] + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 533 .loc 1 393 0 + 534 000e 1C33 adds r3, r3, #28 + 535 0010 0022 movs r2, #0 + 536 0012 C254 strb r2, [r0, r3] + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 537 .loc 1 395 0 + ARM GAS /tmp/ccPStHDw.s page 27 + + + 538 0014 0120 movs r0, #1 + 539 .LVL47: + 540 .L30: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 541 .loc 1 415 0 + 542 @ sp needed + 543 0016 10BD pop {r4, pc} + 544 .LVL48: + 545 .L29: + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 546 .loc 1 400 0 + 547 0018 0268 ldr r2, [r0] + 548 001a 1368 ldr r3, [r2] + 549 001c 0E21 movs r1, #14 + 550 001e 8B43 bics r3, r1 + 551 0020 1360 str r3, [r2] + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 552 .loc 1 403 0 + 553 0022 0168 ldr r1, [r0] + 554 0024 0A68 ldr r2, [r1] + 555 0026 0123 movs r3, #1 + 556 0028 9A43 bics r2, r3 + 557 002a 0A60 str r2, [r1] + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 558 .loc 1 406 0 + 559 002c C26B ldr r2, [r0, #60] + 560 002e 1900 movs r1, r3 + 561 0030 046C ldr r4, [r0, #64] + 562 0032 A140 lsls r1, r1, r4 + 563 0034 5160 str r1, [r2, #4] + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 564 .loc 1 409 0 + 565 0036 2122 movs r2, #33 + 566 0038 8354 strb r3, [r0, r2] + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 567 .loc 1 412 0 + 568 003a 1F33 adds r3, r3, #31 + 569 003c 0022 movs r2, #0 + 570 003e C254 strb r2, [r0, r3] + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 571 .loc 1 414 0 + 572 0040 0020 movs r0, #0 + 573 .LVL49: + 574 0042 E8E7 b .L30 + 575 .cfi_endproc + 576 .LFE44: + 578 .section .text.HAL_DMA_Abort_IT,"ax",%progbits + 579 .align 1 + 580 .global HAL_DMA_Abort_IT + 581 .syntax unified + 582 .code 16 + 583 .thumb_func + 584 .fpu softvfp + 586 HAL_DMA_Abort_IT: + 587 .LFB45: + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 588 .loc 1 424 0 + ARM GAS /tmp/ccPStHDw.s page 28 + + + 589 .cfi_startproc + 590 @ args = 0, pretend = 0, frame = 0 + 591 @ frame_needed = 0, uses_anonymous_args = 0 + 592 .LVL50: + 593 0000 10B5 push {r4, lr} + 594 .LCFI7: + 595 .cfi_def_cfa_offset 8 + 596 .cfi_offset 4, -8 + 597 .cfi_offset 14, -4 + 598 .LVL51: + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 599 .loc 1 427 0 + 600 0002 2123 movs r3, #33 + 601 0004 C35C ldrb r3, [r0, r3] + 602 0006 022B cmp r3, #2 + 603 0008 03D0 beq .L32 + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 604 .loc 1 430 0 + 605 000a 0423 movs r3, #4 + 606 000c 8363 str r3, [r0, #56] + 607 .LVL52: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 608 .loc 1 432 0 + 609 000e 0120 movs r0, #1 + 610 .LVL53: + 611 .L33: + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 612 .loc 1 459 0 + 613 @ sp needed + 614 0010 10BD pop {r4, pc} + 615 .LVL54: + 616 .L32: + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 617 .loc 1 438 0 + 618 0012 0268 ldr r2, [r0] + 619 0014 1368 ldr r3, [r2] + 620 0016 0E21 movs r1, #14 + 621 0018 8B43 bics r3, r1 + 622 001a 1360 str r3, [r2] + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 623 .loc 1 441 0 + 624 001c 0168 ldr r1, [r0] + 625 001e 0A68 ldr r2, [r1] + 626 0020 0123 movs r3, #1 + 627 0022 9A43 bics r2, r3 + 628 0024 0A60 str r2, [r1] + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 629 .loc 1 444 0 + 630 0026 C26B ldr r2, [r0, #60] + 631 0028 1900 movs r1, r3 + 632 002a 046C ldr r4, [r0, #64] + 633 002c A140 lsls r1, r1, r4 + 634 002e 5160 str r1, [r2, #4] + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 635 .loc 1 447 0 + 636 0030 2122 movs r2, #33 + 637 0032 8354 strb r3, [r0, r2] + ARM GAS /tmp/ccPStHDw.s page 29 + + + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 638 .loc 1 450 0 + 639 0034 1F33 adds r3, r3, #31 + 640 0036 0022 movs r2, #0 + 641 0038 C254 strb r2, [r0, r3] + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 642 .loc 1 453 0 + 643 003a 436B ldr r3, [r0, #52] + 644 003c 002B cmp r3, #0 + 645 003e 02D0 beq .L34 + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 646 .loc 1 455 0 + 647 0040 9847 blx r3 + 648 .LVL55: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 649 .loc 1 425 0 + 650 0042 0020 movs r0, #0 + 651 0044 E4E7 b .L33 + 652 .LVL56: + 653 .L34: + 654 0046 0020 movs r0, #0 + 655 .LVL57: + 656 0048 E2E7 b .L33 + 657 .cfi_endproc + 658 .LFE45: + 660 .section .text.HAL_DMA_PollForTransfer,"ax",%progbits + 661 .align 1 + 662 .global HAL_DMA_PollForTransfer + 663 .syntax unified + 664 .code 16 + 665 .thumb_func + 666 .fpu softvfp + 668 HAL_DMA_PollForTransfer: + 669 .LFB46: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t temp; + 670 .loc 1 470 0 + 671 .cfi_startproc + 672 @ args = 0, pretend = 0, frame = 8 + 673 @ frame_needed = 0, uses_anonymous_args = 0 + 674 .LVL58: + 675 0000 F0B5 push {r4, r5, r6, r7, lr} + 676 .LCFI8: + 677 .cfi_def_cfa_offset 20 + 678 .cfi_offset 4, -20 + 679 .cfi_offset 5, -16 + 680 .cfi_offset 6, -12 + 681 .cfi_offset 7, -8 + 682 .cfi_offset 14, -4 + 683 0002 83B0 sub sp, sp, #12 + 684 .LCFI9: + 685 .cfi_def_cfa_offset 32 + 686 0004 0400 movs r4, r0 + 687 0006 0D00 movs r5, r1 + 688 0008 1700 movs r7, r2 + 689 .LVL59: + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 690 .loc 1 474 0 + ARM GAS /tmp/ccPStHDw.s page 30 + + + 691 000a 2123 movs r3, #33 + 692 000c C35C ldrb r3, [r0, r3] + 693 000e 022B cmp r3, #2 + 694 0010 07D0 beq .L36 + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** __HAL_UNLOCK(hdma); + 695 .loc 1 477 0 + 696 0012 0423 movs r3, #4 + 697 0014 8363 str r3, [r0, #56] + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 698 .loc 1 478 0 + 699 0016 1C33 adds r3, r3, #28 + 700 0018 0022 movs r2, #0 + 701 .LVL60: + 702 001a C254 strb r2, [r0, r3] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 703 .loc 1 479 0 + 704 001c 0120 movs r0, #1 + 705 .LVL61: + 706 .L37: + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 707 .loc 1 562 0 + 708 001e 03B0 add sp, sp, #12 + 709 @ sp needed + 710 .LVL62: + 711 .LVL63: + 712 .LVL64: + 713 0020 F0BD pop {r4, r5, r6, r7, pc} + 714 .LVL65: + 715 .L36: + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 716 .loc 1 483 0 + 717 0022 0368 ldr r3, [r0] + 718 0024 1B68 ldr r3, [r3] + 719 0026 9B06 lsls r3, r3, #26 + 720 0028 24D4 bmi .L48 + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 721 .loc 1 490 0 + 722 002a 0029 cmp r1, #0 + 723 002c 27D1 bne .L39 + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 724 .loc 1 493 0 + 725 002e 0226 movs r6, #2 + 726 0030 036C ldr r3, [r0, #64] + 727 0032 9E40 lsls r6, r6, r3 + 728 .LVL66: + 729 .L40: + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 730 .loc 1 502 0 + 731 0034 FFF7FEFF bl HAL_GetTick + 732 .LVL67: + 733 0038 0190 str r0, [sp, #4] + 734 .LVL68: + 735 .L43: + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 736 .loc 1 504 0 + 737 003a E26B ldr r2, [r4, #60] + 738 003c 1368 ldr r3, [r2] + ARM GAS /tmp/ccPStHDw.s page 31 + + + 739 003e 1E42 tst r6, r3 + 740 0040 2DD1 bne .L49 + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 741 .loc 1 506 0 + 742 0042 1068 ldr r0, [r2] + 743 0044 216C ldr r1, [r4, #64] + 744 0046 0823 movs r3, #8 + 745 0048 8B40 lsls r3, r3, r1 + 746 004a 0342 tst r3, r0 + 747 004c 1BD1 bne .L50 + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 748 .loc 1 525 0 + 749 004e 7B1C adds r3, r7, #1 + 750 0050 F3D0 beq .L43 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 751 .loc 1 527 0 + 752 0052 002F cmp r7, #0 + 753 0054 05D0 beq .L44 + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 754 .loc 1 527 0 is_stmt 0 discriminator 1 + 755 0056 FFF7FEFF bl HAL_GetTick + 756 .LVL69: + 757 005a 019B ldr r3, [sp, #4] + 758 005c C01A subs r0, r0, r3 + 759 005e B842 cmp r0, r7 + 760 0060 EBD9 bls .L43 + 761 .L44: + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 762 .loc 1 530 0 is_stmt 1 + 763 0062 2023 movs r3, #32 + 764 0064 A363 str r3, [r4, #56] + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 765 .loc 1 533 0 + 766 0066 2122 movs r2, #33 + 767 0068 0121 movs r1, #1 + 768 006a A154 strb r1, [r4, r2] + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 769 .loc 1 536 0 + 770 006c 0022 movs r2, #0 + 771 006e E254 strb r2, [r4, r3] + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 772 .loc 1 538 0 + 773 0070 0120 movs r0, #1 + 774 0072 D4E7 b .L37 + 775 .LVL70: + 776 .L48: + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return HAL_ERROR; + 777 .loc 1 485 0 + 778 0074 8023 movs r3, #128 + 779 0076 5B00 lsls r3, r3, #1 + 780 0078 8363 str r3, [r0, #56] + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 781 .loc 1 486 0 + 782 007a 0120 movs r0, #1 + 783 .LVL71: + 784 007c CFE7 b .L37 + 785 .LVL72: + ARM GAS /tmp/ccPStHDw.s page 32 + + + 786 .L39: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 787 .loc 1 498 0 + 788 007e 0426 movs r6, #4 + 789 0080 036C ldr r3, [r0, #64] + 790 0082 9E40 lsls r6, r6, r3 + 791 .LVL73: + 792 0084 D6E7 b .L40 + 793 .LVL74: + 794 .L50: + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 795 .loc 1 511 0 + 796 0086 0123 movs r3, #1 + 797 0088 1800 movs r0, r3 + 798 008a 8840 lsls r0, r0, r1 + 799 008c 5060 str r0, [r2, #4] + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 800 .loc 1 514 0 + 801 008e A363 str r3, [r4, #56] + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 802 .loc 1 517 0 + 803 0090 2122 movs r2, #33 + 804 0092 A354 strb r3, [r4, r2] + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 805 .loc 1 520 0 + 806 0094 1F33 adds r3, r3, #31 + 807 0096 0022 movs r2, #0 + 808 0098 E254 strb r2, [r4, r3] + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 809 .loc 1 522 0 + 810 009a 0120 movs r0, #1 + 811 009c BFE7 b .L37 + 812 .L49: + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 813 .loc 1 543 0 + 814 009e 002D cmp r5, #0 + 815 00a0 0BD1 bne .L46 + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 816 .loc 1 546 0 + 817 00a2 0223 movs r3, #2 + 818 00a4 216C ldr r1, [r4, #64] + 819 00a6 8B40 lsls r3, r3, r1 + 820 00a8 5360 str r3, [r2, #4] + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 821 .loc 1 550 0 + 822 00aa 2123 movs r3, #33 + 823 00ac 0122 movs r2, #1 + 824 00ae E254 strb r2, [r4, r3] + 825 .L47: + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 826 .loc 1 559 0 + 827 00b0 2023 movs r3, #32 + 828 00b2 0022 movs r2, #0 + 829 00b4 E254 strb r2, [r4, r3] + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 830 .loc 1 561 0 + 831 00b6 0020 movs r0, #0 + ARM GAS /tmp/ccPStHDw.s page 33 + + + 832 00b8 B1E7 b .L37 + 833 .L46: + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 834 .loc 1 555 0 + 835 00ba 0423 movs r3, #4 + 836 00bc 216C ldr r1, [r4, #64] + 837 00be 8B40 lsls r3, r3, r1 + 838 00c0 5360 str r3, [r2, #4] + 839 00c2 F5E7 b .L47 + 840 .cfi_endproc + 841 .LFE46: + 843 .section .text.HAL_DMA_IRQHandler,"ax",%progbits + 844 .align 1 + 845 .global HAL_DMA_IRQHandler + 846 .syntax unified + 847 .code 16 + 848 .thumb_func + 849 .fpu softvfp + 851 HAL_DMA_IRQHandler: + 852 .LFB47: + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t flag_it = hdma->DmaBaseAddress->ISR; + 853 .loc 1 571 0 + 854 .cfi_startproc + 855 @ args = 0, pretend = 0, frame = 0 + 856 @ frame_needed = 0, uses_anonymous_args = 0 + 857 .LVL75: + 858 0000 70B5 push {r4, r5, r6, lr} + 859 .LCFI10: + 860 .cfi_def_cfa_offset 16 + 861 .cfi_offset 4, -16 + 862 .cfi_offset 5, -12 + 863 .cfi_offset 6, -8 + 864 .cfi_offset 14, -4 + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** uint32_t source_it = hdma->Instance->CCR; + 865 .loc 1 572 0 + 866 0002 C36B ldr r3, [r0, #60] + 867 0004 1A68 ldr r2, [r3] + 868 .LVL76: + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 869 .loc 1 573 0 + 870 0006 0468 ldr r4, [r0] + 871 0008 2568 ldr r5, [r4] + 872 .LVL77: + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 873 .loc 1 576 0 + 874 000a 016C ldr r1, [r0, #64] + 875 000c 0423 movs r3, #4 + 876 000e 8B40 lsls r3, r3, r1 + 877 0010 1A42 tst r2, r3 + 878 0012 12D0 beq .L52 + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 879 .loc 1 576 0 is_stmt 0 discriminator 1 + 880 0014 6B07 lsls r3, r5, #29 + 881 0016 10D5 bpl .L52 + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 882 .loc 1 579 0 is_stmt 1 + 883 0018 2368 ldr r3, [r4] + ARM GAS /tmp/ccPStHDw.s page 34 + + + 884 001a 9B06 lsls r3, r3, #26 + 885 001c 03D4 bmi .L53 + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 886 .loc 1 582 0 + 887 001e 2368 ldr r3, [r4] + 888 0020 0422 movs r2, #4 + 889 .LVL78: + 890 0022 9343 bics r3, r2 + 891 0024 2360 str r3, [r4] + 892 .L53: + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 893 .loc 1 586 0 + 894 0026 C26B ldr r2, [r0, #60] + 895 0028 0423 movs r3, #4 + 896 002a 016C ldr r1, [r0, #64] + 897 002c 8B40 lsls r3, r3, r1 + 898 002e 5360 str r3, [r2, #4] + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 899 .loc 1 591 0 + 900 0030 C36A ldr r3, [r0, #44] + 901 0032 002B cmp r3, #0 + 902 0034 00D0 beq .L51 + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 903 .loc 1 594 0 + 904 0036 9847 blx r3 + 905 .LVL79: + 906 .L51: + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 907 .loc 1 650 0 + 908 @ sp needed + 909 .LVL80: + 910 0038 70BD pop {r4, r5, r6, pc} + 911 .LVL81: + 912 .L52: + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 913 .loc 1 599 0 + 914 003a 0223 movs r3, #2 + 915 003c 8B40 lsls r3, r3, r1 + 916 003e 1A42 tst r2, r3 + 917 0040 18D0 beq .L55 + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 918 .loc 1 599 0 is_stmt 0 discriminator 1 + 919 0042 AB07 lsls r3, r5, #30 + 920 0044 16D5 bpl .L55 + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 921 .loc 1 601 0 is_stmt 1 + 922 0046 2368 ldr r3, [r4] + 923 0048 9B06 lsls r3, r3, #26 + 924 004a 06D4 bmi .L56 + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 925 .loc 1 605 0 + 926 004c 2368 ldr r3, [r4] + 927 004e 0A22 movs r2, #10 + 928 .LVL82: + 929 0050 9343 bics r3, r2 + 930 0052 2360 str r3, [r4] + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + ARM GAS /tmp/ccPStHDw.s page 35 + + + 931 .loc 1 608 0 + 932 0054 2123 movs r3, #33 + 933 0056 093A subs r2, r2, #9 + 934 0058 C254 strb r2, [r0, r3] + 935 .L56: + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 936 .loc 1 612 0 + 937 005a C26B ldr r2, [r0, #60] + 938 005c 0223 movs r3, #2 + 939 005e 016C ldr r1, [r0, #64] + 940 0060 8B40 lsls r3, r3, r1 + 941 0062 5360 str r3, [r2, #4] + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 942 .loc 1 615 0 + 943 0064 2023 movs r3, #32 + 944 0066 0022 movs r2, #0 + 945 0068 C254 strb r2, [r0, r3] + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 946 .loc 1 617 0 + 947 006a 836A ldr r3, [r0, #40] + 948 006c 002B cmp r3, #0 + 949 006e E3D0 beq .L51 + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 950 .loc 1 620 0 + 951 0070 9847 blx r3 + 952 .LVL83: + 953 0072 E1E7 b .L51 + 954 .LVL84: + 955 .L55: + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 956 .loc 1 625 0 + 957 0074 0823 movs r3, #8 + 958 0076 8B40 lsls r3, r3, r1 + 959 0078 1A42 tst r2, r3 + 960 007a DDD0 beq .L51 + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 961 .loc 1 625 0 is_stmt 0 discriminator 1 + 962 007c 2B07 lsls r3, r5, #28 + 963 007e DBD5 bpl .L51 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 964 .loc 1 630 0 is_stmt 1 + 965 0080 2368 ldr r3, [r4] + 966 0082 0E22 movs r2, #14 + 967 .LVL85: + 968 0084 9343 bics r3, r2 + 969 0086 2360 str r3, [r4] + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 970 .loc 1 633 0 + 971 0088 C26B ldr r2, [r0, #60] + 972 008a 0123 movs r3, #1 + 973 008c 1900 movs r1, r3 + 974 008e 046C ldr r4, [r0, #64] + 975 0090 A140 lsls r1, r1, r4 + 976 0092 5160 str r1, [r2, #4] + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 977 .loc 1 636 0 + 978 0094 8363 str r3, [r0, #56] + ARM GAS /tmp/ccPStHDw.s page 36 + + + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 979 .loc 1 639 0 + 980 0096 2122 movs r2, #33 + 981 0098 8354 strb r3, [r0, r2] + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 982 .loc 1 642 0 + 983 009a 1F33 adds r3, r3, #31 + 984 009c 0022 movs r2, #0 + 985 009e C254 strb r2, [r0, r3] + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 986 .loc 1 644 0 + 987 00a0 036B ldr r3, [r0, #48] + 988 00a2 002B cmp r3, #0 + 989 00a4 C8D0 beq .L51 + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 990 .loc 1 647 0 + 991 00a6 9847 blx r3 + 992 .LVL86: + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 993 .loc 1 650 0 + 994 00a8 C6E7 b .L51 + 995 .cfi_endproc + 996 .LFE47: + 998 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits + 999 .align 1 + 1000 .global HAL_DMA_RegisterCallback + 1001 .syntax unified + 1002 .code 16 + 1003 .thumb_func + 1004 .fpu softvfp + 1006 HAL_DMA_RegisterCallback: + 1007 .LFB48: + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1008 .loc 1 663 0 + 1009 .cfi_startproc + 1010 @ args = 0, pretend = 0, frame = 0 + 1011 @ frame_needed = 0, uses_anonymous_args = 0 + 1012 .LVL87: + 1013 0000 10B5 push {r4, lr} + 1014 .LCFI11: + 1015 .cfi_def_cfa_offset 8 + 1016 .cfi_offset 4, -8 + 1017 .cfi_offset 14, -4 + 1018 .LVL88: + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1019 .loc 1 667 0 + 1020 0002 2023 movs r3, #32 + 1021 0004 C35C ldrb r3, [r0, r3] + 1022 0006 012B cmp r3, #1 + 1023 0008 22D0 beq .L64 + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1024 .loc 1 667 0 is_stmt 0 discriminator 2 + 1025 000a 2023 movs r3, #32 + 1026 000c 0124 movs r4, #1 + 1027 000e C454 strb r4, [r0, r3] + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1028 .loc 1 669 0 is_stmt 1 discriminator 2 + ARM GAS /tmp/ccPStHDw.s page 37 + + + 1029 0010 0133 adds r3, r3, #1 + 1030 0012 C35C ldrb r3, [r0, r3] + 1031 0014 012B cmp r3, #1 + 1032 0016 05D0 beq .L68 + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1033 .loc 1 696 0 + 1034 0018 0123 movs r3, #1 + 1035 .L59: + 1036 .LVL89: + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1037 .loc 1 700 0 + 1038 001a 2022 movs r2, #32 + 1039 .LVL90: + 1040 001c 0021 movs r1, #0 + 1041 .LVL91: + 1042 001e 8154 strb r1, [r0, r2] + 1043 .LVL92: + 1044 .L58: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1045 .loc 1 703 0 + 1046 0020 1800 movs r0, r3 + 1047 .LVL93: + 1048 @ sp needed + 1049 0022 10BD pop {r4, pc} + 1050 .LVL94: + 1051 .L68: + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1052 .loc 1 671 0 + 1053 0024 0129 cmp r1, #1 + 1054 0026 0AD0 beq .L60 + 1055 0028 0029 cmp r1, #0 + 1056 002a 05D0 beq .L61 + 1057 002c 0229 cmp r1, #2 + 1058 002e 09D0 beq .L62 + 1059 0030 0329 cmp r1, #3 + 1060 0032 0AD0 beq .L63 + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1061 .loc 1 690 0 + 1062 0034 0123 movs r3, #1 + 1063 0036 F0E7 b .L59 + 1064 .L61: + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1065 .loc 1 674 0 + 1066 0038 8262 str r2, [r0, #40] + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1067 .loc 1 664 0 + 1068 003a 0023 movs r3, #0 + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1069 .loc 1 675 0 + 1070 003c EDE7 b .L59 + 1071 .L60: + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1072 .loc 1 678 0 + 1073 003e C262 str r2, [r0, #44] + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1074 .loc 1 664 0 + 1075 0040 0023 movs r3, #0 + ARM GAS /tmp/ccPStHDw.s page 38 + + + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1076 .loc 1 679 0 + 1077 0042 EAE7 b .L59 + 1078 .L62: + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1079 .loc 1 682 0 + 1080 0044 0263 str r2, [r0, #48] + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1081 .loc 1 664 0 + 1082 0046 0023 movs r3, #0 + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1083 .loc 1 683 0 + 1084 0048 E7E7 b .L59 + 1085 .L63: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1086 .loc 1 686 0 + 1087 004a 4263 str r2, [r0, #52] + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1088 .loc 1 664 0 + 1089 004c 0023 movs r3, #0 + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1090 .loc 1 687 0 + 1091 004e E4E7 b .L59 + 1092 .L64: + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1093 .loc 1 667 0 + 1094 0050 0223 movs r3, #2 + 1095 0052 E5E7 b .L58 + 1096 .cfi_endproc + 1097 .LFE48: + 1099 .section .text.HAL_DMA_UnRegisterCallback,"ax",%progbits + 1100 .align 1 + 1101 .global HAL_DMA_UnRegisterCallback + 1102 .syntax unified + 1103 .code 16 + 1104 .thumb_func + 1105 .fpu softvfp + 1107 HAL_DMA_UnRegisterCallback: + 1108 .LFB49: + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** HAL_StatusTypeDef status = HAL_OK; + 1109 .loc 1 714 0 + 1110 .cfi_startproc + 1111 @ args = 0, pretend = 0, frame = 0 + 1112 @ frame_needed = 0, uses_anonymous_args = 0 + 1113 @ link register save eliminated. + 1114 .LVL95: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1115 .loc 1 718 0 + 1116 0000 2023 movs r3, #32 + 1117 0002 C35C ldrb r3, [r0, r3] + 1118 0004 012B cmp r3, #1 + 1119 0006 26D0 beq .L78 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1120 .loc 1 718 0 is_stmt 0 discriminator 2 + 1121 0008 2023 movs r3, #32 + 1122 000a 0122 movs r2, #1 + 1123 000c C254 strb r2, [r0, r3] + ARM GAS /tmp/ccPStHDw.s page 39 + + + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1124 .loc 1 720 0 is_stmt 1 discriminator 2 + 1125 000e 0133 adds r3, r3, #1 + 1126 0010 C35C ldrb r3, [r0, r3] + 1127 0012 012B cmp r3, #1 + 1128 0014 05D0 beq .L81 + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1129 .loc 1 754 0 + 1130 0016 0123 movs r3, #1 + 1131 .LVL96: + 1132 .L71: + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1133 .loc 1 758 0 + 1134 0018 2022 movs r2, #32 + 1135 001a 0021 movs r1, #0 + 1136 001c 8154 strb r1, [r0, r2] + 1137 .LVL97: + 1138 .L70: + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1139 .loc 1 761 0 + 1140 001e 1800 movs r0, r3 + 1141 .LVL98: + 1142 @ sp needed + 1143 0020 7047 bx lr + 1144 .LVL99: + 1145 .L81: + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** { + 1146 .loc 1 722 0 + 1147 0022 0429 cmp r1, #4 + 1148 0024 15D8 bhi .L80 + 1149 0026 8900 lsls r1, r1, #2 + 1150 .LVL100: + 1151 0028 0C4B ldr r3, .L82 + 1152 002a 5B58 ldr r3, [r3, r1] + 1153 002c 9F46 mov pc, r3 + 1154 .section .rodata.HAL_DMA_UnRegisterCallback,"a",%progbits + 1155 .align 2 + 1156 .L73: + 1157 0000 2E000000 .word .L72 + 1158 0004 34000000 .word .L74 + 1159 0008 3A000000 .word .L75 + 1160 000c 40000000 .word .L76 + 1161 0010 46000000 .word .L77 + 1162 .section .text.HAL_DMA_UnRegisterCallback + 1163 .L72: + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1164 .loc 1 725 0 + 1165 002e 0023 movs r3, #0 + 1166 0030 8362 str r3, [r0, #40] + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1167 .loc 1 726 0 + 1168 0032 F1E7 b .L71 + 1169 .L74: + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1170 .loc 1 729 0 + 1171 0034 0023 movs r3, #0 + 1172 0036 C362 str r3, [r0, #44] + ARM GAS /tmp/ccPStHDw.s page 40 + + + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1173 .loc 1 730 0 + 1174 0038 EEE7 b .L71 + 1175 .L75: + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1176 .loc 1 733 0 + 1177 003a 0023 movs r3, #0 + 1178 003c 0363 str r3, [r0, #48] + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1179 .loc 1 734 0 + 1180 003e EBE7 b .L71 + 1181 .L76: + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1182 .loc 1 737 0 + 1183 0040 0023 movs r3, #0 + 1184 0042 4363 str r3, [r0, #52] + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1185 .loc 1 738 0 + 1186 0044 E8E7 b .L71 + 1187 .L77: + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferHalfCpltCallback = NULL; + 1188 .loc 1 741 0 + 1189 0046 0023 movs r3, #0 + 1190 0048 8362 str r3, [r0, #40] + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferErrorCallback = NULL; + 1191 .loc 1 742 0 + 1192 004a C362 str r3, [r0, #44] + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** hdma->XferAbortCallback = NULL; + 1193 .loc 1 743 0 + 1194 004c 0363 str r3, [r0, #48] + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1195 .loc 1 744 0 + 1196 004e 4363 str r3, [r0, #52] + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1197 .loc 1 745 0 + 1198 0050 E2E7 b .L71 + 1199 .LVL101: + 1200 .L80: + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** break; + 1201 .loc 1 748 0 + 1202 0052 0123 movs r3, #1 + 1203 0054 E0E7 b .L71 + 1204 .L78: + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1205 .loc 1 718 0 + 1206 0056 0223 movs r3, #2 + 1207 0058 E1E7 b .L70 + 1208 .L83: + 1209 005a C046 .align 2 + 1210 .L82: + 1211 005c 00000000 .word .L73 + 1212 .cfi_endproc + 1213 .LFE49: + 1215 .section .text.HAL_DMA_GetState,"ax",%progbits + 1216 .align 1 + 1217 .global HAL_DMA_GetState + 1218 .syntax unified + ARM GAS /tmp/ccPStHDw.s page 41 + + + 1219 .code 16 + 1220 .thumb_func + 1221 .fpu softvfp + 1223 HAL_DMA_GetState: + 1224 .LFB50: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->State; + 1225 .loc 1 790 0 + 1226 .cfi_startproc + 1227 @ args = 0, pretend = 0, frame = 0 + 1228 @ frame_needed = 0, uses_anonymous_args = 0 + 1229 @ link register save eliminated. + 1230 .LVL102: + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1231 .loc 1 791 0 + 1232 0000 2123 movs r3, #33 + 1233 0002 C05C ldrb r0, [r0, r3] + 1234 .LVL103: + 1235 0004 C0B2 uxtb r0, r0 + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1236 .loc 1 792 0 + 1237 @ sp needed + 1238 0006 7047 bx lr + 1239 .cfi_endproc + 1240 .LFE50: + 1242 .section .text.HAL_DMA_GetError,"ax",%progbits + 1243 .align 1 + 1244 .global HAL_DMA_GetError + 1245 .syntax unified + 1246 .code 16 + 1247 .thumb_func + 1248 .fpu softvfp + 1250 HAL_DMA_GetError: + 1251 .LFB51: + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** return hdma->ErrorCode; + 1252 .loc 1 801 0 + 1253 .cfi_startproc + 1254 @ args = 0, pretend = 0, frame = 0 + 1255 @ frame_needed = 0, uses_anonymous_args = 0 + 1256 @ link register save eliminated. + 1257 .LVL104: + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** } + 1258 .loc 1 802 0 + 1259 0000 806B ldr r0, [r0, #56] + 1260 .LVL105: + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_dma.c **** + 1261 .loc 1 803 0 + 1262 @ sp needed + 1263 0002 7047 bx lr + 1264 .cfi_endproc + 1265 .LFE51: + 1267 .text + 1268 .Letext0: + 1269 .file 2 "/usr/include/newlib/machine/_default_types.h" + 1270 .file 3 "/usr/include/newlib/sys/_stdint.h" + 1271 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 1272 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 1273 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + ARM GAS /tmp/ccPStHDw.s page 42 + + + 1274 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1275 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 1276 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccPStHDw.s page 43 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_dma.c + /tmp/ccPStHDw.s:16 .text.DMA_SetConfig:0000000000000000 $t + /tmp/ccPStHDw.s:22 .text.DMA_SetConfig:0000000000000000 DMA_SetConfig + /tmp/ccPStHDw.s:77 .text.DMA_CalcBaseAndBitshift:0000000000000000 $t + /tmp/ccPStHDw.s:83 .text.DMA_CalcBaseAndBitshift:0000000000000000 DMA_CalcBaseAndBitshift + /tmp/ccPStHDw.s:118 .text.DMA_CalcBaseAndBitshift:0000000000000020 $d + /tmp/ccPStHDw.s:124 .text.HAL_DMA_Init:0000000000000000 $t + /tmp/ccPStHDw.s:131 .text.HAL_DMA_Init:0000000000000000 HAL_DMA_Init + /tmp/ccPStHDw.s:213 .text.HAL_DMA_Init:000000000000004c $d + /tmp/ccPStHDw.s:218 .text.HAL_DMA_DeInit:0000000000000000 $t + /tmp/ccPStHDw.s:225 .text.HAL_DMA_DeInit:0000000000000000 HAL_DMA_DeInit + /tmp/ccPStHDw.s:302 .text.HAL_DMA_Start:0000000000000000 $t + /tmp/ccPStHDw.s:309 .text.HAL_DMA_Start:0000000000000000 HAL_DMA_Start + /tmp/ccPStHDw.s:391 .text.HAL_DMA_Start_IT:0000000000000000 $t + /tmp/ccPStHDw.s:398 .text.HAL_DMA_Start_IT:0000000000000000 HAL_DMA_Start_IT + /tmp/ccPStHDw.s:506 .text.HAL_DMA_Abort:0000000000000000 $t + /tmp/ccPStHDw.s:513 .text.HAL_DMA_Abort:0000000000000000 HAL_DMA_Abort + /tmp/ccPStHDw.s:579 .text.HAL_DMA_Abort_IT:0000000000000000 $t + /tmp/ccPStHDw.s:586 .text.HAL_DMA_Abort_IT:0000000000000000 HAL_DMA_Abort_IT + /tmp/ccPStHDw.s:661 .text.HAL_DMA_PollForTransfer:0000000000000000 $t + /tmp/ccPStHDw.s:668 .text.HAL_DMA_PollForTransfer:0000000000000000 HAL_DMA_PollForTransfer + /tmp/ccPStHDw.s:844 .text.HAL_DMA_IRQHandler:0000000000000000 $t + /tmp/ccPStHDw.s:851 .text.HAL_DMA_IRQHandler:0000000000000000 HAL_DMA_IRQHandler + /tmp/ccPStHDw.s:999 .text.HAL_DMA_RegisterCallback:0000000000000000 $t + /tmp/ccPStHDw.s:1006 .text.HAL_DMA_RegisterCallback:0000000000000000 HAL_DMA_RegisterCallback + /tmp/ccPStHDw.s:1100 .text.HAL_DMA_UnRegisterCallback:0000000000000000 $t + /tmp/ccPStHDw.s:1107 .text.HAL_DMA_UnRegisterCallback:0000000000000000 HAL_DMA_UnRegisterCallback + /tmp/ccPStHDw.s:1155 .rodata.HAL_DMA_UnRegisterCallback:0000000000000000 $d + /tmp/ccPStHDw.s:1211 .text.HAL_DMA_UnRegisterCallback:000000000000005c $d + /tmp/ccPStHDw.s:1216 .text.HAL_DMA_GetState:0000000000000000 $t + /tmp/ccPStHDw.s:1223 .text.HAL_DMA_GetState:0000000000000000 HAL_DMA_GetState + /tmp/ccPStHDw.s:1243 .text.HAL_DMA_GetError:0000000000000000 $t + /tmp/ccPStHDw.s:1250 .text.HAL_DMA_GetError:0000000000000000 HAL_DMA_GetError + +UNDEFINED SYMBOLS +__aeabi_uidiv +HAL_GetTick diff --git a/fw/midi-dials/build/stm32f0xx_hal_dma.o b/fw/midi-dials/build/stm32f0xx_hal_dma.o Binary files differnew file mode 100644 index 0000000..ee3c3f0 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_dma.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_exti.d b/fw/midi-dials/build/stm32f0xx_hal_exti.d new file mode 100644 index 0000000..f36377f --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_exti.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_exti.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_exti.lst b/fw/midi-dials/build/stm32f0xx_hal_exti.lst new file mode 100644 index 0000000..8ebc8ee --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_exti.lst @@ -0,0 +1,1373 @@ +ARM GAS /tmp/ccoU2NQy.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_exti.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_EXTI_SetConfigLine,"ax",%progbits + 16 .align 1 + 17 .global HAL_EXTI_SetConfigLine + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_EXTI_SetConfigLine: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @file stm32f0xx_hal_exti.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief EXTI HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * functionalities of the Extended Interrupts and events controller (EXTI) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @verbatim + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ============================================================================== + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ##### EXTI Peripheral features ##### + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** [..] + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) Each Exti line can be configured within this driver. + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) Exti line can be configured in 3 different modes + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Interrupt + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Event + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Both of them + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) Configurable Exti lines can be configured with 3 different triggers + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Rising + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Falling + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Both of them + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) When set in interrupt mode, configurable Exti lines have two different + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** interrupts pending registers which allow to distinguish which transition + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** occurs: + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Rising edge pending interrupt + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Falling + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + ARM GAS /tmp/ccoU2NQy.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (+) Exti lines 0 to 15 are linked to gpio pin number 0 to 15. Gpio port can + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** be selected through multiplexer. + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ##### How to use this driver ##### + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ============================================================================== + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** [..] + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Configure the EXTI line using HAL_EXTI_SetConfigLine(). + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Choose the interrupt line number by setting "Line" member from + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI_ConfigTypeDef structure. + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Configure the interrupt and/or event mode using "Mode" member from + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI_ConfigTypeDef structure. + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) For configurable lines, configure rising and/or falling trigger + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** "Trigger" member from EXTI_ConfigTypeDef structure. + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) For Exti lines linked to gpio, choose gpio port using "GPIOSel" + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** member from GPIO_InitTypeDef structure. + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Get current Exti configuration of a dedicated line using + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_EXTI_GetConfigLine(). + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide exiting handle as parameter. + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide pointer on EXTI_ConfigTypeDef structure as second parameter. + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Clear Exti configuration of a dedicated line using HAL_EXTI_GetConfigLine(). + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide exiting handle as parameter. + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Register callback to treat Exti interrupts using HAL_EXTI_RegisterCallback(). + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide exiting handle as first parameter. + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide which callback will be registered using one value from + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI_CallbackIDTypeDef. + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (++) Provide callback function pointer. + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Get interrupt pending bit using HAL_EXTI_GetPending(). + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Clear interrupt pending bit using HAL_EXTI_GetPending(). + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** (#) Generate software interrupt using HAL_EXTI_GenerateSWI(). + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @endverbatim + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ****************************************************************************** + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @attention + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * <h2><center>© Copyright (c) 2019 STMicroelectronics. + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * All rights reserved.</center></h2> + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This software component is licensed by ST under BSD 3-Clause license, + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * the "License"; You may not use this file except in compliance with the + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * License. You may obtain a copy of the License at: + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * opensource.org/licenses/BSD-3-Clause + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ****************************************************************************** + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Includes ------------------------------------------------------------------*/ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** #include "stm32f0xx_hal.h" + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup STM32F0xx_HAL_Driver + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + ARM GAS /tmp/ccoU2NQy.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup EXTI + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** MISRA C:2012 deviation rule has been granted for following rule: + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * Rule-18.1_b - Medium: Array `EXTICR' 1st subscript interval [0,7] may be out + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * of bounds [0,3] in following API : + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * HAL_EXTI_SetConfigLine + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * HAL_EXTI_GetConfigLine + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * HAL_EXTI_ClearConfigLine + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** #ifdef HAL_EXTI_MODULE_ENABLED + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private typedef -----------------------------------------------------------*/ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private defines -----------------------------------------------------------*/ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @defgroup EXTI_Private_Constants EXTI Private Constants + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @} + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private macros ------------------------------------------------------------*/ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private variables ---------------------------------------------------------*/ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Private function prototypes -----------------------------------------------*/ + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Exported functions --------------------------------------------------------*/ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group1 + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Configuration functions + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @verbatim + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ##### Configuration functions ##### + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @endverbatim + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Set configuration of a dedicated Exti line. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param pExtiConfig Pointer on EXTI configuration to be set. + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 26 .loc 1 144 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccoU2NQy.s page 4 + + + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 70B5 push {r4, r5, r6, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 4, -16 + 35 .cfi_offset 5, -12 + 36 .cfi_offset 6, -8 + 37 .cfi_offset 14, -4 + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) + 38 .loc 1 150 0 + 39 0002 0028 cmp r0, #0 + 40 0004 53D0 beq .L11 + 41 .loc 1 150 0 is_stmt 0 discriminator 1 + 42 0006 0029 cmp r1, #0 + 43 0008 53D0 beq .L12 + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(pExtiConfig->Line)); + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_MODE(pExtiConfig->Mode)); + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Assign line number to handle */ + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->Line = pExtiConfig->Line; + 44 .loc 1 160 0 is_stmt 1 + 45 000a 0B68 ldr r3, [r1] + 46 000c 0360 str r3, [r0] + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 47 .loc 1 163 0 + 48 000e 0C68 ldr r4, [r1] + 49 0010 1F22 movs r2, #31 + 50 0012 2240 ands r2, r4 + 51 .LVL1: + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 52 .loc 1 164 0 + 53 0014 0123 movs r3, #1 + 54 0016 9340 lsls r3, r3, r2 + 55 .LVL2: + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure triggers for configurable lines */ + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 56 .loc 1 167 0 + 57 0018 A001 lsls r0, r4, #6 + 58 001a 13D5 bpl .L3 + 59 .LVL3: + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_TRIGGER(pExtiConfig->Trigger)); + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + ARM GAS /tmp/ccoU2NQy.s page 5 + + + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure rising trigger */ + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_RISING) != 0x00u) + 60 .loc 1 173 0 + 61 001c 8868 ldr r0, [r1, #8] + 62 001e C007 lsls r0, r0, #31 + 63 0020 20D5 bpl .L4 + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->RTSR |= maskline; + 64 .loc 1 175 0 + 65 0022 254D ldr r5, .L15 + 66 0024 A868 ldr r0, [r5, #8] + 67 0026 1843 orrs r0, r3 + 68 0028 A860 str r0, [r5, #8] + 69 .L5: + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->RTSR &= ~maskline; + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure falling trigger */ + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Trigger & EXTI_TRIGGER_FALLING) != 0x00u) + 70 .loc 1 184 0 + 71 002a 8868 ldr r0, [r1, #8] + 72 002c 8007 lsls r0, r0, #30 + 73 002e 1ED5 bpl .L6 + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->FTSR |= maskline; + 74 .loc 1 186 0 + 75 0030 214D ldr r5, .L15 + 76 0032 E868 ldr r0, [r5, #12] + 77 0034 1843 orrs r0, r3 + 78 0036 E860 str r0, [r5, #12] + 79 .L7: + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->FTSR &= ~maskline; + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure gpio port selection in case of gpio exti line */ + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 80 .loc 1 195 0 + 81 0038 C025 movs r5, #192 + 82 003a ED04 lsls r5, r5, #19 + 83 003c 0868 ldr r0, [r1] + 84 003e 2840 ands r0, r5 + 85 0040 A842 cmp r0, r5 + 86 0042 19D0 beq .L13 + 87 .LVL4: + 88 .L3: + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PORT(pExtiConfig->GPIOSel)); + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + ARM GAS /tmp/ccoU2NQy.s page 6 + + + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure interrupt mode : read current mode */ + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_INTERRUPT) != 0x00u) + 89 .loc 1 209 0 + 90 0044 4A68 ldr r2, [r1, #4] + 91 0046 D207 lsls r2, r2, #31 + 92 0048 26D5 bpl .L8 + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->IMR |= maskline; + 93 .loc 1 211 0 + 94 004a 1B48 ldr r0, .L15 + 95 004c 0268 ldr r2, [r0] + 96 004e 1A43 orrs r2, r3 + 97 0050 0260 str r2, [r0] + 98 .L9: + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->IMR &= ~maskline; + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Configure event mode : read current mode */ + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Mask or set line */ + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u) + 99 .loc 1 220 0 + 100 0052 4A68 ldr r2, [r1, #4] + 101 0054 9207 lsls r2, r2, #30 + 102 0056 24D4 bmi .L14 + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->EMR |= maskline; + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->EMR &= ~maskline; + 103 .loc 1 226 0 + 104 0058 1749 ldr r1, .L15 + 105 .LVL5: + 106 005a 4A68 ldr r2, [r1, #4] + 107 005c 9A43 bics r2, r3 + 108 005e 4A60 str r2, [r1, #4] + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 109 .loc 1 229 0 + 110 0060 0020 movs r0, #0 + 111 .LVL6: + 112 .L2: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 113 .loc 1 230 0 + ARM GAS /tmp/ccoU2NQy.s page 7 + + + 114 @ sp needed + 115 0062 70BD pop {r4, r5, r6, pc} + 116 .LVL7: + 117 .L4: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 118 .loc 1 179 0 + 119 0064 144D ldr r5, .L15 + 120 0066 A868 ldr r0, [r5, #8] + 121 0068 9843 bics r0, r3 + 122 006a A860 str r0, [r5, #8] + 123 006c DDE7 b .L5 + 124 .L6: + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 125 .loc 1 190 0 + 126 006e 124D ldr r5, .L15 + 127 0070 E868 ldr r0, [r5, #12] + 128 0072 9843 bics r0, r3 + 129 0074 E860 str r0, [r5, #12] + 130 0076 DFE7 b .L7 + 131 .L13: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 132 .loc 1 200 0 + 133 0078 9208 lsrs r2, r2, #2 + 134 .LVL8: + 135 007a 104E ldr r6, .L15+4 + 136 007c 0232 adds r2, r2, #2 + 137 007e 9200 lsls r2, r2, #2 + 138 0080 9559 ldr r5, [r2, r6] + 139 .LVL9: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval |= (pExtiConfig->GPIOSel << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 140 .loc 1 201 0 + 141 0082 0320 movs r0, #3 + 142 0084 0440 ands r4, r0 + 143 .LVL10: + 144 0086 A400 lsls r4, r4, #2 + 145 0088 0C30 adds r0, r0, #12 + 146 008a A040 lsls r0, r0, r4 + 147 008c 8543 bics r5, r0 + 148 .LVL11: + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 149 .loc 1 202 0 + 150 008e C868 ldr r0, [r1, #12] + 151 0090 A040 lsls r0, r0, r4 + 152 0092 2843 orrs r0, r5 + 153 .LVL12: + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 154 .loc 1 203 0 + 155 0094 9051 str r0, [r2, r6] + 156 0096 D5E7 b .L3 + 157 .LVL13: + 158 .L8: + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 159 .loc 1 215 0 + 160 0098 0748 ldr r0, .L15 + 161 009a 0268 ldr r2, [r0] + 162 009c 9A43 bics r2, r3 + 163 009e 0260 str r2, [r0] + ARM GAS /tmp/ccoU2NQy.s page 8 + + + 164 00a0 D7E7 b .L9 + 165 .L14: + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 166 .loc 1 222 0 + 167 00a2 0549 ldr r1, .L15 + 168 .LVL14: + 169 00a4 4A68 ldr r2, [r1, #4] + 170 00a6 1343 orrs r3, r2 + 171 .LVL15: + 172 00a8 4B60 str r3, [r1, #4] + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 173 .loc 1 229 0 + 174 00aa 0020 movs r0, #0 + 175 00ac D9E7 b .L2 + 176 .LVL16: + 177 .L11: + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 178 .loc 1 152 0 + 179 00ae 0120 movs r0, #1 + 180 .LVL17: + 181 00b0 D7E7 b .L2 + 182 .LVL18: + 183 .L12: + 184 00b2 0120 movs r0, #1 + 185 .LVL19: + 186 00b4 D5E7 b .L2 + 187 .L16: + 188 00b6 C046 .align 2 + 189 .L15: + 190 00b8 00040140 .word 1073808384 + 191 00bc 00000140 .word 1073807360 + 192 .cfi_endproc + 193 .LFE40: + 195 .section .text.HAL_EXTI_GetConfigLine,"ax",%progbits + 196 .align 1 + 197 .global HAL_EXTI_GetConfigLine + 198 .syntax unified + 199 .code 16 + 200 .thumb_func + 201 .fpu softvfp + 203 HAL_EXTI_GetConfigLine: + 204 .LFB41: + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Get configuration of a dedicated Exti line. + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param pExtiConfig Pointer on structure to store Exti configuration. + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 205 .loc 1 239 0 + 206 .cfi_startproc + 207 @ args = 0, pretend = 0, frame = 0 + 208 @ frame_needed = 0, uses_anonymous_args = 0 + 209 .LVL20: + 210 0000 30B5 push {r4, r5, lr} + ARM GAS /tmp/ccoU2NQy.s page 9 + + + 211 .LCFI1: + 212 .cfi_def_cfa_offset 12 + 213 .cfi_offset 4, -12 + 214 .cfi_offset 5, -8 + 215 .cfi_offset 14, -4 + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti == NULL) || (pExtiConfig == NULL)) + 216 .loc 1 245 0 + 217 0002 0028 cmp r0, #0 + 218 0004 46D0 beq .L27 + 219 .loc 1 245 0 is_stmt 0 discriminator 1 + 220 0006 0029 cmp r1, #0 + 221 0008 46D0 beq .L28 + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check the parameter */ + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Store handle line number to configuration structure */ + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Line = hexti->Line; + 222 .loc 1 254 0 is_stmt 1 + 223 000a 0068 ldr r0, [r0] + 224 .LVL21: + 225 000c 0860 str r0, [r1] + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (pExtiConfig->Line & EXTI_PIN_MASK); + 226 .loc 1 257 0 + 227 000e 1F24 movs r4, #31 + 228 0010 0440 ands r4, r0 + 229 .LVL22: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 230 .loc 1 258 0 + 231 0012 0123 movs r3, #1 + 232 0014 A340 lsls r3, r3, r4 + 233 .LVL23: + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 1] Get core mode : interrupt */ + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if selected line is enable */ + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->IMR & maskline) != 0x00u) + 234 .loc 1 263 0 + 235 0016 214A ldr r2, .L30 + 236 0018 1268 ldr r2, [r2] + 237 001a 1342 tst r3, r2 + 238 001c 22D0 beq .L19 + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_INTERRUPT; + 239 .loc 1 265 0 + 240 001e 0122 movs r2, #1 + 241 0020 4A60 str r2, [r1, #4] + ARM GAS /tmp/ccoU2NQy.s page 10 + + + 242 .L20: + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Mode = EXTI_MODE_NONE; + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get event mode */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if selected line is enable */ + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->EMR & maskline) != 0x00u) + 243 .loc 1 274 0 + 244 0022 1E4A ldr r2, .L30 + 245 0024 5268 ldr r2, [r2, #4] + 246 0026 1342 tst r3, r2 + 247 0028 03D0 beq .L21 + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Mode |= EXTI_MODE_EVENT; + 248 .loc 1 276 0 + 249 002a 0222 movs r2, #2 + 250 002c 4D68 ldr r5, [r1, #4] + 251 002e 2A43 orrs r2, r5 + 252 0030 4A60 str r2, [r1, #4] + 253 .L21: + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 2] Get trigger for configurable lines : rising */ + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_CONFIG) != 0x00u) + 254 .loc 1 280 0 + 255 0032 8201 lsls r2, r0, #6 + 256 0034 29D5 bpl .L22 + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->RTSR & maskline) != 0x00u) + 257 .loc 1 283 0 + 258 0036 194A ldr r2, .L30 + 259 0038 9268 ldr r2, [r2, #8] + 260 003a 1342 tst r3, r2 + 261 003c 15D0 beq .L23 + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_RISING; + 262 .loc 1 285 0 + 263 003e 0122 movs r2, #1 + 264 0040 8A60 str r2, [r1, #8] + 265 .L24: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_NONE; + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get falling configuration */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check if configuration of selected line is enable */ + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((EXTI->FTSR & maskline) != 0x00u) + 266 .loc 1 294 0 + 267 0042 164A ldr r2, .L30 + 268 0044 D268 ldr r2, [r2, #12] + 269 0046 1342 tst r3, r2 + ARM GAS /tmp/ccoU2NQy.s page 11 + + + 270 0048 03D0 beq .L25 + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger |= EXTI_TRIGGER_FALLING; + 271 .loc 1 296 0 + 272 004a 0223 movs r3, #2 + 273 .LVL24: + 274 004c 8A68 ldr r2, [r1, #8] + 275 004e 1343 orrs r3, r2 + 276 0050 8B60 str r3, [r1, #8] + 277 .L25: + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((pExtiConfig->Line & EXTI_GPIO) == EXTI_GPIO) + 278 .loc 1 300 0 + 279 0052 C022 movs r2, #192 + 280 0054 D204 lsls r2, r2, #19 + 281 0056 1040 ands r0, r2 + 282 0058 9042 cmp r0, r2 + 283 005a 09D0 beq .L29 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = ((regval << (SYSCFG_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = 0x00u; + 284 .loc 1 309 0 + 285 005c 0023 movs r3, #0 + 286 005e CB60 str r3, [r1, #12] + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* No Trigger selected */ + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->Trigger = EXTI_TRIGGER_NONE; + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = 0x00u; + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 287 .loc 1 319 0 + 288 0060 0020 movs r0, #0 + 289 0062 16E0 b .L18 + 290 .LVL25: + 291 .L19: + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 292 .loc 1 269 0 + 293 0064 0022 movs r2, #0 + 294 0066 4A60 str r2, [r1, #4] + 295 0068 DBE7 b .L20 + 296 .L23: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 297 .loc 1 289 0 + 298 006a 0022 movs r2, #0 + 299 006c 8A60 str r2, [r1, #8] + ARM GAS /tmp/ccoU2NQy.s page 12 + + + 300 006e E8E7 b .L24 + 301 .LVL26: + 302 .L29: + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = ((regval << (SYSCFG_EXTICR1_EXTI1_Pos * (3uL - (linepos & 0x03u)))) >> + 303 .loc 1 304 0 + 304 0070 A308 lsrs r3, r4, #2 + 305 0072 0233 adds r3, r3, #2 + 306 0074 9B00 lsls r3, r3, #2 + 307 0076 0A4A ldr r2, .L30+4 + 308 0078 9B58 ldr r3, [r3, r2] + 309 .LVL27: + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 310 .loc 1 305 0 + 311 007a 0322 movs r2, #3 + 312 007c A243 bics r2, r4 + 313 007e 9200 lsls r2, r2, #2 + 314 0080 9340 lsls r3, r3, r2 + 315 .LVL28: + 316 0082 1B0E lsrs r3, r3, #24 + 317 0084 CB60 str r3, [r1, #12] + 318 .loc 1 319 0 + 319 0086 0020 movs r0, #0 + 320 0088 03E0 b .L18 + 321 .LVL29: + 322 .L22: + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** pExtiConfig->GPIOSel = 0x00u; + 323 .loc 1 315 0 + 324 008a 0023 movs r3, #0 + 325 .LVL30: + 326 008c 8B60 str r3, [r1, #8] + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 327 .loc 1 316 0 + 328 008e CB60 str r3, [r1, #12] + 329 .loc 1 319 0 + 330 0090 0020 movs r0, #0 + 331 .LVL31: + 332 .L18: + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 333 .loc 1 320 0 + 334 @ sp needed + 335 0092 30BD pop {r4, r5, pc} + 336 .LVL32: + 337 .L27: + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 338 .loc 1 247 0 + 339 0094 0120 movs r0, #1 + 340 .LVL33: + 341 0096 FCE7 b .L18 + 342 .LVL34: + 343 .L28: + 344 0098 0120 movs r0, #1 + 345 .LVL35: + 346 009a FAE7 b .L18 + 347 .L31: + 348 .align 2 + 349 .L30: + 350 009c 00040140 .word 1073808384 + ARM GAS /tmp/ccoU2NQy.s page 13 + + + 351 00a0 00000140 .word 1073807360 + 352 .cfi_endproc + 353 .LFE41: + 355 .section .text.HAL_EXTI_ClearConfigLine,"ax",%progbits + 356 .align 1 + 357 .global HAL_EXTI_ClearConfigLine + 358 .syntax unified + 359 .code 16 + 360 .thumb_func + 361 .fpu softvfp + 363 HAL_EXTI_ClearConfigLine: + 364 .LFB42: + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Clear whole configuration of a dedicated Exti line. + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti) + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 365 .loc 1 328 0 + 366 .cfi_startproc + 367 @ args = 0, pretend = 0, frame = 0 + 368 @ frame_needed = 0, uses_anonymous_args = 0 + 369 .LVL36: + 370 0000 30B5 push {r4, r5, lr} + 371 .LCFI2: + 372 .cfi_def_cfa_offset 12 + 373 .cfi_offset 4, -12 + 374 .cfi_offset 5, -8 + 375 .cfi_offset 14, -4 + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (hexti == NULL) + 376 .loc 1 334 0 + 377 0002 0028 cmp r0, #0 + 378 0004 2CD0 beq .L34 + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check the parameter */ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* compute line mask */ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 379 .loc 1 343 0 + 380 0006 0568 ldr r5, [r0] + 381 0008 1F22 movs r2, #31 + 382 000a 2A40 ands r2, r5 + 383 .LVL37: + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 384 .loc 1 344 0 + 385 000c 0123 movs r3, #1 + ARM GAS /tmp/ccoU2NQy.s page 14 + + + 386 000e 9340 lsls r3, r3, r2 + 387 .LVL38: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 1] Clear interrupt mode */ + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->IMR = (EXTI->IMR & ~maskline); + 388 .loc 1 347 0 + 389 0010 1549 ldr r1, .L38 + 390 0012 0C68 ldr r4, [r1] + 391 0014 DB43 mvns r3, r3 + 392 .LVL39: + 393 0016 1C40 ands r4, r3 + 394 0018 0C60 str r4, [r1] + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 2] Clear event mode */ + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->EMR = (EXTI->EMR & ~maskline); + 395 .loc 1 350 0 + 396 001a 4C68 ldr r4, [r1, #4] + 397 001c 1C40 ands r4, r3 + 398 001e 4C60 str r4, [r1, #4] + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* 3] Clear triggers in case of configurable lines */ + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti->Line & EXTI_CONFIG) != 0x00u) + 399 .loc 1 353 0 + 400 0020 0168 ldr r1, [r0] + 401 0022 8901 lsls r1, r1, #6 + 402 0024 1ED5 bpl .L35 + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->RTSR = (EXTI->RTSR & ~maskline); + 403 .loc 1 355 0 + 404 0026 1049 ldr r1, .L38 + 405 0028 8C68 ldr r4, [r1, #8] + 406 002a 1C40 ands r4, r3 + 407 002c 8C60 str r4, [r1, #8] + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->FTSR = (EXTI->FTSR & ~maskline); + 408 .loc 1 356 0 + 409 002e CC68 ldr r4, [r1, #12] + 410 0030 2340 ands r3, r4 + 411 .LVL40: + 412 0032 CB60 str r3, [r1, #12] + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get Gpio port selection for gpio lines */ + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if ((hexti->Line & EXTI_GPIO) == EXTI_GPIO) + 413 .loc 1 359 0 + 414 0034 0368 ldr r3, [r0] + 415 0036 C021 movs r1, #192 + 416 0038 C904 lsls r1, r1, #19 + 417 003a 0B40 ands r3, r1 + 418 003c 8B42 cmp r3, r1 + 419 003e 01D0 beq .L37 + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_GPIO_PIN(linepos)); + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = SYSCFG->EXTICR[linepos >> 2u]; + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + ARM GAS /tmp/ccoU2NQy.s page 15 + + + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 420 .loc 1 369 0 + 421 0040 0020 movs r0, #0 + 422 .LVL41: + 423 0042 10E0 b .L33 + 424 .LVL42: + 425 .L37: + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval &= ~(SYSCFG_EXTICR1_EXTI0 << (SYSCFG_EXTICR1_EXTI1_Pos * (linepos & 0x03u))); + 426 .loc 1 363 0 + 427 0044 9208 lsrs r2, r2, #2 + 428 .LVL43: + 429 0046 0948 ldr r0, .L38+4 + 430 .LVL44: + 431 0048 0232 adds r2, r2, #2 + 432 004a 9200 lsls r2, r2, #2 + 433 004c 1158 ldr r1, [r2, r0] + 434 .LVL45: + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** SYSCFG->EXTICR[linepos >> 2u] = regval; + 435 .loc 1 364 0 + 436 004e 0323 movs r3, #3 + 437 0050 1D40 ands r5, r3 + 438 .LVL46: + 439 0052 AD00 lsls r5, r5, #2 + 440 0054 0C33 adds r3, r3, #12 + 441 0056 AB40 lsls r3, r3, r5 + 442 0058 9943 bics r1, r3 + 443 .LVL47: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 444 .loc 1 365 0 + 445 005a 1150 str r1, [r2, r0] + 446 .loc 1 369 0 + 447 005c 0020 movs r0, #0 + 448 005e 02E0 b .L33 + 449 .LVL48: + 450 .L34: + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 451 .loc 1 336 0 + 452 0060 0120 movs r0, #1 + 453 .LVL49: + 454 0062 00E0 b .L33 + 455 .LVL50: + 456 .L35: + 457 .loc 1 369 0 + 458 0064 0020 movs r0, #0 + 459 .LVL51: + 460 .L33: + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 461 .loc 1 370 0 + 462 @ sp needed + 463 0066 30BD pop {r4, r5, pc} + 464 .L39: + 465 .align 2 + 466 .L38: + 467 0068 00040140 .word 1073808384 + 468 006c 00000140 .word 1073807360 + 469 .cfi_endproc + ARM GAS /tmp/ccoU2NQy.s page 16 + + + 470 .LFE42: + 472 .section .text.HAL_EXTI_RegisterCallback,"ax",%progbits + 473 .align 1 + 474 .global HAL_EXTI_RegisterCallback + 475 .syntax unified + 476 .code 16 + 477 .thumb_func + 478 .fpu softvfp + 480 HAL_EXTI_RegisterCallback: + 481 .LFB43: + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Register callback for a dedicated Exti line. + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param CallbackID User callback identifier. + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be one of @arg @ref EXTI_CallbackIDTypeDef values. + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param pPendingCbfn function pointer to be stored as callback. + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef Callb + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 482 .loc 1 381 0 + 483 .cfi_startproc + 484 @ args = 0, pretend = 0, frame = 0 + 485 @ frame_needed = 0, uses_anonymous_args = 0 + 486 @ link register save eliminated. + 487 .LVL52: + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef status = HAL_OK; + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** switch (CallbackID) + 488 .loc 1 384 0 + 489 0000 0029 cmp r1, #0 + 490 0002 02D1 bne .L44 + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** case HAL_EXTI_COMMON_CB_ID: + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->PendingCallback = pPendingCbfn; + 491 .loc 1 387 0 + 492 0004 4260 str r2, [r0, #4] + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef status = HAL_OK; + 493 .loc 1 382 0 + 494 0006 0020 movs r0, #0 + 495 .LVL53: + 496 .L41: + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** default: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** status = HAL_ERROR; + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return status; + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 497 .loc 1 396 0 + 498 @ sp needed + 499 0008 7047 bx lr + 500 .LVL54: + 501 .L44: + ARM GAS /tmp/ccoU2NQy.s page 17 + + + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** break; + 502 .loc 1 391 0 + 503 000a 0120 movs r0, #1 + 504 .LVL55: + 505 000c FCE7 b .L41 + 506 .cfi_endproc + 507 .LFE43: + 509 .section .text.HAL_EXTI_GetHandle,"ax",%progbits + 510 .align 1 + 511 .global HAL_EXTI_GetHandle + 512 .syntax unified + 513 .code 16 + 514 .thumb_func + 515 .fpu softvfp + 517 HAL_EXTI_GetHandle: + 518 .LFB44: + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Store line number as handle private field. + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param ExtiLine Exti line number. + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be from 0 to @ref EXTI_LINE_NB. + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval HAL Status. + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine) + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 519 .loc 1 406 0 + 520 .cfi_startproc + 521 @ args = 0, pretend = 0, frame = 0 + 522 @ frame_needed = 0, uses_anonymous_args = 0 + 523 @ link register save eliminated. + 524 .LVL56: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check the parameters */ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(ExtiLine)); + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check null pointer */ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (hexti == NULL) + 525 .loc 1 411 0 + 526 0000 0028 cmp r0, #0 + 527 0002 02D0 beq .L47 + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_ERROR; + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** else + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Store line number as handle private field */ + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->Line = ExtiLine; + 528 .loc 1 418 0 + 529 0004 0160 str r1, [r0] + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return HAL_OK; + 530 .loc 1 420 0 + 531 0006 0020 movs r0, #0 + 532 .LVL57: + 533 .L46: + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + ARM GAS /tmp/ccoU2NQy.s page 18 + + + 534 .loc 1 422 0 + 535 @ sp needed + 536 0008 7047 bx lr + 537 .LVL58: + 538 .L47: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 539 .loc 1 413 0 + 540 000a 0120 movs r0, #1 + 541 .LVL59: + 542 000c FCE7 b .L46 + 543 .cfi_endproc + 544 .LFE44: + 546 .section .text.HAL_EXTI_IRQHandler,"ax",%progbits + 547 .align 1 + 548 .global HAL_EXTI_IRQHandler + 549 .syntax unified + 550 .code 16 + 551 .thumb_func + 552 .fpu softvfp + 554 HAL_EXTI_IRQHandler: + 555 .LFB45: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @} + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** @addtogroup EXTI_Exported_Functions_Group2 + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief EXTI IO functions. + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @verbatim + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** ##### IO operation functions ##### + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** =============================================================================== + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** @endverbatim + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @{ + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Handle EXTI interrupt request. + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval none. + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti) + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 556 .loc 1 446 0 + 557 .cfi_startproc + 558 @ args = 0, pretend = 0, frame = 0 + 559 @ frame_needed = 0, uses_anonymous_args = 0 + 560 .LVL60: + 561 0000 10B5 push {r4, lr} + 562 .LCFI3: + 563 .cfi_def_cfa_offset 8 + 564 .cfi_offset 4, -8 + 565 .cfi_offset 14, -4 + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + ARM GAS /tmp/ccoU2NQy.s page 19 + + + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 566 .loc 1 451 0 + 567 0002 1F22 movs r2, #31 + 568 0004 0368 ldr r3, [r0] + 569 0006 1A40 ands r2, r3 + 570 0008 0123 movs r3, #1 + 571 000a 9340 lsls r3, r3, r2 + 572 .LVL61: + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Get pending bit */ + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = (EXTI->PR & maskline); + 573 .loc 1 454 0 + 574 000c 054A ldr r2, .L50 + 575 000e 5269 ldr r2, [r2, #20] + 576 .LVL62: + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (regval != 0x00u) + 577 .loc 1 455 0 + 578 0010 1342 tst r3, r2 + 579 0012 05D0 beq .L48 + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Clear pending bit */ + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->PR = maskline; + 580 .loc 1 458 0 + 581 0014 034A ldr r2, .L50 + 582 .LVL63: + 583 0016 5361 str r3, [r2, #20] + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Call callback */ + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** if (hexti->PendingCallback != NULL) + 584 .loc 1 461 0 + 585 0018 4368 ldr r3, [r0, #4] + 586 .LVL64: + 587 001a 002B cmp r3, #0 + 588 001c 00D0 beq .L48 + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** hexti->PendingCallback(); + 589 .loc 1 463 0 + 590 001e 9847 blx r3 + 591 .LVL65: + 592 .L48: + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 593 .loc 1 466 0 + 594 @ sp needed + 595 0020 10BD pop {r4, pc} + 596 .L51: + 597 0022 C046 .align 2 + 598 .L50: + 599 0024 00040140 .word 1073808384 + 600 .cfi_endproc + 601 .LFE45: + 603 .section .text.HAL_EXTI_GetPending,"ax",%progbits + 604 .align 1 + 605 .global HAL_EXTI_GetPending + ARM GAS /tmp/ccoU2NQy.s page 20 + + + 606 .syntax unified + 607 .code 16 + 608 .thumb_func + 609 .fpu softvfp + 611 HAL_EXTI_GetPending: + 612 .LFB46: + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Get interrupt pending bit of a dedicated line. + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param Edge Specify which pending edge as to be checked. + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be one of the following values: + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval 1 if interrupt is pending else 0. + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 613 .loc 1 478 0 + 614 .cfi_startproc + 615 @ args = 0, pretend = 0, frame = 0 + 616 @ frame_needed = 0, uses_anonymous_args = 0 + 617 @ link register save eliminated. + 618 .LVL66: + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t regval; + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t linepos; + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** linepos = (hexti->Line & EXTI_PIN_MASK); + 619 .loc 1 489 0 + 620 0000 0268 ldr r2, [r0] + 621 0002 1F23 movs r3, #31 + 622 0004 1340 ands r3, r2 + 623 .LVL67: + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << linepos); + 624 .loc 1 490 0 + 625 0006 0120 movs r0, #1 + 626 .LVL68: + 627 0008 9840 lsls r0, r0, r3 + 628 .LVL69: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* return 1 if bit is set else 0 */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** regval = ((EXTI->PR & maskline) >> linepos); + 629 .loc 1 493 0 + 630 000a 024A ldr r2, .L53 + 631 000c 5269 ldr r2, [r2, #20] + 632 000e 1040 ands r0, r2 + 633 .LVL70: + 634 0010 D840 lsrs r0, r0, r3 + 635 .LVL71: + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** return regval; + ARM GAS /tmp/ccoU2NQy.s page 21 + + + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 636 .loc 1 495 0 + 637 @ sp needed + 638 0012 7047 bx lr + 639 .L54: + 640 .align 2 + 641 .L53: + 642 0014 00040140 .word 1073808384 + 643 .cfi_endproc + 644 .LFE46: + 646 .section .text.HAL_EXTI_ClearPending,"ax",%progbits + 647 .align 1 + 648 .global HAL_EXTI_ClearPending + 649 .syntax unified + 650 .code 16 + 651 .thumb_func + 652 .fpu softvfp + 654 HAL_EXTI_ClearPending: + 655 .LFB47: + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Clear interrupt pending bit of a dedicated line. + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param Edge Specify which pending edge as to be clear. + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter can be one of the following values: + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @arg @ref EXTI_TRIGGER_RISING_FALLING + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * This parameter is kept for compatibility with other series. + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval None. + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge) + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 656 .loc 1 507 0 + 657 .cfi_startproc + 658 @ args = 0, pretend = 0, frame = 0 + 659 @ frame_needed = 0, uses_anonymous_args = 0 + 660 @ link register save eliminated. + 661 .LVL72: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_PENDING_EDGE(Edge)); + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 662 .loc 1 516 0 + 663 0000 0368 ldr r3, [r0] + 664 0002 1F22 movs r2, #31 + 665 0004 1A40 ands r2, r3 + 666 0006 0123 movs r3, #1 + 667 0008 9340 lsls r3, r3, r2 + 668 .LVL73: + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Clear Pending bit */ + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->PR = maskline; + 669 .loc 1 519 0 + ARM GAS /tmp/ccoU2NQy.s page 22 + + + 670 000a 014A ldr r2, .L56 + 671 000c 5361 str r3, [r2, #20] + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + 672 .loc 1 520 0 + 673 @ sp needed + 674 000e 7047 bx lr + 675 .L57: + 676 .align 2 + 677 .L56: + 678 0010 00040140 .word 1073808384 + 679 .cfi_endproc + 680 .LFE47: + 682 .section .text.HAL_EXTI_GenerateSWI,"ax",%progbits + 683 .align 1 + 684 .global HAL_EXTI_GenerateSWI + 685 .syntax unified + 686 .code 16 + 687 .thumb_func + 688 .fpu softvfp + 690 HAL_EXTI_GenerateSWI: + 691 .LFB48: + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /** + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @brief Generate a software interrupt for a dedicated line. + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @param hexti Exti handle. + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** * @retval None. + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** */ + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti) + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** { + 692 .loc 1 528 0 + 693 .cfi_startproc + 694 @ args = 0, pretend = 0, frame = 0 + 695 @ frame_needed = 0, uses_anonymous_args = 0 + 696 @ link register save eliminated. + 697 .LVL74: + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** uint32_t maskline; + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Check parameters */ + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_LINE(hexti->Line)); + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** assert_param(IS_EXTI_CONFIG_LINE(hexti->Line)); + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Compute line mask */ + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** maskline = (1uL << (hexti->Line & EXTI_PIN_MASK)); + 698 .loc 1 536 0 + 699 0000 0368 ldr r3, [r0] + 700 0002 1F22 movs r2, #31 + 701 0004 1A40 ands r2, r3 + 702 0006 0123 movs r3, #1 + 703 0008 9340 lsls r3, r3, r2 + 704 .LVL75: + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** /* Generate Software interrupt */ + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** EXTI->SWIER = maskline; + 705 .loc 1 539 0 + 706 000a 014A ldr r2, .L59 + 707 000c 1361 str r3, [r2, #16] + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_exti.c **** } + ARM GAS /tmp/ccoU2NQy.s page 23 + + + 708 .loc 1 540 0 + 709 @ sp needed + 710 000e 7047 bx lr + 711 .L60: + 712 .align 2 + 713 .L59: + 714 0010 00040140 .word 1073808384 + 715 .cfi_endproc + 716 .LFE48: + 718 .text + 719 .Letext0: + 720 .file 2 "/usr/include/newlib/machine/_default_types.h" + 721 .file 3 "/usr/include/newlib/sys/_stdint.h" + 722 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 723 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 724 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 725 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h" + 726 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccoU2NQy.s page 24 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_exti.c + /tmp/ccoU2NQy.s:16 .text.HAL_EXTI_SetConfigLine:0000000000000000 $t + /tmp/ccoU2NQy.s:23 .text.HAL_EXTI_SetConfigLine:0000000000000000 HAL_EXTI_SetConfigLine + /tmp/ccoU2NQy.s:190 .text.HAL_EXTI_SetConfigLine:00000000000000b8 $d + /tmp/ccoU2NQy.s:196 .text.HAL_EXTI_GetConfigLine:0000000000000000 $t + /tmp/ccoU2NQy.s:203 .text.HAL_EXTI_GetConfigLine:0000000000000000 HAL_EXTI_GetConfigLine + /tmp/ccoU2NQy.s:350 .text.HAL_EXTI_GetConfigLine:000000000000009c $d + /tmp/ccoU2NQy.s:356 .text.HAL_EXTI_ClearConfigLine:0000000000000000 $t + /tmp/ccoU2NQy.s:363 .text.HAL_EXTI_ClearConfigLine:0000000000000000 HAL_EXTI_ClearConfigLine + /tmp/ccoU2NQy.s:467 .text.HAL_EXTI_ClearConfigLine:0000000000000068 $d + /tmp/ccoU2NQy.s:473 .text.HAL_EXTI_RegisterCallback:0000000000000000 $t + /tmp/ccoU2NQy.s:480 .text.HAL_EXTI_RegisterCallback:0000000000000000 HAL_EXTI_RegisterCallback + /tmp/ccoU2NQy.s:510 .text.HAL_EXTI_GetHandle:0000000000000000 $t + /tmp/ccoU2NQy.s:517 .text.HAL_EXTI_GetHandle:0000000000000000 HAL_EXTI_GetHandle + /tmp/ccoU2NQy.s:547 .text.HAL_EXTI_IRQHandler:0000000000000000 $t + /tmp/ccoU2NQy.s:554 .text.HAL_EXTI_IRQHandler:0000000000000000 HAL_EXTI_IRQHandler + /tmp/ccoU2NQy.s:599 .text.HAL_EXTI_IRQHandler:0000000000000024 $d + /tmp/ccoU2NQy.s:604 .text.HAL_EXTI_GetPending:0000000000000000 $t + /tmp/ccoU2NQy.s:611 .text.HAL_EXTI_GetPending:0000000000000000 HAL_EXTI_GetPending + /tmp/ccoU2NQy.s:642 .text.HAL_EXTI_GetPending:0000000000000014 $d + /tmp/ccoU2NQy.s:647 .text.HAL_EXTI_ClearPending:0000000000000000 $t + /tmp/ccoU2NQy.s:654 .text.HAL_EXTI_ClearPending:0000000000000000 HAL_EXTI_ClearPending + /tmp/ccoU2NQy.s:678 .text.HAL_EXTI_ClearPending:0000000000000010 $d + /tmp/ccoU2NQy.s:683 .text.HAL_EXTI_GenerateSWI:0000000000000000 $t + /tmp/ccoU2NQy.s:690 .text.HAL_EXTI_GenerateSWI:0000000000000000 HAL_EXTI_GenerateSWI + /tmp/ccoU2NQy.s:714 .text.HAL_EXTI_GenerateSWI:0000000000000010 $d + +NO UNDEFINED SYMBOLS diff --git a/fw/midi-dials/build/stm32f0xx_hal_exti.o b/fw/midi-dials/build/stm32f0xx_hal_exti.o Binary files differnew file mode 100644 index 0000000..6bd1393 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_exti.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_flash.d b/fw/midi-dials/build/stm32f0xx_hal_flash.d new file mode 100644 index 0000000..fd9a7c1 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_flash.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_flash.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_flash.lst b/fw/midi-dials/build/stm32f0xx_hal_flash.lst new file mode 100644 index 0000000..cd6fd41 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_flash.lst @@ -0,0 +1,1966 @@ +ARM GAS /tmp/cciaBHKP.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_flash.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.FLASH_Program_HalfWord,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 FLASH_Program_HalfWord: + 23 .LFB51: + 24 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @file stm32f0xx_hal_flash.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * functionalities of the internal FLASH memory: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + Program operations functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + Memory Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + Peripheral State functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ============================================================================== + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### FLASH peripheral features ##### + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ============================================================================== + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] The Flash memory interface manages CPU AHB I-Code and D-Code accesses + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** to the Flash memory. It implements the erase and program Flash memory operations + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** and the read and write protection mechanisms. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] The Flash memory interface accelerates code execution with a system of instruction + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** prefetch. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] The FLASH main features are: + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Flash memory read operations + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Flash memory program/erase operations + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Read / write protections + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Prefetch on I-Code + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Option Bytes programming + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### How to use this driver ##### + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ============================================================================== + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** This driver provides functions and macros to configure and program the FLASH + ARM GAS /tmp/cciaBHKP.s page 2 + + + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** memory of all STM32F0xx devices. + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (#) FLASH Memory I/O Programming functions: this group includes all needed + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** functions to erase and program the main memory: + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Lock and Unlock the FLASH interface + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Erase function: Erase page, erase all pages + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Program functions: half word, word and doubleword + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (#) FLASH Option Bytes Programming functions: this group includes all needed + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** functions to manage the Option Bytes: + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Lock and Unlock the Option Bytes + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Set/Reset the write protection + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Set the Read protection Level + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Program the user Option Bytes + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Launch the Option Bytes loader + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Erase Option Bytes + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Program the data Option Bytes + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Get the Write protection. + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Get the user option bytes. + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (#) Interrupts and flags management functions : this group + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** includes all needed functions to: + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Handle FLASH interrupts + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Wait for last FLASH operation according to its status + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (++) Get error flag status + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] In addition to these function, this driver includes a set of macros allowing + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** to handle the following operations: + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Set/Get the latency + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Enable/Disable the prefetch buffer + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Enable/Disable the FLASH interrupts + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** (+) Monitor the FLASH flags status + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ****************************************************************************** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @attention + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * All rights reserved.</center></h2> + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This software component is licensed by ST under BSD 3-Clause license, + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * the "License"; You may not use this file except in compliance with the + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * License. You may obtain a copy of the License at: + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * opensource.org/licenses/BSD-3-Clause + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ****************************************************************************** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Includes ------------------------------------------------------------------*/ + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** #include "stm32f0xx_hal.h" + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @addtogroup STM32F0xx_HAL_Driver + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cciaBHKP.s page 3 + + + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH FLASH + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH HAL module driver + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private typedef -----------------------------------------------------------*/ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private define ------------------------------------------------------------*/ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Constants FLASH Private Constants + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private macro ---------------------------- ---------------------------------*/ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Macros FLASH Private Macros + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private variables ---------------------------------------------------------*/ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Variables FLASH Private Variables + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Variables used for Erase pages under interruption*/ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_ProcessTypeDef pFlash; + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Private function prototypes -----------------------------------------------*/ + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Private_Functions FLASH Private Functions + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data); + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_SetErrorCode(void); + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** extern void FLASH_PageErase(uint32_t PageAddress); + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Exported functions ---------------------------------------------------------*/ + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions FLASH Exported Functions + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group1 Programming operation functions + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Programming operation functions + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cciaBHKP.s page 4 + + + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * the erase operation is performed before the program one. + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note FLASH should be previously erased before new programming (only exception to this + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * is when 0x0000 is programmed) + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t index = 0U; + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint8_t nbiterations = 0U; + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Locked */ + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check the parameters */ + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for last operation to be completed */ + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(status == HAL_OK) + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** nbiterations = 1U; + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit = 2*16-bit) at a specified address. */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** nbiterations = 2U; + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit = 4*16-bit) at a specified address. */ + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** nbiterations = 4U; + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** for (index = 0U; index < nbiterations; index++) + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index))); + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for last operation to be completed */ + ARM GAS /tmp/cciaBHKP.s page 5 + + + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE); + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* If the program operation is completed, disable the PG Bit */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (status != HAL_OK) + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** break; + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Unlocked */ + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return status; + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Program halfword, word or double word at a specified address with interrupt enabled. + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note The function HAL_FLASH_Unlock() should be called before to unlock the FLASH interface + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * The function HAL_FLASH_Lock() should be called after to lock the FLASH interface + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note If an erase and a program operations are requested simultaneously, + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * the erase operation is performed before the program one. + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param TypeProgram Indicate the way to program at a specified address. + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * This parameter can be a value of @ref FLASH_Type_Program + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Address Specifie the address to be programmed. + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Data Specifie the data to be programmed + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL_StatusTypeDef HAL Status + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t Address, uint64_t Data) + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Locked */ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_LOCK(&pFlash); + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check the parameters */ + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_TYPEPROGRAM(TypeProgram)); + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(Address)); + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = Address; + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = Data; + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD) + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMHALFWORD; + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining = 1U; + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if(TypeProgram == FLASH_TYPEPROGRAM_WORD) + ARM GAS /tmp/cciaBHKP.s page 6 + + + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMWORD; + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining = 2U; + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PROGRAMDOUBLEWORD; + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining = 4U; + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_Program_HalfWord(Address, (uint16_t)Data); + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return status; + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief This function handles FLASH interrupt request. + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval None + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** void HAL_FLASH_IRQHandler(void) + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t addresstmp = 0U; + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check FLASH operation error flags */ + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Return the faulty address */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset address */ + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Save the Error code */ + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_SetErrorCode(); + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH error interrupt user callback */ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_OperationErrorCallback(addresstmp); + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Stop the procedure ongoing */ + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process can continue only if no error detected */ + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_PAGEERASE) + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Nb of pages to erased can be decreased */ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining--; + ARM GAS /tmp/cciaBHKP.s page 7 + + + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check if there are still pages to erase */ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Increment sector number*/ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address + FLASH_PAGE_SIZE; + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* If the erase operation is completed, disable the PER Bit */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_PageErase(addresstmp); + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* No more pages to Erase, user callback can be called. */ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset Sector and stop Erase pages procedure */ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp = 0xFFFFFFFFU; + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(addresstmp); + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if(pFlash.ProcedureOnGoing == FLASH_PROC_MASSERASE) + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Operation is completed, disable the MER Bit */ + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* MassErase ended. Return the selected bank */ + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(0); + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Stop Mass Erase procedure*/ + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Nb of 16-bit data to program can be decreased */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.DataRemaining--; + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check if there are still 16-bit data to program */ + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.DataRemaining != 0U) + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Increment address to 16-bit */ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address += 2; + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Shift to have next 16-bit data */ + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = (pFlash.Data >> 16U); + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Operation is completed, disable the PG Bit */ + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PG); + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + ARM GAS /tmp/cciaBHKP.s page 8 + + + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Program halfword (16-bit) at a specified address.*/ + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_Program_HalfWord(addresstmp, (uint16_t)pFlash.Data); + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program ended. Return the selected address */ + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMHALFWORD) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address); + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else if (pFlash.ProcedureOnGoing == FLASH_PROC_PROGRAMWORD) + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 2U); + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_FLASH_EndOfOperationCallback(pFlash.Address - 6U); + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset Address and stop Program procedure */ + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = 0xFFFFFFFFU; + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(pFlash.ProcedureOnGoing == FLASH_PROC_NONE) + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Operation is completed, disable the PG, PER and MER Bits */ + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, (FLASH_CR_PG | FLASH_CR_PER | FLASH_CR_MER)); + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Disable End of FLASH Operation and Error source interrupts */ + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_DISABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Process Unlocked */ + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_UNLOCK(&pFlash); + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH end of operation interrupt callback + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Mass Erase: No return value expected + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Pages Erase: Address of the page which has been erased + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * (if 0xFFFFFFFF, it means that all the selected pages have been erased) + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Program: Address which was selected for data program + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval none + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue) + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** UNUSED(ReturnValue); + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + ARM GAS /tmp/cciaBHKP.s page 9 + + + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** the HAL_FLASH_EndOfOperationCallback could be implemented in the user file + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief FLASH operation error interrupt callback + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param ReturnValue The value saved in this parameter depends on the ongoing procedure + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Mass Erase: No return value expected + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Pages Erase: Address of the page which returned an error + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * - Program: Address which was selected for data program + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval none + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __weak void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue) + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** UNUSED(ReturnValue); + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** the HAL_FLASH_OperationErrorCallback could be implemented in the user file + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group2 Peripheral Control functions + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief management functions + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### Peripheral Control functions ##### + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** This subsection provides a set of functions allowing to control the FLASH + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** memory operations. + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Unlock the FLASH control register access + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Unlock(void) + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Authorize the FLASH Registers access */ + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY1); + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Verify Flash is unlocked */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET) + ARM GAS /tmp/cciaBHKP.s page 10 + + + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** status = HAL_ERROR; + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return status; + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Locks the FLASH control register access + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_Lock(void) + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_LOCK); + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Unlock the FLASH Option Control Registers access. + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void) + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Authorizes the Option Byte register programming */ + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY1); + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** else + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_ERROR; + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Lock the FLASH Option Control Registers access. + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Lock(void) + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTWRE); + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Launch the option byte loading. + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @note This function will reset automatically the MCU. + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + ARM GAS /tmp/cciaBHKP.s page 11 + + + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef HAL_FLASH_OB_Launch(void) + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_OBL_LAUNCH); + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for last operation to be completed */ + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return(FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE)); + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @defgroup FLASH_Exported_Functions_Group3 Peripheral errors functions + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Peripheral errors functions + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @verbatim + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** ##### Peripheral Errors functions ##### + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** =============================================================================== + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** [..] + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** This subsection permit to get in run-time errors of the FLASH peripheral. + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** @endverbatim + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Get the specific FLASH error flag. + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval FLASH_ErrorCode The returned value can be: + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @ref FLASH_Error_Codes + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t HAL_FLASH_GetError(void) + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return pFlash.ErrorCode; + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @} + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** @addtogroup FLASH_Private_Functions + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @{ + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Program a half-word (16-bit) at a specified address. + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Address specify the address to be programmed. + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Data specify the data to be programmed. + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval None + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data) + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + ARM GAS /tmp/cciaBHKP.s page 12 + + + 25 .loc 1 604 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 0 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 .LVL0: + 30 0000 10B5 push {r4, lr} + 31 .LCFI0: + 32 .cfi_def_cfa_offset 8 + 33 .cfi_offset 4, -8 + 34 .cfi_offset 14, -4 + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clean the error context */ + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 35 .loc 1 606 0 + 36 0002 054B ldr r3, .L2 + 37 0004 0022 movs r2, #0 + 38 0006 DA61 str r2, [r3, #28] + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Proceed to program the new data */ + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** SET_BIT(FLASH->CR, FLASH_CR_PG); + 39 .loc 1 609 0 + 40 0008 044A ldr r2, .L2+4 + 41 000a 1369 ldr r3, [r2, #16] + 42 000c 0124 movs r4, #1 + 43 000e 2343 orrs r3, r4 + 44 0010 1361 str r3, [r2, #16] + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Write data in the address */ + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** *(__IO uint16_t*)Address = Data; + 45 .loc 1 612 0 + 46 0012 0180 strh r1, [r0] + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 47 .loc 1 613 0 + 48 @ sp needed + 49 0014 10BD pop {r4, pc} + 50 .L3: + 51 0016 C046 .align 2 + 52 .L2: + 53 0018 00000000 .word pFlash + 54 001c 00200240 .word 1073881088 + 55 .cfi_endproc + 56 .LFE51: + 58 .section .text.FLASH_SetErrorCode,"ax",%progbits + 59 .align 1 + 60 .syntax unified + 61 .code 16 + 62 .thumb_func + 63 .fpu softvfp + 65 FLASH_SetErrorCode: + 66 .LFB53: + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Wait for a FLASH operation to complete. + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @param Timeout maximum flash operation timeout + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval HAL Status + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout) + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + ARM GAS /tmp/cciaBHKP.s page 13 + + + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** Even if the FLASH operation fails, the BUSY flag will be reset and an error + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** flag will be set */ + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t tickstart = HAL_GetTick(); + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY)) + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (Timeout != HAL_MAX_DELAY) + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout)) + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_TIMEOUT; + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Check FLASH End of Operation flag */ + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP)) + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear FLASH End of Operation pending bit */ + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP); + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Save the error code*/ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** FLASH_SetErrorCode(); + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_ERROR; + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* There is no error flag set */ + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_OK; + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /** + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @brief Set the specific FLASH error flag. + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** * @retval None + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** */ + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** static void FLASH_SetErrorCode(void) + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 67 .loc 1 664 0 + 68 .cfi_startproc + 69 @ args = 0, pretend = 0, frame = 0 + 70 @ frame_needed = 0, uses_anonymous_args = 0 + 71 @ link register save eliminated. + 72 .LVL1: + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t flags = 0U; + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR)) + 73 .loc 1 667 0 + 74 0000 0C4B ldr r3, .L8 + 75 0002 DB68 ldr r3, [r3, #12] + 76 0004 DB06 lsls r3, r3, #27 + 77 0006 13D5 bpl .L7 + ARM GAS /tmp/cciaBHKP.s page 14 + + + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP; + 78 .loc 1 669 0 + 79 0008 0B4A ldr r2, .L8+4 + 80 000a D369 ldr r3, [r2, #28] + 81 000c 0221 movs r1, #2 + 82 000e 0B43 orrs r3, r1 + 83 0010 D361 str r3, [r2, #28] + 84 .LVL2: + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** flags |= FLASH_FLAG_WRPERR; + 85 .loc 1 670 0 + 86 0012 1023 movs r3, #16 + 87 .LVL3: + 88 .L5: + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 89 .loc 1 672 0 + 90 0014 074A ldr r2, .L8 + 91 0016 D268 ldr r2, [r2, #12] + 92 0018 5207 lsls r2, r2, #29 + 93 001a 06D5 bpl .L6 + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG; + 94 .loc 1 674 0 + 95 001c 0649 ldr r1, .L8+4 + 96 001e CA69 ldr r2, [r1, #28] + 97 0020 0120 movs r0, #1 + 98 0022 0243 orrs r2, r0 + 99 0024 CA61 str r2, [r1, #28] + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** flags |= FLASH_FLAG_PGERR; + 100 .loc 1 675 0 + 101 0026 0422 movs r2, #4 + 102 0028 1343 orrs r3, r2 + 103 .LVL4: + 104 .L6: + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear FLASH error pending bits */ + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_CLEAR_FLAG(flags); + 105 .loc 1 678 0 + 106 002a 024A ldr r2, .L8 + 107 002c D360 str r3, [r2, #12] + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 108 .loc 1 679 0 + 109 @ sp needed + 110 002e 7047 bx lr + 111 .LVL5: + 112 .L7: + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 113 .loc 1 665 0 + 114 0030 0023 movs r3, #0 + 115 0032 EFE7 b .L5 + 116 .L9: + 117 .align 2 + 118 .L8: + 119 0034 00200240 .word 1073881088 + 120 0038 00000000 .word pFlash + 121 .cfi_endproc + ARM GAS /tmp/cciaBHKP.s page 15 + + + 122 .LFE53: + 124 .section .text.HAL_FLASH_Program_IT,"ax",%progbits + 125 .align 1 + 126 .global HAL_FLASH_Program_IT + 127 .syntax unified + 128 .code 16 + 129 .thumb_func + 130 .fpu softvfp + 132 HAL_FLASH_Program_IT: + 133 .LFB41: + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 134 .loc 1 240 0 + 135 .cfi_startproc + 136 @ args = 0, pretend = 0, frame = 0 + 137 @ frame_needed = 0, uses_anonymous_args = 0 + 138 .LVL6: + 139 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 140 .LCFI1: + 141 .cfi_def_cfa_offset 24 + 142 .cfi_offset 3, -24 + 143 .cfi_offset 4, -20 + 144 .cfi_offset 5, -16 + 145 .cfi_offset 6, -12 + 146 .cfi_offset 7, -8 + 147 .cfi_offset 14, -4 + 148 0002 0C00 movs r4, r1 + 149 .LVL7: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 150 .loc 1 244 0 + 151 0004 1549 ldr r1, .L18 + 152 .LVL8: + 153 0006 097E ldrb r1, [r1, #24] + 154 0008 0129 cmp r1, #1 + 155 000a 25D0 beq .L15 + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 156 .loc 1 244 0 is_stmt 0 discriminator 2 + 157 000c 1349 ldr r1, .L18 + 158 000e 0125 movs r5, #1 + 159 0010 0D76 strb r5, [r1, #24] + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 160 .loc 1 251 0 is_stmt 1 discriminator 2 + 161 0012 134E ldr r6, .L18+4 + 162 0014 3769 ldr r7, [r6, #16] + 163 0016 A025 movs r5, #160 + 164 0018 6D01 lsls r5, r5, #5 + 165 001a 3D43 orrs r5, r7 + 166 001c 3561 str r5, [r6, #16] + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Data = Data; + 167 .loc 1 253 0 discriminator 2 + 168 001e 8C60 str r4, [r1, #8] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 169 .loc 1 254 0 discriminator 2 + 170 0020 0A61 str r2, [r1, #16] + 171 0022 4B61 str r3, [r1, #20] + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 172 .loc 1 256 0 discriminator 2 + 173 0024 0128 cmp r0, #1 + ARM GAS /tmp/cciaBHKP.s page 16 + + + 174 0026 0CD0 beq .L16 + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 175 .loc 1 262 0 + 176 0028 0228 cmp r0, #2 + 177 002a 0FD0 beq .L17 + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program double word (64-bit : 4*16-bit) at a specified address. */ + 178 .loc 1 270 0 + 179 002c 0B49 ldr r1, .L18 + 180 002e 0520 movs r0, #5 + 181 .LVL9: + 182 0030 0870 strb r0, [r1] + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 183 .loc 1 272 0 + 184 0032 0138 subs r0, r0, #1 + 185 0034 4860 str r0, [r1, #4] + 186 .L13: + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 187 .loc 1 276 0 + 188 0036 91B2 uxth r1, r2 + 189 0038 2000 movs r0, r4 + 190 003a FFF7FEFF bl FLASH_Program_HalfWord + 191 .LVL10: + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 192 .loc 1 278 0 + 193 003e 0020 movs r0, #0 + 194 .L11: + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 195 .loc 1 279 0 + 196 @ sp needed + 197 .LVL11: + 198 0040 F8BD pop {r3, r4, r5, r6, r7, pc} + 199 .LVL12: + 200 .L16: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program halfword (16-bit) at a specified address. */ + 201 .loc 1 258 0 + 202 0042 0230 adds r0, r0, #2 + 203 .LVL13: + 204 0044 0870 strb r0, [r1] + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 205 .loc 1 260 0 + 206 0046 0238 subs r0, r0, #2 + 207 .LVL14: + 208 0048 4860 str r0, [r1, #4] + 209 004a F4E7 b .L13 + 210 .L17: + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Program word (32-bit : 2*16-bit) at a specified address. */ + 211 .loc 1 264 0 + 212 004c 0349 ldr r1, .L18 + 213 004e 0230 adds r0, r0, #2 + 214 .LVL15: + 215 0050 0870 strb r0, [r1] + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 216 .loc 1 266 0 + 217 0052 0238 subs r0, r0, #2 + 218 .LVL16: + 219 0054 4860 str r0, [r1, #4] + 220 0056 EEE7 b .L13 + ARM GAS /tmp/cciaBHKP.s page 17 + + + 221 .L15: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 222 .loc 1 244 0 + 223 0058 0220 movs r0, #2 + 224 .LVL17: + 225 005a F1E7 b .L11 + 226 .L19: + 227 .align 2 + 228 .L18: + 229 005c 00000000 .word pFlash + 230 0060 00200240 .word 1073881088 + 231 .cfi_endproc + 232 .LFE41: + 234 .section .text.HAL_FLASH_EndOfOperationCallback,"ax",%progbits + 235 .align 1 + 236 .weak HAL_FLASH_EndOfOperationCallback + 237 .syntax unified + 238 .code 16 + 239 .thumb_func + 240 .fpu softvfp + 242 HAL_FLASH_EndOfOperationCallback: + 243 .LFB43: + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 244 .loc 1 429 0 + 245 .cfi_startproc + 246 @ args = 0, pretend = 0, frame = 0 + 247 @ frame_needed = 0, uses_anonymous_args = 0 + 248 @ link register save eliminated. + 249 .LVL18: + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 250 .loc 1 436 0 + 251 @ sp needed + 252 0000 7047 bx lr + 253 .cfi_endproc + 254 .LFE43: + 256 .section .text.HAL_FLASH_OperationErrorCallback,"ax",%progbits + 257 .align 1 + 258 .weak HAL_FLASH_OperationErrorCallback + 259 .syntax unified + 260 .code 16 + 261 .thumb_func + 262 .fpu softvfp + 264 HAL_FLASH_OperationErrorCallback: + 265 .LFB44: + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */ + 266 .loc 1 447 0 + 267 .cfi_startproc + 268 @ args = 0, pretend = 0, frame = 0 + 269 @ frame_needed = 0, uses_anonymous_args = 0 + 270 @ link register save eliminated. + 271 .LVL19: + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 272 .loc 1 454 0 + 273 @ sp needed + 274 0000 7047 bx lr + 275 .cfi_endproc + 276 .LFE44: + ARM GAS /tmp/cciaBHKP.s page 18 + + + 278 .section .text.HAL_FLASH_IRQHandler,"ax",%progbits + 279 .align 1 + 280 .global HAL_FLASH_IRQHandler + 281 .syntax unified + 282 .code 16 + 283 .thumb_func + 284 .fpu softvfp + 286 HAL_FLASH_IRQHandler: + 287 .LFB42: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** uint32_t addresstmp = 0U; + 288 .loc 1 286 0 + 289 .cfi_startproc + 290 @ args = 0, pretend = 0, frame = 0 + 291 @ frame_needed = 0, uses_anonymous_args = 0 + 292 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 293 .LCFI2: + 294 .cfi_def_cfa_offset 24 + 295 .cfi_offset 3, -24 + 296 .cfi_offset 4, -20 + 297 .cfi_offset 5, -16 + 298 .cfi_offset 6, -12 + 299 .cfi_offset 7, -8 + 300 .cfi_offset 14, -4 + 301 .LVL20: + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 302 .loc 1 290 0 + 303 0002 514B ldr r3, .L39 + 304 0004 DB68 ldr r3, [r3, #12] + 305 0006 DB06 lsls r3, r3, #27 + 306 0008 03D4 bmi .L23 + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 307 .loc 1 290 0 is_stmt 0 discriminator 1 + 308 000a 4F4B ldr r3, .L39 + 309 000c DB68 ldr r3, [r3, #12] + 310 000e 5B07 lsls r3, r3, #29 + 311 0010 0BD5 bpl .L24 + 312 .L23: + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Reset address */ + 313 .loc 1 293 0 is_stmt 1 + 314 0012 4E4C ldr r4, .L39+4 + 315 0014 A568 ldr r5, [r4, #8] + 316 .LVL21: + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 317 .loc 1 295 0 + 318 0016 0123 movs r3, #1 + 319 0018 5B42 rsbs r3, r3, #0 + 320 001a A360 str r3, [r4, #8] + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 321 .loc 1 298 0 + 322 001c FFF7FEFF bl FLASH_SetErrorCode + 323 .LVL22: + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 324 .loc 1 301 0 + 325 0020 2800 movs r0, r5 + 326 0022 FFF7FEFF bl HAL_FLASH_OperationErrorCallback + 327 .LVL23: + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + ARM GAS /tmp/cciaBHKP.s page 19 + + + 328 .loc 1 304 0 + 329 0026 0023 movs r3, #0 + 330 0028 2370 strb r3, [r4] + 331 .LVL24: + 332 .L24: + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 333 .loc 1 308 0 + 334 002a 474B ldr r3, .L39 + 335 002c DB68 ldr r3, [r3, #12] + 336 002e 9B06 lsls r3, r3, #26 + 337 0030 28D5 bpl .L25 + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 338 .loc 1 311 0 + 339 0032 454B ldr r3, .L39 + 340 0034 2022 movs r2, #32 + 341 0036 DA60 str r2, [r3, #12] + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 342 .loc 1 314 0 + 343 0038 444B ldr r3, .L39+4 + 344 003a 1B78 ldrb r3, [r3] + 345 003c 002B cmp r3, #0 + 346 003e 21D0 beq .L25 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 347 .loc 1 316 0 + 348 0040 424B ldr r3, .L39+4 + 349 0042 1B78 ldrb r3, [r3] + 350 0044 012B cmp r3, #1 + 351 0046 2ED0 beq .L34 + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 352 .loc 1 347 0 + 353 0048 404B ldr r3, .L39+4 + 354 004a 1B78 ldrb r3, [r3] + 355 004c 022B cmp r3, #2 + 356 004e 4CD0 beq .L35 + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 357 .loc 1 362 0 + 358 0050 3E4B ldr r3, .L39+4 + 359 0052 5A68 ldr r2, [r3, #4] + 360 0054 013A subs r2, r2, #1 + 361 0056 5A60 str r2, [r3, #4] + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 362 .loc 1 365 0 + 363 0058 5B68 ldr r3, [r3, #4] + 364 005a 002B cmp r3, #0 + 365 005c 51D1 bne .L36 + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 366 .loc 1 384 0 + 367 005e 3B4B ldr r3, .L39+4 + 368 0060 1B78 ldrb r3, [r3] + 369 0062 032B cmp r3, #3 + 370 0064 65D0 beq .L37 + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 371 .loc 1 388 0 + 372 0066 394B ldr r3, .L39+4 + 373 0068 1B78 ldrb r3, [r3] + 374 006a 042B cmp r3, #4 + 375 006c 66D0 beq .L38 + ARM GAS /tmp/cciaBHKP.s page 20 + + + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 376 .loc 1 394 0 + 377 006e 374B ldr r3, .L39+4 + 378 0070 9868 ldr r0, [r3, #8] + 379 0072 0638 subs r0, r0, #6 + 380 0074 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 381 .LVL25: + 382 .L31: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 383 .loc 1 398 0 + 384 0078 344B ldr r3, .L39+4 + 385 007a 0122 movs r2, #1 + 386 007c 5242 rsbs r2, r2, #0 + 387 007e 9A60 str r2, [r3, #8] + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 388 .loc 1 399 0 + 389 0080 0022 movs r2, #0 + 390 0082 1A70 strb r2, [r3] + 391 .L25: + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 392 .loc 1 406 0 + 393 0084 314B ldr r3, .L39+4 + 394 0086 1B78 ldrb r3, [r3] + 395 0088 002B cmp r3, #0 + 396 008a 0BD1 bne .L22 + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 397 .loc 1 409 0 + 398 008c 2E4B ldr r3, .L39 + 399 008e 1A69 ldr r2, [r3, #16] + 400 0090 0721 movs r1, #7 + 401 0092 8A43 bics r2, r1 + 402 0094 1A61 str r2, [r3, #16] + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 403 .loc 1 412 0 + 404 0096 1A69 ldr r2, [r3, #16] + 405 0098 2D49 ldr r1, .L39+8 + 406 009a 0A40 ands r2, r1 + 407 009c 1A61 str r2, [r3, #16] + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 408 .loc 1 415 0 + 409 009e 2B4B ldr r3, .L39+4 + 410 00a0 0022 movs r2, #0 + 411 00a2 1A76 strb r2, [r3, #24] + 412 .L22: + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 413 .loc 1 417 0 + 414 @ sp needed + 415 00a4 F8BD pop {r3, r4, r5, r6, r7, pc} + 416 .L34: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 417 .loc 1 319 0 + 418 00a6 294B ldr r3, .L39+4 + 419 00a8 5A68 ldr r2, [r3, #4] + 420 00aa 013A subs r2, r2, #1 + 421 00ac 5A60 str r2, [r3, #4] + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 422 .loc 1 322 0 + ARM GAS /tmp/cciaBHKP.s page 21 + + + 423 00ae 5B68 ldr r3, [r3, #4] + 424 00b0 002B cmp r3, #0 + 425 00b2 11D0 beq .L27 + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /*Indicate user which sector has been erased */ + 426 .loc 1 324 0 + 427 00b4 254C ldr r4, .L39+4 + 428 00b6 A068 ldr r0, [r4, #8] + 429 .LVL26: + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 430 .loc 1 326 0 + 431 00b8 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 432 .LVL27: + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.Address = addresstmp; + 433 .loc 1 329 0 + 434 00bc A068 ldr r0, [r4, #8] + 435 00be 8023 movs r3, #128 + 436 00c0 1B01 lsls r3, r3, #4 + 437 00c2 9C46 mov ip, r3 + 438 00c4 6044 add r0, r0, ip + 439 .LVL28: + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 440 .loc 1 330 0 + 441 00c6 A060 str r0, [r4, #8] + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 442 .loc 1 333 0 + 443 00c8 1F4A ldr r2, .L39 + 444 00ca 1369 ldr r3, [r2, #16] + 445 00cc 0221 movs r1, #2 + 446 00ce 8B43 bics r3, r1 + 447 00d0 1361 str r3, [r2, #16] + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 448 .loc 1 335 0 + 449 00d2 FFF7FEFF bl FLASH_PageErase + 450 .LVL29: + 451 00d6 D5E7 b .L25 + 452 .L27: + 453 .LVL30: + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** pFlash.ProcedureOnGoing = FLASH_PROC_NONE; + 454 .loc 1 341 0 + 455 00d8 1C4B ldr r3, .L39+4 + 456 00da 0120 movs r0, #1 + 457 00dc 4042 rsbs r0, r0, #0 + 458 00de 9860 str r0, [r3, #8] + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* FLASH EOP interrupt user callback */ + 459 .loc 1 342 0 + 460 00e0 0022 movs r2, #0 + 461 00e2 1A70 strb r2, [r3] + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 462 .loc 1 344 0 + 463 00e4 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 464 .LVL31: + 465 00e8 CCE7 b .L25 + 466 .LVL32: + 467 .L35: + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 468 .loc 1 350 0 + 469 00ea 174A ldr r2, .L39 + ARM GAS /tmp/cciaBHKP.s page 22 + + + 470 00ec 1369 ldr r3, [r2, #16] + 471 00ee 0421 movs r1, #4 + 472 00f0 8B43 bics r3, r1 + 473 00f2 1361 str r3, [r2, #16] + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 474 .loc 1 354 0 + 475 00f4 0020 movs r0, #0 + 476 00f6 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 477 .LVL33: + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 478 .loc 1 357 0 + 479 00fa 144B ldr r3, .L39+4 + 480 00fc 0022 movs r2, #0 + 481 00fe 1A70 strb r2, [r3] + 482 0100 C0E7 b .L25 + 483 .L36: + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** addresstmp = pFlash.Address; + 484 .loc 1 368 0 + 485 0102 124B ldr r3, .L39+4 + 486 0104 9A68 ldr r2, [r3, #8] + 487 0106 0232 adds r2, r2, #2 + 488 0108 9A60 str r2, [r3, #8] + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 489 .loc 1 369 0 + 490 010a 9868 ldr r0, [r3, #8] + 491 .LVL34: + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 492 .loc 1 372 0 + 493 010c 1E69 ldr r6, [r3, #16] + 494 010e 5F69 ldr r7, [r3, #20] + 495 0110 3A04 lsls r2, r7, #16 + 496 0112 340C lsrs r4, r6, #16 + 497 0114 1443 orrs r4, r2 + 498 0116 3D0C lsrs r5, r7, #16 + 499 0118 1C61 str r4, [r3, #16] + 500 011a 5D61 str r5, [r3, #20] + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 501 .loc 1 375 0 + 502 011c 0A49 ldr r1, .L39 + 503 011e 0A69 ldr r2, [r1, #16] + 504 0120 0124 movs r4, #1 + 505 0122 A243 bics r2, r4 + 506 0124 0A61 str r2, [r1, #16] + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 507 .loc 1 378 0 + 508 0126 1A69 ldr r2, [r3, #16] + 509 0128 5B69 ldr r3, [r3, #20] + 510 012a 91B2 uxth r1, r2 + 511 012c FFF7FEFF bl FLASH_Program_HalfWord + 512 .LVL35: + 513 0130 A8E7 b .L25 + 514 .L37: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 515 .loc 1 386 0 + 516 0132 064B ldr r3, .L39+4 + 517 0134 9868 ldr r0, [r3, #8] + 518 0136 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + ARM GAS /tmp/cciaBHKP.s page 23 + + + 519 .LVL36: + 520 013a 9DE7 b .L31 + 521 .L38: + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 522 .loc 1 390 0 + 523 013c 034B ldr r3, .L39+4 + 524 013e 9868 ldr r0, [r3, #8] + 525 0140 0238 subs r0, r0, #2 + 526 0142 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback + 527 .LVL37: + 528 0146 97E7 b .L31 + 529 .L40: + 530 .align 2 + 531 .L39: + 532 0148 00200240 .word 1073881088 + 533 014c 00000000 .word pFlash + 534 0150 FFEBFFFF .word -5121 + 535 .cfi_endproc + 536 .LFE42: + 538 .section .text.HAL_FLASH_Unlock,"ax",%progbits + 539 .align 1 + 540 .global HAL_FLASH_Unlock + 541 .syntax unified + 542 .code 16 + 543 .thumb_func + 544 .fpu softvfp + 546 HAL_FLASH_Unlock: + 547 .LFB45: + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_OK; + 548 .loc 1 480 0 + 549 .cfi_startproc + 550 @ args = 0, pretend = 0, frame = 0 + 551 @ frame_needed = 0, uses_anonymous_args = 0 + 552 @ link register save eliminated. + 553 .LVL38: + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 554 .loc 1 483 0 + 555 0000 084B ldr r3, .L46 + 556 0002 1B69 ldr r3, [r3, #16] + 557 0004 1B06 lsls r3, r3, #24 + 558 0006 0BD5 bpl .L43 + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2); + 559 .loc 1 486 0 + 560 0008 064B ldr r3, .L46 + 561 000a 074A ldr r2, .L46+4 + 562 000c 5A60 str r2, [r3, #4] + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 563 .loc 1 487 0 + 564 000e 074A ldr r2, .L46+8 + 565 0010 5A60 str r2, [r3, #4] + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 566 .loc 1 490 0 + 567 0012 1B69 ldr r3, [r3, #16] + 568 0014 1B06 lsls r3, r3, #24 + 569 0016 01D5 bpl .L45 + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 570 .loc 1 492 0 + ARM GAS /tmp/cciaBHKP.s page 24 + + + 571 0018 0120 movs r0, #1 + 572 001a 02E0 b .L42 + 573 .L45: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 574 .loc 1 481 0 + 575 001c 0020 movs r0, #0 + 576 001e 00E0 b .L42 + 577 .L43: + 578 0020 0020 movs r0, #0 + 579 .L42: + 580 .LVL39: + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 581 .loc 1 497 0 + 582 @ sp needed + 583 0022 7047 bx lr + 584 .L47: + 585 .align 2 + 586 .L46: + 587 0024 00200240 .word 1073881088 + 588 0028 23016745 .word 1164378403 + 589 002c AB89EFCD .word -839939669 + 590 .cfi_endproc + 591 .LFE45: + 593 .section .text.HAL_FLASH_Lock,"ax",%progbits + 594 .align 1 + 595 .global HAL_FLASH_Lock + 596 .syntax unified + 597 .code 16 + 598 .thumb_func + 599 .fpu softvfp + 601 HAL_FLASH_Lock: + 602 .LFB46: + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the LOCK Bit to lock the FLASH Registers access */ + 603 .loc 1 504 0 + 604 .cfi_startproc + 605 @ args = 0, pretend = 0, frame = 0 + 606 @ frame_needed = 0, uses_anonymous_args = 0 + 607 @ link register save eliminated. + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 608 .loc 1 506 0 + 609 0000 034A ldr r2, .L49 + 610 0002 1369 ldr r3, [r2, #16] + 611 0004 8021 movs r1, #128 + 612 0006 0B43 orrs r3, r1 + 613 0008 1361 str r3, [r2, #16] + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 614 .loc 1 509 0 + 615 000a 0020 movs r0, #0 + 616 @ sp needed + 617 000c 7047 bx lr + 618 .L50: + 619 000e C046 .align 2 + 620 .L49: + 621 0010 00200240 .word 1073881088 + 622 .cfi_endproc + 623 .LFE46: + 625 .section .text.HAL_FLASH_OB_Unlock,"ax",%progbits + ARM GAS /tmp/cciaBHKP.s page 25 + + + 626 .align 1 + 627 .global HAL_FLASH_OB_Unlock + 628 .syntax unified + 629 .code 16 + 630 .thumb_func + 631 .fpu softvfp + 633 HAL_FLASH_OB_Unlock: + 634 .LFB47: + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** if (HAL_IS_BIT_CLR(FLASH->CR, FLASH_CR_OPTWRE)) + 635 .loc 1 516 0 + 636 .cfi_startproc + 637 @ args = 0, pretend = 0, frame = 0 + 638 @ frame_needed = 0, uses_anonymous_args = 0 + 639 @ link register save eliminated. + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 640 .loc 1 517 0 + 641 0000 064B ldr r3, .L54 + 642 0002 1B69 ldr r3, [r3, #16] + 643 0004 9B05 lsls r3, r3, #22 + 644 0006 06D4 bmi .L53 + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** WRITE_REG(FLASH->OPTKEYR, FLASH_OPTKEY2); + 645 .loc 1 520 0 + 646 0008 044B ldr r3, .L54 + 647 000a 054A ldr r2, .L54+4 + 648 000c 9A60 str r2, [r3, #8] + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 649 .loc 1 521 0 + 650 000e 054A ldr r2, .L54+8 + 651 0010 9A60 str r2, [r3, #8] + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 652 .loc 1 528 0 + 653 0012 0020 movs r0, #0 + 654 .L52: + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 655 .loc 1 529 0 + 656 @ sp needed + 657 0014 7047 bx lr + 658 .L53: + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 659 .loc 1 525 0 + 660 0016 0120 movs r0, #1 + 661 0018 FCE7 b .L52 + 662 .L55: + 663 001a C046 .align 2 + 664 .L54: + 665 001c 00200240 .word 1073881088 + 666 0020 23016745 .word 1164378403 + 667 0024 AB89EFCD .word -839939669 + 668 .cfi_endproc + 669 .LFE47: + 671 .section .text.HAL_FLASH_OB_Lock,"ax",%progbits + 672 .align 1 + 673 .global HAL_FLASH_OB_Lock + 674 .syntax unified + 675 .code 16 + 676 .thumb_func + 677 .fpu softvfp + ARM GAS /tmp/cciaBHKP.s page 26 + + + 679 HAL_FLASH_OB_Lock: + 680 .LFB48: + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Clear the OPTWRE Bit to lock the FLASH Option Byte Registers access */ + 681 .loc 1 536 0 + 682 .cfi_startproc + 683 @ args = 0, pretend = 0, frame = 0 + 684 @ frame_needed = 0, uses_anonymous_args = 0 + 685 @ link register save eliminated. + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 686 .loc 1 538 0 + 687 0000 034A ldr r2, .L57 + 688 0002 1369 ldr r3, [r2, #16] + 689 0004 0349 ldr r1, .L57+4 + 690 0006 0B40 ands r3, r1 + 691 0008 1361 str r3, [r2, #16] + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 692 .loc 1 541 0 + 693 000a 0020 movs r0, #0 + 694 @ sp needed + 695 000c 7047 bx lr + 696 .L58: + 697 000e C046 .align 2 + 698 .L57: + 699 0010 00200240 .word 1073881088 + 700 0014 FFFDFFFF .word -513 + 701 .cfi_endproc + 702 .LFE48: + 704 .section .text.HAL_FLASH_GetError,"ax",%progbits + 705 .align 1 + 706 .global HAL_FLASH_GetError + 707 .syntax unified + 708 .code 16 + 709 .thumb_func + 710 .fpu softvfp + 712 HAL_FLASH_GetError: + 713 .LFB50: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return pFlash.ErrorCode; + 714 .loc 1 581 0 + 715 .cfi_startproc + 716 @ args = 0, pretend = 0, frame = 0 + 717 @ frame_needed = 0, uses_anonymous_args = 0 + 718 @ link register save eliminated. + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 719 .loc 1 582 0 + 720 0000 014B ldr r3, .L60 + 721 0002 D869 ldr r0, [r3, #28] + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 722 .loc 1 583 0 + 723 @ sp needed + 724 0004 7047 bx lr + 725 .L61: + 726 0006 C046 .align 2 + 727 .L60: + 728 0008 00000000 .word pFlash + 729 .cfi_endproc + 730 .LFE50: + 732 .section .text.FLASH_WaitForLastOperation,"ax",%progbits + ARM GAS /tmp/cciaBHKP.s page 27 + + + 733 .align 1 + 734 .global FLASH_WaitForLastOperation + 735 .syntax unified + 736 .code 16 + 737 .thumb_func + 738 .fpu softvfp + 740 FLASH_WaitForLastOperation: + 741 .LFB52: + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Wait for the FLASH operation to complete by polling on BUSY flag to be reset. + 742 .loc 1 621 0 + 743 .cfi_startproc + 744 @ args = 0, pretend = 0, frame = 0 + 745 @ frame_needed = 0, uses_anonymous_args = 0 + 746 .LVL40: + 747 0000 70B5 push {r4, r5, r6, lr} + 748 .LCFI3: + 749 .cfi_def_cfa_offset 16 + 750 .cfi_offset 4, -16 + 751 .cfi_offset 5, -12 + 752 .cfi_offset 6, -8 + 753 .cfi_offset 14, -4 + 754 0002 0400 movs r4, r0 + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 755 .loc 1 626 0 + 756 0004 FFF7FEFF bl HAL_GetTick + 757 .LVL41: + 758 0008 0500 movs r5, r0 + 759 .LVL42: + 760 .L64: + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 761 .loc 1 628 0 + 762 000a 134B ldr r3, .L73 + 763 000c DB68 ldr r3, [r3, #12] + 764 000e DB07 lsls r3, r3, #31 + 765 0010 0AD5 bpl .L72 + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 766 .loc 1 630 0 + 767 0012 631C adds r3, r4, #1 + 768 0014 F9D0 beq .L64 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 769 .loc 1 632 0 + 770 0016 002C cmp r4, #0 + 771 0018 19D0 beq .L69 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 772 .loc 1 632 0 is_stmt 0 discriminator 1 + 773 001a FFF7FEFF bl HAL_GetTick + 774 .LVL43: + 775 001e 401B subs r0, r0, r5 + 776 0020 A042 cmp r0, r4 + 777 0022 F2D9 bls .L64 + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 778 .loc 1 634 0 is_stmt 1 + 779 0024 0320 movs r0, #3 + 780 0026 11E0 b .L65 + 781 .L72: + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 782 .loc 1 640 0 + ARM GAS /tmp/cciaBHKP.s page 28 + + + 783 0028 0B4B ldr r3, .L73 + 784 002a DB68 ldr r3, [r3, #12] + 785 002c 9B06 lsls r3, r3, #26 + 786 002e 02D5 bpl .L67 + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 787 .loc 1 643 0 + 788 0030 094B ldr r3, .L73 + 789 0032 2022 movs r2, #32 + 790 0034 DA60 str r2, [r3, #12] + 791 .L67: + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 792 .loc 1 646 0 + 793 0036 084B ldr r3, .L73 + 794 0038 DB68 ldr r3, [r3, #12] + 795 003a DB06 lsls r3, r3, #27 + 796 003c 03D4 bmi .L68 + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 797 .loc 1 647 0 discriminator 1 + 798 003e 064B ldr r3, .L73 + 799 0040 DB68 ldr r3, [r3, #12] + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR)) + 800 .loc 1 646 0 discriminator 1 + 801 0042 5B07 lsls r3, r3, #29 + 802 0044 05D5 bpl .L71 + 803 .L68: + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** return HAL_ERROR; + 804 .loc 1 650 0 + 805 0046 FFF7FEFF bl FLASH_SetErrorCode + 806 .LVL44: + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 807 .loc 1 651 0 + 808 004a 0120 movs r0, #1 + 809 .L65: + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 810 .loc 1 656 0 + 811 @ sp needed + 812 .LVL45: + 813 .LVL46: + 814 004c 70BD pop {r4, r5, r6, pc} + 815 .LVL47: + 816 .L69: + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 817 .loc 1 634 0 + 818 004e 0320 movs r0, #3 + 819 0050 FCE7 b .L65 + 820 .L71: + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 821 .loc 1 655 0 + 822 0052 0020 movs r0, #0 + 823 0054 FAE7 b .L65 + 824 .L74: + 825 0056 C046 .align 2 + 826 .L73: + 827 0058 00200240 .word 1073881088 + 828 .cfi_endproc + 829 .LFE52: + 831 .section .text.HAL_FLASH_Program,"ax",%progbits + ARM GAS /tmp/cciaBHKP.s page 29 + + + 832 .align 1 + 833 .global HAL_FLASH_Program + 834 .syntax unified + 835 .code 16 + 836 .thumb_func + 837 .fpu softvfp + 839 HAL_FLASH_Program: + 840 .LFB40: + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** HAL_StatusTypeDef status = HAL_ERROR; + 841 .loc 1 168 0 + 842 .cfi_startproc + 843 @ args = 0, pretend = 0, frame = 0 + 844 @ frame_needed = 0, uses_anonymous_args = 0 + 845 .LVL48: + 846 0000 F0B5 push {r4, r5, r6, r7, lr} + 847 .LCFI4: + 848 .cfi_def_cfa_offset 20 + 849 .cfi_offset 4, -20 + 850 .cfi_offset 5, -16 + 851 .cfi_offset 6, -12 + 852 .cfi_offset 7, -8 + 853 .cfi_offset 14, -4 + 854 0002 C646 mov lr, r8 + 855 0004 00B5 push {lr} + 856 .LCFI5: + 857 .cfi_def_cfa_offset 24 + 858 .cfi_offset 8, -24 + 859 0006 0400 movs r4, r0 + 860 0008 0D00 movs r5, r1 + 861 000a 9046 mov r8, r2 + 862 000c 1E00 movs r6, r3 + 863 .LVL49: + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 864 .loc 1 174 0 + 865 000e 214B ldr r3, .L87 + 866 0010 1B7E ldrb r3, [r3, #24] + 867 0012 012B cmp r3, #1 + 868 0014 3BD0 beq .L83 + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 869 .loc 1 174 0 is_stmt 0 discriminator 2 + 870 0016 1F4B ldr r3, .L87 + 871 0018 0122 movs r2, #1 + 872 .LVL50: + 873 001a 1A76 strb r2, [r3, #24] + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 874 .loc 1 181 0 is_stmt 1 discriminator 2 + 875 001c 1E48 ldr r0, .L87+4 + 876 .LVL51: + 877 001e FFF7FEFF bl FLASH_WaitForLastOperation + 878 .LVL52: + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 879 .loc 1 183 0 discriminator 2 + 880 0022 0028 cmp r0, #0 + 881 0024 2DD1 bne .L77 + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 882 .loc 1 185 0 + 883 0026 012C cmp r4, #1 + ARM GAS /tmp/cciaBHKP.s page 30 + + + 884 0028 06D0 beq .L84 + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 885 .loc 1 190 0 + 886 002a 022C cmp r4, #2 + 887 002c 02D0 beq .L86 + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 888 .loc 1 198 0 + 889 002e 0427 movs r7, #4 + 890 .L78: + 891 .LVL53: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 892 .loc 1 201 0 + 893 0030 0024 movs r4, #0 + 894 .LVL54: + 895 0032 1BE0 b .L79 + 896 .LVL55: + 897 .L86: + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 898 .loc 1 193 0 + 899 0034 0227 movs r7, #2 + 900 0036 FBE7 b .L78 + 901 .L84: + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 902 .loc 1 188 0 + 903 0038 0127 movs r7, #1 + 904 003a F9E7 b .L78 + 905 .LVL56: + 906 .L80: + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 907 .loc 1 203 0 + 908 003c 2022 movs r2, #32 + 909 003e D21A subs r2, r2, r3 + 910 0040 3100 movs r1, r6 + 911 0042 9140 lsls r1, r1, r2 + 912 0044 0A00 movs r2, r1 + 913 0046 4146 mov r1, r8 + 914 0048 D940 lsrs r1, r1, r3 + 915 004a 1143 orrs r1, r2 + 916 .L81: + 917 004c 89B2 uxth r1, r1 + 918 004e 4019 adds r0, r0, r5 + 919 0050 FFF7FEFF bl FLASH_Program_HalfWord + 920 .LVL57: + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 921 .loc 1 206 0 + 922 0054 1048 ldr r0, .L87+4 + 923 0056 FFF7FEFF bl FLASH_WaitForLastOperation + 924 .LVL58: + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* In case of error, stop programming procedure */ + 925 .loc 1 209 0 + 926 005a 104A ldr r2, .L87+8 + 927 005c 1369 ldr r3, [r2, #16] + 928 005e 0121 movs r1, #1 + 929 0060 8B43 bics r3, r1 + 930 0062 1361 str r3, [r2, #16] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 931 .loc 1 211 0 + ARM GAS /tmp/cciaBHKP.s page 31 + + + 932 0064 0028 cmp r0, #0 + 933 0066 0CD1 bne .L77 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 934 .loc 1 201 0 discriminator 2 + 935 0068 0134 adds r4, r4, #1 + 936 .LVL59: + 937 006a E4B2 uxtb r4, r4 + 938 .LVL60: + 939 .L79: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** { + 940 .loc 1 201 0 is_stmt 0 discriminator 1 + 941 006c BC42 cmp r4, r7 + 942 006e 08D2 bcs .L77 + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 943 .loc 1 203 0 is_stmt 1 + 944 0070 6000 lsls r0, r4, #1 + 945 .LVL61: + 946 0072 2301 lsls r3, r4, #4 + 947 0074 2022 movs r2, #32 + 948 0076 5242 rsbs r2, r2, #0 + 949 0078 9A18 adds r2, r3, r2 + 950 007a DFD4 bmi .L80 + 951 007c 3100 movs r1, r6 + 952 007e D140 lsrs r1, r1, r2 + 953 0080 E4E7 b .L81 + 954 .LVL62: + 955 .L77: + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 956 .loc 1 219 0 + 957 0082 044B ldr r3, .L87 + 958 0084 0022 movs r2, #0 + 959 0086 1A76 strb r2, [r3, #24] + 960 .LVL63: + 961 .L76: + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 962 .loc 1 222 0 + 963 @ sp needed + 964 .LVL64: + 965 0088 04BC pop {r2} + 966 008a 9046 mov r8, r2 + 967 008c F0BD pop {r4, r5, r6, r7, pc} + 968 .LVL65: + 969 .L83: + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 970 .loc 1 174 0 + 971 008e 0220 movs r0, #2 + 972 .LVL66: + 973 0090 FAE7 b .L76 + 974 .L88: + 975 0092 C046 .align 2 + 976 .L87: + 977 0094 00000000 .word pFlash + 978 0098 50C30000 .word 50000 + 979 009c 00200240 .word 1073881088 + 980 .cfi_endproc + 981 .LFE40: + 983 .section .text.HAL_FLASH_OB_Launch,"ax",%progbits + ARM GAS /tmp/cciaBHKP.s page 32 + + + 984 .align 1 + 985 .global HAL_FLASH_OB_Launch + 986 .syntax unified + 987 .code 16 + 988 .thumb_func + 989 .fpu softvfp + 991 HAL_FLASH_OB_Launch: + 992 .LFB49: + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** /* Set the OBL_Launch bit to launch the option byte loading */ + 993 .loc 1 549 0 + 994 .cfi_startproc + 995 @ args = 0, pretend = 0, frame = 0 + 996 @ frame_needed = 0, uses_anonymous_args = 0 + 997 0000 10B5 push {r4, lr} + 998 .LCFI6: + 999 .cfi_def_cfa_offset 8 + 1000 .cfi_offset 4, -8 + 1001 .cfi_offset 14, -4 + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1002 .loc 1 551 0 + 1003 0002 054A ldr r2, .L90 + 1004 0004 1169 ldr r1, [r2, #16] + 1005 0006 8023 movs r3, #128 + 1006 0008 9B01 lsls r3, r3, #6 + 1007 000a 0B43 orrs r3, r1 + 1008 000c 1361 str r3, [r2, #16] + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** } + 1009 .loc 1 554 0 + 1010 000e 0348 ldr r0, .L90+4 + 1011 0010 FFF7FEFF bl FLASH_WaitForLastOperation + 1012 .LVL67: + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash.c **** + 1013 .loc 1 555 0 + 1014 @ sp needed + 1015 0014 10BD pop {r4, pc} + 1016 .L91: + 1017 0016 C046 .align 2 + 1018 .L90: + 1019 0018 00200240 .word 1073881088 + 1020 001c 50C30000 .word 50000 + 1021 .cfi_endproc + 1022 .LFE49: + 1024 .comm pFlash,32,8 + 1025 .text + 1026 .Letext0: + 1027 .file 2 "/usr/include/newlib/machine/_default_types.h" + 1028 .file 3 "/usr/include/newlib/sys/_stdint.h" + 1029 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 1030 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 1031 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 1032 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1033 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h" + 1034 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/cciaBHKP.s page 33 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_flash.c + /tmp/cciaBHKP.s:16 .text.FLASH_Program_HalfWord:0000000000000000 $t + /tmp/cciaBHKP.s:22 .text.FLASH_Program_HalfWord:0000000000000000 FLASH_Program_HalfWord + /tmp/cciaBHKP.s:53 .text.FLASH_Program_HalfWord:0000000000000018 $d + *COM*:0000000000000020 pFlash + /tmp/cciaBHKP.s:59 .text.FLASH_SetErrorCode:0000000000000000 $t + /tmp/cciaBHKP.s:65 .text.FLASH_SetErrorCode:0000000000000000 FLASH_SetErrorCode + /tmp/cciaBHKP.s:119 .text.FLASH_SetErrorCode:0000000000000034 $d + /tmp/cciaBHKP.s:125 .text.HAL_FLASH_Program_IT:0000000000000000 $t + /tmp/cciaBHKP.s:132 .text.HAL_FLASH_Program_IT:0000000000000000 HAL_FLASH_Program_IT + /tmp/cciaBHKP.s:229 .text.HAL_FLASH_Program_IT:000000000000005c $d + /tmp/cciaBHKP.s:235 .text.HAL_FLASH_EndOfOperationCallback:0000000000000000 $t + /tmp/cciaBHKP.s:242 .text.HAL_FLASH_EndOfOperationCallback:0000000000000000 HAL_FLASH_EndOfOperationCallback + /tmp/cciaBHKP.s:257 .text.HAL_FLASH_OperationErrorCallback:0000000000000000 $t + /tmp/cciaBHKP.s:264 .text.HAL_FLASH_OperationErrorCallback:0000000000000000 HAL_FLASH_OperationErrorCallback + /tmp/cciaBHKP.s:279 .text.HAL_FLASH_IRQHandler:0000000000000000 $t + /tmp/cciaBHKP.s:286 .text.HAL_FLASH_IRQHandler:0000000000000000 HAL_FLASH_IRQHandler + /tmp/cciaBHKP.s:532 .text.HAL_FLASH_IRQHandler:0000000000000148 $d + /tmp/cciaBHKP.s:539 .text.HAL_FLASH_Unlock:0000000000000000 $t + /tmp/cciaBHKP.s:546 .text.HAL_FLASH_Unlock:0000000000000000 HAL_FLASH_Unlock + /tmp/cciaBHKP.s:587 .text.HAL_FLASH_Unlock:0000000000000024 $d + /tmp/cciaBHKP.s:594 .text.HAL_FLASH_Lock:0000000000000000 $t + /tmp/cciaBHKP.s:601 .text.HAL_FLASH_Lock:0000000000000000 HAL_FLASH_Lock + /tmp/cciaBHKP.s:621 .text.HAL_FLASH_Lock:0000000000000010 $d + /tmp/cciaBHKP.s:626 .text.HAL_FLASH_OB_Unlock:0000000000000000 $t + /tmp/cciaBHKP.s:633 .text.HAL_FLASH_OB_Unlock:0000000000000000 HAL_FLASH_OB_Unlock + /tmp/cciaBHKP.s:665 .text.HAL_FLASH_OB_Unlock:000000000000001c $d + /tmp/cciaBHKP.s:672 .text.HAL_FLASH_OB_Lock:0000000000000000 $t + /tmp/cciaBHKP.s:679 .text.HAL_FLASH_OB_Lock:0000000000000000 HAL_FLASH_OB_Lock + /tmp/cciaBHKP.s:699 .text.HAL_FLASH_OB_Lock:0000000000000010 $d + /tmp/cciaBHKP.s:705 .text.HAL_FLASH_GetError:0000000000000000 $t + /tmp/cciaBHKP.s:712 .text.HAL_FLASH_GetError:0000000000000000 HAL_FLASH_GetError + /tmp/cciaBHKP.s:728 .text.HAL_FLASH_GetError:0000000000000008 $d + /tmp/cciaBHKP.s:733 .text.FLASH_WaitForLastOperation:0000000000000000 $t + /tmp/cciaBHKP.s:740 .text.FLASH_WaitForLastOperation:0000000000000000 FLASH_WaitForLastOperation + /tmp/cciaBHKP.s:827 .text.FLASH_WaitForLastOperation:0000000000000058 $d + /tmp/cciaBHKP.s:832 .text.HAL_FLASH_Program:0000000000000000 $t + /tmp/cciaBHKP.s:839 .text.HAL_FLASH_Program:0000000000000000 HAL_FLASH_Program + /tmp/cciaBHKP.s:977 .text.HAL_FLASH_Program:0000000000000094 $d + /tmp/cciaBHKP.s:984 .text.HAL_FLASH_OB_Launch:0000000000000000 $t + /tmp/cciaBHKP.s:991 .text.HAL_FLASH_OB_Launch:0000000000000000 HAL_FLASH_OB_Launch + /tmp/cciaBHKP.s:1019 .text.HAL_FLASH_OB_Launch:0000000000000018 $d + +UNDEFINED SYMBOLS +FLASH_PageErase +HAL_GetTick diff --git a/fw/midi-dials/build/stm32f0xx_hal_flash.o b/fw/midi-dials/build/stm32f0xx_hal_flash.o Binary files differnew file mode 100644 index 0000000..e7a6e29 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_flash.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_flash_ex.d b/fw/midi-dials/build/stm32f0xx_hal_flash_ex.d new file mode 100644 index 0000000..00a2763 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_flash_ex.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_flash_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_flash_ex.lst b/fw/midi-dials/build/stm32f0xx_hal_flash_ex.lst new file mode 100644 index 0000000..a53c7a1 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_flash_ex.lst @@ -0,0 +1,2711 @@ +ARM GAS /tmp/ccTbyH39.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_flash_ex.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.FLASH_MassErase,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 FLASH_MassErase: + 23 .LFB46: + 24 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @file stm32f0xx_hal_flash_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Extended FLASH HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * functionalities of the FLASH peripheral: + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + Extended Initialization/de-initialization functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + Extended I/O operation functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + Extended Peripheral Control functions + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @verbatim + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### Flash peripheral extended features ##### + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### How to use this driver ##### + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] This driver provides functions to configure and program the FLASH memory + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** of all STM32F0xxx devices. It includes + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (++) Set/Reset the write protection + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (++) Program the user Option Bytes + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (++) Get the Read protection Level + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @endverbatim + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ****************************************************************************** + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @attention + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * All rights reserved.</center></h2> + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This software component is licensed by ST under BSD 3-Clause license, + ARM GAS /tmp/ccTbyH39.s page 2 + + + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * the "License"; You may not use this file except in compliance with the + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * License. You may obtain a copy of the License at: + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * opensource.org/licenses/BSD-3-Clause + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ****************************************************************************** + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Includes ------------------------------------------------------------------*/ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #include "stm32f0xx_hal.h" + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #ifdef HAL_FLASH_MODULE_ENABLED + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Variables + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Variables used for Erase pages under interruption*/ + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** extern FLASH_ProcessTypeDef pFlash; + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx FLASHEx + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief FLASH HAL Extension module driver + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private define ------------------------------------------------------------*/ + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #define FLASH_POSITION_IWDGSW_BIT 8U + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA0_BIT 16U + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #define FLASH_POSITION_OB_USERDATA1_BIT 24U + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private macro -------------------------------------------------------------*/ + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private variables ---------------------------------------------------------*/ + ARM GAS /tmp/ccTbyH39.s page 3 + + + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Erase operations */ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static void FLASH_MassErase(void); + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress); + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Option bytes control */ + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage); + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage); + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel); + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig); + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data); + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void); + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void); + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void); + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief FLASH Memory Erasing functions + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @verbatim + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### FLASH Erasing Programming functions ##### + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] The FLASH Memory Erasing functions, includes the following functions: + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (+) @ref HAL_FLASHEx_Erase: return only when erase has been done + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (+) @ref HAL_FLASHEx_Erase_IT: end of erase is done when @ref HAL_FLASH_EndOfOperationCallback + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** is called with parameter 0xFFFFFFFF + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] Any operation of erase should follow these steps: + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (#) Call the @ref HAL_FLASH_Unlock() function to enable the flash control register and + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** program memory access. + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (#) Call the desired function to erase page. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (#) Call the @ref HAL_FLASH_Lock() to disable the flash program memory access + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** (recommended to protect the FLASH memory against possible unwanted operation). + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @endverbatim + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * must be called before. + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + ARM GAS /tmp/ccTbyH39.s page 4 + + + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param[out] PageError pointer to variable that + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information on faulty page in case of error + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (0xFFFFFFFF means that all the pages have been correctly erased) + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError) + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Locked */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Mass Erase requested for Bank1 */ + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Mass erase to be done*/ + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the MER Bit */ + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_MER); + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Page Erase is requested */ + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Page Erase requested on address located on bank1 */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Initialization of PageError variable*/ + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *PageError = 0xFFFFFFFFU; + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Erase page by page to be done*/ + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** for(address = pEraseInit->PageAddress; + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_PageErase(address); + ARM GAS /tmp/ccTbyH39.s page 5 + + + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the PER Bit */ + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_PER); + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* In case of error, stop erase procedure and return the faulty address */ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *PageError = address; + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** break; + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * must be called before. + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Call the @ref HAL_FLASH_Lock() to disable the flash memory access + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (recommended to protect the FLASH memory against possible unwanted operation) + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the erasing. + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit) + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Locked */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If procedure already ongoing, reject the next one */ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE) + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return HAL_ERROR; + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase)); + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable End of FLASH Operation and Error source interrupts */ + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR); + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE) + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Mass erase to be done*/ + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE; + ARM GAS /tmp/ccTbyH39.s page 6 + + + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Erase by page to be done*/ + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress)); + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages)); + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE; + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Erase 1st page and wait for IT*/ + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_PageErase(pEraseInit->PageAddress); + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Option Bytes Programming functions + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @verbatim + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ##### Option Bytes Programming functions ##### + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** ============================================================================== + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** [..] + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** This subsection provides a set of functions allowing to control the FLASH + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** option bytes operations. + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** @endverbatim + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Erases the FLASH option bytes. + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note This functions erases all option bytes except the Read protection (RDP). + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (system reset will occur) + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBErase(void) + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get the actual read protection Option Byte value */ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** rdptmp = FLASH_OB_GetRDP(); + ARM GAS /tmp/ccTbyH39.s page 7 + + + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Restore the last read protection Option Byte value */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(rdptmp); + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the erase status */ + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Program option bytes + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (system reset will occur) + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL_StatusTypeDef HAL Status + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit) + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Locked */ + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_LOCK(&pFlash); + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OPTIONBYTE(pOBInit->OptionType)); + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Write protection configuration */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP) + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_WRPSTATE(pOBInit->WRPState)); + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (pOBInit->WRPState == OB_WRPSTATE_ENABLE) + ARM GAS /tmp/ccTbyH39.s page 8 + + + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable of Write protection on the selected page */ + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_EnableWRP(pOBInit->WRPPage); + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Disable of Write protection on the selected page */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_DisableWRP(pOBInit->WRPPage); + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Read protection configuration */ + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP) + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel); + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* USER configuration */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER) + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_UserConfig(pOBInit->USERConfig); + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* DATA configuration*/ + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA) + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Process Unlocked */ + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash); + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + ARM GAS /tmp/ccTbyH39.s page 9 + + + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Get the Option byte configuration + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param pOBInit pointer to an FLASH_OBInitStruct structure that + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * contains the configuration information for the programming. + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval None + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit) + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Get WRP*/ + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->WRPPage = FLASH_OB_GetWRP(); + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Get RDP Level*/ + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->RDPLevel = FLASH_OB_GetRDP(); + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /*Get USER*/ + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->USERConfig = FLASH_OB_GetUser(); + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Get the Option byte user data + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param DATAAdress Address of the option byte DATA + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA0 + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_DATA_ADDRESS_DATA1 + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval Value programmed in USER data + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress) + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t value = 0U; + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (DATAAdress == OB_DATA_ADDRESS_DATA0) + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data0 */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA0) >> FLASH_POSITION_OB_USERDATA0_BIT; + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get value programmed in OB USER Data1 */ + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA1) >> FLASH_POSITION_OB_USERDATA1_BIT; + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return value; + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/ccTbyH39.s page 10 + + + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASHEx_Private_Functions + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Full erase of FLASH memory Bank + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval None + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static void FLASH_MassErase(void) + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 25 .loc 1 501 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 0 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 @ link register save eliminated. + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 30 .loc 1 503 0 + 31 0000 064B ldr r3, .L2 + 32 0002 0022 movs r2, #0 + 33 0004 DA61 str r2, [r3, #28] + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Only bank1 will be erased*/ + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_MER); + 34 .loc 1 506 0 + 35 0006 064B ldr r3, .L2+4 + 36 0008 1A69 ldr r2, [r3, #16] + 37 000a 0421 movs r1, #4 + 38 000c 0A43 orrs r2, r1 + 39 000e 1A61 str r2, [r3, #16] + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 40 .loc 1 507 0 + 41 0010 1A69 ldr r2, [r3, #16] + 42 0012 3C31 adds r1, r1, #60 + 43 0014 0A43 orrs r2, r1 + 44 0016 1A61 str r2, [r3, #16] + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 45 .loc 1 508 0 + 46 @ sp needed + 47 0018 7047 bx lr + 48 .L3: + 49 001a C046 .align 2 + 50 .L2: + 51 001c 00000000 .word pFlash + 52 0020 00200240 .word 1073881088 + 53 .cfi_endproc + 54 .LFE46: + 56 .section .text.FLASH_OB_GetWRP,"ax",%progbits + 57 .align 1 + 58 .syntax unified + 59 .code 16 + 60 .thumb_func + 61 .fpu softvfp + 63 FLASH_OB_GetWRP: + 64 .LFB52: + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/ccTbyH39.s page 11 + + + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Enable the write protection of the desired pages + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write protected. + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage) + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be protected ******/ + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WriteProtectPage = (uint32_t)(~((~FLASH_OB_GetWRP()) | WriteProtectPage)); + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES0TO31MASK) + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK); + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES32TO63MASK) + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U); + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO63MASK) + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO63MASK) >> 24U); + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO127MASK) + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + ARM GAS /tmp/ccTbyH39.s page 12 + + + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable write protection */ + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP0 &= WRP0_Data; + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP1 &= WRP1_Data; + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP2 &= WRP2_Data; + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP3 &= WRP3_Data; + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + ARM GAS /tmp/ccTbyH39.s page 13 + + + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Disable the write protection of the desired pages + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note An option byte erase is done automatically in this function. + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note When the memory read protection level is selected (RDP level = 1), + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * it is not possible to program or erase the flash page i if + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * debug features are connected or boot code is executed in RAM, even if nWRPi = 1 + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param WriteProtectPage specifies the page(s) to be write unprotected. + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage) + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP0_Data = 0xFFFFU; + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP1_Data = 0xFFFFU; + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP2_Data = 0xFFFFU; + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint16_t WRP3_Data = 0xFFFFU; + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_WRP(WriteProtectPage)); + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Get current write protected pages and the new pages to be unprotected ******/ + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WriteProtectPage = (FLASH_OB_GetWRP() | WriteProtectPage); + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES0TO15MASK) + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK); + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES0TO31MASK) + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK); + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES0TO31MASK */ + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES16TO31MASK) + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U); + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES32TO63MASK) + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U); + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO63MASK */ + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES32TO47MASK) + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U); + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP_PAGES48TO63MASK) + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO63MASK) >> 24U); + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO127MASK) + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U); + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES48TO63MASK */ + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + ARM GAS /tmp/ccTbyH39.s page 14 + + + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* To be able to write again option byte, need to perform a option byte erase */ + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = HAL_FLASHEx_OBErase(); + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP0_WRP0) + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(WRP0_Data != 0xFFU) + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP0 |= WRP0_Data; + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP0_WRP0 */ + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP1_WRP1) + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP1_Data != 0xFFU)) + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP1 |= WRP1_Data; + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP1_WRP1 */ + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP2_WRP2) + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP2_Data != 0xFFU)) + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP2 |= WRP2_Data; + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP2_WRP2 */ + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(OB_WRP3_WRP3) + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if((status == HAL_OK) && (WRP3_Data != 0xFFU)) + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->WRP3 |= WRP3_Data; + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP3_WRP3 */ + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + ARM GAS /tmp/ccTbyH39.s page 15 + + + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Set the read protection level. + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param ReadProtectLevel specifies the read protection level. + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note Warning: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0 + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel) + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel)); + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the previous operation is completed, proceed to erase the option bytes */ + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTER); + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the OPTER Bit */ + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER); + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRITE_REG(OB->RDP, ReadProtectLevel); + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + ARM GAS /tmp/ccTbyH39.s page 16 + + + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Program the FLASH User Option Byte. + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param UserConfig The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * For few devices, following option bytes are available: nBOOT0(Bit3) & BOOT_SEL(Bit7). + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig) + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW))); + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST))); + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST))); + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET))); + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_VDDA_ANALOG((UserConfig&OB_VDDA_ANALOG_ON))); + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_SRAM_PARITY((UserConfig&OB_SRAM_PARITY_RESET))); + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(FLASH_OBR_BOOT_SEL) + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT_SEL((UserConfig&OB_BOOT_SEL_SET))); + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_BOOT0((UserConfig&OB_BOOT0_SET))); + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* FLASH_OBR_BOOT_SEL */ + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enable the Option Bytes Programming operation */ + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #if defined(FLASH_OBR_BOOT_SEL) + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->USER = UserConfig; + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #else + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** OB->USER = (UserConfig | 0x88U); + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* if the program operation is completed, disable the OPTPG Bit */ + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Programs a half word at a specified Option Byte Data address. + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interf + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options b + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of t + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * (system reset will occur) + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * Programming of the OB should be performed only after an erase (otherwise PGERR occurs) + ARM GAS /tmp/ccTbyH39.s page 17 + + + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param Address specifies the address to be programmed. + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be 0x1FFFF804 or 0x1FFFF806. + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param Data specifies the data to be programmed. + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval HAL status + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data) + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Check the parameters */ + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** assert_param(IS_OB_DATA_ADDRESS(Address)); + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if(status == HAL_OK) + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Enables the Option Bytes Programming operation */ + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_OPTPG); + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Wait for last operation to be completed */ + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE); + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* If the program operation is completed, disable the OPTPG Bit */ + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG); + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the Option Byte Data Program Status */ + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Return the FLASH Write Protection Option Bytes value. + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval The FLASH Write Protection Option Bytes value + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetWRP(void) + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 65 .loc 1 891 0 + 66 .cfi_startproc + 67 @ args = 0, pretend = 0, frame = 0 + 68 @ frame_needed = 0, uses_anonymous_args = 0 + 69 @ link register save eliminated. + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the FLASH write protection Register value */ + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return (uint32_t)(READ_REG(FLASH->WRPR)); + 70 .loc 1 893 0 + 71 0000 014B ldr r3, .L5 + 72 0002 186A ldr r0, [r3, #32] + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 73 .loc 1 894 0 + 74 @ sp needed + 75 0004 7047 bx lr + 76 .L6: + 77 0006 C046 .align 2 + 78 .L5: + ARM GAS /tmp/ccTbyH39.s page 18 + + + 79 0008 00200240 .word 1073881088 + 80 .cfi_endproc + 81 .LFE52: + 83 .section .text.FLASH_OB_GetRDP,"ax",%progbits + 84 .align 1 + 85 .syntax unified + 86 .code 16 + 87 .thumb_func + 88 .fpu softvfp + 90 FLASH_OB_GetRDP: + 91 .LFB53: + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Returns the FLASH Read Protection level. + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval FLASH RDP level + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * This parameter can be one of the following values: + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_0 No protection + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @arg @ref OB_RDP_LEVEL_2 Full chip protection + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint32_t FLASH_OB_GetRDP(void) + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 92 .loc 1 905 0 + 93 .cfi_startproc + 94 @ args = 0, pretend = 0, frame = 0 + 95 @ frame_needed = 0, uses_anonymous_args = 0 + 96 @ link register save eliminated. + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t tmp_reg; + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Read RDP level bits */ + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** tmp_reg = READ_BIT(FLASH->OBR, (FLASH_OBR_RDPRT1 | FLASH_OBR_RDPRT2)); + 97 .loc 1 909 0 + 98 0000 064B ldr r3, .L12 + 99 0002 DB69 ldr r3, [r3, #28] + 100 0004 0622 movs r2, #6 + 101 .LVL0: + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (tmp_reg == 0U) + 102 .loc 1 911 0 + 103 0006 1A42 tst r2, r3 + 104 0008 05D0 beq .L9 + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return OB_RDP_LEVEL_0; + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else if ((tmp_reg & FLASH_OBR_RDPRT2) == FLASH_OBR_RDPRT2) + 105 .loc 1 915 0 + 106 000a 5B07 lsls r3, r3, #29 + 107 000c 01D4 bmi .L11 + 108 .LVL1: + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return OB_RDP_LEVEL_2; + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** else + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return OB_RDP_LEVEL_1; + 109 .loc 1 921 0 + 110 000e BB20 movs r0, #187 + ARM GAS /tmp/ccTbyH39.s page 19 + + + 111 0010 02E0 b .L7 + 112 .L11: + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 113 .loc 1 917 0 + 114 0012 CC20 movs r0, #204 + 115 0014 00E0 b .L7 + 116 .LVL2: + 117 .L9: + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 118 .loc 1 913 0 + 119 0016 AA20 movs r0, #170 + 120 .LVL3: + 121 .L7: + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 122 .loc 1 923 0 + 123 @ sp needed + 124 0018 7047 bx lr + 125 .L13: + 126 001a C046 .align 2 + 127 .L12: + 128 001c 00200240 .word 1073881088 + 129 .cfi_endproc + 130 .LFE53: + 132 .section .text.FLASH_OB_GetUser,"ax",%progbits + 133 .align 1 + 134 .syntax unified + 135 .code 16 + 136 .thumb_func + 137 .fpu softvfp + 139 FLASH_OB_GetUser: + 140 .LFB54: + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value. + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval The FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1), RST_STDBY(Bit2), nB + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * VDDA_Analog_Monitoring(Bit5) and SRAM_Parity_Enable(Bit6). + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * For few devices, following option bytes are available: nBOOT0(Bit3) & BOOT_SEL(Bit7). + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** static uint8_t FLASH_OB_GetUser(void) + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 141 .loc 1 932 0 + 142 .cfi_startproc + 143 @ args = 0, pretend = 0, frame = 0 + 144 @ frame_needed = 0, uses_anonymous_args = 0 + 145 @ link register save eliminated. + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Return the User Option Byte */ + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> FLASH_POSITION_IWDGSW_BIT); + 146 .loc 1 934 0 + 147 0000 024B ldr r3, .L15 + 148 0002 DB69 ldr r3, [r3, #28] + 149 0004 1B0A lsrs r3, r3, #8 + 150 0006 7720 movs r0, #119 + 151 0008 1840 ands r0, r3 + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 152 .loc 1 935 0 + 153 @ sp needed + ARM GAS /tmp/ccTbyH39.s page 20 + + + 154 000a 7047 bx lr + 155 .L16: + 156 .align 2 + 157 .L15: + 158 000c 00200240 .word 1073881088 + 159 .cfi_endproc + 160 .LFE54: + 162 .section .text.FLASH_OB_RDP_LevelConfig,"ax",%progbits + 163 .align 1 + 164 .syntax unified + 165 .code 16 + 166 .thumb_func + 167 .fpu softvfp + 169 FLASH_OB_RDP_LevelConfig: + 170 .LFB49: + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 171 .loc 1 752 0 + 172 .cfi_startproc + 173 @ args = 0, pretend = 0, frame = 0 + 174 @ frame_needed = 0, uses_anonymous_args = 0 + 175 .LVL4: + 176 0000 70B5 push {r4, r5, r6, lr} + 177 .LCFI0: + 178 .cfi_def_cfa_offset 16 + 179 .cfi_offset 4, -16 + 180 .cfi_offset 5, -12 + 181 .cfi_offset 6, -8 + 182 .cfi_offset 14, -4 + 183 0002 0500 movs r5, r0 + 184 .LVL5: + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 185 .loc 1 759 0 + 186 0004 1348 ldr r0, .L20 + 187 .LVL6: + 188 0006 FFF7FEFF bl FLASH_WaitForLastOperation + 189 .LVL7: + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 190 .loc 1 761 0 + 191 000a 0028 cmp r0, #0 + 192 000c 00D0 beq .L19 + 193 .LVL8: + 194 .L18: + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 195 .loc 1 792 0 + 196 @ sp needed + 197 000e 70BD pop {r4, r5, r6, pc} + 198 .L19: + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 199 .loc 1 764 0 + 200 0010 114B ldr r3, .L20+4 + 201 0012 0022 movs r2, #0 + 202 0014 DA61 str r2, [r3, #28] + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 203 .loc 1 767 0 + 204 0016 114C ldr r4, .L20+8 + 205 0018 2369 ldr r3, [r4, #16] + 206 001a 2026 movs r6, #32 + ARM GAS /tmp/ccTbyH39.s page 21 + + + 207 001c 3343 orrs r3, r6 + 208 001e 2361 str r3, [r4, #16] + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 209 .loc 1 768 0 + 210 0020 2369 ldr r3, [r4, #16] + 211 0022 4032 adds r2, r2, #64 + 212 0024 1343 orrs r3, r2 + 213 0026 2361 str r3, [r4, #16] + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 214 .loc 1 771 0 + 215 0028 0A48 ldr r0, .L20 + 216 .LVL9: + 217 002a FFF7FEFF bl FLASH_WaitForLastOperation + 218 .LVL10: + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 219 .loc 1 774 0 + 220 002e 2369 ldr r3, [r4, #16] + 221 0030 B343 bics r3, r6 + 222 0032 2361 str r3, [r4, #16] + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 223 .loc 1 776 0 + 224 0034 0028 cmp r0, #0 + 225 0036 EAD1 bne .L18 + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 226 .loc 1 779 0 + 227 0038 2369 ldr r3, [r4, #16] + 228 003a 103E subs r6, r6, #16 + 229 003c 3343 orrs r3, r6 + 230 003e 2361 str r3, [r4, #16] + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 231 .loc 1 781 0 + 232 0040 ADB2 uxth r5, r5 + 233 0042 074B ldr r3, .L20+12 + 234 0044 1D80 strh r5, [r3] + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 235 .loc 1 784 0 + 236 0046 0348 ldr r0, .L20 + 237 .LVL11: + 238 0048 FFF7FEFF bl FLASH_WaitForLastOperation + 239 .LVL12: + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 240 .loc 1 787 0 + 241 004c 2369 ldr r3, [r4, #16] + 242 004e B343 bics r3, r6 + 243 0050 2361 str r3, [r4, #16] + 244 0052 DCE7 b .L18 + 245 .L21: + 246 .align 2 + 247 .L20: + 248 0054 50C30000 .word 50000 + 249 0058 00000000 .word pFlash + 250 005c 00200240 .word 1073881088 + 251 0060 00F8FF1F .word 536868864 + 252 .cfi_endproc + 253 .LFE49: + 255 .section .text.FLASH_OB_UserConfig,"ax",%progbits + 256 .align 1 + ARM GAS /tmp/ccTbyH39.s page 22 + + + 257 .syntax unified + 258 .code 16 + 259 .thumb_func + 260 .fpu softvfp + 262 FLASH_OB_UserConfig: + 263 .LFB50: + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 264 .loc 1 803 0 + 265 .cfi_startproc + 266 @ args = 0, pretend = 0, frame = 0 + 267 @ frame_needed = 0, uses_anonymous_args = 0 + 268 .LVL13: + 269 0000 70B5 push {r4, r5, r6, lr} + 270 .LCFI1: + 271 .cfi_def_cfa_offset 16 + 272 .cfi_offset 4, -16 + 273 .cfi_offset 5, -12 + 274 .cfi_offset 6, -8 + 275 .cfi_offset 14, -4 + 276 0002 0400 movs r4, r0 + 277 .LVL14: + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 278 .loc 1 819 0 + 279 0004 0C48 ldr r0, .L25 + 280 .LVL15: + 281 0006 FFF7FEFF bl FLASH_WaitForLastOperation + 282 .LVL16: + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 283 .loc 1 821 0 + 284 000a 0028 cmp r0, #0 + 285 000c 00D0 beq .L24 + 286 .LVL17: + 287 .L23: + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 288 .loc 1 843 0 + 289 @ sp needed + 290 000e 70BD pop {r4, r5, r6, pc} + 291 .L24: + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 292 .loc 1 824 0 + 293 0010 0A4B ldr r3, .L25+4 + 294 0012 0022 movs r2, #0 + 295 0014 DA61 str r2, [r3, #28] + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 296 .loc 1 827 0 + 297 0016 0A4D ldr r5, .L25+8 + 298 0018 2B69 ldr r3, [r5, #16] + 299 001a 1026 movs r6, #16 + 300 001c 3343 orrs r3, r6 + 301 001e 2B61 str r3, [r5, #16] + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif + 302 .loc 1 832 0 + 303 0020 7838 subs r0, r0, #120 + 304 .LVL18: + 305 0022 2043 orrs r0, r4 + 306 .LVL19: + 307 0024 C0B2 uxtb r0, r0 + ARM GAS /tmp/ccTbyH39.s page 23 + + + 308 0026 074B ldr r3, .L25+12 + 309 0028 5880 strh r0, [r3, #2] + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 310 .loc 1 836 0 + 311 002a 0348 ldr r0, .L25 + 312 002c FFF7FEFF bl FLASH_WaitForLastOperation + 313 .LVL20: + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 314 .loc 1 839 0 + 315 0030 2B69 ldr r3, [r5, #16] + 316 0032 B343 bics r3, r6 + 317 0034 2B61 str r3, [r5, #16] + 318 0036 EAE7 b .L23 + 319 .L26: + 320 .align 2 + 321 .L25: + 322 0038 50C30000 .word 50000 + 323 003c 00000000 .word pFlash + 324 0040 00200240 .word 1073881088 + 325 0044 00F8FF1F .word 536868864 + 326 .cfi_endproc + 327 .LFE50: + 329 .section .text.FLASH_OB_ProgramData,"ax",%progbits + 330 .align 1 + 331 .syntax unified + 332 .code 16 + 333 .thumb_func + 334 .fpu softvfp + 336 FLASH_OB_ProgramData: + 337 .LFB51: + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 338 .loc 1 858 0 + 339 .cfi_startproc + 340 @ args = 0, pretend = 0, frame = 0 + 341 @ frame_needed = 0, uses_anonymous_args = 0 + 342 .LVL21: + 343 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 344 .LCFI2: + 345 .cfi_def_cfa_offset 24 + 346 .cfi_offset 3, -24 + 347 .cfi_offset 4, -20 + 348 .cfi_offset 5, -16 + 349 .cfi_offset 6, -12 + 350 .cfi_offset 7, -8 + 351 .cfi_offset 14, -4 + 352 0002 0500 movs r5, r0 + 353 0004 0C00 movs r4, r1 + 354 .LVL22: + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 355 .loc 1 865 0 + 356 0006 0B48 ldr r0, .L30 + 357 .LVL23: + 358 0008 FFF7FEFF bl FLASH_WaitForLastOperation + 359 .LVL24: + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 360 .loc 1 867 0 + 361 000c 0028 cmp r0, #0 + ARM GAS /tmp/ccTbyH39.s page 24 + + + 362 000e 00D0 beq .L29 + 363 .LVL25: + 364 .L28: + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 365 .loc 1 884 0 + 366 @ sp needed + 367 .LVL26: + 368 0010 F8BD pop {r3, r4, r5, r6, r7, pc} + 369 .LVL27: + 370 .L29: + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 371 .loc 1 870 0 + 372 0012 094B ldr r3, .L30+4 + 373 0014 0022 movs r2, #0 + 374 0016 DA61 str r2, [r3, #28] + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** *(__IO uint16_t*)Address = Data; + 375 .loc 1 873 0 + 376 0018 084E ldr r6, .L30+8 + 377 001a 3369 ldr r3, [r6, #16] + 378 001c 1027 movs r7, #16 + 379 001e 3B43 orrs r3, r7 + 380 0020 3361 str r3, [r6, #16] + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 381 .loc 1 874 0 + 382 0022 A4B2 uxth r4, r4 + 383 0024 2C80 strh r4, [r5] + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 384 .loc 1 877 0 + 385 0026 0348 ldr r0, .L30 + 386 .LVL28: + 387 0028 FFF7FEFF bl FLASH_WaitForLastOperation + 388 .LVL29: + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 389 .loc 1 880 0 + 390 002c 3369 ldr r3, [r6, #16] + 391 002e BB43 bics r3, r7 + 392 0030 3361 str r3, [r6, #16] + 393 0032 EDE7 b .L28 + 394 .L31: + 395 .align 2 + 396 .L30: + 397 0034 50C30000 .word 50000 + 398 0038 00000000 .word pFlash + 399 003c 00200240 .word 1073881088 + 400 .cfi_endproc + 401 .LFE51: + 403 .section .text.HAL_FLASHEx_OBErase,"ax",%progbits + 404 .align 1 + 405 .global HAL_FLASHEx_OBErase + 406 .syntax unified + 407 .code 16 + 408 .thumb_func + 409 .fpu softvfp + 411 HAL_FLASHEx_OBErase: + 412 .LFB42: + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint8_t rdptmp = OB_RDP_LEVEL_0; + 413 .loc 1 314 0 + ARM GAS /tmp/ccTbyH39.s page 25 + + + 414 .cfi_startproc + 415 @ args = 0, pretend = 0, frame = 0 + 416 @ frame_needed = 0, uses_anonymous_args = 0 + 417 0000 70B5 push {r4, r5, r6, lr} + 418 .LCFI3: + 419 .cfi_def_cfa_offset 16 + 420 .cfi_offset 4, -16 + 421 .cfi_offset 5, -12 + 422 .cfi_offset 6, -8 + 423 .cfi_offset 14, -4 + 424 .LVL30: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 425 .loc 1 319 0 + 426 0002 FFF7FEFF bl FLASH_OB_GetRDP + 427 .LVL31: + 428 0006 C5B2 uxtb r5, r0 + 429 .LVL32: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 430 .loc 1 322 0 + 431 0008 0E48 ldr r0, .L35 + 432 000a FFF7FEFF bl FLASH_WaitForLastOperation + 433 .LVL33: + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 434 .loc 1 324 0 + 435 000e 0028 cmp r0, #0 + 436 0010 00D0 beq .L34 + 437 .LVL34: + 438 .L33: + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 439 .loc 1 348 0 + 440 @ sp needed + 441 .LVL35: + 442 0012 70BD pop {r4, r5, r6, pc} + 443 .LVL36: + 444 .L34: + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 445 .loc 1 327 0 + 446 0014 0C4B ldr r3, .L35+4 + 447 0016 0022 movs r2, #0 + 448 0018 DA61 str r2, [r3, #28] + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 449 .loc 1 330 0 + 450 001a 0C4C ldr r4, .L35+8 + 451 001c 2369 ldr r3, [r4, #16] + 452 001e 2026 movs r6, #32 + 453 0020 3343 orrs r3, r6 + 454 0022 2361 str r3, [r4, #16] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 455 .loc 1 331 0 + 456 0024 2369 ldr r3, [r4, #16] + 457 0026 4032 adds r2, r2, #64 + 458 0028 1343 orrs r3, r2 + 459 002a 2361 str r3, [r4, #16] + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 460 .loc 1 334 0 + 461 002c 0548 ldr r0, .L35 + 462 .LVL37: + ARM GAS /tmp/ccTbyH39.s page 26 + + + 463 002e FFF7FEFF bl FLASH_WaitForLastOperation + 464 .LVL38: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 465 .loc 1 337 0 + 466 0032 2369 ldr r3, [r4, #16] + 467 0034 B343 bics r3, r6 + 468 0036 2361 str r3, [r4, #16] + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 469 .loc 1 339 0 + 470 0038 0028 cmp r0, #0 + 471 003a EAD1 bne .L33 + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 472 .loc 1 342 0 + 473 003c 2800 movs r0, r5 + 474 .LVL39: + 475 003e FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 476 .LVL40: + 477 0042 E6E7 b .L33 + 478 .L36: + 479 .align 2 + 480 .L35: + 481 0044 50C30000 .word 50000 + 482 0048 00000000 .word pFlash + 483 004c 00200240 .word 1073881088 + 484 .cfi_endproc + 485 .LFE42: + 487 .section .text.FLASH_OB_EnableWRP,"ax",%progbits + 488 .align 1 + 489 .syntax unified + 490 .code 16 + 491 .thumb_func + 492 .fpu softvfp + 494 FLASH_OB_EnableWRP: + 495 .LFB47: + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 496 .loc 1 522 0 + 497 .cfi_startproc + 498 @ args = 0, pretend = 0, frame = 0 + 499 @ frame_needed = 0, uses_anonymous_args = 0 + 500 .LVL41: + 501 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 502 .LCFI4: + 503 .cfi_def_cfa_offset 24 + 504 .cfi_offset 3, -24 + 505 .cfi_offset 4, -20 + 506 .cfi_offset 5, -16 + 507 .cfi_offset 6, -12 + 508 .cfi_offset 7, -8 + 509 .cfi_offset 14, -4 + 510 0002 0400 movs r4, r0 + 511 .LVL42: + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 512 .loc 1 539 0 + 513 0004 FFF7FEFF bl FLASH_OB_GetWRP + 514 .LVL43: + 515 0008 C043 mvns r0, r0 + 516 000a 0443 orrs r4, r0 + ARM GAS /tmp/ccTbyH39.s page 27 + + + 517 .LVL44: + 518 000c E443 mvns r4, r4 + 519 .LVL45: + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES0TO31MASK) + 520 .loc 1 542 0 + 521 000e FF25 movs r5, #255 + 522 0010 2700 movs r7, r4 + 523 0012 2F40 ands r7, r5 + 524 .LVL46: + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES32TO63MASK) + 525 .loc 1 548 0 + 526 0014 260A lsrs r6, r4, #8 + 527 0016 2E40 ands r6, r5 + 528 .LVL47: + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 529 .loc 1 554 0 + 530 0018 230C lsrs r3, r4, #16 + 531 001a 1D40 ands r5, r3 + 532 .LVL48: + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO127MASK) + 533 .loc 1 558 0 + 534 001c 240E lsrs r4, r4, #24 + 535 .LVL49: + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 536 .loc 1 564 0 + 537 001e 2348 ldr r0, .L48 + 538 .LVL50: + 539 0020 FFF7FEFF bl FLASH_WaitForLastOperation + 540 .LVL51: + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 541 .loc 1 566 0 + 542 0024 0028 cmp r0, #0 + 543 0026 00D0 beq .L43 + 544 .LVL52: + 545 .L38: + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 546 .loc 1 624 0 + 547 @ sp needed + 548 .LVL53: + 549 0028 F8BD pop {r3, r4, r5, r6, r7, pc} + 550 .LVL54: + 551 .L43: + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 552 .loc 1 569 0 + 553 002a 214B ldr r3, .L48+4 + 554 002c 0022 movs r2, #0 + 555 002e DA61 str r2, [r3, #28] + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 556 .loc 1 572 0 + 557 0030 FFF7FEFF bl HAL_FLASHEx_OBErase + 558 .LVL55: + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 559 .loc 1 573 0 + 560 0034 0028 cmp r0, #0 + 561 0036 F7D1 bne .L38 + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 562 .loc 1 576 0 + ARM GAS /tmp/ccTbyH39.s page 28 + + + 563 0038 1E4A ldr r2, .L48+8 + 564 003a 1369 ldr r3, [r2, #16] + 565 003c 1021 movs r1, #16 + 566 003e 0B43 orrs r3, r1 + 567 0040 1361 str r3, [r2, #16] + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 568 .loc 1 579 0 + 569 0042 FF2F cmp r7, #255 + 570 0044 11D1 bne .L44 + 571 .LVL56: + 572 .L39: + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 573 .loc 1 589 0 + 574 0046 0028 cmp r0, #0 + 575 0048 01D1 bne .L40 + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 576 .loc 1 589 0 is_stmt 0 discriminator 1 + 577 004a FF2E cmp r6, #255 + 578 004c 15D1 bne .L45 + 579 .LVL57: + 580 .L40: + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 581 .loc 1 599 0 is_stmt 1 + 582 004e 0028 cmp r0, #0 + 583 0050 01D1 bne .L41 + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 584 .loc 1 599 0 is_stmt 0 discriminator 1 + 585 0052 FF2D cmp r5, #255 + 586 0054 19D1 bne .L46 + 587 .LVL58: + 588 .L41: + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 589 .loc 1 609 0 is_stmt 1 + 590 0056 0028 cmp r0, #0 + 591 0058 01D1 bne .L42 + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 592 .loc 1 609 0 is_stmt 0 discriminator 1 + 593 005a FF2C cmp r4, #255 + 594 005c 1DD1 bne .L47 + 595 .LVL59: + 596 .L42: + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 597 .loc 1 619 0 is_stmt 1 + 598 005e 154A ldr r2, .L48+8 + 599 0060 1369 ldr r3, [r2, #16] + 600 0062 1021 movs r1, #16 + 601 0064 8B43 bics r3, r1 + 602 0066 1361 str r3, [r2, #16] + 603 0068 DEE7 b .L38 + 604 .LVL60: + 605 .L44: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 606 .loc 1 581 0 + 607 006a 134A ldr r2, .L48+12 + 608 006c 1389 ldrh r3, [r2, #8] + 609 006e 1F40 ands r7, r3 + 610 .LVL61: + ARM GAS /tmp/ccTbyH39.s page 29 + + + 611 0070 1781 strh r7, [r2, #8] + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 612 .loc 1 584 0 + 613 0072 0E48 ldr r0, .L48 + 614 .LVL62: + 615 0074 FFF7FEFF bl FLASH_WaitForLastOperation + 616 .LVL63: + 617 0078 E5E7 b .L39 + 618 .L45: + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 619 .loc 1 591 0 + 620 007a 0F4A ldr r2, .L48+12 + 621 007c 5389 ldrh r3, [r2, #10] + 622 007e 1E40 ands r6, r3 + 623 .LVL64: + 624 0080 5681 strh r6, [r2, #10] + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 625 .loc 1 594 0 + 626 0082 0A48 ldr r0, .L48 + 627 .LVL65: + 628 0084 FFF7FEFF bl FLASH_WaitForLastOperation + 629 .LVL66: + 630 0088 E1E7 b .L40 + 631 .L46: + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 632 .loc 1 601 0 + 633 008a 0B4A ldr r2, .L48+12 + 634 008c 9389 ldrh r3, [r2, #12] + 635 008e 1D40 ands r5, r3 + 636 .LVL67: + 637 0090 9581 strh r5, [r2, #12] + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 638 .loc 1 604 0 + 639 0092 0648 ldr r0, .L48 + 640 .LVL68: + 641 0094 FFF7FEFF bl FLASH_WaitForLastOperation + 642 .LVL69: + 643 0098 DDE7 b .L41 + 644 .L47: + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 645 .loc 1 611 0 + 646 009a 074B ldr r3, .L48+12 + 647 009c D889 ldrh r0, [r3, #14] + 648 .LVL70: + 649 009e 2040 ands r0, r4 + 650 00a0 D881 strh r0, [r3, #14] + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 651 .loc 1 614 0 + 652 00a2 0248 ldr r0, .L48 + 653 00a4 FFF7FEFF bl FLASH_WaitForLastOperation + 654 .LVL71: + 655 00a8 D9E7 b .L42 + 656 .L49: + 657 00aa C046 .align 2 + 658 .L48: + 659 00ac 50C30000 .word 50000 + 660 00b0 00000000 .word pFlash + ARM GAS /tmp/ccTbyH39.s page 30 + + + 661 00b4 00200240 .word 1073881088 + 662 00b8 00F8FF1F .word 536868864 + 663 .cfi_endproc + 664 .LFE47: + 666 .section .text.FLASH_OB_DisableWRP,"ax",%progbits + 667 .align 1 + 668 .syntax unified + 669 .code 16 + 670 .thumb_func + 671 .fpu softvfp + 673 FLASH_OB_DisableWRP: + 674 .LFB48: + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 675 .loc 1 638 0 + 676 .cfi_startproc + 677 @ args = 0, pretend = 0, frame = 0 + 678 @ frame_needed = 0, uses_anonymous_args = 0 + 679 .LVL72: + 680 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 681 .LCFI5: + 682 .cfi_def_cfa_offset 24 + 683 .cfi_offset 3, -24 + 684 .cfi_offset 4, -20 + 685 .cfi_offset 5, -16 + 686 .cfi_offset 6, -12 + 687 .cfi_offset 7, -8 + 688 .cfi_offset 14, -4 + 689 0002 0400 movs r4, r0 + 690 .LVL73: + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 691 .loc 1 655 0 + 692 0004 FFF7FEFF bl FLASH_OB_GetWRP + 693 .LVL74: + 694 0008 0443 orrs r4, r0 + 695 .LVL75: + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES0TO31MASK) + 696 .loc 1 658 0 + 697 000a FF25 movs r5, #255 + 698 000c 2700 movs r7, r4 + 699 000e 2F40 ands r7, r5 + 700 .LVL76: + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES32TO63MASK) + 701 .loc 1 664 0 + 702 0010 260A lsrs r6, r4, #8 + 703 0012 2E40 ands r6, r5 + 704 .LVL77: + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #endif /* OB_WRP_PAGES32TO47MASK */ + 705 .loc 1 670 0 + 706 0014 230C lsrs r3, r4, #16 + 707 0016 1D40 ands r5, r3 + 708 .LVL78: + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** #elif defined(OB_WRP_PAGES48TO127MASK) + 709 .loc 1 674 0 + 710 0018 240E lsrs r4, r4, #24 + 711 .LVL79: + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 712 .loc 1 681 0 + ARM GAS /tmp/ccTbyH39.s page 31 + + + 713 001a 2348 ldr r0, .L61 + 714 .LVL80: + 715 001c FFF7FEFF bl FLASH_WaitForLastOperation + 716 .LVL81: + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 717 .loc 1 683 0 + 718 0020 0028 cmp r0, #0 + 719 0022 00D0 beq .L56 + 720 .LVL82: + 721 .L51: + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 722 .loc 1 739 0 + 723 @ sp needed + 724 .LVL83: + 725 0024 F8BD pop {r3, r4, r5, r6, r7, pc} + 726 .LVL84: + 727 .L56: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 728 .loc 1 686 0 + 729 0026 214B ldr r3, .L61+4 + 730 0028 0022 movs r2, #0 + 731 002a DA61 str r2, [r3, #28] + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status == HAL_OK) + 732 .loc 1 689 0 + 733 002c FFF7FEFF bl HAL_FLASHEx_OBErase + 734 .LVL85: + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 735 .loc 1 690 0 + 736 0030 0028 cmp r0, #0 + 737 0032 F7D1 bne .L51 + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 738 .loc 1 692 0 + 739 0034 1E4A ldr r2, .L61+8 + 740 0036 1369 ldr r3, [r2, #16] + 741 0038 1021 movs r1, #16 + 742 003a 0B43 orrs r3, r1 + 743 003c 1361 str r3, [r2, #16] + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 744 .loc 1 695 0 + 745 003e FF2F cmp r7, #255 + 746 0040 11D1 bne .L57 + 747 .LVL86: + 748 .L52: + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 749 .loc 1 705 0 + 750 0042 0028 cmp r0, #0 + 751 0044 01D1 bne .L53 + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 752 .loc 1 705 0 is_stmt 0 discriminator 1 + 753 0046 FF2E cmp r6, #255 + 754 0048 15D1 bne .L58 + 755 .LVL87: + 756 .L53: + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 757 .loc 1 715 0 is_stmt 1 + 758 004a 0028 cmp r0, #0 + 759 004c 01D1 bne .L54 + ARM GAS /tmp/ccTbyH39.s page 32 + + + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 760 .loc 1 715 0 is_stmt 0 discriminator 1 + 761 004e FF2D cmp r5, #255 + 762 0050 19D1 bne .L59 + 763 .LVL88: + 764 .L54: + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 765 .loc 1 725 0 is_stmt 1 + 766 0052 0028 cmp r0, #0 + 767 0054 01D1 bne .L55 + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 768 .loc 1 725 0 is_stmt 0 discriminator 1 + 769 0056 FF2C cmp r4, #255 + 770 0058 1DD1 bne .L60 + 771 .LVL89: + 772 .L55: + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 773 .loc 1 735 0 is_stmt 1 + 774 005a 154A ldr r2, .L61+8 + 775 005c 1369 ldr r3, [r2, #16] + 776 005e 1021 movs r1, #16 + 777 0060 8B43 bics r3, r1 + 778 0062 1361 str r3, [r2, #16] + 779 0064 DEE7 b .L51 + 780 .LVL90: + 781 .L57: + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 782 .loc 1 697 0 + 783 0066 134A ldr r2, .L61+12 + 784 0068 1389 ldrh r3, [r2, #8] + 785 006a 1F43 orrs r7, r3 + 786 .LVL91: + 787 006c 1781 strh r7, [r2, #8] + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 788 .loc 1 700 0 + 789 006e 0E48 ldr r0, .L61 + 790 .LVL92: + 791 0070 FFF7FEFF bl FLASH_WaitForLastOperation + 792 .LVL93: + 793 0074 E5E7 b .L52 + 794 .L58: + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 795 .loc 1 707 0 + 796 0076 0F4A ldr r2, .L61+12 + 797 0078 5389 ldrh r3, [r2, #10] + 798 007a 1E43 orrs r6, r3 + 799 .LVL94: + 800 007c 5681 strh r6, [r2, #10] + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 801 .loc 1 710 0 + 802 007e 0A48 ldr r0, .L61 + 803 .LVL95: + 804 0080 FFF7FEFF bl FLASH_WaitForLastOperation + 805 .LVL96: + 806 0084 E1E7 b .L53 + 807 .L59: + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + ARM GAS /tmp/ccTbyH39.s page 33 + + + 808 .loc 1 717 0 + 809 0086 0B4A ldr r2, .L61+12 + 810 0088 9389 ldrh r3, [r2, #12] + 811 008a 1D43 orrs r5, r3 + 812 .LVL97: + 813 008c 9581 strh r5, [r2, #12] + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 814 .loc 1 720 0 + 815 008e 0648 ldr r0, .L61 + 816 .LVL98: + 817 0090 FFF7FEFF bl FLASH_WaitForLastOperation + 818 .LVL99: + 819 0094 DDE7 b .L54 + 820 .L60: + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 821 .loc 1 727 0 + 822 0096 074B ldr r3, .L61+12 + 823 0098 D889 ldrh r0, [r3, #14] + 824 .LVL100: + 825 009a 2043 orrs r0, r4 + 826 009c D881 strh r0, [r3, #14] + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 827 .loc 1 730 0 + 828 009e 0248 ldr r0, .L61 + 829 00a0 FFF7FEFF bl FLASH_WaitForLastOperation + 830 .LVL101: + 831 00a4 D9E7 b .L55 + 832 .L62: + 833 00a6 C046 .align 2 + 834 .L61: + 835 00a8 50C30000 .word 50000 + 836 00ac 00000000 .word pFlash + 837 00b0 00200240 .word 1073881088 + 838 00b4 00F8FF1F .word 536868864 + 839 .cfi_endproc + 840 .LFE48: + 842 .section .text.HAL_FLASHEx_OBProgram,"ax",%progbits + 843 .align 1 + 844 .global HAL_FLASHEx_OBProgram + 845 .syntax unified + 846 .code 16 + 847 .thumb_func + 848 .fpu softvfp + 850 HAL_FLASHEx_OBProgram: + 851 .LFB43: + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 852 .loc 1 363 0 + 853 .cfi_startproc + 854 @ args = 0, pretend = 0, frame = 0 + 855 @ frame_needed = 0, uses_anonymous_args = 0 + 856 .LVL102: + 857 0000 10B5 push {r4, lr} + 858 .LCFI6: + 859 .cfi_def_cfa_offset 8 + 860 .cfi_offset 4, -8 + 861 .cfi_offset 14, -4 + 862 0002 0400 movs r4, r0 + ARM GAS /tmp/ccTbyH39.s page 34 + + + 863 .LVL103: + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 864 .loc 1 367 0 + 865 0004 224B ldr r3, .L77 + 866 0006 1B7E ldrb r3, [r3, #24] + 867 0008 012B cmp r3, #1 + 868 000a 3FD0 beq .L71 + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 869 .loc 1 367 0 is_stmt 0 discriminator 2 + 870 000c 0123 movs r3, #1 + 871 000e 204A ldr r2, .L77 + 872 0010 1376 strb r3, [r2, #24] + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 873 .loc 1 373 0 is_stmt 1 discriminator 2 + 874 0012 0268 ldr r2, [r0] + 875 0014 1342 tst r3, r2 + 876 0016 0FD0 beq .L72 + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 877 .loc 1 376 0 + 878 0018 4368 ldr r3, [r0, #4] + 879 001a 012B cmp r3, #1 + 880 001c 08D0 beq .L73 + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 881 .loc 1 384 0 + 882 001e 8068 ldr r0, [r0, #8] + 883 .LVL104: + 884 0020 FFF7FEFF bl FLASH_OB_DisableWRP + 885 .LVL105: + 886 .L67: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 887 .loc 1 386 0 + 888 0024 0028 cmp r0, #0 + 889 0026 08D0 beq .L65 + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 890 .loc 1 389 0 + 891 0028 194B ldr r3, .L77 + 892 002a 0022 movs r2, #0 + 893 002c 1A76 strb r2, [r3, #24] + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 894 .loc 1 390 0 + 895 002e 10E0 b .L64 + 896 .LVL106: + 897 .L73: + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 898 .loc 1 379 0 + 899 0030 8068 ldr r0, [r0, #8] + 900 .LVL107: + 901 0032 FFF7FEFF bl FLASH_OB_EnableWRP + 902 .LVL108: + 903 0036 F5E7 b .L67 + 904 .LVL109: + 905 .L72: + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 906 .loc 1 364 0 + 907 0038 0120 movs r0, #1 + 908 .LVL110: + 909 .L65: + ARM GAS /tmp/ccTbyH39.s page 35 + + + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 910 .loc 1 395 0 + 911 003a 2368 ldr r3, [r4] + 912 003c 9B07 lsls r3, r3, #30 + 913 003e 09D4 bmi .L74 + 914 .LVL111: + 915 .L68: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 916 .loc 1 407 0 + 917 0040 2368 ldr r3, [r4] + 918 0042 5B07 lsls r3, r3, #29 + 919 0044 0FD4 bmi .L75 + 920 .LVL112: + 921 .L69: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 922 .loc 1 419 0 + 923 0046 2368 ldr r3, [r4] + 924 0048 1B07 lsls r3, r3, #28 + 925 004a 15D4 bmi .L76 + 926 .LVL113: + 927 .L70: + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 928 .loc 1 431 0 + 929 004c 104B ldr r3, .L77 + 930 004e 0022 movs r2, #0 + 931 0050 1A76 strb r2, [r3, #24] + 932 .LVL114: + 933 .L64: + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 934 .loc 1 434 0 + 935 @ sp needed + 936 .LVL115: + 937 0052 10BD pop {r4, pc} + 938 .LVL116: + 939 .L74: + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 940 .loc 1 397 0 + 941 0054 207B ldrb r0, [r4, #12] + 942 .LVL117: + 943 0056 FFF7FEFF bl FLASH_OB_RDP_LevelConfig + 944 .LVL118: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 945 .loc 1 398 0 + 946 005a 0028 cmp r0, #0 + 947 005c F0D0 beq .L68 + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 948 .loc 1 401 0 + 949 005e 0C4B ldr r3, .L77 + 950 0060 0022 movs r2, #0 + 951 0062 1A76 strb r2, [r3, #24] + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 952 .loc 1 402 0 + 953 0064 F5E7 b .L64 + 954 .L75: + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 955 .loc 1 409 0 + 956 0066 607B ldrb r0, [r4, #13] + ARM GAS /tmp/ccTbyH39.s page 36 + + + 957 .LVL119: + 958 0068 FFF7FEFF bl FLASH_OB_UserConfig + 959 .LVL120: + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 960 .loc 1 410 0 + 961 006c 0028 cmp r0, #0 + 962 006e EAD0 beq .L69 + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 963 .loc 1 413 0 + 964 0070 074B ldr r3, .L77 + 965 0072 0022 movs r2, #0 + 966 0074 1A76 strb r2, [r3, #24] + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 967 .loc 1 414 0 + 968 0076 ECE7 b .L64 + 969 .L76: + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** if (status != HAL_OK) + 970 .loc 1 421 0 + 971 0078 2069 ldr r0, [r4, #16] + 972 .LVL121: + 973 007a 217D ldrb r1, [r4, #20] + 974 007c FFF7FEFF bl FLASH_OB_ProgramData + 975 .LVL122: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 976 .loc 1 422 0 + 977 0080 0028 cmp r0, #0 + 978 0082 E3D0 beq .L70 + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** return status; + 979 .loc 1 425 0 + 980 0084 024B ldr r3, .L77 + 981 0086 0022 movs r2, #0 + 982 0088 1A76 strb r2, [r3, #24] + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 983 .loc 1 426 0 + 984 008a E2E7 b .L64 + 985 .LVL123: + 986 .L71: + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 987 .loc 1 367 0 + 988 008c 0220 movs r0, #2 + 989 .LVL124: + 990 008e E0E7 b .L64 + 991 .L78: + 992 .align 2 + 993 .L77: + 994 0090 00000000 .word pFlash + 995 .cfi_endproc + 996 .LFE43: + 998 .section .text.HAL_FLASHEx_OBGetConfig,"ax",%progbits + 999 .align 1 + 1000 .global HAL_FLASHEx_OBGetConfig + 1001 .syntax unified + 1002 .code 16 + 1003 .thumb_func + 1004 .fpu softvfp + 1006 HAL_FLASHEx_OBGetConfig: + 1007 .LFB44: + ARM GAS /tmp/ccTbyH39.s page 37 + + + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER; + 1008 .loc 1 444 0 + 1009 .cfi_startproc + 1010 @ args = 0, pretend = 0, frame = 0 + 1011 @ frame_needed = 0, uses_anonymous_args = 0 + 1012 .LVL125: + 1013 0000 10B5 push {r4, lr} + 1014 .LCFI7: + 1015 .cfi_def_cfa_offset 8 + 1016 .cfi_offset 4, -8 + 1017 .cfi_offset 14, -4 + 1018 0002 0400 movs r4, r0 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1019 .loc 1 445 0 + 1020 0004 0723 movs r3, #7 + 1021 0006 0360 str r3, [r0] + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1022 .loc 1 448 0 + 1023 0008 FFF7FEFF bl FLASH_OB_GetWRP + 1024 .LVL126: + 1025 000c A060 str r0, [r4, #8] + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1026 .loc 1 451 0 + 1027 000e FFF7FEFF bl FLASH_OB_GetRDP + 1028 .LVL127: + 1029 0012 2073 strb r0, [r4, #12] + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1030 .loc 1 454 0 + 1031 0014 FFF7FEFF bl FLASH_OB_GetUser + 1032 .LVL128: + 1033 0018 6073 strb r0, [r4, #13] + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1034 .loc 1 455 0 + 1035 @ sp needed + 1036 .LVL129: + 1037 001a 10BD pop {r4, pc} + 1038 .cfi_endproc + 1039 .LFE44: + 1041 .section .text.HAL_FLASHEx_OBGetUserData,"ax",%progbits + 1042 .align 1 + 1043 .global HAL_FLASHEx_OBGetUserData + 1044 .syntax unified + 1045 .code 16 + 1046 .thumb_func + 1047 .fpu softvfp + 1049 HAL_FLASHEx_OBGetUserData: + 1050 .LFB45: + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t value = 0U; + 1051 .loc 1 466 0 + 1052 .cfi_startproc + 1053 @ args = 0, pretend = 0, frame = 0 + 1054 @ frame_needed = 0, uses_anonymous_args = 0 + 1055 @ link register save eliminated. + 1056 .LVL130: + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1057 .loc 1 469 0 + 1058 0000 064B ldr r3, .L84 + ARM GAS /tmp/ccTbyH39.s page 38 + + + 1059 0002 9842 cmp r0, r3 + 1060 0004 03D0 beq .L83 + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1061 .loc 1 477 0 + 1062 0006 064B ldr r3, .L84+4 + 1063 0008 D869 ldr r0, [r3, #28] + 1064 .LVL131: + 1065 000a 000E lsrs r0, r0, #24 + 1066 .LVL132: + 1067 .L80: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1068 .loc 1 481 0 + 1069 @ sp needed + 1070 000c 7047 bx lr + 1071 .LVL133: + 1072 .L83: + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1073 .loc 1 472 0 + 1074 000e 044B ldr r3, .L84+4 + 1075 0010 DB69 ldr r3, [r3, #28] + 1076 0012 1B0C lsrs r3, r3, #16 + 1077 0014 FF20 movs r0, #255 + 1078 .LVL134: + 1079 0016 1840 ands r0, r3 + 1080 .LVL135: + 1081 0018 F8E7 b .L80 + 1082 .L85: + 1083 001a C046 .align 2 + 1084 .L84: + 1085 001c 04F8FF1F .word 536868868 + 1086 0020 00200240 .word 1073881088 + 1087 .cfi_endproc + 1088 .LFE45: + 1090 .section .text.FLASH_PageErase,"ax",%progbits + 1091 .align 1 + 1092 .global FLASH_PageErase + 1093 .syntax unified + 1094 .code 16 + 1095 .thumb_func + 1096 .fpu softvfp + 1098 FLASH_PageErase: + 1099 .LFB55: + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @} + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** @addtogroup FLASH_Private_Functions + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @{ + ARM GAS /tmp/ccTbyH39.s page 39 + + + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /** + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory page + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @param PageAddress FLASH page to erase + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * The value of this parameter depend on device used within the same series + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** * @retval None + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** */ + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** void FLASH_PageErase(uint32_t PageAddress) + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1100 .loc 1 961 0 + 1101 .cfi_startproc + 1102 @ args = 0, pretend = 0, frame = 0 + 1103 @ frame_needed = 0, uses_anonymous_args = 0 + 1104 @ link register save eliminated. + 1105 .LVL136: + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Clean the error context */ + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE; + 1106 .loc 1 963 0 + 1107 0000 064B ldr r3, .L87 + 1108 0002 0022 movs r2, #0 + 1109 0004 DA61 str r2, [r3, #28] + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** /* Proceed to erase the page */ + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_PER); + 1110 .loc 1 966 0 + 1111 0006 064B ldr r3, .L87+4 + 1112 0008 1A69 ldr r2, [r3, #16] + 1113 000a 0221 movs r1, #2 + 1114 000c 0A43 orrs r2, r1 + 1115 000e 1A61 str r2, [r3, #16] + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** WRITE_REG(FLASH->AR, PageAddress); + 1116 .loc 1 967 0 + 1117 0010 5861 str r0, [r3, #20] + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** SET_BIT(FLASH->CR, FLASH_CR_STRT); + 1118 .loc 1 968 0 + 1119 0012 1A69 ldr r2, [r3, #16] + 1120 0014 3E31 adds r1, r1, #62 + 1121 0016 0A43 orrs r2, r1 + 1122 0018 1A61 str r2, [r3, #16] + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1123 .loc 1 969 0 + 1124 @ sp needed + 1125 001a 7047 bx lr + 1126 .L88: + 1127 .align 2 + 1128 .L87: + 1129 001c 00000000 .word pFlash + 1130 0020 00200240 .word 1073881088 + 1131 .cfi_endproc + 1132 .LFE55: + 1134 .section .text.HAL_FLASHEx_Erase,"ax",%progbits + 1135 .align 1 + 1136 .global HAL_FLASHEx_Erase + 1137 .syntax unified + 1138 .code 16 + ARM GAS /tmp/ccTbyH39.s page 40 + + + 1139 .thumb_func + 1140 .fpu softvfp + 1142 HAL_FLASHEx_Erase: + 1143 .LFB40: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_ERROR; + 1144 .loc 1 160 0 + 1145 .cfi_startproc + 1146 @ args = 0, pretend = 0, frame = 0 + 1147 @ frame_needed = 0, uses_anonymous_args = 0 + 1148 .LVL137: + 1149 0000 70B5 push {r4, r5, r6, lr} + 1150 .LCFI8: + 1151 .cfi_def_cfa_offset 16 + 1152 .cfi_offset 4, -16 + 1153 .cfi_offset 5, -12 + 1154 .cfi_offset 6, -8 + 1155 .cfi_offset 14, -4 + 1156 0002 0500 movs r5, r0 + 1157 0004 0E00 movs r6, r1 + 1158 .LVL138: + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1159 .loc 1 165 0 + 1160 0006 244B ldr r3, .L102 + 1161 0008 1B7E ldrb r3, [r3, #24] + 1162 000a 012B cmp r3, #1 + 1163 000c 41D0 beq .L96 + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1164 .loc 1 165 0 is_stmt 0 discriminator 2 + 1165 000e 224B ldr r3, .L102 + 1166 0010 0122 movs r2, #1 + 1167 0012 1A76 strb r2, [r3, #24] + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1168 .loc 1 170 0 is_stmt 1 discriminator 2 + 1169 0014 0368 ldr r3, [r0] + 1170 0016 012B cmp r3, #1 + 1171 0018 22D0 beq .L99 + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1172 .loc 1 195 0 + 1173 001a 2048 ldr r0, .L102+4 + 1174 .LVL139: + 1175 001c FFF7FEFF bl FLASH_WaitForLastOperation + 1176 .LVL140: + 1177 0020 0028 cmp r0, #0 + 1178 0022 31D1 bne .L98 + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1179 .loc 1 198 0 + 1180 0024 0123 movs r3, #1 + 1181 0026 5B42 rsbs r3, r3, #0 + 1182 0028 3360 str r3, [r6] + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1183 .loc 1 201 0 + 1184 002a 6C68 ldr r4, [r5, #4] + 1185 .LVL141: + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1186 .loc 1 161 0 + 1187 002c 0130 adds r0, r0, #1 + 1188 .LVL142: + ARM GAS /tmp/ccTbyH39.s page 41 + + + 1189 .L93: + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address += FLASH_PAGE_SIZE) + 1190 .loc 1 202 0 discriminator 1 + 1191 002e AB68 ldr r3, [r5, #8] + 1192 0030 DB02 lsls r3, r3, #11 + 1193 0032 6A68 ldr r2, [r5, #4] + 1194 0034 9446 mov ip, r2 + 1195 0036 6344 add r3, r3, ip + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress); + 1196 .loc 1 201 0 discriminator 1 + 1197 0038 A342 cmp r3, r4 + 1198 003a 26D9 bls .L92 + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1199 .loc 1 205 0 + 1200 003c 2000 movs r0, r4 + 1201 .LVL143: + 1202 003e FFF7FEFF bl FLASH_PageErase + 1203 .LVL144: + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1204 .loc 1 208 0 + 1205 0042 1648 ldr r0, .L102+4 + 1206 0044 FFF7FEFF bl FLASH_WaitForLastOperation + 1207 .LVL145: + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1208 .loc 1 211 0 + 1209 0048 154A ldr r2, .L102+8 + 1210 004a 1369 ldr r3, [r2, #16] + 1211 004c 0221 movs r1, #2 + 1212 004e 8B43 bics r3, r1 + 1213 0050 1361 str r3, [r2, #16] + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1214 .loc 1 213 0 + 1215 0052 0028 cmp r0, #0 + 1216 0054 16D1 bne .L100 + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1217 .loc 1 203 0 + 1218 0056 8023 movs r3, #128 + 1219 0058 1B01 lsls r3, r3, #4 + 1220 005a 9C46 mov ip, r3 + 1221 005c 6444 add r4, r4, ip + 1222 .LVL146: + 1223 005e E6E7 b .L93 + 1224 .LVL147: + 1225 .L99: + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1226 .loc 1 174 0 + 1227 0060 0E48 ldr r0, .L102+4 + 1228 .LVL148: + 1229 0062 FFF7FEFF bl FLASH_WaitForLastOperation + 1230 .LVL149: + 1231 0066 0028 cmp r0, #0 + 1232 0068 01D0 beq .L101 + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1233 .loc 1 161 0 + 1234 006a 0120 movs r0, #1 + 1235 006c 0DE0 b .L92 + 1236 .L101: + ARM GAS /tmp/ccTbyH39.s page 42 + + + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1237 .loc 1 177 0 + 1238 006e FFF7FEFF bl FLASH_MassErase + 1239 .LVL150: + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1240 .loc 1 180 0 + 1241 0072 0A48 ldr r0, .L102+4 + 1242 0074 FFF7FEFF bl FLASH_WaitForLastOperation + 1243 .LVL151: + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1244 .loc 1 183 0 + 1245 0078 094A ldr r2, .L102+8 + 1246 007a 1369 ldr r3, [r2, #16] + 1247 007c 0421 movs r1, #4 + 1248 007e 8B43 bics r3, r1 + 1249 0080 1361 str r3, [r2, #16] + 1250 0082 02E0 b .L92 + 1251 .LVL152: + 1252 .L100: + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** break; + 1253 .loc 1 216 0 + 1254 0084 3460 str r4, [r6] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1255 .loc 1 217 0 + 1256 0086 00E0 b .L92 + 1257 .LVL153: + 1258 .L98: + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** uint32_t address = 0U; + 1259 .loc 1 161 0 + 1260 0088 0120 movs r0, #1 + 1261 .LVL154: + 1262 .L92: + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1263 .loc 1 224 0 + 1264 008a 034B ldr r3, .L102 + 1265 008c 0022 movs r2, #0 + 1266 008e 1A76 strb r2, [r3, #24] + 1267 .LVL155: + 1268 .L90: + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1269 .loc 1 227 0 + 1270 @ sp needed + 1271 .LVL156: + 1272 .LVL157: + 1273 0090 70BD pop {r4, r5, r6, pc} + 1274 .LVL158: + 1275 .L96: + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1276 .loc 1 165 0 + 1277 0092 0220 movs r0, #2 + 1278 .LVL159: + 1279 0094 FCE7 b .L90 + 1280 .L103: + 1281 0096 C046 .align 2 + 1282 .L102: + 1283 0098 00000000 .word pFlash + 1284 009c 50C30000 .word 50000 + ARM GAS /tmp/ccTbyH39.s page 43 + + + 1285 00a0 00200240 .word 1073881088 + 1286 .cfi_endproc + 1287 .LFE40: + 1289 .section .text.HAL_FLASHEx_Erase_IT,"ax",%progbits + 1290 .align 1 + 1291 .global HAL_FLASHEx_Erase_IT + 1292 .syntax unified + 1293 .code 16 + 1294 .thumb_func + 1295 .fpu softvfp + 1297 HAL_FLASHEx_Erase_IT: + 1298 .LFB41: + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** HAL_StatusTypeDef status = HAL_OK; + 1299 .loc 1 241 0 + 1300 .cfi_startproc + 1301 @ args = 0, pretend = 0, frame = 0 + 1302 @ frame_needed = 0, uses_anonymous_args = 0 + 1303 .LVL160: + 1304 0000 10B5 push {r4, lr} + 1305 .LCFI9: + 1306 .cfi_def_cfa_offset 8 + 1307 .cfi_offset 4, -8 + 1308 .cfi_offset 14, -4 + 1309 .LVL161: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1310 .loc 1 245 0 + 1311 0002 154B ldr r3, .L110 + 1312 0004 1B7E ldrb r3, [r3, #24] + 1313 0006 012B cmp r3, #1 + 1314 0008 21D0 beq .L107 + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1315 .loc 1 245 0 is_stmt 0 discriminator 2 + 1316 000a 134B ldr r3, .L110 + 1317 000c 0122 movs r2, #1 + 1318 000e 1A76 strb r2, [r3, #24] + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1319 .loc 1 248 0 is_stmt 1 discriminator 2 + 1320 0010 1B78 ldrb r3, [r3] + 1321 0012 002B cmp r3, #0 + 1322 0014 1DD1 bne .L108 + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1323 .loc 1 257 0 + 1324 0016 114A ldr r2, .L110+4 + 1325 0018 1169 ldr r1, [r2, #16] + 1326 001a A023 movs r3, #160 + 1327 001c 5B01 lsls r3, r3, #5 + 1328 001e 0B43 orrs r3, r1 + 1329 0020 1361 str r3, [r2, #16] + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** { + 1330 .loc 1 259 0 + 1331 0022 0368 ldr r3, [r0] + 1332 0024 012B cmp r3, #1 + 1333 0026 0BD0 beq .L109 + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.DataRemaining = pEraseInit->NbPages; + 1334 .loc 1 273 0 + 1335 0028 0B4B ldr r3, .L110 + 1336 002a 0122 movs r2, #1 + ARM GAS /tmp/ccTbyH39.s page 44 + + + 1337 002c 1A70 strb r2, [r3] + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** pFlash.Address = pEraseInit->PageAddress; + 1338 .loc 1 274 0 + 1339 002e 8268 ldr r2, [r0, #8] + 1340 0030 5A60 str r2, [r3, #4] + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1341 .loc 1 275 0 + 1342 0032 4268 ldr r2, [r0, #4] + 1343 0034 9A60 str r2, [r3, #8] + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1344 .loc 1 278 0 + 1345 0036 4068 ldr r0, [r0, #4] + 1346 .LVL162: + 1347 0038 FFF7FEFF bl FLASH_PageErase + 1348 .LVL163: + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1349 .loc 1 281 0 + 1350 003c 0020 movs r0, #0 + 1351 003e 09E0 b .L105 + 1352 .LVL164: + 1353 .L109: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** FLASH_MassErase(); + 1354 .loc 1 262 0 + 1355 0040 054B ldr r3, .L110 + 1356 0042 0222 movs r2, #2 + 1357 0044 1A70 strb r2, [r3] + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1358 .loc 1 263 0 + 1359 0046 FFF7FEFF bl FLASH_MassErase + 1360 .LVL165: + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1361 .loc 1 281 0 + 1362 004a 0020 movs r0, #0 + 1363 004c 02E0 b .L105 + 1364 .LVL166: + 1365 .L107: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1366 .loc 1 245 0 + 1367 004e 0220 movs r0, #2 + 1368 .LVL167: + 1369 0050 00E0 b .L105 + 1370 .LVL168: + 1371 .L108: + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** } + 1372 .loc 1 250 0 + 1373 0052 0120 movs r0, #1 + 1374 .LVL169: + 1375 .L105: + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_flash_ex.c **** + 1376 .loc 1 282 0 + 1377 @ sp needed + 1378 0054 10BD pop {r4, pc} + 1379 .L111: + 1380 0056 C046 .align 2 + 1381 .L110: + 1382 0058 00000000 .word pFlash + 1383 005c 00200240 .word 1073881088 + ARM GAS /tmp/ccTbyH39.s page 45 + + + 1384 .cfi_endproc + 1385 .LFE41: + 1387 .text + 1388 .Letext0: + 1389 .file 2 "/usr/include/newlib/machine/_default_types.h" + 1390 .file 3 "/usr/include/newlib/sys/_stdint.h" + 1391 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 1392 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 1393 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1394 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h" + 1395 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h" + 1396 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccTbyH39.s page 46 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_flash_ex.c + /tmp/ccTbyH39.s:16 .text.FLASH_MassErase:0000000000000000 $t + /tmp/ccTbyH39.s:22 .text.FLASH_MassErase:0000000000000000 FLASH_MassErase + /tmp/ccTbyH39.s:51 .text.FLASH_MassErase:000000000000001c $d + /tmp/ccTbyH39.s:57 .text.FLASH_OB_GetWRP:0000000000000000 $t + /tmp/ccTbyH39.s:63 .text.FLASH_OB_GetWRP:0000000000000000 FLASH_OB_GetWRP + /tmp/ccTbyH39.s:79 .text.FLASH_OB_GetWRP:0000000000000008 $d + /tmp/ccTbyH39.s:84 .text.FLASH_OB_GetRDP:0000000000000000 $t + /tmp/ccTbyH39.s:90 .text.FLASH_OB_GetRDP:0000000000000000 FLASH_OB_GetRDP + /tmp/ccTbyH39.s:128 .text.FLASH_OB_GetRDP:000000000000001c $d + /tmp/ccTbyH39.s:133 .text.FLASH_OB_GetUser:0000000000000000 $t + /tmp/ccTbyH39.s:139 .text.FLASH_OB_GetUser:0000000000000000 FLASH_OB_GetUser + /tmp/ccTbyH39.s:158 .text.FLASH_OB_GetUser:000000000000000c $d + /tmp/ccTbyH39.s:163 .text.FLASH_OB_RDP_LevelConfig:0000000000000000 $t + /tmp/ccTbyH39.s:169 .text.FLASH_OB_RDP_LevelConfig:0000000000000000 FLASH_OB_RDP_LevelConfig + /tmp/ccTbyH39.s:248 .text.FLASH_OB_RDP_LevelConfig:0000000000000054 $d + /tmp/ccTbyH39.s:256 .text.FLASH_OB_UserConfig:0000000000000000 $t + /tmp/ccTbyH39.s:262 .text.FLASH_OB_UserConfig:0000000000000000 FLASH_OB_UserConfig + /tmp/ccTbyH39.s:322 .text.FLASH_OB_UserConfig:0000000000000038 $d + /tmp/ccTbyH39.s:330 .text.FLASH_OB_ProgramData:0000000000000000 $t + /tmp/ccTbyH39.s:336 .text.FLASH_OB_ProgramData:0000000000000000 FLASH_OB_ProgramData + /tmp/ccTbyH39.s:397 .text.FLASH_OB_ProgramData:0000000000000034 $d + /tmp/ccTbyH39.s:404 .text.HAL_FLASHEx_OBErase:0000000000000000 $t + /tmp/ccTbyH39.s:411 .text.HAL_FLASHEx_OBErase:0000000000000000 HAL_FLASHEx_OBErase + /tmp/ccTbyH39.s:481 .text.HAL_FLASHEx_OBErase:0000000000000044 $d + /tmp/ccTbyH39.s:488 .text.FLASH_OB_EnableWRP:0000000000000000 $t + /tmp/ccTbyH39.s:494 .text.FLASH_OB_EnableWRP:0000000000000000 FLASH_OB_EnableWRP + /tmp/ccTbyH39.s:659 .text.FLASH_OB_EnableWRP:00000000000000ac $d + /tmp/ccTbyH39.s:667 .text.FLASH_OB_DisableWRP:0000000000000000 $t + /tmp/ccTbyH39.s:673 .text.FLASH_OB_DisableWRP:0000000000000000 FLASH_OB_DisableWRP + /tmp/ccTbyH39.s:835 .text.FLASH_OB_DisableWRP:00000000000000a8 $d + /tmp/ccTbyH39.s:843 .text.HAL_FLASHEx_OBProgram:0000000000000000 $t + /tmp/ccTbyH39.s:850 .text.HAL_FLASHEx_OBProgram:0000000000000000 HAL_FLASHEx_OBProgram + /tmp/ccTbyH39.s:994 .text.HAL_FLASHEx_OBProgram:0000000000000090 $d + /tmp/ccTbyH39.s:999 .text.HAL_FLASHEx_OBGetConfig:0000000000000000 $t + /tmp/ccTbyH39.s:1006 .text.HAL_FLASHEx_OBGetConfig:0000000000000000 HAL_FLASHEx_OBGetConfig + /tmp/ccTbyH39.s:1042 .text.HAL_FLASHEx_OBGetUserData:0000000000000000 $t + /tmp/ccTbyH39.s:1049 .text.HAL_FLASHEx_OBGetUserData:0000000000000000 HAL_FLASHEx_OBGetUserData + /tmp/ccTbyH39.s:1085 .text.HAL_FLASHEx_OBGetUserData:000000000000001c $d + /tmp/ccTbyH39.s:1091 .text.FLASH_PageErase:0000000000000000 $t + /tmp/ccTbyH39.s:1098 .text.FLASH_PageErase:0000000000000000 FLASH_PageErase + /tmp/ccTbyH39.s:1129 .text.FLASH_PageErase:000000000000001c $d + /tmp/ccTbyH39.s:1135 .text.HAL_FLASHEx_Erase:0000000000000000 $t + /tmp/ccTbyH39.s:1142 .text.HAL_FLASHEx_Erase:0000000000000000 HAL_FLASHEx_Erase + /tmp/ccTbyH39.s:1283 .text.HAL_FLASHEx_Erase:0000000000000098 $d + /tmp/ccTbyH39.s:1290 .text.HAL_FLASHEx_Erase_IT:0000000000000000 $t + /tmp/ccTbyH39.s:1297 .text.HAL_FLASHEx_Erase_IT:0000000000000000 HAL_FLASHEx_Erase_IT + /tmp/ccTbyH39.s:1382 .text.HAL_FLASHEx_Erase_IT:0000000000000058 $d + +UNDEFINED SYMBOLS +pFlash +FLASH_WaitForLastOperation diff --git a/fw/midi-dials/build/stm32f0xx_hal_flash_ex.o b/fw/midi-dials/build/stm32f0xx_hal_flash_ex.o Binary files differnew file mode 100644 index 0000000..5281f30 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_flash_ex.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_gpio.d b/fw/midi-dials/build/stm32f0xx_hal_gpio.d new file mode 100644 index 0000000..37dac08 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_gpio.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_gpio.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_gpio.lst b/fw/midi-dials/build/stm32f0xx_hal_gpio.lst new file mode 100644 index 0000000..764228d --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_gpio.lst @@ -0,0 +1,1501 @@ +ARM GAS /tmp/cclHgak8.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_gpio.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_GPIO_Init,"ax",%progbits + 16 .align 1 + 17 .global HAL_GPIO_Init + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_GPIO_Init: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @file stm32f0xx_hal_gpio.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * functionalities of the General Purpose Input/Output (GPIO) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### GPIO Peripheral features ##### + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** [..] + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** configured by software in several modes: + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Input mode + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Analog mode + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Output mode + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Alternate function mode + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) External interrupt/event lines + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) During and just after reset, the alternate functions and external interrupt + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** lines are not active and the I/O ports are configured in input floating mode. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** activated or not. + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** type and the IO speed can be selected depending on the VDD value. + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) The microcontroller IO pins are connected to onboard peripherals/modules through a + ARM GAS /tmp/cclHgak8.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** multiplexer that allows only one peripheral alternate function (AF) connected + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** to an IO pin at a time. In this way, there can be no conflict between peripherals + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** sharing the same IO pin. + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) All ports have external interrupt/event capability. To use external interrupt + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** lines, the port must be configured in input mode. All available GPIO pins are + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) The external interrupt/event controller consists of up to 28 edge detectors + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (16 lines are connected to GPIO) for generating event/interrupt requests (each + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** input line can be independently configured to select the type (interrupt or event) + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** and the corresponding trigger event (rising or falling or both). Each line can + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** also be masked independently. + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### How to use this driver ##### + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** [..] + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) Enable the GPIO AHB clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE(). + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** structure. + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In case of Output or alternate function mode selection: the speed is + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** configured through "Speed" member from GPIO_InitTypeDef structure. + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In alternate mode is selection, the alternate function connected to the IO + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** is configured through "Alternate" member from GPIO_InitTypeDef structure. + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Analog mode is required when a pin is to be used as ADC channel + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** or DAC output. + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In case of external interrupt/event selection the "Mode" member from + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_InitTypeDef structure select the type (interrupt or event) and + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both). + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_NVIC_EnableIRQ(). + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** recommended to use it to unconfigure pin which was used as an external interrupt + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** registers. + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) During and just after reset, the alternate functions are not + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** active and the GPIO pins are configured in input floating mode (except JTAG + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** pins). + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** priority over the GPIO function. + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + ARM GAS /tmp/cclHgak8.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** general purpose PF0 and PF1, respectively, when the HSE oscillator is off. + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** The HSE has priority over the GPIO function. + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @attention + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * All rights reserved.</center></h2> + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This software component is licensed by ST under BSD 3-Clause license, + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the "License"; You may not use this file except in compliance with the + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * License. You may obtain a copy of the License at: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * opensource.org/licenses/BSD-3-Clause + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Includes ------------------------------------------------------------------*/ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #include "stm32f0xx_hal.h" + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @addtogroup STM32F0xx_HAL_Driver + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO GPIO + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO HAL module driver + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** MISRA C:2012 deviation rule has been granted for following rules: + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * Rule-18.1_d - Medium: Array pointer `GPIOx' is accessed with index [..,..] + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * which may be out of array bounds [..,UNKNOWN] in following APIs: + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * HAL_GPIO_Init + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * HAL_GPIO_DeInit + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #ifdef HAL_GPIO_MODULE_ENABLED + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private typedef -----------------------------------------------------------*/ + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private defines -----------------------------------------------------------*/ + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Private_Defines GPIO Private Defines + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_MODE (0x00000003U) + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define EXTI_MODE (0x10000000U) + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_MODE_IT (0x00010000U) + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_MODE_EVT (0x00020000U) + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define RISING_EDGE (0x00100000U) + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define FALLING_EDGE (0x00200000U) + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_OUTPUT_TYPE (0x00000010U) + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_NUMBER (16U) + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @} + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + ARM GAS /tmp/cclHgak8.s page 4 + + + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private macros ------------------------------------------------------------*/ + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private variables ---------------------------------------------------------*/ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private function prototypes -----------------------------------------------*/ + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Exported functions --------------------------------------------------------*/ + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions GPIO Exported Functions + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Initialization and Configuration functions + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### Initialization and de-initialization functions ##### + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init. + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the configuration information for the specified GPIO peripheral. + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 26 .loc 1 178 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 8 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 F0B5 push {r4, r5, r6, r7, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 20 + 34 .cfi_offset 4, -20 + 35 .cfi_offset 5, -16 + 36 .cfi_offset 6, -12 + 37 .cfi_offset 7, -8 + 38 .cfi_offset 14, -4 + 39 0002 C646 mov lr, r8 + 40 0004 00B5 push {lr} + 41 .LCFI1: + 42 .cfi_def_cfa_offset 24 + 43 .cfi_offset 8, -24 + 44 0006 82B0 sub sp, sp, #8 + 45 .LCFI2: + 46 .cfi_def_cfa_offset 32 + 47 .LVL1: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t position = 0x00u; + 48 .loc 1 179 0 + 49 0008 0023 movs r3, #0 + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + ARM GAS /tmp/cclHgak8.s page 5 + + + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t temp; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the port pins */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** while (((GPIO_Init->Pin) >> position) != 0x00u) + 50 .loc 1 190 0 + 51 000a 38E0 b .L2 + 52 .LVL2: + 53 .L20: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Get current io position */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** iocurrent = (GPIO_Init->Pin) & (1uL << position); + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (iocurrent != 0x00u) + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*--------------------- GPIO Mode Configuration ------------------------*/ + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* In case of Alternate function mode selection */ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Alternate function parameters */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure Alternate function mapped with the current IO */ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->AFR[position >> 3u]; + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] = temp; + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->MODER; + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* In case of Output or Alternate function mode selection */ + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Speed parameter */ + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the IO Speed */ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->OSPEEDR; + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2u)); + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the IO Output Type */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->OTYPER; + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4u) << position); + ARM GAS /tmp/cclHgak8.s page 6 + + + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER = temp; + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Activate the Pull-up or Pull down resistor for the current IO */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->PUPDR; + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*--------------------- EXTI Mode Configuration ------------------------*/ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Enable SYSCFG Clock */ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = SYSCFG->EXTICR[position >> 2u]; + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 54 .loc 1 252 0 + 55 000c 0426 movs r6, #4 + 56 000e 00E0 b .L8 + 57 .L14: + 58 0010 0026 movs r6, #0 + 59 .L8: + 60 .loc 1 252 0 is_stmt 0 discriminator 20 + 61 0012 AE40 lsls r6, r6, r5 + 62 0014 3500 movs r5, r6 + 63 0016 3D43 orrs r5, r7 + 64 .LVL3: + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 65 .loc 1 253 0 is_stmt 1 discriminator 20 + 66 0018 0234 adds r4, r4, #2 + 67 001a A400 lsls r4, r4, #2 + 68 001c 574E ldr r6, .L21 + 69 001e A551 str r5, [r4, r6] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->IMR; + 70 .loc 1 256 0 discriminator 20 + 71 0020 574C ldr r4, .L21+4 + 72 0022 2568 ldr r5, [r4] + 73 .LVL4: + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 74 .loc 1 257 0 discriminator 20 + 75 0024 4246 mov r2, r8 + 76 0026 D443 mvns r4, r2 + 77 0028 2E00 movs r6, r5 + 78 002a 2640 ands r6, r4 + 79 .LVL5: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) + 80 .loc 1 258 0 discriminator 20 + 81 002c 4A68 ldr r2, [r1, #4] + 82 002e D203 lsls r2, r2, #15 + 83 0030 02D5 bpl .L9 + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + ARM GAS /tmp/cclHgak8.s page 7 + + + 84 .loc 1 260 0 + 85 0032 4246 mov r2, r8 + 86 0034 1543 orrs r5, r2 + 87 0036 2E00 movs r6, r5 + 88 .LVL6: + 89 .L9: + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->IMR = temp; + 90 .loc 1 262 0 + 91 0038 514D ldr r5, .L21+4 + 92 003a 2E60 str r6, [r5] + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->EMR; + 93 .loc 1 264 0 + 94 003c 6D68 ldr r5, [r5, #4] + 95 .LVL7: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 96 .loc 1 265 0 + 97 003e 2E00 movs r6, r5 + 98 0040 2640 ands r6, r4 + 99 .LVL8: + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) + 100 .loc 1 266 0 + 101 0042 4A68 ldr r2, [r1, #4] + 102 0044 9203 lsls r2, r2, #14 + 103 0046 02D5 bpl .L10 + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 104 .loc 1 268 0 + 105 0048 4246 mov r2, r8 + 106 004a 1543 orrs r5, r2 + 107 004c 2E00 movs r6, r5 + 108 .LVL9: + 109 .L10: + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR = temp; + 110 .loc 1 270 0 + 111 004e 4C4D ldr r5, .L21+4 + 112 0050 6E60 str r6, [r5, #4] + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->RTSR; + 113 .loc 1 273 0 + 114 0052 AD68 ldr r5, [r5, #8] + 115 .LVL10: + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 116 .loc 1 274 0 + 117 0054 2E00 movs r6, r5 + 118 0056 2640 ands r6, r4 + 119 .LVL11: + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) + 120 .loc 1 275 0 + 121 0058 4A68 ldr r2, [r1, #4] + 122 005a D202 lsls r2, r2, #11 + 123 005c 02D5 bpl .L11 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + ARM GAS /tmp/cclHgak8.s page 8 + + + 124 .loc 1 277 0 + 125 005e 4246 mov r2, r8 + 126 0060 1543 orrs r5, r2 + 127 0062 2E00 movs r6, r5 + 128 .LVL12: + 129 .L11: + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR = temp; + 130 .loc 1 279 0 + 131 0064 464D ldr r5, .L21+4 + 132 0066 AE60 str r6, [r5, #8] + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->FTSR; + 133 .loc 1 281 0 + 134 0068 ED68 ldr r5, [r5, #12] + 135 .LVL13: + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 136 .loc 1 282 0 + 137 006a 2C40 ands r4, r5 + 138 .LVL14: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) + 139 .loc 1 283 0 + 140 006c 4A68 ldr r2, [r1, #4] + 141 006e 9202 lsls r2, r2, #10 + 142 0070 02D5 bpl .L12 + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 143 .loc 1 285 0 + 144 0072 4246 mov r2, r8 + 145 0074 2A43 orrs r2, r5 + 146 0076 1400 movs r4, r2 + 147 .LVL15: + 148 .L12: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR = temp; + 149 .loc 1 287 0 + 150 0078 414A ldr r2, .L21+4 + 151 007a D460 str r4, [r2, #12] + 152 .LVL16: + 153 .L3: + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** position++; + 154 .loc 1 291 0 + 155 007c 0133 adds r3, r3, #1 + 156 .LVL17: + 157 .L2: + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 158 .loc 1 190 0 + 159 007e 0A68 ldr r2, [r1] + 160 0080 1400 movs r4, r2 + 161 0082 DC40 lsrs r4, r4, r3 + 162 0084 76D0 beq .L19 + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 163 .loc 1 193 0 + 164 0086 0125 movs r5, #1 + ARM GAS /tmp/cclHgak8.s page 9 + + + 165 0088 9D40 lsls r5, r5, r3 + 166 008a 2A40 ands r2, r5 + 167 008c 9046 mov r8, r2 + 168 .LVL18: + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 169 .loc 1 195 0 + 170 008e F5D0 beq .L3 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 171 .loc 1 199 0 + 172 0090 4C68 ldr r4, [r1, #4] + 173 0092 022C cmp r4, #2 + 174 0094 01D0 beq .L4 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 175 .loc 1 199 0 is_stmt 0 discriminator 1 + 176 0096 122C cmp r4, #18 + 177 0098 0ED1 bne .L5 + 178 .L4: + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 179 .loc 1 206 0 is_stmt 1 + 180 009a DC08 lsrs r4, r3, #3 + 181 009c 0834 adds r4, r4, #8 + 182 009e A400 lsls r4, r4, #2 + 183 00a0 2758 ldr r7, [r4, r0] + 184 .LVL19: + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 185 .loc 1 207 0 + 186 00a2 0726 movs r6, #7 + 187 00a4 1E40 ands r6, r3 + 188 00a6 B600 lsls r6, r6, #2 + 189 00a8 0F22 movs r2, #15 + 190 .LVL20: + 191 00aa B240 lsls r2, r2, r6 + 192 00ac 9743 bics r7, r2 + 193 .LVL21: + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] = temp; + 194 .loc 1 208 0 + 195 00ae 0A69 ldr r2, [r1, #16] + 196 00b0 B240 lsls r2, r2, r6 + 197 00b2 1600 movs r6, r2 + 198 00b4 3E43 orrs r6, r7 + 199 .LVL22: + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 200 .loc 1 209 0 + 201 00b6 2650 str r6, [r4, r0] + 202 .LVL23: + 203 .L5: + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 204 .loc 1 213 0 + 205 00b8 0268 ldr r2, [r0] + 206 .LVL24: + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 207 .loc 1 214 0 + 208 00ba 5F00 lsls r7, r3, #1 + 209 00bc 0324 movs r4, #3 + 210 00be 2600 movs r6, r4 + 211 00c0 BE40 lsls r6, r6, r7 + 212 00c2 F643 mvns r6, r6 + ARM GAS /tmp/cclHgak8.s page 10 + + + 213 00c4 3240 ands r2, r6 + 214 .LVL25: + 215 00c6 9446 mov ip, r2 + 216 .LVL26: + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 217 .loc 1 215 0 + 218 00c8 4A68 ldr r2, [r1, #4] + 219 .LVL27: + 220 00ca 1440 ands r4, r2 + 221 00cc BC40 lsls r4, r4, r7 + 222 00ce 6246 mov r2, ip + 223 00d0 1443 orrs r4, r2 + 224 .LVL28: + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 225 .loc 1 216 0 + 226 00d2 0460 str r4, [r0] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 227 .loc 1 219 0 + 228 00d4 4C68 ldr r4, [r1, #4] + 229 .LVL29: + 230 00d6 621E subs r2, r4, #1 + 231 00d8 012A cmp r2, #1 + 232 00da 03D9 bls .L6 + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 233 .loc 1 219 0 is_stmt 0 discriminator 1 + 234 00dc 112C cmp r4, #17 + 235 00de 01D0 beq .L6 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 236 .loc 1 220 0 is_stmt 1 + 237 00e0 122C cmp r4, #18 + 238 00e2 10D1 bne .L7 + 239 .L6: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 240 .loc 1 225 0 + 241 00e4 8468 ldr r4, [r0, #8] + 242 .LVL30: + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2u)); + 243 .loc 1 226 0 + 244 00e6 3440 ands r4, r6 + 245 .LVL31: + 246 00e8 A446 mov ip, r4 + 247 .LVL32: + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; + 248 .loc 1 227 0 + 249 00ea CC68 ldr r4, [r1, #12] + 250 .LVL33: + 251 00ec BC40 lsls r4, r4, r7 + 252 00ee 6246 mov r2, ip + 253 00f0 1443 orrs r4, r2 + 254 .LVL34: + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 255 .loc 1 228 0 + 256 00f2 8460 str r4, [r0, #8] + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 257 .loc 1 231 0 + 258 00f4 4468 ldr r4, [r0, #4] + 259 .LVL35: + ARM GAS /tmp/cclHgak8.s page 11 + + + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4u) << position); + 260 .loc 1 232 0 + 261 00f6 AC43 bics r4, r5 + 262 .LVL36: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER = temp; + 263 .loc 1 233 0 + 264 00f8 4A68 ldr r2, [r1, #4] + 265 00fa 1209 lsrs r2, r2, #4 + 266 00fc 0125 movs r5, #1 + 267 00fe 1540 ands r5, r2 + 268 0100 9D40 lsls r5, r5, r3 + 269 0102 2543 orrs r5, r4 + 270 .LVL37: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 271 .loc 1 234 0 + 272 0104 4560 str r5, [r0, #4] + 273 .LVL38: + 274 .L7: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 275 .loc 1 238 0 + 276 0106 C468 ldr r4, [r0, #12] + 277 .LVL39: + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 278 .loc 1 239 0 + 279 0108 2640 ands r6, r4 + 280 .LVL40: + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 281 .loc 1 240 0 + 282 010a 8C68 ldr r4, [r1, #8] + 283 010c BC40 lsls r4, r4, r7 + 284 010e 3443 orrs r4, r6 + 285 .LVL41: + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 286 .loc 1 241 0 + 287 0110 C460 str r4, [r0, #12] + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 288 .loc 1 245 0 + 289 0112 4A68 ldr r2, [r1, #4] + 290 0114 D200 lsls r2, r2, #3 + 291 0116 B1D5 bpl .L3 + 292 .LBB2: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 293 .loc 1 248 0 + 294 0118 1A4D ldr r5, .L21+8 + 295 011a AE69 ldr r6, [r5, #24] + 296 011c 0124 movs r4, #1 + 297 .LVL42: + 298 011e 2643 orrs r6, r4 + 299 0120 AE61 str r6, [r5, #24] + 300 .LVL43: + 301 0122 AD69 ldr r5, [r5, #24] + 302 0124 2C40 ands r4, r5 + 303 0126 0194 str r4, [sp, #4] + 304 0128 019C ldr r4, [sp, #4] + 305 .LBE2: + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 306 .loc 1 250 0 + ARM GAS /tmp/cclHgak8.s page 12 + + + 307 012a 9C08 lsrs r4, r3, #2 + 308 012c A51C adds r5, r4, #2 + 309 012e AD00 lsls r5, r5, #2 + 310 0130 124E ldr r6, .L21 + 311 0132 AF59 ldr r7, [r5, r6] + 312 .LVL44: + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 313 .loc 1 251 0 + 314 0134 0326 movs r6, #3 + 315 0136 1E40 ands r6, r3 + 316 0138 B500 lsls r5, r6, #2 + 317 013a 0F26 movs r6, #15 + 318 013c AE40 lsls r6, r6, r5 + 319 013e B743 bics r7, r6 + 320 .LVL45: + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 321 .loc 1 252 0 + 322 0140 9026 movs r6, #144 + 323 0142 F605 lsls r6, r6, #23 + 324 0144 B042 cmp r0, r6 + 325 0146 00D1 bne .LCB325 + 326 0148 62E7 b .L14 @long jump + 327 .LCB325: + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 328 .loc 1 252 0 is_stmt 0 discriminator 1 + 329 014a 0F4E ldr r6, .L21+12 + 330 014c B042 cmp r0, r6 + 331 014e 0BD0 beq .L15 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 332 .loc 1 252 0 discriminator 3 + 333 0150 0E4E ldr r6, .L21+16 + 334 0152 B042 cmp r0, r6 + 335 0154 0AD0 beq .L16 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 336 .loc 1 252 0 discriminator 5 + 337 0156 0E4E ldr r6, .L21+20 + 338 0158 B042 cmp r0, r6 + 339 015a 09D0 beq .L17 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 340 .loc 1 252 0 discriminator 7 + 341 015c 0D4E ldr r6, .L21+24 + 342 015e B042 cmp r0, r6 + 343 0160 00D1 bne .LCB337 + 344 0162 53E7 b .L20 @long jump + 345 .LCB337: + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 346 .loc 1 252 0 + 347 0164 0526 movs r6, #5 + 348 0166 54E7 b .L8 + 349 .L15: + 350 0168 0126 movs r6, #1 + 351 016a 52E7 b .L8 + 352 .L16: + 353 016c 0226 movs r6, #2 + 354 016e 50E7 b .L8 + 355 .L17: + 356 0170 0326 movs r6, #3 + ARM GAS /tmp/cclHgak8.s page 13 + + + 357 0172 4EE7 b .L8 + 358 .LVL46: + 359 .L19: + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 360 .loc 1 293 0 is_stmt 1 + 361 0174 02B0 add sp, sp, #8 + 362 @ sp needed + 363 0176 04BC pop {r2} + 364 0178 9046 mov r8, r2 + 365 017a F0BD pop {r4, r5, r6, r7, pc} + 366 .L22: + 367 .align 2 + 368 .L21: + 369 017c 00000140 .word 1073807360 + 370 0180 00040140 .word 1073808384 + 371 0184 00100240 .word 1073876992 + 372 0188 00040048 .word 1207960576 + 373 018c 00080048 .word 1207961600 + 374 0190 000C0048 .word 1207962624 + 375 0194 00100048 .word 1207963648 + 376 .cfi_endproc + 377 .LFE40: + 379 .section .text.HAL_GPIO_DeInit,"ax",%progbits + 380 .align 1 + 381 .global HAL_GPIO_DeInit + 382 .syntax unified + 383 .code 16 + 384 .thumb_func + 385 .fpu softvfp + 387 HAL_GPIO_DeInit: + 388 .LFB41: + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief De-initialize the GPIOx peripheral registers to their default reset values. + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 389 .loc 1 303 0 + 390 .cfi_startproc + 391 @ args = 0, pretend = 0, frame = 0 + 392 @ frame_needed = 0, uses_anonymous_args = 0 + 393 .LVL47: + 394 0000 F0B5 push {r4, r5, r6, r7, lr} + 395 .LCFI3: + 396 .cfi_def_cfa_offset 20 + 397 .cfi_offset 4, -20 + 398 .cfi_offset 5, -16 + 399 .cfi_offset 6, -12 + 400 .cfi_offset 7, -8 + 401 .cfi_offset 14, -4 + 402 0002 CE46 mov lr, r9 + 403 0004 4746 mov r7, r8 + ARM GAS /tmp/cclHgak8.s page 14 + + + 404 0006 80B5 push {r7, lr} + 405 .LCFI4: + 406 .cfi_def_cfa_offset 28 + 407 .cfi_offset 8, -28 + 408 .cfi_offset 9, -24 + 409 0008 8946 mov r9, r1 + 410 .LVL48: + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t position = 0x00u; + 411 .loc 1 304 0 + 412 000a 0023 movs r3, #0 + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t tmp; + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the port pins */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** while ((GPIO_Pin >> position) != 0x00u) + 413 .loc 1 313 0 + 414 000c 24E0 b .L24 + 415 .LVL49: + 416 .L36: + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Get current io position */ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** iocurrent = (GPIO_Pin) & (1uL << position); + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (iocurrent != 0x00u) + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*------------------------- EXTI Mode Configuration --------------------*/ + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear the External Interrupt or Event for the current IO */ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = SYSCFG->EXTICR[position >> 2u]; + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 417 .loc 1 325 0 + 418 000e 0421 movs r1, #4 + 419 0010 8846 mov r8, r1 + 420 0012 01E0 b .L26 + 421 .L29: + 422 0014 0021 movs r1, #0 + 423 0016 8846 mov r8, r1 + 424 .L26: + 425 .loc 1 325 0 is_stmt 0 discriminator 20 + 426 0018 4146 mov r1, r8 + 427 001a A140 lsls r1, r1, r4 + 428 001c A942 cmp r1, r5 + 429 001e 4BD0 beq .L34 + 430 .LVL50: + 431 .L27: + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->IMR &= ~((uint32_t)iocurrent); + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + ARM GAS /tmp/cclHgak8.s page 15 + + + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = 0x0FuL << (4u * (position & 0x03u)); + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*------------------------- GPIO Mode Configuration --------------------*/ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure IO Direction in Input Floating Mode */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 432 .loc 1 342 0 is_stmt 1 + 433 0020 0568 ldr r5, [r0] + 434 0022 5E00 lsls r6, r3, #1 + 435 0024 0324 movs r4, #3 + 436 0026 B440 lsls r4, r4, r6 + 437 0028 E443 mvns r4, r4 + 438 002a 2540 ands r5, r4 + 439 002c 0560 str r5, [r0] + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default Alternate Function in current IO */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)) ; + 440 .loc 1 345 0 + 441 002e DD08 lsrs r5, r3, #3 + 442 0030 0835 adds r5, r5, #8 + 443 0032 AD00 lsls r5, r5, #2 + 444 0034 2F58 ldr r7, [r5, r0] + 445 0036 0726 movs r6, #7 + 446 0038 1E40 ands r6, r3 + 447 003a B600 lsls r6, r6, #2 + 448 003c 0F21 movs r1, #15 + 449 003e B140 lsls r1, r1, r6 + 450 0040 8F43 bics r7, r1 + 451 0042 2F50 str r7, [r5, r0] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default value for IO Speed */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 452 .loc 1 348 0 + 453 0044 8568 ldr r5, [r0, #8] + 454 0046 2540 ands r5, r4 + 455 0048 8560 str r5, [r0, #8] + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default value IO Output Type */ + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; + 456 .loc 1 351 0 + 457 004a 4568 ldr r5, [r0, #4] + 458 004c 9543 bics r5, r2 + 459 004e 4560 str r5, [r0, #4] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Deactivate the Pull-up and Pull-down resistor for the current IO */ + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); + 460 .loc 1 354 0 + 461 0050 C268 ldr r2, [r0, #12] + 462 .LVL51: + 463 0052 1440 ands r4, r2 + 464 0054 C460 str r4, [r0, #12] + 465 .L25: + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + ARM GAS /tmp/cclHgak8.s page 16 + + + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** position++; + 466 .loc 1 357 0 + 467 0056 0133 adds r3, r3, #1 + 468 .LVL52: + 469 .L24: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 470 .loc 1 313 0 + 471 0058 4A46 mov r2, r9 + 472 005a DA40 lsrs r2, r2, r3 + 473 005c 42D0 beq .L35 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 474 .loc 1 316 0 + 475 005e 0122 movs r2, #1 + 476 0060 9A40 lsls r2, r2, r3 + 477 0062 4E46 mov r6, r9 + 478 0064 1640 ands r6, r2 + 479 .LVL53: + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 480 .loc 1 318 0 + 481 0066 F6D0 beq .L25 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 482 .loc 1 323 0 + 483 0068 9908 lsrs r1, r3, #2 + 484 006a 8C46 mov ip, r1 + 485 006c 8C1C adds r4, r1, #2 + 486 006e A400 lsls r4, r4, #2 + 487 0070 1E4D ldr r5, .L37 + 488 0072 6559 ldr r5, [r4, r5] + 489 .LVL54: + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 490 .loc 1 324 0 + 491 0074 0324 movs r4, #3 + 492 0076 1C40 ands r4, r3 + 493 0078 A400 lsls r4, r4, #2 + 494 007a 0F27 movs r7, #15 + 495 007c A740 lsls r7, r7, r4 + 496 007e 3D40 ands r5, r7 + 497 .LVL55: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 498 .loc 1 325 0 + 499 0080 9021 movs r1, #144 + 500 0082 C905 lsls r1, r1, #23 + 501 0084 8842 cmp r0, r1 + 502 0086 C5D0 beq .L29 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 503 .loc 1 325 0 is_stmt 0 discriminator 1 + 504 0088 1949 ldr r1, .L37+4 + 505 008a 8842 cmp r0, r1 + 506 008c 0BD0 beq .L30 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 507 .loc 1 325 0 discriminator 3 + 508 008e 1949 ldr r1, .L37+8 + 509 0090 8842 cmp r0, r1 + 510 0092 0BD0 beq .L31 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 511 .loc 1 325 0 discriminator 5 + ARM GAS /tmp/cclHgak8.s page 17 + + + 512 0094 1849 ldr r1, .L37+12 + 513 0096 8842 cmp r0, r1 + 514 0098 0BD0 beq .L32 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 515 .loc 1 325 0 discriminator 7 + 516 009a 1849 ldr r1, .L37+16 + 517 009c 8842 cmp r0, r1 + 518 009e B6D0 beq .L36 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 519 .loc 1 325 0 + 520 00a0 0521 movs r1, #5 + 521 00a2 8846 mov r8, r1 + 522 00a4 B8E7 b .L26 + 523 .L30: + 524 00a6 0121 movs r1, #1 + 525 00a8 8846 mov r8, r1 + 526 00aa B5E7 b .L26 + 527 .L31: + 528 00ac 0221 movs r1, #2 + 529 00ae 8846 mov r8, r1 + 530 00b0 B2E7 b .L26 + 531 .L32: + 532 00b2 0321 movs r1, #3 + 533 00b4 8846 mov r8, r1 + 534 00b6 AFE7 b .L26 + 535 .L34: + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 536 .loc 1 328 0 is_stmt 1 + 537 00b8 114C ldr r4, .L37+20 + 538 00ba 2568 ldr r5, [r4] + 539 .LVL56: + 540 00bc F643 mvns r6, r6 + 541 .LVL57: + 542 00be 3540 ands r5, r6 + 543 00c0 2560 str r5, [r4] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 544 .loc 1 329 0 + 545 00c2 6568 ldr r5, [r4, #4] + 546 00c4 3540 ands r5, r6 + 547 00c6 6560 str r5, [r4, #4] + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); + 548 .loc 1 332 0 + 549 00c8 A568 ldr r5, [r4, #8] + 550 00ca 3540 ands r5, r6 + 551 00cc A560 str r5, [r4, #8] + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 552 .loc 1 333 0 + 553 00ce E568 ldr r5, [r4, #12] + 554 00d0 2E40 ands r6, r5 + 555 .LVL58: + 556 00d2 E660 str r6, [r4, #12] + 557 .LVL59: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 558 .loc 1 337 0 + 559 00d4 054E ldr r6, .L37 + 560 00d6 6446 mov r4, ip + 561 00d8 0234 adds r4, r4, #2 + ARM GAS /tmp/cclHgak8.s page 18 + + + 562 00da A400 lsls r4, r4, #2 + 563 00dc A559 ldr r5, [r4, r6] + 564 00de BD43 bics r5, r7 + 565 00e0 A551 str r5, [r4, r6] + 566 00e2 9DE7 b .L27 + 567 .LVL60: + 568 .L35: + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 569 .loc 1 359 0 + 570 @ sp needed + 571 .LVL61: + 572 00e4 0CBC pop {r2, r3} + 573 00e6 9046 mov r8, r2 + 574 00e8 9946 mov r9, r3 + 575 00ea F0BD pop {r4, r5, r6, r7, pc} + 576 .L38: + 577 .align 2 + 578 .L37: + 579 00ec 00000140 .word 1073807360 + 580 00f0 00040048 .word 1207960576 + 581 00f4 00080048 .word 1207961600 + 582 00f8 000C0048 .word 1207962624 + 583 00fc 00100048 .word 1207963648 + 584 0100 00040140 .word 1073808384 + 585 .cfi_endproc + 586 .LFE41: + 588 .section .text.HAL_GPIO_ReadPin,"ax",%progbits + 589 .align 1 + 590 .global HAL_GPIO_ReadPin + 591 .syntax unified + 592 .code 16 + 593 .thumb_func + 594 .fpu softvfp + 596 HAL_GPIO_ReadPin: + 597 .LFB42: + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @} + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### IO operation functions ##### + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Read the specified input port pin. + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to read. + ARM GAS /tmp/cclHgak8.s page 19 + + + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be GPIO_PIN_x where x can be (0..15). + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval The input port pin value. + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 598 .loc 1 385 0 + 599 .cfi_startproc + 600 @ args = 0, pretend = 0, frame = 0 + 601 @ frame_needed = 0, uses_anonymous_args = 0 + 602 @ link register save eliminated. + 603 .LVL62: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_PinState bitstatus; + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) + 604 .loc 1 391 0 + 605 0000 0369 ldr r3, [r0, #16] + 606 0002 0B42 tst r3, r1 + 607 0004 01D1 bne .L42 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** bitstatus = GPIO_PIN_SET; + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** bitstatus = GPIO_PIN_RESET; + 608 .loc 1 397 0 + 609 0006 0020 movs r0, #0 + 610 .LVL63: + 611 .L40: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return bitstatus; + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 612 .loc 1 400 0 + 613 @ sp needed + 614 0008 7047 bx lr + 615 .LVL64: + 616 .L42: + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 617 .loc 1 393 0 + 618 000a 0120 movs r0, #1 + 619 .LVL65: + 620 000c FCE7 b .L40 + 621 .cfi_endproc + 622 .LFE42: + 624 .section .text.HAL_GPIO_WritePin,"ax",%progbits + 625 .align 1 + 626 .global HAL_GPIO_WritePin + 627 .syntax unified + 628 .code 16 + 629 .thumb_func + 630 .fpu softvfp + 632 HAL_GPIO_WritePin: + 633 .LFB43: + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + ARM GAS /tmp/cclHgak8.s page 20 + + + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Set or clear the selected data port bit. + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the read and the modify access. + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..H) to select the GPIO peripheral for STM32F0 family + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param PinState specifies the value to be written to the selected bit. + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of the GPIO_PinState enum values: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @arg GPIO_PIN_RESET: to clear the port pin + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @arg GPIO_PIN_SET: to set the port pin + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 634 .loc 1 418 0 + 635 .cfi_startproc + 636 @ args = 0, pretend = 0, frame = 0 + 637 @ frame_needed = 0, uses_anonymous_args = 0 + 638 @ link register save eliminated. + 639 .LVL66: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_ACTION(PinState)); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (PinState != GPIO_PIN_RESET) + 640 .loc 1 423 0 + 641 0000 002A cmp r2, #0 + 642 0002 01D1 bne .L46 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin; + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BRR = (uint32_t)GPIO_Pin; + 643 .loc 1 429 0 + 644 0004 8162 str r1, [r0, #40] + 645 .L43: + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 646 .loc 1 431 0 + 647 @ sp needed + 648 0006 7047 bx lr + 649 .L46: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 650 .loc 1 425 0 + 651 0008 8161 str r1, [r0, #24] + 652 000a FCE7 b .L43 + 653 .cfi_endproc + 654 .LFE43: + 656 .section .text.HAL_GPIO_TogglePin,"ax",%progbits + 657 .align 1 + 658 .global HAL_GPIO_TogglePin + 659 .syntax unified + 660 .code 16 + 661 .thumb_func + ARM GAS /tmp/cclHgak8.s page 21 + + + 662 .fpu softvfp + 664 HAL_GPIO_TogglePin: + 665 .LFB44: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Toggle the specified GPIO pin. + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the pin to be toggled. + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 666 .loc 1 440 0 + 667 .cfi_startproc + 668 @ args = 0, pretend = 0, frame = 0 + 669 @ frame_needed = 0, uses_anonymous_args = 0 + 670 @ link register save eliminated. + 671 .LVL67: + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if ((GPIOx->ODR & GPIO_Pin) != 0X00u) + 672 .loc 1 444 0 + 673 0000 4369 ldr r3, [r0, #20] + 674 0002 1942 tst r1, r3 + 675 0004 01D1 bne .L50 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER; + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin; + 676 .loc 1 450 0 + 677 0006 8161 str r1, [r0, #24] + 678 .LVL68: + 679 .L47: + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 680 .loc 1 452 0 + 681 @ sp needed + 682 0008 7047 bx lr + 683 .LVL69: + 684 .L50: + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 685 .loc 1 446 0 + 686 000a 0904 lsls r1, r1, #16 + 687 .LVL70: + 688 000c 8161 str r1, [r0, #24] + 689 000e FBE7 b .L47 + 690 .cfi_endproc + 691 .LFE44: + 693 .section .text.HAL_GPIO_LockPin,"ax",%progbits + 694 .align 1 + 695 .global HAL_GPIO_LockPin + 696 .syntax unified + 697 .code 16 + 698 .thumb_func + ARM GAS /tmp/cclHgak8.s page 22 + + + 699 .fpu softvfp + 701 HAL_GPIO_LockPin: + 702 .LFB45: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Locks GPIO Pins configuration registers. + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note The configuration of the locked GPIO pins can no longer be modified + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * until the next reset. + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bits to be locked. + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 703 .loc 1 466 0 + 704 .cfi_startproc + 705 @ args = 0, pretend = 0, frame = 8 + 706 @ frame_needed = 0, uses_anonymous_args = 0 + 707 @ link register save eliminated. + 708 .LVL71: + 709 0000 82B0 sub sp, sp, #8 + 710 .LCFI5: + 711 .cfi_def_cfa_offset 8 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __IO uint32_t tmp = GPIO_LCKR_LCKK; + 712 .loc 1 467 0 + 713 0002 8022 movs r2, #128 + 714 0004 5202 lsls r2, r2, #9 + 715 0006 0192 str r2, [sp, #4] + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Apply lock key write sequence */ + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SET_BIT(tmp, GPIO_Pin); + 716 .loc 1 474 0 + 717 0008 019B ldr r3, [sp, #4] + 718 000a 0B43 orrs r3, r1 + 719 000c 0193 str r3, [sp, #4] + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 720 .loc 1 476 0 + 721 000e 019B ldr r3, [sp, #4] + 722 0010 C361 str r3, [r0, #28] + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = GPIO_Pin; + 723 .loc 1 478 0 + 724 0012 C161 str r1, [r0, #28] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 725 .loc 1 480 0 + 726 0014 019B ldr r3, [sp, #4] + 727 0016 C361 str r3, [r0, #28] + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Read LCKK register. This read is mandatory to complete key lock sequence */ + ARM GAS /tmp/cclHgak8.s page 23 + + + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = GPIOx->LCKR; + 728 .loc 1 482 0 + 729 0018 C369 ldr r3, [r0, #28] + 730 001a 0193 str r3, [sp, #4] + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* read again in order to confirm lock is active */ + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIOx->LCKR & GPIO_LCKR_LCKK) != 0x00u) + 731 .loc 1 485 0 + 732 001c C369 ldr r3, [r0, #28] + 733 001e 1342 tst r3, r2 + 734 0020 02D1 bne .L54 + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return HAL_OK; + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return HAL_ERROR; + 735 .loc 1 491 0 + 736 0022 0120 movs r0, #1 + 737 .LVL72: + 738 .L52: + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 739 .loc 1 493 0 + 740 0024 02B0 add sp, sp, #8 + 741 @ sp needed + 742 0026 7047 bx lr + 743 .LVL73: + 744 .L54: + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 745 .loc 1 487 0 + 746 0028 0020 movs r0, #0 + 747 .LVL74: + 748 002a FBE7 b .L52 + 749 .cfi_endproc + 750 .LFE45: + 752 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits + 753 .align 1 + 754 .weak HAL_GPIO_EXTI_Callback + 755 .syntax unified + 756 .code 16 + 757 .thumb_func + 758 .fpu softvfp + 760 HAL_GPIO_EXTI_Callback: + 761 .LFB47: + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Handle EXTI interrupt request. + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u) + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); + ARM GAS /tmp/cclHgak8.s page 24 + + + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief EXTI line detection callback. + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 762 .loc 1 516 0 + 763 .cfi_startproc + 764 @ args = 0, pretend = 0, frame = 0 + 765 @ frame_needed = 0, uses_anonymous_args = 0 + 766 @ link register save eliminated. + 767 .LVL75: + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Prevent unused argument(s) compilation warning */ + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** UNUSED(GPIO_Pin); + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* NOTE: This function should not be modified, when the callback is needed, + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** the HAL_GPIO_EXTI_Callback could be implemented in the user file + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 768 .loc 1 523 0 + 769 @ sp needed + 770 0000 7047 bx lr + 771 .cfi_endproc + 772 .LFE47: + 774 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits + 775 .align 1 + 776 .global HAL_GPIO_EXTI_IRQHandler + 777 .syntax unified + 778 .code 16 + 779 .thumb_func + 780 .fpu softvfp + 782 HAL_GPIO_EXTI_IRQHandler: + 783 .LFB46: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 784 .loc 1 501 0 + 785 .cfi_startproc + 786 @ args = 0, pretend = 0, frame = 0 + 787 @ frame_needed = 0, uses_anonymous_args = 0 + 788 .LVL76: + 789 0000 10B5 push {r4, lr} + 790 .LCFI6: + 791 .cfi_def_cfa_offset 8 + 792 .cfi_offset 4, -8 + 793 .cfi_offset 14, -4 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 794 .loc 1 503 0 + 795 0002 054B ldr r3, .L59 + 796 0004 5B69 ldr r3, [r3, #20] + 797 0006 1842 tst r0, r3 + 798 0008 00D1 bne .L58 + 799 .LVL77: + 800 .L56: + ARM GAS /tmp/cclHgak8.s page 25 + + + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 801 .loc 1 508 0 + 802 @ sp needed + 803 000a 10BD pop {r4, pc} + 804 .LVL78: + 805 .L58: + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 806 .loc 1 505 0 + 807 000c 024B ldr r3, .L59 + 808 000e 5861 str r0, [r3, #20] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 809 .loc 1 506 0 + 810 0010 FFF7FEFF bl HAL_GPIO_EXTI_Callback + 811 .LVL79: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 812 .loc 1 508 0 + 813 0014 F9E7 b .L56 + 814 .L60: + 815 0016 C046 .align 2 + 816 .L59: + 817 0018 00040140 .word 1073808384 + 818 .cfi_endproc + 819 .LFE46: + 821 .text + 822 .Letext0: + 823 .file 2 "/usr/include/newlib/machine/_default_types.h" + 824 .file 3 "/usr/include/newlib/sys/_stdint.h" + 825 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 826 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 827 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 828 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + 829 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/cclHgak8.s page 26 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_gpio.c + /tmp/cclHgak8.s:16 .text.HAL_GPIO_Init:0000000000000000 $t + /tmp/cclHgak8.s:23 .text.HAL_GPIO_Init:0000000000000000 HAL_GPIO_Init + /tmp/cclHgak8.s:369 .text.HAL_GPIO_Init:000000000000017c $d + /tmp/cclHgak8.s:380 .text.HAL_GPIO_DeInit:0000000000000000 $t + /tmp/cclHgak8.s:387 .text.HAL_GPIO_DeInit:0000000000000000 HAL_GPIO_DeInit + /tmp/cclHgak8.s:579 .text.HAL_GPIO_DeInit:00000000000000ec $d + /tmp/cclHgak8.s:589 .text.HAL_GPIO_ReadPin:0000000000000000 $t + /tmp/cclHgak8.s:596 .text.HAL_GPIO_ReadPin:0000000000000000 HAL_GPIO_ReadPin + /tmp/cclHgak8.s:625 .text.HAL_GPIO_WritePin:0000000000000000 $t + /tmp/cclHgak8.s:632 .text.HAL_GPIO_WritePin:0000000000000000 HAL_GPIO_WritePin + /tmp/cclHgak8.s:657 .text.HAL_GPIO_TogglePin:0000000000000000 $t + /tmp/cclHgak8.s:664 .text.HAL_GPIO_TogglePin:0000000000000000 HAL_GPIO_TogglePin + /tmp/cclHgak8.s:694 .text.HAL_GPIO_LockPin:0000000000000000 $t + /tmp/cclHgak8.s:701 .text.HAL_GPIO_LockPin:0000000000000000 HAL_GPIO_LockPin + /tmp/cclHgak8.s:753 .text.HAL_GPIO_EXTI_Callback:0000000000000000 $t + /tmp/cclHgak8.s:760 .text.HAL_GPIO_EXTI_Callback:0000000000000000 HAL_GPIO_EXTI_Callback + /tmp/cclHgak8.s:775 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 $t + /tmp/cclHgak8.s:782 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 HAL_GPIO_EXTI_IRQHandler + /tmp/cclHgak8.s:817 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000018 $d + +NO UNDEFINED SYMBOLS diff --git a/fw/midi-dials/build/stm32f0xx_hal_gpio.o b/fw/midi-dials/build/stm32f0xx_hal_gpio.o Binary files differnew file mode 100644 index 0000000..8a033c9 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_gpio.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_i2c.d b/fw/midi-dials/build/stm32f0xx_hal_i2c.d new file mode 100644 index 0000000..0501c2f --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_i2c.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_i2c.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_i2c.lst b/fw/midi-dials/build/stm32f0xx_hal_i2c.lst new file mode 100644 index 0000000..f4e7a61 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_i2c.lst @@ -0,0 +1,20498 @@ +ARM GAS /tmp/ccskJbbb.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_i2c.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.I2C_Flush_TXDR,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 I2C_Flush_TXDR: + 23 .LFB102: + 24 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @file stm32f0xx_hal_i2c.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * functionalities of the Inter Integrated Circuit (I2C) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + Peripheral State and Errors functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================================================================== + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### How to use this driver ##### + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================================================================== + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The I2C HAL driver can be used as follows: + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Declare a I2C_HandleTypeDef handle structure, for example: + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef hi2c; + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#)Initialize the I2C low level resources by implementing the @ref HAL_I2C_MspInit() API: + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) Enable the I2Cx interface clock + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) I2C pins configuration + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Enable the clock for the I2C GPIOs + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure I2C pins as alternate function open-drain + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) NVIC configuration if you need to use interrupt process + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the I2Cx interrupt priority + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Enable the NVIC I2C IRQ Channel + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (##) DMA Configuration if you need to use DMA process + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive channel + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Enable the DMAx interface clock using + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the DMA handle parameters + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the DMA Tx or Rx channel + ARM GAS /tmp/ccskJbbb.s page 2 + + + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the DMA Tx or Rx channel + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Configure the Communication Clock Timing, Own Address1, Master Addressing mode, Dual Addres + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Own Address2, Own Address2 Mask, General call and Nostretch mode in the hi2c Init structure + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Initialize the I2C registers by calling the @ref HAL_I2C_Init(), configures also the low le + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (GPIO, CLOCK, NVIC...etc) by calling the customized @ref HAL_I2C_MspInit(&hi2c) API. + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) To check if target device is ready for communication, use the function @ref HAL_I2C_IsDevic + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) For I2C IO and IO MEM operations, three operation modes are available within this driver : + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Polling mode IO operation *** + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ================================= + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Tran + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in blocking mode using @ref HAL_I2C_Master_Recei + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Transm + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in blocking mode using @ref HAL_I2C_Slave_Receive + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Polling mode IO MEM operation *** + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ===================================== + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Write an amount of data in blocking mode to a specific memory address using @ref HAL_I2C_ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Read an amount of data in blocking mode from a specific memory address using @ref HAL_I2C + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Interrupt mode IO operation *** + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =================================== + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback( + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode using @ref HAL_I2C_Master_R + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user ca + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback( + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Tr + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback() + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode using @ref HAL_I2C_Slave_Rec + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback() + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_I + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback() + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro. + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Interrupt mode or DMA mode IO sequential operation *** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ========================================================== + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (@) These interfaces allow to manage a sequential transfer with a repeated start condition + ARM GAS /tmp/ccskJbbb.s page 3 + + + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** when a direction change during transfer + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) A specific option field manage the different steps of a sequential transfer + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below: + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfa + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start con + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and data to transfer without a final stop condition + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_FIRST_AND_NEXT_FRAME: Sequential usage (Master only), this option allow to manage a + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and data to transfer without a final stop condition, an then permit a c + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** several times (like @ref HAL_I2C_Master_Seq_Transmit_IT() then @ref HAL + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or @ref HAL_I2C_Master_Seq_Transmit_DMA() then @ref HAL_I2C_Master_Seq_ + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if no direction change and without a final stop condition in both cases + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and with new data to transfer if the direction change or manage only th + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if no direction change and with a final stop condition in both cases + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_LAST_FRAME_NO_STOP: Sequential usage (Master only), this option allow to manage a re + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** interface several times (link with option I2C_FIRST_AND_NEXT_FRAME). + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Usage can, transfer several bytes one by one using HAL_I2C_Master_Seq_T + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_AND_NEXT_FRAME then + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_AND_NEXT_FRAME th + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_AND_NEXT_FRAME the + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Then usage of this option I2C_LAST_FRAME_NO_STOP at the last Transmit o + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** without stopping the communication and so generate a restart conditio + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) I2C_OTHER_FRAME: Sequential usage (Master only), this option allow to manage a restart c + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** interface. + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Usage can, transfer several bytes one by one with a restart with slave + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT(option I2C_FIRST_FRAME then I2C_OTHE + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA(option I2C_FIRST_FRAME then I2C_OT + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA(option I2C_FIRST_FRAME then I2C_OTH + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Then usage of this option I2C_OTHER_AND_LAST_FRAME at the last frame to + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Differents sequential I2C interfaces are listed below: + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using @ref + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or using @ref HAL_I2C_Master_Seq_Transmit_DMA() + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, @ref HAL_I2C_MasterTxCpltCallback() is e + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback( + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using @ref + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or using @ref HAL_I2C_Master_Seq_Receive_DMA() + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At reception end of current frame transfer, @ref HAL_I2C_MasterRxCpltCallback() is exec + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback( + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Abort a master IT or DMA I2C process communication with Interrupt using @ref HAL_I2C_Mas + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback() + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Enable/disable the Address listen mode in slave I2C mode using @ref HAL_I2C_EnableListen + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) When address slave I2C match, @ref HAL_I2C_AddrCallback() is executed and user can + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code to check the Address Match Code and the transmission direction request + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At Listen mode end @ref HAL_I2C_ListenCpltCallback() is executed and user can + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_ListenCpltCallback() + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using @ref + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or using @ref HAL_I2C_Slave_Seq_Transmit_DMA() + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At transmission end of current frame transfer, @ref HAL_I2C_SlaveTxCpltCallback() is ex + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback() + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using @ref H + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or using @ref HAL_I2C_Slave_Seq_Receive_DMA() + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+++) At reception end of current frame transfer, @ref HAL_I2C_SlaveRxCpltCallback() is execu + ARM GAS /tmp/ccskJbbb.s page 4 + + + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback() + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user ca + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro. + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Interrupt mode IO MEM operation *** + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ======================================= + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with Interrupt to a specific memory address + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref HAL_I2C_Mem_Write_IT() + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user ca + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback() + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with Interrupt from a specific memory address + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref HAL_I2C_Mem_Read_IT() + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback() + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** DMA mode IO operation *** + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================== + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in master mode an amount of data in non-blocking mode (DMA) using + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref HAL_I2C_Master_Transmit_DMA() + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, @ref HAL_I2C_MasterTxCpltCallback() is executed and user + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MasterTxCpltCallback( + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode (DMA) using + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref HAL_I2C_Master_Receive_DMA() + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, @ref HAL_I2C_MasterRxCpltCallback() is executed and user ca + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MasterRxCpltCallback( + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Transmit in slave mode an amount of data in non-blocking mode (DMA) using + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref HAL_I2C_Slave_Transmit_DMA() + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At transmission end of transfer, @ref HAL_I2C_SlaveTxCpltCallback() is executed and user + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_SlaveTxCpltCallback() + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode (DMA) using + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref HAL_I2C_Slave_Receive_DMA() + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At reception end of transfer, @ref HAL_I2C_SlaveRxCpltCallback() is executed and user can + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_SlaveRxCpltCallback() + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Abort a master I2C process communication with Interrupt using @ref HAL_I2C_Master_Abort_I + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) End of abort process, @ref HAL_I2C_AbortCpltCallback() is executed and user can + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_AbortCpltCallback() + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Discard a slave I2C process communication using @ref __HAL_I2C_GENERATE_NACK() macro. + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This action will inform Master to generate a Stop condition to discard the communication + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** DMA mode IO MEM operation *** + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ================================= + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Write an amount of data in non-blocking mode with DMA to a specific memory address using + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref HAL_I2C_Mem_Write_DMA() + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of write transfer, @ref HAL_I2C_MemTxCpltCallback() is executed and user ca + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MemTxCpltCallback() + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Read an amount of data in non-blocking mode with DMA from a specific memory address using + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref HAL_I2C_Mem_Read_DMA() + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) At Memory end of read transfer, @ref HAL_I2C_MemRxCpltCallback() is executed and user can + ARM GAS /tmp/ccskJbbb.s page 5 + + + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_MemRxCpltCallback() + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) In case of transfer Error, @ref HAL_I2C_ErrorCallback() function is executed and user can + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** add his own code by customization of function pointer @ref HAL_I2C_ErrorCallback() + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** I2C HAL driver macros list *** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ================================== + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Below the list of most used macros in I2C HAL driver. + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) @ref __HAL_I2C_ENABLE: Enable the I2C peripheral + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) @ref __HAL_I2C_DISABLE: Disable the I2C peripheral + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) @ref __HAL_I2C_GENERATE_NACK: Generate a Non-Acknowledge I2C peripheral in Slave mode + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) @ref __HAL_I2C_GET_FLAG: Check whether the specified I2C flag is set or not + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) @ref __HAL_I2C_CLEAR_FLAG: Clear the specified I2C pending flag + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) @ref __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) @ref __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *** Callback registration *** + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ============================================= + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The compilation flag USE_HAL_I2C_REGISTER_CALLBACKS when set to 1 + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** allows the user to configure dynamically the driver callbacks. + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Use Functions @ref HAL_I2C_RegisterCallback() or @ref HAL_I2C_RegisterAddrCallback() + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to register an interrupt callback. + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Function @ref HAL_I2C_RegisterCallback() allows to register following callbacks: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This function takes as parameters the HAL peripheral handle, the Callback ID + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and a pointer to the user callback function. + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** For specific callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_RegisterAdd + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Use function @ref HAL_I2C_UnRegisterCallback to reset a callback to the default + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** weak function. + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @ref HAL_I2C_UnRegisterCallback takes as parameters the HAL peripheral handle, + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and the Callback ID. + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This function allows to reset following callbacks: + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer. + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MasterRxCpltCallback : callback for Master reception end of transfer. + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveTxCpltCallback : callback for Slave transmission end of transfer. + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) SlaveRxCpltCallback : callback for Slave reception end of transfer. + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ListenCpltCallback : callback for end of listen mode. + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemTxCpltCallback : callback for Memory transmission end of transfer. + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MemRxCpltCallback : callback for Memory reception end of transfer. + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) ErrorCallback : callback for error detection. + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) AbortCpltCallback : callback for abort completion process. + ARM GAS /tmp/ccskJbbb.s page 6 + + + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspInitCallback : callback for Msp Init. + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) MspDeInitCallback : callback for Msp DeInit. + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** For callback AddrCallback use dedicated register callbacks : @ref HAL_I2C_UnRegisterAddrCallba + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** By default, after the @ref HAL_I2C_Init() and when the state is @ref HAL_I2C_STATE_RESET + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** all callbacks are set to the corresponding weak functions: + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** examples @ref HAL_I2C_MasterTxCpltCallback(), @ref HAL_I2C_MasterRxCpltCallback(). + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Exception done for MspInit and MspDeInit functions that are + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** reset to the legacy weak functions in the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() only when + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** these callbacks are null (not registered beforehand). + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** If MspInit or MspDeInit are not null, the @ref HAL_I2C_Init()/ @ref HAL_I2C_DeInit() + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state. + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Callbacks can be registered/unregistered in @ref HAL_I2C_STATE_READY state only. + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** in @ref HAL_I2C_STATE_READY or @ref HAL_I2C_STATE_RESET state, + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit. + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** Then, the user first registers the MspInit/MspDeInit user callbacks + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** using @ref HAL_I2C_RegisterCallback() before calling @ref HAL_I2C_DeInit() + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or @ref HAL_I2C_Init() function. + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** When the compilation flag USE_HAL_I2C_REGISTER_CALLBACKS is set to 0 or + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** not defined, the callback registration feature is not available and all callbacks + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** are set to the corresponding weak functions. + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (@) You can refer to the I2C HAL driver header file for more useful macros + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ****************************************************************************** + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @attention + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * All rights reserved.</center></h2> + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This software component is licensed by ST under BSD 3-Clause license, + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the "License"; You may not use this file except in compliance with the + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * License. You may obtain a copy of the License at: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * opensource.org/licenses/BSD-3-Clause + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ****************************************************************************** + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Includes ------------------------------------------------------------------*/ + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #include "stm32f0xx_hal.h" + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @addtogroup STM32F0xx_HAL_Driver + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C I2C + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C HAL module driver + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #ifdef HAL_I2C_MODULE_ENABLED + ARM GAS /tmp/ccskJbbb.s page 7 + + + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private typedef -----------------------------------------------------------*/ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define ------------------------------------------------------------*/ + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Private_Define I2C Private Define + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define TIMING_CLEAR_MASK (0xF0FFFFFFU) /*!< I2C TIMING clear register Mask */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_ADDR (10000U) /*!< 10 s */ + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_BUSY (25U) /*!< 25 ms */ + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_DIR (25U) /*!< 25 ms */ + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_RXNE (25U) /*!< 25 ms */ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_STOPF (25U) /*!< 25 ms */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_TC (25U) /*!< 25 ms */ + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_TCR (25U) /*!< 25 ms */ + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_TXIS (25U) /*!< 25 ms */ + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_TIMEOUT_FLAG (25U) /*!< 25 ms */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define MAX_NBYTE_SIZE 255U + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define SlaveAddr_SHIFT 7U + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define SlaveAddr_MSK 0x06U + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define for @ref PreviousState usage */ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MSK ((uint32_t)((uint32_t)((uint32_t)HAL_I2C_STATE_BUSY_TX | (uint32_ + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | ( + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | ( + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | ( + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | ( + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_TX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | ( + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_STATE_MEM_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | ( + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define to centralize the enable/disable of Interrupts */ + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_TX_IT (0x00000001U) + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_RX_IT (0x00000002U) + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_LISTEN_IT (0x00000004U) + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_ERROR_IT (0x00000011U) + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_CPLT_IT (0x00000012U) + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_XFER_RELOAD_IT (0x00000012U) + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private define Sequential Transfer Options default/reset value */ + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #define I2C_NO_OPTION_FRAME (0xFFFF0000U) + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private macro -------------------------------------------------------------*/ + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private variables ---------------------------------------------------------*/ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function prototypes -----------------------------------------------*/ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Private_Functions I2C Private Functions + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle DMA transfer */ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma); + ARM GAS /tmp/ccskJbbb.s page 8 + + + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma); + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma); + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma); + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma); + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma); + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c); + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c); + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags); + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode); + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle IT transfer */ + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint1 + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16 + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions for I2C transfer IRQ handler */ + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint3 + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uin + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to handle flags during polling transfer */ + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_ + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private functions to centralize the enable/disable of Interrupts */ + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest); + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to flush TXDR register */ + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c); + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to handle start, restart or stop a transfer */ + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Private function to Convert Specific options */ + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Exported functions --------------------------------------------------------*/ + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions I2C Exported Functions + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Initialization and Configuration functions + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + ARM GAS /tmp/ccskJbbb.s page 9 + + + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### Initialization and de-initialization functions ##### + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] This subsection provides a set of functions allowing to initialize and + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** deinitialize the I2Cx peripheral: + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) User must Implement HAL_I2C_MspInit() function in which he configures + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ). + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Call the function HAL_I2C_Init() to configure the selected device with + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the selected configuration: + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Clock Timing + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Own Address 1 + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Addressing mode (Master, Slave) + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Dual Addressing mode + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Own Address 2 + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Own Address 2 Mask + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) General call mode + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Nostretch mode + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (+) Call the function HAL_I2C_DeInit() to restore the default configuration + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** of the selected I2Cx peripheral. + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Initializes the I2C according to the specified parameters + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in the I2C_InitTypeDef and initialize the associated handle. + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c == NULL) + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1)); + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode)); + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode)); + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_RESET) + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Allocate lock resource and initialize it */ + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Lock = HAL_UNLOCKED; + ARM GAS /tmp/ccskJbbb.s page 10 + + + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init the I2C Callback settings */ + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallback + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallback + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallback + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallback + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallback + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->MspInitCallback == NULL) + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit */ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback(hi2c); + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MspInit(hi2c); + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable the selected I2C peripheral */ + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Frequency range */ + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Own Address1 before set the Own Address1 configuration */ + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Own Address1 and ack own address1 mode */ + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else /* I2C_ADDRESSINGMODE_10BIT */ + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx CR2 Configuration ----------------------*/ + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Addressing Master mode */ + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 = (I2C_CR2_ADD10); + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ + ARM GAS /tmp/ccskJbbb.s page 11 + + + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Own Address2 before set the Own Address2 configuration */ + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Dual mode and Own Address2 */ + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | (hi2c->Init.OwnAddr + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /*---------------------------- I2Cx CR1 Configuration ----------------------*/ + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Configure I2Cx: Generalcall and NoStretch mode */ + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the selected I2C peripheral */ + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_ENABLE(hi2c); + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DeInitialize the I2C peripheral. + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c) + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c == NULL) + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable the I2C Peripheral Clock */ + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE(hi2c); + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->MspDeInitCallback == NULL) + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit */ + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback(hi2c); + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MspDeInit(hi2c); + ARM GAS /tmp/ccskJbbb.s page 12 + + + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Release Lock */ + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Initialize the I2C MSP. + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c) + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MspInit could be implemented in the user file + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DeInitialize the I2C MSP. + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c) + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MspDeInit could be implemented in the user file + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Register a User I2C Callback + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * To be used instead of the weak predefined callback + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param CallbackID ID of the callback to be registered + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + ARM GAS /tmp/ccskJbbb.s page 13 + + + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pCallback pointer to the Callback function + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Callb + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (pCallback == NULL) + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = pCallback; + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = pCallback; + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = pCallback; + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = pCallback; + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback = pCallback; + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback = pCallback; + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback = pCallback; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + ARM GAS /tmp/ccskJbbb.s page 14 + + + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback = pCallback; + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback = pCallback; + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = pCallback; + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = pCallback; + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Release Lock */ + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; + ARM GAS /tmp/ccskJbbb.s page 15 + + + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Unregister an I2C Callback + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * I2C callback is redirected to the weak predefined callback + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param CallbackID ID of the callback to be unregistered + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_TX_COMPLETE_CB_ID Master Tx Transfer completed callback ID + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MASTER_RX_COMPLETE_CB_ID Master Rx Transfer completed callback ID + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_TX_COMPLETE_CB_ID Slave Tx Transfer completed callback ID + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_SLAVE_RX_COMPLETE_CB_ID Slave Rx Transfer completed callback ID + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_LISTEN_COMPLETE_CB_ID Listen Complete callback ID + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_TX_COMPLETE_CB_ID Memory Tx Transfer callback ID + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MEM_RX_COMPLETE_CB_ID Memory Rx Transfer completed callback ID + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ERROR_CB_ID Error callback ID + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_ABORT_CB_ID Abort callback ID + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPINIT_CB_ID MspInit callback ID + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref HAL_I2C_MSPDEINIT_CB_ID MspDeInit callback ID + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterCallback(I2C_HandleTypeDef *hi2c, HAL_I2C_CallbackIDTypeDef Cal + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_TX_COMPLETE_CB_ID : + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback = HAL_I2C_MasterTxCpltCallback; /* Legacy weak MasterTxCpltCallb + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID : + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallb + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID : + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = HAL_I2C_SlaveTxCpltCallback; /* Legacy weak SlaveTxCpltCallba + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_SLAVE_RX_COMPLETE_CB_ID : + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback = HAL_I2C_SlaveRxCpltCallback; /* Legacy weak SlaveRxCpltCallba + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_LISTEN_COMPLETE_CB_ID : + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback = HAL_I2C_ListenCpltCallback; /* Legacy weak ListenCpltCallbac + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_TX_COMPLETE_CB_ID : + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback = HAL_I2C_MemTxCpltCallback; /* Legacy weak MemTxCpltCallback + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + ARM GAS /tmp/ccskJbbb.s page 16 + + + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MEM_RX_COMPLETE_CB_ID : + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback = HAL_I2C_MemRxCpltCallback; /* Legacy weak MemRxCpltCallback + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ERROR_CB_ID : + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback = HAL_I2C_ErrorCallback; /* Legacy weak ErrorCallback + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_ABORT_CB_ID : + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback = HAL_I2C_AbortCpltCallback; /* Legacy weak AbortCpltCallback + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (HAL_I2C_STATE_RESET == hi2c->State) + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** switch (CallbackID) + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPINIT_CB_ID : + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspInitCallback = HAL_I2C_MspInit; /* Legacy weak MspInit + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID : + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** default : + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** break; + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + ARM GAS /tmp/ccskJbbb.s page 17 + + + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Release Lock */ + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Register the Slave Address Match I2C Callback + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * To be used instead of the weak HAL_I2C_AddrCallback() predefined callback + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pCallback pointer to the Address Match Callback function + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_RegisterAddrCallback(I2C_HandleTypeDef *hi2c, pI2C_AddrCallbackTypeDef pC + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (pCallback == NULL) + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback = pCallback; + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Release Lock */ + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief UnRegister the Slave Address Match I2C Callback + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * Info Ready I2C Callback is redirected to the weak HAL_I2C_AddrCallback() predefined cal + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_UnRegisterAddrCallback(I2C_HandleTypeDef *hi2c) + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 18 + + + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef status = HAL_OK; + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_I2C_STATE_READY == hi2c->State) + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback = HAL_I2C_AddrCallback; /* Legacy weak AddrCallback */ + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update the error code */ + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK; + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return error status */ + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** status = HAL_ERROR; + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Release Lock */ + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return status; + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group2 Input and Output operation functions + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Data transfers functions + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### IO operation functions ##### + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This subsection provides a set of functions allowing to manage the I2C data + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transfers. + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) There are two modes of transfer: + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) Blocking mode : The communication is performed in the polling mode. + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The status of all data processing is returned by the same function + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** after finishing transfer. + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) No-Blocking mode : The communication is performed using Interrupts + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** or DMA. These functions return the status of the transfer startup. + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** The end of the data processing will be indicated through the + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** using DMA mode. + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) Blocking mode functions are : + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit() + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive() +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit() +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive() +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write() +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read() + ARM GAS /tmp/ccskJbbb.s page 19 + + +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_IsDeviceReady() +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) No-Blocking mode functions with Interrupt are : +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_IT() +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_IT() +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_IT() +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_IT() +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_IT() +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_IT() +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_IT() +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_IT() +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_IT() +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_IT() +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_EnableListen_IT() +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_DisableListen_IT() +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Abort_IT() +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) No-Blocking mode functions with DMA are : +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit_DMA() +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive_DMA() +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Transmit_DMA() +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Receive_DMA() +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Write_DMA() +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Mem_Read_DMA() +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Transmit_DMA() +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Master_Seq_Receive_DMA() +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Transmit_DMA() +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_Slave_Seq_Receive_DMA() +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (#) A set of Transfer Complete Callbacks are provided in non Blocking mode: +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MasterTxCpltCallback() +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MasterRxCpltCallback() +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_SlaveTxCpltCallback() +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_SlaveRxCpltCallback() +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MemTxCpltCallback() +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_MemRxCpltCallback() +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_AddrCallback() +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_ListenCpltCallback() +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_ErrorCallback() +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (++) HAL_I2C_AbortCpltCallback() +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmits in master mode an amount of data in blocking mode. +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pD + ARM GAS /tmp/ccskJbbb.s page 20 + + +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_S +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ + ARM GAS /tmp/ccskJbbb.s page 21 + + +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STA +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_ST +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is set */ +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receives in master mode an amount of data in blocking mode. +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pDa + ARM GAS /tmp/ccskJbbb.s page 22 + + +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_S +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 23 + + +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STA +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_ST +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is set */ +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmits in slave mode an amount of data in blocking mode. +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, ui +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 24 + + +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If 10bit addressing mode is selected */ +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until DIR flag is set Transmitter mode */ +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, RESET, Timeout, tickstart) != HAL_OK) +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ + ARM GAS /tmp/ccskJbbb.s page 25 + + +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->ErrorCode == HAL_I2C_ERROR_AF) +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Normal use case for Transmitter mode */ +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* A NACK is generated to confirm the end of transfer */ +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP flag */ +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + ARM GAS /tmp/ccskJbbb.s page 26 + + +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in blocking mode +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uin +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until ADDR flag is set */ +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK) +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 27 + + +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until DIR flag is reset Receiver mode */ +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_DIR, SET, Timeout, tickstart) != HAL_OK) +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U) +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOP flag is set */ +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP flag */ +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until BUSY flag is reset */ +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, Timeout, tickstart) != HAL_OK) + ARM GAS /tmp/ccskJbbb.s page 28 + + +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 29 + + +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_WRIT +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t * +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ + ARM GAS /tmp/ccskJbbb.s page 30 + + +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 31 + + +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + ARM GAS /tmp/ccskJbbb.s page 32 + + +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in master mode an amount of data in non-blocking mode with DMA +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; + ARM GAS /tmp/ccskJbbb.s page 33 + + +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance-> +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_ + ARM GAS /tmp/ccskJbbb.s page 34 + + +1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ +1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_ +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; + ARM GAS /tmp/ccskJbbb.s page 35 + + +1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in master mode an amount of data in non-blocking mode with DMA +1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ + ARM GAS /tmp/ccskJbbb.s page 36 + + +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to read and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART * +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_ +2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 37 + + +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ +2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_ +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA +2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + ARM GAS /tmp/ccskJbbb.s page 38 + + +2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 39 + + +2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with DMA +2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size) +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ + ARM GAS /tmp/ccskJbbb.s page 40 + + +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + ARM GAS /tmp/ccskJbbb.s page 41 + + +2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Write an amount of data in blocking mode to a specific memory address +2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddre +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 42 + + +2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL +2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE */ +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST +2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS +2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do +2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STA +2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_ST +2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 43 + + +2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U); +2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Read an amount of data in blocking mode from a specific memory address +2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddres +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 44 + + +2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK +2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_ +2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_S +2464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ +2469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do +2472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until RXNE flag is set */ +2474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) +2475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +2480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +2481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +2483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +2484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + ARM GAS /tmp/ccskJbbb.s page 45 + + +2486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +2487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +2489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +2491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) +2492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_ST +2500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_ST +2505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (hi2c->XferCount > 0U); +2509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +2511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +2512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) +2513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +2518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +2519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +2521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +2522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory addres +2538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address + ARM GAS /tmp/ccskJbbb.s page 46 + + +2543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +2549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +2552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +2589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstar +2598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ + ARM GAS /tmp/ccskJbbb.s page 47 + + +2600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +2605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); +2606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +2615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX +2617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +2618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory addre +2629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAdd +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +2643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 48 + + +2657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +2675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +2680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart +2689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +2696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_READ +2697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */ +2706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +2707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_TX +2708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +2709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 49 + + +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address +2719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +2727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemA +2730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +2733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +2741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +2758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +2766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + ARM GAS /tmp/ccskJbbb.s page 50 + + +2771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstar +2780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +2788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +2791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +2794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +2798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +2801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +2820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); +2822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +2824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +2825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccskJbbb.s page 51 + + +2828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +2833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +2834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +2837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +2862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address. +2863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +2864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +2865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +2866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +2867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +2868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +2869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +2870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be read +2871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +2872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +2873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAd +2874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +2876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +2877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +2878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +2880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); +2881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +2883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) + ARM GAS /tmp/ccskJbbb.s page 52 + + +2885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +2891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +2893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +2897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Init tickstart for timeout management*/ +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +2900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +2902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; +2903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +2904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +2906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +2910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +2912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +2914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +2915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +2920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and Memory Address */ +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart +2924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +2931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +2933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +2934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +2936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +2937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +2939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +2940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +2941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 53 + + +2942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +2943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +2944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +2953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +2961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ +2963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, I2C_GENERATE_START_RE +2964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +2967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +2972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +2973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +2974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +2976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +2979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +2982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +2983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +2984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +2985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +2987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +2988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +2990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +2991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +2993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +2995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +2996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +2997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +2998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 54 + + +2999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Checks if target device is ready for communication. +3005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This function is used with Memory devices +3006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Trials Number of trials +3011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +3012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Tria +3015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; +3017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __IO uint32_t I2C_Trials = 0UL; +3019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp1; +3021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** FlagStatus tmp2; +3022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET) +3026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY; +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** do +3037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Start */ +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 = I2C_GENERATE_START(hi2c->Init.AddressingMode, DevAddress); +3040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ +3042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is set or a NACK flag is set*/ +3043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tickstart = HAL_GetTick(); +3044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); +3047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while ((tmp1 == RESET) && (tmp2 == RESET)) +3049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +3051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) +3053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + ARM GAS /tmp/ccskJbbb.s page 55 + + +3056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF); +3068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); +3069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if the NACKF flag has not been set */ +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == RESET) +3073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Device is ready */ +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ +3094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +3101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag, auto generated with autoend*/ +3103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if the maximum allowed number of trials has been reached */ +3107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_Trials == Trials) +3108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +3110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +3111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOPF flag is reset */ + ARM GAS /tmp/ccskJbbb.s page 56 + + +3113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_STOPF, RESET, Timeout, tickstart) != HAL_OK) +3114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +3119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +3120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Trials */ +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Trials++; +3124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (I2C_Trials < Trials); +3126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +3132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with Inte +3146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; +3160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; + ARM GAS /tmp/ccskJbbb.s page 57 + + +3170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, do not gene +3192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST +3194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount < MAX_NBYTE_SIZE) +3204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 58 + + +3227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in master I2C mode an amount of data in non-blocking mode with DMA. +3230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uin +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE; +3244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX; +3255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +3263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, do not gene +3277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST +3279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 59 + + +3284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount < MAX_NBYTE_SIZE) +3289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt; +3300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +3303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +3306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +3307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance-> +3310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to write */ +3329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ + ARM GAS /tmp/ccskJbbb.s page 60 + + +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +3342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +3345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +3367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to write and generate START condition */ +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ +3369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_ +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); +3380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with Inter +3392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer + ARM GAS /tmp/ccskJbbb.s page 61 + + +3398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8 +3403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +3427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, do not gene +3438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST +3440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount < MAX_NBYTE_SIZE) +3450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 62 + + +3455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT); +3465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in master I2C mode an amount of data in non-blocking mode with DMA +3476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +3480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +3481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ; +3490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +3496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX; +3501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; +3502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; +3509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If hi2c->XferCount > MAX_NBYTE_SIZE, use reload mode */ +3511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) + ARM GAS /tmp/ccskJbbb.s page 63 + + +3512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +3515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame, do not gene +3523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean Previous state is same as current state */ +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) && (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST +3525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xferrequest = I2C_NO_STARTSTOP; +3527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */ +3531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c); +3532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update xfermode accordingly if no reload is necessary */ +3534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount < MAX_NBYTE_SIZE) +3535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +3537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferSize > 0U) +3541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt; +3546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +3548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +3549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +3553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)p +3556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 64 + + +3569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address and set NBYTES to read */ +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, xfermode, xferrequest); +3576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_ERROR_IT); +3588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +3590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +3591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +3596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Transfer ISR function pointer */ +3610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; +3611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Slave Address */ +3613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to read and generate START condition */ +3614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ +3615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */ +3623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* possible to enable all of these */ +3624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C_IT_ERRI | I2C_IT_TCI| I2C_IT_STOPI| I2C_IT_NACKI | I2C_IT_ADDRI | I2C_IT_RXI | I2C_IT_ +3625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT); + ARM GAS /tmp/ccskJbbb.s page 65 + + +3626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +3633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +3638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +3647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +3652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +3661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +3666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +3668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +3671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +3674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +3676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +3682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 66 + + +3683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +3684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +3685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +3688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +3695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +3699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +3706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +3708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +3710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +3711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +3712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* REnable ADDR interrupt */ +3721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_LISTEN_IT); +3722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +3732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential transmit in slave/device I2C mode an amount of data in non-blocking mode wit +3733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status + ARM GAS /tmp/ccskJbbb.s page 67 + + +3740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +3744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +3749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +3760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT); +3761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +3763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */ +3764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +3765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +3768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +3770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +3773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +3775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +3779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +3781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +3782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +3785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +3790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +3792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +3794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) + ARM GAS /tmp/ccskJbbb.s page 68 + + +3797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +3801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +3803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +3804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +3807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +3814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN; +3817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +3818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +3821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +3822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +3829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +3833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMASlaveTransmitCplt; +3834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +3836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferErrorCallback = I2C_DMAError; +3837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +3839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferHalfCpltCallback = NULL; +3840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +3841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +3843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)pData, (uint32_t)&hi2c->Instance->TX +3844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +3849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +3853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 69 + + +3854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +3861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +3863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +3864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset XferSize */ +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 0; +3867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +3871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +3872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +3873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +3875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +3876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) +3884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +3886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +3887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +3888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */ +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +3898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +3900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +3901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +3905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + ARM GAS /tmp/ccskJbbb.s page 70 + + +3911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +3912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +3913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +3914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +3915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +3916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +3917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +3918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +3919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +3920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Si +3921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +3923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +3924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +3926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) +3928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +3930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +3931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +3934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +3935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +3938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +3940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ +3941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +3942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +3944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +3945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +3947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +3949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +3951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +3952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +3954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +3955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +3956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +3958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +3959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +3961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +3962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; + ARM GAS /tmp/ccskJbbb.s page 71 + + +3968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +3970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +3972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +3973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +3975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +3977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +3979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +3980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) +3982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +3983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +3984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +3985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +3986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +3989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +3990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +3992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +3993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +3994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* REnable ADDR interrupt */ +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +3996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +3997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +3998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +3999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Sequential receive in slave/device I2C mode an amount of data in non-blocking mode with +4007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @note This interface allow to manage repeated start condition when a direction change during +4008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param pData Pointer to data buffer +4011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Amount of data to be sent +4012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param XferOptions Options of Transfer, value of @ref I2C_XFEROPTIONS +4013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Seq_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t S +4016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; +4018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +4020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions)); +4021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +4023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U)) + ARM GAS /tmp/ccskJbbb.s page 72 + + +4025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; +4027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts, to prevent preemption during treatment in case of multicall */ +4031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT); +4032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */ +4037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */ +4038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +4039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable associated Interrupts */ +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +4044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +4047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +4049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +4053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +4056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +4059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +4064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +4066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +4068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA Xfer if any */ +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +4073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +4075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +4077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +4078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ +4080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +4081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 73 + + +4082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +4088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN; +4091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; +4092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +4093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable Address Acknowledge */ +4095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK; +4096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare transfer parameters */ +4098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr = pData; +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; +4100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; +4103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +4105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */ +4107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMASlaveReceiveCplt; +4108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the DMA error callback */ +4110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferErrorCallback = I2C_DMAError; +4111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the unused DMA callbacks to NULL */ +4113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferHalfCpltCallback = NULL; +4114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +4115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +4117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** dmaxferstatus = HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)pDa +4118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM; +4127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (dmaxferstatus == HAL_OK) +4135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 74 + + +4139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset XferSize */ +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = 0; +4141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C state */ +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update I2C error code */ +4149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA; +4150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_DIR(hi2c) == I2C_DIRECTION_TRANSMIT) +4158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */ +4160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */ +4161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +4162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* REnable ADDR interrupt */ +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_LISTEN_IT); +4172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +4174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +4175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Enable the Address listen mode with Interrupt. +4186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c) +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) +4193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +4195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + ARM GAS /tmp/ccskJbbb.s page 75 + + +4196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the Address Match interrupt */ +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +4205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Disable the Address listen mode with Interrupt. +4210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C +4212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c) +4215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ +4217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmp; +4218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address listen mode only if a transfer is not ongoing */ +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +4221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK; +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); +4224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +4225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +4227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable the Address Match interrupt */ +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +4230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_BUSY; +4236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Abort a master I2C IT or DMA process communication with Interrupt. +4241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +4244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +4245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress) +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MASTER) +4250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); + ARM GAS /tmp/ccskJbbb.s page 76 + + +4253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +4255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +4256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +4257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set State at HAL_I2C_STATE_ABORT */ +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_ABORT; +4260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set NBYTES to 1 to generate a dummy read on I2C peripheral */ +4262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfe +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, 1, I2C_AUTOEND_MODE, I2C_GENERATE_STOP); +4264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process +4269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current +4270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** process unlock */ +4271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +4272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong usage of abort function */ +4278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This function should be used only in case of abort monitored by master device */ +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +4280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks +4288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +4289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C event interrupt request. +4293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c) +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C events treatment -------------------------------------*/ +4304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferISR != NULL) +4305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR(hi2c, itflags, itsources); +4307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 77 + + +4310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C error interrupt request. +4312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c) +4317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); +4320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; +4321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C Bus error interrupt occurred ------------------------------------*/ +4323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_E +4324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_BERR; +4326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear BERR flag */ +4328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); +4329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C Over-Run/Under-Run interrupt occurred ----------------------------------------*/ +4332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_OVR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ER +4333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_OVR; +4335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear OVR flag */ +4337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); +4338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* I2C Arbitration Loss error interrupt occurred -------------------------------------*/ +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(itflags, I2C_FLAG_ARLO) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_E +4342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO; +4344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ARLO flag */ +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); +4347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +4351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Error Callback in case of Error detected */ +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmperror & (HAL_I2C_ERROR_BERR | HAL_I2C_ERROR_OVR | HAL_I2C_ERROR_ARLO)) != HAL_I2C_ERROR_ +4354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, tmperror); +4356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master Tx Transfer completed callback. +4361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) +4366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 78 + + +4367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MasterTxCpltCallback could be implemented in the user file +4372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master Rx Transfer completed callback. +4377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) +4382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MasterRxCpltCallback could be implemented in the user file +4388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @brief Slave Tx Transfer completed callback. +4392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c) +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_SlaveTxCpltCallback could be implemented in the user file +4403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Slave Rx Transfer completed callback. +4408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c) +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file +4419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Slave Address Match callback. + ARM GAS /tmp/ccskJbbb.s page 79 + + +4424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XFE +4427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param AddrMatchCode Address Match Code +4428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrM +4431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(TransferDirection); +4435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(AddrMatchCode); +4436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_AddrCallback() could be implemented in the user file +4439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Listen Complete callback. +4444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c) +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_ListenCpltCallback() could be implemented in the user file +4455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Memory Tx Transfer completed callback. +4460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c) +4465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MemTxCpltCallback could be implemented in the user file +4471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Memory Rx Transfer completed callback. +4476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c) + ARM GAS /tmp/ccskJbbb.s page 80 + + +4481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_MemRxCpltCallback could be implemented in the user file +4487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C error callback. +4492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) +4497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_ErrorCallback could be implemented in the user file +4503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C abort callback. +4508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +4511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) +4513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +4515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(hi2c); +4516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed, +4518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** the HAL_I2C_AbortCpltCallback could be implemented in the user file +4519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions +4527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Peripheral State, Mode and Error functions +4528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * +4529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @verbatim +4530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +4531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ##### Peripheral State, Mode and Error functions ##### +4532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** =============================================================================== +4533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** [..] +4534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** This subsection permit to get in run-time the status of the peripheral +4535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** and the data flow. +4536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** @endverbatim + ARM GAS /tmp/ccskJbbb.s page 81 + + +4538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +4539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Return the I2C handle state. +4543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL state +4546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c) +4548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return I2C handle state */ +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->State; +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Returns the I2C Master, Slave, Memory or no mode. +4555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for I2C module +4557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL mode +4558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c) +4560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->Mode; +4562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Return the I2C error code. +4566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval I2C Error Code +4569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c) +4571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->ErrorCode; +4573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @} +4581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** @addtogroup I2C_Private_Functions +4584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @{ +4585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt. +4589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + ARM GAS /tmp/ccskJbbb.s page 82 + + +4595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint +4596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; +4598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +4599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ +4604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +4606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +4609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +4610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +4612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +4614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +4615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, +4617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +4619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +4620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +4623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +4625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +4626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +4628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +4629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, +4631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +4634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +4636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +4637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +4639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +4640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I +4642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) +4644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +4646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +4648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +4650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START +4651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 83 + + +4652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +4656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, hi2c->XferOptions, I2C_NO_S +4658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_ST +4662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ +4668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +4669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +4671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +4672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +4676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +4678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2 +4682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +4684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +4686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +4688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +4689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +4691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +4692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +4696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +4697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +4703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +4704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +4705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 84 + + +4709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +4710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_ +4713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +4715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, tmpITFlags); +4716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with Interrupt. +4726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint3 +4733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +4735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +4736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ +4738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if STOPF is set */ +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_ +4742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave complete process */ +4744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, tmpITFlags); +4745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ +4748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check that I2C transfer finished */ +4750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +4751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean XferCount == 0*/ +4752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So clear Flag NACKF only */ +4753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +4754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) /* Sam +4756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +4758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +4759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAME) +4761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +4763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ + ARM GAS /tmp/ccskJbbb.s page 85 + + +4766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +4767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +4769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +4770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +4771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +4775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +4781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +4782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +4785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +4786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +4788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +4790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +4791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, +4795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > 0U) +4797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +4799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +4800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +4802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +4803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +4805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +4806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferCount == 0U) && \ +4809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +4810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +4812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +4813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, +4816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, tmpITFlags); +4818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TXIS) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, +4820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR only if XferCount not reach "0" */ +4822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* A TXIS flag can be set, during STOP treatment */ + ARM GAS /tmp/ccskJbbb.s page 86 + + +4823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if all Datas have already been sent */ +4824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */ +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > 0U) +4826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write data to TXDR */ +4828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = *hi2c->pBuffPtr; +4829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +4831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +4832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +4834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +4835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +4839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +4841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +4842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +4843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +4849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA. +4859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +4865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uin +4866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; +4868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; +4869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Locked */ +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +4872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NAC +4874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +4876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +4877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set corresponding Error Code */ +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; + ARM GAS /tmp/ccskJbbb.s page 87 + + +4880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No need to generate STOP, it is automatically done */ +4882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* But enable STOP interrupt, to treat it */ +4883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Error callback will be send during stop flag treatment */ +4884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +4885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +4888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TCR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_ +4890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable TC interrupt */ +4892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_TCI); +4893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +4895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Recover Slave address */ +4897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** devaddress = (uint16_t)(hi2c->Instance->CR2 & I2C_CR2_SADD); +4898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prepare the new XferSize to transfer */ +4900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +4901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; +4904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +4909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; +4911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; +4915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the new XferSize in Nbytes register */ +4919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, xfermode, I2C_NO_STARTSTOP); +4920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update XferCount value */ +4922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize; +4923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable DMA Request */ +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +4926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN; +4928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN; +4932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call TxCpltCallback() if no stop mode is set */ + ARM GAS /tmp/ccskJbbb.s page 88 + + +4937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +4938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +4941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TCR flag event */ +4945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +4947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_TC) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_I +4951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +4953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_GET_STOP_MODE(hi2c) != I2C_AUTOEND_MODE) +4955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate a stop condition in case of no transfer option */ +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME) +4958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Generate Stop */ +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP; +4961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master Sequential complete process */ +4965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterSeqCplt(hi2c); +4966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wrong size Status regarding TC flag event */ +4972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +4973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE); +4974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2 +4977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Master complete process */ +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITMasterCplt(hi2c, ITFlags); +4980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +4982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +4983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +4984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +4987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +4988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +4991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +4992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +4993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode with DMA. + ARM GAS /tmp/ccskJbbb.s page 89 + + +4994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +4995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +4996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +4997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITSources Interrupt sources enabled. +4998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +4999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t treatdmanack = 0U; +5004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process locked */ +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_LOCK(hi2c); +5007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if STOPF is set */ +5009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_STOPF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ +5010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave complete process */ +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveCplt(hi2c, ITFlags); +5013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NAC +5016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check that I2C transfer finished */ +5018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */ +5019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean XferCount == 0 */ +5020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So clear Flag NACKF only */ +5021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) || +5022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) +5023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Split check of hdmarx, for MISRA compliance */ +5025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +5026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET) +5028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_DMA_GET_COUNTER(hi2c->hdmarx) == 0U) +5030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** treatdmanack = 1U; +5032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Split check of hdmatx, for MISRA compliance */ +5037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +5038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_TXDMAEN) != RESET) +5040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_DMA_GET_COUNTER(hi2c->hdmatx) == 0U) +5042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** treatdmanack = 1U; +5044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (treatdmanack == 1U) +5049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_LISTEN) && (tmpoptions == I2C_FIRST_AND_LAST_FRAME)) /* S + ARM GAS /tmp/ccskJbbb.s page 90 + + +5051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, ITFlags); +5054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) && (tmpoptions != I2C_NO_OPTION_FRAM +5056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/ +5076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_FIRST_FRAME) || (tmpoptions == I2C_NEXT_FRAME)) +5083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Only Clear NACK Flag, no DMA treatment is pending */ +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(ITFlags, I2C_FLAG_ADDR) != RESET) && (I2C_CHECK_IT_SOURCE(ITSources, I2C +5096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITAddrCplt(hi2c, ITFlags); +5098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; + ARM GAS /tmp/ccskJbbb.s page 91 + + +5108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for write reques +5112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +5116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +5117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +5118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +5119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +5120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint1 +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI +5125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Memory Address */ +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +5139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +5143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TCR flag is set */ +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, Tickstart) != HAL_OK) +5156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Master sends target device address followed by internal memory address for read request + ARM GAS /tmp/ccskJbbb.s page 92 + + +5165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +5166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +5167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value +5168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface +5169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddress Internal memory address +5170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address +5171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +5172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +5173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +5174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16 +5176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR +5178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 8Bit */ +5186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (MemAddSize == I2C_MEMADD_SIZE_8BIT) +5187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send Memory Address */ +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If Memory address size is 16Bit */ +5192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send MSB of Memory Address */ +5195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); +5196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TXIS flag is set */ +5198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) +5199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Send LSB of Memory Address */ +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); +5205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until TC flag is set */ +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) +5209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +5211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +5214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Address complete process callback. +5218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ + ARM GAS /tmp/ccskJbbb.s page 93 + + +5222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint8_t transferdirection; +5225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t slaveaddrcode; +5226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd1code; +5227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t ownadd2code; +5228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ +5230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** UNUSED(ITFlags); +5231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* In case of Listen state, need to inform upper layer of address match code event */ +5233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN) +5234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** transferdirection = I2C_GET_DIR(hi2c); +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); +5237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); +5239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If 10bits addressing mode is selected */ +5241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) +5242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((slaveaddrcode & SlaveAddr_MSK) == ((ownadd1code >> SlaveAddr_SHIFT) & SlaveAddr_MSK)) +5244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = ownadd1code; +5246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrEventCount++; +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) +5248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset Address Event counter */ +5250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrEventCount = 0U; +5251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +5253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +5254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Slave Addr callback */ +5259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = ownadd2code; +5269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +5272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Slave Addr callback */ +5277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); + ARM GAS /tmp/ccskJbbb.s page 94 + + +5279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else 7 bits addressing mode is selected */ +5285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable ADDR Interrupts */ +5288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT); +5289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Slave Addr callback */ +5294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AddrCallback(hi2c, transferdirection, slaveaddrcode); +5296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode); +5298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Else clear address flag only */ +5302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear ADDR flag */ +5305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR); +5306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Master sequential complete process. +5314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c) +5318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ +5320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No Generate Stop, to permit restart mode */ +5323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* The stop will be done at the end of transfer, when I2C_AUTOEND_MODE enable */ +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +5325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +5329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 95 + + +5336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +5339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +5341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +5344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +5349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +5352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +5359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +5361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Slave sequential complete process. +5367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c) +5371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ +5373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN) +5376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */ +5378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; +5380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); +5383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +5390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +5392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + ARM GAS /tmp/ccskJbbb.s page 96 + + +5393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN) +5396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_RX, keep only HAL_I2C_STATE_LISTEN */ +5398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +5399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; +5400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT); +5403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +5410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +5412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Master complete process. +5422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITMasterCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; +5429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +5431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +5432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +5434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +5435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +5439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +5440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_AF) != RESET) +5442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set acknowledge error code */ +5447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 97 + + +5450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +5452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT | I2C_XFER_RX_IT); +5455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store current volatile hi2c->ErrorCode, misra rule */ +5457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmperror = hi2c->ErrorCode; +5458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->State == HAL_I2C_STATE_ABORT) || (tmperror != HAL_I2C_ERROR_NONE)) +5461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_TX */ +5466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) +5467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +5471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemTxCpltCallback(hi2c); +5480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MemTxCpltCallback(hi2c); +5482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c); +5494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterTxCpltCallback(hi2c); +5496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* hi2c->State == HAL_I2C_STATE_BUSY_RX */ +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MEM) +5505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + ARM GAS /tmp/ccskJbbb.s page 98 + + +5507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MemRxCpltCallback(hi2c); +5514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MemRxCpltCallback(hi2c); +5516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->MasterRxCpltCallback(hi2c); +5528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_MasterRxCpltCallback(hi2c); +5530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +5536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Slave complete process. +5541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITSlaveCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); +5548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; +5549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +5552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all interrupts */ +5554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_TX_IT | I2C_XFER_RX_IT); +5555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Address Acknowledge */ +5557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +5558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +5561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +5563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); + ARM GAS /tmp/ccskJbbb.s page 99 + + +5564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If a DMA is ongoing, Update handle size context */ +5566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_TXDMAEN) != RESET) +5567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +5569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmatx); +5571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_CR1_RXDMAEN) != RESET) +5574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +5576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = (uint16_t)__HAL_DMA_GET_COUNTER(hi2c->hdmarx); +5578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Do nothing */ +5583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_RXNE) != RESET) +5587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Remove RXNE flag on temporary variable as read done */ +5589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpITFlags &= ~I2C_FLAG_RXNE; +5590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +5592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +5593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +5595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +5596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +5598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +5601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* All data are not transferred, so set error code accordingly */ +5605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount != 0U) +5606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +5612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +5614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->ErrorCode != HAL_I2C_ERROR_NONE) +5616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode); +5619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ + ARM GAS /tmp/ccskJbbb.s page 100 + + +5621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_LISTEN) +5622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Listen complete process */ +5624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITListenCplt(hi2c, tmpITFlags); +5625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) +5628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Sequential Complete callback, to inform upper layer of the end of Tranfer */ +5630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +5633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +5639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +5641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +5643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX) +5647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveRxCpltCallback(hi2c); +5656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveRxCpltCallback(hi2c); +5658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback(hi2c); +5670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c); +5672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Listen complete process. + ARM GAS /tmp/ccskJbbb.s page 101 + + +5678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ITFlags Interrupt flags to handle. +5680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITListenCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags) +5683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ +5685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +5687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +5690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +5692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_CHECK_FLAG(ITFlags, I2C_FLAG_RXNE) != RESET) +5693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Read data from RXDR */ +5695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; +5696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Increment Buffer pointer */ +5698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr++; +5699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferSize > 0U)) +5701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; +5703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; +5704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set ErrorCode corresponding to a Non-Acknowledge */ +5706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +5707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all Interrupts*/ +5711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +5712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACK Flag */ +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +5715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */ +5720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ListenCpltCallback(hi2c); +5722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ListenCpltCallback(hi2c); +5724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C interrupts error process. +5729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +5730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param ErrorCode Error code to handle. +5731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode) +5734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 102 + + +5735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; +5736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ +5738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; +5740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = 0U; +5741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set new error code */ +5743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= ErrorCode; +5744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Interrupts */ +5746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpstate == HAL_I2C_STATE_LISTEN) || +5747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || +5748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) +5749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all interrupts, except interrupts related to LISTEN state */ +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT | I2C_XFER_TX_IT); +5752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* keep HAL_I2C_STATE_LISTEN if set */ +5754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN; +5755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +5756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; +5757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable all interrupts */ +5761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT); +5762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If state is an abort treatment on goind, don't change state */ +5764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* This change will be do later */ +5765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State != HAL_I2C_STATE_ABORT) +5766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set HAL_I2C_STATE_READY */ +5768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; +5771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; +5772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX transfer if any */ +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->Instance->CR1 & I2C_CR1_TXDMAEN) == I2C_CR1_TXDMAEN) +5776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +5778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmatx != NULL) +5780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +5782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort; +5784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA TX */ +5789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK) +5790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly XferAbortCallback function in case of error */ + ARM GAS /tmp/ccskJbbb.s page 103 + + +5792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx); +5793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX transfer if any */ +5797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((hi2c->Instance->CR1 & I2C_CR1_RXDMAEN) == I2C_CR1_RXDMAEN) +5798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +5800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->hdmarx != NULL) +5802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the I2C DMA Abort callback : +5804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */ +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort; +5806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Abort DMA RX */ +5811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK) +5812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */ +5814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx); +5815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_ABORT) +5819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +5821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback(hi2c); +5828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AbortCpltCallback(hi2c); +5830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +5835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +5836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +5839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback(hi2c); +5840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +5841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ErrorCallback(hi2c); +5842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +5843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief I2C Tx data register flush process. +5848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. + ARM GAS /tmp/ccskJbbb.s page 104 + + +5849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) +5852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 25 .loc 1 5852 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 0 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 @ link register save eliminated. + 30 .LVL0: +5853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If a pending TXIS flag is set */ +5854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Write a dummy data in TXDR to clear it */ +5855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) + 31 .loc 1 5855 0 + 32 0000 0368 ldr r3, [r0] + 33 0002 9A69 ldr r2, [r3, #24] + 34 0004 9207 lsls r2, r2, #30 + 35 0006 01D5 bpl .L2 +5856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->TXDR = 0x00U; + 36 .loc 1 5857 0 + 37 0008 0022 movs r2, #0 + 38 000a 9A62 str r2, [r3, #40] + 39 .L2: +5858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register if not empty */ +5861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) + 40 .loc 1 5861 0 + 41 000c 0368 ldr r3, [r0] + 42 000e 9A69 ldr r2, [r3, #24] + 43 0010 D207 lsls r2, r2, #31 + 44 0012 03D4 bmi .L1 +5862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); + 45 .loc 1 5863 0 + 46 0014 9A69 ldr r2, [r3, #24] + 47 0016 0121 movs r1, #1 + 48 0018 0A43 orrs r2, r1 + 49 001a 9A61 str r2, [r3, #24] + 50 .L1: +5864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 51 .loc 1 5865 0 + 52 @ sp needed + 53 001c 7047 bx lr + 54 .cfi_endproc + 55 .LFE102: + 57 .section .text.I2C_TransferConfig,"ax",%progbits + 58 .align 1 + 59 .syntax unified + 60 .code 16 + 61 .thumb_func + 62 .fpu softvfp + 64 I2C_TransferConfig: + 65 .LFB114: +5866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 105 + + +5867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C master transmit process complete callback. +5869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +5870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterTransmitCplt(DMA_HandleTypeDef *hdma) +5873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +5875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +5877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +5878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +5880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupt */ +5883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +5886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Buffer pointer */ +5889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +5890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the XferSize to transfer */ +5892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +5902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR, h +5903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +5906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +5910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +5911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C slave transmit process complete callback. +5917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +5918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma) +5921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +5923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + ARM GAS /tmp/ccskJbbb.s page 106 + + +5924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((tmpoptions == I2C_NEXT_FRAME) || (tmpoptions == I2C_FIRST_FRAME)) +5926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +5928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_TXDMAEN; +5929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Last Byte is Transmitted */ +5931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +5932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +5933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +5937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +5938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +5939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C master receive process complete callback. +5944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +5945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAMasterReceiveCplt(DMA_HandleTypeDef *hdma) +5948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +5950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +5952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +5953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* If last transfer, enable STOP interrupt */ +5955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount == 0U) +5956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupt */ +5958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_CPLT_IT); +5959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else prepare a new DMA transfer and enable TCReload interrupt */ +5961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Update Buffer pointer */ +5964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->pBuffPtr += hi2c->XferSize; +5965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Set the XferSize to transfer */ +5967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferCount > MAX_NBYTE_SIZE) +5968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE; +5970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; +5974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable the DMA channel */ +5977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->RXDR, (uint32_t)hi2c->pBuffPtr, h +5978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +5980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); + ARM GAS /tmp/ccskJbbb.s page 107 + + +5981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +5983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +5985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_RELOAD_IT); +5986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +5989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +5990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +5991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C slave receive process complete callback. +5992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +5993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +5994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +5995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMASlaveReceiveCplt(DMA_HandleTypeDef *hdma) +5996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +5997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +5998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; +5999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_DMA_GET_COUNTER(hi2c->hdmarx) == 0U) && \ +6001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) +6002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable DMA Request */ +6004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR1 &= ~I2C_CR1_RXDMAEN; +6005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call I2C Slave Sequential complete process */ +6007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITSlaveSeqCplt(hi2c); +6008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* No specific action, Master fully manage the generation of STOP condition */ +6012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Mean that this generation can arrive at any time, at the end or during DMA process */ +6013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* So STOP condition should be manage through Interrupt treatment */ +6014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C communication error callback. +6019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle +6020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAError(DMA_HandleTypeDef *hdma) +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +6025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable Acknowledge */ +6027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_NACK; +6028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_ITError(hi2c, HAL_I2C_ERROR_DMA); +6031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief DMA I2C communication abort callback +6035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * (To be called at end of DMA Abort procedure). +6036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hdma DMA handle. +6037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None + ARM GAS /tmp/ccskJbbb.s page 108 + + +6038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_DMAAbort(DMA_HandleTypeDef *hdma) +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati +6042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset AbortCpltCallback */ +6044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; +6046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if come from abort from user */ +6048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_ABORT) +6049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->AbortCpltCallback(hi2c); +6055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_AbortCpltCallback(hi2c); +6057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */ +6062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) +6063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCallback(hi2c); +6064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #else +6065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_ErrorCallback(hi2c); +6066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ +6067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout. +6072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Flag Specifies the I2C flag to check. +6075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Status The new Flag status (SET or RESET). +6076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagSta +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) +6083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +6086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); + ARM GAS /tmp/ccskJbbb.s page 109 + + +6095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of TXIS flag. +6104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +6111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) +6113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a NACK is detected */ +6115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) +6116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +6122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of STOP flag. +6141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +6148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +6150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a NACK is detected */ + ARM GAS /tmp/ccskJbbb.s page 110 + + +6152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) +6153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag. +6175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, +6182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) +6184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a NACK is detected */ +6186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (I2C_IsAcknowledgeFailed(hi2c, Timeout, Tickstart) != HAL_OK) +6187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if a STOPF is detected */ +6192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET) +6193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check if an RXNE is pending */ +6195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Store Last receive data if any */ +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET) && (hi2c->XferSize > 0U)) +6197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return HAL_OK */ +6199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* The Reading of data from RXDR will be done in caller function */ +6200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +6205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); + ARM GAS /tmp/ccskJbbb.s page 111 + + +6209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief This function handles Acknowledge failed detection during an I2C Communication. +6238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Timeout Timeout duration +6241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Tickstart Tick start value +6242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval HAL status +6243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_ +6245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) +6247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Wait until STOP Flag is reset */ +6249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* AutoEnd should be initiate after AF */ +6250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) +6251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check for the Timeout */ +6253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (Timeout != HAL_MAX_DELAY) +6254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) +6256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; +6258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 112 + + +6266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear NACKF Flag */ +6270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); +6271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear STOP Flag */ +6273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); +6274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Flush TX register */ +6276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c); +6277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Clear Configuration Register 2 */ +6279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_RESET_CR2(hi2c); +6280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF; +6282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; +6283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; +6284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Process Unlocked */ +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_UNLOCK(hi2c); +6287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; +6289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_OK; +6291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag ar +6295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param DevAddress Specifies the slave address to be programmed. +6297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Size Specifies the number of bytes to be programmed. +6298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter must be a value between 0 and 255. +6299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Mode New state of the I2C START condition generation. +6300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: +6301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_RELOAD_MODE Enable Reload mode . +6302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode. +6303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_SOFTEND_MODE Enable Software end mode. +6304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param Request New state of the I2C START condition generation. +6305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * This parameter can be one of the following values: +6306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_NO_STARTSTOP Don't Generate stop and start condition. +6307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_STOP Generate stop condition (Size should be set to 0). +6308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_READ Generate Restart for read request. +6309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. +6310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t +6313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 66 .loc 1 6313 0 + 67 .cfi_startproc + 68 @ args = 4, pretend = 0, frame = 0 + 69 @ frame_needed = 0, uses_anonymous_args = 0 + 70 .LVL1: + 71 0000 F0B5 push {r4, r5, r6, r7, lr} + 72 .LCFI0: + 73 .cfi_def_cfa_offset 20 + 74 .cfi_offset 4, -20 + ARM GAS /tmp/ccskJbbb.s page 113 + + + 75 .cfi_offset 5, -16 + 76 .cfi_offset 6, -12 + 77 .cfi_offset 7, -8 + 78 .cfi_offset 14, -4 + 79 0002 059C ldr r4, [sp, #20] +6314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ +6315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); +6316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_TRANSFER_MODE(Mode)); +6317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** assert_param(IS_TRANSFER_REQUEST(Request)); +6318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* update CR2 register */ +6320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** MODIFY_REG(hi2c->Instance->CR2, ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEN + 80 .loc 1 6320 0 + 81 0004 0568 ldr r5, [r0] + 82 0006 6868 ldr r0, [r5, #4] + 83 .LVL2: + 84 0008 660D lsrs r6, r4, #21 + 85 000a 8027 movs r7, #128 + 86 000c FF00 lsls r7, r7, #3 + 87 000e 3740 ands r7, r6 + 88 0010 054E ldr r6, .L5 + 89 0012 3E43 orrs r6, r7 + 90 0014 B043 bics r0, r6 + 91 0016 8905 lsls r1, r1, #22 + 92 .LVL3: + 93 0018 890D lsrs r1, r1, #22 + 94 001a 1204 lsls r2, r2, #16 + 95 .LVL4: + 96 001c 1143 orrs r1, r2 + 97 001e 0B43 orrs r3, r1 + 98 .LVL5: + 99 0020 2343 orrs r3, r4 + 100 0022 0343 orrs r3, r0 + 101 0024 6B60 str r3, [r5, #4] +6321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << I2C_CR2_NBYTES_ +6322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 102 .loc 1 6322 0 + 103 @ sp needed + 104 0026 F0BD pop {r4, r5, r6, r7, pc} + 105 .L6: + 106 .align 2 + 107 .L5: + 108 0028 FF63FF03 .word 67068927 + 109 .cfi_endproc + 110 .LFE114: + 112 .section .text.I2C_Enable_IRQ,"ax",%progbits + 113 .align 1 + 114 .syntax unified + 115 .code 16 + 116 .thumb_func + 117 .fpu softvfp + 119 I2C_Enable_IRQ: + 120 .LFB115: +6323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Manage the enabling of Interrupts. +6326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + ARM GAS /tmp/ccskJbbb.s page 114 + + +6327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +6329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Enable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +6332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 121 .loc 1 6332 0 + 122 .cfi_startproc + 123 @ args = 0, pretend = 0, frame = 0 + 124 @ frame_needed = 0, uses_anonymous_args = 0 + 125 @ link register save eliminated. + 126 .LVL6: +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpisr = 0U; +6334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((hi2c->XferISR == I2C_Master_ISR_DMA) || \ + 127 .loc 1 6335 0 + 128 0000 436B ldr r3, [r0, #52] + 129 0002 1C4A ldr r2, .L23 + 130 0004 9342 cmp r3, r2 + 131 0006 12D0 beq .L8 + 132 .loc 1 6335 0 is_stmt 0 discriminator 1 + 133 0008 1B4A ldr r2, .L23+4 + 134 000a 9342 cmp r3, r2 + 135 000c 0FD0 beq .L8 +6336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (hi2c->XferISR == I2C_Slave_ISR_DMA)) +6337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) +6339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK and ADDR interrupts */ +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +6342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT) +6345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +6347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +6348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) +6351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupts */ +6353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; +6354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT) +6357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +6359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +6360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 136 .loc 1 6364 0 is_stmt 1 + 137 000e 4B07 lsls r3, r1, #29 + 138 0010 2AD4 bmi .L18 +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpisr = 0U; + ARM GAS /tmp/ccskJbbb.s page 115 + + + 139 .loc 1 6333 0 + 140 0012 0023 movs r3, #0 + 141 .L14: + 142 .LVL7: +6365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, and ADDR interrupts */ +6367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; +6368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 143 .loc 1 6370 0 + 144 0014 CA07 lsls r2, r1, #31 + 145 0016 01D5 bpl .L15 +6371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and RXI interrupts */ +6373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_TXI; + 146 .loc 1 6373 0 + 147 0018 F222 movs r2, #242 + 148 001a 1343 orrs r3, r2 + 149 .LVL8: + 150 .L15: +6374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 151 .loc 1 6376 0 + 152 001c 8A07 lsls r2, r1, #30 + 153 001e 25D4 bmi .L19 +6377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK and TXI interrupts */ +6379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_TCI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_RXI; +6380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) + 154 .loc 1 6382 0 + 155 0020 1222 movs r2, #18 + 156 0022 1140 ands r1, r2 + 157 .LVL9: + 158 0024 1229 cmp r1, #18 + 159 0026 0FD1 bne .L13 +6383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupts */ +6385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; + 160 .loc 1 6385 0 + 161 0028 0E32 adds r2, r2, #14 + 162 002a 1343 orrs r3, r2 + 163 .LVL10: + 164 002c 0CE0 b .L13 + 165 .LVL11: + 166 .L8: +6338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 167 .loc 1 6338 0 + 168 002e 4B07 lsls r3, r1, #29 + 169 0030 0FD4 bmi .L17 +6333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 170 .loc 1 6333 0 + 171 0032 0023 movs r3, #0 + 172 .L10: + ARM GAS /tmp/ccskJbbb.s page 116 + + + 173 .LVL12: +6344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 174 .loc 1 6344 0 + 175 0034 1122 movs r2, #17 + 176 0036 0A40 ands r2, r1 + 177 0038 112A cmp r2, #17 + 178 003a 0CD0 beq .L20 + 179 .L11: + 180 003c 1222 movs r2, #18 + 181 003e 1140 ands r1, r2 + 182 .LVL13: +6350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 183 .loc 1 6350 0 + 184 0040 1229 cmp r1, #18 + 185 0042 0BD0 beq .L21 + 186 .L12: +6356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 187 .loc 1 6356 0 + 188 0044 1229 cmp r1, #18 + 189 0046 0CD0 beq .L22 + 190 .L13: +6386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable interrupts only at the end */ +6390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* to avoid the risk of I2C interrupt handle execution before */ +6391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* all interrupts requested done */ +6392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_ENABLE_IT(hi2c, tmpisr); + 191 .loc 1 6392 0 + 192 0048 0168 ldr r1, [r0] + 193 004a 0A68 ldr r2, [r1] + 194 004c 1343 orrs r3, r2 + 195 .LVL14: + 196 004e 0B60 str r3, [r1] +6393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 197 .loc 1 6393 0 + 198 @ sp needed + 199 0050 7047 bx lr + 200 .LVL15: + 201 .L17: +6341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 202 .loc 1 6341 0 + 203 0052 B823 movs r3, #184 + 204 0054 EEE7 b .L10 + 205 .LVL16: + 206 .L20: +6347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 207 .loc 1 6347 0 + 208 0056 7F32 adds r2, r2, #127 + 209 0058 1343 orrs r3, r2 + 210 .LVL17: + 211 005a EFE7 b .L11 + 212 .LVL18: + 213 .L21: +6353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 214 .loc 1 6353 0 + 215 005c 0E32 adds r2, r2, #14 + ARM GAS /tmp/ccskJbbb.s page 117 + + + 216 005e 1343 orrs r3, r2 + 217 .LVL19: + 218 0060 F0E7 b .L12 + 219 .L22: +6359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 220 .loc 1 6359 0 + 221 0062 4022 movs r2, #64 + 222 0064 1343 orrs r3, r2 + 223 .LVL20: + 224 0066 EFE7 b .L13 + 225 .LVL21: + 226 .L18: +6367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 227 .loc 1 6367 0 + 228 0068 B823 movs r3, #184 + 229 006a D3E7 b .L14 + 230 .LVL22: + 231 .L19: +6379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 232 .loc 1 6379 0 + 233 006c F422 movs r2, #244 + 234 006e 1343 orrs r3, r2 + 235 .LVL23: + 236 0070 EAE7 b .L13 + 237 .L24: + 238 0072 C046 .align 2 + 239 .L23: + 240 0074 00000000 .word I2C_Master_ISR_DMA + 241 0078 00000000 .word I2C_Slave_ISR_DMA + 242 .cfi_endproc + 243 .LFE115: + 245 .section .text.I2C_Disable_IRQ,"ax",%progbits + 246 .align 1 + 247 .syntax unified + 248 .code 16 + 249 .thumb_func + 250 .fpu softvfp + 252 I2C_Disable_IRQ: + 253 .LFB116: +6394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Manage the disabling of Interrupts. +6397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains +6398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * the configuration information for the specified I2C. +6399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param InterruptRequest Value of @ref I2C_Interrupt_configuration_definition. +6400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_Disable_IRQ(I2C_HandleTypeDef *hi2c, uint16_t InterruptRequest) +6403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 254 .loc 1 6403 0 + 255 .cfi_startproc + 256 @ args = 0, pretend = 0, frame = 0 + 257 @ frame_needed = 0, uses_anonymous_args = 0 + 258 .LVL24: + 259 0000 30B5 push {r4, r5, lr} + 260 .LCFI1: + 261 .cfi_def_cfa_offset 12 + ARM GAS /tmp/ccskJbbb.s page 118 + + + 262 .cfi_offset 4, -12 + 263 .cfi_offset 5, -8 + 264 .cfi_offset 14, -4 + 265 .LVL25: +6404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpisr = 0U; +6405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_TX_IT) == I2C_XFER_TX_IT) + 266 .loc 1 6406 0 + 267 0002 CB07 lsls r3, r1, #31 + 268 0004 09D5 bpl .L32 + 269 .LVL26: +6407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable TC and TXI interrupts */ +6409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_TXI; +6410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + 270 .loc 1 6411 0 + 271 0006 4123 movs r3, #65 + 272 0008 C35C ldrb r3, [r0, r3] + 273 000a 2822 movs r2, #40 + 274 000c 1340 ands r3, r2 + 275 000e 282B cmp r3, #40 + 276 0010 01D0 beq .L35 +6412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +6414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 277 .loc 1 6414 0 + 278 0012 F223 movs r3, #242 + 279 0014 02E0 b .L26 + 280 .L35: +6409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 281 .loc 1 6409 0 + 282 0016 1A33 adds r3, r3, #26 + 283 0018 00E0 b .L26 + 284 .LVL27: + 285 .L32: +6404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 286 .loc 1 6404 0 + 287 001a 0023 movs r3, #0 + 288 .LVL28: + 289 .L26: +6415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RX_IT) == I2C_XFER_RX_IT) + 290 .loc 1 6418 0 + 291 001c 8A07 lsls r2, r1, #30 + 292 001e 09D5 bpl .L27 +6419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable TC and RXI interrupts */ +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_RXI; + 293 .loc 1 6421 0 + 294 0020 4424 movs r4, #68 + 295 0022 1C43 orrs r4, r3 + 296 .LVL29: +6422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) != (uint32_t)HAL_I2C_STATE_LISTEN) + ARM GAS /tmp/ccskJbbb.s page 119 + + + 297 .loc 1 6423 0 + 298 0024 4122 movs r2, #65 + 299 0026 825C ldrb r2, [r0, r2] + 300 0028 2825 movs r5, #40 + 301 002a 2A40 ands r2, r5 + 302 002c 282A cmp r2, #40 + 303 002e 14D0 beq .L34 +6424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable NACK and STOP interrupts */ +6426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 304 .loc 1 6426 0 + 305 0030 F422 movs r2, #244 + 306 0032 1343 orrs r3, r2 + 307 .LVL30: + 308 .L27: +6427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_LISTEN_IT) == I2C_XFER_LISTEN_IT) + 309 .loc 1 6430 0 + 310 0034 4A07 lsls r2, r1, #29 + 311 0036 01D5 bpl .L28 +6431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable ADDR, NACK and STOP interrupts */ +6433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ADDRI | I2C_IT_STOPI | I2C_IT_NACKI | I2C_IT_ERRI; + 312 .loc 1 6433 0 + 313 0038 B822 movs r2, #184 + 314 003a 1343 orrs r3, r2 + 315 .LVL31: + 316 .L28: +6434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_ERROR_IT) == I2C_XFER_ERROR_IT) + 317 .loc 1 6436 0 + 318 003c 1122 movs r2, #17 + 319 003e 0A40 ands r2, r1 + 320 0040 112A cmp r2, #17 + 321 0042 0CD0 beq .L36 + 322 .L29: + 323 0044 1222 movs r2, #18 + 324 0046 1140 ands r1, r2 + 325 .LVL32: +6437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable ERR and NACK interrupts */ +6439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_ERRI | I2C_IT_NACKI; +6440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_CPLT_IT) == I2C_XFER_CPLT_IT) + 326 .loc 1 6442 0 + 327 0048 1229 cmp r1, #18 + 328 004a 0BD0 beq .L37 + 329 .L30: +6443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable STOP interrupts */ +6445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_STOPI; +6446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 120 + + +6448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if ((InterruptRequest & I2C_XFER_RELOAD_IT) == I2C_XFER_RELOAD_IT) + 330 .loc 1 6448 0 + 331 004c 1229 cmp r1, #18 + 332 004e 0CD0 beq .L38 + 333 .L31: +6449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Enable TC interrupts */ +6451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI; +6452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Disable interrupts only at the end */ +6455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* to avoid a breaking situation like at "t" time */ +6456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* all disable interrupts request are not done */ +6457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** __HAL_I2C_DISABLE_IT(hi2c, tmpisr); + 334 .loc 1 6457 0 + 335 0050 0168 ldr r1, [r0] + 336 0052 0A68 ldr r2, [r1] + 337 0054 9A43 bics r2, r3 + 338 0056 0A60 str r2, [r1] +6458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 339 .loc 1 6458 0 + 340 @ sp needed + 341 0058 30BD pop {r4, r5, pc} + 342 .LVL33: + 343 .L34: +6421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 344 .loc 1 6421 0 + 345 005a 2300 movs r3, r4 + 346 005c EAE7 b .L27 + 347 .LVL34: + 348 .L36: +6439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 349 .loc 1 6439 0 + 350 005e 7F32 adds r2, r2, #127 + 351 0060 1343 orrs r3, r2 + 352 .LVL35: + 353 0062 EFE7 b .L29 + 354 .LVL36: + 355 .L37: +6445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 356 .loc 1 6445 0 + 357 0064 0E32 adds r2, r2, #14 + 358 0066 1343 orrs r3, r2 + 359 .LVL37: + 360 0068 F0E7 b .L30 + 361 .L38: +6451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 362 .loc 1 6451 0 + 363 006a 4022 movs r2, #64 + 364 006c 1343 orrs r3, r2 + 365 .LVL38: + 366 006e EFE7 b .L31 + 367 .cfi_endproc + 368 .LFE116: + 370 .section .text.I2C_ConvertOtherXferOptions,"ax",%progbits + 371 .align 1 + 372 .syntax unified + ARM GAS /tmp/ccskJbbb.s page 121 + + + 373 .code 16 + 374 .thumb_func + 375 .fpu softvfp + 377 I2C_ConvertOtherXferOptions: + 378 .LFB117: +6459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** +6460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** +6461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @brief Convert I2Cx OTHER_xxx XferOptions to functionnal XferOptions. +6462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @param hi2c I2C handle. +6463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** * @retval None +6464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** */ +6465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c) +6466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 379 .loc 1 6466 0 + 380 .cfi_startproc + 381 @ args = 0, pretend = 0, frame = 0 + 382 @ frame_needed = 0, uses_anonymous_args = 0 + 383 @ link register save eliminated. + 384 .LVL39: +6467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* if user set XferOptions to I2C_OTHER_FRAME */ +6468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +6469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_FRAME */ +6470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_OTHER_FRAME) + 385 .loc 1 6470 0 + 386 0000 C36A ldr r3, [r0, #44] + 387 0002 AA2B cmp r3, #170 + 388 0004 05D0 beq .L42 +6471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_FRAME; +6473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* else if user set XferOptions to I2C_OTHER_AND_LAST_FRAME */ +6475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* it request implicitly to generate a restart condition */ +6476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* then generate a stop condition at the end of transfer */ +6477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* set XferOptions to I2C_FIRST_AND_LAST_FRAME */ +6478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else if (hi2c->XferOptions == I2C_OTHER_AND_LAST_FRAME) + 389 .loc 1 6478 0 + 390 0006 C26A ldr r2, [r0, #44] + 391 0008 AA23 movs r3, #170 + 392 000a 1B02 lsls r3, r3, #8 + 393 000c 9A42 cmp r2, r3 + 394 000e 03D0 beq .L43 + 395 .L39: +6479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_FIRST_AND_LAST_FRAME; +6481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** else +6483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { +6484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Nothing to do */ +6485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } +6486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 396 .loc 1 6486 0 + 397 @ sp needed + 398 0010 7047 bx lr + 399 .L42: +6472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 400 .loc 1 6472 0 + 401 0012 0023 movs r3, #0 + ARM GAS /tmp/ccskJbbb.s page 122 + + + 402 0014 C362 str r3, [r0, #44] + 403 0016 FBE7 b .L39 + 404 .L43: +6480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 405 .loc 1 6480 0 + 406 0018 8023 movs r3, #128 + 407 001a 9B04 lsls r3, r3, #18 + 408 001c C362 str r3, [r0, #44] + 409 .loc 1 6486 0 + 410 001e F7E7 b .L39 + 411 .cfi_endproc + 412 .LFE117: + 414 .section .text.I2C_IsAcknowledgeFailed,"ax",%progbits + 415 .align 1 + 416 .syntax unified + 417 .code 16 + 418 .thumb_func + 419 .fpu softvfp + 421 I2C_IsAcknowledgeFailed: + 422 .LFB113: +6245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET) + 423 .loc 1 6245 0 + 424 .cfi_startproc + 425 @ args = 0, pretend = 0, frame = 0 + 426 @ frame_needed = 0, uses_anonymous_args = 0 + 427 .LVL40: + 428 0000 70B5 push {r4, r5, r6, lr} + 429 .LCFI2: + 430 .cfi_def_cfa_offset 16 + 431 .cfi_offset 4, -16 + 432 .cfi_offset 5, -12 + 433 .cfi_offset 6, -8 + 434 .cfi_offset 14, -4 + 435 0002 0400 movs r4, r0 + 436 0004 0E00 movs r6, r1 + 437 0006 1500 movs r5, r2 +6246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 438 .loc 1 6246 0 + 439 0008 0368 ldr r3, [r0] + 440 000a 9B69 ldr r3, [r3, #24] + 441 000c DB06 lsls r3, r3, #27 + 442 000e 19D5 bpl .L50 + 443 .LVL41: + 444 .L47: +6250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 445 .loc 1 6250 0 + 446 0010 2368 ldr r3, [r4] + 447 0012 9A69 ldr r2, [r3, #24] + 448 0014 9206 lsls r2, r2, #26 + 449 0016 17D4 bmi .L51 +6253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 450 .loc 1 6253 0 + 451 0018 731C adds r3, r6, #1 + 452 001a F9D0 beq .L47 +6255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 453 .loc 1 6255 0 + 454 001c FFF7FEFF bl HAL_GetTick + ARM GAS /tmp/ccskJbbb.s page 123 + + + 455 .LVL42: + 456 0020 401B subs r0, r0, r5 + 457 0022 B042 cmp r0, r6 + 458 0024 01D8 bhi .L48 +6255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 459 .loc 1 6255 0 is_stmt 0 discriminator 1 + 460 0026 002E cmp r6, #0 + 461 0028 F2D1 bne .L47 + 462 .L48: +6257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 463 .loc 1 6257 0 is_stmt 1 + 464 002a 636C ldr r3, [r4, #68] + 465 002c 2022 movs r2, #32 + 466 002e 1343 orrs r3, r2 + 467 0030 6364 str r3, [r4, #68] +6258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 468 .loc 1 6258 0 + 469 0032 4123 movs r3, #65 + 470 0034 E254 strb r2, [r4, r3] +6259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 471 .loc 1 6259 0 + 472 0036 0023 movs r3, #0 + 473 0038 2232 adds r2, r2, #34 + 474 003a A354 strb r3, [r4, r2] +6262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 475 .loc 1 6262 0 + 476 003c 023A subs r2, r2, #2 + 477 003e A354 strb r3, [r4, r2] +6264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 478 .loc 1 6264 0 + 479 0040 0120 movs r0, #1 + 480 0042 1AE0 b .L46 + 481 .LVL43: + 482 .L50: +6290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 483 .loc 1 6290 0 + 484 0044 0020 movs r0, #0 + 485 .LVL44: + 486 0046 18E0 b .L46 + 487 .LVL45: + 488 .L51: +6270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 489 .loc 1 6270 0 + 490 0048 1022 movs r2, #16 + 491 004a DA61 str r2, [r3, #28] +6273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 492 .loc 1 6273 0 + 493 004c 2368 ldr r3, [r4] + 494 004e 2025 movs r5, #32 + 495 .LVL46: + 496 0050 DD61 str r5, [r3, #28] +6276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 497 .loc 1 6276 0 + 498 0052 2000 movs r0, r4 + 499 0054 FFF7FEFF bl I2C_Flush_TXDR + 500 .LVL47: +6279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 124 + + + 501 .loc 1 6279 0 + 502 0058 2268 ldr r2, [r4] + 503 005a 5368 ldr r3, [r2, #4] + 504 005c 0749 ldr r1, .L52 + 505 005e 0B40 ands r3, r1 + 506 0060 5360 str r3, [r2, #4] +6281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 507 .loc 1 6281 0 + 508 0062 636C ldr r3, [r4, #68] + 509 0064 0422 movs r2, #4 + 510 0066 1343 orrs r3, r2 + 511 0068 6364 str r3, [r4, #68] +6282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 512 .loc 1 6282 0 + 513 006a 4123 movs r3, #65 + 514 006c E554 strb r5, [r4, r3] +6283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 515 .loc 1 6283 0 + 516 006e 0023 movs r3, #0 + 517 0070 3E32 adds r2, r2, #62 + 518 0072 A354 strb r3, [r4, r2] +6286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 519 .loc 1 6286 0 + 520 0074 023A subs r2, r2, #2 + 521 0076 A354 strb r3, [r4, r2] +6288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 522 .loc 1 6288 0 + 523 0078 0120 movs r0, #1 + 524 .L46: +6291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 525 .loc 1 6291 0 + 526 @ sp needed + 527 .LVL48: + 528 .LVL49: + 529 007a 70BD pop {r4, r5, r6, pc} + 530 .L53: + 531 .align 2 + 532 .L52: + 533 007c 00E800FE .word -33495040 + 534 .cfi_endproc + 535 .LFE113: + 537 .section .text.I2C_WaitOnTXISFlagUntilTimeout,"ax",%progbits + 538 .align 1 + 539 .syntax unified + 540 .code 16 + 541 .thumb_func + 542 .fpu softvfp + 544 I2C_WaitOnTXISFlagUntilTimeout: + 545 .LFB110: +6111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) + 546 .loc 1 6111 0 + 547 .cfi_startproc + 548 @ args = 0, pretend = 0, frame = 0 + 549 @ frame_needed = 0, uses_anonymous_args = 0 + 550 .LVL50: + 551 0000 70B5 push {r4, r5, r6, lr} + 552 .LCFI3: + ARM GAS /tmp/ccskJbbb.s page 125 + + + 553 .cfi_def_cfa_offset 16 + 554 .cfi_offset 4, -16 + 555 .cfi_offset 5, -12 + 556 .cfi_offset 6, -8 + 557 .cfi_offset 14, -4 + 558 0002 0400 movs r4, r0 + 559 0004 0D00 movs r5, r1 + 560 0006 1600 movs r6, r2 + 561 .LVL51: + 562 .L57: +6112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 563 .loc 1 6112 0 + 564 0008 2368 ldr r3, [r4] + 565 000a 9B69 ldr r3, [r3, #24] + 566 000c 9B07 lsls r3, r3, #30 + 567 000e 1CD4 bmi .L61 +6115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 568 .loc 1 6115 0 + 569 0010 3200 movs r2, r6 + 570 0012 2900 movs r1, r5 + 571 0014 2000 movs r0, r4 + 572 0016 FFF7FEFF bl I2C_IsAcknowledgeFailed + 573 .LVL52: + 574 001a 0028 cmp r0, #0 + 575 001c 17D1 bne .L60 +6121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 576 .loc 1 6121 0 + 577 001e 6B1C adds r3, r5, #1 + 578 0020 F2D0 beq .L57 +6123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 579 .loc 1 6123 0 + 580 0022 FFF7FEFF bl HAL_GetTick + 581 .LVL53: + 582 0026 801B subs r0, r0, r6 + 583 0028 A842 cmp r0, r5 + 584 002a 01D8 bhi .L58 +6123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 585 .loc 1 6123 0 is_stmt 0 discriminator 1 + 586 002c 002D cmp r5, #0 + 587 002e EBD1 bne .L57 + 588 .L58: +6125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 589 .loc 1 6125 0 is_stmt 1 + 590 0030 636C ldr r3, [r4, #68] + 591 0032 2022 movs r2, #32 + 592 0034 1343 orrs r3, r2 + 593 0036 6364 str r3, [r4, #68] +6126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 594 .loc 1 6126 0 + 595 0038 4123 movs r3, #65 + 596 003a E254 strb r2, [r4, r3] +6127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 597 .loc 1 6127 0 + 598 003c 0023 movs r3, #0 + 599 003e 2232 adds r2, r2, #34 + 600 0040 A354 strb r3, [r4, r2] +6130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 126 + + + 601 .loc 1 6130 0 + 602 0042 023A subs r2, r2, #2 + 603 0044 A354 strb r3, [r4, r2] +6132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 604 .loc 1 6132 0 + 605 0046 0120 movs r0, #1 + 606 0048 00E0 b .L56 + 607 .L61: +6136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 608 .loc 1 6136 0 + 609 004a 0020 movs r0, #0 + 610 .L56: +6137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 611 .loc 1 6137 0 + 612 @ sp needed + 613 .LVL54: + 614 .LVL55: + 615 .LVL56: + 616 004c 70BD pop {r4, r5, r6, pc} + 617 .LVL57: + 618 .L60: +6117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 619 .loc 1 6117 0 + 620 004e 0120 movs r0, #1 + 621 0050 FCE7 b .L56 + 622 .cfi_endproc + 623 .LFE110: + 625 .section .text.I2C_WaitOnFlagUntilTimeout,"ax",%progbits + 626 .align 1 + 627 .syntax unified + 628 .code 16 + 629 .thumb_func + 630 .fpu softvfp + 632 I2C_WaitOnFlagUntilTimeout: + 633 .LFB109: +6081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) + 634 .loc 1 6081 0 + 635 .cfi_startproc + 636 @ args = 4, pretend = 0, frame = 0 + 637 @ frame_needed = 0, uses_anonymous_args = 0 + 638 .LVL58: + 639 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 640 .LCFI4: + 641 .cfi_def_cfa_offset 24 + 642 .cfi_offset 3, -24 + 643 .cfi_offset 4, -20 + 644 .cfi_offset 5, -16 + 645 .cfi_offset 6, -12 + 646 .cfi_offset 7, -8 + 647 .cfi_offset 14, -4 + 648 0002 0600 movs r6, r0 + 649 0004 0C00 movs r4, r1 + 650 0006 1700 movs r7, r2 + 651 0008 1D00 movs r5, r3 + 652 .LVL59: + 653 .L64: +6082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 127 + + + 654 .loc 1 6082 0 + 655 000a 3368 ldr r3, [r6] + 656 000c 9B69 ldr r3, [r3, #24] + 657 000e 2340 ands r3, r4 + 658 0010 1B1B subs r3, r3, r4 + 659 0012 5A42 rsbs r2, r3, #0 + 660 0014 5341 adcs r3, r3, r2 + 661 0016 BB42 cmp r3, r7 + 662 0018 16D1 bne .L68 +6085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 663 .loc 1 6085 0 + 664 001a 6B1C adds r3, r5, #1 + 665 001c F5D0 beq .L64 +6087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 666 .loc 1 6087 0 + 667 001e FFF7FEFF bl HAL_GetTick + 668 .LVL60: + 669 0022 069B ldr r3, [sp, #24] + 670 0024 C01A subs r0, r0, r3 + 671 0026 A842 cmp r0, r5 + 672 0028 01D8 bhi .L65 +6087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 673 .loc 1 6087 0 is_stmt 0 discriminator 1 + 674 002a 002D cmp r5, #0 + 675 002c EDD1 bne .L64 + 676 .L65: +6089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 677 .loc 1 6089 0 is_stmt 1 + 678 002e 736C ldr r3, [r6, #68] + 679 0030 2022 movs r2, #32 + 680 0032 1343 orrs r3, r2 + 681 0034 7364 str r3, [r6, #68] +6090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 682 .loc 1 6090 0 + 683 0036 4123 movs r3, #65 + 684 0038 F254 strb r2, [r6, r3] +6091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 685 .loc 1 6091 0 + 686 003a 0023 movs r3, #0 + 687 003c 2232 adds r2, r2, #34 + 688 003e B354 strb r3, [r6, r2] +6094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 689 .loc 1 6094 0 + 690 0040 023A subs r2, r2, #2 + 691 0042 B354 strb r3, [r6, r2] +6095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 692 .loc 1 6095 0 + 693 0044 0120 movs r0, #1 + 694 0046 00E0 b .L66 + 695 .L68: +6099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 696 .loc 1 6099 0 + 697 0048 0020 movs r0, #0 + 698 .L66: +6100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 699 .loc 1 6100 0 + 700 @ sp needed + ARM GAS /tmp/ccskJbbb.s page 128 + + + 701 .LVL61: + 702 .LVL62: + 703 .LVL63: + 704 004a F8BD pop {r3, r4, r5, r6, r7, pc} + 705 .cfi_endproc + 706 .LFE109: + 708 .section .text.I2C_RequestMemoryWrite,"ax",%progbits + 709 .align 1 + 710 .syntax unified + 711 .code 16 + 712 .thumb_func + 713 .fpu softvfp + 715 I2C_RequestMemoryWrite: + 716 .LFB93: +5123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_RELOAD_MODE, I2C_GENERATE_START_WRI + 717 .loc 1 5123 0 + 718 .cfi_startproc + 719 @ args = 8, pretend = 0, frame = 0 + 720 @ frame_needed = 0, uses_anonymous_args = 0 + 721 .LVL64: + 722 0000 70B5 push {r4, r5, r6, lr} + 723 .LCFI5: + 724 .cfi_def_cfa_offset 16 + 725 .cfi_offset 4, -16 + 726 .cfi_offset 5, -12 + 727 .cfi_offset 6, -8 + 728 .cfi_offset 14, -4 + 729 0002 82B0 sub sp, sp, #8 + 730 .LCFI6: + 731 .cfi_def_cfa_offset 24 + 732 0004 0400 movs r4, r0 + 733 0006 1600 movs r6, r2 + 734 0008 1D00 movs r5, r3 +5124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 735 .loc 1 5124 0 + 736 000a 8023 movs r3, #128 + 737 .LVL65: + 738 000c EAB2 uxtb r2, r5 + 739 .LVL66: + 740 000e 1848 ldr r0, .L75 + 741 .LVL67: + 742 0010 0090 str r0, [sp] + 743 0012 5B04 lsls r3, r3, #17 + 744 0014 2000 movs r0, r4 + 745 0016 FFF7FEFF bl I2C_TransferConfig + 746 .LVL68: +5127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 747 .loc 1 5127 0 + 748 001a 079A ldr r2, [sp, #28] + 749 001c 0699 ldr r1, [sp, #24] + 750 001e 2000 movs r0, r4 + 751 0020 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 752 .LVL69: + 753 0024 0028 cmp r0, #0 + 754 0026 1ED1 bne .L73 +5133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 755 .loc 1 5133 0 + ARM GAS /tmp/ccskJbbb.s page 129 + + + 756 0028 012D cmp r5, #1 + 757 002a 0ED1 bne .L71 +5136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 758 .loc 1 5136 0 + 759 002c 2368 ldr r3, [r4] + 760 002e F6B2 uxtb r6, r6 + 761 0030 9E62 str r6, [r3, #40] + 762 .L72: +5155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 763 .loc 1 5155 0 + 764 0032 079B ldr r3, [sp, #28] + 765 0034 0093 str r3, [sp] + 766 0036 069B ldr r3, [sp, #24] + 767 0038 0022 movs r2, #0 + 768 003a 8021 movs r1, #128 + 769 003c 2000 movs r0, r4 + 770 003e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 771 .LVL70: + 772 0042 0028 cmp r0, #0 + 773 0044 10D0 beq .L70 +5157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 774 .loc 1 5157 0 + 775 0046 0120 movs r0, #1 + 776 0048 0EE0 b .L70 + 777 .L71: +5142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 778 .loc 1 5142 0 + 779 004a 2368 ldr r3, [r4] + 780 004c 320A lsrs r2, r6, #8 + 781 004e 9A62 str r2, [r3, #40] +5145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 782 .loc 1 5145 0 + 783 0050 079A ldr r2, [sp, #28] + 784 0052 0699 ldr r1, [sp, #24] + 785 0054 2000 movs r0, r4 + 786 0056 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 787 .LVL71: + 788 005a 0028 cmp r0, #0 + 789 005c 06D1 bne .L74 +5151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 790 .loc 1 5151 0 + 791 005e 2368 ldr r3, [r4] + 792 0060 F6B2 uxtb r6, r6 + 793 0062 9E62 str r6, [r3, #40] + 794 0064 E5E7 b .L72 + 795 .L73: +5129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 796 .loc 1 5129 0 + 797 0066 0120 movs r0, #1 + 798 .L70: +5161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 799 .loc 1 5161 0 + 800 0068 02B0 add sp, sp, #8 + 801 @ sp needed + 802 .LVL72: + 803 006a 70BD pop {r4, r5, r6, pc} + 804 .LVL73: + ARM GAS /tmp/ccskJbbb.s page 130 + + + 805 .L74: +5147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 806 .loc 1 5147 0 + 807 006c 0120 movs r0, #1 + 808 006e FBE7 b .L70 + 809 .L76: + 810 .align 2 + 811 .L75: + 812 0070 00200080 .word -2147475456 + 813 .cfi_endproc + 814 .LFE93: + 816 .section .text.I2C_RequestMemoryRead,"ax",%progbits + 817 .align 1 + 818 .syntax unified + 819 .code 16 + 820 .thumb_func + 821 .fpu softvfp + 823 I2C_RequestMemoryRead: + 824 .LFB94: +5176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WR + 825 .loc 1 5176 0 + 826 .cfi_startproc + 827 @ args = 8, pretend = 0, frame = 0 + 828 @ frame_needed = 0, uses_anonymous_args = 0 + 829 .LVL74: + 830 0000 70B5 push {r4, r5, r6, lr} + 831 .LCFI7: + 832 .cfi_def_cfa_offset 16 + 833 .cfi_offset 4, -16 + 834 .cfi_offset 5, -12 + 835 .cfi_offset 6, -8 + 836 .cfi_offset 14, -4 + 837 0002 82B0 sub sp, sp, #8 + 838 .LCFI8: + 839 .cfi_def_cfa_offset 24 + 840 0004 0400 movs r4, r0 + 841 0006 1600 movs r6, r2 + 842 0008 1D00 movs r5, r3 +5177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 843 .loc 1 5177 0 + 844 000a DAB2 uxtb r2, r3 + 845 .LVL75: + 846 000c 174B ldr r3, .L83 + 847 .LVL76: + 848 000e 0093 str r3, [sp] + 849 0010 0023 movs r3, #0 + 850 0012 FFF7FEFF bl I2C_TransferConfig + 851 .LVL77: +5180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 852 .loc 1 5180 0 + 853 0016 079A ldr r2, [sp, #28] + 854 0018 0699 ldr r1, [sp, #24] + 855 001a 2000 movs r0, r4 + 856 001c FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 857 .LVL78: + 858 0020 0028 cmp r0, #0 + 859 0022 1ED1 bne .L81 + ARM GAS /tmp/ccskJbbb.s page 131 + + +5186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 860 .loc 1 5186 0 + 861 0024 012D cmp r5, #1 + 862 0026 0ED1 bne .L79 +5189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 863 .loc 1 5189 0 + 864 0028 2368 ldr r3, [r4] + 865 002a F6B2 uxtb r6, r6 + 866 002c 9E62 str r6, [r3, #40] + 867 .L80: +5208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 868 .loc 1 5208 0 + 869 002e 079B ldr r3, [sp, #28] + 870 0030 0093 str r3, [sp] + 871 0032 069B ldr r3, [sp, #24] + 872 0034 0022 movs r2, #0 + 873 0036 4021 movs r1, #64 + 874 0038 2000 movs r0, r4 + 875 003a FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 876 .LVL79: + 877 003e 0028 cmp r0, #0 + 878 0040 10D0 beq .L78 +5210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 879 .loc 1 5210 0 + 880 0042 0120 movs r0, #1 + 881 0044 0EE0 b .L78 + 882 .L79: +5195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 883 .loc 1 5195 0 + 884 0046 2368 ldr r3, [r4] + 885 0048 320A lsrs r2, r6, #8 + 886 004a 9A62 str r2, [r3, #40] +5198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 887 .loc 1 5198 0 + 888 004c 079A ldr r2, [sp, #28] + 889 004e 0699 ldr r1, [sp, #24] + 890 0050 2000 movs r0, r4 + 891 0052 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 892 .LVL80: + 893 0056 0028 cmp r0, #0 + 894 0058 06D1 bne .L82 +5204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 895 .loc 1 5204 0 + 896 005a 2368 ldr r3, [r4] + 897 005c F6B2 uxtb r6, r6 + 898 005e 9E62 str r6, [r3, #40] + 899 0060 E5E7 b .L80 + 900 .L81: +5182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 901 .loc 1 5182 0 + 902 0062 0120 movs r0, #1 + 903 .L78: +5214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 904 .loc 1 5214 0 + 905 0064 02B0 add sp, sp, #8 + 906 @ sp needed + 907 .LVL81: + ARM GAS /tmp/ccskJbbb.s page 132 + + + 908 0066 70BD pop {r4, r5, r6, pc} + 909 .LVL82: + 910 .L82: +5200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 911 .loc 1 5200 0 + 912 0068 0120 movs r0, #1 + 913 006a FBE7 b .L78 + 914 .L84: + 915 .align 2 + 916 .L83: + 917 006c 00200080 .word -2147475456 + 918 .cfi_endproc + 919 .LFE94: + 921 .section .text.I2C_WaitOnSTOPFlagUntilTimeout,"ax",%progbits + 922 .align 1 + 923 .syntax unified + 924 .code 16 + 925 .thumb_func + 926 .fpu softvfp + 928 I2C_WaitOnSTOPFlagUntilTimeout: + 929 .LFB111: +6148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) + 930 .loc 1 6148 0 + 931 .cfi_startproc + 932 @ args = 0, pretend = 0, frame = 0 + 933 @ frame_needed = 0, uses_anonymous_args = 0 + 934 .LVL83: + 935 0000 70B5 push {r4, r5, r6, lr} + 936 .LCFI9: + 937 .cfi_def_cfa_offset 16 + 938 .cfi_offset 4, -16 + 939 .cfi_offset 5, -12 + 940 .cfi_offset 6, -8 + 941 .cfi_offset 14, -4 + 942 0002 0500 movs r5, r0 + 943 0004 0C00 movs r4, r1 + 944 0006 1600 movs r6, r2 + 945 .LVL84: + 946 .L86: +6149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 947 .loc 1 6149 0 + 948 0008 2B68 ldr r3, [r5] + 949 000a 9B69 ldr r3, [r3, #24] + 950 000c 9B06 lsls r3, r3, #26 + 951 000e 1AD4 bmi .L91 +6152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 952 .loc 1 6152 0 + 953 0010 3200 movs r2, r6 + 954 0012 2100 movs r1, r4 + 955 0014 2800 movs r0, r5 + 956 0016 FFF7FEFF bl I2C_IsAcknowledgeFailed + 957 .LVL85: + 958 001a 0028 cmp r0, #0 + 959 001c 15D1 bne .L90 +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 960 .loc 1 6158 0 + 961 001e FFF7FEFF bl HAL_GetTick + ARM GAS /tmp/ccskJbbb.s page 133 + + + 962 .LVL86: + 963 0022 801B subs r0, r0, r6 + 964 0024 A042 cmp r0, r4 + 965 0026 01D8 bhi .L88 +6158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 966 .loc 1 6158 0 is_stmt 0 discriminator 1 + 967 0028 002C cmp r4, #0 + 968 002a EDD1 bne .L86 + 969 .L88: +6160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 970 .loc 1 6160 0 is_stmt 1 + 971 002c 6B6C ldr r3, [r5, #68] + 972 002e 2022 movs r2, #32 + 973 0030 1343 orrs r3, r2 + 974 0032 6B64 str r3, [r5, #68] +6161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 975 .loc 1 6161 0 + 976 0034 4123 movs r3, #65 + 977 0036 EA54 strb r2, [r5, r3] +6162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 978 .loc 1 6162 0 + 979 0038 0023 movs r3, #0 + 980 003a 2232 adds r2, r2, #34 + 981 003c AB54 strb r3, [r5, r2] +6165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 982 .loc 1 6165 0 + 983 003e 023A subs r2, r2, #2 + 984 0040 AB54 strb r3, [r5, r2] +6167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 985 .loc 1 6167 0 + 986 0042 0120 movs r0, #1 + 987 .L87: +6171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 988 .loc 1 6171 0 + 989 @ sp needed + 990 .LVL87: + 991 .LVL88: + 992 .LVL89: + 993 0044 70BD pop {r4, r5, r6, pc} + 994 .LVL90: + 995 .L91: +6170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 996 .loc 1 6170 0 + 997 0046 0020 movs r0, #0 + 998 0048 FCE7 b .L87 + 999 .L90: +6154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1000 .loc 1 6154 0 + 1001 004a 0120 movs r0, #1 + 1002 004c FAE7 b .L87 + 1003 .cfi_endproc + 1004 .LFE111: + 1006 .section .text.I2C_WaitOnRXNEFlagUntilTimeout,"ax",%progbits + 1007 .align 1 + 1008 .syntax unified + 1009 .code 16 + 1010 .thumb_func + ARM GAS /tmp/ccskJbbb.s page 134 + + + 1011 .fpu softvfp + 1013 I2C_WaitOnRXNEFlagUntilTimeout: + 1014 .LFB112: +6182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET) + 1015 .loc 1 6182 0 + 1016 .cfi_startproc + 1017 @ args = 0, pretend = 0, frame = 0 + 1018 @ frame_needed = 0, uses_anonymous_args = 0 + 1019 .LVL91: + 1020 0000 70B5 push {r4, r5, r6, lr} + 1021 .LCFI10: + 1022 .cfi_def_cfa_offset 16 + 1023 .cfi_offset 4, -16 + 1024 .cfi_offset 5, -12 + 1025 .cfi_offset 6, -8 + 1026 .cfi_offset 14, -4 + 1027 0002 0400 movs r4, r0 + 1028 0004 0D00 movs r5, r1 + 1029 0006 1600 movs r6, r2 + 1030 .LVL92: + 1031 .L93: +6183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1032 .loc 1 6183 0 + 1033 0008 2368 ldr r3, [r4] + 1034 000a 9B69 ldr r3, [r3, #24] + 1035 000c 5B07 lsls r3, r3, #29 + 1036 000e 33D4 bmi .L100 +6186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1037 .loc 1 6186 0 + 1038 0010 3200 movs r2, r6 + 1039 0012 2900 movs r1, r5 + 1040 0014 2000 movs r0, r4 + 1041 0016 FFF7FEFF bl I2C_IsAcknowledgeFailed + 1042 .LVL93: + 1043 001a 0028 cmp r0, #0 + 1044 001c 2ED1 bne .L99 +6192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1045 .loc 1 6192 0 + 1046 001e 2368 ldr r3, [r4] + 1047 0020 9A69 ldr r2, [r3, #24] + 1048 0022 9206 lsls r2, r2, #26 + 1049 0024 11D4 bmi .L101 +6222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1050 .loc 1 6222 0 + 1051 0026 FFF7FEFF bl HAL_GetTick + 1052 .LVL94: + 1053 002a 801B subs r0, r0, r6 + 1054 002c A842 cmp r0, r5 + 1055 002e 01D8 bhi .L97 +6222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1056 .loc 1 6222 0 is_stmt 0 discriminator 1 + 1057 0030 002D cmp r5, #0 + 1058 0032 E9D1 bne .L93 + 1059 .L97: +6224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1060 .loc 1 6224 0 is_stmt 1 + 1061 0034 636C ldr r3, [r4, #68] + ARM GAS /tmp/ccskJbbb.s page 135 + + + 1062 0036 2022 movs r2, #32 + 1063 0038 1343 orrs r3, r2 + 1064 003a 6364 str r3, [r4, #68] +6225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1065 .loc 1 6225 0 + 1066 003c 4123 movs r3, #65 + 1067 003e E254 strb r2, [r4, r3] +6228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1068 .loc 1 6228 0 + 1069 0040 013B subs r3, r3, #1 + 1070 0042 0022 movs r2, #0 + 1071 0044 E254 strb r2, [r4, r3] +6230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1072 .loc 1 6230 0 + 1073 0046 0120 movs r0, #1 + 1074 .L94: +6234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1075 .loc 1 6234 0 + 1076 @ sp needed + 1077 .LVL95: + 1078 .LVL96: + 1079 .LVL97: + 1080 0048 70BD pop {r4, r5, r6, pc} + 1081 .LVL98: + 1082 .L101: +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1083 .loc 1 6196 0 + 1084 004a 9A69 ldr r2, [r3, #24] + 1085 004c 5207 lsls r2, r2, #29 + 1086 004e 02D5 bpl .L96 +6196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1087 .loc 1 6196 0 is_stmt 0 discriminator 1 + 1088 0050 228D ldrh r2, [r4, #40] + 1089 0052 002A cmp r2, #0 + 1090 0054 F8D1 bne .L94 + 1091 .L96: +6205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1092 .loc 1 6205 0 is_stmt 1 + 1093 0056 2022 movs r2, #32 + 1094 0058 DA61 str r2, [r3, #28] +6208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1095 .loc 1 6208 0 + 1096 005a 2168 ldr r1, [r4] + 1097 005c 4B68 ldr r3, [r1, #4] + 1098 005e 0848 ldr r0, .L102 + 1099 0060 0340 ands r3, r0 + 1100 0062 4B60 str r3, [r1, #4] +6210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1101 .loc 1 6210 0 + 1102 0064 0023 movs r3, #0 + 1103 0066 6364 str r3, [r4, #68] +6211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1104 .loc 1 6211 0 + 1105 0068 4121 movs r1, #65 + 1106 006a 6254 strb r2, [r4, r1] +6212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1107 .loc 1 6212 0 + ARM GAS /tmp/ccskJbbb.s page 136 + + + 1108 006c 2232 adds r2, r2, #34 + 1109 006e A354 strb r3, [r4, r2] +6215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1110 .loc 1 6215 0 + 1111 0070 023A subs r2, r2, #2 + 1112 0072 A354 strb r3, [r4, r2] +6217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1113 .loc 1 6217 0 + 1114 0074 0120 movs r0, #1 + 1115 0076 E7E7 b .L94 + 1116 .L100: +6233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1117 .loc 1 6233 0 + 1118 0078 0020 movs r0, #0 + 1119 007a E5E7 b .L94 + 1120 .L99: +6188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1121 .loc 1 6188 0 + 1122 007c 0120 movs r0, #1 + 1123 007e E3E7 b .L94 + 1124 .L103: + 1125 .align 2 + 1126 .L102: + 1127 0080 00E800FE .word -33495040 + 1128 .cfi_endproc + 1129 .LFE112: + 1131 .section .text.HAL_I2C_MspInit,"ax",%progbits + 1132 .align 1 + 1133 .weak HAL_I2C_MspInit + 1134 .syntax unified + 1135 .code 16 + 1136 .thumb_func + 1137 .fpu softvfp + 1139 HAL_I2C_MspInit: + 1140 .LFB42: + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1141 .loc 1 625 0 + 1142 .cfi_startproc + 1143 @ args = 0, pretend = 0, frame = 0 + 1144 @ frame_needed = 0, uses_anonymous_args = 0 + 1145 @ link register save eliminated. + 1146 .LVL99: + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1147 .loc 1 632 0 + 1148 @ sp needed + 1149 0000 7047 bx lr + 1150 .cfi_endproc + 1151 .LFE42: + 1153 .section .text.HAL_I2C_Init,"ax",%progbits + 1154 .align 1 + 1155 .global HAL_I2C_Init + 1156 .syntax unified + 1157 .code 16 + 1158 .thumb_func + 1159 .fpu softvfp + 1161 HAL_I2C_Init: + 1162 .LFB40: + ARM GAS /tmp/ccskJbbb.s page 137 + + + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1163 .loc 1 470 0 + 1164 .cfi_startproc + 1165 @ args = 0, pretend = 0, frame = 0 + 1166 @ frame_needed = 0, uses_anonymous_args = 0 + 1167 .LVL100: + 1168 0000 10B5 push {r4, lr} + 1169 .LCFI11: + 1170 .cfi_def_cfa_offset 8 + 1171 .cfi_offset 4, -8 + 1172 .cfi_offset 14, -4 + 1173 0002 041E subs r4, r0, #0 + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1174 .loc 1 472 0 + 1175 0004 59D0 beq .L111 + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1176 .loc 1 487 0 + 1177 0006 4123 movs r3, #65 + 1178 0008 C35C ldrb r3, [r0, r3] + 1179 000a 002B cmp r3, #0 + 1180 000c 43D0 beq .L112 + 1181 .LVL101: + 1182 .L107: + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1183 .loc 1 518 0 + 1184 000e 4123 movs r3, #65 + 1185 0010 2422 movs r2, #36 + 1186 0012 E254 strb r2, [r4, r3] + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1187 .loc 1 521 0 + 1188 0014 2268 ldr r2, [r4] + 1189 0016 1368 ldr r3, [r2] + 1190 0018 0121 movs r1, #1 + 1191 001a 8B43 bics r3, r1 + 1192 001c 1360 str r3, [r2] + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1193 .loc 1 525 0 + 1194 001e 2268 ldr r2, [r4] + 1195 0020 274B ldr r3, .L115 + 1196 0022 6168 ldr r1, [r4, #4] + 1197 0024 0B40 ands r3, r1 + 1198 0026 1361 str r3, [r2, #16] + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1199 .loc 1 529 0 + 1200 0028 2268 ldr r2, [r4] + 1201 002a 9368 ldr r3, [r2, #8] + 1202 002c 2549 ldr r1, .L115+4 + 1203 002e 0B40 ands r3, r1 + 1204 0030 9360 str r3, [r2, #8] + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1205 .loc 1 532 0 + 1206 0032 E368 ldr r3, [r4, #12] + 1207 0034 012B cmp r3, #1 + 1208 0036 34D0 beq .L113 + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1209 .loc 1 538 0 + 1210 0038 2268 ldr r2, [r4] + ARM GAS /tmp/ccskJbbb.s page 138 + + + 1211 003a 8423 movs r3, #132 + 1212 003c 1B02 lsls r3, r3, #8 + 1213 003e A168 ldr r1, [r4, #8] + 1214 0040 0B43 orrs r3, r1 + 1215 0042 9360 str r3, [r2, #8] + 1216 .L109: + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1217 .loc 1 543 0 + 1218 0044 E368 ldr r3, [r4, #12] + 1219 0046 022B cmp r3, #2 + 1220 0048 32D0 beq .L114 + 1221 .L110: + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1222 .loc 1 548 0 + 1223 004a 2268 ldr r2, [r4] + 1224 004c 5168 ldr r1, [r2, #4] + 1225 004e 1E4B ldr r3, .L115+8 + 1226 0050 0B43 orrs r3, r1 + 1227 0052 5360 str r3, [r2, #4] + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1228 .loc 1 552 0 + 1229 0054 2268 ldr r2, [r4] + 1230 0056 D368 ldr r3, [r2, #12] + 1231 0058 1A49 ldr r1, .L115+4 + 1232 005a 0B40 ands r3, r1 + 1233 005c D360 str r3, [r2, #12] + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1234 .loc 1 555 0 + 1235 005e 2369 ldr r3, [r4, #16] + 1236 0060 6269 ldr r2, [r4, #20] + 1237 0062 1343 orrs r3, r2 + 1238 0064 A269 ldr r2, [r4, #24] + 1239 0066 1202 lsls r2, r2, #8 + 1240 0068 2168 ldr r1, [r4] + 1241 006a 1343 orrs r3, r2 + 1242 006c CB60 str r3, [r1, #12] + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1243 .loc 1 559 0 + 1244 006e 2268 ldr r2, [r4] + 1245 0070 E369 ldr r3, [r4, #28] + 1246 0072 216A ldr r1, [r4, #32] + 1247 0074 0B43 orrs r3, r1 + 1248 0076 1360 str r3, [r2] + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1249 .loc 1 562 0 + 1250 0078 2268 ldr r2, [r4] + 1251 007a 1368 ldr r3, [r2] + 1252 007c 0121 movs r1, #1 + 1253 007e 0B43 orrs r3, r1 + 1254 0080 1360 str r3, [r2] + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 1255 .loc 1 564 0 + 1256 0082 0023 movs r3, #0 + 1257 0084 6364 str r3, [r4, #68] + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1258 .loc 1 565 0 + 1259 0086 4122 movs r2, #65 + ARM GAS /tmp/ccskJbbb.s page 139 + + + 1260 0088 1F31 adds r1, r1, #31 + 1261 008a A154 strb r1, [r4, r2] + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1262 .loc 1 566 0 + 1263 008c 2363 str r3, [r4, #48] + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1264 .loc 1 567 0 + 1265 008e 0132 adds r2, r2, #1 + 1266 0090 A354 strb r3, [r4, r2] + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1267 .loc 1 569 0 + 1268 0092 0020 movs r0, #0 + 1269 .L106: + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1270 .loc 1 570 0 + 1271 @ sp needed + 1272 .LVL102: + 1273 0094 10BD pop {r4, pc} + 1274 .LVL103: + 1275 .L112: + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1276 .loc 1 490 0 + 1277 0096 4033 adds r3, r3, #64 + 1278 0098 0022 movs r2, #0 + 1279 009a C254 strb r2, [r0, r3] + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1280 .loc 1 514 0 + 1281 009c FFF7FEFF bl HAL_I2C_MspInit + 1282 .LVL104: + 1283 00a0 B5E7 b .L107 + 1284 .L113: + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1285 .loc 1 534 0 + 1286 00a2 2268 ldr r2, [r4] + 1287 00a4 8023 movs r3, #128 + 1288 00a6 1B02 lsls r3, r3, #8 + 1289 00a8 A168 ldr r1, [r4, #8] + 1290 00aa 0B43 orrs r3, r1 + 1291 00ac 9360 str r3, [r2, #8] + 1292 00ae C9E7 b .L109 + 1293 .L114: + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1294 .loc 1 545 0 + 1295 00b0 2368 ldr r3, [r4] + 1296 00b2 8022 movs r2, #128 + 1297 00b4 1201 lsls r2, r2, #4 + 1298 00b6 5A60 str r2, [r3, #4] + 1299 00b8 C7E7 b .L110 + 1300 .LVL105: + 1301 .L111: + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1302 .loc 1 474 0 + 1303 00ba 0120 movs r0, #1 + 1304 .LVL106: + 1305 00bc EAE7 b .L106 + 1306 .L116: + 1307 00be C046 .align 2 + ARM GAS /tmp/ccskJbbb.s page 140 + + + 1308 .L115: + 1309 00c0 FFFFFFF0 .word -251658241 + 1310 00c4 FF7FFFFF .word -32769 + 1311 00c8 00800002 .word 33587200 + 1312 .cfi_endproc + 1313 .LFE40: + 1315 .section .text.HAL_I2C_MspDeInit,"ax",%progbits + 1316 .align 1 + 1317 .weak HAL_I2C_MspDeInit + 1318 .syntax unified + 1319 .code 16 + 1320 .thumb_func + 1321 .fpu softvfp + 1323 HAL_I2C_MspDeInit: + 1324 .LFB43: + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 1325 .loc 1 641 0 + 1326 .cfi_startproc + 1327 @ args = 0, pretend = 0, frame = 0 + 1328 @ frame_needed = 0, uses_anonymous_args = 0 + 1329 @ link register save eliminated. + 1330 .LVL107: + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1331 .loc 1 648 0 + 1332 @ sp needed + 1333 0000 7047 bx lr + 1334 .cfi_endproc + 1335 .LFE43: + 1337 .section .text.HAL_I2C_DeInit,"ax",%progbits + 1338 .align 1 + 1339 .global HAL_I2C_DeInit + 1340 .syntax unified + 1341 .code 16 + 1342 .thumb_func + 1343 .fpu softvfp + 1345 HAL_I2C_DeInit: + 1346 .LFB41: + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the I2C handle allocation */ + 1347 .loc 1 579 0 + 1348 .cfi_startproc + 1349 @ args = 0, pretend = 0, frame = 0 + 1350 @ frame_needed = 0, uses_anonymous_args = 0 + 1351 .LVL108: + 1352 0000 70B5 push {r4, r5, r6, lr} + 1353 .LCFI12: + 1354 .cfi_def_cfa_offset 16 + 1355 .cfi_offset 4, -16 + 1356 .cfi_offset 5, -12 + 1357 .cfi_offset 6, -8 + 1358 .cfi_offset 14, -4 + 1359 0002 041E subs r4, r0, #0 + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1360 .loc 1 581 0 + 1361 0004 13D0 beq .L120 + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1362 .loc 1 589 0 + 1363 0006 4125 movs r5, #65 + ARM GAS /tmp/ccskJbbb.s page 141 + + + 1364 0008 2423 movs r3, #36 + 1365 000a 4355 strb r3, [r0, r5] + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1366 .loc 1 592 0 + 1367 000c 0268 ldr r2, [r0] + 1368 000e 1368 ldr r3, [r2] + 1369 0010 0121 movs r1, #1 + 1370 0012 8B43 bics r3, r1 + 1371 0014 1360 str r3, [r2] + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 1372 .loc 1 604 0 + 1373 0016 FFF7FEFF bl HAL_I2C_MspDeInit + 1374 .LVL109: + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_RESET; + 1375 .loc 1 607 0 + 1376 001a 0023 movs r3, #0 + 1377 001c 6364 str r3, [r4, #68] + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 1378 .loc 1 608 0 + 1379 001e 6355 strb r3, [r4, r5] + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1380 .loc 1 609 0 + 1381 0020 2363 str r3, [r4, #48] + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1382 .loc 1 610 0 + 1383 0022 4222 movs r2, #66 + 1384 0024 A354 strb r3, [r4, r2] + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1385 .loc 1 613 0 + 1386 0026 023A subs r2, r2, #2 + 1387 0028 A354 strb r3, [r4, r2] + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1388 .loc 1 615 0 + 1389 002a 0020 movs r0, #0 + 1390 .L119: + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1391 .loc 1 616 0 + 1392 @ sp needed + 1393 .LVL110: + 1394 002c 70BD pop {r4, r5, r6, pc} + 1395 .LVL111: + 1396 .L120: + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1397 .loc 1 583 0 + 1398 002e 0120 movs r0, #1 + 1399 .LVL112: + 1400 0030 FCE7 b .L119 + 1401 .cfi_endproc + 1402 .LFE41: + 1404 .section .text.HAL_I2C_Master_Transmit,"ax",%progbits + 1405 .align 1 + 1406 .global HAL_I2C_Master_Transmit + 1407 .syntax unified + 1408 .code 16 + 1409 .thumb_func + 1410 .fpu softvfp + 1412 HAL_I2C_Master_Transmit: + ARM GAS /tmp/ccskJbbb.s page 142 + + + 1413 .LFB44: +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 1414 .loc 1 1061 0 + 1415 .cfi_startproc + 1416 @ args = 4, pretend = 0, frame = 8 + 1417 @ frame_needed = 0, uses_anonymous_args = 0 + 1418 .LVL113: + 1419 0000 F0B5 push {r4, r5, r6, r7, lr} + 1420 .LCFI13: + 1421 .cfi_def_cfa_offset 20 + 1422 .cfi_offset 4, -20 + 1423 .cfi_offset 5, -16 + 1424 .cfi_offset 6, -12 + 1425 .cfi_offset 7, -8 + 1426 .cfi_offset 14, -4 + 1427 0002 85B0 sub sp, sp, #20 + 1428 .LCFI14: + 1429 .cfi_def_cfa_offset 40 + 1430 0004 0500 movs r5, r0 + 1431 0006 0391 str r1, [sp, #12] + 1432 0008 1700 movs r7, r2 + 1433 000a 1E00 movs r6, r3 +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1434 .loc 1 1064 0 + 1435 000c 4123 movs r3, #65 + 1436 .LVL114: + 1437 000e C35C ldrb r3, [r0, r3] + 1438 0010 202B cmp r3, #32 + 1439 0012 00D0 beq .LCB1427 + 1440 0014 99E0 b .L129 @long jump + 1441 .LCB1427: +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1442 .loc 1 1067 0 + 1443 0016 2033 adds r3, r3, #32 + 1444 0018 C35C ldrb r3, [r0, r3] + 1445 001a 012B cmp r3, #1 + 1446 001c 00D1 bne .LCB1431 + 1447 001e 97E0 b .L130 @long jump + 1448 .LCB1431: +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1449 .loc 1 1067 0 is_stmt 0 discriminator 2 + 1450 0020 4023 movs r3, #64 + 1451 0022 0122 movs r2, #1 + 1452 .LVL115: + 1453 0024 C254 strb r2, [r0, r3] +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1454 .loc 1 1070 0 is_stmt 1 discriminator 2 + 1455 0026 FFF7FEFF bl HAL_GetTick + 1456 .LVL116: + 1457 002a 0400 movs r4, r0 + 1458 .LVL117: +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1459 .loc 1 1072 0 discriminator 2 + 1460 002c 8021 movs r1, #128 + 1461 002e 0090 str r0, [sp] + 1462 0030 1923 movs r3, #25 + 1463 0032 0122 movs r2, #1 + ARM GAS /tmp/ccskJbbb.s page 143 + + + 1464 0034 0902 lsls r1, r1, #8 + 1465 0036 2800 movs r0, r5 + 1466 .LVL118: + 1467 0038 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1468 .LVL119: + 1469 003c 0028 cmp r0, #0 + 1470 003e 00D0 beq .LCB1452 + 1471 0040 88E0 b .L131 @long jump + 1472 .LCB1452: +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 1473 .loc 1 1077 0 + 1474 0042 4123 movs r3, #65 + 1475 0044 2122 movs r2, #33 + 1476 0046 EA54 strb r2, [r5, r3] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 1477 .loc 1 1078 0 + 1478 0048 0133 adds r3, r3, #1 + 1479 004a 113A subs r2, r2, #17 + 1480 004c EA54 strb r2, [r5, r3] +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1481 .loc 1 1079 0 + 1482 004e 0023 movs r3, #0 + 1483 0050 6B64 str r3, [r5, #68] +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 1484 .loc 1 1082 0 + 1485 0052 6F62 str r7, [r5, #36] +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 1486 .loc 1 1083 0 + 1487 0054 6E85 strh r6, [r5, #42] +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1488 .loc 1 1084 0 + 1489 0056 6B63 str r3, [r5, #52] +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1490 .loc 1 1088 0 + 1491 0058 6B8D ldrh r3, [r5, #42] + 1492 005a 9BB2 uxth r3, r3 + 1493 005c FF2B cmp r3, #255 + 1494 005e 0BD9 bls .L123 +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_S + 1495 .loc 1 1090 0 + 1496 0060 FF23 movs r3, #255 + 1497 0062 2B85 strh r3, [r5, #40] +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1498 .loc 1 1091 0 + 1499 0064 7F3B subs r3, r3, #127 + 1500 0066 3F4A ldr r2, .L136 + 1501 0068 0092 str r2, [sp] + 1502 006a 5B04 lsls r3, r3, #17 + 1503 006c FF22 movs r2, #255 + 1504 006e 0399 ldr r1, [sp, #12] + 1505 0070 2800 movs r0, r5 + 1506 0072 FFF7FEFF bl I2C_TransferConfig + 1507 .LVL120: + 1508 0076 18E0 b .L125 + 1509 .L123: +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ + 1510 .loc 1 1095 0 + ARM GAS /tmp/ccskJbbb.s page 144 + + + 1511 0078 6A8D ldrh r2, [r5, #42] + 1512 007a 92B2 uxth r2, r2 + 1513 007c 2A85 strh r2, [r5, #40] +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1514 .loc 1 1096 0 + 1515 007e 8023 movs r3, #128 + 1516 0080 D2B2 uxtb r2, r2 + 1517 0082 3849 ldr r1, .L136 + 1518 0084 0091 str r1, [sp] + 1519 0086 9B04 lsls r3, r3, #18 + 1520 0088 0399 ldr r1, [sp, #12] + 1521 008a 2800 movs r0, r5 + 1522 008c FFF7FEFF bl I2C_TransferConfig + 1523 .LVL121: + 1524 0090 0BE0 b .L125 + 1525 .L127: +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_ST + 1526 .loc 1 1130 0 + 1527 0092 6A8D ldrh r2, [r5, #42] + 1528 0094 92B2 uxth r2, r2 + 1529 0096 2A85 strh r2, [r5, #40] +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1530 .loc 1 1131 0 + 1531 0098 8023 movs r3, #128 + 1532 009a D2B2 uxtb r2, r2 + 1533 009c 0021 movs r1, #0 + 1534 009e 0091 str r1, [sp] + 1535 00a0 9B04 lsls r3, r3, #18 + 1536 00a2 0399 ldr r1, [sp, #12] + 1537 00a4 2800 movs r0, r5 + 1538 00a6 FFF7FEFF bl I2C_TransferConfig + 1539 .LVL122: + 1540 .L125: +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1541 .loc 1 1099 0 + 1542 00aa 6B8D ldrh r3, [r5, #42] + 1543 00ac 9BB2 uxth r3, r3 + 1544 00ae 002B cmp r3, #0 + 1545 00b0 34D0 beq .L135 +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1546 .loc 1 1102 0 + 1547 00b2 2200 movs r2, r4 + 1548 00b4 0A99 ldr r1, [sp, #40] + 1549 00b6 2800 movs r0, r5 + 1550 00b8 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 1551 .LVL123: + 1552 00bc 0028 cmp r0, #0 + 1553 00be 4BD1 bne .L132 +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1554 .loc 1 1107 0 + 1555 00c0 2B68 ldr r3, [r5] + 1556 00c2 6A6A ldr r2, [r5, #36] + 1557 00c4 1278 ldrb r2, [r2] + 1558 00c6 9A62 str r2, [r3, #40] +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1559 .loc 1 1110 0 + 1560 00c8 6B6A ldr r3, [r5, #36] + ARM GAS /tmp/ccskJbbb.s page 145 + + + 1561 00ca 0133 adds r3, r3, #1 + 1562 00cc 6B62 str r3, [r5, #36] +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 1563 .loc 1 1112 0 + 1564 00ce 6B8D ldrh r3, [r5, #42] + 1565 00d0 013B subs r3, r3, #1 + 1566 00d2 9BB2 uxth r3, r3 + 1567 00d4 6B85 strh r3, [r5, #42] +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1568 .loc 1 1113 0 + 1569 00d6 2B8D ldrh r3, [r5, #40] + 1570 00d8 013B subs r3, r3, #1 + 1571 00da 9BB2 uxth r3, r3 + 1572 00dc 2B85 strh r3, [r5, #40] +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1573 .loc 1 1115 0 + 1574 00de 6A8D ldrh r2, [r5, #42] + 1575 00e0 92B2 uxth r2, r2 + 1576 00e2 002A cmp r2, #0 + 1577 00e4 E1D0 beq .L125 +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1578 .loc 1 1115 0 is_stmt 0 discriminator 1 + 1579 00e6 002B cmp r3, #0 + 1580 00e8 DFD1 bne .L125 +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1581 .loc 1 1118 0 is_stmt 1 + 1582 00ea 0094 str r4, [sp] + 1583 00ec 0A9B ldr r3, [sp, #40] + 1584 00ee 0022 movs r2, #0 + 1585 00f0 8021 movs r1, #128 + 1586 00f2 2800 movs r0, r5 + 1587 00f4 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1588 .LVL124: + 1589 00f8 0028 cmp r0, #0 + 1590 00fa 2FD1 bne .L133 +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1591 .loc 1 1123 0 + 1592 00fc 6B8D ldrh r3, [r5, #42] + 1593 00fe 9BB2 uxth r3, r3 + 1594 0100 FF2B cmp r3, #255 + 1595 0102 C6D9 bls .L127 +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STA + 1596 .loc 1 1125 0 + 1597 0104 FF23 movs r3, #255 + 1598 0106 2B85 strh r3, [r5, #40] +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1599 .loc 1 1126 0 + 1600 0108 7F3B subs r3, r3, #127 + 1601 010a 0022 movs r2, #0 + 1602 010c 0092 str r2, [sp] + 1603 010e 5B04 lsls r3, r3, #17 + 1604 0110 FF32 adds r2, r2, #255 + 1605 0112 0399 ldr r1, [sp, #12] + 1606 0114 2800 movs r0, r5 + 1607 0116 FFF7FEFF bl I2C_TransferConfig + 1608 .LVL125: + 1609 011a C6E7 b .L125 + ARM GAS /tmp/ccskJbbb.s page 146 + + + 1610 .L135: +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1611 .loc 1 1138 0 + 1612 011c 2200 movs r2, r4 + 1613 011e 0A99 ldr r1, [sp, #40] + 1614 0120 2800 movs r0, r5 + 1615 0122 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 1616 .LVL126: + 1617 0126 0028 cmp r0, #0 + 1618 0128 1AD1 bne .L134 +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1619 .loc 1 1144 0 + 1620 012a 2B68 ldr r3, [r5] + 1621 012c 2022 movs r2, #32 + 1622 012e DA61 str r2, [r3, #28] +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1623 .loc 1 1147 0 + 1624 0130 2968 ldr r1, [r5] + 1625 0132 4B68 ldr r3, [r1, #4] + 1626 0134 0C4C ldr r4, .L136+4 + 1627 .LVL127: + 1628 0136 2340 ands r3, r4 + 1629 0138 4B60 str r3, [r1, #4] +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1630 .loc 1 1149 0 + 1631 013a 4123 movs r3, #65 + 1632 013c EA54 strb r2, [r5, r3] +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1633 .loc 1 1150 0 + 1634 013e 0023 movs r3, #0 + 1635 0140 2232 adds r2, r2, #34 + 1636 0142 AB54 strb r3, [r5, r2] +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1637 .loc 1 1153 0 + 1638 0144 023A subs r2, r2, #2 + 1639 0146 AB54 strb r3, [r5, r2] +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1640 .loc 1 1155 0 + 1641 0148 00E0 b .L122 + 1642 .LVL128: + 1643 .L129: +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1644 .loc 1 1159 0 + 1645 014a 0220 movs r0, #2 + 1646 .LVL129: + 1647 .L122: +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1648 .loc 1 1161 0 + 1649 014c 05B0 add sp, sp, #20 + 1650 @ sp needed + 1651 .LVL130: + 1652 .LVL131: + 1653 014e F0BD pop {r4, r5, r6, r7, pc} + 1654 .LVL132: + 1655 .L130: +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1656 .loc 1 1067 0 + ARM GAS /tmp/ccskJbbb.s page 147 + + + 1657 0150 0220 movs r0, #2 + 1658 .LVL133: + 1659 0152 FBE7 b .L122 + 1660 .LVL134: + 1661 .L131: +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1662 .loc 1 1074 0 + 1663 0154 0120 movs r0, #1 + 1664 0156 F9E7 b .L122 + 1665 .L132: +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1666 .loc 1 1104 0 + 1667 0158 0120 movs r0, #1 + 1668 015a F7E7 b .L122 + 1669 .L133: +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1670 .loc 1 1120 0 + 1671 015c 0120 movs r0, #1 + 1672 015e F5E7 b .L122 + 1673 .L134: +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1674 .loc 1 1140 0 + 1675 0160 0120 movs r0, #1 + 1676 0162 F3E7 b .L122 + 1677 .L137: + 1678 .align 2 + 1679 .L136: + 1680 0164 00200080 .word -2147475456 + 1681 0168 00E800FE .word -33495040 + 1682 .cfi_endproc + 1683 .LFE44: + 1685 .section .text.HAL_I2C_Master_Receive,"ax",%progbits + 1686 .align 1 + 1687 .global HAL_I2C_Master_Receive + 1688 .syntax unified + 1689 .code 16 + 1690 .thumb_func + 1691 .fpu softvfp + 1693 HAL_I2C_Master_Receive: + 1694 .LFB45: +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 1695 .loc 1 1175 0 + 1696 .cfi_startproc + 1697 @ args = 4, pretend = 0, frame = 8 + 1698 @ frame_needed = 0, uses_anonymous_args = 0 + 1699 .LVL135: + 1700 0000 F0B5 push {r4, r5, r6, r7, lr} + 1701 .LCFI15: + 1702 .cfi_def_cfa_offset 20 + 1703 .cfi_offset 4, -20 + 1704 .cfi_offset 5, -16 + 1705 .cfi_offset 6, -12 + 1706 .cfi_offset 7, -8 + 1707 .cfi_offset 14, -4 + 1708 0002 85B0 sub sp, sp, #20 + 1709 .LCFI16: + 1710 .cfi_def_cfa_offset 40 + ARM GAS /tmp/ccskJbbb.s page 148 + + + 1711 0004 0500 movs r5, r0 + 1712 0006 0391 str r1, [sp, #12] + 1713 0008 1700 movs r7, r2 + 1714 000a 1E00 movs r6, r3 +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1715 .loc 1 1178 0 + 1716 000c 4123 movs r3, #65 + 1717 .LVL136: + 1718 000e C35C ldrb r3, [r0, r3] + 1719 0010 202B cmp r3, #32 + 1720 0012 00D0 beq .LCB1712 + 1721 0014 99E0 b .L146 @long jump + 1722 .LCB1712: +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1723 .loc 1 1181 0 + 1724 0016 2033 adds r3, r3, #32 + 1725 0018 C35C ldrb r3, [r0, r3] + 1726 001a 012B cmp r3, #1 + 1727 001c 00D1 bne .LCB1716 + 1728 001e 97E0 b .L147 @long jump + 1729 .LCB1716: +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1730 .loc 1 1181 0 is_stmt 0 discriminator 2 + 1731 0020 4023 movs r3, #64 + 1732 0022 0122 movs r2, #1 + 1733 .LVL137: + 1734 0024 C254 strb r2, [r0, r3] +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1735 .loc 1 1184 0 is_stmt 1 discriminator 2 + 1736 0026 FFF7FEFF bl HAL_GetTick + 1737 .LVL138: + 1738 002a 0400 movs r4, r0 + 1739 .LVL139: +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1740 .loc 1 1186 0 discriminator 2 + 1741 002c 8021 movs r1, #128 + 1742 002e 0090 str r0, [sp] + 1743 0030 1923 movs r3, #25 + 1744 0032 0122 movs r2, #1 + 1745 0034 0902 lsls r1, r1, #8 + 1746 0036 2800 movs r0, r5 + 1747 .LVL140: + 1748 0038 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1749 .LVL141: + 1750 003c 0028 cmp r0, #0 + 1751 003e 00D0 beq .LCB1737 + 1752 0040 88E0 b .L148 @long jump + 1753 .LCB1737: +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 1754 .loc 1 1191 0 + 1755 0042 4123 movs r3, #65 + 1756 0044 2222 movs r2, #34 + 1757 0046 EA54 strb r2, [r5, r3] +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 1758 .loc 1 1192 0 + 1759 0048 0133 adds r3, r3, #1 + 1760 004a 123A subs r2, r2, #18 + ARM GAS /tmp/ccskJbbb.s page 149 + + + 1761 004c EA54 strb r2, [r5, r3] +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1762 .loc 1 1193 0 + 1763 004e 0023 movs r3, #0 + 1764 0050 6B64 str r3, [r5, #68] +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 1765 .loc 1 1196 0 + 1766 0052 6F62 str r7, [r5, #36] +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 1767 .loc 1 1197 0 + 1768 0054 6E85 strh r6, [r5, #42] +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1769 .loc 1 1198 0 + 1770 0056 6B63 str r3, [r5, #52] +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1771 .loc 1 1202 0 + 1772 0058 6B8D ldrh r3, [r5, #42] + 1773 005a 9BB2 uxth r3, r3 + 1774 005c FF2B cmp r3, #255 + 1775 005e 0BD9 bls .L140 +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_S + 1776 .loc 1 1204 0 + 1777 0060 FF23 movs r3, #255 + 1778 0062 2B85 strh r3, [r5, #40] +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1779 .loc 1 1205 0 + 1780 0064 7F3B subs r3, r3, #127 + 1781 0066 3F4A ldr r2, .L153 + 1782 0068 0092 str r2, [sp] + 1783 006a 5B04 lsls r3, r3, #17 + 1784 006c FF22 movs r2, #255 + 1785 006e 0399 ldr r1, [sp, #12] + 1786 0070 2800 movs r0, r5 + 1787 0072 FFF7FEFF bl I2C_TransferConfig + 1788 .LVL142: + 1789 0076 18E0 b .L142 + 1790 .L140: +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ + 1791 .loc 1 1209 0 + 1792 0078 6A8D ldrh r2, [r5, #42] + 1793 007a 92B2 uxth r2, r2 + 1794 007c 2A85 strh r2, [r5, #40] +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1795 .loc 1 1210 0 + 1796 007e 8023 movs r3, #128 + 1797 0080 D2B2 uxtb r2, r2 + 1798 0082 3849 ldr r1, .L153 + 1799 0084 0091 str r1, [sp] + 1800 0086 9B04 lsls r3, r3, #18 + 1801 0088 0399 ldr r1, [sp, #12] + 1802 008a 2800 movs r0, r5 + 1803 008c FFF7FEFF bl I2C_TransferConfig + 1804 .LVL143: + 1805 0090 0BE0 b .L142 + 1806 .L144: +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_ST + 1807 .loc 1 1245 0 + ARM GAS /tmp/ccskJbbb.s page 150 + + + 1808 0092 6A8D ldrh r2, [r5, #42] + 1809 0094 92B2 uxth r2, r2 + 1810 0096 2A85 strh r2, [r5, #40] +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1811 .loc 1 1246 0 + 1812 0098 8023 movs r3, #128 + 1813 009a D2B2 uxtb r2, r2 + 1814 009c 0021 movs r1, #0 + 1815 009e 0091 str r1, [sp] + 1816 00a0 9B04 lsls r3, r3, #18 + 1817 00a2 0399 ldr r1, [sp, #12] + 1818 00a4 2800 movs r0, r5 + 1819 00a6 FFF7FEFF bl I2C_TransferConfig + 1820 .LVL144: + 1821 .L142: +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1822 .loc 1 1213 0 + 1823 00aa 6B8D ldrh r3, [r5, #42] + 1824 00ac 9BB2 uxth r3, r3 + 1825 00ae 002B cmp r3, #0 + 1826 00b0 34D0 beq .L152 +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1827 .loc 1 1216 0 + 1828 00b2 2200 movs r2, r4 + 1829 00b4 0A99 ldr r1, [sp, #40] + 1830 00b6 2800 movs r0, r5 + 1831 00b8 FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 1832 .LVL145: + 1833 00bc 0028 cmp r0, #0 + 1834 00be 4BD1 bne .L149 +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1835 .loc 1 1222 0 + 1836 00c0 2B68 ldr r3, [r5] + 1837 00c2 5B6A ldr r3, [r3, #36] + 1838 00c4 6A6A ldr r2, [r5, #36] + 1839 00c6 1370 strb r3, [r2] +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1840 .loc 1 1225 0 + 1841 00c8 6B6A ldr r3, [r5, #36] + 1842 00ca 0133 adds r3, r3, #1 + 1843 00cc 6B62 str r3, [r5, #36] +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 1844 .loc 1 1227 0 + 1845 00ce 2B8D ldrh r3, [r5, #40] + 1846 00d0 013B subs r3, r3, #1 + 1847 00d2 9BB2 uxth r3, r3 + 1848 00d4 2B85 strh r3, [r5, #40] +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1849 .loc 1 1228 0 + 1850 00d6 6A8D ldrh r2, [r5, #42] + 1851 00d8 013A subs r2, r2, #1 + 1852 00da 92B2 uxth r2, r2 + 1853 00dc 6A85 strh r2, [r5, #42] +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1854 .loc 1 1230 0 + 1855 00de 6A8D ldrh r2, [r5, #42] + 1856 00e0 92B2 uxth r2, r2 + ARM GAS /tmp/ccskJbbb.s page 151 + + + 1857 00e2 002A cmp r2, #0 + 1858 00e4 E1D0 beq .L142 +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1859 .loc 1 1230 0 is_stmt 0 discriminator 1 + 1860 00e6 002B cmp r3, #0 + 1861 00e8 DFD1 bne .L142 +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1862 .loc 1 1233 0 is_stmt 1 + 1863 00ea 0094 str r4, [sp] + 1864 00ec 0A9B ldr r3, [sp, #40] + 1865 00ee 0022 movs r2, #0 + 1866 00f0 8021 movs r1, #128 + 1867 00f2 2800 movs r0, r5 + 1868 00f4 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 1869 .LVL146: + 1870 00f8 0028 cmp r0, #0 + 1871 00fa 2FD1 bne .L150 +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1872 .loc 1 1238 0 + 1873 00fc 6B8D ldrh r3, [r5, #42] + 1874 00fe 9BB2 uxth r3, r3 + 1875 0100 FF2B cmp r3, #255 + 1876 0102 C6D9 bls .L144 +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STA + 1877 .loc 1 1240 0 + 1878 0104 FF23 movs r3, #255 + 1879 0106 2B85 strh r3, [r5, #40] +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1880 .loc 1 1241 0 + 1881 0108 7F3B subs r3, r3, #127 + 1882 010a 0022 movs r2, #0 + 1883 010c 0092 str r2, [sp] + 1884 010e 5B04 lsls r3, r3, #17 + 1885 0110 FF32 adds r2, r2, #255 + 1886 0112 0399 ldr r1, [sp, #12] + 1887 0114 2800 movs r0, r5 + 1888 0116 FFF7FEFF bl I2C_TransferConfig + 1889 .LVL147: + 1890 011a C6E7 b .L142 + 1891 .L152: +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1892 .loc 1 1253 0 + 1893 011c 2200 movs r2, r4 + 1894 011e 0A99 ldr r1, [sp, #40] + 1895 0120 2800 movs r0, r5 + 1896 0122 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 1897 .LVL148: + 1898 0126 0028 cmp r0, #0 + 1899 0128 1AD1 bne .L151 +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1900 .loc 1 1259 0 + 1901 012a 2B68 ldr r3, [r5] + 1902 012c 2022 movs r2, #32 + 1903 012e DA61 str r2, [r3, #28] +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1904 .loc 1 1262 0 + 1905 0130 2968 ldr r1, [r5] + ARM GAS /tmp/ccskJbbb.s page 152 + + + 1906 0132 4B68 ldr r3, [r1, #4] + 1907 0134 0C4C ldr r4, .L153+4 + 1908 .LVL149: + 1909 0136 2340 ands r3, r4 + 1910 0138 4B60 str r3, [r1, #4] +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 1911 .loc 1 1264 0 + 1912 013a 4123 movs r3, #65 + 1913 013c EA54 strb r2, [r5, r3] +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1914 .loc 1 1265 0 + 1915 013e 0023 movs r3, #0 + 1916 0140 2232 adds r2, r2, #34 + 1917 0142 AB54 strb r3, [r5, r2] +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1918 .loc 1 1268 0 + 1919 0144 023A subs r2, r2, #2 + 1920 0146 AB54 strb r3, [r5, r2] +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1921 .loc 1 1270 0 + 1922 0148 00E0 b .L139 + 1923 .LVL150: + 1924 .L146: +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1925 .loc 1 1274 0 + 1926 014a 0220 movs r0, #2 + 1927 .LVL151: + 1928 .L139: +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1929 .loc 1 1276 0 + 1930 014c 05B0 add sp, sp, #20 + 1931 @ sp needed + 1932 .LVL152: + 1933 .LVL153: + 1934 014e F0BD pop {r4, r5, r6, r7, pc} + 1935 .LVL154: + 1936 .L147: +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 1937 .loc 1 1181 0 + 1938 0150 0220 movs r0, #2 + 1939 .LVL155: + 1940 0152 FBE7 b .L139 + 1941 .LVL156: + 1942 .L148: +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1943 .loc 1 1188 0 + 1944 0154 0120 movs r0, #1 + 1945 0156 F9E7 b .L139 + 1946 .L149: +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1947 .loc 1 1218 0 + 1948 0158 0120 movs r0, #1 + 1949 015a F7E7 b .L139 + 1950 .L150: +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1951 .loc 1 1235 0 + 1952 015c 0120 movs r0, #1 + ARM GAS /tmp/ccskJbbb.s page 153 + + + 1953 015e F5E7 b .L139 + 1954 .L151: +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 1955 .loc 1 1255 0 + 1956 0160 0120 movs r0, #1 + 1957 0162 F3E7 b .L139 + 1958 .L154: + 1959 .align 2 + 1960 .L153: + 1961 0164 00240080 .word -2147474432 + 1962 0168 00E800FE .word -33495040 + 1963 .cfi_endproc + 1964 .LFE45: + 1966 .section .text.HAL_I2C_Slave_Transmit,"ax",%progbits + 1967 .align 1 + 1968 .global HAL_I2C_Slave_Transmit + 1969 .syntax unified + 1970 .code 16 + 1971 .thumb_func + 1972 .fpu softvfp + 1974 HAL_I2C_Slave_Transmit: + 1975 .LFB46: +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 1976 .loc 1 1288 0 + 1977 .cfi_startproc + 1978 @ args = 0, pretend = 0, frame = 8 + 1979 @ frame_needed = 0, uses_anonymous_args = 0 + 1980 .LVL157: + 1981 0000 F0B5 push {r4, r5, r6, r7, lr} + 1982 .LCFI17: + 1983 .cfi_def_cfa_offset 20 + 1984 .cfi_offset 4, -20 + 1985 .cfi_offset 5, -16 + 1986 .cfi_offset 6, -12 + 1987 .cfi_offset 7, -8 + 1988 .cfi_offset 14, -4 + 1989 0002 85B0 sub sp, sp, #20 + 1990 .LCFI18: + 1991 .cfi_def_cfa_offset 40 + 1992 0004 0600 movs r6, r0 + 1993 0006 0C00 movs r4, r1 + 1994 0008 1500 movs r5, r2 + 1995 000a 0393 str r3, [sp, #12] +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 1996 .loc 1 1291 0 + 1997 000c 4123 movs r3, #65 + 1998 .LVL158: + 1999 000e C35C ldrb r3, [r0, r3] + 2000 0010 202B cmp r3, #32 + 2001 0012 00D0 beq .LCB1995 + 2002 0014 B8E0 b .L167 @long jump + 2003 .LCB1995: +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2004 .loc 1 1293 0 + 2005 0016 0029 cmp r1, #0 + 2006 0018 4CD0 beq .L157 +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 154 + + + 2007 .loc 1 1293 0 is_stmt 0 discriminator 1 + 2008 001a 002A cmp r2, #0 + 2009 001c 4AD0 beq .L157 +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2010 .loc 1 1299 0 is_stmt 1 + 2011 001e 4023 movs r3, #64 + 2012 0020 C35C ldrb r3, [r0, r3] + 2013 0022 012B cmp r3, #1 + 2014 0024 00D1 bne .LCB2003 + 2015 0026 B2E0 b .L168 @long jump + 2016 .LCB2003: +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2017 .loc 1 1299 0 is_stmt 0 discriminator 2 + 2018 0028 4023 movs r3, #64 + 2019 002a 0122 movs r2, #1 + 2020 .LVL159: + 2021 002c C254 strb r2, [r0, r3] +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2022 .loc 1 1302 0 is_stmt 1 discriminator 2 + 2023 002e FFF7FEFF bl HAL_GetTick + 2024 .LVL160: + 2025 0032 0700 movs r7, r0 + 2026 .LVL161: +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2027 .loc 1 1304 0 discriminator 2 + 2028 0034 4123 movs r3, #65 + 2029 0036 2122 movs r2, #33 + 2030 0038 F254 strb r2, [r6, r3] +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2031 .loc 1 1305 0 discriminator 2 + 2032 003a 0133 adds r3, r3, #1 + 2033 003c 013A subs r2, r2, #1 + 2034 003e F254 strb r2, [r6, r3] +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2035 .loc 1 1306 0 discriminator 2 + 2036 0040 0023 movs r3, #0 + 2037 0042 7364 str r3, [r6, #68] +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2038 .loc 1 1309 0 discriminator 2 + 2039 0044 7462 str r4, [r6, #36] +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2040 .loc 1 1310 0 discriminator 2 + 2041 0046 7585 strh r5, [r6, #42] +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2042 .loc 1 1311 0 discriminator 2 + 2043 0048 7363 str r3, [r6, #52] +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2044 .loc 1 1314 0 discriminator 2 + 2045 004a 3268 ldr r2, [r6] + 2046 004c 5368 ldr r3, [r2, #4] + 2047 004e 5149 ldr r1, .L178 + 2048 0050 0B40 ands r3, r1 + 2049 0052 5360 str r3, [r2, #4] +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2050 .loc 1 1317 0 discriminator 2 + 2051 0054 0090 str r0, [sp] + 2052 0056 039B ldr r3, [sp, #12] + ARM GAS /tmp/ccskJbbb.s page 155 + + + 2053 0058 0022 movs r2, #0 + 2054 005a 0821 movs r1, #8 + 2055 005c 3000 movs r0, r6 + 2056 .LVL162: + 2057 005e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2058 .LVL163: + 2059 0062 0028 cmp r0, #0 + 2060 0064 2BD1 bne .L170 +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2061 .loc 1 1325 0 + 2062 0066 3368 ldr r3, [r6] + 2063 0068 0822 movs r2, #8 + 2064 006a DA61 str r2, [r3, #28] +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2065 .loc 1 1328 0 + 2066 006c F368 ldr r3, [r6, #12] + 2067 006e 022B cmp r3, #2 + 2068 0070 2DD0 beq .L171 + 2069 .L160: +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2070 .loc 1 1343 0 + 2071 0072 8021 movs r1, #128 + 2072 0074 0097 str r7, [sp] + 2073 0076 039B ldr r3, [sp, #12] + 2074 0078 0022 movs r2, #0 + 2075 007a 4902 lsls r1, r1, #9 + 2076 007c 3000 movs r0, r6 + 2077 007e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2078 .LVL164: + 2079 0082 0028 cmp r0, #0 + 2080 0084 38D1 bne .L172 + 2081 .L162: +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2082 .loc 1 1350 0 + 2083 0086 738D ldrh r3, [r6, #42] + 2084 0088 9BB2 uxth r3, r3 + 2085 008a 002B cmp r3, #0 + 2086 008c 44D0 beq .L173 +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2087 .loc 1 1353 0 + 2088 008e 3A00 movs r2, r7 + 2089 0090 0399 ldr r1, [sp, #12] + 2090 0092 3000 movs r0, r6 + 2091 0094 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 2092 .LVL165: + 2093 0098 0028 cmp r0, #0 + 2094 009a 35D1 bne .L174 +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2095 .loc 1 1361 0 + 2096 009c 3368 ldr r3, [r6] + 2097 009e 726A ldr r2, [r6, #36] + 2098 00a0 1278 ldrb r2, [r2] + 2099 00a2 9A62 str r2, [r3, #40] +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2100 .loc 1 1364 0 + 2101 00a4 736A ldr r3, [r6, #36] + 2102 00a6 0133 adds r3, r3, #1 + ARM GAS /tmp/ccskJbbb.s page 156 + + + 2103 00a8 7362 str r3, [r6, #36] +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2104 .loc 1 1366 0 + 2105 00aa 738D ldrh r3, [r6, #42] + 2106 00ac 013B subs r3, r3, #1 + 2107 00ae 9BB2 uxth r3, r3 + 2108 00b0 7385 strh r3, [r6, #42] + 2109 00b2 E8E7 b .L162 + 2110 .LVL166: + 2111 .L157: +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2112 .loc 1 1295 0 + 2113 00b4 8023 movs r3, #128 + 2114 00b6 9B00 lsls r3, r3, #2 + 2115 00b8 7364 str r3, [r6, #68] +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2116 .loc 1 1296 0 + 2117 00ba 0120 movs r0, #1 + 2118 .LVL167: + 2119 00bc 65E0 b .L156 + 2120 .LVL168: + 2121 .L170: +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2122 .loc 1 1320 0 + 2123 00be 3268 ldr r2, [r6] + 2124 00c0 5168 ldr r1, [r2, #4] + 2125 00c2 8023 movs r3, #128 + 2126 00c4 1B02 lsls r3, r3, #8 + 2127 00c6 0B43 orrs r3, r1 + 2128 00c8 5360 str r3, [r2, #4] +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2129 .loc 1 1321 0 + 2130 00ca 0120 movs r0, #1 + 2131 00cc 5DE0 b .L156 + 2132 .L171: +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2133 .loc 1 1331 0 + 2134 00ce 0097 str r7, [sp] + 2135 00d0 039B ldr r3, [sp, #12] + 2136 00d2 0022 movs r2, #0 + 2137 00d4 0821 movs r1, #8 + 2138 00d6 3000 movs r0, r6 + 2139 00d8 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2140 .LVL169: + 2141 00dc 0028 cmp r0, #0 + 2142 00de 03D1 bne .L175 +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2143 .loc 1 1339 0 + 2144 00e0 3368 ldr r3, [r6] + 2145 00e2 0822 movs r2, #8 + 2146 00e4 DA61 str r2, [r3, #28] + 2147 00e6 C4E7 b .L160 + 2148 .L175: +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2149 .loc 1 1334 0 + 2150 00e8 3268 ldr r2, [r6] + 2151 00ea 5168 ldr r1, [r2, #4] + ARM GAS /tmp/ccskJbbb.s page 157 + + + 2152 00ec 8023 movs r3, #128 + 2153 00ee 1B02 lsls r3, r3, #8 + 2154 00f0 0B43 orrs r3, r1 + 2155 00f2 5360 str r3, [r2, #4] +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2156 .loc 1 1335 0 + 2157 00f4 0120 movs r0, #1 + 2158 00f6 48E0 b .L156 + 2159 .L172: +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2160 .loc 1 1346 0 + 2161 00f8 3268 ldr r2, [r6] + 2162 00fa 5168 ldr r1, [r2, #4] + 2163 00fc 8023 movs r3, #128 + 2164 00fe 1B02 lsls r3, r3, #8 + 2165 0100 0B43 orrs r3, r1 + 2166 0102 5360 str r3, [r2, #4] +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2167 .loc 1 1347 0 + 2168 0104 0120 movs r0, #1 + 2169 0106 40E0 b .L156 + 2170 .L174: +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2171 .loc 1 1356 0 + 2172 0108 3268 ldr r2, [r6] + 2173 010a 5168 ldr r1, [r2, #4] + 2174 010c 8023 movs r3, #128 + 2175 010e 1B02 lsls r3, r3, #8 + 2176 0110 0B43 orrs r3, r1 + 2177 0112 5360 str r3, [r2, #4] +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2178 .loc 1 1357 0 + 2179 0114 0120 movs r0, #1 + 2180 0116 38E0 b .L156 + 2181 .L173: +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2182 .loc 1 1370 0 + 2183 0118 3A00 movs r2, r7 + 2184 011a 0399 ldr r1, [sp, #12] + 2185 011c 3000 movs r0, r6 + 2186 011e FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2187 .LVL170: + 2188 0122 0028 cmp r0, #0 + 2189 0124 0CD0 beq .L165 +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2190 .loc 1 1373 0 + 2191 0126 3268 ldr r2, [r6] + 2192 0128 5168 ldr r1, [r2, #4] + 2193 012a 8023 movs r3, #128 + 2194 012c 1B02 lsls r3, r3, #8 + 2195 012e 0B43 orrs r3, r1 + 2196 0130 5360 str r3, [r2, #4] +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2197 .loc 1 1375 0 + 2198 0132 736C ldr r3, [r6, #68] + 2199 0134 042B cmp r3, #4 + 2200 0136 01D0 beq .L176 + ARM GAS /tmp/ccskJbbb.s page 158 + + +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2201 .loc 1 1383 0 + 2202 0138 0120 movs r0, #1 + 2203 013a 26E0 b .L156 + 2204 .L176: +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2205 .loc 1 1379 0 + 2206 013c 0023 movs r3, #0 + 2207 013e 7364 str r3, [r6, #68] + 2208 .L165: +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2209 .loc 1 1388 0 + 2210 0140 3368 ldr r3, [r6] + 2211 0142 2022 movs r2, #32 + 2212 0144 DA61 str r2, [r3, #28] +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2213 .loc 1 1391 0 + 2214 0146 8021 movs r1, #128 + 2215 0148 0097 str r7, [sp] + 2216 014a 039B ldr r3, [sp, #12] + 2217 014c 1F3A subs r2, r2, #31 + 2218 014e 0902 lsls r1, r1, #8 + 2219 0150 3000 movs r0, r6 + 2220 0152 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2221 .LVL171: + 2222 0156 0028 cmp r0, #0 + 2223 0158 0ED1 bne .L177 +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2224 .loc 1 1399 0 + 2225 015a 3268 ldr r2, [r6] + 2226 015c 5168 ldr r1, [r2, #4] + 2227 015e 8023 movs r3, #128 + 2228 0160 1B02 lsls r3, r3, #8 + 2229 0162 0B43 orrs r3, r1 + 2230 0164 5360 str r3, [r2, #4] +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2231 .loc 1 1401 0 + 2232 0166 4123 movs r3, #65 + 2233 0168 2022 movs r2, #32 + 2234 016a F254 strb r2, [r6, r3] +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2235 .loc 1 1402 0 + 2236 016c 0023 movs r3, #0 + 2237 016e 2232 adds r2, r2, #34 + 2238 0170 B354 strb r3, [r6, r2] +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2239 .loc 1 1405 0 + 2240 0172 023A subs r2, r2, #2 + 2241 0174 B354 strb r3, [r6, r2] +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2242 .loc 1 1407 0 + 2243 0176 08E0 b .L156 + 2244 .L177: +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2245 .loc 1 1394 0 + 2246 0178 3268 ldr r2, [r6] + 2247 017a 5168 ldr r1, [r2, #4] + ARM GAS /tmp/ccskJbbb.s page 159 + + + 2248 017c 8023 movs r3, #128 + 2249 017e 1B02 lsls r3, r3, #8 + 2250 0180 0B43 orrs r3, r1 + 2251 0182 5360 str r3, [r2, #4] +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2252 .loc 1 1395 0 + 2253 0184 0120 movs r0, #1 + 2254 0186 00E0 b .L156 + 2255 .LVL172: + 2256 .L167: +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2257 .loc 1 1411 0 + 2258 0188 0220 movs r0, #2 + 2259 .LVL173: + 2260 .L156: +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2261 .loc 1 1413 0 + 2262 018a 05B0 add sp, sp, #20 + 2263 @ sp needed + 2264 .LVL174: + 2265 .LVL175: + 2266 018c F0BD pop {r4, r5, r6, r7, pc} + 2267 .LVL176: + 2268 .L168: +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2269 .loc 1 1299 0 + 2270 018e 0220 movs r0, #2 + 2271 .LVL177: + 2272 0190 FBE7 b .L156 + 2273 .L179: + 2274 0192 C046 .align 2 + 2275 .L178: + 2276 0194 FF7FFFFF .word -32769 + 2277 .cfi_endproc + 2278 .LFE46: + 2280 .section .text.HAL_I2C_Slave_Receive,"ax",%progbits + 2281 .align 1 + 2282 .global HAL_I2C_Slave_Receive + 2283 .syntax unified + 2284 .code 16 + 2285 .thumb_func + 2286 .fpu softvfp + 2288 HAL_I2C_Slave_Receive: + 2289 .LFB47: +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 2290 .loc 1 1425 0 + 2291 .cfi_startproc + 2292 @ args = 0, pretend = 0, frame = 8 + 2293 @ frame_needed = 0, uses_anonymous_args = 0 + 2294 .LVL178: + 2295 0000 F0B5 push {r4, r5, r6, r7, lr} + 2296 .LCFI19: + 2297 .cfi_def_cfa_offset 20 + 2298 .cfi_offset 4, -20 + 2299 .cfi_offset 5, -16 + 2300 .cfi_offset 6, -12 + 2301 .cfi_offset 7, -8 + ARM GAS /tmp/ccskJbbb.s page 160 + + + 2302 .cfi_offset 14, -4 + 2303 0002 85B0 sub sp, sp, #20 + 2304 .LCFI20: + 2305 .cfi_def_cfa_offset 40 + 2306 0004 0600 movs r6, r0 + 2307 0006 0C00 movs r4, r1 + 2308 0008 1500 movs r5, r2 + 2309 000a 0393 str r3, [sp, #12] +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2310 .loc 1 1428 0 + 2311 000c 4123 movs r3, #65 + 2312 .LVL179: + 2313 000e C35C ldrb r3, [r0, r3] + 2314 0010 202B cmp r3, #32 + 2315 0012 00D0 beq .LCB2307 + 2316 0014 A8E0 b .L190 @long jump + 2317 .LCB2307: +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2318 .loc 1 1430 0 + 2319 0016 0029 cmp r1, #0 + 2320 0018 2DD0 beq .L182 +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2321 .loc 1 1430 0 is_stmt 0 discriminator 1 + 2322 001a 002A cmp r2, #0 + 2323 001c 2BD0 beq .L182 +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2324 .loc 1 1436 0 is_stmt 1 + 2325 001e 4023 movs r3, #64 + 2326 0020 C35C ldrb r3, [r0, r3] + 2327 0022 012B cmp r3, #1 + 2328 0024 00D1 bne .LCB2315 + 2329 0026 A2E0 b .L191 @long jump + 2330 .LCB2315: +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2331 .loc 1 1436 0 is_stmt 0 discriminator 2 + 2332 0028 4023 movs r3, #64 + 2333 002a 0122 movs r2, #1 + 2334 .LVL180: + 2335 002c C254 strb r2, [r0, r3] +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2336 .loc 1 1439 0 is_stmt 1 discriminator 2 + 2337 002e FFF7FEFF bl HAL_GetTick + 2338 .LVL181: + 2339 0032 0700 movs r7, r0 + 2340 .LVL182: +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2341 .loc 1 1441 0 discriminator 2 + 2342 0034 4123 movs r3, #65 + 2343 0036 2222 movs r2, #34 + 2344 0038 F254 strb r2, [r6, r3] +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2345 .loc 1 1442 0 discriminator 2 + 2346 003a 0133 adds r3, r3, #1 + 2347 003c 023A subs r2, r2, #2 + 2348 003e F254 strb r2, [r6, r3] +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2349 .loc 1 1443 0 discriminator 2 + ARM GAS /tmp/ccskJbbb.s page 161 + + + 2350 0040 0023 movs r3, #0 + 2351 0042 7364 str r3, [r6, #68] +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2352 .loc 1 1446 0 discriminator 2 + 2353 0044 7462 str r4, [r6, #36] +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 2354 .loc 1 1447 0 discriminator 2 + 2355 0046 7585 strh r5, [r6, #42] +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2356 .loc 1 1448 0 discriminator 2 + 2357 0048 7363 str r3, [r6, #52] +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2358 .loc 1 1451 0 discriminator 2 + 2359 004a 3268 ldr r2, [r6] + 2360 004c 5368 ldr r3, [r2, #4] + 2361 004e 4A49 ldr r1, .L195 + 2362 0050 0B40 ands r3, r1 + 2363 0052 5360 str r3, [r2, #4] +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2364 .loc 1 1454 0 discriminator 2 + 2365 0054 0090 str r0, [sp] + 2366 0056 039B ldr r3, [sp, #12] + 2367 0058 0022 movs r2, #0 + 2368 005a 0821 movs r1, #8 + 2369 005c 3000 movs r0, r6 + 2370 .LVL183: + 2371 005e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2372 .LVL184: + 2373 0062 0028 cmp r0, #0 + 2374 0064 0CD0 beq .L184 +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2375 .loc 1 1457 0 + 2376 0066 3268 ldr r2, [r6] + 2377 0068 5168 ldr r1, [r2, #4] + 2378 006a 8023 movs r3, #128 + 2379 006c 1B02 lsls r3, r3, #8 + 2380 006e 0B43 orrs r3, r1 + 2381 0070 5360 str r3, [r2, #4] +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2382 .loc 1 1458 0 + 2383 0072 0120 movs r0, #1 + 2384 0074 79E0 b .L181 + 2385 .LVL185: + 2386 .L182: +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2387 .loc 1 1432 0 + 2388 0076 8023 movs r3, #128 + 2389 0078 9B00 lsls r3, r3, #2 + 2390 007a 7364 str r3, [r6, #68] +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2391 .loc 1 1433 0 + 2392 007c 0120 movs r0, #1 + 2393 .LVL186: + 2394 007e 74E0 b .L181 + 2395 .LVL187: + 2396 .L184: +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 162 + + + 2397 .loc 1 1462 0 + 2398 0080 3368 ldr r3, [r6] + 2399 0082 0822 movs r2, #8 + 2400 0084 DA61 str r2, [r3, #28] +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2401 .loc 1 1465 0 + 2402 0086 8021 movs r1, #128 + 2403 0088 0097 str r7, [sp] + 2404 008a 039B ldr r3, [sp, #12] + 2405 008c 073A subs r2, r2, #7 + 2406 008e 4902 lsls r1, r1, #9 + 2407 0090 3000 movs r0, r6 + 2408 0092 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2409 .LVL188: + 2410 0096 0028 cmp r0, #0 + 2411 0098 12D0 beq .L185 +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2412 .loc 1 1468 0 + 2413 009a 3268 ldr r2, [r6] + 2414 009c 5168 ldr r1, [r2, #4] + 2415 009e 8023 movs r3, #128 + 2416 00a0 1B02 lsls r3, r3, #8 + 2417 00a2 0B43 orrs r3, r1 + 2418 00a4 5360 str r3, [r2, #4] +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2419 .loc 1 1469 0 + 2420 00a6 0120 movs r0, #1 + 2421 00a8 5FE0 b .L181 + 2422 .L186: +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2423 .loc 1 1496 0 + 2424 00aa 3368 ldr r3, [r6] + 2425 00ac 5B6A ldr r3, [r3, #36] + 2426 00ae 726A ldr r2, [r6, #36] + 2427 00b0 1370 strb r3, [r2] +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2428 .loc 1 1499 0 + 2429 00b2 736A ldr r3, [r6, #36] + 2430 00b4 0133 adds r3, r3, #1 + 2431 00b6 7362 str r3, [r6, #36] +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2432 .loc 1 1501 0 + 2433 00b8 738D ldrh r3, [r6, #42] + 2434 00ba 013B subs r3, r3, #1 + 2435 00bc 9BB2 uxth r3, r3 + 2436 00be 7385 strh r3, [r6, #42] + 2437 .L185: +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2438 .loc 1 1472 0 + 2439 00c0 738D ldrh r3, [r6, #42] + 2440 00c2 9BB2 uxth r3, r3 + 2441 00c4 002B cmp r3, #0 + 2442 00c6 1CD0 beq .L193 +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2443 .loc 1 1475 0 + 2444 00c8 3A00 movs r2, r7 + 2445 00ca 0399 ldr r1, [sp, #12] + ARM GAS /tmp/ccskJbbb.s page 163 + + + 2446 00cc 3000 movs r0, r6 + 2447 00ce FFF7FEFF bl I2C_WaitOnRXNEFlagUntilTimeout + 2448 .LVL189: + 2449 00d2 0028 cmp r0, #0 + 2450 00d4 E9D0 beq .L186 +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2451 .loc 1 1478 0 + 2452 00d6 3268 ldr r2, [r6] + 2453 00d8 5168 ldr r1, [r2, #4] + 2454 00da 8023 movs r3, #128 + 2455 00dc 1B02 lsls r3, r3, #8 + 2456 00de 0B43 orrs r3, r1 + 2457 00e0 5360 str r3, [r2, #4] +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2458 .loc 1 1481 0 + 2459 00e2 3368 ldr r3, [r6] + 2460 00e4 9A69 ldr r2, [r3, #24] + 2461 00e6 5207 lsls r2, r2, #29 + 2462 00e8 43D5 bpl .L192 +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2463 .loc 1 1484 0 + 2464 00ea 5B6A ldr r3, [r3, #36] + 2465 00ec 726A ldr r2, [r6, #36] + 2466 00ee 1370 strb r3, [r2] +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2467 .loc 1 1487 0 + 2468 00f0 736A ldr r3, [r6, #36] + 2469 00f2 0133 adds r3, r3, #1 + 2470 00f4 7362 str r3, [r6, #36] +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2471 .loc 1 1489 0 + 2472 00f6 738D ldrh r3, [r6, #42] + 2473 00f8 013B subs r3, r3, #1 + 2474 00fa 9BB2 uxth r3, r3 + 2475 00fc 7385 strh r3, [r6, #42] +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2476 .loc 1 1492 0 + 2477 00fe 0120 movs r0, #1 + 2478 0100 33E0 b .L181 + 2479 .L193: +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2480 .loc 1 1505 0 + 2481 0102 3A00 movs r2, r7 + 2482 0104 0399 ldr r1, [sp, #12] + 2483 0106 3000 movs r0, r6 + 2484 0108 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 2485 .LVL190: + 2486 010c 0028 cmp r0, #0 + 2487 010e 07D0 beq .L188 +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2488 .loc 1 1508 0 + 2489 0110 3268 ldr r2, [r6] + 2490 0112 5168 ldr r1, [r2, #4] + 2491 0114 8023 movs r3, #128 + 2492 0116 1B02 lsls r3, r3, #8 + 2493 0118 0B43 orrs r3, r1 + 2494 011a 5360 str r3, [r2, #4] + ARM GAS /tmp/ccskJbbb.s page 164 + + +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2495 .loc 1 1509 0 + 2496 011c 0120 movs r0, #1 + 2497 011e 24E0 b .L181 + 2498 .L188: +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2499 .loc 1 1513 0 + 2500 0120 3368 ldr r3, [r6] + 2501 0122 2022 movs r2, #32 + 2502 0124 DA61 str r2, [r3, #28] +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2503 .loc 1 1516 0 + 2504 0126 8021 movs r1, #128 + 2505 0128 0097 str r7, [sp] + 2506 012a 039B ldr r3, [sp, #12] + 2507 012c 1F3A subs r2, r2, #31 + 2508 012e 0902 lsls r1, r1, #8 + 2509 0130 3000 movs r0, r6 + 2510 0132 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 2511 .LVL191: + 2512 0136 0028 cmp r0, #0 + 2513 0138 0ED1 bne .L194 +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2514 .loc 1 1524 0 + 2515 013a 3268 ldr r2, [r6] + 2516 013c 5168 ldr r1, [r2, #4] + 2517 013e 8023 movs r3, #128 + 2518 0140 1B02 lsls r3, r3, #8 + 2519 0142 0B43 orrs r3, r1 + 2520 0144 5360 str r3, [r2, #4] +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 2521 .loc 1 1526 0 + 2522 0146 4123 movs r3, #65 + 2523 0148 2022 movs r2, #32 + 2524 014a F254 strb r2, [r6, r3] +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2525 .loc 1 1527 0 + 2526 014c 0023 movs r3, #0 + 2527 014e 2232 adds r2, r2, #34 + 2528 0150 B354 strb r3, [r6, r2] +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2529 .loc 1 1530 0 + 2530 0152 023A subs r2, r2, #2 + 2531 0154 B354 strb r3, [r6, r2] +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2532 .loc 1 1532 0 + 2533 0156 08E0 b .L181 + 2534 .L194: +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 2535 .loc 1 1519 0 + 2536 0158 3268 ldr r2, [r6] + 2537 015a 5168 ldr r1, [r2, #4] + 2538 015c 8023 movs r3, #128 + 2539 015e 1B02 lsls r3, r3, #8 + 2540 0160 0B43 orrs r3, r1 + 2541 0162 5360 str r3, [r2, #4] +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 165 + + + 2542 .loc 1 1520 0 + 2543 0164 0120 movs r0, #1 + 2544 0166 00E0 b .L181 + 2545 .LVL192: + 2546 .L190: +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2547 .loc 1 1536 0 + 2548 0168 0220 movs r0, #2 + 2549 .LVL193: + 2550 .L181: +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2551 .loc 1 1538 0 + 2552 016a 05B0 add sp, sp, #20 + 2553 @ sp needed + 2554 .LVL194: + 2555 .LVL195: + 2556 016c F0BD pop {r4, r5, r6, r7, pc} + 2557 .LVL196: + 2558 .L191: +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2559 .loc 1 1436 0 + 2560 016e 0220 movs r0, #2 + 2561 .LVL197: + 2562 0170 FBE7 b .L181 + 2563 .LVL198: + 2564 .L192: +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2565 .loc 1 1492 0 + 2566 0172 0120 movs r0, #1 + 2567 0174 F9E7 b .L181 + 2568 .L196: + 2569 0176 C046 .align 2 + 2570 .L195: + 2571 0178 FF7FFFFF .word -32769 + 2572 .cfi_endproc + 2573 .LFE47: + 2575 .section .text.HAL_I2C_Master_Transmit_IT,"ax",%progbits + 2576 .align 1 + 2577 .global HAL_I2C_Master_Transmit_IT + 2578 .syntax unified + 2579 .code 16 + 2580 .thumb_func + 2581 .fpu softvfp + 2583 HAL_I2C_Master_Transmit_IT: + 2584 .LFB48: +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 2585 .loc 1 1551 0 + 2586 .cfi_startproc + 2587 @ args = 0, pretend = 0, frame = 0 + 2588 @ frame_needed = 0, uses_anonymous_args = 0 + 2589 .LVL199: + 2590 0000 30B5 push {r4, r5, lr} + 2591 .LCFI21: + 2592 .cfi_def_cfa_offset 12 + 2593 .cfi_offset 4, -12 + 2594 .cfi_offset 5, -8 + 2595 .cfi_offset 14, -4 + ARM GAS /tmp/ccskJbbb.s page 166 + + + 2596 0002 83B0 sub sp, sp, #12 + 2597 .LCFI22: + 2598 .cfi_def_cfa_offset 24 + 2599 0004 0400 movs r4, r0 +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2600 .loc 1 1554 0 + 2601 0006 4120 movs r0, #65 + 2602 .LVL200: + 2603 0008 205C ldrb r0, [r4, r0] + 2604 000a 2028 cmp r0, #32 + 2605 000c 35D1 bne .L201 +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2606 .loc 1 1556 0 + 2607 000e 2068 ldr r0, [r4] + 2608 0010 8069 ldr r0, [r0, #24] + 2609 0012 0004 lsls r0, r0, #16 + 2610 0014 34D4 bmi .L202 +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2611 .loc 1 1562 0 + 2612 0016 4020 movs r0, #64 + 2613 0018 205C ldrb r0, [r4, r0] + 2614 001a 0128 cmp r0, #1 + 2615 001c 32D0 beq .L203 +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2616 .loc 1 1562 0 is_stmt 0 discriminator 2 + 2617 001e 4020 movs r0, #64 + 2618 0020 0125 movs r5, #1 + 2619 0022 2554 strb r5, [r4, r0] +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2620 .loc 1 1564 0 is_stmt 1 discriminator 2 + 2621 0024 0130 adds r0, r0, #1 + 2622 0026 2035 adds r5, r5, #32 + 2623 0028 2554 strb r5, [r4, r0] +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2624 .loc 1 1565 0 discriminator 2 + 2625 002a 0130 adds r0, r0, #1 + 2626 002c 113D subs r5, r5, #17 + 2627 002e 2554 strb r5, [r4, r0] +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2628 .loc 1 1566 0 discriminator 2 + 2629 0030 0020 movs r0, #0 + 2630 0032 6064 str r0, [r4, #68] +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2631 .loc 1 1569 0 discriminator 2 + 2632 0034 6262 str r2, [r4, #36] +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 2633 .loc 1 1570 0 discriminator 2 + 2634 0036 6385 strh r3, [r4, #42] +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 2635 .loc 1 1571 0 discriminator 2 + 2636 0038 134B ldr r3, .L204 + 2637 .LVL201: + 2638 003a E362 str r3, [r4, #44] + 2639 .LVL202: +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2640 .loc 1 1572 0 discriminator 2 + 2641 003c 134B ldr r3, .L204+4 + ARM GAS /tmp/ccskJbbb.s page 167 + + + 2642 003e 6363 str r3, [r4, #52] +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2643 .loc 1 1574 0 discriminator 2 + 2644 0040 638D ldrh r3, [r4, #42] + 2645 0042 9BB2 uxth r3, r3 + 2646 0044 FF2B cmp r3, #255 + 2647 0046 13D9 bls .L199 +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 2648 .loc 1 1576 0 + 2649 0048 FF23 movs r3, #255 + 2650 004a 2385 strh r3, [r4, #40] + 2651 .LVL203: +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2652 .loc 1 1577 0 + 2653 004c 8023 movs r3, #128 + 2654 004e 5B04 lsls r3, r3, #17 + 2655 .LVL204: + 2656 .L200: +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2657 .loc 1 1587 0 + 2658 0050 228D ldrh r2, [r4, #40] + 2659 .LVL205: + 2660 0052 D2B2 uxtb r2, r2 + 2661 0054 0E48 ldr r0, .L204+8 + 2662 0056 0090 str r0, [sp] + 2663 .LVL206: + 2664 0058 2000 movs r0, r4 + 2665 005a FFF7FEFF bl I2C_TransferConfig + 2666 .LVL207: +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2667 .loc 1 1590 0 + 2668 005e 4023 movs r3, #64 + 2669 0060 0022 movs r2, #0 + 2670 0062 E254 strb r2, [r4, r3] +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2671 .loc 1 1599 0 + 2672 0064 0121 movs r1, #1 + 2673 0066 2000 movs r0, r4 + 2674 0068 FFF7FEFF bl I2C_Enable_IRQ + 2675 .LVL208: +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2676 .loc 1 1601 0 + 2677 006c 0020 movs r0, #0 + 2678 006e 05E0 b .L198 + 2679 .LVL209: + 2680 .L199: +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 2681 .loc 1 1581 0 + 2682 0070 638D ldrh r3, [r4, #42] + 2683 0072 2385 strh r3, [r4, #40] + 2684 .LVL210: +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2685 .loc 1 1582 0 + 2686 0074 8023 movs r3, #128 + 2687 0076 9B04 lsls r3, r3, #18 + 2688 0078 EAE7 b .L200 + 2689 .LVL211: + ARM GAS /tmp/ccskJbbb.s page 168 + + + 2690 .L201: +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2691 .loc 1 1605 0 + 2692 007a 0220 movs r0, #2 + 2693 .LVL212: + 2694 .L198: +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2695 .loc 1 1607 0 + 2696 007c 03B0 add sp, sp, #12 + 2697 @ sp needed + 2698 .LVL213: + 2699 007e 30BD pop {r4, r5, pc} + 2700 .LVL214: + 2701 .L202: +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2702 .loc 1 1558 0 + 2703 0080 0220 movs r0, #2 + 2704 0082 FBE7 b .L198 + 2705 .L203: +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2706 .loc 1 1562 0 + 2707 0084 0220 movs r0, #2 + 2708 0086 F9E7 b .L198 + 2709 .L205: + 2710 .align 2 + 2711 .L204: + 2712 0088 0000FFFF .word -65536 + 2713 008c 00000000 .word I2C_Master_ISR_IT + 2714 0090 00200080 .word -2147475456 + 2715 .cfi_endproc + 2716 .LFE48: + 2718 .section .text.HAL_I2C_Master_Receive_IT,"ax",%progbits + 2719 .align 1 + 2720 .global HAL_I2C_Master_Receive_IT + 2721 .syntax unified + 2722 .code 16 + 2723 .thumb_func + 2724 .fpu softvfp + 2726 HAL_I2C_Master_Receive_IT: + 2727 .LFB49: +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 2728 .loc 1 1620 0 + 2729 .cfi_startproc + 2730 @ args = 0, pretend = 0, frame = 0 + 2731 @ frame_needed = 0, uses_anonymous_args = 0 + 2732 .LVL215: + 2733 0000 30B5 push {r4, r5, lr} + 2734 .LCFI23: + 2735 .cfi_def_cfa_offset 12 + 2736 .cfi_offset 4, -12 + 2737 .cfi_offset 5, -8 + 2738 .cfi_offset 14, -4 + 2739 0002 83B0 sub sp, sp, #12 + 2740 .LCFI24: + 2741 .cfi_def_cfa_offset 24 + 2742 0004 0400 movs r4, r0 +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 169 + + + 2743 .loc 1 1623 0 + 2744 0006 4120 movs r0, #65 + 2745 .LVL216: + 2746 0008 205C ldrb r0, [r4, r0] + 2747 000a 2028 cmp r0, #32 + 2748 000c 35D1 bne .L210 +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2749 .loc 1 1625 0 + 2750 000e 2068 ldr r0, [r4] + 2751 0010 8069 ldr r0, [r0, #24] + 2752 0012 0004 lsls r0, r0, #16 + 2753 0014 34D4 bmi .L211 +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2754 .loc 1 1631 0 + 2755 0016 4020 movs r0, #64 + 2756 0018 205C ldrb r0, [r4, r0] + 2757 001a 0128 cmp r0, #1 + 2758 001c 32D0 beq .L212 +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2759 .loc 1 1631 0 is_stmt 0 discriminator 2 + 2760 001e 4020 movs r0, #64 + 2761 0020 0125 movs r5, #1 + 2762 0022 2554 strb r5, [r4, r0] +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 2763 .loc 1 1633 0 is_stmt 1 discriminator 2 + 2764 0024 0130 adds r0, r0, #1 + 2765 0026 2135 adds r5, r5, #33 + 2766 0028 2554 strb r5, [r4, r0] +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2767 .loc 1 1634 0 discriminator 2 + 2768 002a 0130 adds r0, r0, #1 + 2769 002c 123D subs r5, r5, #18 + 2770 002e 2554 strb r5, [r4, r0] +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2771 .loc 1 1635 0 discriminator 2 + 2772 0030 0020 movs r0, #0 + 2773 0032 6064 str r0, [r4, #68] +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2774 .loc 1 1638 0 discriminator 2 + 2775 0034 6262 str r2, [r4, #36] +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 2776 .loc 1 1639 0 discriminator 2 + 2777 0036 6385 strh r3, [r4, #42] +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 2778 .loc 1 1640 0 discriminator 2 + 2779 0038 134B ldr r3, .L213 + 2780 .LVL217: + 2781 003a E362 str r3, [r4, #44] + 2782 .LVL218: +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2783 .loc 1 1641 0 discriminator 2 + 2784 003c 134B ldr r3, .L213+4 + 2785 003e 6363 str r3, [r4, #52] +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2786 .loc 1 1643 0 discriminator 2 + 2787 0040 638D ldrh r3, [r4, #42] + 2788 0042 9BB2 uxth r3, r3 + ARM GAS /tmp/ccskJbbb.s page 170 + + + 2789 0044 FF2B cmp r3, #255 + 2790 0046 13D9 bls .L208 +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 2791 .loc 1 1645 0 + 2792 0048 FF23 movs r3, #255 + 2793 004a 2385 strh r3, [r4, #40] + 2794 .LVL219: +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2795 .loc 1 1646 0 + 2796 004c 8023 movs r3, #128 + 2797 004e 5B04 lsls r3, r3, #17 + 2798 .LVL220: + 2799 .L209: +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2800 .loc 1 1656 0 + 2801 0050 228D ldrh r2, [r4, #40] + 2802 .LVL221: + 2803 0052 D2B2 uxtb r2, r2 + 2804 0054 0E48 ldr r0, .L213+8 + 2805 0056 0090 str r0, [sp] + 2806 .LVL222: + 2807 0058 2000 movs r0, r4 + 2808 005a FFF7FEFF bl I2C_TransferConfig + 2809 .LVL223: +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2810 .loc 1 1659 0 + 2811 005e 4023 movs r3, #64 + 2812 0060 0022 movs r2, #0 + 2813 0062 E254 strb r2, [r4, r3] +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2814 .loc 1 1668 0 + 2815 0064 0221 movs r1, #2 + 2816 0066 2000 movs r0, r4 + 2817 0068 FFF7FEFF bl I2C_Enable_IRQ + 2818 .LVL224: +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2819 .loc 1 1670 0 + 2820 006c 0020 movs r0, #0 + 2821 006e 05E0 b .L207 + 2822 .LVL225: + 2823 .L208: +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 2824 .loc 1 1650 0 + 2825 0070 638D ldrh r3, [r4, #42] + 2826 0072 2385 strh r3, [r4, #40] + 2827 .LVL226: +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2828 .loc 1 1651 0 + 2829 0074 8023 movs r3, #128 + 2830 0076 9B04 lsls r3, r3, #18 + 2831 0078 EAE7 b .L209 + 2832 .LVL227: + 2833 .L210: +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2834 .loc 1 1674 0 + 2835 007a 0220 movs r0, #2 + 2836 .LVL228: + ARM GAS /tmp/ccskJbbb.s page 171 + + + 2837 .L207: +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2838 .loc 1 1676 0 + 2839 007c 03B0 add sp, sp, #12 + 2840 @ sp needed + 2841 .LVL229: + 2842 007e 30BD pop {r4, r5, pc} + 2843 .LVL230: + 2844 .L211: +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2845 .loc 1 1627 0 + 2846 0080 0220 movs r0, #2 + 2847 0082 FBE7 b .L207 + 2848 .L212: +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2849 .loc 1 1631 0 + 2850 0084 0220 movs r0, #2 + 2851 0086 F9E7 b .L207 + 2852 .L214: + 2853 .align 2 + 2854 .L213: + 2855 0088 0000FFFF .word -65536 + 2856 008c 00000000 .word I2C_Master_ISR_IT + 2857 0090 00240080 .word -2147474432 + 2858 .cfi_endproc + 2859 .LFE49: + 2861 .section .text.HAL_I2C_Slave_Transmit_IT,"ax",%progbits + 2862 .align 1 + 2863 .global HAL_I2C_Slave_Transmit_IT + 2864 .syntax unified + 2865 .code 16 + 2866 .thumb_func + 2867 .fpu softvfp + 2869 HAL_I2C_Slave_Transmit_IT: + 2870 .LFB50: +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 2871 .loc 1 1687 0 + 2872 .cfi_startproc + 2873 @ args = 0, pretend = 0, frame = 0 + 2874 @ frame_needed = 0, uses_anonymous_args = 0 + 2875 .LVL231: + 2876 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 2877 .LCFI25: + 2878 .cfi_def_cfa_offset 24 + 2879 .cfi_offset 3, -24 + 2880 .cfi_offset 4, -20 + 2881 .cfi_offset 5, -16 + 2882 .cfi_offset 6, -12 + 2883 .cfi_offset 7, -8 + 2884 .cfi_offset 14, -4 +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2885 .loc 1 1688 0 + 2886 0002 4123 movs r3, #65 + 2887 0004 C35C ldrb r3, [r0, r3] + 2888 0006 202B cmp r3, #32 + 2889 0008 21D1 bne .L217 +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 172 + + + 2890 .loc 1 1691 0 + 2891 000a 2033 adds r3, r3, #32 + 2892 000c C35C ldrb r3, [r0, r3] + 2893 000e 012B cmp r3, #1 + 2894 0010 1FD0 beq .L218 +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2895 .loc 1 1691 0 is_stmt 0 discriminator 2 + 2896 0012 4024 movs r4, #64 + 2897 0014 0123 movs r3, #1 + 2898 0016 0355 strb r3, [r0, r4] +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 2899 .loc 1 1693 0 is_stmt 1 discriminator 2 + 2900 0018 4033 adds r3, r3, #64 + 2901 001a 2125 movs r5, #33 + 2902 001c C554 strb r5, [r0, r3] +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 2903 .loc 1 1694 0 discriminator 2 + 2904 001e 0133 adds r3, r3, #1 + 2905 0020 013D subs r5, r5, #1 + 2906 0022 C554 strb r5, [r0, r3] +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2907 .loc 1 1695 0 discriminator 2 + 2908 0024 0025 movs r5, #0 + 2909 0026 4564 str r5, [r0, #68] +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2910 .loc 1 1698 0 discriminator 2 + 2911 0028 0668 ldr r6, [r0] + 2912 002a 7368 ldr r3, [r6, #4] + 2913 002c 0A4F ldr r7, .L219 + 2914 002e 3B40 ands r3, r7 + 2915 0030 7360 str r3, [r6, #4] +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 2916 .loc 1 1701 0 discriminator 2 + 2917 0032 4162 str r1, [r0, #36] +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 2918 .loc 1 1702 0 discriminator 2 + 2919 0034 4285 strh r2, [r0, #42] +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 2920 .loc 1 1703 0 discriminator 2 + 2921 0036 438D ldrh r3, [r0, #42] + 2922 0038 0385 strh r3, [r0, #40] +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 2923 .loc 1 1704 0 discriminator 2 + 2924 003a 084B ldr r3, .L219+4 + 2925 003c C362 str r3, [r0, #44] +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2926 .loc 1 1705 0 discriminator 2 + 2927 003e 084B ldr r3, .L219+8 + 2928 0040 4363 str r3, [r0, #52] +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2929 .loc 1 1708 0 discriminator 2 + 2930 0042 0555 strb r5, [r0, r4] +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2931 .loc 1 1717 0 discriminator 2 + 2932 0044 0521 movs r1, #5 + 2933 .LVL232: + 2934 0046 FFF7FEFF bl I2C_Enable_IRQ + ARM GAS /tmp/ccskJbbb.s page 173 + + + 2935 .LVL233: +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2936 .loc 1 1719 0 discriminator 2 + 2937 004a 0020 movs r0, #0 + 2938 004c 00E0 b .L216 + 2939 .LVL234: + 2940 .L217: +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 2941 .loc 1 1723 0 + 2942 004e 0220 movs r0, #2 + 2943 .LVL235: + 2944 .L216: +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2945 .loc 1 1725 0 + 2946 @ sp needed + 2947 0050 F8BD pop {r3, r4, r5, r6, r7, pc} + 2948 .LVL236: + 2949 .L218: +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2950 .loc 1 1691 0 + 2951 0052 0220 movs r0, #2 + 2952 .LVL237: + 2953 0054 FCE7 b .L216 + 2954 .L220: + 2955 0056 C046 .align 2 + 2956 .L219: + 2957 0058 FF7FFFFF .word -32769 + 2958 005c 0000FFFF .word -65536 + 2959 0060 00000000 .word I2C_Slave_ISR_IT + 2960 .cfi_endproc + 2961 .LFE50: + 2963 .section .text.HAL_I2C_Slave_Receive_IT,"ax",%progbits + 2964 .align 1 + 2965 .global HAL_I2C_Slave_Receive_IT + 2966 .syntax unified + 2967 .code 16 + 2968 .thumb_func + 2969 .fpu softvfp + 2971 HAL_I2C_Slave_Receive_IT: + 2972 .LFB51: +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 2973 .loc 1 1736 0 + 2974 .cfi_startproc + 2975 @ args = 0, pretend = 0, frame = 0 + 2976 @ frame_needed = 0, uses_anonymous_args = 0 + 2977 .LVL238: + 2978 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 2979 .LCFI26: + 2980 .cfi_def_cfa_offset 24 + 2981 .cfi_offset 3, -24 + 2982 .cfi_offset 4, -20 + 2983 .cfi_offset 5, -16 + 2984 .cfi_offset 6, -12 + 2985 .cfi_offset 7, -8 + 2986 .cfi_offset 14, -4 +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 2987 .loc 1 1737 0 + ARM GAS /tmp/ccskJbbb.s page 174 + + + 2988 0002 4123 movs r3, #65 + 2989 0004 C35C ldrb r3, [r0, r3] + 2990 0006 202B cmp r3, #32 + 2991 0008 21D1 bne .L223 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2992 .loc 1 1740 0 + 2993 000a 2033 adds r3, r3, #32 + 2994 000c C35C ldrb r3, [r0, r3] + 2995 000e 012B cmp r3, #1 + 2996 0010 1FD0 beq .L224 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 2997 .loc 1 1740 0 is_stmt 0 discriminator 2 + 2998 0012 4024 movs r4, #64 + 2999 0014 0123 movs r3, #1 + 3000 0016 0355 strb r3, [r0, r4] +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3001 .loc 1 1742 0 is_stmt 1 discriminator 2 + 3002 0018 4033 adds r3, r3, #64 + 3003 001a 2225 movs r5, #34 + 3004 001c C554 strb r5, [r0, r3] +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3005 .loc 1 1743 0 discriminator 2 + 3006 001e 0133 adds r3, r3, #1 + 3007 0020 023D subs r5, r5, #2 + 3008 0022 C554 strb r5, [r0, r3] +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3009 .loc 1 1744 0 discriminator 2 + 3010 0024 0025 movs r5, #0 + 3011 0026 4564 str r5, [r0, #68] +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3012 .loc 1 1747 0 discriminator 2 + 3013 0028 0668 ldr r6, [r0] + 3014 002a 7368 ldr r3, [r6, #4] + 3015 002c 0A4F ldr r7, .L225 + 3016 002e 3B40 ands r3, r7 + 3017 0030 7360 str r3, [r6, #4] +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3018 .loc 1 1750 0 discriminator 2 + 3019 0032 4162 str r1, [r0, #36] +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3020 .loc 1 1751 0 discriminator 2 + 3021 0034 4285 strh r2, [r0, #42] +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3022 .loc 1 1752 0 discriminator 2 + 3023 0036 438D ldrh r3, [r0, #42] + 3024 0038 0385 strh r3, [r0, #40] +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 3025 .loc 1 1753 0 discriminator 2 + 3026 003a 084B ldr r3, .L225+4 + 3027 003c C362 str r3, [r0, #44] +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3028 .loc 1 1754 0 discriminator 2 + 3029 003e 084B ldr r3, .L225+8 + 3030 0040 4363 str r3, [r0, #52] +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3031 .loc 1 1757 0 discriminator 2 + 3032 0042 0555 strb r5, [r0, r4] + ARM GAS /tmp/ccskJbbb.s page 175 + + +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3033 .loc 1 1766 0 discriminator 2 + 3034 0044 0621 movs r1, #6 + 3035 .LVL239: + 3036 0046 FFF7FEFF bl I2C_Enable_IRQ + 3037 .LVL240: +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3038 .loc 1 1768 0 discriminator 2 + 3039 004a 0020 movs r0, #0 + 3040 004c 00E0 b .L222 + 3041 .LVL241: + 3042 .L223: +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3043 .loc 1 1772 0 + 3044 004e 0220 movs r0, #2 + 3045 .LVL242: + 3046 .L222: +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3047 .loc 1 1774 0 + 3048 @ sp needed + 3049 0050 F8BD pop {r3, r4, r5, r6, r7, pc} + 3050 .LVL243: + 3051 .L224: +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3052 .loc 1 1740 0 + 3053 0052 0220 movs r0, #2 + 3054 .LVL244: + 3055 0054 FCE7 b .L222 + 3056 .L226: + 3057 0056 C046 .align 2 + 3058 .L225: + 3059 0058 FF7FFFFF .word -32769 + 3060 005c 0000FFFF .word -65536 + 3061 0060 00000000 .word I2C_Slave_ISR_IT + 3062 .cfi_endproc + 3063 .LFE51: + 3065 .section .text.HAL_I2C_Master_Transmit_DMA,"ax",%progbits + 3066 .align 1 + 3067 .global HAL_I2C_Master_Transmit_DMA + 3068 .syntax unified + 3069 .code 16 + 3070 .thumb_func + 3071 .fpu softvfp + 3073 HAL_I2C_Master_Transmit_DMA: + 3074 .LFB52: +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3075 .loc 1 1787 0 + 3076 .cfi_startproc + 3077 @ args = 0, pretend = 0, frame = 0 + 3078 @ frame_needed = 0, uses_anonymous_args = 0 + 3079 .LVL245: + 3080 0000 F0B5 push {r4, r5, r6, r7, lr} + 3081 .LCFI27: + 3082 .cfi_def_cfa_offset 20 + 3083 .cfi_offset 4, -20 + 3084 .cfi_offset 5, -16 + 3085 .cfi_offset 6, -12 + ARM GAS /tmp/ccskJbbb.s page 176 + + + 3086 .cfi_offset 7, -8 + 3087 .cfi_offset 14, -4 + 3088 0002 83B0 sub sp, sp, #12 + 3089 .LCFI28: + 3090 .cfi_def_cfa_offset 32 + 3091 0004 0400 movs r4, r0 + 3092 0006 0E00 movs r6, r1 + 3093 0008 1100 movs r1, r2 + 3094 .LVL246: +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3095 .loc 1 1791 0 + 3096 000a 4122 movs r2, #65 + 3097 .LVL247: + 3098 000c 825C ldrb r2, [r0, r2] + 3099 000e 202A cmp r2, #32 + 3100 0010 00D0 beq .LCB3093 + 3101 0012 8BE0 b .L235 @long jump + 3102 .LCB3093: +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3103 .loc 1 1793 0 + 3104 0014 0268 ldr r2, [r0] + 3105 0016 9269 ldr r2, [r2, #24] + 3106 0018 1204 lsls r2, r2, #16 + 3107 001a 00D5 bpl .LCB3099 + 3108 001c 8AE0 b .L236 @long jump + 3109 .LCB3099: +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3110 .loc 1 1799 0 + 3111 001e 4022 movs r2, #64 + 3112 0020 825C ldrb r2, [r0, r2] + 3113 0022 012A cmp r2, #1 + 3114 0024 00D1 bne .LCB3103 + 3115 0026 87E0 b .L237 @long jump + 3116 .LCB3103: +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3117 .loc 1 1799 0 is_stmt 0 discriminator 2 + 3118 0028 4022 movs r2, #64 + 3119 002a 0120 movs r0, #1 + 3120 .LVL248: + 3121 002c A054 strb r0, [r4, r2] +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3122 .loc 1 1801 0 is_stmt 1 discriminator 2 + 3123 002e 0132 adds r2, r2, #1 + 3124 0030 2030 adds r0, r0, #32 + 3125 0032 A054 strb r0, [r4, r2] +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3126 .loc 1 1802 0 discriminator 2 + 3127 0034 0132 adds r2, r2, #1 + 3128 0036 1138 subs r0, r0, #17 + 3129 0038 A054 strb r0, [r4, r2] +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3130 .loc 1 1803 0 discriminator 2 + 3131 003a 0022 movs r2, #0 + 3132 003c 6264 str r2, [r4, #68] +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3133 .loc 1 1806 0 discriminator 2 + 3134 003e 6162 str r1, [r4, #36] + ARM GAS /tmp/ccskJbbb.s page 177 + + +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3135 .loc 1 1807 0 discriminator 2 + 3136 0040 6385 strh r3, [r4, #42] +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 3137 .loc 1 1808 0 discriminator 2 + 3138 0042 3E4B ldr r3, .L240 + 3139 .LVL249: + 3140 0044 E362 str r3, [r4, #44] + 3141 .LVL250: +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3142 .loc 1 1809 0 discriminator 2 + 3143 0046 3E4B ldr r3, .L240+4 + 3144 0048 6363 str r3, [r4, #52] +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3145 .loc 1 1811 0 discriminator 2 + 3146 004a 638D ldrh r3, [r4, #42] + 3147 004c 9BB2 uxth r3, r3 + 3148 004e FF2B cmp r3, #255 + 3149 0050 29D9 bls .L229 +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3150 .loc 1 1813 0 + 3151 0052 FF23 movs r3, #255 + 3152 0054 2385 strh r3, [r4, #40] + 3153 .LVL251: +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3154 .loc 1 1814 0 + 3155 0056 8027 movs r7, #128 + 3156 0058 7F04 lsls r7, r7, #17 + 3157 .LVL252: + 3158 .L230: +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3159 .loc 1 1822 0 + 3160 005a 228D ldrh r2, [r4, #40] + 3161 005c 002A cmp r2, #0 + 3162 005e 51D0 beq .L231 +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3163 .loc 1 1824 0 + 3164 0060 A36B ldr r3, [r4, #56] + 3165 0062 002B cmp r3, #0 + 3166 0064 24D0 beq .L232 +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3167 .loc 1 1827 0 + 3168 0066 374A ldr r2, .L240+8 + 3169 0068 9A62 str r2, [r3, #40] +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3170 .loc 1 1830 0 + 3171 006a A36B ldr r3, [r4, #56] + 3172 006c 364A ldr r2, .L240+12 + 3173 006e 1A63 str r2, [r3, #48] +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 3174 .loc 1 1833 0 + 3175 0070 A26B ldr r2, [r4, #56] + 3176 0072 0023 movs r3, #0 + 3177 0074 D362 str r3, [r2, #44] +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3178 .loc 1 1834 0 + 3179 0076 A26B ldr r2, [r4, #56] + ARM GAS /tmp/ccskJbbb.s page 178 + + + 3180 0078 5363 str r3, [r2, #52] +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3181 .loc 1 1837 0 + 3182 007a 2268 ldr r2, [r4] + 3183 007c 2832 adds r2, r2, #40 + 3184 007e 238D ldrh r3, [r4, #40] + 3185 0080 A06B ldr r0, [r4, #56] + 3186 0082 FFF7FEFF bl HAL_DMA_Start_IT + 3187 .LVL253: + 3188 0086 051E subs r5, r0, #0 + 3189 .LVL254: +1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3190 .loc 1 1854 0 + 3191 0088 20D0 beq .L239 +1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3192 .loc 1 1878 0 + 3193 008a 4123 movs r3, #65 + 3194 008c 2022 movs r2, #32 + 3195 008e E254 strb r2, [r4, r3] +1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3196 .loc 1 1879 0 + 3197 0090 0022 movs r2, #0 + 3198 0092 0133 adds r3, r3, #1 + 3199 0094 E254 strb r2, [r4, r3] +1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3200 .loc 1 1882 0 + 3201 0096 636C ldr r3, [r4, #68] + 3202 0098 1021 movs r1, #16 + 3203 009a 0B43 orrs r3, r1 + 3204 009c 6364 str r3, [r4, #68] +1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3205 .loc 1 1885 0 + 3206 009e 4023 movs r3, #64 + 3207 00a0 E254 strb r2, [r4, r3] +1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3208 .loc 1 1887 0 + 3209 00a2 0125 movs r5, #1 + 3210 00a4 43E0 b .L228 + 3211 .LVL255: + 3212 .L229: +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3213 .loc 1 1818 0 + 3214 00a6 638D ldrh r3, [r4, #42] + 3215 00a8 2385 strh r3, [r4, #40] + 3216 .LVL256: +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3217 .loc 1 1819 0 + 3218 00aa 8027 movs r7, #128 + 3219 00ac BF04 lsls r7, r7, #18 + 3220 00ae D4E7 b .L230 + 3221 .LVL257: + 3222 .L232: +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3223 .loc 1 1842 0 + 3224 00b0 4123 movs r3, #65 + 3225 00b2 2022 movs r2, #32 + 3226 00b4 E254 strb r2, [r4, r3] + ARM GAS /tmp/ccskJbbb.s page 179 + + +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3227 .loc 1 1843 0 + 3228 00b6 0022 movs r2, #0 + 3229 00b8 0133 adds r3, r3, #1 + 3230 00ba E254 strb r2, [r4, r3] +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3231 .loc 1 1846 0 + 3232 00bc 636C ldr r3, [r4, #68] + 3233 00be 8021 movs r1, #128 + 3234 .LVL258: + 3235 00c0 0B43 orrs r3, r1 + 3236 00c2 6364 str r3, [r4, #68] +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3237 .loc 1 1849 0 + 3238 00c4 4023 movs r3, #64 + 3239 00c6 E254 strb r2, [r4, r3] +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3240 .loc 1 1851 0 + 3241 00c8 0125 movs r5, #1 + 3242 00ca 30E0 b .L228 + 3243 .LVL259: + 3244 .L239: +1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3245 .loc 1 1858 0 + 3246 00cc 228D ldrh r2, [r4, #40] + 3247 00ce D2B2 uxtb r2, r2 + 3248 00d0 1E4B ldr r3, .L240+16 + 3249 00d2 0093 str r3, [sp] + 3250 00d4 3B00 movs r3, r7 + 3251 00d6 3100 movs r1, r6 + 3252 00d8 2000 movs r0, r4 + 3253 .LVL260: + 3254 00da FFF7FEFF bl I2C_TransferConfig + 3255 .LVL261: +1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3256 .loc 1 1861 0 + 3257 00de 638D ldrh r3, [r4, #42] + 3258 00e0 228D ldrh r2, [r4, #40] + 3259 00e2 9B1A subs r3, r3, r2 + 3260 00e4 9BB2 uxth r3, r3 + 3261 00e6 6385 strh r3, [r4, #42] +1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3262 .loc 1 1864 0 + 3263 00e8 4023 movs r3, #64 + 3264 00ea 0022 movs r2, #0 + 3265 00ec E254 strb r2, [r4, r3] +1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3266 .loc 1 1870 0 + 3267 00ee 1121 movs r1, #17 + 3268 00f0 2000 movs r0, r4 + 3269 00f2 FFF7FEFF bl I2C_Enable_IRQ + 3270 .LVL262: +1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3271 .loc 1 1873 0 + 3272 00f6 2268 ldr r2, [r4] + 3273 00f8 1168 ldr r1, [r2] + 3274 00fa 8023 movs r3, #128 + ARM GAS /tmp/ccskJbbb.s page 180 + + + 3275 00fc DB01 lsls r3, r3, #7 + 3276 00fe 0B43 orrs r3, r1 + 3277 0100 1360 str r3, [r2] + 3278 0102 14E0 b .L228 + 3279 .LVL263: + 3280 .L231: +1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3281 .loc 1 1893 0 + 3282 0104 124B ldr r3, .L240+20 + 3283 0106 6363 str r3, [r4, #52] +1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3284 .loc 1 1897 0 + 3285 0108 8023 movs r3, #128 + 3286 010a D2B2 uxtb r2, r2 + 3287 010c 0F49 ldr r1, .L240+16 + 3288 .LVL264: + 3289 010e 0091 str r1, [sp] + 3290 .LVL265: + 3291 0110 9B04 lsls r3, r3, #18 + 3292 0112 3100 movs r1, r6 + 3293 0114 2000 movs r0, r4 + 3294 0116 FFF7FEFF bl I2C_TransferConfig + 3295 .LVL266: +1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3296 .loc 1 1900 0 + 3297 011a 4023 movs r3, #64 + 3298 011c 0022 movs r2, #0 + 3299 011e E254 strb r2, [r4, r3] +1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3300 .loc 1 1908 0 + 3301 0120 0121 movs r1, #1 + 3302 0122 2000 movs r0, r4 + 3303 0124 FFF7FEFF bl I2C_Enable_IRQ + 3304 .LVL267: +1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3305 .loc 1 1911 0 + 3306 0128 0025 movs r5, #0 + 3307 012a 00E0 b .L228 + 3308 .LVL268: + 3309 .L235: +1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3310 .loc 1 1915 0 + 3311 012c 0225 movs r5, #2 + 3312 .LVL269: + 3313 .L228: +1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3314 .loc 1 1917 0 + 3315 012e 2800 movs r0, r5 + 3316 0130 03B0 add sp, sp, #12 + 3317 @ sp needed + 3318 .LVL270: + 3319 0132 F0BD pop {r4, r5, r6, r7, pc} + 3320 .LVL271: + 3321 .L236: +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3322 .loc 1 1795 0 + 3323 0134 0225 movs r5, #2 + ARM GAS /tmp/ccskJbbb.s page 181 + + + 3324 0136 FAE7 b .L228 + 3325 .L237: +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3326 .loc 1 1799 0 + 3327 0138 0225 movs r5, #2 + 3328 013a F8E7 b .L228 + 3329 .L241: + 3330 .align 2 + 3331 .L240: + 3332 013c 0000FFFF .word -65536 + 3333 0140 00000000 .word I2C_Master_ISR_DMA + 3334 0144 00000000 .word I2C_DMAMasterTransmitCplt + 3335 0148 00000000 .word I2C_DMAError + 3336 014c 00200080 .word -2147475456 + 3337 0150 00000000 .word I2C_Master_ISR_IT + 3338 .cfi_endproc + 3339 .LFE52: + 3341 .section .text.HAL_I2C_Master_Receive_DMA,"ax",%progbits + 3342 .align 1 + 3343 .global HAL_I2C_Master_Receive_DMA + 3344 .syntax unified + 3345 .code 16 + 3346 .thumb_func + 3347 .fpu softvfp + 3349 HAL_I2C_Master_Receive_DMA: + 3350 .LFB53: +1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 3351 .loc 1 1930 0 + 3352 .cfi_startproc + 3353 @ args = 0, pretend = 0, frame = 0 + 3354 @ frame_needed = 0, uses_anonymous_args = 0 + 3355 .LVL272: + 3356 0000 F0B5 push {r4, r5, r6, r7, lr} + 3357 .LCFI29: + 3358 .cfi_def_cfa_offset 20 + 3359 .cfi_offset 4, -20 + 3360 .cfi_offset 5, -16 + 3361 .cfi_offset 6, -12 + 3362 .cfi_offset 7, -8 + 3363 .cfi_offset 14, -4 + 3364 0002 83B0 sub sp, sp, #12 + 3365 .LCFI30: + 3366 .cfi_def_cfa_offset 32 + 3367 0004 0400 movs r4, r0 + 3368 0006 0E00 movs r6, r1 +1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3369 .loc 1 1934 0 + 3370 0008 4121 movs r1, #65 + 3371 .LVL273: + 3372 000a 415C ldrb r1, [r0, r1] + 3373 000c 2029 cmp r1, #32 + 3374 000e 00D0 beq .LCB3355 + 3375 0010 8BE0 b .L250 @long jump + 3376 .LCB3355: +1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3377 .loc 1 1936 0 + 3378 0012 0168 ldr r1, [r0] + ARM GAS /tmp/ccskJbbb.s page 182 + + + 3379 0014 8969 ldr r1, [r1, #24] + 3380 0016 0904 lsls r1, r1, #16 + 3381 0018 00D5 bpl .LCB3361 + 3382 001a 8AE0 b .L251 @long jump + 3383 .LCB3361: +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3384 .loc 1 1942 0 + 3385 001c 4021 movs r1, #64 + 3386 001e 415C ldrb r1, [r0, r1] + 3387 0020 0129 cmp r1, #1 + 3388 0022 00D1 bne .LCB3365 + 3389 0024 87E0 b .L252 @long jump + 3390 .LCB3365: +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3391 .loc 1 1942 0 is_stmt 0 discriminator 2 + 3392 0026 4021 movs r1, #64 + 3393 0028 0120 movs r0, #1 + 3394 .LVL274: + 3395 002a 6054 strb r0, [r4, r1] +1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 3396 .loc 1 1944 0 is_stmt 1 discriminator 2 + 3397 002c 0131 adds r1, r1, #1 + 3398 002e 2130 adds r0, r0, #33 + 3399 0030 6054 strb r0, [r4, r1] +1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3400 .loc 1 1945 0 discriminator 2 + 3401 0032 0131 adds r1, r1, #1 + 3402 0034 1238 subs r0, r0, #18 + 3403 0036 6054 strb r0, [r4, r1] +1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3404 .loc 1 1946 0 discriminator 2 + 3405 0038 0021 movs r1, #0 + 3406 003a 6164 str r1, [r4, #68] +1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3407 .loc 1 1949 0 discriminator 2 + 3408 003c 6262 str r2, [r4, #36] +1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3409 .loc 1 1950 0 discriminator 2 + 3410 003e 6385 strh r3, [r4, #42] +1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 3411 .loc 1 1951 0 discriminator 2 + 3412 0040 3E4B ldr r3, .L255 + 3413 .LVL275: + 3414 0042 E362 str r3, [r4, #44] + 3415 .LVL276: +1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3416 .loc 1 1952 0 discriminator 2 + 3417 0044 3E4B ldr r3, .L255+4 + 3418 0046 6363 str r3, [r4, #52] +1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3419 .loc 1 1954 0 discriminator 2 + 3420 0048 638D ldrh r3, [r4, #42] + 3421 004a 9BB2 uxth r3, r3 + 3422 004c FF2B cmp r3, #255 + 3423 004e 29D9 bls .L244 +1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 3424 .loc 1 1956 0 + ARM GAS /tmp/ccskJbbb.s page 183 + + + 3425 0050 FF23 movs r3, #255 + 3426 0052 2385 strh r3, [r4, #40] + 3427 .LVL277: +1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3428 .loc 1 1957 0 + 3429 0054 8027 movs r7, #128 + 3430 0056 7F04 lsls r7, r7, #17 + 3431 .LVL278: + 3432 .L245: +1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3433 .loc 1 1965 0 + 3434 0058 218D ldrh r1, [r4, #40] + 3435 005a 0029 cmp r1, #0 + 3436 005c 51D0 beq .L246 +1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3437 .loc 1 1967 0 + 3438 005e E36B ldr r3, [r4, #60] + 3439 0060 002B cmp r3, #0 + 3440 0062 24D0 beq .L247 +1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3441 .loc 1 1970 0 + 3442 0064 3749 ldr r1, .L255+8 + 3443 0066 9962 str r1, [r3, #40] +1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3444 .loc 1 1973 0 + 3445 0068 E36B ldr r3, [r4, #60] + 3446 006a 3749 ldr r1, .L255+12 + 3447 006c 1963 str r1, [r3, #48] +1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 3448 .loc 1 1976 0 + 3449 006e E16B ldr r1, [r4, #60] + 3450 0070 0023 movs r3, #0 + 3451 0072 CB62 str r3, [r1, #44] +1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3452 .loc 1 1977 0 + 3453 0074 E16B ldr r1, [r4, #60] + 3454 0076 4B63 str r3, [r1, #52] +1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3455 .loc 1 1980 0 + 3456 0078 2168 ldr r1, [r4] + 3457 007a 2431 adds r1, r1, #36 + 3458 007c 238D ldrh r3, [r4, #40] + 3459 007e E06B ldr r0, [r4, #60] + 3460 0080 FFF7FEFF bl HAL_DMA_Start_IT + 3461 .LVL279: + 3462 0084 051E subs r5, r0, #0 + 3463 .LVL280: +1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3464 .loc 1 1997 0 + 3465 0086 20D0 beq .L254 +2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3466 .loc 1 2021 0 + 3467 0088 4123 movs r3, #65 + 3468 008a 2022 movs r2, #32 + 3469 008c E254 strb r2, [r4, r3] +2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3470 .loc 1 2022 0 + ARM GAS /tmp/ccskJbbb.s page 184 + + + 3471 008e 0022 movs r2, #0 + 3472 0090 0133 adds r3, r3, #1 + 3473 0092 E254 strb r2, [r4, r3] +2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3474 .loc 1 2025 0 + 3475 0094 636C ldr r3, [r4, #68] + 3476 0096 1021 movs r1, #16 + 3477 0098 0B43 orrs r3, r1 + 3478 009a 6364 str r3, [r4, #68] +2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3479 .loc 1 2028 0 + 3480 009c 4023 movs r3, #64 + 3481 009e E254 strb r2, [r4, r3] +2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3482 .loc 1 2030 0 + 3483 00a0 0125 movs r5, #1 + 3484 00a2 43E0 b .L243 + 3485 .LVL281: + 3486 .L244: +1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 3487 .loc 1 1961 0 + 3488 00a4 638D ldrh r3, [r4, #42] + 3489 00a6 2385 strh r3, [r4, #40] + 3490 .LVL282: +1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3491 .loc 1 1962 0 + 3492 00a8 8027 movs r7, #128 + 3493 00aa BF04 lsls r7, r7, #18 + 3494 00ac D4E7 b .L245 + 3495 .LVL283: + 3496 .L247: +1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3497 .loc 1 1985 0 + 3498 00ae 4123 movs r3, #65 + 3499 00b0 2022 movs r2, #32 + 3500 .LVL284: + 3501 00b2 E254 strb r2, [r4, r3] + 3502 .LVL285: +1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3503 .loc 1 1986 0 + 3504 00b4 0022 movs r2, #0 + 3505 00b6 0133 adds r3, r3, #1 + 3506 00b8 E254 strb r2, [r4, r3] +1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3507 .loc 1 1989 0 + 3508 00ba 636C ldr r3, [r4, #68] + 3509 00bc 8021 movs r1, #128 + 3510 00be 0B43 orrs r3, r1 + 3511 00c0 6364 str r3, [r4, #68] +1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3512 .loc 1 1992 0 + 3513 00c2 4023 movs r3, #64 + 3514 00c4 E254 strb r2, [r4, r3] +1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3515 .loc 1 1994 0 + 3516 00c6 0125 movs r5, #1 + 3517 00c8 30E0 b .L243 + ARM GAS /tmp/ccskJbbb.s page 185 + + + 3518 .LVL286: + 3519 .L254: +2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3520 .loc 1 2001 0 + 3521 00ca 228D ldrh r2, [r4, #40] + 3522 00cc D2B2 uxtb r2, r2 + 3523 00ce 1F4B ldr r3, .L255+16 + 3524 00d0 0093 str r3, [sp] + 3525 00d2 3B00 movs r3, r7 + 3526 00d4 3100 movs r1, r6 + 3527 00d6 2000 movs r0, r4 + 3528 .LVL287: + 3529 00d8 FFF7FEFF bl I2C_TransferConfig + 3530 .LVL288: +2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3531 .loc 1 2004 0 + 3532 00dc 638D ldrh r3, [r4, #42] + 3533 00de 228D ldrh r2, [r4, #40] + 3534 00e0 9B1A subs r3, r3, r2 + 3535 00e2 9BB2 uxth r3, r3 + 3536 00e4 6385 strh r3, [r4, #42] +2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3537 .loc 1 2007 0 + 3538 00e6 4023 movs r3, #64 + 3539 00e8 0022 movs r2, #0 + 3540 00ea E254 strb r2, [r4, r3] +2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3541 .loc 1 2013 0 + 3542 00ec 1121 movs r1, #17 + 3543 00ee 2000 movs r0, r4 + 3544 00f0 FFF7FEFF bl I2C_Enable_IRQ + 3545 .LVL289: +2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3546 .loc 1 2016 0 + 3547 00f4 2268 ldr r2, [r4] + 3548 00f6 1168 ldr r1, [r2] + 3549 00f8 8023 movs r3, #128 + 3550 00fa 1B02 lsls r3, r3, #8 + 3551 00fc 0B43 orrs r3, r1 + 3552 00fe 1360 str r3, [r2] + 3553 0100 14E0 b .L243 + 3554 .LVL290: + 3555 .L246: +2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3556 .loc 1 2036 0 + 3557 0102 134B ldr r3, .L255+20 + 3558 0104 6363 str r3, [r4, #52] +2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3559 .loc 1 2040 0 + 3560 0106 8023 movs r3, #128 + 3561 0108 CAB2 uxtb r2, r1 + 3562 .LVL291: + 3563 010a 1049 ldr r1, .L255+16 + 3564 010c 0091 str r1, [sp] + 3565 .LVL292: + 3566 010e 9B04 lsls r3, r3, #18 + 3567 0110 3100 movs r1, r6 + ARM GAS /tmp/ccskJbbb.s page 186 + + + 3568 0112 2000 movs r0, r4 + 3569 0114 FFF7FEFF bl I2C_TransferConfig + 3570 .LVL293: +2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3571 .loc 1 2043 0 + 3572 0118 4023 movs r3, #64 + 3573 011a 0022 movs r2, #0 + 3574 011c E254 strb r2, [r4, r3] +2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3575 .loc 1 2051 0 + 3576 011e 0121 movs r1, #1 + 3577 0120 2000 movs r0, r4 + 3578 0122 FFF7FEFF bl I2C_Enable_IRQ + 3579 .LVL294: +2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3580 .loc 1 2054 0 + 3581 0126 0025 movs r5, #0 + 3582 0128 00E0 b .L243 + 3583 .LVL295: + 3584 .L250: +2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3585 .loc 1 2058 0 + 3586 012a 0225 movs r5, #2 + 3587 .LVL296: + 3588 .L243: +2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3589 .loc 1 2060 0 + 3590 012c 2800 movs r0, r5 + 3591 012e 03B0 add sp, sp, #12 + 3592 @ sp needed + 3593 .LVL297: + 3594 0130 F0BD pop {r4, r5, r6, r7, pc} + 3595 .LVL298: + 3596 .L251: +1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3597 .loc 1 1938 0 + 3598 0132 0225 movs r5, #2 + 3599 0134 FAE7 b .L243 + 3600 .L252: +1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3601 .loc 1 1942 0 + 3602 0136 0225 movs r5, #2 + 3603 0138 F8E7 b .L243 + 3604 .L256: + 3605 013a C046 .align 2 + 3606 .L255: + 3607 013c 0000FFFF .word -65536 + 3608 0140 00000000 .word I2C_Master_ISR_DMA + 3609 0144 00000000 .word I2C_DMAMasterReceiveCplt + 3610 0148 00000000 .word I2C_DMAError + 3611 014c 00240080 .word -2147474432 + 3612 0150 00000000 .word I2C_Master_ISR_IT + 3613 .cfi_endproc + 3614 .LFE53: + 3616 .section .text.HAL_I2C_Slave_Transmit_DMA,"ax",%progbits + 3617 .align 1 + 3618 .global HAL_I2C_Slave_Transmit_DMA + ARM GAS /tmp/ccskJbbb.s page 187 + + + 3619 .syntax unified + 3620 .code 16 + 3621 .thumb_func + 3622 .fpu softvfp + 3624 HAL_I2C_Slave_Transmit_DMA: + 3625 .LFB54: +2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 3626 .loc 1 2071 0 + 3627 .cfi_startproc + 3628 @ args = 0, pretend = 0, frame = 0 + 3629 @ frame_needed = 0, uses_anonymous_args = 0 + 3630 .LVL299: + 3631 0000 70B5 push {r4, r5, r6, lr} + 3632 .LCFI31: + 3633 .cfi_def_cfa_offset 16 + 3634 .cfi_offset 4, -16 + 3635 .cfi_offset 5, -12 + 3636 .cfi_offset 6, -8 + 3637 .cfi_offset 14, -4 + 3638 0002 0400 movs r4, r0 +2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3639 .loc 1 2074 0 + 3640 0004 4123 movs r3, #65 + 3641 0006 C35C ldrb r3, [r0, r3] + 3642 0008 202B cmp r3, #32 + 3643 000a 63D1 bne .L264 +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3644 .loc 1 2076 0 + 3645 000c 0029 cmp r1, #0 + 3646 000e 3BD0 beq .L259 +2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3647 .loc 1 2076 0 is_stmt 0 discriminator 1 + 3648 0010 002A cmp r2, #0 + 3649 0012 39D0 beq .L259 +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3650 .loc 1 2082 0 is_stmt 1 + 3651 0014 4023 movs r3, #64 + 3652 0016 C35C ldrb r3, [r0, r3] + 3653 0018 012B cmp r3, #1 + 3654 001a 5ED0 beq .L265 +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3655 .loc 1 2082 0 is_stmt 0 discriminator 2 + 3656 001c 4023 movs r3, #64 + 3657 001e 0120 movs r0, #1 + 3658 .LVL300: + 3659 0020 E054 strb r0, [r4, r3] +2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3660 .loc 1 2084 0 is_stmt 1 discriminator 2 + 3661 0022 0133 adds r3, r3, #1 + 3662 0024 2030 adds r0, r0, #32 + 3663 0026 E054 strb r0, [r4, r3] +2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3664 .loc 1 2085 0 discriminator 2 + 3665 0028 0133 adds r3, r3, #1 + 3666 002a 0138 subs r0, r0, #1 + 3667 002c E054 strb r0, [r4, r3] +2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 188 + + + 3668 .loc 1 2086 0 discriminator 2 + 3669 002e 0023 movs r3, #0 + 3670 0030 6364 str r3, [r4, #68] +2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3671 .loc 1 2089 0 discriminator 2 + 3672 0032 6162 str r1, [r4, #36] +2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3673 .loc 1 2090 0 discriminator 2 + 3674 0034 6285 strh r2, [r4, #42] +2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3675 .loc 1 2091 0 discriminator 2 + 3676 0036 638D ldrh r3, [r4, #42] + 3677 0038 2385 strh r3, [r4, #40] +2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 3678 .loc 1 2092 0 discriminator 2 + 3679 003a 294B ldr r3, .L268 + 3680 003c E362 str r3, [r4, #44] +2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3681 .loc 1 2093 0 discriminator 2 + 3682 003e 294B ldr r3, .L268+4 + 3683 0040 6363 str r3, [r4, #52] +2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3684 .loc 1 2095 0 discriminator 2 + 3685 0042 A36B ldr r3, [r4, #56] + 3686 0044 002B cmp r3, #0 + 3687 0046 24D0 beq .L261 +2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3688 .loc 1 2098 0 + 3689 0048 274A ldr r2, .L268+8 + 3690 .LVL301: + 3691 004a 9A62 str r2, [r3, #40] +2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3692 .loc 1 2101 0 + 3693 004c A36B ldr r3, [r4, #56] + 3694 004e 274A ldr r2, .L268+12 + 3695 0050 1A63 str r2, [r3, #48] +2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 3696 .loc 1 2104 0 + 3697 0052 A26B ldr r2, [r4, #56] + 3698 0054 0023 movs r3, #0 + 3699 0056 D362 str r3, [r2, #44] +2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3700 .loc 1 2105 0 + 3701 0058 A26B ldr r2, [r4, #56] + 3702 005a 5363 str r3, [r2, #52] +2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3703 .loc 1 2108 0 + 3704 005c 2268 ldr r2, [r4] + 3705 005e 2832 adds r2, r2, #40 + 3706 0060 238D ldrh r3, [r4, #40] + 3707 0062 A06B ldr r0, [r4, #56] + 3708 0064 FFF7FEFF bl HAL_DMA_Start_IT + 3709 .LVL302: + 3710 0068 051E subs r5, r0, #0 + 3711 .LVL303: +2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3712 .loc 1 2125 0 + ARM GAS /tmp/ccskJbbb.s page 189 + + + 3713 006a 20D0 beq .L267 +2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3714 .loc 1 2145 0 + 3715 006c 4123 movs r3, #65 + 3716 006e 2822 movs r2, #40 + 3717 0070 E254 strb r2, [r4, r3] +2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3718 .loc 1 2146 0 + 3719 0072 0022 movs r2, #0 + 3720 0074 0133 adds r3, r3, #1 + 3721 0076 E254 strb r2, [r4, r3] +2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3722 .loc 1 2149 0 + 3723 0078 636C ldr r3, [r4, #68] + 3724 007a 1021 movs r1, #16 + 3725 007c 0B43 orrs r3, r1 + 3726 007e 6364 str r3, [r4, #68] +2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3727 .loc 1 2152 0 + 3728 0080 4023 movs r3, #64 + 3729 0082 E254 strb r2, [r4, r3] +2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3730 .loc 1 2154 0 + 3731 0084 0125 movs r5, #1 + 3732 0086 26E0 b .L258 + 3733 .LVL304: + 3734 .L259: +2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3735 .loc 1 2078 0 + 3736 0088 8023 movs r3, #128 + 3737 008a 9B00 lsls r3, r3, #2 + 3738 008c 6364 str r3, [r4, #68] +2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3739 .loc 1 2079 0 + 3740 008e 0125 movs r5, #1 + 3741 0090 21E0 b .L258 + 3742 .LVL305: + 3743 .L261: +2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3744 .loc 1 2113 0 + 3745 0092 4123 movs r3, #65 + 3746 0094 2822 movs r2, #40 + 3747 .LVL306: + 3748 0096 E254 strb r2, [r4, r3] +2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3749 .loc 1 2114 0 + 3750 0098 0022 movs r2, #0 + 3751 009a 0133 adds r3, r3, #1 + 3752 009c E254 strb r2, [r4, r3] +2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3753 .loc 1 2117 0 + 3754 009e 636C ldr r3, [r4, #68] + 3755 00a0 8021 movs r1, #128 + 3756 .LVL307: + 3757 00a2 0B43 orrs r3, r1 + 3758 00a4 6364 str r3, [r4, #68] +2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 190 + + + 3759 .loc 1 2120 0 + 3760 00a6 4023 movs r3, #64 + 3761 00a8 E254 strb r2, [r4, r3] +2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3762 .loc 1 2122 0 + 3763 00aa 0125 movs r5, #1 + 3764 00ac 13E0 b .L258 + 3765 .LVL308: + 3766 .L267: +2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3767 .loc 1 2128 0 + 3768 00ae 2268 ldr r2, [r4] + 3769 00b0 5368 ldr r3, [r2, #4] + 3770 00b2 0F49 ldr r1, .L268+16 + 3771 00b4 0B40 ands r3, r1 + 3772 00b6 5360 str r3, [r2, #4] +2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3773 .loc 1 2131 0 + 3774 00b8 4023 movs r3, #64 + 3775 00ba 0022 movs r2, #0 + 3776 00bc E254 strb r2, [r4, r3] +2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3777 .loc 1 2137 0 + 3778 00be 0421 movs r1, #4 + 3779 00c0 2000 movs r0, r4 + 3780 .LVL309: + 3781 00c2 FFF7FEFF bl I2C_Enable_IRQ + 3782 .LVL310: +2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3783 .loc 1 2140 0 + 3784 00c6 2268 ldr r2, [r4] + 3785 00c8 1168 ldr r1, [r2] + 3786 00ca 8023 movs r3, #128 + 3787 00cc DB01 lsls r3, r3, #7 + 3788 00ce 0B43 orrs r3, r1 + 3789 00d0 1360 str r3, [r2] +2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3790 .loc 1 2157 0 + 3791 00d2 00E0 b .L258 + 3792 .LVL311: + 3793 .L264: +2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3794 .loc 1 2161 0 + 3795 00d4 0225 movs r5, #2 + 3796 .LVL312: + 3797 .L258: +2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3798 .loc 1 2163 0 + 3799 00d6 2800 movs r0, r5 + 3800 @ sp needed + 3801 .LVL313: + 3802 00d8 70BD pop {r4, r5, r6, pc} + 3803 .LVL314: + 3804 .L265: +2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3805 .loc 1 2082 0 + 3806 00da 0225 movs r5, #2 + ARM GAS /tmp/ccskJbbb.s page 191 + + + 3807 00dc FBE7 b .L258 + 3808 .L269: + 3809 00de C046 .align 2 + 3810 .L268: + 3811 00e0 0000FFFF .word -65536 + 3812 00e4 00000000 .word I2C_Slave_ISR_DMA + 3813 00e8 00000000 .word I2C_DMASlaveTransmitCplt + 3814 00ec 00000000 .word I2C_DMAError + 3815 00f0 FF7FFFFF .word -32769 + 3816 .cfi_endproc + 3817 .LFE54: + 3819 .section .text.HAL_I2C_Slave_Receive_DMA,"ax",%progbits + 3820 .align 1 + 3821 .global HAL_I2C_Slave_Receive_DMA + 3822 .syntax unified + 3823 .code 16 + 3824 .thumb_func + 3825 .fpu softvfp + 3827 HAL_I2C_Slave_Receive_DMA: + 3828 .LFB55: +2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 3829 .loc 1 2174 0 + 3830 .cfi_startproc + 3831 @ args = 0, pretend = 0, frame = 0 + 3832 @ frame_needed = 0, uses_anonymous_args = 0 + 3833 .LVL315: + 3834 0000 70B5 push {r4, r5, r6, lr} + 3835 .LCFI32: + 3836 .cfi_def_cfa_offset 16 + 3837 .cfi_offset 4, -16 + 3838 .cfi_offset 5, -12 + 3839 .cfi_offset 6, -8 + 3840 .cfi_offset 14, -4 + 3841 0002 0400 movs r4, r0 +2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3842 .loc 1 2177 0 + 3843 0004 4123 movs r3, #65 + 3844 0006 C35C ldrb r3, [r0, r3] + 3845 0008 202B cmp r3, #32 + 3846 000a 65D1 bne .L277 +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3847 .loc 1 2179 0 + 3848 000c 0029 cmp r1, #0 + 3849 000e 3DD0 beq .L272 +2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3850 .loc 1 2179 0 is_stmt 0 discriminator 1 + 3851 0010 002A cmp r2, #0 + 3852 0012 3BD0 beq .L272 +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3853 .loc 1 2185 0 is_stmt 1 + 3854 0014 4023 movs r3, #64 + 3855 0016 C35C ldrb r3, [r0, r3] + 3856 0018 012B cmp r3, #1 + 3857 001a 60D0 beq .L278 +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3858 .loc 1 2185 0 is_stmt 0 discriminator 2 + 3859 001c 4023 movs r3, #64 + ARM GAS /tmp/ccskJbbb.s page 192 + + + 3860 001e 0120 movs r0, #1 + 3861 .LVL316: + 3862 0020 E054 strb r0, [r4, r3] +2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 3863 .loc 1 2187 0 is_stmt 1 discriminator 2 + 3864 0022 0133 adds r3, r3, #1 + 3865 0024 2130 adds r0, r0, #33 + 3866 0026 E054 strb r0, [r4, r3] +2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 3867 .loc 1 2188 0 discriminator 2 + 3868 0028 0133 adds r3, r3, #1 + 3869 002a 0238 subs r0, r0, #2 + 3870 002c E054 strb r0, [r4, r3] +2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3871 .loc 1 2189 0 discriminator 2 + 3872 002e 0023 movs r3, #0 + 3873 0030 6364 str r3, [r4, #68] +2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 3874 .loc 1 2192 0 discriminator 2 + 3875 0032 6162 str r1, [r4, #36] +2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 3876 .loc 1 2193 0 discriminator 2 + 3877 0034 6285 strh r2, [r4, #42] +2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 3878 .loc 1 2194 0 discriminator 2 + 3879 0036 638D ldrh r3, [r4, #42] + 3880 0038 2385 strh r3, [r4, #40] +2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 3881 .loc 1 2195 0 discriminator 2 + 3882 003a 2A4B ldr r3, .L281 + 3883 003c E362 str r3, [r4, #44] +2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3884 .loc 1 2196 0 discriminator 2 + 3885 003e 2A4B ldr r3, .L281+4 + 3886 0040 6363 str r3, [r4, #52] +2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3887 .loc 1 2198 0 discriminator 2 + 3888 0042 E36B ldr r3, [r4, #60] + 3889 0044 002B cmp r3, #0 + 3890 0046 26D0 beq .L274 +2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3891 .loc 1 2201 0 + 3892 0048 284A ldr r2, .L281+8 + 3893 .LVL317: + 3894 004a 9A62 str r2, [r3, #40] +2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3895 .loc 1 2204 0 + 3896 004c E36B ldr r3, [r4, #60] + 3897 004e 284A ldr r2, .L281+12 + 3898 0050 1A63 str r2, [r3, #48] +2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 3899 .loc 1 2207 0 + 3900 0052 E26B ldr r2, [r4, #60] + 3901 0054 0023 movs r3, #0 + 3902 0056 D362 str r3, [r2, #44] +2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3903 .loc 1 2208 0 + ARM GAS /tmp/ccskJbbb.s page 193 + + + 3904 0058 E26B ldr r2, [r4, #60] + 3905 005a 5363 str r3, [r2, #52] +2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3906 .loc 1 2211 0 + 3907 005c 2068 ldr r0, [r4] + 3908 005e 2430 adds r0, r0, #36 + 3909 0060 238D ldrh r3, [r4, #40] + 3910 0062 0A00 movs r2, r1 + 3911 0064 0100 movs r1, r0 + 3912 .LVL318: + 3913 0066 E06B ldr r0, [r4, #60] + 3914 0068 FFF7FEFF bl HAL_DMA_Start_IT + 3915 .LVL319: + 3916 006c 051E subs r5, r0, #0 + 3917 .LVL320: +2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 3918 .loc 1 2228 0 + 3919 006e 20D0 beq .L280 +2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3920 .loc 1 2248 0 + 3921 0070 4123 movs r3, #65 + 3922 0072 2822 movs r2, #40 + 3923 0074 E254 strb r2, [r4, r3] +2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3924 .loc 1 2249 0 + 3925 0076 0022 movs r2, #0 + 3926 0078 0133 adds r3, r3, #1 + 3927 007a E254 strb r2, [r4, r3] +2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3928 .loc 1 2252 0 + 3929 007c 636C ldr r3, [r4, #68] + 3930 007e 1021 movs r1, #16 + 3931 0080 0B43 orrs r3, r1 + 3932 0082 6364 str r3, [r4, #68] +2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3933 .loc 1 2255 0 + 3934 0084 4023 movs r3, #64 + 3935 0086 E254 strb r2, [r4, r3] +2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3936 .loc 1 2257 0 + 3937 0088 0125 movs r5, #1 + 3938 008a 26E0 b .L271 + 3939 .LVL321: + 3940 .L272: +2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 3941 .loc 1 2181 0 + 3942 008c 8023 movs r3, #128 + 3943 008e 9B00 lsls r3, r3, #2 + 3944 0090 6364 str r3, [r4, #68] +2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3945 .loc 1 2182 0 + 3946 0092 0125 movs r5, #1 + 3947 0094 21E0 b .L271 + 3948 .LVL322: + 3949 .L274: +2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 3950 .loc 1 2216 0 + ARM GAS /tmp/ccskJbbb.s page 194 + + + 3951 0096 4123 movs r3, #65 + 3952 0098 2822 movs r2, #40 + 3953 .LVL323: + 3954 009a E254 strb r2, [r4, r3] +2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3955 .loc 1 2217 0 + 3956 009c 0022 movs r2, #0 + 3957 009e 0133 adds r3, r3, #1 + 3958 00a0 E254 strb r2, [r4, r3] +2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3959 .loc 1 2220 0 + 3960 00a2 636C ldr r3, [r4, #68] + 3961 00a4 8021 movs r1, #128 + 3962 .LVL324: + 3963 00a6 0B43 orrs r3, r1 + 3964 00a8 6364 str r3, [r4, #68] +2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3965 .loc 1 2223 0 + 3966 00aa 4023 movs r3, #64 + 3967 00ac E254 strb r2, [r4, r3] +2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3968 .loc 1 2225 0 + 3969 00ae 0125 movs r5, #1 + 3970 00b0 13E0 b .L271 + 3971 .LVL325: + 3972 .L280: +2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3973 .loc 1 2231 0 + 3974 00b2 2268 ldr r2, [r4] + 3975 00b4 5368 ldr r3, [r2, #4] + 3976 00b6 0F49 ldr r1, .L281+16 + 3977 00b8 0B40 ands r3, r1 + 3978 00ba 5360 str r3, [r2, #4] +2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3979 .loc 1 2234 0 + 3980 00bc 4023 movs r3, #64 + 3981 00be 0022 movs r2, #0 + 3982 00c0 E254 strb r2, [r4, r3] +2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 3983 .loc 1 2240 0 + 3984 00c2 0421 movs r1, #4 + 3985 00c4 2000 movs r0, r4 + 3986 .LVL326: + 3987 00c6 FFF7FEFF bl I2C_Enable_IRQ + 3988 .LVL327: +2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3989 .loc 1 2243 0 + 3990 00ca 2268 ldr r2, [r4] + 3991 00cc 1168 ldr r1, [r2] + 3992 00ce 8023 movs r3, #128 + 3993 00d0 1B02 lsls r3, r3, #8 + 3994 00d2 0B43 orrs r3, r1 + 3995 00d4 1360 str r3, [r2] +2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 3996 .loc 1 2260 0 + 3997 00d6 00E0 b .L271 + 3998 .LVL328: + ARM GAS /tmp/ccskJbbb.s page 195 + + + 3999 .L277: +2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4000 .loc 1 2264 0 + 4001 00d8 0225 movs r5, #2 + 4002 .LVL329: + 4003 .L271: +2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 4004 .loc 1 2266 0 + 4005 00da 2800 movs r0, r5 + 4006 @ sp needed + 4007 .LVL330: + 4008 00dc 70BD pop {r4, r5, r6, pc} + 4009 .LVL331: + 4010 .L278: +2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4011 .loc 1 2185 0 + 4012 00de 0225 movs r5, #2 + 4013 00e0 FBE7 b .L271 + 4014 .L282: + 4015 00e2 C046 .align 2 + 4016 .L281: + 4017 00e4 0000FFFF .word -65536 + 4018 00e8 00000000 .word I2C_Slave_ISR_DMA + 4019 00ec 00000000 .word I2C_DMASlaveReceiveCplt + 4020 00f0 00000000 .word I2C_DMAError + 4021 00f4 FF7FFFFF .word -32769 + 4022 .cfi_endproc + 4023 .LFE55: + 4025 .section .text.HAL_I2C_Mem_Write,"ax",%progbits + 4026 .align 1 + 4027 .global HAL_I2C_Mem_Write + 4028 .syntax unified + 4029 .code 16 + 4030 .thumb_func + 4031 .fpu softvfp + 4033 HAL_I2C_Mem_Write: + 4034 .LFB56: +2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 4035 .loc 1 2281 0 + 4036 .cfi_startproc + 4037 @ args = 12, pretend = 0, frame = 16 + 4038 @ frame_needed = 0, uses_anonymous_args = 0 + 4039 .LVL332: + 4040 0000 F0B5 push {r4, r5, r6, r7, lr} + 4041 .LCFI33: + 4042 .cfi_def_cfa_offset 20 + 4043 .cfi_offset 4, -20 + 4044 .cfi_offset 5, -16 + 4045 .cfi_offset 6, -12 + 4046 .cfi_offset 7, -8 + 4047 .cfi_offset 14, -4 + 4048 0002 87B0 sub sp, sp, #28 + 4049 .LCFI34: + 4050 .cfi_def_cfa_offset 48 + 4051 0004 0500 movs r5, r0 + 4052 0006 0391 str r1, [sp, #12] + 4053 0008 0492 str r2, [sp, #16] + ARM GAS /tmp/ccskJbbb.s page 196 + + + 4054 000a 0593 str r3, [sp, #20] + 4055 000c 0CAB add r3, sp, #48 + 4056 .LVL333: + 4057 000e 10CB ldmia r3!, {r4} + 4058 .LVL334: + 4059 0010 1E88 ldrh r6, [r3] +2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4060 .loc 1 2287 0 + 4061 0012 4123 movs r3, #65 + 4062 .LVL335: + 4063 0014 C35C ldrb r3, [r0, r3] + 4064 0016 202B cmp r3, #32 + 4065 0018 00D0 beq .LCB4017 + 4066 001a B3E0 b .L293 @long jump + 4067 .LCB4017: +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4068 .loc 1 2289 0 + 4069 001c 002C cmp r4, #0 + 4070 001e 18D0 beq .L285 +2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4071 .loc 1 2289 0 is_stmt 0 discriminator 1 + 4072 0020 002E cmp r6, #0 + 4073 0022 16D0 beq .L285 +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4074 .loc 1 2296 0 is_stmt 1 + 4075 0024 4023 movs r3, #64 + 4076 0026 C35C ldrb r3, [r0, r3] + 4077 0028 012B cmp r3, #1 + 4078 002a 00D1 bne .LCB4025 + 4079 002c ADE0 b .L294 @long jump + 4080 .LCB4025: +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4081 .loc 1 2296 0 is_stmt 0 discriminator 2 + 4082 002e 4023 movs r3, #64 + 4083 0030 0122 movs r2, #1 + 4084 .LVL336: + 4085 0032 C254 strb r2, [r0, r3] +2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4086 .loc 1 2299 0 is_stmt 1 discriminator 2 + 4087 0034 FFF7FEFF bl HAL_GetTick + 4088 .LVL337: + 4089 0038 0700 movs r7, r0 + 4090 .LVL338: +2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4091 .loc 1 2301 0 discriminator 2 + 4092 003a 8021 movs r1, #128 + 4093 003c 0090 str r0, [sp] + 4094 003e 1923 movs r3, #25 + 4095 0040 0122 movs r2, #1 + 4096 0042 0902 lsls r1, r1, #8 + 4097 0044 2800 movs r0, r5 + 4098 .LVL339: + 4099 0046 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 4100 .LVL340: + 4101 004a 0028 cmp r0, #0 + 4102 004c 06D0 beq .L299 +2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 197 + + + 4103 .loc 1 2303 0 + 4104 004e 0120 movs r0, #1 + 4105 0050 99E0 b .L284 + 4106 .LVL341: + 4107 .L285: +2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 4108 .loc 1 2291 0 + 4109 0052 8023 movs r3, #128 + 4110 0054 9B00 lsls r3, r3, #2 + 4111 0056 6B64 str r3, [r5, #68] +2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4112 .loc 1 2292 0 + 4113 0058 0120 movs r0, #1 + 4114 .LVL342: + 4115 005a 94E0 b .L284 + 4116 .LVL343: + 4117 .L299: +2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 4118 .loc 1 2306 0 + 4119 005c 4123 movs r3, #65 + 4120 005e 2122 movs r2, #33 + 4121 0060 EA54 strb r2, [r5, r3] +2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4122 .loc 1 2307 0 + 4123 0062 0133 adds r3, r3, #1 + 4124 0064 1F32 adds r2, r2, #31 + 4125 0066 EA54 strb r2, [r5, r3] +2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4126 .loc 1 2308 0 + 4127 0068 0023 movs r3, #0 + 4128 006a 6B64 str r3, [r5, #68] +2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4129 .loc 1 2311 0 + 4130 006c 6C62 str r4, [r5, #36] +2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 4131 .loc 1 2312 0 + 4132 006e 6E85 strh r6, [r5, #42] +2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4133 .loc 1 2313 0 + 4134 0070 6B63 str r3, [r5, #52] +2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4135 .loc 1 2316 0 + 4136 0072 0197 str r7, [sp, #4] + 4137 0074 0E9B ldr r3, [sp, #56] + 4138 0076 0093 str r3, [sp] + 4139 0078 059B ldr r3, [sp, #20] + 4140 007a 049A ldr r2, [sp, #16] + 4141 007c 0399 ldr r1, [sp, #12] + 4142 007e 2800 movs r0, r5 + 4143 0080 FFF7FEFF bl I2C_RequestMemoryWrite + 4144 .LVL344: + 4145 0084 0028 cmp r0, #0 + 4146 0086 0FD1 bne .L300 +2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4147 .loc 1 2324 0 + 4148 0088 6B8D ldrh r3, [r5, #42] + 4149 008a 9BB2 uxth r3, r3 + ARM GAS /tmp/ccskJbbb.s page 198 + + + 4150 008c FF2B cmp r3, #255 + 4151 008e 10D9 bls .L288 +2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STARTST + 4152 .loc 1 2326 0 + 4153 0090 FF23 movs r3, #255 + 4154 0092 2B85 strh r3, [r5, #40] +2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4155 .loc 1 2327 0 + 4156 0094 7F3B subs r3, r3, #127 + 4157 0096 0022 movs r2, #0 + 4158 0098 0092 str r2, [sp] + 4159 009a 5B04 lsls r3, r3, #17 + 4160 009c FF32 adds r2, r2, #255 + 4161 009e 0399 ldr r1, [sp, #12] + 4162 00a0 2800 movs r0, r5 + 4163 00a2 FFF7FEFF bl I2C_TransferConfig + 4164 .LVL345: + 4165 00a6 21E0 b .L292 + 4166 .L300: +2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 4167 .loc 1 2319 0 + 4168 00a8 4023 movs r3, #64 + 4169 00aa 0022 movs r2, #0 + 4170 00ac EA54 strb r2, [r5, r3] +2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4171 .loc 1 2320 0 + 4172 00ae 0120 movs r0, #1 + 4173 00b0 69E0 b .L284 + 4174 .L288: +2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_STARTS + 4175 .loc 1 2331 0 + 4176 00b2 6A8D ldrh r2, [r5, #42] + 4177 00b4 92B2 uxth r2, r2 + 4178 00b6 2A85 strh r2, [r5, #40] +2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4179 .loc 1 2332 0 + 4180 00b8 8023 movs r3, #128 + 4181 00ba D2B2 uxtb r2, r2 + 4182 00bc 0021 movs r1, #0 + 4183 00be 0091 str r1, [sp] + 4184 00c0 9B04 lsls r3, r3, #18 + 4185 00c2 0399 ldr r1, [sp, #12] + 4186 00c4 2800 movs r0, r5 + 4187 00c6 FFF7FEFF bl I2C_TransferConfig + 4188 .LVL346: + 4189 00ca 0FE0 b .L292 + 4190 .L291: +2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_ST + 4191 .loc 1 2367 0 + 4192 00cc 6A8D ldrh r2, [r5, #42] + 4193 00ce 92B2 uxth r2, r2 + 4194 00d0 2A85 strh r2, [r5, #40] +2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4195 .loc 1 2368 0 + 4196 00d2 8023 movs r3, #128 + 4197 00d4 D2B2 uxtb r2, r2 + 4198 00d6 0021 movs r1, #0 + ARM GAS /tmp/ccskJbbb.s page 199 + + + 4199 00d8 0091 str r1, [sp] + 4200 00da 9B04 lsls r3, r3, #18 + 4201 00dc 0399 ldr r1, [sp, #12] + 4202 00de 2800 movs r0, r5 + 4203 00e0 FFF7FEFF bl I2C_TransferConfig + 4204 .LVL347: + 4205 .L290: +2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4206 .loc 1 2373 0 + 4207 00e4 6B8D ldrh r3, [r5, #42] + 4208 00e6 9BB2 uxth r3, r3 + 4209 00e8 002B cmp r3, #0 + 4210 00ea 34D0 beq .L301 + 4211 .L292: +2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4212 .loc 1 2338 0 + 4213 00ec 3A00 movs r2, r7 + 4214 00ee 0E99 ldr r1, [sp, #56] + 4215 00f0 2800 movs r0, r5 + 4216 00f2 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout + 4217 .LVL348: + 4218 00f6 0028 cmp r0, #0 + 4219 00f8 49D1 bne .L296 +2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4220 .loc 1 2344 0 + 4221 00fa 2B68 ldr r3, [r5] + 4222 00fc 6A6A ldr r2, [r5, #36] + 4223 00fe 1278 ldrb r2, [r2] + 4224 0100 9A62 str r2, [r3, #40] +2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4225 .loc 1 2347 0 + 4226 0102 6B6A ldr r3, [r5, #36] + 4227 0104 0133 adds r3, r3, #1 + 4228 0106 6B62 str r3, [r5, #36] +2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 4229 .loc 1 2349 0 + 4230 0108 6B8D ldrh r3, [r5, #42] + 4231 010a 013B subs r3, r3, #1 + 4232 010c 9BB2 uxth r3, r3 + 4233 010e 6B85 strh r3, [r5, #42] +2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4234 .loc 1 2350 0 + 4235 0110 2B8D ldrh r3, [r5, #40] + 4236 0112 013B subs r3, r3, #1 + 4237 0114 9BB2 uxth r3, r3 + 4238 0116 2B85 strh r3, [r5, #40] +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4239 .loc 1 2352 0 + 4240 0118 6A8D ldrh r2, [r5, #42] + 4241 011a 92B2 uxth r2, r2 + 4242 011c 002A cmp r2, #0 + 4243 011e E1D0 beq .L290 +2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4244 .loc 1 2352 0 is_stmt 0 discriminator 1 + 4245 0120 002B cmp r3, #0 + 4246 0122 DFD1 bne .L290 +2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 200 + + + 4247 .loc 1 2355 0 is_stmt 1 + 4248 0124 0097 str r7, [sp] + 4249 0126 0E9B ldr r3, [sp, #56] + 4250 0128 0022 movs r2, #0 + 4251 012a 8021 movs r1, #128 + 4252 012c 2800 movs r0, r5 + 4253 012e FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 4254 .LVL349: + 4255 0132 0028 cmp r0, #0 + 4256 0134 2DD1 bne .L297 +2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4257 .loc 1 2360 0 + 4258 0136 6B8D ldrh r3, [r5, #42] + 4259 0138 9BB2 uxth r3, r3 + 4260 013a FF2B cmp r3, #255 + 4261 013c C6D9 bls .L291 +2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_STA + 4262 .loc 1 2362 0 + 4263 013e FF23 movs r3, #255 + 4264 0140 2B85 strh r3, [r5, #40] +2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4265 .loc 1 2363 0 + 4266 0142 7F3B subs r3, r3, #127 + 4267 0144 0022 movs r2, #0 + 4268 0146 0092 str r2, [sp] + 4269 0148 5B04 lsls r3, r3, #17 + 4270 014a FF32 adds r2, r2, #255 + 4271 014c 0399 ldr r1, [sp, #12] + 4272 014e 2800 movs r0, r5 + 4273 0150 FFF7FEFF bl I2C_TransferConfig + 4274 .LVL350: + 4275 0154 C6E7 b .L290 + 4276 .L301: +2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4277 .loc 1 2377 0 + 4278 0156 3A00 movs r2, r7 + 4279 0158 0E99 ldr r1, [sp, #56] + 4280 015a 2800 movs r0, r5 + 4281 015c FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 4282 .LVL351: + 4283 0160 0028 cmp r0, #0 + 4284 0162 18D1 bne .L298 +2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4285 .loc 1 2383 0 + 4286 0164 2B68 ldr r3, [r5] + 4287 0166 2022 movs r2, #32 + 4288 0168 DA61 str r2, [r3, #28] +2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4289 .loc 1 2386 0 + 4290 016a 2968 ldr r1, [r5] + 4291 016c 4B68 ldr r3, [r1, #4] + 4292 016e 0B4C ldr r4, .L302 + 4293 0170 2340 ands r3, r4 + 4294 0172 4B60 str r3, [r1, #4] +2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4295 .loc 1 2388 0 + 4296 0174 4123 movs r3, #65 + ARM GAS /tmp/ccskJbbb.s page 201 + + + 4297 0176 EA54 strb r2, [r5, r3] +2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4298 .loc 1 2389 0 + 4299 0178 0023 movs r3, #0 + 4300 017a 2232 adds r2, r2, #34 + 4301 017c AB54 strb r3, [r5, r2] +2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4302 .loc 1 2392 0 + 4303 017e 023A subs r2, r2, #2 + 4304 0180 AB54 strb r3, [r5, r2] +2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4305 .loc 1 2394 0 + 4306 0182 00E0 b .L284 + 4307 .LVL352: + 4308 .L293: +2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4309 .loc 1 2398 0 + 4310 0184 0220 movs r0, #2 + 4311 .LVL353: + 4312 .L284: +2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4313 .loc 1 2400 0 + 4314 0186 07B0 add sp, sp, #28 + 4315 @ sp needed + 4316 .LVL354: + 4317 0188 F0BD pop {r4, r5, r6, r7, pc} + 4318 .LVL355: + 4319 .L294: +2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4320 .loc 1 2296 0 + 4321 018a 0220 movs r0, #2 + 4322 .LVL356: + 4323 018c FBE7 b .L284 + 4324 .LVL357: + 4325 .L296: +2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4326 .loc 1 2340 0 + 4327 018e 0120 movs r0, #1 + 4328 0190 F9E7 b .L284 + 4329 .L297: +2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4330 .loc 1 2357 0 + 4331 0192 0120 movs r0, #1 + 4332 0194 F7E7 b .L284 + 4333 .L298: +2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4334 .loc 1 2379 0 + 4335 0196 0120 movs r0, #1 + 4336 0198 F5E7 b .L284 + 4337 .L303: + 4338 019a C046 .align 2 + 4339 .L302: + 4340 019c 00E800FE .word -33495040 + 4341 .cfi_endproc + 4342 .LFE56: + 4344 .section .text.HAL_I2C_Mem_Read,"ax",%progbits + 4345 .align 1 + ARM GAS /tmp/ccskJbbb.s page 202 + + + 4346 .global HAL_I2C_Mem_Read + 4347 .syntax unified + 4348 .code 16 + 4349 .thumb_func + 4350 .fpu softvfp + 4352 HAL_I2C_Mem_Read: + 4353 .LFB57: +2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 4354 .loc 1 2416 0 + 4355 .cfi_startproc + 4356 @ args = 12, pretend = 0, frame = 16 + 4357 @ frame_needed = 0, uses_anonymous_args = 0 + 4358 .LVL358: + 4359 0000 F0B5 push {r4, r5, r6, r7, lr} + 4360 .LCFI35: + 4361 .cfi_def_cfa_offset 20 + 4362 .cfi_offset 4, -20 + 4363 .cfi_offset 5, -16 + 4364 .cfi_offset 6, -12 + 4365 .cfi_offset 7, -8 + 4366 .cfi_offset 14, -4 + 4367 0002 87B0 sub sp, sp, #28 + 4368 .LCFI36: + 4369 .cfi_def_cfa_offset 48 + 4370 0004 0400 movs r4, r0 + 4371 0006 0391 str r1, [sp, #12] + 4372 0008 0492 str r2, [sp, #16] + 4373 000a 0593 str r3, [sp, #20] + 4374 000c 0CAB add r3, sp, #48 + 4375 .LVL359: + 4376 000e 20CB ldmia r3!, {r5} + 4377 .LVL360: + 4378 0010 1F88 ldrh r7, [r3] +2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4379 .loc 1 2422 0 + 4380 0012 4123 movs r3, #65 + 4381 .LVL361: + 4382 0014 C35C ldrb r3, [r0, r3] + 4383 0016 202B cmp r3, #32 + 4384 0018 00D0 beq .LCB4365 + 4385 001a B5E0 b .L314 @long jump + 4386 .LCB4365: +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4387 .loc 1 2424 0 + 4388 001c 002D cmp r5, #0 + 4389 001e 18D0 beq .L306 +2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4390 .loc 1 2424 0 is_stmt 0 discriminator 1 + 4391 0020 002F cmp r7, #0 + 4392 0022 16D0 beq .L306 +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4393 .loc 1 2431 0 is_stmt 1 + 4394 0024 4023 movs r3, #64 + 4395 0026 C35C ldrb r3, [r0, r3] + 4396 0028 012B cmp r3, #1 + 4397 002a 00D1 bne .LCB4373 + 4398 002c AFE0 b .L315 @long jump + ARM GAS /tmp/ccskJbbb.s page 203 + + + 4399 .LCB4373: +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4400 .loc 1 2431 0 is_stmt 0 discriminator 2 + 4401 002e 4023 movs r3, #64 + 4402 0030 0122 movs r2, #1 + 4403 .LVL362: + 4404 0032 C254 strb r2, [r0, r3] +2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4405 .loc 1 2434 0 is_stmt 1 discriminator 2 + 4406 0034 FFF7FEFF bl HAL_GetTick + 4407 .LVL363: + 4408 0038 0600 movs r6, r0 + 4409 .LVL364: +2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4410 .loc 1 2436 0 discriminator 2 + 4411 003a 8021 movs r1, #128 + 4412 003c 0090 str r0, [sp] + 4413 003e 1923 movs r3, #25 + 4414 0040 0122 movs r2, #1 + 4415 0042 0902 lsls r1, r1, #8 + 4416 0044 2000 movs r0, r4 + 4417 .LVL365: + 4418 0046 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 4419 .LVL366: + 4420 004a 0028 cmp r0, #0 + 4421 004c 06D0 beq .L320 +2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4422 .loc 1 2438 0 + 4423 004e 0120 movs r0, #1 + 4424 0050 9BE0 b .L305 + 4425 .LVL367: + 4426 .L306: +2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 4427 .loc 1 2426 0 + 4428 0052 8023 movs r3, #128 + 4429 0054 9B00 lsls r3, r3, #2 + 4430 0056 6364 str r3, [r4, #68] +2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4431 .loc 1 2427 0 + 4432 0058 0120 movs r0, #1 + 4433 .LVL368: + 4434 005a 96E0 b .L305 + 4435 .LVL369: + 4436 .L320: +2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 4437 .loc 1 2441 0 + 4438 005c 4123 movs r3, #65 + 4439 005e 2222 movs r2, #34 + 4440 0060 E254 strb r2, [r4, r3] +2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4441 .loc 1 2442 0 + 4442 0062 0133 adds r3, r3, #1 + 4443 0064 1E32 adds r2, r2, #30 + 4444 0066 E254 strb r2, [r4, r3] +2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4445 .loc 1 2443 0 + 4446 0068 0023 movs r3, #0 + ARM GAS /tmp/ccskJbbb.s page 204 + + + 4447 006a 6364 str r3, [r4, #68] +2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4448 .loc 1 2446 0 + 4449 006c 6562 str r5, [r4, #36] +2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 4450 .loc 1 2447 0 + 4451 006e 6785 strh r7, [r4, #42] +2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4452 .loc 1 2448 0 + 4453 0070 6363 str r3, [r4, #52] +2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4454 .loc 1 2451 0 + 4455 0072 0196 str r6, [sp, #4] + 4456 0074 0E9B ldr r3, [sp, #56] + 4457 0076 0093 str r3, [sp] + 4458 0078 059B ldr r3, [sp, #20] + 4459 007a 049A ldr r2, [sp, #16] + 4460 007c 0399 ldr r1, [sp, #12] + 4461 007e 2000 movs r0, r4 + 4462 0080 FFF7FEFF bl I2C_RequestMemoryRead + 4463 .LVL370: + 4464 0084 0028 cmp r0, #0 + 4465 0086 0FD1 bne .L321 +2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4466 .loc 1 2460 0 + 4467 0088 638D ldrh r3, [r4, #42] + 4468 008a 9BB2 uxth r3, r3 + 4469 008c FF2B cmp r3, #255 + 4470 008e 10D9 bls .L309 +2462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_GENERATE_S + 4471 .loc 1 2462 0 + 4472 0090 FF23 movs r3, #255 + 4473 0092 2385 strh r3, [r4, #40] +2463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4474 .loc 1 2463 0 + 4475 0094 7F3B subs r3, r3, #127 + 4476 0096 424A ldr r2, .L323 + 4477 0098 0092 str r2, [sp] + 4478 009a 5B04 lsls r3, r3, #17 + 4479 009c FF22 movs r2, #255 + 4480 009e 0399 ldr r1, [sp, #12] + 4481 00a0 2000 movs r0, r4 + 4482 00a2 FFF7FEFF bl I2C_TransferConfig + 4483 .LVL371: + 4484 00a6 21E0 b .L313 + 4485 .L321: +2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 4486 .loc 1 2454 0 + 4487 00a8 4023 movs r3, #64 + 4488 00aa 0022 movs r2, #0 + 4489 00ac E254 strb r2, [r4, r3] +2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4490 .loc 1 2455 0 + 4491 00ae 0120 movs r0, #1 + 4492 00b0 6BE0 b .L305 + 4493 .L309: +2467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_GENERATE_ + ARM GAS /tmp/ccskJbbb.s page 205 + + + 4494 .loc 1 2467 0 + 4495 00b2 628D ldrh r2, [r4, #42] + 4496 00b4 92B2 uxth r2, r2 + 4497 00b6 2285 strh r2, [r4, #40] +2468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4498 .loc 1 2468 0 + 4499 00b8 8023 movs r3, #128 + 4500 00ba D2B2 uxtb r2, r2 + 4501 00bc 3849 ldr r1, .L323 + 4502 00be 0091 str r1, [sp] + 4503 00c0 9B04 lsls r3, r3, #18 + 4504 00c2 0399 ldr r1, [sp, #12] + 4505 00c4 2000 movs r0, r4 + 4506 00c6 FFF7FEFF bl I2C_TransferConfig + 4507 .LVL372: + 4508 00ca 0FE0 b .L313 + 4509 .L312: +2503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, I2C_NO_ST + 4510 .loc 1 2503 0 + 4511 00cc 628D ldrh r2, [r4, #42] + 4512 00ce 92B2 uxth r2, r2 + 4513 00d0 2285 strh r2, [r4, #40] +2504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4514 .loc 1 2504 0 + 4515 00d2 8023 movs r3, #128 + 4516 00d4 D2B2 uxtb r2, r2 + 4517 00d6 0021 movs r1, #0 + 4518 00d8 0091 str r1, [sp] + 4519 00da 9B04 lsls r3, r3, #18 + 4520 00dc 0399 ldr r1, [sp, #12] + 4521 00de 2000 movs r0, r4 + 4522 00e0 FFF7FEFF bl I2C_TransferConfig + 4523 .LVL373: + 4524 .L311: +2508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4525 .loc 1 2508 0 + 4526 00e4 638D ldrh r3, [r4, #42] + 4527 00e6 9BB2 uxth r3, r3 + 4528 00e8 002B cmp r3, #0 + 4529 00ea 36D0 beq .L322 + 4530 .L313: +2474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4531 .loc 1 2474 0 + 4532 00ec 0096 str r6, [sp] + 4533 00ee 0E9B ldr r3, [sp, #56] + 4534 00f0 0022 movs r2, #0 + 4535 00f2 0421 movs r1, #4 + 4536 00f4 2000 movs r0, r4 + 4537 00f6 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 4538 .LVL374: + 4539 00fa 0028 cmp r0, #0 + 4540 00fc 49D1 bne .L317 +2480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4541 .loc 1 2480 0 + 4542 00fe 2368 ldr r3, [r4] + 4543 0100 5B6A ldr r3, [r3, #36] + 4544 0102 626A ldr r2, [r4, #36] + ARM GAS /tmp/ccskJbbb.s page 206 + + + 4545 0104 1370 strb r3, [r2] +2483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4546 .loc 1 2483 0 + 4547 0106 636A ldr r3, [r4, #36] + 4548 0108 0133 adds r3, r3, #1 + 4549 010a 6362 str r3, [r4, #36] +2485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 4550 .loc 1 2485 0 + 4551 010c 238D ldrh r3, [r4, #40] + 4552 010e 013B subs r3, r3, #1 + 4553 0110 9BB2 uxth r3, r3 + 4554 0112 2385 strh r3, [r4, #40] +2486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4555 .loc 1 2486 0 + 4556 0114 628D ldrh r2, [r4, #42] + 4557 0116 013A subs r2, r2, #1 + 4558 0118 92B2 uxth r2, r2 + 4559 011a 6285 strh r2, [r4, #42] +2488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4560 .loc 1 2488 0 + 4561 011c 628D ldrh r2, [r4, #42] + 4562 011e 92B2 uxth r2, r2 + 4563 0120 002A cmp r2, #0 + 4564 0122 DFD0 beq .L311 +2488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4565 .loc 1 2488 0 is_stmt 0 discriminator 1 + 4566 0124 002B cmp r3, #0 + 4567 0126 DDD1 bne .L311 +2491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4568 .loc 1 2491 0 is_stmt 1 + 4569 0128 0096 str r6, [sp] + 4570 012a 0E9B ldr r3, [sp, #56] + 4571 012c 0022 movs r2, #0 + 4572 012e 8021 movs r1, #128 + 4573 0130 2000 movs r0, r4 + 4574 0132 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 4575 .LVL375: + 4576 0136 0028 cmp r0, #0 + 4577 0138 2DD1 bne .L318 +2496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4578 .loc 1 2496 0 + 4579 013a 638D ldrh r3, [r4, #42] + 4580 013c 9BB2 uxth r3, r3 + 4581 013e FF2B cmp r3, #255 + 4582 0140 C4D9 bls .L312 +2498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_ST + 4583 .loc 1 2498 0 + 4584 0142 FF23 movs r3, #255 + 4585 0144 2385 strh r3, [r4, #40] +2499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4586 .loc 1 2499 0 + 4587 0146 7F3B subs r3, r3, #127 + 4588 0148 0022 movs r2, #0 + 4589 014a 0092 str r2, [sp] + 4590 014c 5B04 lsls r3, r3, #17 + 4591 014e FF32 adds r2, r2, #255 + 4592 0150 0399 ldr r1, [sp, #12] + ARM GAS /tmp/ccskJbbb.s page 207 + + + 4593 0152 2000 movs r0, r4 + 4594 0154 FFF7FEFF bl I2C_TransferConfig + 4595 .LVL376: + 4596 0158 C4E7 b .L311 + 4597 .L322: +2512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4598 .loc 1 2512 0 + 4599 015a 3200 movs r2, r6 + 4600 015c 0E99 ldr r1, [sp, #56] + 4601 015e 2000 movs r0, r4 + 4602 0160 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout + 4603 .LVL377: + 4604 0164 0028 cmp r0, #0 + 4605 0166 18D1 bne .L319 +2518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4606 .loc 1 2518 0 + 4607 0168 2368 ldr r3, [r4] + 4608 016a 2022 movs r2, #32 + 4609 016c DA61 str r2, [r3, #28] +2521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4610 .loc 1 2521 0 + 4611 016e 2168 ldr r1, [r4] + 4612 0170 4B68 ldr r3, [r1, #4] + 4613 0172 0C4D ldr r5, .L323+4 + 4614 0174 2B40 ands r3, r5 + 4615 0176 4B60 str r3, [r1, #4] +2523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 4616 .loc 1 2523 0 + 4617 0178 4123 movs r3, #65 + 4618 017a E254 strb r2, [r4, r3] +2524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4619 .loc 1 2524 0 + 4620 017c 0023 movs r3, #0 + 4621 017e 2232 adds r2, r2, #34 + 4622 0180 A354 strb r3, [r4, r2] +2527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4623 .loc 1 2527 0 + 4624 0182 023A subs r2, r2, #2 + 4625 0184 A354 strb r3, [r4, r2] +2529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4626 .loc 1 2529 0 + 4627 0186 00E0 b .L305 + 4628 .LVL378: + 4629 .L314: +2533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4630 .loc 1 2533 0 + 4631 0188 0220 movs r0, #2 + 4632 .LVL379: + 4633 .L305: +2535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 4634 .loc 1 2535 0 + 4635 018a 07B0 add sp, sp, #28 + 4636 @ sp needed + 4637 .LVL380: + 4638 018c F0BD pop {r4, r5, r6, r7, pc} + 4639 .LVL381: + 4640 .L315: + ARM GAS /tmp/ccskJbbb.s page 208 + + +2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4641 .loc 1 2431 0 + 4642 018e 0220 movs r0, #2 + 4643 .LVL382: + 4644 0190 FBE7 b .L305 + 4645 .LVL383: + 4646 .L317: +2476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4647 .loc 1 2476 0 + 4648 0192 0120 movs r0, #1 + 4649 0194 F9E7 b .L305 + 4650 .L318: +2493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4651 .loc 1 2493 0 + 4652 0196 0120 movs r0, #1 + 4653 0198 F7E7 b .L305 + 4654 .L319: +2514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4655 .loc 1 2514 0 + 4656 019a 0120 movs r0, #1 + 4657 019c F5E7 b .L305 + 4658 .L324: + 4659 019e C046 .align 2 + 4660 .L323: + 4661 01a0 00240080 .word -2147474432 + 4662 01a4 00E800FE .word -33495040 + 4663 .cfi_endproc + 4664 .LFE57: + 4666 .section .text.HAL_I2C_Mem_Write_IT,"ax",%progbits + 4667 .align 1 + 4668 .global HAL_I2C_Mem_Write_IT + 4669 .syntax unified + 4670 .code 16 + 4671 .thumb_func + 4672 .fpu softvfp + 4674 HAL_I2C_Mem_Write_IT: + 4675 .LFB58: +2549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 4676 .loc 1 2549 0 + 4677 .cfi_startproc + 4678 @ args = 8, pretend = 0, frame = 16 + 4679 @ frame_needed = 0, uses_anonymous_args = 0 + 4680 .LVL384: + 4681 0000 F0B5 push {r4, r5, r6, r7, lr} + 4682 .LCFI37: + 4683 .cfi_def_cfa_offset 20 + 4684 .cfi_offset 4, -20 + 4685 .cfi_offset 5, -16 + 4686 .cfi_offset 6, -12 + 4687 .cfi_offset 7, -8 + 4688 .cfi_offset 14, -4 + 4689 0002 87B0 sub sp, sp, #28 + 4690 .LCFI38: + 4691 .cfi_def_cfa_offset 48 + 4692 0004 0400 movs r4, r0 + 4693 0006 0391 str r1, [sp, #12] + 4694 0008 0492 str r2, [sp, #16] + ARM GAS /tmp/ccskJbbb.s page 209 + + + 4695 000a 0593 str r3, [sp, #20] + 4696 000c 0CAB add r3, sp, #48 + 4697 .LVL385: + 4698 000e 80CB ldmia r3!, {r7} + 4699 .LVL386: + 4700 0010 1D88 ldrh r5, [r3] +2556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4701 .loc 1 2556 0 + 4702 0012 4123 movs r3, #65 + 4703 .LVL387: + 4704 0014 C35C ldrb r3, [r0, r3] + 4705 0016 202B cmp r3, #32 + 4706 0018 4FD1 bne .L332 +2558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4707 .loc 1 2558 0 + 4708 001a 002F cmp r7, #0 + 4709 001c 33D0 beq .L327 +2558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4710 .loc 1 2558 0 is_stmt 0 discriminator 1 + 4711 001e 002D cmp r5, #0 + 4712 0020 31D0 beq .L327 +2564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4713 .loc 1 2564 0 is_stmt 1 + 4714 0022 0368 ldr r3, [r0] + 4715 0024 9B69 ldr r3, [r3, #24] + 4716 0026 1B04 lsls r3, r3, #16 + 4717 0028 4BD4 bmi .L333 +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4718 .loc 1 2570 0 + 4719 002a 4023 movs r3, #64 + 4720 002c C35C ldrb r3, [r0, r3] + 4721 002e 012B cmp r3, #1 + 4722 0030 49D0 beq .L334 +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4723 .loc 1 2570 0 is_stmt 0 discriminator 2 + 4724 0032 4026 movs r6, #64 + 4725 0034 0123 movs r3, #1 + 4726 0036 8355 strb r3, [r0, r6] +2573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4727 .loc 1 2573 0 is_stmt 1 discriminator 2 + 4728 0038 FFF7FEFF bl HAL_GetTick + 4729 .LVL388: +2575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 4730 .loc 1 2575 0 discriminator 2 + 4731 003c 4123 movs r3, #65 + 4732 003e 2122 movs r2, #33 + 4733 0040 E254 strb r2, [r4, r3] +2576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4734 .loc 1 2576 0 discriminator 2 + 4735 0042 0133 adds r3, r3, #1 + 4736 0044 E654 strb r6, [r4, r3] +2577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4737 .loc 1 2577 0 discriminator 2 + 4738 0046 0023 movs r3, #0 + 4739 0048 6364 str r3, [r4, #68] +2580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4740 .loc 1 2580 0 discriminator 2 + ARM GAS /tmp/ccskJbbb.s page 210 + + + 4741 004a 6762 str r7, [r4, #36] +2581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4742 .loc 1 2581 0 discriminator 2 + 4743 004c 6585 strh r5, [r4, #42] +2582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 4744 .loc 1 2582 0 discriminator 2 + 4745 004e 1F4B ldr r3, .L335 + 4746 0050 E362 str r3, [r4, #44] +2583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4747 .loc 1 2583 0 discriminator 2 + 4748 0052 1F4B ldr r3, .L335+4 + 4749 0054 6363 str r3, [r4, #52] +2585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4750 .loc 1 2585 0 discriminator 2 + 4751 0056 638D ldrh r3, [r4, #42] + 4752 0058 9BB2 uxth r3, r3 + 4753 005a FF2B cmp r3, #255 + 4754 005c 18D9 bls .L329 +2587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4755 .loc 1 2587 0 + 4756 005e FF23 movs r3, #255 + 4757 0060 2385 strh r3, [r4, #40] + 4758 .LVL389: +2588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4759 .loc 1 2588 0 + 4760 0062 8027 movs r7, #128 + 4761 0064 7F04 lsls r7, r7, #17 + 4762 .LVL390: + 4763 .L330: +2597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4764 .loc 1 2597 0 + 4765 0066 0190 str r0, [sp, #4] + 4766 0068 1923 movs r3, #25 + 4767 006a 0093 str r3, [sp] + 4768 006c 059B ldr r3, [sp, #20] + 4769 006e 049A ldr r2, [sp, #16] + 4770 0070 0399 ldr r1, [sp, #12] + 4771 0072 2000 movs r0, r4 + 4772 .LVL391: + 4773 0074 FFF7FEFF bl I2C_RequestMemoryWrite + 4774 .LVL392: + 4775 0078 051E subs r5, r0, #0 + 4776 007a 0ED0 beq .L331 +2600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 4777 .loc 1 2600 0 + 4778 007c 4023 movs r3, #64 + 4779 007e 0022 movs r2, #0 + 4780 0080 E254 strb r2, [r4, r3] +2601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4781 .loc 1 2601 0 + 4782 0082 0125 movs r5, #1 + 4783 0084 1AE0 b .L326 + 4784 .LVL393: + 4785 .L327: +2560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 4786 .loc 1 2560 0 + 4787 0086 8023 movs r3, #128 + ARM GAS /tmp/ccskJbbb.s page 211 + + + 4788 0088 9B00 lsls r3, r3, #2 + 4789 008a 6364 str r3, [r4, #68] +2561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4790 .loc 1 2561 0 + 4791 008c 0125 movs r5, #1 + 4792 008e 15E0 b .L326 + 4793 .LVL394: + 4794 .L329: +2592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 4795 .loc 1 2592 0 + 4796 0090 638D ldrh r3, [r4, #42] + 4797 0092 2385 strh r3, [r4, #40] + 4798 .LVL395: +2593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4799 .loc 1 2593 0 + 4800 0094 8027 movs r7, #128 + 4801 0096 BF04 lsls r7, r7, #18 + 4802 0098 E5E7 b .L330 + 4803 .LVL396: + 4804 .L331: +2605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4805 .loc 1 2605 0 + 4806 009a 228D ldrh r2, [r4, #40] + 4807 009c D2B2 uxtb r2, r2 + 4808 009e 0026 movs r6, #0 + 4809 00a0 0096 str r6, [sp] + 4810 00a2 3B00 movs r3, r7 + 4811 00a4 0399 ldr r1, [sp, #12] + 4812 00a6 2000 movs r0, r4 + 4813 00a8 FFF7FEFF bl I2C_TransferConfig + 4814 .LVL397: +2608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4815 .loc 1 2608 0 + 4816 00ac 4023 movs r3, #64 + 4817 00ae E654 strb r6, [r4, r3] +2617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4818 .loc 1 2617 0 + 4819 00b0 0121 movs r1, #1 + 4820 00b2 2000 movs r0, r4 + 4821 00b4 FFF7FEFF bl I2C_Enable_IRQ + 4822 .LVL398: +2619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4823 .loc 1 2619 0 + 4824 00b8 00E0 b .L326 + 4825 .LVL399: + 4826 .L332: +2623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4827 .loc 1 2623 0 + 4828 00ba 0225 movs r5, #2 + 4829 .LVL400: + 4830 .L326: +2625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4831 .loc 1 2625 0 + 4832 00bc 2800 movs r0, r5 + 4833 00be 07B0 add sp, sp, #28 + 4834 @ sp needed + 4835 .LVL401: + ARM GAS /tmp/ccskJbbb.s page 212 + + + 4836 00c0 F0BD pop {r4, r5, r6, r7, pc} + 4837 .LVL402: + 4838 .L333: +2566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4839 .loc 1 2566 0 + 4840 00c2 0225 movs r5, #2 + 4841 00c4 FAE7 b .L326 + 4842 .L334: +2570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4843 .loc 1 2570 0 + 4844 00c6 0225 movs r5, #2 + 4845 00c8 F8E7 b .L326 + 4846 .L336: + 4847 00ca C046 .align 2 + 4848 .L335: + 4849 00cc 0000FFFF .word -65536 + 4850 00d0 00000000 .word I2C_Master_ISR_IT + 4851 .cfi_endproc + 4852 .LFE58: + 4854 .section .text.HAL_I2C_Mem_Read_IT,"ax",%progbits + 4855 .align 1 + 4856 .global HAL_I2C_Mem_Read_IT + 4857 .syntax unified + 4858 .code 16 + 4859 .thumb_func + 4860 .fpu softvfp + 4862 HAL_I2C_Mem_Read_IT: + 4863 .LFB59: +2640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 4864 .loc 1 2640 0 + 4865 .cfi_startproc + 4866 @ args = 8, pretend = 0, frame = 16 + 4867 @ frame_needed = 0, uses_anonymous_args = 0 + 4868 .LVL403: + 4869 0000 F0B5 push {r4, r5, r6, r7, lr} + 4870 .LCFI39: + 4871 .cfi_def_cfa_offset 20 + 4872 .cfi_offset 4, -20 + 4873 .cfi_offset 5, -16 + 4874 .cfi_offset 6, -12 + 4875 .cfi_offset 7, -8 + 4876 .cfi_offset 14, -4 + 4877 0002 87B0 sub sp, sp, #28 + 4878 .LCFI40: + 4879 .cfi_def_cfa_offset 48 + 4880 0004 0600 movs r6, r0 + 4881 0006 0391 str r1, [sp, #12] + 4882 0008 0492 str r2, [sp, #16] + 4883 000a 0593 str r3, [sp, #20] + 4884 000c 0CAB add r3, sp, #48 + 4885 .LVL404: + 4886 000e 80CB ldmia r3!, {r7} + 4887 .LVL405: + 4888 0010 1D88 ldrh r5, [r3] +2647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4889 .loc 1 2647 0 + 4890 0012 4123 movs r3, #65 + ARM GAS /tmp/ccskJbbb.s page 213 + + + 4891 .LVL406: + 4892 0014 C35C ldrb r3, [r0, r3] + 4893 0016 202B cmp r3, #32 + 4894 0018 50D1 bne .L344 +2649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4895 .loc 1 2649 0 + 4896 001a 002F cmp r7, #0 + 4897 001c 33D0 beq .L339 +2649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4898 .loc 1 2649 0 is_stmt 0 discriminator 1 + 4899 001e 002D cmp r5, #0 + 4900 0020 31D0 beq .L339 +2655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4901 .loc 1 2655 0 is_stmt 1 + 4902 0022 0368 ldr r3, [r0] + 4903 0024 9B69 ldr r3, [r3, #24] + 4904 0026 1B04 lsls r3, r3, #16 + 4905 0028 4CD4 bmi .L345 +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4906 .loc 1 2661 0 + 4907 002a 4023 movs r3, #64 + 4908 002c C35C ldrb r3, [r0, r3] + 4909 002e 012B cmp r3, #1 + 4910 0030 4AD0 beq .L346 +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4911 .loc 1 2661 0 is_stmt 0 discriminator 2 + 4912 0032 4024 movs r4, #64 + 4913 0034 0123 movs r3, #1 + 4914 0036 0355 strb r3, [r0, r4] +2664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4915 .loc 1 2664 0 is_stmt 1 discriminator 2 + 4916 0038 FFF7FEFF bl HAL_GetTick + 4917 .LVL407: +2666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 4918 .loc 1 2666 0 discriminator 2 + 4919 003c 4123 movs r3, #65 + 4920 003e 2222 movs r2, #34 + 4921 0040 F254 strb r2, [r6, r3] +2667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 4922 .loc 1 2667 0 discriminator 2 + 4923 0042 0133 adds r3, r3, #1 + 4924 0044 F454 strb r4, [r6, r3] +2668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4925 .loc 1 2668 0 discriminator 2 + 4926 0046 0023 movs r3, #0 + 4927 0048 7364 str r3, [r6, #68] +2671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 4928 .loc 1 2671 0 discriminator 2 + 4929 004a 7762 str r7, [r6, #36] +2672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 4930 .loc 1 2672 0 discriminator 2 + 4931 004c 7585 strh r5, [r6, #42] +2673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 4932 .loc 1 2673 0 discriminator 2 + 4933 004e 1F4B ldr r3, .L347 + 4934 0050 F362 str r3, [r6, #44] +2674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 214 + + + 4935 .loc 1 2674 0 discriminator 2 + 4936 0052 1F4B ldr r3, .L347+4 + 4937 0054 7363 str r3, [r6, #52] +2676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4938 .loc 1 2676 0 discriminator 2 + 4939 0056 738D ldrh r3, [r6, #42] + 4940 0058 9BB2 uxth r3, r3 + 4941 005a FF2B cmp r3, #255 + 4942 005c 18D9 bls .L341 +2678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 4943 .loc 1 2678 0 + 4944 005e FF23 movs r3, #255 + 4945 0060 3385 strh r3, [r6, #40] + 4946 .LVL408: +2679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4947 .loc 1 2679 0 + 4948 0062 8027 movs r7, #128 + 4949 0064 7F04 lsls r7, r7, #17 + 4950 .LVL409: + 4951 .L342: +2688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 4952 .loc 1 2688 0 + 4953 0066 0190 str r0, [sp, #4] + 4954 0068 1923 movs r3, #25 + 4955 006a 0093 str r3, [sp] + 4956 006c 059B ldr r3, [sp, #20] + 4957 006e 049A ldr r2, [sp, #16] + 4958 0070 0399 ldr r1, [sp, #12] + 4959 0072 3000 movs r0, r6 + 4960 .LVL410: + 4961 0074 FFF7FEFF bl I2C_RequestMemoryRead + 4962 .LVL411: + 4963 0078 051E subs r5, r0, #0 + 4964 007a 0ED0 beq .L343 +2691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 4965 .loc 1 2691 0 + 4966 007c 4023 movs r3, #64 + 4967 007e 0022 movs r2, #0 + 4968 0080 F254 strb r2, [r6, r3] +2692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4969 .loc 1 2692 0 + 4970 0082 0125 movs r5, #1 + 4971 0084 1BE0 b .L338 + 4972 .LVL412: + 4973 .L339: +2651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 4974 .loc 1 2651 0 + 4975 0086 8023 movs r3, #128 + 4976 0088 9B00 lsls r3, r3, #2 + 4977 008a 7364 str r3, [r6, #68] +2652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4978 .loc 1 2652 0 + 4979 008c 0125 movs r5, #1 + 4980 008e 16E0 b .L338 + 4981 .LVL413: + 4982 .L341: +2683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + ARM GAS /tmp/ccskJbbb.s page 215 + + + 4983 .loc 1 2683 0 + 4984 0090 738D ldrh r3, [r6, #42] + 4985 0092 3385 strh r3, [r6, #40] + 4986 .LVL414: +2684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 4987 .loc 1 2684 0 + 4988 0094 8027 movs r7, #128 + 4989 0096 BF04 lsls r7, r7, #18 + 4990 0098 E5E7 b .L342 + 4991 .LVL415: + 4992 .L343: +2696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 4993 .loc 1 2696 0 + 4994 009a 328D ldrh r2, [r6, #40] + 4995 009c D2B2 uxtb r2, r2 + 4996 009e 0D4B ldr r3, .L347+8 + 4997 00a0 0093 str r3, [sp] + 4998 00a2 3B00 movs r3, r7 + 4999 00a4 0399 ldr r1, [sp, #12] + 5000 00a6 3000 movs r0, r6 + 5001 00a8 FFF7FEFF bl I2C_TransferConfig + 5002 .LVL416: +2699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5003 .loc 1 2699 0 + 5004 00ac 4023 movs r3, #64 + 5005 00ae 0022 movs r2, #0 + 5006 00b0 F254 strb r2, [r6, r3] +2708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5007 .loc 1 2708 0 + 5008 00b2 0221 movs r1, #2 + 5009 00b4 3000 movs r0, r6 + 5010 00b6 FFF7FEFF bl I2C_Enable_IRQ + 5011 .LVL417: +2710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5012 .loc 1 2710 0 + 5013 00ba 00E0 b .L338 + 5014 .LVL418: + 5015 .L344: +2714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5016 .loc 1 2714 0 + 5017 00bc 0225 movs r5, #2 + 5018 .LVL419: + 5019 .L338: +2716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /** + 5020 .loc 1 2716 0 + 5021 00be 2800 movs r0, r5 + 5022 00c0 07B0 add sp, sp, #28 + 5023 @ sp needed + 5024 .LVL420: + 5025 00c2 F0BD pop {r4, r5, r6, r7, pc} + 5026 .LVL421: + 5027 .L345: +2657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5028 .loc 1 2657 0 + 5029 00c4 0225 movs r5, #2 + 5030 00c6 FAE7 b .L338 + 5031 .L346: + ARM GAS /tmp/ccskJbbb.s page 216 + + +2661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5032 .loc 1 2661 0 + 5033 00c8 0225 movs r5, #2 + 5034 00ca F8E7 b .L338 + 5035 .L348: + 5036 .align 2 + 5037 .L347: + 5038 00cc 0000FFFF .word -65536 + 5039 00d0 00000000 .word I2C_Master_ISR_IT + 5040 00d4 00240080 .word -2147474432 + 5041 .cfi_endproc + 5042 .LFE59: + 5044 .section .text.HAL_I2C_Mem_Write_DMA,"ax",%progbits + 5045 .align 1 + 5046 .global HAL_I2C_Mem_Write_DMA + 5047 .syntax unified + 5048 .code 16 + 5049 .thumb_func + 5050 .fpu softvfp + 5052 HAL_I2C_Mem_Write_DMA: + 5053 .LFB60: +2730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5054 .loc 1 2730 0 + 5055 .cfi_startproc + 5056 @ args = 8, pretend = 0, frame = 16 + 5057 @ frame_needed = 0, uses_anonymous_args = 0 + 5058 .LVL422: + 5059 0000 F0B5 push {r4, r5, r6, r7, lr} + 5060 .LCFI41: + 5061 .cfi_def_cfa_offset 20 + 5062 .cfi_offset 4, -20 + 5063 .cfi_offset 5, -16 + 5064 .cfi_offset 6, -12 + 5065 .cfi_offset 7, -8 + 5066 .cfi_offset 14, -4 + 5067 0002 CE46 mov lr, r9 + 5068 0004 00B5 push {lr} + 5069 .LCFI42: + 5070 .cfi_def_cfa_offset 24 + 5071 .cfi_offset 9, -24 + 5072 0006 86B0 sub sp, sp, #24 + 5073 .LCFI43: + 5074 .cfi_def_cfa_offset 48 + 5075 0008 0400 movs r4, r0 + 5076 000a 0391 str r1, [sp, #12] + 5077 000c 0492 str r2, [sp, #16] + 5078 000e 0593 str r3, [sp, #20] + 5079 0010 0CAB add r3, sp, #48 + 5080 .LVL423: + 5081 0012 40CB ldmia r3!, {r6} + 5082 .LVL424: + 5083 0014 1F88 ldrh r7, [r3] +2738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5084 .loc 1 2738 0 + 5085 0016 4123 movs r3, #65 + 5086 .LVL425: + 5087 0018 C35C ldrb r3, [r0, r3] + ARM GAS /tmp/ccskJbbb.s page 217 + + + 5088 001a 202B cmp r3, #32 + 5089 001c 00D0 beq .LCB5149 + 5090 001e 90E0 b .L359 @long jump + 5091 .LCB5149: +2740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5092 .loc 1 2740 0 + 5093 0020 002E cmp r6, #0 + 5094 0022 55D0 beq .L351 +2740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5095 .loc 1 2740 0 is_stmt 0 discriminator 1 + 5096 0024 002F cmp r7, #0 + 5097 0026 53D0 beq .L351 +2746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5098 .loc 1 2746 0 is_stmt 1 + 5099 0028 0368 ldr r3, [r0] + 5100 002a 9B69 ldr r3, [r3, #24] + 5101 002c 1B04 lsls r3, r3, #16 + 5102 002e 00D5 bpl .LCB5159 + 5103 0030 8DE0 b .L360 @long jump + 5104 .LCB5159: +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5105 .loc 1 2752 0 + 5106 0032 4023 movs r3, #64 + 5107 0034 C35C ldrb r3, [r0, r3] + 5108 0036 012B cmp r3, #1 + 5109 0038 00D1 bne .LCB5163 + 5110 003a 8AE0 b .L361 @long jump + 5111 .LCB5163: +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5112 .loc 1 2752 0 is_stmt 0 discriminator 2 + 5113 003c 4025 movs r5, #64 + 5114 003e 0123 movs r3, #1 + 5115 0040 4355 strb r3, [r0, r5] +2755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5116 .loc 1 2755 0 is_stmt 1 discriminator 2 + 5117 0042 FFF7FEFF bl HAL_GetTick + 5118 .LVL426: +2757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5119 .loc 1 2757 0 discriminator 2 + 5120 0046 4123 movs r3, #65 + 5121 0048 2122 movs r2, #33 + 5122 004a E254 strb r2, [r4, r3] +2758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5123 .loc 1 2758 0 discriminator 2 + 5124 004c 0133 adds r3, r3, #1 + 5125 004e E554 strb r5, [r4, r3] +2759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5126 .loc 1 2759 0 discriminator 2 + 5127 0050 0023 movs r3, #0 + 5128 0052 6364 str r3, [r4, #68] +2762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5129 .loc 1 2762 0 discriminator 2 + 5130 0054 6662 str r6, [r4, #36] +2763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5131 .loc 1 2763 0 discriminator 2 + 5132 0056 6785 strh r7, [r4, #42] +2764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + ARM GAS /tmp/ccskJbbb.s page 218 + + + 5133 .loc 1 2764 0 discriminator 2 + 5134 0058 3F4B ldr r3, .L365 + 5135 005a E362 str r3, [r4, #44] +2765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5136 .loc 1 2765 0 discriminator 2 + 5137 005c 3F4B ldr r3, .L365+4 + 5138 005e 6363 str r3, [r4, #52] +2767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5139 .loc 1 2767 0 discriminator 2 + 5140 0060 638D ldrh r3, [r4, #42] + 5141 0062 9BB2 uxth r3, r3 + 5142 0064 FF2B cmp r3, #255 + 5143 0066 38D9 bls .L353 +2769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 5144 .loc 1 2769 0 + 5145 0068 FF23 movs r3, #255 + 5146 006a 2385 strh r3, [r4, #40] + 5147 .LVL427: +2770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5148 .loc 1 2770 0 + 5149 006c 8023 movs r3, #128 + 5150 006e 5B04 lsls r3, r3, #17 + 5151 0070 9946 mov r9, r3 + 5152 .LVL428: + 5153 .L354: +2779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5154 .loc 1 2779 0 + 5155 0072 0190 str r0, [sp, #4] + 5156 0074 1923 movs r3, #25 + 5157 0076 0093 str r3, [sp] + 5158 0078 059B ldr r3, [sp, #20] + 5159 007a 049A ldr r2, [sp, #16] + 5160 007c 0399 ldr r1, [sp, #12] + 5161 007e 2000 movs r0, r4 + 5162 .LVL429: + 5163 0080 FFF7FEFF bl I2C_RequestMemoryWrite + 5164 .LVL430: + 5165 0084 0028 cmp r0, #0 + 5166 0086 2ED1 bne .L363 +2787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5167 .loc 1 2787 0 + 5168 0088 A36B ldr r3, [r4, #56] + 5169 008a 002B cmp r3, #0 + 5170 008c 30D0 beq .L356 +2790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5171 .loc 1 2790 0 + 5172 008e 344A ldr r2, .L365+8 + 5173 0090 9A62 str r2, [r3, #40] +2793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5174 .loc 1 2793 0 + 5175 0092 A36B ldr r3, [r4, #56] + 5176 0094 334A ldr r2, .L365+12 + 5177 0096 1A63 str r2, [r3, #48] +2796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 5178 .loc 1 2796 0 + 5179 0098 A26B ldr r2, [r4, #56] + 5180 009a 0023 movs r3, #0 + ARM GAS /tmp/ccskJbbb.s page 219 + + + 5181 009c D362 str r3, [r2, #44] +2797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5182 .loc 1 2797 0 + 5183 009e A26B ldr r2, [r4, #56] + 5184 00a0 5363 str r3, [r2, #52] +2800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5185 .loc 1 2800 0 + 5186 00a2 2268 ldr r2, [r4] + 5187 00a4 2832 adds r2, r2, #40 + 5188 00a6 238D ldrh r3, [r4, #40] + 5189 00a8 3100 movs r1, r6 + 5190 00aa A06B ldr r0, [r4, #56] + 5191 00ac FFF7FEFF bl HAL_DMA_Start_IT + 5192 .LVL431: + 5193 00b0 061E subs r6, r0, #0 + 5194 .LVL432: +2817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5195 .loc 1 2817 0 + 5196 00b2 2BD0 beq .L364 +2841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5197 .loc 1 2841 0 + 5198 00b4 4123 movs r3, #65 + 5199 00b6 2022 movs r2, #32 + 5200 00b8 E254 strb r2, [r4, r3] +2842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5201 .loc 1 2842 0 + 5202 00ba 0022 movs r2, #0 + 5203 00bc 0133 adds r3, r3, #1 + 5204 00be E254 strb r2, [r4, r3] +2845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5205 .loc 1 2845 0 + 5206 00c0 636C ldr r3, [r4, #68] + 5207 00c2 1021 movs r1, #16 + 5208 00c4 0B43 orrs r3, r1 + 5209 00c6 6364 str r3, [r4, #68] +2848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5210 .loc 1 2848 0 + 5211 00c8 4023 movs r3, #64 + 5212 00ca E254 strb r2, [r4, r3] +2850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5213 .loc 1 2850 0 + 5214 00cc 0126 movs r6, #1 + 5215 00ce 39E0 b .L350 + 5216 .LVL433: + 5217 .L351: +2742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5218 .loc 1 2742 0 + 5219 00d0 8023 movs r3, #128 + 5220 00d2 9B00 lsls r3, r3, #2 + 5221 00d4 6364 str r3, [r4, #68] +2743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5222 .loc 1 2743 0 + 5223 00d6 0126 movs r6, #1 + 5224 00d8 34E0 b .L350 + 5225 .LVL434: + 5226 .L353: +2774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + ARM GAS /tmp/ccskJbbb.s page 220 + + + 5227 .loc 1 2774 0 + 5228 00da 638D ldrh r3, [r4, #42] + 5229 00dc 2385 strh r3, [r4, #40] + 5230 .LVL435: +2775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5231 .loc 1 2775 0 + 5232 00de 8023 movs r3, #128 + 5233 00e0 9B04 lsls r3, r3, #18 + 5234 00e2 9946 mov r9, r3 + 5235 00e4 C5E7 b .L354 + 5236 .LVL436: + 5237 .L363: +2782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5238 .loc 1 2782 0 + 5239 00e6 4023 movs r3, #64 + 5240 00e8 0022 movs r2, #0 + 5241 00ea E254 strb r2, [r4, r3] +2783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5242 .loc 1 2783 0 + 5243 00ec 0126 movs r6, #1 + 5244 00ee 29E0 b .L350 + 5245 .L356: +2805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5246 .loc 1 2805 0 + 5247 00f0 4123 movs r3, #65 + 5248 00f2 2022 movs r2, #32 + 5249 00f4 E254 strb r2, [r4, r3] +2806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5250 .loc 1 2806 0 + 5251 00f6 0022 movs r2, #0 + 5252 00f8 0133 adds r3, r3, #1 + 5253 00fa E254 strb r2, [r4, r3] +2809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5254 .loc 1 2809 0 + 5255 00fc 636C ldr r3, [r4, #68] + 5256 00fe 8021 movs r1, #128 + 5257 0100 0B43 orrs r3, r1 + 5258 0102 6364 str r3, [r4, #68] +2812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5259 .loc 1 2812 0 + 5260 0104 4023 movs r3, #64 + 5261 0106 E254 strb r2, [r4, r3] +2814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5262 .loc 1 2814 0 + 5263 0108 0126 movs r6, #1 + 5264 010a 1BE0 b .L350 + 5265 .LVL437: + 5266 .L364: +2821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5267 .loc 1 2821 0 + 5268 010c 228D ldrh r2, [r4, #40] + 5269 010e D2B2 uxtb r2, r2 + 5270 0110 0027 movs r7, #0 + 5271 0112 0097 str r7, [sp] + 5272 0114 4B46 mov r3, r9 + 5273 0116 0399 ldr r1, [sp, #12] + 5274 0118 2000 movs r0, r4 + ARM GAS /tmp/ccskJbbb.s page 221 + + + 5275 .LVL438: + 5276 011a FFF7FEFF bl I2C_TransferConfig + 5277 .LVL439: +2824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5278 .loc 1 2824 0 + 5279 011e 638D ldrh r3, [r4, #42] + 5280 0120 228D ldrh r2, [r4, #40] + 5281 0122 9B1A subs r3, r3, r2 + 5282 0124 9BB2 uxth r3, r3 + 5283 0126 6385 strh r3, [r4, #42] +2827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5284 .loc 1 2827 0 + 5285 0128 4023 movs r3, #64 + 5286 012a E754 strb r7, [r4, r3] +2833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5287 .loc 1 2833 0 + 5288 012c 1121 movs r1, #17 + 5289 012e 2000 movs r0, r4 + 5290 0130 FFF7FEFF bl I2C_Enable_IRQ + 5291 .LVL440: +2836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5292 .loc 1 2836 0 + 5293 0134 2268 ldr r2, [r4] + 5294 0136 1168 ldr r1, [r2] + 5295 0138 8023 movs r3, #128 + 5296 013a DB01 lsls r3, r3, #7 + 5297 013c 0B43 orrs r3, r1 + 5298 013e 1360 str r3, [r2] +2853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5299 .loc 1 2853 0 + 5300 0140 00E0 b .L350 + 5301 .LVL441: + 5302 .L359: +2857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5303 .loc 1 2857 0 + 5304 0142 0226 movs r6, #2 + 5305 .LVL442: + 5306 .L350: +2859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5307 .loc 1 2859 0 + 5308 0144 3000 movs r0, r6 + 5309 0146 06B0 add sp, sp, #24 + 5310 @ sp needed + 5311 .LVL443: + 5312 0148 04BC pop {r2} + 5313 014a 9146 mov r9, r2 + 5314 014c F0BD pop {r4, r5, r6, r7, pc} + 5315 .LVL444: + 5316 .L360: +2748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5317 .loc 1 2748 0 + 5318 014e 0226 movs r6, #2 + 5319 0150 F8E7 b .L350 + 5320 .L361: +2752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5321 .loc 1 2752 0 + 5322 0152 0226 movs r6, #2 + ARM GAS /tmp/ccskJbbb.s page 222 + + + 5323 0154 F6E7 b .L350 + 5324 .L366: + 5325 0156 C046 .align 2 + 5326 .L365: + 5327 0158 0000FFFF .word -65536 + 5328 015c 00000000 .word I2C_Master_ISR_DMA + 5329 0160 00000000 .word I2C_DMAMasterTransmitCplt + 5330 0164 00000000 .word I2C_DMAError + 5331 .cfi_endproc + 5332 .LFE60: + 5334 .section .text.HAL_I2C_Mem_Read_DMA,"ax",%progbits + 5335 .align 1 + 5336 .global HAL_I2C_Mem_Read_DMA + 5337 .syntax unified + 5338 .code 16 + 5339 .thumb_func + 5340 .fpu softvfp + 5342 HAL_I2C_Mem_Read_DMA: + 5343 .LFB61: +2874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5344 .loc 1 2874 0 + 5345 .cfi_startproc + 5346 @ args = 8, pretend = 0, frame = 16 + 5347 @ frame_needed = 0, uses_anonymous_args = 0 + 5348 .LVL445: + 5349 0000 F0B5 push {r4, r5, r6, r7, lr} + 5350 .LCFI44: + 5351 .cfi_def_cfa_offset 20 + 5352 .cfi_offset 4, -20 + 5353 .cfi_offset 5, -16 + 5354 .cfi_offset 6, -12 + 5355 .cfi_offset 7, -8 + 5356 .cfi_offset 14, -4 + 5357 0002 CE46 mov lr, r9 + 5358 0004 00B5 push {lr} + 5359 .LCFI45: + 5360 .cfi_def_cfa_offset 24 + 5361 .cfi_offset 9, -24 + 5362 0006 86B0 sub sp, sp, #24 + 5363 .LCFI46: + 5364 .cfi_def_cfa_offset 48 + 5365 0008 0400 movs r4, r0 + 5366 000a 0391 str r1, [sp, #12] + 5367 000c 0492 str r2, [sp, #16] + 5368 000e 0593 str r3, [sp, #20] + 5369 0010 0CAB add r3, sp, #48 + 5370 .LVL446: + 5371 0012 40CB ldmia r3!, {r6} + 5372 .LVL447: + 5373 0014 1F88 ldrh r7, [r3] +2882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5374 .loc 1 2882 0 + 5375 0016 4123 movs r3, #65 + 5376 .LVL448: + 5377 0018 C35C ldrb r3, [r0, r3] + 5378 001a 202B cmp r3, #32 + 5379 001c 00D0 beq .LCB5451 + ARM GAS /tmp/ccskJbbb.s page 223 + + + 5380 001e 91E0 b .L377 @long jump + 5381 .LCB5451: +2884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5382 .loc 1 2884 0 + 5383 0020 002E cmp r6, #0 + 5384 0022 55D0 beq .L369 +2884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5385 .loc 1 2884 0 is_stmt 0 discriminator 1 + 5386 0024 002F cmp r7, #0 + 5387 0026 53D0 beq .L369 +2890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5388 .loc 1 2890 0 is_stmt 1 + 5389 0028 0368 ldr r3, [r0] + 5390 002a 9B69 ldr r3, [r3, #24] + 5391 002c 1B04 lsls r3, r3, #16 + 5392 002e 00D5 bpl .LCB5461 + 5393 0030 8EE0 b .L378 @long jump + 5394 .LCB5461: +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5395 .loc 1 2896 0 + 5396 0032 4023 movs r3, #64 + 5397 0034 C35C ldrb r3, [r0, r3] + 5398 0036 012B cmp r3, #1 + 5399 0038 00D1 bne .LCB5465 + 5400 003a 8BE0 b .L379 @long jump + 5401 .LCB5465: +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5402 .loc 1 2896 0 is_stmt 0 discriminator 2 + 5403 003c 4025 movs r5, #64 + 5404 003e 0123 movs r3, #1 + 5405 0040 4355 strb r3, [r0, r5] +2899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5406 .loc 1 2899 0 is_stmt 1 discriminator 2 + 5407 0042 FFF7FEFF bl HAL_GetTick + 5408 .LVL449: +2901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MEM; + 5409 .loc 1 2901 0 discriminator 2 + 5410 0046 4123 movs r3, #65 + 5411 0048 2222 movs r2, #34 + 5412 004a E254 strb r2, [r4, r3] +2902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5413 .loc 1 2902 0 discriminator 2 + 5414 004c 0133 adds r3, r3, #1 + 5415 004e E554 strb r5, [r4, r3] +2903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5416 .loc 1 2903 0 discriminator 2 + 5417 0050 0023 movs r3, #0 + 5418 0052 6364 str r3, [r4, #68] +2906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5419 .loc 1 2906 0 discriminator 2 + 5420 0054 6662 str r6, [r4, #36] +2907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 5421 .loc 1 2907 0 discriminator 2 + 5422 0056 6785 strh r7, [r4, #42] +2908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 5423 .loc 1 2908 0 discriminator 2 + 5424 0058 3F4B ldr r3, .L383 + ARM GAS /tmp/ccskJbbb.s page 224 + + + 5425 005a E362 str r3, [r4, #44] +2909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5426 .loc 1 2909 0 discriminator 2 + 5427 005c 3F4B ldr r3, .L383+4 + 5428 005e 6363 str r3, [r4, #52] +2911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5429 .loc 1 2911 0 discriminator 2 + 5430 0060 638D ldrh r3, [r4, #42] + 5431 0062 9BB2 uxth r3, r3 + 5432 0064 FF2B cmp r3, #255 + 5433 0066 38D9 bls .L371 +2913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 5434 .loc 1 2913 0 + 5435 0068 FF23 movs r3, #255 + 5436 006a 2385 strh r3, [r4, #40] + 5437 .LVL450: +2914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5438 .loc 1 2914 0 + 5439 006c 8023 movs r3, #128 + 5440 006e 5B04 lsls r3, r3, #17 + 5441 0070 9946 mov r9, r3 + 5442 .LVL451: + 5443 .L372: +2923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5444 .loc 1 2923 0 + 5445 0072 0190 str r0, [sp, #4] + 5446 0074 1923 movs r3, #25 + 5447 0076 0093 str r3, [sp] + 5448 0078 059B ldr r3, [sp, #20] + 5449 007a 049A ldr r2, [sp, #16] + 5450 007c 0399 ldr r1, [sp, #12] + 5451 007e 2000 movs r0, r4 + 5452 .LVL452: + 5453 0080 FFF7FEFF bl I2C_RequestMemoryRead + 5454 .LVL453: + 5455 0084 0028 cmp r0, #0 + 5456 0086 2ED1 bne .L381 +2930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5457 .loc 1 2930 0 + 5458 0088 E36B ldr r3, [r4, #60] + 5459 008a 002B cmp r3, #0 + 5460 008c 30D0 beq .L374 +2933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5461 .loc 1 2933 0 + 5462 008e 344A ldr r2, .L383+8 + 5463 0090 9A62 str r2, [r3, #40] +2936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5464 .loc 1 2936 0 + 5465 0092 E36B ldr r3, [r4, #60] + 5466 0094 334A ldr r2, .L383+12 + 5467 0096 1A63 str r2, [r3, #48] +2939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 5468 .loc 1 2939 0 + 5469 0098 E26B ldr r2, [r4, #60] + 5470 009a 0023 movs r3, #0 + 5471 009c D362 str r3, [r2, #44] +2940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 225 + + + 5472 .loc 1 2940 0 + 5473 009e E26B ldr r2, [r4, #60] + 5474 00a0 5363 str r3, [r2, #52] +2943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5475 .loc 1 2943 0 + 5476 00a2 2168 ldr r1, [r4] + 5477 00a4 2431 adds r1, r1, #36 + 5478 00a6 238D ldrh r3, [r4, #40] + 5479 00a8 3200 movs r2, r6 + 5480 00aa E06B ldr r0, [r4, #60] + 5481 00ac FFF7FEFF bl HAL_DMA_Start_IT + 5482 .LVL454: + 5483 00b0 061E subs r6, r0, #0 + 5484 .LVL455: +2960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5485 .loc 1 2960 0 + 5486 00b2 2BD0 beq .L382 +2983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5487 .loc 1 2983 0 + 5488 00b4 4123 movs r3, #65 + 5489 00b6 2022 movs r2, #32 + 5490 00b8 E254 strb r2, [r4, r3] +2984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5491 .loc 1 2984 0 + 5492 00ba 0022 movs r2, #0 + 5493 00bc 0133 adds r3, r3, #1 + 5494 00be E254 strb r2, [r4, r3] +2987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5495 .loc 1 2987 0 + 5496 00c0 636C ldr r3, [r4, #68] + 5497 00c2 1021 movs r1, #16 + 5498 00c4 0B43 orrs r3, r1 + 5499 00c6 6364 str r3, [r4, #68] +2990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5500 .loc 1 2990 0 + 5501 00c8 4023 movs r3, #64 + 5502 00ca E254 strb r2, [r4, r3] +2992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5503 .loc 1 2992 0 + 5504 00cc 0126 movs r6, #1 + 5505 00ce 3AE0 b .L368 + 5506 .LVL456: + 5507 .L369: +2886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5508 .loc 1 2886 0 + 5509 00d0 8023 movs r3, #128 + 5510 00d2 9B00 lsls r3, r3, #2 + 5511 00d4 6364 str r3, [r4, #68] +2887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5512 .loc 1 2887 0 + 5513 00d6 0126 movs r6, #1 + 5514 00d8 35E0 b .L368 + 5515 .LVL457: + 5516 .L371: +2918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_AUTOEND_MODE; + 5517 .loc 1 2918 0 + 5518 00da 638D ldrh r3, [r4, #42] + ARM GAS /tmp/ccskJbbb.s page 226 + + + 5519 00dc 2385 strh r3, [r4, #40] + 5520 .LVL458: +2919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5521 .loc 1 2919 0 + 5522 00de 8023 movs r3, #128 + 5523 00e0 9B04 lsls r3, r3, #18 + 5524 00e2 9946 mov r9, r3 + 5525 00e4 C5E7 b .L372 + 5526 .LVL459: + 5527 .L381: +2926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 5528 .loc 1 2926 0 + 5529 00e6 4023 movs r3, #64 + 5530 00e8 0022 movs r2, #0 + 5531 00ea E254 strb r2, [r4, r3] +2927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5532 .loc 1 2927 0 + 5533 00ec 0126 movs r6, #1 + 5534 00ee 2AE0 b .L368 + 5535 .L374: +2948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 5536 .loc 1 2948 0 + 5537 00f0 4123 movs r3, #65 + 5538 00f2 2022 movs r2, #32 + 5539 00f4 E254 strb r2, [r4, r3] +2949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5540 .loc 1 2949 0 + 5541 00f6 0022 movs r2, #0 + 5542 00f8 0133 adds r3, r3, #1 + 5543 00fa E254 strb r2, [r4, r3] +2952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5544 .loc 1 2952 0 + 5545 00fc 636C ldr r3, [r4, #68] + 5546 00fe 8021 movs r1, #128 + 5547 0100 0B43 orrs r3, r1 + 5548 0102 6364 str r3, [r4, #68] +2955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5549 .loc 1 2955 0 + 5550 0104 4023 movs r3, #64 + 5551 0106 E254 strb r2, [r4, r3] +2957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5552 .loc 1 2957 0 + 5553 0108 0126 movs r6, #1 + 5554 010a 1CE0 b .L368 + 5555 .LVL460: + 5556 .L382: +2963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5557 .loc 1 2963 0 + 5558 010c 228D ldrh r2, [r4, #40] + 5559 010e D2B2 uxtb r2, r2 + 5560 0110 154B ldr r3, .L383+16 + 5561 0112 0093 str r3, [sp] + 5562 0114 4B46 mov r3, r9 + 5563 0116 0399 ldr r1, [sp, #12] + 5564 0118 2000 movs r0, r4 + 5565 .LVL461: + 5566 011a FFF7FEFF bl I2C_TransferConfig + ARM GAS /tmp/ccskJbbb.s page 227 + + + 5567 .LVL462: +2966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5568 .loc 1 2966 0 + 5569 011e 638D ldrh r3, [r4, #42] + 5570 0120 228D ldrh r2, [r4, #40] + 5571 0122 9B1A subs r3, r3, r2 + 5572 0124 9BB2 uxth r3, r3 + 5573 0126 6385 strh r3, [r4, #42] +2969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5574 .loc 1 2969 0 + 5575 0128 4023 movs r3, #64 + 5576 012a 0022 movs r2, #0 + 5577 012c E254 strb r2, [r4, r3] +2975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5578 .loc 1 2975 0 + 5579 012e 1121 movs r1, #17 + 5580 0130 2000 movs r0, r4 + 5581 0132 FFF7FEFF bl I2C_Enable_IRQ + 5582 .LVL463: +2978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5583 .loc 1 2978 0 + 5584 0136 2268 ldr r2, [r4] + 5585 0138 1168 ldr r1, [r2] + 5586 013a 8023 movs r3, #128 + 5587 013c 1B02 lsls r3, r3, #8 + 5588 013e 0B43 orrs r3, r1 + 5589 0140 1360 str r3, [r2] +2995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5590 .loc 1 2995 0 + 5591 0142 00E0 b .L368 + 5592 .LVL464: + 5593 .L377: +2999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5594 .loc 1 2999 0 + 5595 0144 0226 movs r6, #2 + 5596 .LVL465: + 5597 .L368: +3001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5598 .loc 1 3001 0 + 5599 0146 3000 movs r0, r6 + 5600 0148 06B0 add sp, sp, #24 + 5601 @ sp needed + 5602 .LVL466: + 5603 014a 04BC pop {r2} + 5604 014c 9146 mov r9, r2 + 5605 014e F0BD pop {r4, r5, r6, r7, pc} + 5606 .LVL467: + 5607 .L378: +2892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5608 .loc 1 2892 0 + 5609 0150 0226 movs r6, #2 + 5610 0152 F8E7 b .L368 + 5611 .L379: +2896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5612 .loc 1 2896 0 + 5613 0154 0226 movs r6, #2 + 5614 0156 F6E7 b .L368 + ARM GAS /tmp/ccskJbbb.s page 228 + + + 5615 .L384: + 5616 .align 2 + 5617 .L383: + 5618 0158 0000FFFF .word -65536 + 5619 015c 00000000 .word I2C_Master_ISR_DMA + 5620 0160 00000000 .word I2C_DMAMasterReceiveCplt + 5621 0164 00000000 .word I2C_DMAError + 5622 0168 00240080 .word -2147474432 + 5623 .cfi_endproc + 5624 .LFE61: + 5626 .section .text.HAL_I2C_IsDeviceReady,"ax",%progbits + 5627 .align 1 + 5628 .global HAL_I2C_IsDeviceReady + 5629 .syntax unified + 5630 .code 16 + 5631 .thumb_func + 5632 .fpu softvfp + 5634 HAL_I2C_IsDeviceReady: + 5635 .LFB62: +3015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tickstart; + 5636 .loc 1 3015 0 + 5637 .cfi_startproc + 5638 @ args = 0, pretend = 0, frame = 16 + 5639 @ frame_needed = 0, uses_anonymous_args = 0 + 5640 .LVL468: + 5641 0000 F0B5 push {r4, r5, r6, r7, lr} + 5642 .LCFI47: + 5643 .cfi_def_cfa_offset 20 + 5644 .cfi_offset 4, -20 + 5645 .cfi_offset 5, -16 + 5646 .cfi_offset 6, -12 + 5647 .cfi_offset 7, -8 + 5648 .cfi_offset 14, -4 + 5649 0002 87B0 sub sp, sp, #28 + 5650 .LCFI48: + 5651 .cfi_def_cfa_offset 48 + 5652 0004 0600 movs r6, r0 + 5653 0006 0391 str r1, [sp, #12] + 5654 0008 1500 movs r5, r2 + 5655 000a 1F00 movs r7, r3 +3018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5656 .loc 1 3018 0 + 5657 000c 0023 movs r3, #0 + 5658 .LVL469: + 5659 000e 0593 str r3, [sp, #20] +3023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5660 .loc 1 3023 0 + 5661 0010 4133 adds r3, r3, #65 + 5662 0012 C35C ldrb r3, [r0, r3] + 5663 0014 202B cmp r3, #32 + 5664 0016 00D0 beq .LCB5741 + 5665 0018 A2E0 b .L396 @long jump + 5666 .LCB5741: +3025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5667 .loc 1 3025 0 + 5668 001a 0368 ldr r3, [r0] + 5669 001c 9B69 ldr r3, [r3, #24] + ARM GAS /tmp/ccskJbbb.s page 229 + + + 5670 001e 1B04 lsls r3, r3, #16 + 5671 0020 00D5 bpl .LCB5747 + 5672 0022 A0E0 b .L397 @long jump + 5673 .LCB5747: +3031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5674 .loc 1 3031 0 + 5675 0024 4023 movs r3, #64 + 5676 0026 C35C ldrb r3, [r0, r3] + 5677 0028 012B cmp r3, #1 + 5678 002a 00D1 bne .LCB5751 + 5679 002c 9DE0 b .L398 @long jump + 5680 .LCB5751: +3031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5681 .loc 1 3031 0 is_stmt 0 discriminator 2 + 5682 002e 4023 movs r3, #64 + 5683 0030 0122 movs r2, #1 + 5684 .LVL470: + 5685 0032 C254 strb r2, [r0, r3] +3033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5686 .loc 1 3033 0 is_stmt 1 discriminator 2 + 5687 0034 0133 adds r3, r3, #1 + 5688 0036 2332 adds r2, r2, #35 + 5689 0038 C254 strb r2, [r0, r3] +3034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5690 .loc 1 3034 0 discriminator 2 + 5691 003a 0023 movs r3, #0 + 5692 003c 4364 str r3, [r0, #68] + 5693 .LVL471: + 5694 .L395: +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5695 .loc 1 3039 0 + 5696 003e F368 ldr r3, [r6, #12] + 5697 0040 012B cmp r3, #1 + 5698 0042 18D0 beq .L402 +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5699 .loc 1 3039 0 is_stmt 0 discriminator 2 + 5700 0044 039B ldr r3, [sp, #12] + 5701 0046 9A05 lsls r2, r3, #22 + 5702 0048 920D lsrs r2, r2, #22 + 5703 004a A023 movs r3, #160 + 5704 004c 9B01 lsls r3, r3, #6 + 5705 004e 1343 orrs r3, r2 + 5706 .L388: +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5707 .loc 1 3039 0 discriminator 4 + 5708 0050 3268 ldr r2, [r6] + 5709 0052 5360 str r3, [r2, #4] +3043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5710 .loc 1 3043 0 is_stmt 1 discriminator 4 + 5711 0054 FFF7FEFF bl HAL_GetTick + 5712 .LVL472: + 5713 0058 0400 movs r4, r0 + 5714 .LVL473: +3045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 5715 .loc 1 3045 0 discriminator 4 + 5716 005a 3268 ldr r2, [r6] + 5717 005c 9169 ldr r1, [r2, #24] + ARM GAS /tmp/ccskJbbb.s page 230 + + + 5718 005e 2023 movs r3, #32 + 5719 0060 0B40 ands r3, r1 + 5720 0062 591E subs r1, r3, #1 + 5721 0064 8B41 sbcs r3, r3, r1 + 5722 0066 D9B2 uxtb r1, r3 + 5723 .LVL474: +3046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5724 .loc 1 3046 0 discriminator 4 + 5725 0068 9369 ldr r3, [r2, #24] + 5726 006a 1022 movs r2, #16 + 5727 006c 1A40 ands r2, r3 + 5728 006e 531E subs r3, r2, #1 + 5729 0070 9A41 sbcs r2, r2, r3 + 5730 0072 D3B2 uxtb r3, r2 + 5731 .LVL475: +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5732 .loc 1 3048 0 discriminator 4 + 5733 0074 12E0 b .L389 + 5734 .LVL476: + 5735 .L402: +3039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5736 .loc 1 3039 0 discriminator 1 + 5737 0076 039B ldr r3, [sp, #12] + 5738 0078 9A05 lsls r2, r3, #22 + 5739 007a 920D lsrs r2, r2, #22 + 5740 007c 3F4B ldr r3, .L406 + 5741 007e 1343 orrs r3, r2 + 5742 0080 E6E7 b .L388 + 5743 .LVL477: + 5744 .L390: +3067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF); + 5745 .loc 1 3067 0 + 5746 0082 3268 ldr r2, [r6] + 5747 0084 9169 ldr r1, [r2, #24] + 5748 0086 2023 movs r3, #32 + 5749 0088 0B40 ands r3, r1 + 5750 008a 591E subs r1, r3, #1 + 5751 008c 8B41 sbcs r3, r3, r1 + 5752 008e D9B2 uxtb r1, r3 + 5753 .LVL478: +3068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5754 .loc 1 3068 0 + 5755 0090 9269 ldr r2, [r2, #24] + 5756 0092 1023 movs r3, #16 + 5757 0094 1340 ands r3, r2 + 5758 0096 5A1E subs r2, r3, #1 + 5759 0098 9341 sbcs r3, r3, r2 + 5760 009a DBB2 uxtb r3, r3 + 5761 .LVL479: + 5762 .L389: +3048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5763 .loc 1 3048 0 + 5764 009c 0B43 orrs r3, r1 + 5765 .LVL480: + 5766 009e 13D1 bne .L403 +3050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5767 .loc 1 3050 0 + ARM GAS /tmp/ccskJbbb.s page 231 + + + 5768 00a0 7B1C adds r3, r7, #1 + 5769 00a2 EED0 beq .L390 +3052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5770 .loc 1 3052 0 + 5771 00a4 FFF7FEFF bl HAL_GetTick + 5772 .LVL481: + 5773 00a8 001B subs r0, r0, r4 + 5774 00aa B842 cmp r0, r7 + 5775 00ac 01D8 bhi .L391 +3052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5776 .loc 1 3052 0 is_stmt 0 discriminator 1 + 5777 00ae 002F cmp r7, #0 + 5778 00b0 E7D1 bne .L390 + 5779 .L391: +3055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5780 .loc 1 3055 0 is_stmt 1 + 5781 00b2 2022 movs r2, #32 + 5782 00b4 4123 movs r3, #65 + 5783 00b6 F254 strb r2, [r6, r3] +3058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5784 .loc 1 3058 0 + 5785 00b8 736C ldr r3, [r6, #68] + 5786 00ba 1343 orrs r3, r2 + 5787 00bc 7364 str r3, [r6, #68] +3061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5788 .loc 1 3061 0 + 5789 00be 4023 movs r3, #64 + 5790 00c0 0022 movs r2, #0 + 5791 00c2 F254 strb r2, [r6, r3] +3063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5792 .loc 1 3063 0 + 5793 00c4 0120 movs r0, #1 + 5794 00c6 4CE0 b .L386 + 5795 .LVL482: + 5796 .L403: +3072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5797 .loc 1 3072 0 + 5798 00c8 3368 ldr r3, [r6] + 5799 00ca 9B69 ldr r3, [r3, #24] + 5800 00cc DB06 lsls r3, r3, #27 + 5801 00ce 22D5 bpl .L404 +3094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5802 .loc 1 3094 0 + 5803 00d0 0094 str r4, [sp] + 5804 00d2 3B00 movs r3, r7 + 5805 00d4 0022 movs r2, #0 + 5806 00d6 2021 movs r1, #32 + 5807 .LVL483: + 5808 00d8 3000 movs r0, r6 + 5809 00da FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5810 .LVL484: + 5811 00de 0028 cmp r0, #0 + 5812 00e0 47D1 bne .L400 +3100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5813 .loc 1 3100 0 + 5814 00e2 3368 ldr r3, [r6] + 5815 00e4 1022 movs r2, #16 + ARM GAS /tmp/ccskJbbb.s page 232 + + + 5816 00e6 DA61 str r2, [r3, #28] +3103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5817 .loc 1 3103 0 + 5818 00e8 3368 ldr r3, [r6] + 5819 00ea 1032 adds r2, r2, #16 + 5820 00ec DA61 str r2, [r3, #28] +3107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5821 .loc 1 3107 0 + 5822 00ee 059B ldr r3, [sp, #20] + 5823 00f0 AB42 cmp r3, r5 + 5824 00f2 22D0 beq .L405 + 5825 .L394: +3123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5826 .loc 1 3123 0 + 5827 00f4 059B ldr r3, [sp, #20] + 5828 00f6 0133 adds r3, r3, #1 + 5829 00f8 0593 str r3, [sp, #20] +3125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5830 .loc 1 3125 0 + 5831 00fa 059B ldr r3, [sp, #20] + 5832 00fc AB42 cmp r3, r5 + 5833 00fe 9ED3 bcc .L395 +3128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5834 .loc 1 3128 0 + 5835 0100 2022 movs r2, #32 + 5836 0102 4123 movs r3, #65 + 5837 0104 F254 strb r2, [r6, r3] +3131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5838 .loc 1 3131 0 + 5839 0106 736C ldr r3, [r6, #68] + 5840 0108 1343 orrs r3, r2 + 5841 010a 7364 str r3, [r6, #68] +3134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5842 .loc 1 3134 0 + 5843 010c 4023 movs r3, #64 + 5844 010e 0022 movs r2, #0 + 5845 0110 F254 strb r2, [r6, r3] +3136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5846 .loc 1 3136 0 + 5847 0112 0120 movs r0, #1 + 5848 0114 25E0 b .L386 + 5849 .LVL485: + 5850 .L404: +3075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5851 .loc 1 3075 0 + 5852 0116 0094 str r4, [sp] + 5853 0118 3B00 movs r3, r7 + 5854 011a 0022 movs r2, #0 + 5855 011c 2021 movs r1, #32 + 5856 .LVL486: + 5857 011e 3000 movs r0, r6 + 5858 0120 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5859 .LVL487: + 5860 0124 0028 cmp r0, #0 + 5861 0126 22D1 bne .L399 +3081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5862 .loc 1 3081 0 + ARM GAS /tmp/ccskJbbb.s page 233 + + + 5863 0128 3268 ldr r2, [r6] + 5864 012a 2023 movs r3, #32 + 5865 012c D361 str r3, [r2, #28] +3084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5866 .loc 1 3084 0 + 5867 012e 4122 movs r2, #65 + 5868 0130 B354 strb r3, [r6, r2] +3087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5869 .loc 1 3087 0 + 5870 0132 2033 adds r3, r3, #32 + 5871 0134 0022 movs r2, #0 + 5872 0136 F254 strb r2, [r6, r3] +3089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5873 .loc 1 3089 0 + 5874 0138 13E0 b .L386 + 5875 .L405: +3110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5876 .loc 1 3110 0 + 5877 013a 3268 ldr r2, [r6] + 5878 013c 5168 ldr r1, [r2, #4] + 5879 013e 8023 movs r3, #128 + 5880 0140 DB01 lsls r3, r3, #7 + 5881 0142 0B43 orrs r3, r1 + 5882 0144 5360 str r3, [r2, #4] +3113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5883 .loc 1 3113 0 + 5884 0146 0094 str r4, [sp] + 5885 0148 3B00 movs r3, r7 + 5886 014a 0022 movs r2, #0 + 5887 014c 2021 movs r1, #32 + 5888 014e 3000 movs r0, r6 + 5889 0150 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout + 5890 .LVL488: + 5891 0154 0028 cmp r0, #0 + 5892 0156 0ED1 bne .L401 +3119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5893 .loc 1 3119 0 + 5894 0158 3368 ldr r3, [r6] + 5895 015a 2022 movs r2, #32 + 5896 015c DA61 str r2, [r3, #28] + 5897 015e C9E7 b .L394 + 5898 .LVL489: + 5899 .L396: +3140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5900 .loc 1 3140 0 + 5901 0160 0220 movs r0, #2 + 5902 .LVL490: + 5903 .L386: +3142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5904 .loc 1 3142 0 + 5905 0162 07B0 add sp, sp, #28 + 5906 @ sp needed + 5907 .LVL491: + 5908 .LVL492: + 5909 .LVL493: + 5910 0164 F0BD pop {r4, r5, r6, r7, pc} + 5911 .LVL494: + ARM GAS /tmp/ccskJbbb.s page 234 + + + 5912 .L397: +3027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5913 .loc 1 3027 0 + 5914 0166 0220 movs r0, #2 + 5915 .LVL495: + 5916 0168 FBE7 b .L386 + 5917 .LVL496: + 5918 .L398: +3031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5919 .loc 1 3031 0 + 5920 016a 0220 movs r0, #2 + 5921 .LVL497: + 5922 016c F9E7 b .L386 + 5923 .LVL498: + 5924 .L399: +3077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5925 .loc 1 3077 0 + 5926 016e 0120 movs r0, #1 + 5927 0170 F7E7 b .L386 + 5928 .L400: +3096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5929 .loc 1 3096 0 + 5930 0172 0120 movs r0, #1 + 5931 0174 F5E7 b .L386 + 5932 .L401: +3115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 5933 .loc 1 3115 0 + 5934 0176 0120 movs r0, #1 + 5935 0178 F3E7 b .L386 + 5936 .L407: + 5937 017a C046 .align 2 + 5938 .L406: + 5939 017c 00200002 .word 33562624 + 5940 .cfi_endproc + 5941 .LFE62: + 5943 .section .text.HAL_I2C_Master_Seq_Transmit_IT,"ax",%progbits + 5944 .align 1 + 5945 .global HAL_I2C_Master_Seq_Transmit_IT + 5946 .syntax unified + 5947 .code 16 + 5948 .thumb_func + 5949 .fpu softvfp + 5951 HAL_I2C_Master_Seq_Transmit_IT: + 5952 .LFB63: +3157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 5953 .loc 1 3157 0 + 5954 .cfi_startproc + 5955 @ args = 4, pretend = 0, frame = 0 + 5956 @ frame_needed = 0, uses_anonymous_args = 0 + 5957 .LVL499: + 5958 0000 70B5 push {r4, r5, r6, lr} + 5959 .LCFI49: + 5960 .cfi_def_cfa_offset 16 + 5961 .cfi_offset 4, -16 + 5962 .cfi_offset 5, -12 + 5963 .cfi_offset 6, -8 + 5964 .cfi_offset 14, -4 + ARM GAS /tmp/ccskJbbb.s page 235 + + + 5965 0002 82B0 sub sp, sp, #8 + 5966 .LCFI50: + 5967 .cfi_def_cfa_offset 24 + 5968 0004 0400 movs r4, r0 + 5969 0006 0D00 movs r5, r1 + 5970 .LVL500: +3164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 5971 .loc 1 3164 0 + 5972 0008 4121 movs r1, #65 + 5973 .LVL501: + 5974 000a 415C ldrb r1, [r0, r1] + 5975 000c 2029 cmp r1, #32 + 5976 000e 49D1 bne .L414 +3167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5977 .loc 1 3167 0 + 5978 0010 2031 adds r1, r1, #32 + 5979 0012 415C ldrb r1, [r0, r1] + 5980 0014 0129 cmp r1, #1 + 5981 0016 48D0 beq .L415 +3167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5982 .loc 1 3167 0 is_stmt 0 discriminator 2 + 5983 0018 4021 movs r1, #64 + 5984 001a 0120 movs r0, #1 + 5985 .LVL502: + 5986 001c 6054 strb r0, [r4, r1] +3169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 5987 .loc 1 3169 0 is_stmt 1 discriminator 2 + 5988 001e 0131 adds r1, r1, #1 + 5989 0020 2030 adds r0, r0, #32 + 5990 0022 6054 strb r0, [r4, r1] +3170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 5991 .loc 1 3170 0 discriminator 2 + 5992 0024 0131 adds r1, r1, #1 + 5993 0026 1138 subs r0, r0, #17 + 5994 0028 6054 strb r0, [r4, r1] +3171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 5995 .loc 1 3171 0 discriminator 2 + 5996 002a 0021 movs r1, #0 + 5997 002c 6164 str r1, [r4, #68] +3174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 5998 .loc 1 3174 0 discriminator 2 + 5999 002e 6262 str r2, [r4, #36] +3175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 6000 .loc 1 3175 0 discriminator 2 + 6001 0030 6385 strh r3, [r4, #42] +3176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 6002 .loc 1 3176 0 discriminator 2 + 6003 0032 069B ldr r3, [sp, #24] + 6004 .LVL503: + 6005 0034 E362 str r3, [r4, #44] + 6006 .LVL504: +3177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6007 .loc 1 3177 0 discriminator 2 + 6008 0036 1E4B ldr r3, .L418 + 6009 0038 6363 str r3, [r4, #52] +3180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6010 .loc 1 3180 0 discriminator 2 + ARM GAS /tmp/ccskJbbb.s page 236 + + + 6011 003a 638D ldrh r3, [r4, #42] + 6012 003c 9BB2 uxth r3, r3 + 6013 003e FF2B cmp r3, #255 + 6014 0040 10D9 bls .L410 +3182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 6015 .loc 1 3182 0 + 6016 0042 FF23 movs r3, #255 + 6017 0044 2385 strh r3, [r4, #40] + 6018 .LVL505: +3183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6019 .loc 1 3183 0 + 6020 0046 8026 movs r6, #128 + 6021 0048 7604 lsls r6, r6, #17 + 6022 .LVL506: + 6023 .L411: +3193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6024 .loc 1 3193 0 + 6025 004a 236B ldr r3, [r4, #48] + 6026 004c 112B cmp r3, #17 + 6027 004e 0DD1 bne .L412 +3193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6028 .loc 1 3193 0 is_stmt 0 discriminator 1 + 6029 0050 069B ldr r3, [sp, #24] + 6030 0052 AA2B cmp r3, #170 + 6031 0054 0AD0 beq .L412 +3193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6032 .loc 1 3193 0 discriminator 3 + 6033 0056 AA23 movs r3, #170 + 6034 0058 1B02 lsls r3, r3, #8 + 6035 005a 069A ldr r2, [sp, #24] + 6036 .LVL507: + 6037 005c 9A42 cmp r2, r3 + 6038 005e 05D0 beq .L412 +3195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6039 .loc 1 3195 0 is_stmt 1 + 6040 0060 0023 movs r3, #0 + 6041 0062 0CE0 b .L413 + 6042 .LVL508: + 6043 .L410: +3187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 6044 .loc 1 3187 0 + 6045 0064 638D ldrh r3, [r4, #42] + 6046 0066 2385 strh r3, [r4, #40] +3188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6047 .loc 1 3188 0 + 6048 0068 E66A ldr r6, [r4, #44] + 6049 .LVL509: + 6050 006a EEE7 b .L411 + 6051 .LVL510: + 6052 .L412: +3200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6053 .loc 1 3200 0 + 6054 006c 2000 movs r0, r4 + 6055 006e FFF7FEFF bl I2C_ConvertOtherXferOptions + 6056 .LVL511: +3203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6057 .loc 1 3203 0 + ARM GAS /tmp/ccskJbbb.s page 237 + + + 6058 0072 638D ldrh r3, [r4, #42] + 6059 0074 9BB2 uxth r3, r3 + 6060 0076 FE2B cmp r3, #254 + 6061 0078 12D8 bhi .L417 +3205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6062 .loc 1 3205 0 + 6063 007a E66A ldr r6, [r4, #44] + 6064 .LVL512: +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6065 .loc 1 3159 0 + 6066 007c 0D4B ldr r3, .L418+4 + 6067 .L413: + 6068 .LVL513: +3210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6069 .loc 1 3210 0 + 6070 007e 228D ldrh r2, [r4, #40] + 6071 0080 D2B2 uxtb r2, r2 + 6072 0082 0093 str r3, [sp] + 6073 0084 3300 movs r3, r6 + 6074 .LVL514: + 6075 0086 2900 movs r1, r5 + 6076 0088 2000 movs r0, r4 + 6077 008a FFF7FEFF bl I2C_TransferConfig + 6078 .LVL515: +3213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6079 .loc 1 3213 0 + 6080 008e 4023 movs r3, #64 + 6081 0090 0022 movs r2, #0 + 6082 0092 E254 strb r2, [r4, r3] +3218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6083 .loc 1 3218 0 + 6084 0094 0121 movs r1, #1 + 6085 0096 2000 movs r0, r4 + 6086 0098 FFF7FEFF bl I2C_Enable_IRQ + 6087 .LVL516: +3220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6088 .loc 1 3220 0 + 6089 009c 0020 movs r0, #0 + 6090 009e 02E0 b .L409 + 6091 .LVL517: + 6092 .L417: +3159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6093 .loc 1 3159 0 + 6094 00a0 044B ldr r3, .L418+4 + 6095 00a2 ECE7 b .L413 + 6096 .LVL518: + 6097 .L414: +3224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6098 .loc 1 3224 0 + 6099 00a4 0220 movs r0, #2 + 6100 .LVL519: + 6101 .L409: +3226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6102 .loc 1 3226 0 + 6103 00a6 02B0 add sp, sp, #8 + 6104 @ sp needed + 6105 .LVL520: + ARM GAS /tmp/ccskJbbb.s page 238 + + + 6106 00a8 70BD pop {r4, r5, r6, pc} + 6107 .LVL521: + 6108 .L415: +3167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6109 .loc 1 3167 0 + 6110 00aa 0220 movs r0, #2 + 6111 .LVL522: + 6112 00ac FBE7 b .L409 + 6113 .L419: + 6114 00ae C046 .align 2 + 6115 .L418: + 6116 00b0 00000000 .word I2C_Master_ISR_IT + 6117 00b4 00200080 .word -2147475456 + 6118 .cfi_endproc + 6119 .LFE63: + 6121 .section .text.HAL_I2C_Master_Seq_Transmit_DMA,"ax",%progbits + 6122 .align 1 + 6123 .global HAL_I2C_Master_Seq_Transmit_DMA + 6124 .syntax unified + 6125 .code 16 + 6126 .thumb_func + 6127 .fpu softvfp + 6129 HAL_I2C_Master_Seq_Transmit_DMA: + 6130 .LFB64: +3241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 6131 .loc 1 3241 0 + 6132 .cfi_startproc + 6133 @ args = 4, pretend = 0, frame = 8 + 6134 @ frame_needed = 0, uses_anonymous_args = 0 + 6135 .LVL523: + 6136 0000 F0B5 push {r4, r5, r6, r7, lr} + 6137 .LCFI51: + 6138 .cfi_def_cfa_offset 20 + 6139 .cfi_offset 4, -20 + 6140 .cfi_offset 5, -16 + 6141 .cfi_offset 6, -12 + 6142 .cfi_offset 7, -8 + 6143 .cfi_offset 14, -4 + 6144 0002 85B0 sub sp, sp, #20 + 6145 .LCFI52: + 6146 .cfi_def_cfa_offset 40 + 6147 0004 0400 movs r4, r0 + 6148 0006 0391 str r1, [sp, #12] + 6149 0008 1500 movs r5, r2 + 6150 .LVL524: +3249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6151 .loc 1 3249 0 + 6152 000a 4122 movs r2, #65 + 6153 .LVL525: + 6154 000c 825C ldrb r2, [r0, r2] + 6155 000e 202A cmp r2, #32 + 6156 0010 00D0 beq .LCB6267 + 6157 0012 9DE0 b .L430 @long jump + 6158 .LCB6267: +3252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6159 .loc 1 3252 0 + 6160 0014 2032 adds r2, r2, #32 + ARM GAS /tmp/ccskJbbb.s page 239 + + + 6161 0016 825C ldrb r2, [r0, r2] + 6162 0018 012A cmp r2, #1 + 6163 001a 00D1 bne .LCB6271 + 6164 001c 9CE0 b .L431 @long jump + 6165 .LCB6271: +3252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6166 .loc 1 3252 0 is_stmt 0 discriminator 2 + 6167 001e 4022 movs r2, #64 + 6168 0020 0121 movs r1, #1 + 6169 .LVL526: + 6170 0022 8154 strb r1, [r0, r2] +3254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 6171 .loc 1 3254 0 is_stmt 1 discriminator 2 + 6172 0024 0132 adds r2, r2, #1 + 6173 0026 2031 adds r1, r1, #32 + 6174 0028 8154 strb r1, [r0, r2] +3255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6175 .loc 1 3255 0 discriminator 2 + 6176 002a 0132 adds r2, r2, #1 + 6177 002c 1139 subs r1, r1, #17 + 6178 002e 8154 strb r1, [r0, r2] +3256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6179 .loc 1 3256 0 discriminator 2 + 6180 0030 0022 movs r2, #0 + 6181 0032 4264 str r2, [r0, #68] +3259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6182 .loc 1 3259 0 discriminator 2 + 6183 0034 4562 str r5, [r0, #36] +3260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 6184 .loc 1 3260 0 discriminator 2 + 6185 0036 4385 strh r3, [r0, #42] +3261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 6186 .loc 1 3261 0 discriminator 2 + 6187 0038 0A9B ldr r3, [sp, #40] + 6188 .LVL527: + 6189 003a C362 str r3, [r0, #44] + 6190 .LVL528: +3262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6191 .loc 1 3262 0 discriminator 2 + 6192 003c 474B ldr r3, .L436 + 6193 003e 4363 str r3, [r0, #52] +3265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6194 .loc 1 3265 0 discriminator 2 + 6195 0040 438D ldrh r3, [r0, #42] + 6196 0042 9BB2 uxth r3, r3 + 6197 0044 FF2B cmp r3, #255 + 6198 0046 10D9 bls .L422 +3267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 6199 .loc 1 3267 0 + 6200 0048 FF23 movs r3, #255 + 6201 004a 0385 strh r3, [r0, #40] + 6202 .LVL529: +3268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6203 .loc 1 3268 0 + 6204 004c 8027 movs r7, #128 + 6205 004e 7F04 lsls r7, r7, #17 + 6206 .LVL530: + ARM GAS /tmp/ccskJbbb.s page 240 + + + 6207 .L423: +3278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6208 .loc 1 3278 0 + 6209 0050 236B ldr r3, [r4, #48] + 6210 0052 112B cmp r3, #17 + 6211 0054 0DD1 bne .L424 +3278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6212 .loc 1 3278 0 is_stmt 0 discriminator 1 + 6213 0056 0A9B ldr r3, [sp, #40] + 6214 0058 AA2B cmp r3, #170 + 6215 005a 0AD0 beq .L424 +3278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6216 .loc 1 3278 0 discriminator 3 + 6217 005c AA23 movs r3, #170 + 6218 005e 1B02 lsls r3, r3, #8 + 6219 0060 0A9A ldr r2, [sp, #40] + 6220 0062 9A42 cmp r2, r3 + 6221 0064 05D0 beq .L424 +3280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6222 .loc 1 3280 0 is_stmt 1 + 6223 0066 0026 movs r6, #0 + 6224 0068 0CE0 b .L425 + 6225 .LVL531: + 6226 .L422: +3272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 6227 .loc 1 3272 0 + 6228 006a 438D ldrh r3, [r0, #42] + 6229 006c 0385 strh r3, [r0, #40] +3273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6230 .loc 1 3273 0 + 6231 006e C76A ldr r7, [r0, #44] + 6232 .LVL532: + 6233 0070 EEE7 b .L423 + 6234 .L424: +3285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6235 .loc 1 3285 0 + 6236 0072 2000 movs r0, r4 + 6237 .LVL533: + 6238 0074 FFF7FEFF bl I2C_ConvertOtherXferOptions + 6239 .LVL534: +3288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6240 .loc 1 3288 0 + 6241 0078 638D ldrh r3, [r4, #42] + 6242 007a 9BB2 uxth r3, r3 + 6243 007c FE2B cmp r3, #254 + 6244 007e 28D8 bhi .L433 +3290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6245 .loc 1 3290 0 + 6246 0080 E76A ldr r7, [r4, #44] + 6247 .LVL535: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6248 .loc 1 3243 0 + 6249 0082 374E ldr r6, .L436+4 + 6250 .L425: + 6251 .LVL536: +3294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6252 .loc 1 3294 0 + ARM GAS /tmp/ccskJbbb.s page 241 + + + 6253 0084 228D ldrh r2, [r4, #40] + 6254 0086 002A cmp r2, #0 + 6255 0088 4ED0 beq .L426 +3296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6256 .loc 1 3296 0 + 6257 008a A36B ldr r3, [r4, #56] + 6258 008c 002B cmp r3, #0 + 6259 008e 22D0 beq .L427 +3299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6260 .loc 1 3299 0 + 6261 0090 344A ldr r2, .L436+8 + 6262 0092 9A62 str r2, [r3, #40] +3302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6263 .loc 1 3302 0 + 6264 0094 A36B ldr r3, [r4, #56] + 6265 0096 344A ldr r2, .L436+12 + 6266 0098 1A63 str r2, [r3, #48] +3305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 6267 .loc 1 3305 0 + 6268 009a A26B ldr r2, [r4, #56] + 6269 009c 0023 movs r3, #0 + 6270 009e D362 str r3, [r2, #44] +3306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6271 .loc 1 3306 0 + 6272 00a0 A26B ldr r2, [r4, #56] + 6273 00a2 5363 str r3, [r2, #52] +3309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6274 .loc 1 3309 0 + 6275 00a4 2268 ldr r2, [r4] + 6276 00a6 2832 adds r2, r2, #40 + 6277 00a8 238D ldrh r3, [r4, #40] + 6278 00aa 2900 movs r1, r5 + 6279 00ac A06B ldr r0, [r4, #56] + 6280 00ae FFF7FEFF bl HAL_DMA_Start_IT + 6281 .LVL537: + 6282 00b2 051E subs r5, r0, #0 + 6283 .LVL538: +3326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6284 .loc 1 3326 0 + 6285 00b4 1DD0 beq .L435 +3349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6286 .loc 1 3349 0 + 6287 00b6 4123 movs r3, #65 + 6288 00b8 2022 movs r2, #32 + 6289 00ba E254 strb r2, [r4, r3] +3350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6290 .loc 1 3350 0 + 6291 00bc 0022 movs r2, #0 + 6292 00be 0133 adds r3, r3, #1 + 6293 00c0 E254 strb r2, [r4, r3] +3353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6294 .loc 1 3353 0 + 6295 00c2 636C ldr r3, [r4, #68] + 6296 00c4 1021 movs r1, #16 + 6297 00c6 0B43 orrs r3, r1 + 6298 00c8 6364 str r3, [r4, #68] +3356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 242 + + + 6299 .loc 1 3356 0 + 6300 00ca 4023 movs r3, #64 + 6301 00cc E254 strb r2, [r4, r3] +3358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6302 .loc 1 3358 0 + 6303 00ce 0125 movs r5, #1 + 6304 00d0 3FE0 b .L421 + 6305 .LVL539: + 6306 .L433: +3243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6307 .loc 1 3243 0 + 6308 00d2 234E ldr r6, .L436+4 + 6309 00d4 D6E7 b .L425 + 6310 .LVL540: + 6311 .L427: +3314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6312 .loc 1 3314 0 + 6313 00d6 4123 movs r3, #65 + 6314 00d8 2022 movs r2, #32 + 6315 00da E254 strb r2, [r4, r3] +3315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6316 .loc 1 3315 0 + 6317 00dc 0022 movs r2, #0 + 6318 00de 0133 adds r3, r3, #1 + 6319 00e0 E254 strb r2, [r4, r3] +3318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6320 .loc 1 3318 0 + 6321 00e2 636C ldr r3, [r4, #68] + 6322 00e4 8021 movs r1, #128 + 6323 00e6 0B43 orrs r3, r1 + 6324 00e8 6364 str r3, [r4, #68] +3321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6325 .loc 1 3321 0 + 6326 00ea 4023 movs r3, #64 + 6327 00ec E254 strb r2, [r4, r3] +3323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6328 .loc 1 3323 0 + 6329 00ee 0125 movs r5, #1 + 6330 .LVL541: + 6331 00f0 2FE0 b .L421 + 6332 .LVL542: + 6333 .L435: +3329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6334 .loc 1 3329 0 + 6335 00f2 228D ldrh r2, [r4, #40] + 6336 00f4 D2B2 uxtb r2, r2 + 6337 00f6 0096 str r6, [sp] + 6338 00f8 3B00 movs r3, r7 + 6339 00fa 0399 ldr r1, [sp, #12] + 6340 00fc 2000 movs r0, r4 + 6341 .LVL543: + 6342 00fe FFF7FEFF bl I2C_TransferConfig + 6343 .LVL544: +3332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6344 .loc 1 3332 0 + 6345 0102 638D ldrh r3, [r4, #42] + 6346 0104 228D ldrh r2, [r4, #40] + ARM GAS /tmp/ccskJbbb.s page 243 + + + 6347 0106 9B1A subs r3, r3, r2 + 6348 0108 9BB2 uxth r3, r3 + 6349 010a 6385 strh r3, [r4, #42] +3335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6350 .loc 1 3335 0 + 6351 010c 4023 movs r3, #64 + 6352 010e 0022 movs r2, #0 + 6353 0110 E254 strb r2, [r4, r3] +3341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6354 .loc 1 3341 0 + 6355 0112 1121 movs r1, #17 + 6356 0114 2000 movs r0, r4 + 6357 0116 FFF7FEFF bl I2C_Enable_IRQ + 6358 .LVL545: +3344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6359 .loc 1 3344 0 + 6360 011a 2268 ldr r2, [r4] + 6361 011c 1168 ldr r1, [r2] + 6362 011e 8023 movs r3, #128 + 6363 0120 DB01 lsls r3, r3, #7 + 6364 0122 0B43 orrs r3, r1 + 6365 0124 1360 str r3, [r2] + 6366 0126 14E0 b .L421 + 6367 .LVL546: + 6368 .L426: +3364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6369 .loc 1 3364 0 + 6370 0128 104B ldr r3, .L436+16 + 6371 012a 6363 str r3, [r4, #52] +3368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6372 .loc 1 3368 0 + 6373 012c 8023 movs r3, #128 + 6374 012e D2B2 uxtb r2, r2 + 6375 0130 0B49 ldr r1, .L436+4 + 6376 0132 0091 str r1, [sp] + 6377 0134 9B04 lsls r3, r3, #18 + 6378 0136 0399 ldr r1, [sp, #12] + 6379 0138 2000 movs r0, r4 + 6380 013a FFF7FEFF bl I2C_TransferConfig + 6381 .LVL547: +3371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6382 .loc 1 3371 0 + 6383 013e 4023 movs r3, #64 + 6384 0140 0022 movs r2, #0 + 6385 0142 E254 strb r2, [r4, r3] +3379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6386 .loc 1 3379 0 + 6387 0144 0121 movs r1, #1 + 6388 0146 2000 movs r0, r4 + 6389 0148 FFF7FEFF bl I2C_Enable_IRQ + 6390 .LVL548: +3382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6391 .loc 1 3382 0 + 6392 014c 0025 movs r5, #0 + 6393 .LVL549: + 6394 014e 00E0 b .L421 + 6395 .LVL550: + ARM GAS /tmp/ccskJbbb.s page 244 + + + 6396 .L430: +3386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6397 .loc 1 3386 0 + 6398 0150 0225 movs r5, #2 + 6399 .LVL551: + 6400 .L421: +3388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6401 .loc 1 3388 0 + 6402 0152 2800 movs r0, r5 + 6403 0154 05B0 add sp, sp, #20 + 6404 @ sp needed + 6405 .LVL552: + 6406 0156 F0BD pop {r4, r5, r6, r7, pc} + 6407 .LVL553: + 6408 .L431: +3252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6409 .loc 1 3252 0 + 6410 0158 0225 movs r5, #2 + 6411 .LVL554: + 6412 015a FAE7 b .L421 + 6413 .L437: + 6414 .align 2 + 6415 .L436: + 6416 015c 00000000 .word I2C_Master_ISR_DMA + 6417 0160 00200080 .word -2147475456 + 6418 0164 00000000 .word I2C_DMAMasterTransmitCplt + 6419 0168 00000000 .word I2C_DMAError + 6420 016c 00000000 .word I2C_Master_ISR_IT + 6421 .cfi_endproc + 6422 .LFE64: + 6424 .section .text.HAL_I2C_Master_Seq_Receive_IT,"ax",%progbits + 6425 .align 1 + 6426 .global HAL_I2C_Master_Seq_Receive_IT + 6427 .syntax unified + 6428 .code 16 + 6429 .thumb_func + 6430 .fpu softvfp + 6432 HAL_I2C_Master_Seq_Receive_IT: + 6433 .LFB65: +3403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 6434 .loc 1 3403 0 + 6435 .cfi_startproc + 6436 @ args = 4, pretend = 0, frame = 0 + 6437 @ frame_needed = 0, uses_anonymous_args = 0 + 6438 .LVL555: + 6439 0000 70B5 push {r4, r5, r6, lr} + 6440 .LCFI53: + 6441 .cfi_def_cfa_offset 16 + 6442 .cfi_offset 4, -16 + 6443 .cfi_offset 5, -12 + 6444 .cfi_offset 6, -8 + 6445 .cfi_offset 14, -4 + 6446 0002 82B0 sub sp, sp, #8 + 6447 .LCFI54: + 6448 .cfi_def_cfa_offset 24 + 6449 0004 0400 movs r4, r0 + 6450 0006 0D00 movs r5, r1 + ARM GAS /tmp/ccskJbbb.s page 245 + + + 6451 .LVL556: +3410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6452 .loc 1 3410 0 + 6453 0008 4121 movs r1, #65 + 6454 .LVL557: + 6455 000a 415C ldrb r1, [r0, r1] + 6456 000c 2029 cmp r1, #32 + 6457 000e 49D1 bne .L444 +3413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6458 .loc 1 3413 0 + 6459 0010 2031 adds r1, r1, #32 + 6460 0012 415C ldrb r1, [r0, r1] + 6461 0014 0129 cmp r1, #1 + 6462 0016 48D0 beq .L445 +3413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6463 .loc 1 3413 0 is_stmt 0 discriminator 2 + 6464 0018 4021 movs r1, #64 + 6465 001a 0120 movs r0, #1 + 6466 .LVL558: + 6467 001c 6054 strb r0, [r4, r1] +3415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 6468 .loc 1 3415 0 is_stmt 1 discriminator 2 + 6469 001e 0131 adds r1, r1, #1 + 6470 0020 2130 adds r0, r0, #33 + 6471 0022 6054 strb r0, [r4, r1] +3416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6472 .loc 1 3416 0 discriminator 2 + 6473 0024 0131 adds r1, r1, #1 + 6474 0026 1238 subs r0, r0, #18 + 6475 0028 6054 strb r0, [r4, r1] +3417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6476 .loc 1 3417 0 discriminator 2 + 6477 002a 0021 movs r1, #0 + 6478 002c 6164 str r1, [r4, #68] +3420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6479 .loc 1 3420 0 discriminator 2 + 6480 002e 6262 str r2, [r4, #36] +3421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 6481 .loc 1 3421 0 discriminator 2 + 6482 0030 6385 strh r3, [r4, #42] +3422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT; + 6483 .loc 1 3422 0 discriminator 2 + 6484 0032 069B ldr r3, [sp, #24] + 6485 .LVL559: + 6486 0034 E362 str r3, [r4, #44] + 6487 .LVL560: +3423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6488 .loc 1 3423 0 discriminator 2 + 6489 0036 1E4B ldr r3, .L448 + 6490 0038 6363 str r3, [r4, #52] +3426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6491 .loc 1 3426 0 discriminator 2 + 6492 003a 638D ldrh r3, [r4, #42] + 6493 003c 9BB2 uxth r3, r3 + 6494 003e FF2B cmp r3, #255 + 6495 0040 10D9 bls .L440 +3428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + ARM GAS /tmp/ccskJbbb.s page 246 + + + 6496 .loc 1 3428 0 + 6497 0042 FF23 movs r3, #255 + 6498 0044 2385 strh r3, [r4, #40] + 6499 .LVL561: +3429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6500 .loc 1 3429 0 + 6501 0046 8026 movs r6, #128 + 6502 0048 7604 lsls r6, r6, #17 + 6503 .LVL562: + 6504 .L441: +3439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6505 .loc 1 3439 0 + 6506 004a 236B ldr r3, [r4, #48] + 6507 004c 122B cmp r3, #18 + 6508 004e 0DD1 bne .L442 +3439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6509 .loc 1 3439 0 is_stmt 0 discriminator 1 + 6510 0050 069B ldr r3, [sp, #24] + 6511 0052 AA2B cmp r3, #170 + 6512 0054 0AD0 beq .L442 +3439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6513 .loc 1 3439 0 discriminator 3 + 6514 0056 AA23 movs r3, #170 + 6515 0058 1B02 lsls r3, r3, #8 + 6516 005a 069A ldr r2, [sp, #24] + 6517 .LVL563: + 6518 005c 9A42 cmp r2, r3 + 6519 005e 05D0 beq .L442 +3441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6520 .loc 1 3441 0 is_stmt 1 + 6521 0060 0023 movs r3, #0 + 6522 0062 0CE0 b .L443 + 6523 .LVL564: + 6524 .L440: +3433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 6525 .loc 1 3433 0 + 6526 0064 638D ldrh r3, [r4, #42] + 6527 0066 2385 strh r3, [r4, #40] +3434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6528 .loc 1 3434 0 + 6529 0068 E66A ldr r6, [r4, #44] + 6530 .LVL565: + 6531 006a EEE7 b .L441 + 6532 .LVL566: + 6533 .L442: +3446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6534 .loc 1 3446 0 + 6535 006c 2000 movs r0, r4 + 6536 006e FFF7FEFF bl I2C_ConvertOtherXferOptions + 6537 .LVL567: +3449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6538 .loc 1 3449 0 + 6539 0072 638D ldrh r3, [r4, #42] + 6540 0074 9BB2 uxth r3, r3 + 6541 0076 FE2B cmp r3, #254 + 6542 0078 12D8 bhi .L447 +3451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 247 + + + 6543 .loc 1 3451 0 + 6544 007a E66A ldr r6, [r4, #44] + 6545 .LVL568: +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6546 .loc 1 3405 0 + 6547 007c 0D4B ldr r3, .L448+4 + 6548 .L443: + 6549 .LVL569: +3456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6550 .loc 1 3456 0 + 6551 007e 228D ldrh r2, [r4, #40] + 6552 0080 D2B2 uxtb r2, r2 + 6553 0082 0093 str r3, [sp] + 6554 0084 3300 movs r3, r6 + 6555 .LVL570: + 6556 0086 2900 movs r1, r5 + 6557 0088 2000 movs r0, r4 + 6558 008a FFF7FEFF bl I2C_TransferConfig + 6559 .LVL571: +3459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6560 .loc 1 3459 0 + 6561 008e 4023 movs r3, #64 + 6562 0090 0022 movs r2, #0 + 6563 0092 E254 strb r2, [r4, r3] +3464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6564 .loc 1 3464 0 + 6565 0094 0221 movs r1, #2 + 6566 0096 2000 movs r0, r4 + 6567 0098 FFF7FEFF bl I2C_Enable_IRQ + 6568 .LVL572: +3466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6569 .loc 1 3466 0 + 6570 009c 0020 movs r0, #0 + 6571 009e 02E0 b .L439 + 6572 .LVL573: + 6573 .L447: +3405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6574 .loc 1 3405 0 + 6575 00a0 044B ldr r3, .L448+4 + 6576 00a2 ECE7 b .L443 + 6577 .LVL574: + 6578 .L444: +3470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6579 .loc 1 3470 0 + 6580 00a4 0220 movs r0, #2 + 6581 .LVL575: + 6582 .L439: +3472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6583 .loc 1 3472 0 + 6584 00a6 02B0 add sp, sp, #8 + 6585 @ sp needed + 6586 .LVL576: + 6587 00a8 70BD pop {r4, r5, r6, pc} + 6588 .LVL577: + 6589 .L445: +3413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6590 .loc 1 3413 0 + ARM GAS /tmp/ccskJbbb.s page 248 + + + 6591 00aa 0220 movs r0, #2 + 6592 .LVL578: + 6593 00ac FBE7 b .L439 + 6594 .L449: + 6595 00ae C046 .align 2 + 6596 .L448: + 6597 00b0 00000000 .word I2C_Master_ISR_IT + 6598 00b4 00240080 .word -2147474432 + 6599 .cfi_endproc + 6600 .LFE65: + 6602 .section .text.HAL_I2C_Master_Seq_Receive_DMA,"ax",%progbits + 6603 .align 1 + 6604 .global HAL_I2C_Master_Seq_Receive_DMA + 6605 .syntax unified + 6606 .code 16 + 6607 .thumb_func + 6608 .fpu softvfp + 6610 HAL_I2C_Master_Seq_Receive_DMA: + 6611 .LFB66: +3487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t xfermode; + 6612 .loc 1 3487 0 + 6613 .cfi_startproc + 6614 @ args = 4, pretend = 0, frame = 8 + 6615 @ frame_needed = 0, uses_anonymous_args = 0 + 6616 .LVL579: + 6617 0000 F0B5 push {r4, r5, r6, r7, lr} + 6618 .LCFI55: + 6619 .cfi_def_cfa_offset 20 + 6620 .cfi_offset 4, -20 + 6621 .cfi_offset 5, -16 + 6622 .cfi_offset 6, -12 + 6623 .cfi_offset 7, -8 + 6624 .cfi_offset 14, -4 + 6625 0002 85B0 sub sp, sp, #20 + 6626 .LCFI56: + 6627 .cfi_def_cfa_offset 40 + 6628 0004 0400 movs r4, r0 + 6629 0006 0391 str r1, [sp, #12] + 6630 0008 1500 movs r5, r2 + 6631 .LVL580: +3495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6632 .loc 1 3495 0 + 6633 000a 4122 movs r2, #65 + 6634 .LVL581: + 6635 000c 825C ldrb r2, [r0, r2] + 6636 000e 202A cmp r2, #32 + 6637 0010 00D0 beq .LCB6764 + 6638 0012 9DE0 b .L460 @long jump + 6639 .LCB6764: +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6640 .loc 1 3498 0 + 6641 0014 2032 adds r2, r2, #32 + 6642 0016 825C ldrb r2, [r0, r2] + 6643 0018 012A cmp r2, #1 + 6644 001a 00D1 bne .LCB6768 + 6645 001c 9CE0 b .L461 @long jump + 6646 .LCB6768: + ARM GAS /tmp/ccskJbbb.s page 249 + + +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6647 .loc 1 3498 0 is_stmt 0 discriminator 2 + 6648 001e 4022 movs r2, #64 + 6649 0020 0121 movs r1, #1 + 6650 .LVL582: + 6651 0022 8154 strb r1, [r0, r2] +3500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER; + 6652 .loc 1 3500 0 is_stmt 1 discriminator 2 + 6653 0024 0132 adds r2, r2, #1 + 6654 0026 2131 adds r1, r1, #33 + 6655 0028 8154 strb r1, [r0, r2] +3501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6656 .loc 1 3501 0 discriminator 2 + 6657 002a 0132 adds r2, r2, #1 + 6658 002c 1239 subs r1, r1, #18 + 6659 002e 8154 strb r1, [r0, r2] +3502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6660 .loc 1 3502 0 discriminator 2 + 6661 0030 0022 movs r2, #0 + 6662 0032 4264 str r2, [r0, #68] +3505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 6663 .loc 1 3505 0 discriminator 2 + 6664 0034 4562 str r5, [r0, #36] +3506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 6665 .loc 1 3506 0 discriminator 2 + 6666 0036 4385 strh r3, [r0, #42] +3507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA; + 6667 .loc 1 3507 0 discriminator 2 + 6668 0038 0A9B ldr r3, [sp, #40] + 6669 .LVL583: + 6670 003a C362 str r3, [r0, #44] + 6671 .LVL584: +3508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6672 .loc 1 3508 0 discriminator 2 + 6673 003c 474B ldr r3, .L466 + 6674 003e 4363 str r3, [r0, #52] +3511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6675 .loc 1 3511 0 discriminator 2 + 6676 0040 438D ldrh r3, [r0, #42] + 6677 0042 9BB2 uxth r3, r3 + 6678 0044 FF2B cmp r3, #255 + 6679 0046 10D9 bls .L452 +3513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 6680 .loc 1 3513 0 + 6681 0048 FF23 movs r3, #255 + 6682 004a 0385 strh r3, [r0, #40] + 6683 .LVL585: +3514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6684 .loc 1 3514 0 + 6685 004c 8027 movs r7, #128 + 6686 004e 7F04 lsls r7, r7, #17 + 6687 .LVL586: + 6688 .L453: +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6689 .loc 1 3524 0 + 6690 0050 236B ldr r3, [r4, #48] + 6691 0052 122B cmp r3, #18 + ARM GAS /tmp/ccskJbbb.s page 250 + + + 6692 0054 0DD1 bne .L454 +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6693 .loc 1 3524 0 is_stmt 0 discriminator 1 + 6694 0056 0A9B ldr r3, [sp, #40] + 6695 0058 AA2B cmp r3, #170 + 6696 005a 0AD0 beq .L454 +3524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6697 .loc 1 3524 0 discriminator 3 + 6698 005c AA23 movs r3, #170 + 6699 005e 1B02 lsls r3, r3, #8 + 6700 0060 0A9A ldr r2, [sp, #40] + 6701 0062 9A42 cmp r2, r3 + 6702 0064 05D0 beq .L454 +3526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6703 .loc 1 3526 0 is_stmt 1 + 6704 0066 0026 movs r6, #0 + 6705 0068 0CE0 b .L455 + 6706 .LVL587: + 6707 .L452: +3518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = hi2c->XferOptions; + 6708 .loc 1 3518 0 + 6709 006a 438D ldrh r3, [r0, #42] + 6710 006c 0385 strh r3, [r0, #40] +3519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6711 .loc 1 3519 0 + 6712 006e C76A ldr r7, [r0, #44] + 6713 .LVL588: + 6714 0070 EEE7 b .L453 + 6715 .L454: +3531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6716 .loc 1 3531 0 + 6717 0072 2000 movs r0, r4 + 6718 .LVL589: + 6719 0074 FFF7FEFF bl I2C_ConvertOtherXferOptions + 6720 .LVL590: +3534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6721 .loc 1 3534 0 + 6722 0078 638D ldrh r3, [r4, #42] + 6723 007a 9BB2 uxth r3, r3 + 6724 007c FE2B cmp r3, #254 + 6725 007e 28D8 bhi .L463 +3536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6726 .loc 1 3536 0 + 6727 0080 E76A ldr r7, [r4, #44] + 6728 .LVL591: +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6729 .loc 1 3489 0 + 6730 0082 374E ldr r6, .L466+4 + 6731 .L455: + 6732 .LVL592: +3540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6733 .loc 1 3540 0 + 6734 0084 228D ldrh r2, [r4, #40] + 6735 0086 002A cmp r2, #0 + 6736 0088 4ED0 beq .L456 +3542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6737 .loc 1 3542 0 + ARM GAS /tmp/ccskJbbb.s page 251 + + + 6738 008a E36B ldr r3, [r4, #60] + 6739 008c 002B cmp r3, #0 + 6740 008e 22D0 beq .L457 +3545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6741 .loc 1 3545 0 + 6742 0090 344A ldr r2, .L466+8 + 6743 0092 9A62 str r2, [r3, #40] +3548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6744 .loc 1 3548 0 + 6745 0094 E36B ldr r3, [r4, #60] + 6746 0096 344A ldr r2, .L466+12 + 6747 0098 1A63 str r2, [r3, #48] +3551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 6748 .loc 1 3551 0 + 6749 009a E26B ldr r2, [r4, #60] + 6750 009c 0023 movs r3, #0 + 6751 009e D362 str r3, [r2, #44] +3552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6752 .loc 1 3552 0 + 6753 00a0 E26B ldr r2, [r4, #60] + 6754 00a2 5363 str r3, [r2, #52] +3555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6755 .loc 1 3555 0 + 6756 00a4 2168 ldr r1, [r4] + 6757 00a6 2431 adds r1, r1, #36 + 6758 00a8 238D ldrh r3, [r4, #40] + 6759 00aa 2A00 movs r2, r5 + 6760 00ac E06B ldr r0, [r4, #60] + 6761 00ae FFF7FEFF bl HAL_DMA_Start_IT + 6762 .LVL593: + 6763 00b2 051E subs r5, r0, #0 + 6764 .LVL594: +3572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6765 .loc 1 3572 0 + 6766 00b4 1DD0 beq .L465 +3595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6767 .loc 1 3595 0 + 6768 00b6 4123 movs r3, #65 + 6769 00b8 2022 movs r2, #32 + 6770 00ba E254 strb r2, [r4, r3] +3596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6771 .loc 1 3596 0 + 6772 00bc 0022 movs r2, #0 + 6773 00be 0133 adds r3, r3, #1 + 6774 00c0 E254 strb r2, [r4, r3] +3599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6775 .loc 1 3599 0 + 6776 00c2 636C ldr r3, [r4, #68] + 6777 00c4 1021 movs r1, #16 + 6778 00c6 0B43 orrs r3, r1 + 6779 00c8 6364 str r3, [r4, #68] +3602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6780 .loc 1 3602 0 + 6781 00ca 4023 movs r3, #64 + 6782 00cc E254 strb r2, [r4, r3] +3604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6783 .loc 1 3604 0 + ARM GAS /tmp/ccskJbbb.s page 252 + + + 6784 00ce 0125 movs r5, #1 + 6785 00d0 3FE0 b .L451 + 6786 .LVL595: + 6787 .L463: +3489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 6788 .loc 1 3489 0 + 6789 00d2 234E ldr r6, .L466+4 + 6790 00d4 D6E7 b .L455 + 6791 .LVL596: + 6792 .L457: +3560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 6793 .loc 1 3560 0 + 6794 00d6 4123 movs r3, #65 + 6795 00d8 2022 movs r2, #32 + 6796 00da E254 strb r2, [r4, r3] +3561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6797 .loc 1 3561 0 + 6798 00dc 0022 movs r2, #0 + 6799 00de 0133 adds r3, r3, #1 + 6800 00e0 E254 strb r2, [r4, r3] +3564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6801 .loc 1 3564 0 + 6802 00e2 636C ldr r3, [r4, #68] + 6803 00e4 8021 movs r1, #128 + 6804 00e6 0B43 orrs r3, r1 + 6805 00e8 6364 str r3, [r4, #68] +3567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6806 .loc 1 3567 0 + 6807 00ea 4023 movs r3, #64 + 6808 00ec E254 strb r2, [r4, r3] +3569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6809 .loc 1 3569 0 + 6810 00ee 0125 movs r5, #1 + 6811 .LVL597: + 6812 00f0 2FE0 b .L451 + 6813 .LVL598: + 6814 .L465: +3575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6815 .loc 1 3575 0 + 6816 00f2 228D ldrh r2, [r4, #40] + 6817 00f4 D2B2 uxtb r2, r2 + 6818 00f6 0096 str r6, [sp] + 6819 00f8 3B00 movs r3, r7 + 6820 00fa 0399 ldr r1, [sp, #12] + 6821 00fc 2000 movs r0, r4 + 6822 .LVL599: + 6823 00fe FFF7FEFF bl I2C_TransferConfig + 6824 .LVL600: +3578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6825 .loc 1 3578 0 + 6826 0102 638D ldrh r3, [r4, #42] + 6827 0104 228D ldrh r2, [r4, #40] + 6828 0106 9B1A subs r3, r3, r2 + 6829 0108 9BB2 uxth r3, r3 + 6830 010a 6385 strh r3, [r4, #42] +3581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6831 .loc 1 3581 0 + ARM GAS /tmp/ccskJbbb.s page 253 + + + 6832 010c 4023 movs r3, #64 + 6833 010e 0022 movs r2, #0 + 6834 0110 E254 strb r2, [r4, r3] +3587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6835 .loc 1 3587 0 + 6836 0112 1121 movs r1, #17 + 6837 0114 2000 movs r0, r4 + 6838 0116 FFF7FEFF bl I2C_Enable_IRQ + 6839 .LVL601: +3590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6840 .loc 1 3590 0 + 6841 011a 2268 ldr r2, [r4] + 6842 011c 1168 ldr r1, [r2] + 6843 011e 8023 movs r3, #128 + 6844 0120 1B02 lsls r3, r3, #8 + 6845 0122 0B43 orrs r3, r1 + 6846 0124 1360 str r3, [r2] + 6847 0126 14E0 b .L451 + 6848 .LVL602: + 6849 .L456: +3610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6850 .loc 1 3610 0 + 6851 0128 104B ldr r3, .L466+16 + 6852 012a 6363 str r3, [r4, #52] +3614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6853 .loc 1 3614 0 + 6854 012c 8023 movs r3, #128 + 6855 012e D2B2 uxtb r2, r2 + 6856 0130 0B49 ldr r1, .L466+4 + 6857 0132 0091 str r1, [sp] + 6858 0134 9B04 lsls r3, r3, #18 + 6859 0136 0399 ldr r1, [sp, #12] + 6860 0138 2000 movs r0, r4 + 6861 013a FFF7FEFF bl I2C_TransferConfig + 6862 .LVL603: +3617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6863 .loc 1 3617 0 + 6864 013e 4023 movs r3, #64 + 6865 0140 0022 movs r2, #0 + 6866 0142 E254 strb r2, [r4, r3] +3625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6867 .loc 1 3625 0 + 6868 0144 0121 movs r1, #1 + 6869 0146 2000 movs r0, r4 + 6870 0148 FFF7FEFF bl I2C_Enable_IRQ + 6871 .LVL604: +3628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6872 .loc 1 3628 0 + 6873 014c 0025 movs r5, #0 + 6874 .LVL605: + 6875 014e 00E0 b .L451 + 6876 .LVL606: + 6877 .L460: +3632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6878 .loc 1 3632 0 + 6879 0150 0225 movs r5, #2 + 6880 .LVL607: + ARM GAS /tmp/ccskJbbb.s page 254 + + + 6881 .L451: +3634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6882 .loc 1 3634 0 + 6883 0152 2800 movs r0, r5 + 6884 0154 05B0 add sp, sp, #20 + 6885 @ sp needed + 6886 .LVL608: + 6887 0156 F0BD pop {r4, r5, r6, r7, pc} + 6888 .LVL609: + 6889 .L461: +3498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6890 .loc 1 3498 0 + 6891 0158 0225 movs r5, #2 + 6892 .LVL610: + 6893 015a FAE7 b .L451 + 6894 .L467: + 6895 .align 2 + 6896 .L466: + 6897 015c 00000000 .word I2C_Master_ISR_DMA + 6898 0160 00240080 .word -2147474432 + 6899 0164 00000000 .word I2C_DMAMasterReceiveCplt + 6900 0168 00000000 .word I2C_DMAError + 6901 016c 00000000 .word I2C_Master_ISR_IT + 6902 .cfi_endproc + 6903 .LFE66: + 6905 .section .text.HAL_I2C_Slave_Seq_Transmit_IT,"ax",%progbits + 6906 .align 1 + 6907 .global HAL_I2C_Slave_Seq_Transmit_IT + 6908 .syntax unified + 6909 .code 16 + 6910 .thumb_func + 6911 .fpu softvfp + 6913 HAL_I2C_Slave_Seq_Transmit_IT: + 6914 .LFB67: +3647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 6915 .loc 1 3647 0 + 6916 .cfi_startproc + 6917 @ args = 0, pretend = 0, frame = 0 + 6918 @ frame_needed = 0, uses_anonymous_args = 0 + 6919 .LVL611: + 6920 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 6921 .LCFI57: + 6922 .cfi_def_cfa_offset 24 + 6923 .cfi_offset 3, -24 + 6924 .cfi_offset 4, -20 + 6925 .cfi_offset 5, -16 + 6926 .cfi_offset 6, -12 + 6927 .cfi_offset 7, -8 + 6928 .cfi_offset 14, -4 + 6929 0002 0700 movs r7, r0 + 6930 0004 0C00 movs r4, r1 + 6931 0006 1500 movs r5, r2 + 6932 0008 1E00 movs r6, r3 +3651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6933 .loc 1 3651 0 + 6934 000a 4123 movs r3, #65 + 6935 .LVL612: + ARM GAS /tmp/ccskJbbb.s page 255 + + + 6936 000c C35C ldrb r3, [r0, r3] + 6937 000e 2822 movs r2, #40 + 6938 .LVL613: + 6939 0010 1340 ands r3, r2 + 6940 0012 282B cmp r3, #40 + 6941 0014 01D0 beq .L476 +3727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6942 .loc 1 3727 0 + 6943 0016 0120 movs r0, #1 + 6944 .LVL614: + 6945 .L469: +3729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6946 .loc 1 3729 0 + 6947 @ sp needed + 6948 .LVL615: + 6949 .LVL616: + 6950 .LVL617: + 6951 0018 F8BD pop {r3, r4, r5, r6, r7, pc} + 6952 .LVL618: + 6953 .L476: +3653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6954 .loc 1 3653 0 + 6955 001a 0029 cmp r1, #0 + 6956 001c 01D0 beq .L470 +3653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6957 .loc 1 3653 0 is_stmt 0 discriminator 1 + 6958 001e 002D cmp r5, #0 + 6959 0020 04D1 bne .L471 + 6960 .L470: +3655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 6961 .loc 1 3655 0 is_stmt 1 + 6962 0022 8023 movs r3, #128 + 6963 0024 9B00 lsls r3, r3, #2 + 6964 0026 7B64 str r3, [r7, #68] +3656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 6965 .loc 1 3656 0 + 6966 0028 0120 movs r0, #1 + 6967 .LVL619: + 6968 002a F5E7 b .L469 + 6969 .LVL620: + 6970 .L471: +3660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6971 .loc 1 3660 0 + 6972 002c 0521 movs r1, #5 + 6973 .LVL621: + 6974 002e FFF7FEFF bl I2C_Disable_IRQ + 6975 .LVL622: +3663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6976 .loc 1 3663 0 + 6977 0032 4023 movs r3, #64 + 6978 0034 FB5C ldrb r3, [r7, r3] + 6979 0036 012B cmp r3, #1 + 6980 0038 43D0 beq .L475 +3663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6981 .loc 1 3663 0 is_stmt 0 discriminator 2 + 6982 003a 4023 movs r3, #64 + 6983 003c 0122 movs r2, #1 + ARM GAS /tmp/ccskJbbb.s page 256 + + + 6984 003e FA54 strb r2, [r7, r3] +3667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 6985 .loc 1 3667 0 is_stmt 1 discriminator 2 + 6986 0040 0133 adds r3, r3, #1 + 6987 0042 FB5C ldrb r3, [r7, r3] + 6988 0044 2A2B cmp r3, #42 + 6989 0046 22D0 beq .L477 + 6990 .L472: +3693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 6991 .loc 1 3693 0 + 6992 0048 4123 movs r3, #65 + 6993 004a 2922 movs r2, #41 + 6994 004c FA54 strb r2, [r7, r3] +3694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 6995 .loc 1 3694 0 + 6996 004e 0133 adds r3, r3, #1 + 6997 0050 093A subs r2, r2, #9 + 6998 0052 FA54 strb r2, [r7, r3] +3695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 6999 .loc 1 3695 0 + 7000 0054 0023 movs r3, #0 + 7001 0056 7B64 str r3, [r7, #68] +3698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7002 .loc 1 3698 0 + 7003 0058 3A68 ldr r2, [r7] + 7004 005a 5368 ldr r3, [r2, #4] + 7005 005c 1A49 ldr r1, .L478 + 7006 005e 0B40 ands r3, r1 + 7007 0060 5360 str r3, [r2, #4] +3701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7008 .loc 1 3701 0 + 7009 0062 7C62 str r4, [r7, #36] +3702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 7010 .loc 1 3702 0 + 7011 0064 7D85 strh r5, [r7, #42] +3703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7012 .loc 1 3703 0 + 7013 0066 7B8D ldrh r3, [r7, #42] + 7014 0068 3B85 strh r3, [r7, #40] +3704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 7015 .loc 1 3704 0 + 7016 006a FE62 str r6, [r7, #44] +3705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7017 .loc 1 3705 0 + 7018 006c 174B ldr r3, .L478+4 + 7019 006e 7B63 str r3, [r7, #52] +3707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7020 .loc 1 3707 0 + 7021 0070 3B68 ldr r3, [r7] + 7022 0072 9A69 ldr r2, [r3, #24] + 7023 0074 D203 lsls r2, r2, #15 + 7024 0076 01D5 bpl .L473 +3711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7025 .loc 1 3711 0 + 7026 0078 0822 movs r2, #8 + 7027 007a DA61 str r2, [r3, #28] + 7028 .L473: + ARM GAS /tmp/ccskJbbb.s page 257 + + +3715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7029 .loc 1 3715 0 + 7030 007c 4023 movs r3, #64 + 7031 007e 0022 movs r2, #0 + 7032 0080 FA54 strb r2, [r7, r3] +3721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7033 .loc 1 3721 0 + 7034 0082 0521 movs r1, #5 + 7035 0084 3800 movs r0, r7 + 7036 0086 FFF7FEFF bl I2C_Enable_IRQ + 7037 .LVL623: +3723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7038 .loc 1 3723 0 + 7039 008a 0020 movs r0, #0 + 7040 008c C4E7 b .L469 + 7041 .L477: +3670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7042 .loc 1 3670 0 + 7043 008e 0221 movs r1, #2 + 7044 0090 3800 movs r0, r7 + 7045 0092 FFF7FEFF bl I2C_Disable_IRQ + 7046 .LVL624: +3673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7047 .loc 1 3673 0 + 7048 0096 3B68 ldr r3, [r7] + 7049 0098 1A68 ldr r2, [r3] + 7050 009a 1204 lsls r2, r2, #16 + 7051 009c D4D5 bpl .L472 +3675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7052 .loc 1 3675 0 + 7053 009e 1A68 ldr r2, [r3] + 7054 00a0 0949 ldr r1, .L478 + 7055 00a2 0A40 ands r2, r1 + 7056 00a4 1A60 str r2, [r3] +3677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7057 .loc 1 3677 0 + 7058 00a6 FB6B ldr r3, [r7, #60] + 7059 00a8 002B cmp r3, #0 + 7060 00aa CDD0 beq .L472 +3681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7061 .loc 1 3681 0 + 7062 00ac 084A ldr r2, .L478+8 + 7063 00ae 5A63 str r2, [r3, #52] +3684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7064 .loc 1 3684 0 + 7065 00b0 F86B ldr r0, [r7, #60] + 7066 00b2 FFF7FEFF bl HAL_DMA_Abort_IT + 7067 .LVL625: + 7068 00b6 0028 cmp r0, #0 + 7069 00b8 C6D0 beq .L472 +3687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7070 .loc 1 3687 0 + 7071 00ba F86B ldr r0, [r7, #60] + 7072 00bc 436B ldr r3, [r0, #52] + 7073 00be 9847 blx r3 + 7074 .LVL626: + 7075 00c0 C2E7 b .L472 + ARM GAS /tmp/ccskJbbb.s page 258 + + + 7076 .L475: +3663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7077 .loc 1 3663 0 + 7078 00c2 0220 movs r0, #2 + 7079 00c4 A8E7 b .L469 + 7080 .L479: + 7081 00c6 C046 .align 2 + 7082 .L478: + 7083 00c8 FF7FFFFF .word -32769 + 7084 00cc 00000000 .word I2C_Slave_ISR_IT + 7085 00d0 00000000 .word I2C_DMAAbort + 7086 .cfi_endproc + 7087 .LFE67: + 7089 .section .text.HAL_I2C_Slave_Seq_Transmit_DMA,"ax",%progbits + 7090 .align 1 + 7091 .global HAL_I2C_Slave_Seq_Transmit_DMA + 7092 .syntax unified + 7093 .code 16 + 7094 .thumb_func + 7095 .fpu softvfp + 7097 HAL_I2C_Slave_Seq_Transmit_DMA: + 7098 .LFB68: +3742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7099 .loc 1 3742 0 + 7100 .cfi_startproc + 7101 @ args = 0, pretend = 0, frame = 0 + 7102 @ frame_needed = 0, uses_anonymous_args = 0 + 7103 .LVL627: + 7104 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 7105 .LCFI58: + 7106 .cfi_def_cfa_offset 24 + 7107 .cfi_offset 3, -24 + 7108 .cfi_offset 4, -20 + 7109 .cfi_offset 5, -16 + 7110 .cfi_offset 6, -12 + 7111 .cfi_offset 7, -8 + 7112 .cfi_offset 14, -4 + 7113 0002 0400 movs r4, r0 + 7114 0004 0D00 movs r5, r1 + 7115 0006 1600 movs r6, r2 + 7116 0008 1F00 movs r7, r3 +3748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7117 .loc 1 3748 0 + 7118 000a 4123 movs r3, #65 + 7119 .LVL628: + 7120 000c C35C ldrb r3, [r0, r3] + 7121 000e 2822 movs r2, #40 + 7122 .LVL629: + 7123 0010 1340 ands r3, r2 + 7124 0012 282B cmp r3, #40 + 7125 0014 02D0 beq .L494 +3906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7126 .loc 1 3906 0 + 7127 0016 0125 movs r5, #1 + 7128 .LVL630: + 7129 .L481: +3908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 259 + + + 7130 .loc 1 3908 0 + 7131 0018 2800 movs r0, r5 + 7132 @ sp needed + 7133 .LVL631: + 7134 .LVL632: + 7135 001a F8BD pop {r3, r4, r5, r6, r7, pc} + 7136 .LVL633: + 7137 .L494: +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7138 .loc 1 3750 0 + 7139 001c 0029 cmp r1, #0 + 7140 001e 57D0 beq .L482 +3750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7141 .loc 1 3750 0 is_stmt 0 discriminator 1 + 7142 0020 002E cmp r6, #0 + 7143 0022 55D0 beq .L482 +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7144 .loc 1 3757 0 is_stmt 1 + 7145 0024 4023 movs r3, #64 + 7146 0026 C35C ldrb r3, [r0, r3] + 7147 0028 012B cmp r3, #1 + 7148 002a 00D1 bne .LCB7285 + 7149 002c A5E0 b .L492 @long jump + 7150 .LCB7285: +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7151 .loc 1 3757 0 is_stmt 0 discriminator 2 + 7152 002e 4023 movs r3, #64 + 7153 0030 0122 movs r2, #1 + 7154 0032 C254 strb r2, [r0, r3] +3760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7155 .loc 1 3760 0 is_stmt 1 discriminator 2 + 7156 0034 0521 movs r1, #5 + 7157 .LVL634: + 7158 0036 FFF7FEFF bl I2C_Disable_IRQ + 7159 .LVL635: +3764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7160 .loc 1 3764 0 discriminator 2 + 7161 003a 4123 movs r3, #65 + 7162 003c E35C ldrb r3, [r4, r3] + 7163 003e 2A2B cmp r3, #42 + 7164 0040 4BD0 beq .L495 +3789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7165 .loc 1 3789 0 + 7166 0042 4123 movs r3, #65 + 7167 0044 E35C ldrb r3, [r4, r3] + 7168 0046 292B cmp r3, #41 + 7169 0048 62D0 beq .L496 + 7170 .L485: +3816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 7171 .loc 1 3816 0 + 7172 004a 4123 movs r3, #65 + 7173 004c 2922 movs r2, #41 + 7174 004e E254 strb r2, [r4, r3] +3817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7175 .loc 1 3817 0 + 7176 0050 0133 adds r3, r3, #1 + 7177 0052 093A subs r2, r2, #9 + ARM GAS /tmp/ccskJbbb.s page 260 + + + 7178 0054 E254 strb r2, [r4, r3] +3818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7179 .loc 1 3818 0 + 7180 0056 0023 movs r3, #0 + 7181 0058 6364 str r3, [r4, #68] +3821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7182 .loc 1 3821 0 + 7183 005a 2268 ldr r2, [r4] + 7184 005c 5368 ldr r3, [r2, #4] + 7185 005e 4849 ldr r1, .L498 + 7186 0060 0B40 ands r3, r1 + 7187 0062 5360 str r3, [r2, #4] +3824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7188 .loc 1 3824 0 + 7189 0064 6562 str r5, [r4, #36] +3825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 7190 .loc 1 3825 0 + 7191 0066 6685 strh r6, [r4, #42] +3826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7192 .loc 1 3826 0 + 7193 0068 638D ldrh r3, [r4, #42] + 7194 006a 2385 strh r3, [r4, #40] +3827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 7195 .loc 1 3827 0 + 7196 006c E762 str r7, [r4, #44] +3828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7197 .loc 1 3828 0 + 7198 006e 454B ldr r3, .L498+4 + 7199 0070 6363 str r3, [r4, #52] +3830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7200 .loc 1 3830 0 + 7201 0072 A36B ldr r3, [r4, #56] + 7202 0074 002B cmp r3, #0 + 7203 0076 61D0 beq .L486 +3833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7204 .loc 1 3833 0 + 7205 0078 434A ldr r2, .L498+8 + 7206 007a 9A62 str r2, [r3, #40] +3836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7207 .loc 1 3836 0 + 7208 007c A36B ldr r3, [r4, #56] + 7209 007e 434A ldr r2, .L498+12 + 7210 0080 1A63 str r2, [r3, #48] +3839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmatx->XferAbortCallback = NULL; + 7211 .loc 1 3839 0 + 7212 0082 A26B ldr r2, [r4, #56] + 7213 0084 0023 movs r3, #0 + 7214 0086 D362 str r3, [r2, #44] +3840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7215 .loc 1 3840 0 + 7216 0088 A26B ldr r2, [r4, #56] + 7217 008a 5363 str r3, [r2, #52] +3843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7218 .loc 1 3843 0 + 7219 008c 2268 ldr r2, [r4] + 7220 008e 2832 adds r2, r2, #40 + 7221 0090 238D ldrh r3, [r4, #40] + ARM GAS /tmp/ccskJbbb.s page 261 + + + 7222 0092 2900 movs r1, r5 + 7223 0094 A06B ldr r0, [r4, #56] + 7224 0096 FFF7FEFF bl HAL_DMA_Start_IT + 7225 .LVL636: + 7226 009a 051E subs r5, r0, #0 + 7227 .LVL637: +3860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7228 .loc 1 3860 0 + 7229 009c 5CD1 bne .L497 +3863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7230 .loc 1 3863 0 + 7231 009e 638D ldrh r3, [r4, #42] + 7232 00a0 228D ldrh r2, [r4, #40] + 7233 00a2 9B1A subs r3, r3, r2 + 7234 00a4 9BB2 uxth r3, r3 + 7235 00a6 6385 strh r3, [r4, #42] +3866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7236 .loc 1 3866 0 + 7237 00a8 0023 movs r3, #0 + 7238 00aa 2385 strh r3, [r4, #40] +3883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7239 .loc 1 3883 0 + 7240 00ac 2368 ldr r3, [r4] + 7241 00ae 9A69 ldr r2, [r3, #24] + 7242 00b0 D203 lsls r2, r2, #15 + 7243 00b2 5FD4 bmi .L489 + 7244 .L490: +3891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7245 .loc 1 3891 0 + 7246 00b4 4023 movs r3, #64 + 7247 00b6 0022 movs r2, #0 + 7248 00b8 E254 strb r2, [r4, r3] +3897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7249 .loc 1 3897 0 + 7250 00ba 0421 movs r1, #4 + 7251 00bc 2000 movs r0, r4 + 7252 .LVL638: + 7253 00be FFF7FEFF bl I2C_Enable_IRQ + 7254 .LVL639: +3900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7255 .loc 1 3900 0 + 7256 00c2 2268 ldr r2, [r4] + 7257 00c4 1168 ldr r1, [r2] + 7258 00c6 8023 movs r3, #128 + 7259 00c8 DB01 lsls r3, r3, #7 + 7260 00ca 0B43 orrs r3, r1 + 7261 00cc 1360 str r3, [r2] +3902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7262 .loc 1 3902 0 + 7263 00ce A3E7 b .L481 + 7264 .LVL640: + 7265 .L482: +3752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 7266 .loc 1 3752 0 + 7267 00d0 8023 movs r3, #128 + 7268 00d2 9B00 lsls r3, r3, #2 + 7269 00d4 6364 str r3, [r4, #68] + ARM GAS /tmp/ccskJbbb.s page 262 + + +3753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7270 .loc 1 3753 0 + 7271 00d6 0125 movs r5, #1 + 7272 00d8 9EE7 b .L481 + 7273 .LVL641: + 7274 .L495: +3767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7275 .loc 1 3767 0 + 7276 00da 0221 movs r1, #2 + 7277 00dc 2000 movs r0, r4 + 7278 00de FFF7FEFF bl I2C_Disable_IRQ + 7279 .LVL642: +3769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7280 .loc 1 3769 0 + 7281 00e2 2368 ldr r3, [r4] + 7282 00e4 1A68 ldr r2, [r3] + 7283 00e6 1204 lsls r2, r2, #16 + 7284 00e8 AFD5 bpl .L485 +3772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7285 .loc 1 3772 0 + 7286 00ea E26B ldr r2, [r4, #60] + 7287 00ec 002A cmp r2, #0 + 7288 00ee ACD0 beq .L485 +3774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7289 .loc 1 3774 0 + 7290 00f0 1A68 ldr r2, [r3] + 7291 00f2 2349 ldr r1, .L498 + 7292 00f4 0A40 ands r2, r1 + 7293 00f6 1A60 str r2, [r3] +3778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7294 .loc 1 3778 0 + 7295 00f8 E36B ldr r3, [r4, #60] + 7296 00fa 254A ldr r2, .L498+16 + 7297 00fc 5A63 str r2, [r3, #52] +3781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7298 .loc 1 3781 0 + 7299 00fe E06B ldr r0, [r4, #60] + 7300 0100 FFF7FEFF bl HAL_DMA_Abort_IT + 7301 .LVL643: + 7302 0104 0028 cmp r0, #0 + 7303 0106 A0D0 beq .L485 +3784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7304 .loc 1 3784 0 + 7305 0108 E06B ldr r0, [r4, #60] + 7306 010a 436B ldr r3, [r0, #52] + 7307 010c 9847 blx r3 + 7308 .LVL644: + 7309 010e 9CE7 b .L485 + 7310 .L496: +3791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7311 .loc 1 3791 0 + 7312 0110 2368 ldr r3, [r4] + 7313 0112 1A68 ldr r2, [r3] + 7314 0114 5204 lsls r2, r2, #17 + 7315 0116 98D5 bpl .L485 +3793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7316 .loc 1 3793 0 + ARM GAS /tmp/ccskJbbb.s page 263 + + + 7317 0118 1A68 ldr r2, [r3] + 7318 011a 1E49 ldr r1, .L498+20 + 7319 011c 0A40 ands r2, r1 + 7320 011e 1A60 str r2, [r3] +3796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7321 .loc 1 3796 0 + 7322 0120 A36B ldr r3, [r4, #56] + 7323 0122 002B cmp r3, #0 + 7324 0124 91D0 beq .L485 +3800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7325 .loc 1 3800 0 + 7326 0126 1A4A ldr r2, .L498+16 + 7327 0128 5A63 str r2, [r3, #52] +3803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7328 .loc 1 3803 0 + 7329 012a A06B ldr r0, [r4, #56] + 7330 012c FFF7FEFF bl HAL_DMA_Abort_IT + 7331 .LVL645: + 7332 0130 0028 cmp r0, #0 + 7333 0132 8AD0 beq .L485 +3806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7334 .loc 1 3806 0 + 7335 0134 A06B ldr r0, [r4, #56] + 7336 0136 436B ldr r3, [r0, #52] + 7337 0138 9847 blx r3 + 7338 .LVL646: + 7339 013a 86E7 b .L485 + 7340 .L486: +3848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7341 .loc 1 3848 0 + 7342 013c 4123 movs r3, #65 + 7343 013e 2822 movs r2, #40 + 7344 0140 E254 strb r2, [r4, r3] +3849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7345 .loc 1 3849 0 + 7346 0142 0022 movs r2, #0 + 7347 0144 0133 adds r3, r3, #1 + 7348 0146 E254 strb r2, [r4, r3] +3852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7349 .loc 1 3852 0 + 7350 0148 636C ldr r3, [r4, #68] + 7351 014a 8021 movs r1, #128 + 7352 014c 0B43 orrs r3, r1 + 7353 014e 6364 str r3, [r4, #68] +3855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7354 .loc 1 3855 0 + 7355 0150 4023 movs r3, #64 + 7356 0152 E254 strb r2, [r4, r3] +3857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7357 .loc 1 3857 0 + 7358 0154 0125 movs r5, #1 + 7359 .LVL647: + 7360 0156 5FE7 b .L481 + 7361 .LVL648: + 7362 .L497: +3871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7363 .loc 1 3871 0 + ARM GAS /tmp/ccskJbbb.s page 264 + + + 7364 0158 4123 movs r3, #65 + 7365 015a 2822 movs r2, #40 + 7366 015c E254 strb r2, [r4, r3] +3872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7367 .loc 1 3872 0 + 7368 015e 0022 movs r2, #0 + 7369 0160 0133 adds r3, r3, #1 + 7370 0162 E254 strb r2, [r4, r3] +3875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7371 .loc 1 3875 0 + 7372 0164 636C ldr r3, [r4, #68] + 7373 0166 1021 movs r1, #16 + 7374 0168 0B43 orrs r3, r1 + 7375 016a 6364 str r3, [r4, #68] +3878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7376 .loc 1 3878 0 + 7377 016c 4023 movs r3, #64 + 7378 016e E254 strb r2, [r4, r3] +3880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7379 .loc 1 3880 0 + 7380 0170 0125 movs r5, #1 + 7381 0172 51E7 b .L481 + 7382 .L489: +3887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7383 .loc 1 3887 0 + 7384 0174 0822 movs r2, #8 + 7385 0176 DA61 str r2, [r3, #28] + 7386 0178 9CE7 b .L490 + 7387 .LVL649: + 7388 .L492: +3757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7389 .loc 1 3757 0 + 7390 017a 0225 movs r5, #2 + 7391 017c 4CE7 b .L481 + 7392 .L499: + 7393 017e C046 .align 2 + 7394 .L498: + 7395 0180 FF7FFFFF .word -32769 + 7396 0184 00000000 .word I2C_Slave_ISR_DMA + 7397 0188 00000000 .word I2C_DMASlaveTransmitCplt + 7398 018c 00000000 .word I2C_DMAError + 7399 0190 00000000 .word I2C_DMAAbort + 7400 0194 FFBFFFFF .word -16385 + 7401 .cfi_endproc + 7402 .LFE68: + 7404 .section .text.HAL_I2C_Slave_Seq_Receive_IT,"ax",%progbits + 7405 .align 1 + 7406 .global HAL_I2C_Slave_Seq_Receive_IT + 7407 .syntax unified + 7408 .code 16 + 7409 .thumb_func + 7410 .fpu softvfp + 7412 HAL_I2C_Slave_Seq_Receive_IT: + 7413 .LFB69: +3921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Check the parameters */ + 7414 .loc 1 3921 0 + 7415 .cfi_startproc + ARM GAS /tmp/ccskJbbb.s page 265 + + + 7416 @ args = 0, pretend = 0, frame = 0 + 7417 @ frame_needed = 0, uses_anonymous_args = 0 + 7418 .LVL650: + 7419 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 7420 .LCFI59: + 7421 .cfi_def_cfa_offset 24 + 7422 .cfi_offset 3, -24 + 7423 .cfi_offset 4, -20 + 7424 .cfi_offset 5, -16 + 7425 .cfi_offset 6, -12 + 7426 .cfi_offset 7, -8 + 7427 .cfi_offset 14, -4 + 7428 0002 0700 movs r7, r0 + 7429 0004 0C00 movs r4, r1 + 7430 0006 1500 movs r5, r2 + 7431 0008 1E00 movs r6, r3 +3925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7432 .loc 1 3925 0 + 7433 000a 4123 movs r3, #65 + 7434 .LVL651: + 7435 000c C35C ldrb r3, [r0, r3] + 7436 000e 2822 movs r2, #40 + 7437 .LVL652: + 7438 0010 1340 ands r3, r2 + 7439 0012 282B cmp r3, #40 + 7440 0014 01D0 beq .L508 +4001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7441 .loc 1 4001 0 + 7442 0016 0120 movs r0, #1 + 7443 .LVL653: + 7444 .L501: +4003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7445 .loc 1 4003 0 + 7446 @ sp needed + 7447 .LVL654: + 7448 .LVL655: + 7449 .LVL656: + 7450 0018 F8BD pop {r3, r4, r5, r6, r7, pc} + 7451 .LVL657: + 7452 .L508: +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7453 .loc 1 3927 0 + 7454 001a 0029 cmp r1, #0 + 7455 001c 01D0 beq .L502 +3927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7456 .loc 1 3927 0 is_stmt 0 discriminator 1 + 7457 001e 002D cmp r5, #0 + 7458 0020 04D1 bne .L503 + 7459 .L502: +3929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 7460 .loc 1 3929 0 is_stmt 1 + 7461 0022 8023 movs r3, #128 + 7462 0024 9B00 lsls r3, r3, #2 + 7463 0026 7B64 str r3, [r7, #68] +3930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7464 .loc 1 3930 0 + 7465 0028 0120 movs r0, #1 + ARM GAS /tmp/ccskJbbb.s page 266 + + + 7466 .LVL658: + 7467 002a F5E7 b .L501 + 7468 .LVL659: + 7469 .L503: +3934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7470 .loc 1 3934 0 + 7471 002c 0621 movs r1, #6 + 7472 .LVL660: + 7473 002e FFF7FEFF bl I2C_Disable_IRQ + 7474 .LVL661: +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7475 .loc 1 3937 0 + 7476 0032 4023 movs r3, #64 + 7477 0034 FB5C ldrb r3, [r7, r3] + 7478 0036 012B cmp r3, #1 + 7479 0038 43D0 beq .L507 +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7480 .loc 1 3937 0 is_stmt 0 discriminator 2 + 7481 003a 4023 movs r3, #64 + 7482 003c 0122 movs r2, #1 + 7483 003e FA54 strb r2, [r7, r3] +3941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7484 .loc 1 3941 0 is_stmt 1 discriminator 2 + 7485 0040 0133 adds r3, r3, #1 + 7486 0042 FB5C ldrb r3, [r7, r3] + 7487 0044 292B cmp r3, #41 + 7488 0046 22D0 beq .L509 + 7489 .L504: +3967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 7490 .loc 1 3967 0 + 7491 0048 4123 movs r3, #65 + 7492 004a 2A22 movs r2, #42 + 7493 004c FA54 strb r2, [r7, r3] +3968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7494 .loc 1 3968 0 + 7495 004e 0133 adds r3, r3, #1 + 7496 0050 0A3A subs r2, r2, #10 + 7497 0052 FA54 strb r2, [r7, r3] +3969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7498 .loc 1 3969 0 + 7499 0054 0023 movs r3, #0 + 7500 0056 7B64 str r3, [r7, #68] +3972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7501 .loc 1 3972 0 + 7502 0058 3A68 ldr r2, [r7] + 7503 005a 5368 ldr r3, [r2, #4] + 7504 005c 1A49 ldr r1, .L510 + 7505 005e 0B40 ands r3, r1 + 7506 0060 5360 str r3, [r2, #4] +3975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7507 .loc 1 3975 0 + 7508 0062 7C62 str r4, [r7, #36] +3976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 7509 .loc 1 3976 0 + 7510 0064 7D85 strh r5, [r7, #42] +3977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7511 .loc 1 3977 0 + ARM GAS /tmp/ccskJbbb.s page 267 + + + 7512 0066 7B8D ldrh r3, [r7, #42] + 7513 0068 3B85 strh r3, [r7, #40] +3978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 7514 .loc 1 3978 0 + 7515 006a FE62 str r6, [r7, #44] +3979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7516 .loc 1 3979 0 + 7517 006c 174B ldr r3, .L510+4 + 7518 006e 7B63 str r3, [r7, #52] +3981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7519 .loc 1 3981 0 + 7520 0070 3B68 ldr r3, [r7] + 7521 0072 9A69 ldr r2, [r3, #24] + 7522 0074 D203 lsls r2, r2, #15 + 7523 0076 01D4 bmi .L505 +3985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7524 .loc 1 3985 0 + 7525 0078 0822 movs r2, #8 + 7526 007a DA61 str r2, [r3, #28] + 7527 .L505: +3989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7528 .loc 1 3989 0 + 7529 007c 4023 movs r3, #64 + 7530 007e 0022 movs r2, #0 + 7531 0080 FA54 strb r2, [r7, r3] +3995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7532 .loc 1 3995 0 + 7533 0082 0621 movs r1, #6 + 7534 0084 3800 movs r0, r7 + 7535 0086 FFF7FEFF bl I2C_Enable_IRQ + 7536 .LVL662: +3997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7537 .loc 1 3997 0 + 7538 008a 0020 movs r0, #0 + 7539 008c C4E7 b .L501 + 7540 .L509: +3944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7541 .loc 1 3944 0 + 7542 008e 0121 movs r1, #1 + 7543 0090 3800 movs r0, r7 + 7544 0092 FFF7FEFF bl I2C_Disable_IRQ + 7545 .LVL663: +3946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7546 .loc 1 3946 0 + 7547 0096 3B68 ldr r3, [r7] + 7548 0098 1A68 ldr r2, [r3] + 7549 009a 5204 lsls r2, r2, #17 + 7550 009c D4D5 bpl .L504 +3948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7551 .loc 1 3948 0 + 7552 009e 1A68 ldr r2, [r3] + 7553 00a0 0B49 ldr r1, .L510+8 + 7554 00a2 0A40 ands r2, r1 + 7555 00a4 1A60 str r2, [r3] +3951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7556 .loc 1 3951 0 + 7557 00a6 BB6B ldr r3, [r7, #56] + ARM GAS /tmp/ccskJbbb.s page 268 + + + 7558 00a8 002B cmp r3, #0 + 7559 00aa CDD0 beq .L504 +3955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7560 .loc 1 3955 0 + 7561 00ac 094A ldr r2, .L510+12 + 7562 00ae 5A63 str r2, [r3, #52] +3958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7563 .loc 1 3958 0 + 7564 00b0 B86B ldr r0, [r7, #56] + 7565 00b2 FFF7FEFF bl HAL_DMA_Abort_IT + 7566 .LVL664: + 7567 00b6 0028 cmp r0, #0 + 7568 00b8 C6D0 beq .L504 +3961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7569 .loc 1 3961 0 + 7570 00ba B86B ldr r0, [r7, #56] + 7571 00bc 436B ldr r3, [r0, #52] + 7572 00be 9847 blx r3 + 7573 .LVL665: + 7574 00c0 C2E7 b .L504 + 7575 .L507: +3937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7576 .loc 1 3937 0 + 7577 00c2 0220 movs r0, #2 + 7578 00c4 A8E7 b .L501 + 7579 .L511: + 7580 00c6 C046 .align 2 + 7581 .L510: + 7582 00c8 FF7FFFFF .word -32769 + 7583 00cc 00000000 .word I2C_Slave_ISR_IT + 7584 00d0 FFBFFFFF .word -16385 + 7585 00d4 00000000 .word I2C_DMAAbort + 7586 .cfi_endproc + 7587 .LFE69: + 7589 .section .text.HAL_I2C_Slave_Seq_Receive_DMA,"ax",%progbits + 7590 .align 1 + 7591 .global HAL_I2C_Slave_Seq_Receive_DMA + 7592 .syntax unified + 7593 .code 16 + 7594 .thumb_func + 7595 .fpu softvfp + 7597 HAL_I2C_Slave_Seq_Receive_DMA: + 7598 .LFB70: +4016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus; + 7599 .loc 1 4016 0 + 7600 .cfi_startproc + 7601 @ args = 0, pretend = 0, frame = 0 + 7602 @ frame_needed = 0, uses_anonymous_args = 0 + 7603 .LVL666: + 7604 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 7605 .LCFI60: + 7606 .cfi_def_cfa_offset 24 + 7607 .cfi_offset 3, -24 + 7608 .cfi_offset 4, -20 + 7609 .cfi_offset 5, -16 + 7610 .cfi_offset 6, -12 + 7611 .cfi_offset 7, -8 + ARM GAS /tmp/ccskJbbb.s page 269 + + + 7612 .cfi_offset 14, -4 + 7613 0002 0400 movs r4, r0 + 7614 0004 0D00 movs r5, r1 + 7615 0006 1600 movs r6, r2 + 7616 0008 1F00 movs r7, r3 +4022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7617 .loc 1 4022 0 + 7618 000a 4123 movs r3, #65 + 7619 .LVL667: + 7620 000c C35C ldrb r3, [r0, r3] + 7621 000e 2822 movs r2, #40 + 7622 .LVL668: + 7623 0010 1340 ands r3, r2 + 7624 0012 282B cmp r3, #40 + 7625 0014 02D0 beq .L526 +4180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7626 .loc 1 4180 0 + 7627 0016 0125 movs r5, #1 + 7628 .LVL669: + 7629 .L513: +4182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7630 .loc 1 4182 0 + 7631 0018 2800 movs r0, r5 + 7632 @ sp needed + 7633 .LVL670: + 7634 .LVL671: + 7635 001a F8BD pop {r3, r4, r5, r6, r7, pc} + 7636 .LVL672: + 7637 .L526: +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7638 .loc 1 4024 0 + 7639 001c 0029 cmp r1, #0 + 7640 001e 01D0 beq .L514 +4024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7641 .loc 1 4024 0 is_stmt 0 discriminator 1 + 7642 0020 002E cmp r6, #0 + 7643 0022 04D1 bne .L515 + 7644 .L514: +4026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return HAL_ERROR; + 7645 .loc 1 4026 0 is_stmt 1 + 7646 0024 8023 movs r3, #128 + 7647 0026 9B00 lsls r3, r3, #2 + 7648 0028 6364 str r3, [r4, #68] +4027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7649 .loc 1 4027 0 + 7650 002a 0125 movs r5, #1 + 7651 002c F4E7 b .L513 + 7652 .L515: +4031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7653 .loc 1 4031 0 + 7654 002e 0621 movs r1, #6 + 7655 .LVL673: + 7656 0030 FFF7FEFF bl I2C_Disable_IRQ + 7657 .LVL674: +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7658 .loc 1 4034 0 + 7659 0034 4023 movs r3, #64 + ARM GAS /tmp/ccskJbbb.s page 270 + + + 7660 0036 E35C ldrb r3, [r4, r3] + 7661 0038 012B cmp r3, #1 + 7662 003a 00D1 bne .LCB7795 + 7663 003c 9DE0 b .L524 @long jump + 7664 .LCB7795: +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7665 .loc 1 4034 0 is_stmt 0 discriminator 2 + 7666 003e 4023 movs r3, #64 + 7667 0040 0122 movs r2, #1 + 7668 0042 E254 strb r2, [r4, r3] +4038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7669 .loc 1 4038 0 is_stmt 1 discriminator 2 + 7670 0044 0133 adds r3, r3, #1 + 7671 0046 E35C ldrb r3, [r4, r3] + 7672 0048 292B cmp r3, #41 + 7673 004a 46D0 beq .L527 +4063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7674 .loc 1 4063 0 + 7675 004c 4123 movs r3, #65 + 7676 004e E35C ldrb r3, [r4, r3] + 7677 0050 2A2B cmp r3, #42 + 7678 0052 5DD0 beq .L528 + 7679 .L517: +4090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE; + 7680 .loc 1 4090 0 + 7681 0054 4123 movs r3, #65 + 7682 0056 2A22 movs r2, #42 + 7683 0058 E254 strb r2, [r4, r3] +4091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE; + 7684 .loc 1 4091 0 + 7685 005a 0133 adds r3, r3, #1 + 7686 005c 0A3A subs r2, r2, #10 + 7687 005e E254 strb r2, [r4, r3] +4092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7688 .loc 1 4092 0 + 7689 0060 0023 movs r3, #0 + 7690 0062 6364 str r3, [r4, #68] +4095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7691 .loc 1 4095 0 + 7692 0064 2268 ldr r2, [r4] + 7693 0066 5368 ldr r3, [r2, #4] + 7694 0068 4549 ldr r1, .L530 + 7695 006a 0B40 ands r3, r1 + 7696 006c 5360 str r3, [r2, #4] +4098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = Size; + 7697 .loc 1 4098 0 + 7698 006e 6562 str r5, [r4, #36] +4099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount; + 7699 .loc 1 4099 0 + 7700 0070 6685 strh r6, [r4, #42] +4100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = XferOptions; + 7701 .loc 1 4100 0 + 7702 0072 638D ldrh r3, [r4, #42] + 7703 0074 2385 strh r3, [r4, #40] +4101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_DMA; + 7704 .loc 1 4101 0 + 7705 0076 E762 str r7, [r4, #44] + ARM GAS /tmp/ccskJbbb.s page 271 + + +4102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7706 .loc 1 4102 0 + 7707 0078 424B ldr r3, .L530+4 + 7708 007a 6363 str r3, [r4, #52] +4104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7709 .loc 1 4104 0 + 7710 007c E36B ldr r3, [r4, #60] + 7711 007e 002B cmp r3, #0 + 7712 0080 5CD0 beq .L518 +4107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7713 .loc 1 4107 0 + 7714 0082 414A ldr r2, .L530+8 + 7715 0084 9A62 str r2, [r3, #40] +4110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7716 .loc 1 4110 0 + 7717 0086 E36B ldr r3, [r4, #60] + 7718 0088 404A ldr r2, .L530+12 + 7719 008a 1A63 str r2, [r3, #48] +4113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 7720 .loc 1 4113 0 + 7721 008c E26B ldr r2, [r4, #60] + 7722 008e 0023 movs r3, #0 + 7723 0090 D362 str r3, [r2, #44] +4114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7724 .loc 1 4114 0 + 7725 0092 E26B ldr r2, [r4, #60] + 7726 0094 5363 str r3, [r2, #52] +4117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7727 .loc 1 4117 0 + 7728 0096 2168 ldr r1, [r4] + 7729 0098 2431 adds r1, r1, #36 + 7730 009a 238D ldrh r3, [r4, #40] + 7731 009c 2A00 movs r2, r5 + 7732 009e E06B ldr r0, [r4, #60] + 7733 00a0 FFF7FEFF bl HAL_DMA_Start_IT + 7734 .LVL675: + 7735 00a4 051E subs r5, r0, #0 + 7736 .LVL676: +4134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7737 .loc 1 4134 0 + 7738 00a6 57D1 bne .L529 +4137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7739 .loc 1 4137 0 + 7740 00a8 638D ldrh r3, [r4, #42] + 7741 00aa 228D ldrh r2, [r4, #40] + 7742 00ac 9B1A subs r3, r3, r2 + 7743 00ae 9BB2 uxth r3, r3 + 7744 00b0 6385 strh r3, [r4, #42] +4140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7745 .loc 1 4140 0 + 7746 00b2 0023 movs r3, #0 + 7747 00b4 2385 strh r3, [r4, #40] +4157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7748 .loc 1 4157 0 + 7749 00b6 2368 ldr r3, [r4] + 7750 00b8 9A69 ldr r2, [r3, #24] + 7751 00ba D203 lsls r2, r2, #15 + ARM GAS /tmp/ccskJbbb.s page 272 + + + 7752 00bc 5AD5 bpl .L521 + 7753 .L522: +4165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7754 .loc 1 4165 0 + 7755 00be 4023 movs r3, #64 + 7756 00c0 0022 movs r2, #0 + 7757 00c2 E254 strb r2, [r4, r3] +4171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7758 .loc 1 4171 0 + 7759 00c4 0621 movs r1, #6 + 7760 00c6 2000 movs r0, r4 + 7761 .LVL677: + 7762 00c8 FFF7FEFF bl I2C_Enable_IRQ + 7763 .LVL678: +4174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7764 .loc 1 4174 0 + 7765 00cc 2268 ldr r2, [r4] + 7766 00ce 1168 ldr r1, [r2] + 7767 00d0 8023 movs r3, #128 + 7768 00d2 1B02 lsls r3, r3, #8 + 7769 00d4 0B43 orrs r3, r1 + 7770 00d6 1360 str r3, [r2] +4176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7771 .loc 1 4176 0 + 7772 00d8 9EE7 b .L513 + 7773 .LVL679: + 7774 .L527: +4041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7775 .loc 1 4041 0 + 7776 00da 0121 movs r1, #1 + 7777 00dc 2000 movs r0, r4 + 7778 00de FFF7FEFF bl I2C_Disable_IRQ + 7779 .LVL680: +4043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7780 .loc 1 4043 0 + 7781 00e2 2368 ldr r3, [r4] + 7782 00e4 1A68 ldr r2, [r3] + 7783 00e6 5204 lsls r2, r2, #17 + 7784 00e8 B4D5 bpl .L517 +4046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7785 .loc 1 4046 0 + 7786 00ea A26B ldr r2, [r4, #56] + 7787 00ec 002A cmp r2, #0 + 7788 00ee B1D0 beq .L517 +4048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7789 .loc 1 4048 0 + 7790 00f0 1A68 ldr r2, [r3] + 7791 00f2 2749 ldr r1, .L530+16 + 7792 00f4 0A40 ands r2, r1 + 7793 00f6 1A60 str r2, [r3] +4052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7794 .loc 1 4052 0 + 7795 00f8 A36B ldr r3, [r4, #56] + 7796 00fa 264A ldr r2, .L530+20 + 7797 00fc 5A63 str r2, [r3, #52] +4055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7798 .loc 1 4055 0 + ARM GAS /tmp/ccskJbbb.s page 273 + + + 7799 00fe A06B ldr r0, [r4, #56] + 7800 0100 FFF7FEFF bl HAL_DMA_Abort_IT + 7801 .LVL681: + 7802 0104 0028 cmp r0, #0 + 7803 0106 A5D0 beq .L517 +4058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7804 .loc 1 4058 0 + 7805 0108 A06B ldr r0, [r4, #56] + 7806 010a 436B ldr r3, [r0, #52] + 7807 010c 9847 blx r3 + 7808 .LVL682: + 7809 010e A1E7 b .L517 + 7810 .L528: +4065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7811 .loc 1 4065 0 + 7812 0110 2368 ldr r3, [r4] + 7813 0112 1A68 ldr r2, [r3] + 7814 0114 1204 lsls r2, r2, #16 + 7815 0116 9DD5 bpl .L517 +4067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7816 .loc 1 4067 0 + 7817 0118 1A68 ldr r2, [r3] + 7818 011a 1949 ldr r1, .L530 + 7819 011c 0A40 ands r2, r1 + 7820 011e 1A60 str r2, [r3] +4070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7821 .loc 1 4070 0 + 7822 0120 E36B ldr r3, [r4, #60] + 7823 0122 002B cmp r3, #0 + 7824 0124 96D0 beq .L517 +4074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7825 .loc 1 4074 0 + 7826 0126 1B4A ldr r2, .L530+20 + 7827 0128 5A63 str r2, [r3, #52] +4077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7828 .loc 1 4077 0 + 7829 012a E06B ldr r0, [r4, #60] + 7830 012c FFF7FEFF bl HAL_DMA_Abort_IT + 7831 .LVL683: + 7832 0130 0028 cmp r0, #0 + 7833 0132 8FD0 beq .L517 +4080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7834 .loc 1 4080 0 + 7835 0134 E06B ldr r0, [r4, #60] + 7836 0136 436B ldr r3, [r0, #52] + 7837 0138 9847 blx r3 + 7838 .LVL684: + 7839 013a 8BE7 b .L517 + 7840 .L518: +4122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7841 .loc 1 4122 0 + 7842 013c 4123 movs r3, #65 + 7843 013e 2822 movs r2, #40 + 7844 0140 E254 strb r2, [r4, r3] +4123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7845 .loc 1 4123 0 + 7846 0142 0022 movs r2, #0 + ARM GAS /tmp/ccskJbbb.s page 274 + + + 7847 0144 0133 adds r3, r3, #1 + 7848 0146 E254 strb r2, [r4, r3] +4126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7849 .loc 1 4126 0 + 7850 0148 636C ldr r3, [r4, #68] + 7851 014a 8021 movs r1, #128 + 7852 014c 0B43 orrs r3, r1 + 7853 014e 6364 str r3, [r4, #68] +4129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7854 .loc 1 4129 0 + 7855 0150 4023 movs r3, #64 + 7856 0152 E254 strb r2, [r4, r3] +4131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7857 .loc 1 4131 0 + 7858 0154 0125 movs r5, #1 + 7859 .LVL685: + 7860 0156 5FE7 b .L513 + 7861 .LVL686: + 7862 .L529: +4145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 7863 .loc 1 4145 0 + 7864 0158 4123 movs r3, #65 + 7865 015a 2822 movs r2, #40 + 7866 015c E254 strb r2, [r4, r3] +4146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7867 .loc 1 4146 0 + 7868 015e 0022 movs r2, #0 + 7869 0160 0133 adds r3, r3, #1 + 7870 0162 E254 strb r2, [r4, r3] +4149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7871 .loc 1 4149 0 + 7872 0164 636C ldr r3, [r4, #68] + 7873 0166 1021 movs r1, #16 + 7874 0168 0B43 orrs r3, r1 + 7875 016a 6364 str r3, [r4, #68] +4152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7876 .loc 1 4152 0 + 7877 016c 4023 movs r3, #64 + 7878 016e E254 strb r2, [r4, r3] +4154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7879 .loc 1 4154 0 + 7880 0170 0125 movs r5, #1 + 7881 0172 51E7 b .L513 + 7882 .L521: +4161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7883 .loc 1 4161 0 + 7884 0174 0822 movs r2, #8 + 7885 0176 DA61 str r2, [r3, #28] + 7886 0178 A1E7 b .L522 + 7887 .LVL687: + 7888 .L524: +4034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7889 .loc 1 4034 0 + 7890 017a 0225 movs r5, #2 + 7891 .LVL688: + 7892 017c 4CE7 b .L513 + 7893 .L531: + ARM GAS /tmp/ccskJbbb.s page 275 + + + 7894 017e C046 .align 2 + 7895 .L530: + 7896 0180 FF7FFFFF .word -32769 + 7897 0184 00000000 .word I2C_Slave_ISR_DMA + 7898 0188 00000000 .word I2C_DMASlaveReceiveCplt + 7899 018c 00000000 .word I2C_DMAError + 7900 0190 FFBFFFFF .word -16385 + 7901 0194 00000000 .word I2C_DMAAbort + 7902 .cfi_endproc + 7903 .LFE70: + 7905 .section .text.HAL_I2C_EnableListen_IT,"ax",%progbits + 7906 .align 1 + 7907 .global HAL_I2C_EnableListen_IT + 7908 .syntax unified + 7909 .code 16 + 7910 .thumb_func + 7911 .fpu softvfp + 7913 HAL_I2C_EnableListen_IT: + 7914 .LFB71: +4191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 7915 .loc 1 4191 0 + 7916 .cfi_startproc + 7917 @ args = 0, pretend = 0, frame = 0 + 7918 @ frame_needed = 0, uses_anonymous_args = 0 + 7919 .LVL689: + 7920 0000 10B5 push {r4, lr} + 7921 .LCFI61: + 7922 .cfi_def_cfa_offset 8 + 7923 .cfi_offset 4, -8 + 7924 .cfi_offset 14, -4 +4192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7925 .loc 1 4192 0 + 7926 0002 4123 movs r3, #65 + 7927 0004 C35C ldrb r3, [r0, r3] + 7928 0006 202B cmp r3, #32 + 7929 0008 01D0 beq .L535 +4204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7930 .loc 1 4204 0 + 7931 000a 0220 movs r0, #2 + 7932 .LVL690: + 7933 .L533: +4206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7934 .loc 1 4206 0 + 7935 @ sp needed + 7936 000c 10BD pop {r4, pc} + 7937 .LVL691: + 7938 .L535: +4194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 7939 .loc 1 4194 0 + 7940 000e 2133 adds r3, r3, #33 + 7941 0010 2822 movs r2, #40 + 7942 0012 C254 strb r2, [r0, r3] +4195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7943 .loc 1 4195 0 + 7944 0014 034B ldr r3, .L536 + 7945 0016 4363 str r3, [r0, #52] +4198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 276 + + + 7946 .loc 1 4198 0 + 7947 0018 0421 movs r1, #4 + 7948 001a FFF7FEFF bl I2C_Enable_IRQ + 7949 .LVL692: +4200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7950 .loc 1 4200 0 + 7951 001e 0020 movs r0, #0 + 7952 0020 F4E7 b .L533 + 7953 .L537: + 7954 0022 C046 .align 2 + 7955 .L536: + 7956 0024 00000000 .word I2C_Slave_ISR_IT + 7957 .cfi_endproc + 7958 .LFE71: + 7960 .section .text.HAL_I2C_DisableListen_IT,"ax",%progbits + 7961 .align 1 + 7962 .global HAL_I2C_DisableListen_IT + 7963 .syntax unified + 7964 .code 16 + 7965 .thumb_func + 7966 .fpu softvfp + 7968 HAL_I2C_DisableListen_IT: + 7969 .LFB72: +4215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */ + 7970 .loc 1 4215 0 + 7971 .cfi_startproc + 7972 @ args = 0, pretend = 0, frame = 0 + 7973 @ frame_needed = 0, uses_anonymous_args = 0 + 7974 .LVL693: + 7975 0000 70B5 push {r4, r5, r6, lr} + 7976 .LCFI62: + 7977 .cfi_def_cfa_offset 16 + 7978 .cfi_offset 4, -16 + 7979 .cfi_offset 5, -12 + 7980 .cfi_offset 6, -8 + 7981 .cfi_offset 14, -4 +4220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 7982 .loc 1 4220 0 + 7983 0002 4123 movs r3, #65 + 7984 0004 C35C ldrb r3, [r0, r3] + 7985 0006 282B cmp r3, #40 + 7986 0008 01D0 beq .L541 +4235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 7987 .loc 1 4235 0 + 7988 000a 0220 movs r0, #2 + 7989 .LVL694: + 7990 .L539: +4237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 7991 .loc 1 4237 0 + 7992 @ sp needed + 7993 000c 70BD pop {r4, r5, r6, pc} + 7994 .LVL695: + 7995 .L541: +4222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode); + 7996 .loc 1 4222 0 + 7997 000e 4124 movs r4, #65 + 7998 0010 025D ldrb r2, [r0, r4] + ARM GAS /tmp/ccskJbbb.s page 277 + + + 7999 .LVL696: +4223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 8000 .loc 1 4223 0 + 8001 0012 4221 movs r1, #66 + 8002 0014 435C ldrb r3, [r0, r1] + 8003 0016 0325 movs r5, #3 + 8004 0018 2A40 ands r2, r5 + 8005 .LVL697: + 8006 001a 1343 orrs r3, r2 + 8007 001c 0363 str r3, [r0, #48] +4224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8008 .loc 1 4224 0 + 8009 001e 2023 movs r3, #32 + 8010 0020 0355 strb r3, [r0, r4] +4225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 8011 .loc 1 4225 0 + 8012 0022 0023 movs r3, #0 + 8013 0024 4354 strb r3, [r0, r1] +4226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8014 .loc 1 4226 0 + 8015 0026 4363 str r3, [r0, #52] +4229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8016 .loc 1 4229 0 + 8017 0028 3E39 subs r1, r1, #62 + 8018 002a FFF7FEFF bl I2C_Disable_IRQ + 8019 .LVL698: +4231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8020 .loc 1 4231 0 + 8021 002e 0020 movs r0, #0 + 8022 0030 ECE7 b .L539 + 8023 .cfi_endproc + 8024 .LFE72: + 8026 .section .text.HAL_I2C_Master_Abort_IT,"ax",%progbits + 8027 .align 1 + 8028 .global HAL_I2C_Master_Abort_IT + 8029 .syntax unified + 8030 .code 16 + 8031 .thumb_func + 8032 .fpu softvfp + 8034 HAL_I2C_Master_Abort_IT: + 8035 .LFB73: +4248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->Mode == HAL_I2C_MODE_MASTER) + 8036 .loc 1 4248 0 + 8037 .cfi_startproc + 8038 @ args = 0, pretend = 0, frame = 0 + 8039 @ frame_needed = 0, uses_anonymous_args = 0 + 8040 .LVL699: + 8041 0000 70B5 push {r4, r5, r6, lr} + 8042 .LCFI63: + 8043 .cfi_def_cfa_offset 16 + 8044 .cfi_offset 4, -16 + 8045 .cfi_offset 5, -12 + 8046 .cfi_offset 6, -8 + 8047 .cfi_offset 14, -4 + 8048 0002 82B0 sub sp, sp, #8 + 8049 .LCFI64: + 8050 .cfi_def_cfa_offset 24 + ARM GAS /tmp/ccskJbbb.s page 278 + + + 8051 0004 0400 movs r4, r0 + 8052 0006 0D00 movs r5, r1 +4249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8053 .loc 1 4249 0 + 8054 0008 4223 movs r3, #66 + 8055 000a C35C ldrb r3, [r0, r3] + 8056 000c 102B cmp r3, #16 + 8057 000e 02D0 beq .L546 +4279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8058 .loc 1 4279 0 + 8059 0010 0120 movs r0, #1 + 8060 .LVL700: + 8061 .L543: +4281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8062 .loc 1 4281 0 + 8063 0012 02B0 add sp, sp, #8 + 8064 @ sp needed + 8065 .LVL701: + 8066 0014 70BD pop {r4, r5, r6, pc} + 8067 .LVL702: + 8068 .L546: +4252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8069 .loc 1 4252 0 + 8070 0016 3033 adds r3, r3, #48 + 8071 0018 C35C ldrb r3, [r0, r3] + 8072 001a 012B cmp r3, #1 + 8073 001c 1DD0 beq .L545 +4252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8074 .loc 1 4252 0 is_stmt 0 discriminator 2 + 8075 001e 4026 movs r6, #64 + 8076 0020 0123 movs r3, #1 + 8077 0022 8355 strb r3, [r0, r6] +4255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_TX_IT); + 8078 .loc 1 4255 0 is_stmt 1 discriminator 2 + 8079 0024 0221 movs r1, #2 + 8080 .LVL703: + 8081 0026 FFF7FEFF bl I2C_Disable_IRQ + 8082 .LVL704: +4256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8083 .loc 1 4256 0 discriminator 2 + 8084 002a 0121 movs r1, #1 + 8085 002c 2000 movs r0, r4 + 8086 002e FFF7FEFF bl I2C_Disable_IRQ + 8087 .LVL705: +4259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8088 .loc 1 4259 0 discriminator 2 + 8089 0032 4123 movs r3, #65 + 8090 0034 6022 movs r2, #96 + 8091 0036 E254 strb r2, [r4, r3] +4263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8092 .loc 1 4263 0 discriminator 2 + 8093 0038 3F33 adds r3, r3, #63 + 8094 003a 094A ldr r2, .L547 + 8095 003c 0092 str r2, [sp] + 8096 003e 9B04 lsls r3, r3, #18 + 8097 0040 0122 movs r2, #1 + 8098 0042 2900 movs r1, r5 + ARM GAS /tmp/ccskJbbb.s page 279 + + + 8099 0044 2000 movs r0, r4 + 8100 0046 FFF7FEFF bl I2C_TransferConfig + 8101 .LVL706: +4266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8102 .loc 1 4266 0 discriminator 2 + 8103 004a 0023 movs r3, #0 + 8104 004c A355 strb r3, [r4, r6] +4271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8105 .loc 1 4271 0 discriminator 2 + 8106 004e 1221 movs r1, #18 + 8107 0050 2000 movs r0, r4 + 8108 0052 FFF7FEFF bl I2C_Enable_IRQ + 8109 .LVL707: +4273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8110 .loc 1 4273 0 discriminator 2 + 8111 0056 0020 movs r0, #0 + 8112 0058 DBE7 b .L543 + 8113 .LVL708: + 8114 .L545: +4252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8115 .loc 1 4252 0 + 8116 005a 0220 movs r0, #2 + 8117 .LVL709: + 8118 005c D9E7 b .L543 + 8119 .L548: + 8120 005e C046 .align 2 + 8121 .L547: + 8122 0060 00400080 .word -2147467264 + 8123 .cfi_endproc + 8124 .LFE73: + 8126 .section .text.HAL_I2C_EV_IRQHandler,"ax",%progbits + 8127 .align 1 + 8128 .global HAL_I2C_EV_IRQHandler + 8129 .syntax unified + 8130 .code 16 + 8131 .thumb_func + 8132 .fpu softvfp + 8134 HAL_I2C_EV_IRQHandler: + 8135 .LFB74: +4298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Get current IT Flags and IT sources value */ + 8136 .loc 1 4298 0 + 8137 .cfi_startproc + 8138 @ args = 0, pretend = 0, frame = 0 + 8139 @ frame_needed = 0, uses_anonymous_args = 0 + 8140 .LVL710: + 8141 0000 10B5 push {r4, lr} + 8142 .LCFI65: + 8143 .cfi_def_cfa_offset 8 + 8144 .cfi_offset 4, -8 + 8145 .cfi_offset 14, -4 +4300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 8146 .loc 1 4300 0 + 8147 0002 0368 ldr r3, [r0] + 8148 0004 9969 ldr r1, [r3, #24] + 8149 .LVL711: +4301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8150 .loc 1 4301 0 + ARM GAS /tmp/ccskJbbb.s page 280 + + + 8151 0006 1A68 ldr r2, [r3] + 8152 .LVL712: +4304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8153 .loc 1 4304 0 + 8154 0008 436B ldr r3, [r0, #52] + 8155 000a 002B cmp r3, #0 + 8156 000c 00D0 beq .L549 +4306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8157 .loc 1 4306 0 + 8158 000e 9847 blx r3 + 8159 .LVL713: + 8160 .L549: +4308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8161 .loc 1 4308 0 + 8162 @ sp needed + 8163 0010 10BD pop {r4, pc} + 8164 .cfi_endproc + 8165 .LFE74: + 8167 .section .text.HAL_I2C_MasterTxCpltCallback,"ax",%progbits + 8168 .align 1 + 8169 .weak HAL_I2C_MasterTxCpltCallback + 8170 .syntax unified + 8171 .code 16 + 8172 .thumb_func + 8173 .fpu softvfp + 8175 HAL_I2C_MasterTxCpltCallback: + 8176 .LFB76: +4366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8177 .loc 1 4366 0 + 8178 .cfi_startproc + 8179 @ args = 0, pretend = 0, frame = 0 + 8180 @ frame_needed = 0, uses_anonymous_args = 0 + 8181 @ link register save eliminated. + 8182 .LVL714: +4373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8183 .loc 1 4373 0 + 8184 @ sp needed + 8185 0000 7047 bx lr + 8186 .cfi_endproc + 8187 .LFE76: + 8189 .section .text.HAL_I2C_MasterRxCpltCallback,"ax",%progbits + 8190 .align 1 + 8191 .weak HAL_I2C_MasterRxCpltCallback + 8192 .syntax unified + 8193 .code 16 + 8194 .thumb_func + 8195 .fpu softvfp + 8197 HAL_I2C_MasterRxCpltCallback: + 8198 .LFB77: +4382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8199 .loc 1 4382 0 + 8200 .cfi_startproc + 8201 @ args = 0, pretend = 0, frame = 0 + 8202 @ frame_needed = 0, uses_anonymous_args = 0 + 8203 @ link register save eliminated. + 8204 .LVL715: +4389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 281 + + + 8205 .loc 1 4389 0 + 8206 @ sp needed + 8207 0000 7047 bx lr + 8208 .cfi_endproc + 8209 .LFE77: + 8211 .section .text.I2C_ITMasterSeqCplt,"ax",%progbits + 8212 .align 1 + 8213 .syntax unified + 8214 .code 16 + 8215 .thumb_func + 8216 .fpu softvfp + 8218 I2C_ITMasterSeqCplt: + 8219 .LFB96: +5318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ + 8220 .loc 1 5318 0 + 8221 .cfi_startproc + 8222 @ args = 0, pretend = 0, frame = 0 + 8223 @ frame_needed = 0, uses_anonymous_args = 0 + 8224 .LVL716: + 8225 0000 70B5 push {r4, r5, r6, lr} + 8226 .LCFI66: + 8227 .cfi_def_cfa_offset 16 + 8228 .cfi_offset 4, -16 + 8229 .cfi_offset 5, -12 + 8230 .cfi_offset 6, -8 + 8231 .cfi_offset 14, -4 + 8232 0002 0400 movs r4, r0 +5320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8233 .loc 1 5320 0 + 8234 0004 4223 movs r3, #66 + 8235 0006 0022 movs r2, #0 + 8236 0008 C254 strb r2, [r0, r3] +5324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8237 .loc 1 5324 0 + 8238 000a 013B subs r3, r3, #1 + 8239 000c C35C ldrb r3, [r0, r3] + 8240 000e 212B cmp r3, #33 + 8241 0010 0FD0 beq .L556 +5346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX; + 8242 .loc 1 5346 0 + 8243 0012 4123 movs r3, #65 + 8244 0014 2022 movs r2, #32 + 8245 0016 C254 strb r2, [r0, r3] +5347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 8246 .loc 1 5347 0 + 8247 0018 2F3B subs r3, r3, #47 + 8248 001a 0363 str r3, [r0, #48] +5348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8249 .loc 1 5348 0 + 8250 001c 0025 movs r5, #0 + 8251 001e 4563 str r5, [r0, #52] +5351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8252 .loc 1 5351 0 + 8253 0020 0221 movs r1, #2 + 8254 0022 FFF7FEFF bl I2C_Disable_IRQ + 8255 .LVL717: +5354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 282 + + + 8256 .loc 1 5354 0 + 8257 0026 4023 movs r3, #64 + 8258 0028 E554 strb r5, [r4, r3] +5360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 8259 .loc 1 5360 0 + 8260 002a 2000 movs r0, r4 + 8261 002c FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 8262 .LVL718: + 8263 .L553: +5363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8264 .loc 1 5363 0 + 8265 @ sp needed + 8266 .LVL719: + 8267 0030 70BD pop {r4, r5, r6, pc} + 8268 .LVL720: + 8269 .L556: +5326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX; + 8270 .loc 1 5326 0 + 8271 0032 2033 adds r3, r3, #32 + 8272 0034 2032 adds r2, r2, #32 + 8273 0036 C254 strb r2, [r0, r3] +5327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 8274 .loc 1 5327 0 + 8275 0038 303B subs r3, r3, #48 + 8276 003a 0363 str r3, [r0, #48] +5328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8277 .loc 1 5328 0 + 8278 003c 0025 movs r5, #0 + 8279 003e 4563 str r5, [r0, #52] +5331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8280 .loc 1 5331 0 + 8281 0040 0121 movs r1, #1 + 8282 0042 FFF7FEFF bl I2C_Disable_IRQ + 8283 .LVL721: +5334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8284 .loc 1 5334 0 + 8285 0046 4023 movs r3, #64 + 8286 0048 E554 strb r5, [r4, r3] +5340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 8287 .loc 1 5340 0 + 8288 004a 2000 movs r0, r4 + 8289 004c FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 8290 .LVL722: + 8291 0050 EEE7 b .L553 + 8292 .cfi_endproc + 8293 .LFE96: + 8295 .section .text.HAL_I2C_SlaveTxCpltCallback,"ax",%progbits + 8296 .align 1 + 8297 .weak HAL_I2C_SlaveTxCpltCallback + 8298 .syntax unified + 8299 .code 16 + 8300 .thumb_func + 8301 .fpu softvfp + 8303 HAL_I2C_SlaveTxCpltCallback: + 8304 .LFB78: +4397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8305 .loc 1 4397 0 + ARM GAS /tmp/ccskJbbb.s page 283 + + + 8306 .cfi_startproc + 8307 @ args = 0, pretend = 0, frame = 0 + 8308 @ frame_needed = 0, uses_anonymous_args = 0 + 8309 @ link register save eliminated. + 8310 .LVL723: +4404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8311 .loc 1 4404 0 + 8312 @ sp needed + 8313 0000 7047 bx lr + 8314 .cfi_endproc + 8315 .LFE78: + 8317 .section .text.HAL_I2C_SlaveRxCpltCallback,"ax",%progbits + 8318 .align 1 + 8319 .weak HAL_I2C_SlaveRxCpltCallback + 8320 .syntax unified + 8321 .code 16 + 8322 .thumb_func + 8323 .fpu softvfp + 8325 HAL_I2C_SlaveRxCpltCallback: + 8326 .LFB79: +4413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8327 .loc 1 4413 0 + 8328 .cfi_startproc + 8329 @ args = 0, pretend = 0, frame = 0 + 8330 @ frame_needed = 0, uses_anonymous_args = 0 + 8331 @ link register save eliminated. + 8332 .LVL724: +4420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8333 .loc 1 4420 0 + 8334 @ sp needed + 8335 0000 7047 bx lr + 8336 .cfi_endproc + 8337 .LFE79: + 8339 .section .text.I2C_ITSlaveSeqCplt,"ax",%progbits + 8340 .align 1 + 8341 .syntax unified + 8342 .code 16 + 8343 .thumb_func + 8344 .fpu softvfp + 8346 I2C_ITSlaveSeqCplt: + 8347 .LFB97: +5371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset I2C handle mode */ + 8348 .loc 1 5371 0 + 8349 .cfi_startproc + 8350 @ args = 0, pretend = 0, frame = 0 + 8351 @ frame_needed = 0, uses_anonymous_args = 0 + 8352 .LVL725: + 8353 0000 10B5 push {r4, lr} + 8354 .LCFI67: + 8355 .cfi_def_cfa_offset 8 + 8356 .cfi_offset 4, -8 + 8357 .cfi_offset 14, -4 + 8358 0002 0400 movs r4, r0 +5373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8359 .loc 1 5373 0 + 8360 0004 4223 movs r3, #66 + 8361 0006 0022 movs r2, #0 + ARM GAS /tmp/ccskJbbb.s page 284 + + + 8362 0008 C254 strb r2, [r0, r3] +5375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8363 .loc 1 5375 0 + 8364 000a 013B subs r3, r3, #1 + 8365 000c C35C ldrb r3, [r0, r3] + 8366 000e 292B cmp r3, #41 + 8367 0010 04D0 beq .L562 +5395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8368 .loc 1 5395 0 + 8369 0012 4123 movs r3, #65 + 8370 0014 C35C ldrb r3, [r0, r3] + 8371 0016 2A2B cmp r3, #42 + 8372 0018 0FD0 beq .L563 + 8373 .LVL726: + 8374 .L559: +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8375 .loc 1 5418 0 + 8376 @ sp needed + 8377 .LVL727: + 8378 001a 10BD pop {r4, pc} + 8379 .LVL728: + 8380 .L562: +5378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX; + 8381 .loc 1 5378 0 + 8382 001c 1833 adds r3, r3, #24 + 8383 001e 2832 adds r2, r2, #40 + 8384 0020 C254 strb r2, [r0, r3] +5379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8385 .loc 1 5379 0 + 8386 0022 203B subs r3, r3, #32 + 8387 0024 0363 str r3, [r0, #48] +5382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8388 .loc 1 5382 0 + 8389 0026 0121 movs r1, #1 + 8390 0028 FFF7FEFF bl I2C_Disable_IRQ + 8391 .LVL729: +5385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8392 .loc 1 5385 0 + 8393 002c 4023 movs r3, #64 + 8394 002e 0022 movs r2, #0 + 8395 0030 E254 strb r2, [r4, r3] +5391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 8396 .loc 1 5391 0 + 8397 0032 2000 movs r0, r4 + 8398 0034 FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 8399 .LVL730: + 8400 0038 EFE7 b .L559 + 8401 .LVL731: + 8402 .L563: +5398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX; + 8403 .loc 1 5398 0 + 8404 003a 1733 adds r3, r3, #23 + 8405 003c 2822 movs r2, #40 + 8406 003e C254 strb r2, [r0, r3] +5399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8407 .loc 1 5399 0 + 8408 0040 1F3B subs r3, r3, #31 + ARM GAS /tmp/ccskJbbb.s page 285 + + + 8409 0042 0363 str r3, [r0, #48] +5402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8410 .loc 1 5402 0 + 8411 0044 0221 movs r1, #2 + 8412 0046 FFF7FEFF bl I2C_Disable_IRQ + 8413 .LVL732: +5405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8414 .loc 1 5405 0 + 8415 004a 4023 movs r3, #64 + 8416 004c 0022 movs r2, #0 + 8417 004e E254 strb r2, [r4, r3] +5411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 8418 .loc 1 5411 0 + 8419 0050 2000 movs r0, r4 + 8420 0052 FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 8421 .LVL733: +5418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8422 .loc 1 5418 0 + 8423 0056 E0E7 b .L559 + 8424 .cfi_endproc + 8425 .LFE97: + 8427 .section .text.I2C_DMASlaveTransmitCplt,"ax",%progbits + 8428 .align 1 + 8429 .syntax unified + 8430 .code 16 + 8431 .thumb_func + 8432 .fpu softvfp + 8434 I2C_DMASlaveTransmitCplt: + 8435 .LFB104: +5921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 8436 .loc 1 5921 0 + 8437 .cfi_startproc + 8438 @ args = 0, pretend = 0, frame = 0 + 8439 @ frame_needed = 0, uses_anonymous_args = 0 + 8440 .LVL734: + 8441 0000 10B5 push {r4, lr} + 8442 .LCFI68: + 8443 .cfi_def_cfa_offset 8 + 8444 .cfi_offset 4, -8 + 8445 .cfi_offset 14, -4 +5922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 8446 .loc 1 5922 0 + 8447 0002 406A ldr r0, [r0, #36] + 8448 .LVL735: +5923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8449 .loc 1 5923 0 + 8450 0004 C36A ldr r3, [r0, #44] + 8451 .LVL736: +5925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8452 .loc 1 5925 0 + 8453 0006 8022 movs r2, #128 + 8454 0008 5204 lsls r2, r2, #17 + 8455 000a 9342 cmp r3, r2 + 8456 000c 01D0 beq .L565 +5925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8457 .loc 1 5925 0 is_stmt 0 discriminator 1 + 8458 000e 002B cmp r3, #0 + ARM GAS /tmp/ccskJbbb.s page 286 + + + 8459 0010 06D1 bne .L564 + 8460 .L565: +5928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8461 .loc 1 5928 0 is_stmt 1 + 8462 0012 0268 ldr r2, [r0] + 8463 0014 1368 ldr r3, [r2] + 8464 .LVL737: + 8465 0016 0349 ldr r1, .L567 + 8466 0018 0B40 ands r3, r1 + 8467 001a 1360 str r3, [r2] +5932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8468 .loc 1 5932 0 + 8469 001c FFF7FEFF bl I2C_ITSlaveSeqCplt + 8470 .LVL738: + 8471 .L564: +5940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8472 .loc 1 5940 0 + 8473 @ sp needed + 8474 0020 10BD pop {r4, pc} + 8475 .L568: + 8476 0022 C046 .align 2 + 8477 .L567: + 8478 0024 FFBFFFFF .word -16385 + 8479 .cfi_endproc + 8480 .LFE104: + 8482 .section .text.I2C_DMASlaveReceiveCplt,"ax",%progbits + 8483 .align 1 + 8484 .syntax unified + 8485 .code 16 + 8486 .thumb_func + 8487 .fpu softvfp + 8489 I2C_DMASlaveReceiveCplt: + 8490 .LFB106: +5996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 8491 .loc 1 5996 0 + 8492 .cfi_startproc + 8493 @ args = 0, pretend = 0, frame = 0 + 8494 @ frame_needed = 0, uses_anonymous_args = 0 + 8495 .LVL739: + 8496 0000 10B5 push {r4, lr} + 8497 .LCFI69: + 8498 .cfi_def_cfa_offset 8 + 8499 .cfi_offset 4, -8 + 8500 .cfi_offset 14, -4 +5997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 8501 .loc 1 5997 0 + 8502 0002 406A ldr r0, [r0, #36] + 8503 .LVL740: +5998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8504 .loc 1 5998 0 + 8505 0004 C26A ldr r2, [r0, #44] + 8506 .LVL741: +6000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 8507 .loc 1 6000 0 + 8508 0006 C36B ldr r3, [r0, #60] + 8509 0008 1B68 ldr r3, [r3] + 8510 000a 5B68 ldr r3, [r3, #4] + ARM GAS /tmp/ccskJbbb.s page 287 + + + 8511 000c 002B cmp r3, #0 + 8512 000e 09D1 bne .L569 +6000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 8513 .loc 1 6000 0 is_stmt 0 discriminator 1 + 8514 0010 054B ldr r3, .L571 + 8515 0012 9A42 cmp r2, r3 + 8516 0014 06D0 beq .L569 +6004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8517 .loc 1 6004 0 is_stmt 1 + 8518 0016 0268 ldr r2, [r0] + 8519 .LVL742: + 8520 0018 1368 ldr r3, [r2] + 8521 001a 0449 ldr r1, .L571+4 + 8522 001c 0B40 ands r3, r1 + 8523 001e 1360 str r3, [r2] +6007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8524 .loc 1 6007 0 + 8525 0020 FFF7FEFF bl I2C_ITSlaveSeqCplt + 8526 .LVL743: + 8527 .L569: +6015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8528 .loc 1 6015 0 + 8529 @ sp needed + 8530 0024 10BD pop {r4, pc} + 8531 .L572: + 8532 0026 C046 .align 2 + 8533 .L571: + 8534 0028 0000FFFF .word -65536 + 8535 002c FF7FFFFF .word -32769 + 8536 .cfi_endproc + 8537 .LFE106: + 8539 .section .text.HAL_I2C_AddrCallback,"ax",%progbits + 8540 .align 1 + 8541 .weak HAL_I2C_AddrCallback + 8542 .syntax unified + 8543 .code 16 + 8544 .thumb_func + 8545 .fpu softvfp + 8547 HAL_I2C_AddrCallback: + 8548 .LFB80: +4431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8549 .loc 1 4431 0 + 8550 .cfi_startproc + 8551 @ args = 0, pretend = 0, frame = 0 + 8552 @ frame_needed = 0, uses_anonymous_args = 0 + 8553 @ link register save eliminated. + 8554 .LVL744: +4440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8555 .loc 1 4440 0 + 8556 @ sp needed + 8557 0000 7047 bx lr + 8558 .cfi_endproc + 8559 .LFE80: + 8561 .section .text.I2C_ITAddrCplt,"ax",%progbits + 8562 .align 1 + 8563 .syntax unified + 8564 .code 16 + ARM GAS /tmp/ccskJbbb.s page 288 + + + 8565 .thumb_func + 8566 .fpu softvfp + 8568 I2C_ITAddrCplt: + 8569 .LFB95: +5223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint8_t transferdirection; + 8570 .loc 1 5223 0 + 8571 .cfi_startproc + 8572 @ args = 0, pretend = 0, frame = 0 + 8573 @ frame_needed = 0, uses_anonymous_args = 0 + 8574 .LVL745: + 8575 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 8576 .LCFI70: + 8577 .cfi_def_cfa_offset 24 + 8578 .cfi_offset 3, -24 + 8579 .cfi_offset 4, -20 + 8580 .cfi_offset 5, -16 + 8581 .cfi_offset 6, -12 + 8582 .cfi_offset 7, -8 + 8583 .cfi_offset 14, -4 + 8584 0002 0400 movs r4, r0 +5233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8585 .loc 1 5233 0 + 8586 0004 4123 movs r3, #65 + 8587 0006 C35C ldrb r3, [r0, r3] + 8588 0008 2822 movs r2, #40 + 8589 000a 1340 ands r3, r2 + 8590 000c 282B cmp r3, #40 + 8591 000e 06D0 beq .L579 +5305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8592 .loc 1 5305 0 + 8593 0010 0368 ldr r3, [r0] + 8594 0012 0822 movs r2, #8 + 8595 0014 DA61 str r2, [r3, #28] +5308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8596 .loc 1 5308 0 + 8597 0016 4023 movs r3, #64 + 8598 0018 0022 movs r2, #0 + 8599 001a C254 strb r2, [r0, r3] + 8600 .LVL746: + 8601 .L574: +5310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8602 .loc 1 5310 0 + 8603 @ sp needed + 8604 .LVL747: + 8605 001c F8BD pop {r3, r4, r5, r6, r7, pc} + 8606 .LVL748: + 8607 .L579: +5235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** slaveaddrcode = I2C_GET_ADDR_MATCH(hi2c); + 8608 .loc 1 5235 0 + 8609 001e 0368 ldr r3, [r0] + 8610 0020 9E69 ldr r6, [r3, #24] + 8611 0022 360C lsrs r6, r6, #16 + 8612 0024 273A subs r2, r2, #39 + 8613 0026 1640 ands r6, r2 + 8614 .LVL749: +5236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd1code = I2C_GET_OWN_ADDRESS1(hi2c); + 8615 .loc 1 5236 0 + ARM GAS /tmp/ccskJbbb.s page 289 + + + 8616 0028 9A69 ldr r2, [r3, #24] + 8617 002a 120C lsrs r2, r2, #16 + 8618 002c FE27 movs r7, #254 + 8619 002e 3A40 ands r2, r7 + 8620 0030 1500 movs r5, r2 + 8621 .LVL750: +5237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** ownadd2code = I2C_GET_OWN_ADDRESS2(hi2c); + 8622 .loc 1 5237 0 + 8623 0032 9A68 ldr r2, [r3, #8] + 8624 0034 9205 lsls r2, r2, #22 + 8625 0036 920D lsrs r2, r2, #22 + 8626 .LVL751: +5238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8627 .loc 1 5238 0 + 8628 0038 D868 ldr r0, [r3, #12] + 8629 .LVL752: + 8630 003a 0740 ands r7, r0 + 8631 .LVL753: +5241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8632 .loc 1 5241 0 + 8633 003c E168 ldr r1, [r4, #12] + 8634 .LVL754: + 8635 003e 0229 cmp r1, #2 + 8636 0040 22D1 bne .L576 +5243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8637 .loc 1 5243 0 + 8638 0042 D009 lsrs r0, r2, #7 + 8639 0044 4540 eors r5, r0 + 8640 .LVL755: + 8641 0046 0431 adds r1, r1, #4 + 8642 0048 2942 tst r1, r5 + 8643 004a 10D1 bne .L577 + 8644 .LVL756: +5246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->AddrEventCount == 2U) + 8645 .loc 1 5246 0 + 8646 004c A16C ldr r1, [r4, #72] + 8647 004e 0131 adds r1, r1, #1 + 8648 0050 A164 str r1, [r4, #72] +5247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8649 .loc 1 5247 0 + 8650 0052 A16C ldr r1, [r4, #72] + 8651 0054 0229 cmp r1, #2 + 8652 0056 E1D1 bne .L574 +5250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8653 .loc 1 5250 0 + 8654 0058 0021 movs r1, #0 + 8655 005a A164 str r1, [r4, #72] +5253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8656 .loc 1 5253 0 + 8657 005c 0820 movs r0, #8 + 8658 005e D861 str r0, [r3, #28] +5256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8659 .loc 1 5256 0 + 8660 0060 4023 movs r3, #64 + 8661 0062 E154 strb r1, [r4, r3] +5262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 8662 .loc 1 5262 0 + ARM GAS /tmp/ccskJbbb.s page 290 + + + 8663 0064 3100 movs r1, r6 + 8664 0066 2000 movs r0, r4 + 8665 0068 FFF7FEFF bl HAL_I2C_AddrCallback + 8666 .LVL757: + 8667 006c D6E7 b .L574 + 8668 .LVL758: + 8669 .L577: +5271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8670 .loc 1 5271 0 + 8671 006e 0421 movs r1, #4 + 8672 0070 2000 movs r0, r4 + 8673 0072 FFF7FEFF bl I2C_Disable_IRQ + 8674 .LVL759: +5274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8675 .loc 1 5274 0 + 8676 0076 4023 movs r3, #64 + 8677 0078 0022 movs r2, #0 + 8678 007a E254 strb r2, [r4, r3] +5280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 8679 .loc 1 5280 0 + 8680 007c 3A00 movs r2, r7 + 8681 007e 3100 movs r1, r6 + 8682 0080 2000 movs r0, r4 + 8683 0082 FFF7FEFF bl HAL_I2C_AddrCallback + 8684 .LVL760: + 8685 0086 C9E7 b .L574 + 8686 .LVL761: + 8687 .L576: +5288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8688 .loc 1 5288 0 + 8689 0088 0421 movs r1, #4 + 8690 008a 2000 movs r0, r4 + 8691 008c FFF7FEFF bl I2C_Disable_IRQ + 8692 .LVL762: +5291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8693 .loc 1 5291 0 + 8694 0090 4023 movs r3, #64 + 8695 0092 0022 movs r2, #0 + 8696 0094 E254 strb r2, [r4, r3] +5297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 8697 .loc 1 5297 0 + 8698 0096 2A00 movs r2, r5 + 8699 0098 3100 movs r1, r6 + 8700 009a 2000 movs r0, r4 + 8701 009c FFF7FEFF bl HAL_I2C_AddrCallback + 8702 .LVL763: + 8703 00a0 BCE7 b .L574 + 8704 .cfi_endproc + 8705 .LFE95: + 8707 .section .text.HAL_I2C_ListenCpltCallback,"ax",%progbits + 8708 .align 1 + 8709 .weak HAL_I2C_ListenCpltCallback + 8710 .syntax unified + 8711 .code 16 + 8712 .thumb_func + 8713 .fpu softvfp + 8715 HAL_I2C_ListenCpltCallback: + ARM GAS /tmp/ccskJbbb.s page 291 + + + 8716 .LFB81: +4449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8717 .loc 1 4449 0 + 8718 .cfi_startproc + 8719 @ args = 0, pretend = 0, frame = 0 + 8720 @ frame_needed = 0, uses_anonymous_args = 0 + 8721 @ link register save eliminated. + 8722 .LVL764: +4456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8723 .loc 1 4456 0 + 8724 @ sp needed + 8725 0000 7047 bx lr + 8726 .cfi_endproc + 8727 .LFE81: + 8729 .section .text.I2C_ITListenCplt,"ax",%progbits + 8730 .align 1 + 8731 .syntax unified + 8732 .code 16 + 8733 .thumb_func + 8734 .fpu softvfp + 8736 I2C_ITListenCplt: + 8737 .LFB100: +5683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Reset handle parameters */ + 8738 .loc 1 5683 0 + 8739 .cfi_startproc + 8740 @ args = 0, pretend = 0, frame = 0 + 8741 @ frame_needed = 0, uses_anonymous_args = 0 + 8742 .LVL765: + 8743 0000 10B5 push {r4, lr} + 8744 .LCFI71: + 8745 .cfi_def_cfa_offset 8 + 8746 .cfi_offset 4, -8 + 8747 .cfi_offset 14, -4 + 8748 0002 0400 movs r4, r0 +5685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 8749 .loc 1 5685 0 + 8750 0004 164B ldr r3, .L583 + 8751 0006 C362 str r3, [r0, #44] +5686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 8752 .loc 1 5686 0 + 8753 0008 0023 movs r3, #0 + 8754 000a 0363 str r3, [r0, #48] +5687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + 8755 .loc 1 5687 0 + 8756 000c 4122 movs r2, #65 + 8757 000e 2020 movs r0, #32 + 8758 .LVL766: + 8759 0010 A054 strb r0, [r4, r2] +5688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 8760 .loc 1 5688 0 + 8761 0012 0132 adds r2, r2, #1 + 8762 0014 A354 strb r3, [r4, r2] +5689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8763 .loc 1 5689 0 + 8764 0016 6363 str r3, [r4, #52] +5692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8765 .loc 1 5692 0 + ARM GAS /tmp/ccskJbbb.s page 292 + + + 8766 0018 4B07 lsls r3, r1, #29 + 8767 001a 13D5 bpl .L582 +5695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8768 .loc 1 5695 0 + 8769 001c 2368 ldr r3, [r4] + 8770 001e 5B6A ldr r3, [r3, #36] + 8771 0020 626A ldr r2, [r4, #36] + 8772 0022 1370 strb r3, [r2] +5698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8773 .loc 1 5698 0 + 8774 0024 636A ldr r3, [r4, #36] + 8775 0026 0133 adds r3, r3, #1 + 8776 0028 6362 str r3, [r4, #36] +5700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8777 .loc 1 5700 0 + 8778 002a 238D ldrh r3, [r4, #40] + 8779 002c 002B cmp r3, #0 + 8780 002e 09D0 beq .L582 +5702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 8781 .loc 1 5702 0 + 8782 0030 013B subs r3, r3, #1 + 8783 0032 2385 strh r3, [r4, #40] +5703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8784 .loc 1 5703 0 + 8785 0034 638D ldrh r3, [r4, #42] + 8786 0036 013B subs r3, r3, #1 + 8787 0038 9BB2 uxth r3, r3 + 8788 003a 6385 strh r3, [r4, #42] +5706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8789 .loc 1 5706 0 + 8790 003c 636C ldr r3, [r4, #68] + 8791 003e 0422 movs r2, #4 + 8792 0040 1343 orrs r3, r2 + 8793 0042 6364 str r3, [r4, #68] + 8794 .L582: +5711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8795 .loc 1 5711 0 + 8796 0044 0721 movs r1, #7 + 8797 .LVL767: + 8798 0046 2000 movs r0, r4 + 8799 0048 FFF7FEFF bl I2C_Disable_IRQ + 8800 .LVL768: +5714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8801 .loc 1 5714 0 + 8802 004c 2368 ldr r3, [r4] + 8803 004e 1022 movs r2, #16 + 8804 0050 DA61 str r2, [r3, #28] +5717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8805 .loc 1 5717 0 + 8806 0052 4023 movs r3, #64 + 8807 0054 0022 movs r2, #0 + 8808 0056 E254 strb r2, [r4, r3] +5723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 8809 .loc 1 5723 0 + 8810 0058 2000 movs r0, r4 + 8811 005a FFF7FEFF bl HAL_I2C_ListenCpltCallback + 8812 .LVL769: + ARM GAS /tmp/ccskJbbb.s page 293 + + +5725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8813 .loc 1 5725 0 + 8814 @ sp needed + 8815 .LVL770: + 8816 005e 10BD pop {r4, pc} + 8817 .L584: + 8818 .align 2 + 8819 .L583: + 8820 0060 0000FFFF .word -65536 + 8821 .cfi_endproc + 8822 .LFE100: + 8824 .section .text.HAL_I2C_MemTxCpltCallback,"ax",%progbits + 8825 .align 1 + 8826 .weak HAL_I2C_MemTxCpltCallback + 8827 .syntax unified + 8828 .code 16 + 8829 .thumb_func + 8830 .fpu softvfp + 8832 HAL_I2C_MemTxCpltCallback: + 8833 .LFB82: +4465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8834 .loc 1 4465 0 + 8835 .cfi_startproc + 8836 @ args = 0, pretend = 0, frame = 0 + 8837 @ frame_needed = 0, uses_anonymous_args = 0 + 8838 @ link register save eliminated. + 8839 .LVL771: +4472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8840 .loc 1 4472 0 + 8841 @ sp needed + 8842 0000 7047 bx lr + 8843 .cfi_endproc + 8844 .LFE82: + 8846 .section .text.HAL_I2C_MemRxCpltCallback,"ax",%progbits + 8847 .align 1 + 8848 .weak HAL_I2C_MemRxCpltCallback + 8849 .syntax unified + 8850 .code 16 + 8851 .thumb_func + 8852 .fpu softvfp + 8854 HAL_I2C_MemRxCpltCallback: + 8855 .LFB83: +4481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8856 .loc 1 4481 0 + 8857 .cfi_startproc + 8858 @ args = 0, pretend = 0, frame = 0 + 8859 @ frame_needed = 0, uses_anonymous_args = 0 + 8860 @ link register save eliminated. + 8861 .LVL772: +4488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8862 .loc 1 4488 0 + 8863 @ sp needed + 8864 0000 7047 bx lr + 8865 .cfi_endproc + 8866 .LFE83: + 8868 .section .text.HAL_I2C_ErrorCallback,"ax",%progbits + 8869 .align 1 + ARM GAS /tmp/ccskJbbb.s page 294 + + + 8870 .weak HAL_I2C_ErrorCallback + 8871 .syntax unified + 8872 .code 16 + 8873 .thumb_func + 8874 .fpu softvfp + 8876 HAL_I2C_ErrorCallback: + 8877 .LFB84: +4497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8878 .loc 1 4497 0 + 8879 .cfi_startproc + 8880 @ args = 0, pretend = 0, frame = 0 + 8881 @ frame_needed = 0, uses_anonymous_args = 0 + 8882 @ link register save eliminated. + 8883 .LVL773: +4504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8884 .loc 1 4504 0 + 8885 @ sp needed + 8886 0000 7047 bx lr + 8887 .cfi_endproc + 8888 .LFE84: + 8890 .section .text.HAL_I2C_AbortCpltCallback,"ax",%progbits + 8891 .align 1 + 8892 .weak HAL_I2C_AbortCpltCallback + 8893 .syntax unified + 8894 .code 16 + 8895 .thumb_func + 8896 .fpu softvfp + 8898 HAL_I2C_AbortCpltCallback: + 8899 .LFB85: +4513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */ + 8900 .loc 1 4513 0 + 8901 .cfi_startproc + 8902 @ args = 0, pretend = 0, frame = 0 + 8903 @ frame_needed = 0, uses_anonymous_args = 0 + 8904 @ link register save eliminated. + 8905 .LVL774: +4520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8906 .loc 1 4520 0 + 8907 @ sp needed + 8908 0000 7047 bx lr + 8909 .cfi_endproc + 8910 .LFE85: + 8912 .section .text.I2C_ITError,"ax",%progbits + 8913 .align 1 + 8914 .syntax unified + 8915 .code 16 + 8916 .thumb_func + 8917 .fpu softvfp + 8919 I2C_ITError: + 8920 .LFB101: +5734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** HAL_I2C_StateTypeDef tmpstate = hi2c->State; + 8921 .loc 1 5734 0 + 8922 .cfi_startproc + 8923 @ args = 0, pretend = 0, frame = 0 + 8924 @ frame_needed = 0, uses_anonymous_args = 0 + 8925 .LVL775: + 8926 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccskJbbb.s page 295 + + + 8927 .LCFI72: + 8928 .cfi_def_cfa_offset 8 + 8929 .cfi_offset 4, -8 + 8930 .cfi_offset 14, -4 + 8931 0002 0400 movs r4, r0 +5735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8932 .loc 1 5735 0 + 8933 0004 4123 movs r3, #65 + 8934 0006 C35C ldrb r3, [r0, r3] + 8935 .LVL776: +5738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 8936 .loc 1 5738 0 + 8937 0008 0022 movs r2, #0 + 8938 000a 4220 movs r0, #66 + 8939 .LVL777: + 8940 000c 2254 strb r2, [r4, r0] +5739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount = 0U; + 8941 .loc 1 5739 0 + 8942 000e 3548 ldr r0, .L598 + 8943 0010 E062 str r0, [r4, #44] +5740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8944 .loc 1 5740 0 + 8945 0012 6285 strh r2, [r4, #42] +5743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8946 .loc 1 5743 0 + 8947 0014 626C ldr r2, [r4, #68] + 8948 0016 1143 orrs r1, r2 + 8949 .LVL778: + 8950 0018 6164 str r1, [r4, #68] +5747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_RX_LISTEN)) + 8951 .loc 1 5747 0 + 8952 001a 283B subs r3, r3, #40 + 8953 .LVL779: + 8954 001c DBB2 uxtb r3, r3 +5746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpstate == HAL_I2C_STATE_BUSY_TX_LISTEN) || + 8955 .loc 1 5746 0 + 8956 001e 022B cmp r3, #2 + 8957 0020 23D8 bhi .L590 +5751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8958 .loc 1 5751 0 + 8959 0022 0321 movs r1, #3 + 8960 0024 2000 movs r0, r4 + 8961 0026 FFF7FEFF bl I2C_Disable_IRQ + 8962 .LVL780: +5754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE; + 8963 .loc 1 5754 0 + 8964 002a 4123 movs r3, #65 + 8965 002c 2822 movs r2, #40 + 8966 002e E254 strb r2, [r4, r3] +5755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = I2C_Slave_ISR_IT; + 8967 .loc 1 5755 0 + 8968 0030 0023 movs r3, #0 + 8969 0032 2363 str r3, [r4, #48] +5756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 8970 .loc 1 5756 0 + 8971 0034 2C4B ldr r3, .L598+4 + 8972 0036 6363 str r3, [r4, #52] + ARM GAS /tmp/ccskJbbb.s page 296 + + + 8973 .L591: +5775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8974 .loc 1 5775 0 + 8975 0038 2368 ldr r3, [r4] + 8976 003a 1A68 ldr r2, [r3] + 8977 003c 5204 lsls r2, r2, #17 + 8978 003e 23D5 bpl .L593 +5777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8979 .loc 1 5777 0 + 8980 0040 1A68 ldr r2, [r3] + 8981 0042 2A49 ldr r1, .L598+8 + 8982 0044 0A40 ands r2, r1 + 8983 0046 1A60 str r2, [r3] +5779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8984 .loc 1 5779 0 + 8985 0048 A36B ldr r3, [r4, #56] + 8986 004a 002B cmp r3, #0 + 8987 004c 0CD0 beq .L589 +5783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8988 .loc 1 5783 0 + 8989 004e 284A ldr r2, .L598+12 + 8990 0050 5A63 str r2, [r3, #52] +5786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 8991 .loc 1 5786 0 + 8992 0052 4023 movs r3, #64 + 8993 0054 0022 movs r2, #0 + 8994 0056 E254 strb r2, [r4, r3] +5789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 8995 .loc 1 5789 0 + 8996 0058 A06B ldr r0, [r4, #56] + 8997 005a FFF7FEFF bl HAL_DMA_Abort_IT + 8998 .LVL781: + 8999 005e 0028 cmp r0, #0 + 9000 0060 02D0 beq .L589 +5792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9001 .loc 1 5792 0 + 9002 0062 A06B ldr r0, [r4, #56] + 9003 0064 436B ldr r3, [r0, #52] + 9004 0066 9847 blx r3 + 9005 .LVL782: + 9006 .L589: +5844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9007 .loc 1 5844 0 + 9008 @ sp needed + 9009 .LVL783: + 9010 0068 10BD pop {r4, pc} + 9011 .LVL784: + 9012 .L590: +5761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9013 .loc 1 5761 0 + 9014 006a 0721 movs r1, #7 + 9015 006c 2000 movs r0, r4 + 9016 006e FFF7FEFF bl I2C_Disable_IRQ + 9017 .LVL785: +5765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9018 .loc 1 5765 0 + 9019 0072 4123 movs r3, #65 + ARM GAS /tmp/ccskJbbb.s page 297 + + + 9020 0074 E35C ldrb r3, [r4, r3] + 9021 0076 602B cmp r3, #96 + 9022 0078 02D0 beq .L592 +5768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9023 .loc 1 5768 0 + 9024 007a 4123 movs r3, #65 + 9025 007c 2022 movs r2, #32 + 9026 007e E254 strb r2, [r4, r3] + 9027 .L592: +5770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9028 .loc 1 5770 0 + 9029 0080 0023 movs r3, #0 + 9030 0082 2363 str r3, [r4, #48] +5771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9031 .loc 1 5771 0 + 9032 0084 6363 str r3, [r4, #52] + 9033 0086 D7E7 b .L591 + 9034 .L593: +5797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9035 .loc 1 5797 0 + 9036 0088 1A68 ldr r2, [r3] + 9037 008a 1204 lsls r2, r2, #16 + 9038 008c 14D5 bpl .L595 +5799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9039 .loc 1 5799 0 + 9040 008e 1A68 ldr r2, [r3] + 9041 0090 1849 ldr r1, .L598+16 + 9042 0092 0A40 ands r2, r1 + 9043 0094 1A60 str r2, [r3] +5801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9044 .loc 1 5801 0 + 9045 0096 E36B ldr r3, [r4, #60] + 9046 0098 002B cmp r3, #0 + 9047 009a E5D0 beq .L589 +5805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9048 .loc 1 5805 0 + 9049 009c 144A ldr r2, .L598+12 + 9050 009e 5A63 str r2, [r3, #52] +5808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9051 .loc 1 5808 0 + 9052 00a0 4023 movs r3, #64 + 9053 00a2 0022 movs r2, #0 + 9054 00a4 E254 strb r2, [r4, r3] +5811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9055 .loc 1 5811 0 + 9056 00a6 E06B ldr r0, [r4, #60] + 9057 00a8 FFF7FEFF bl HAL_DMA_Abort_IT + 9058 .LVL786: + 9059 00ac 0028 cmp r0, #0 + 9060 00ae DBD0 beq .L589 +5814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9061 .loc 1 5814 0 + 9062 00b0 E06B ldr r0, [r4, #60] + 9063 00b2 436B ldr r3, [r0, #52] + 9064 00b4 9847 blx r3 + 9065 .LVL787: + 9066 00b6 D7E7 b .L589 + ARM GAS /tmp/ccskJbbb.s page 298 + + + 9067 .L595: +5818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9068 .loc 1 5818 0 + 9069 00b8 4123 movs r3, #65 + 9070 00ba E35C ldrb r3, [r4, r3] + 9071 00bc 602B cmp r3, #96 + 9072 00be 06D0 beq .L597 +5835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9073 .loc 1 5835 0 + 9074 00c0 4023 movs r3, #64 + 9075 00c2 0022 movs r2, #0 + 9076 00c4 E254 strb r2, [r4, r3] +5841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9077 .loc 1 5841 0 + 9078 00c6 2000 movs r0, r4 + 9079 00c8 FFF7FEFF bl HAL_I2C_ErrorCallback + 9080 .LVL788: +5844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9081 .loc 1 5844 0 + 9082 00cc CCE7 b .L589 + 9083 .L597: +5820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9084 .loc 1 5820 0 + 9085 00ce 1F3B subs r3, r3, #31 + 9086 00d0 2022 movs r2, #32 + 9087 00d2 E254 strb r2, [r4, r3] +5823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9088 .loc 1 5823 0 + 9089 00d4 013B subs r3, r3, #1 + 9090 00d6 0022 movs r2, #0 + 9091 00d8 E254 strb r2, [r4, r3] +5829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9092 .loc 1 5829 0 + 9093 00da 2000 movs r0, r4 + 9094 00dc FFF7FEFF bl HAL_I2C_AbortCpltCallback + 9095 .LVL789: + 9096 00e0 C2E7 b .L589 + 9097 .L599: + 9098 00e2 C046 .align 2 + 9099 .L598: + 9100 00e4 0000FFFF .word -65536 + 9101 00e8 00000000 .word I2C_Slave_ISR_IT + 9102 00ec FFBFFFFF .word -16385 + 9103 00f0 00000000 .word I2C_DMAAbort + 9104 00f4 FF7FFFFF .word -32769 + 9105 .cfi_endproc + 9106 .LFE101: + 9108 .section .text.I2C_ITSlaveCplt,"ax",%progbits + 9109 .align 1 + 9110 .syntax unified + 9111 .code 16 + 9112 .thumb_func + 9113 .fpu softvfp + 9115 I2C_ITSlaveCplt: + 9116 .LFB99: +5546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpcr1value = READ_REG(hi2c->Instance->CR1); + 9117 .loc 1 5546 0 + ARM GAS /tmp/ccskJbbb.s page 299 + + + 9118 .cfi_startproc + 9119 @ args = 0, pretend = 0, frame = 0 + 9120 @ frame_needed = 0, uses_anonymous_args = 0 + 9121 .LVL790: + 9122 0000 70B5 push {r4, r5, r6, lr} + 9123 .LCFI73: + 9124 .cfi_def_cfa_offset 16 + 9125 .cfi_offset 4, -16 + 9126 .cfi_offset 5, -12 + 9127 .cfi_offset 6, -8 + 9128 .cfi_offset 14, -4 + 9129 0002 0400 movs r4, r0 + 9130 0004 0D00 movs r5, r1 +5547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 9131 .loc 1 5547 0 + 9132 0006 0368 ldr r3, [r0] + 9133 0008 1E68 ldr r6, [r3] + 9134 .LVL791: +5551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9135 .loc 1 5551 0 + 9136 000a 2022 movs r2, #32 + 9137 000c DA61 str r2, [r3, #28] +5554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9138 .loc 1 5554 0 + 9139 000e 0721 movs r1, #7 + 9140 .LVL792: + 9141 0010 FFF7FEFF bl I2C_Disable_IRQ + 9142 .LVL793: +5557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9143 .loc 1 5557 0 + 9144 0014 2268 ldr r2, [r4] + 9145 0016 5168 ldr r1, [r2, #4] + 9146 0018 8023 movs r3, #128 + 9147 001a 1B02 lsls r3, r3, #8 + 9148 001c 0B43 orrs r3, r1 + 9149 001e 5360 str r3, [r2, #4] +5560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9150 .loc 1 5560 0 + 9151 0020 2268 ldr r2, [r4] + 9152 0022 5368 ldr r3, [r2, #4] + 9153 0024 3A49 ldr r1, .L612 + 9154 0026 0B40 ands r3, r1 + 9155 0028 5360 str r3, [r2, #4] +5563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9156 .loc 1 5563 0 + 9157 002a 2000 movs r0, r4 + 9158 002c FFF7FEFF bl I2C_Flush_TXDR + 9159 .LVL794: +5566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9160 .loc 1 5566 0 + 9161 0030 7304 lsls r3, r6, #17 + 9162 0032 3CD5 bpl .L601 +5568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9163 .loc 1 5568 0 + 9164 0034 A36B ldr r3, [r4, #56] + 9165 0036 002B cmp r3, #0 + 9166 0038 03D0 beq .L602 + ARM GAS /tmp/ccskJbbb.s page 300 + + +5570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9167 .loc 1 5570 0 + 9168 003a 1B68 ldr r3, [r3] + 9169 003c 5B68 ldr r3, [r3, #4] + 9170 003e 9BB2 uxth r3, r3 + 9171 0040 6385 strh r3, [r4, #42] + 9172 .L602: +5586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9173 .loc 1 5586 0 + 9174 0042 6B07 lsls r3, r5, #29 + 9175 0044 11D5 bpl .L603 +5589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9176 .loc 1 5589 0 + 9177 0046 0423 movs r3, #4 + 9178 0048 9D43 bics r5, r3 + 9179 .LVL795: +5592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9180 .loc 1 5592 0 + 9181 004a 2368 ldr r3, [r4] + 9182 004c 5B6A ldr r3, [r3, #36] + 9183 004e 626A ldr r2, [r4, #36] + 9184 0050 1370 strb r3, [r2] +5595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9185 .loc 1 5595 0 + 9186 0052 636A ldr r3, [r4, #36] + 9187 0054 0133 adds r3, r3, #1 + 9188 0056 6362 str r3, [r4, #36] +5597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9189 .loc 1 5597 0 + 9190 0058 238D ldrh r3, [r4, #40] + 9191 005a 002B cmp r3, #0 + 9192 005c 05D0 beq .L603 +5599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 9193 .loc 1 5599 0 + 9194 005e 013B subs r3, r3, #1 + 9195 0060 2385 strh r3, [r4, #40] +5600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9196 .loc 1 5600 0 + 9197 0062 638D ldrh r3, [r4, #42] + 9198 0064 013B subs r3, r3, #1 + 9199 0066 9BB2 uxth r3, r3 + 9200 0068 6385 strh r3, [r4, #42] + 9201 .L603: +5605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9202 .loc 1 5605 0 + 9203 006a 638D ldrh r3, [r4, #42] + 9204 006c 9BB2 uxth r3, r3 + 9205 006e 002B cmp r3, #0 + 9206 0070 03D0 beq .L604 +5608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9207 .loc 1 5608 0 + 9208 0072 636C ldr r3, [r4, #68] + 9209 0074 0422 movs r2, #4 + 9210 0076 1343 orrs r3, r2 + 9211 0078 6364 str r3, [r4, #68] + 9212 .L604: +5611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE; + ARM GAS /tmp/ccskJbbb.s page 301 + + + 9213 .loc 1 5611 0 + 9214 007a 0023 movs r3, #0 + 9215 007c 2363 str r3, [r4, #48] +5612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9216 .loc 1 5612 0 + 9217 007e 4222 movs r2, #66 + 9218 0080 A354 strb r3, [r4, r2] +5613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9219 .loc 1 5613 0 + 9220 0082 6363 str r3, [r4, #52] +5615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9221 .loc 1 5615 0 + 9222 0084 636C ldr r3, [r4, #68] + 9223 0086 002B cmp r3, #0 + 9224 0088 1BD1 bne .L609 +5627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9225 .loc 1 5627 0 + 9226 008a E26A ldr r2, [r4, #44] + 9227 008c 214B ldr r3, .L612+4 + 9228 008e 9A42 cmp r2, r3 + 9229 0090 24D1 bne .L610 +5646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9230 .loc 1 5646 0 + 9231 0092 4123 movs r3, #65 + 9232 0094 E35C ldrb r3, [r4, r3] + 9233 0096 222B cmp r3, #34 + 9234 0098 2FD0 beq .L611 +5662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9235 .loc 1 5662 0 + 9236 009a 4123 movs r3, #65 + 9237 009c 2022 movs r2, #32 + 9238 009e E254 strb r2, [r4, r3] +5665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9239 .loc 1 5665 0 + 9240 00a0 013B subs r3, r3, #1 + 9241 00a2 0022 movs r2, #0 + 9242 00a4 E254 strb r2, [r4, r3] +5671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9243 .loc 1 5671 0 + 9244 00a6 2000 movs r0, r4 + 9245 00a8 FFF7FEFF bl HAL_I2C_SlaveTxCpltCallback + 9246 .LVL796: +5674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9247 .loc 1 5674 0 + 9248 00ac 24E0 b .L600 + 9249 .LVL797: + 9250 .L601: +5573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9251 .loc 1 5573 0 + 9252 00ae 3304 lsls r3, r6, #16 + 9253 00b0 C7D5 bpl .L602 +5575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9254 .loc 1 5575 0 + 9255 00b2 E36B ldr r3, [r4, #60] + 9256 00b4 002B cmp r3, #0 + 9257 00b6 C4D0 beq .L602 +5577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + ARM GAS /tmp/ccskJbbb.s page 302 + + + 9258 .loc 1 5577 0 + 9259 00b8 1B68 ldr r3, [r3] + 9260 00ba 5B68 ldr r3, [r3, #4] + 9261 00bc 9BB2 uxth r3, r3 + 9262 00be 6385 strh r3, [r4, #42] + 9263 00c0 BFE7 b .L602 + 9264 .LVL798: + 9265 .L609: +5618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9266 .loc 1 5618 0 + 9267 00c2 616C ldr r1, [r4, #68] + 9268 00c4 2000 movs r0, r4 + 9269 00c6 FFF7FEFF bl I2C_ITError + 9270 .LVL799: +5621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9271 .loc 1 5621 0 + 9272 00ca 4123 movs r3, #65 + 9273 00cc E35C ldrb r3, [r4, r3] + 9274 00ce 282B cmp r3, #40 + 9275 00d0 12D1 bne .L600 +5624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9276 .loc 1 5624 0 + 9277 00d2 2900 movs r1, r5 + 9278 00d4 2000 movs r0, r4 + 9279 00d6 FFF7FEFF bl I2C_ITListenCplt + 9280 .LVL800: + 9281 00da 0DE0 b .L600 + 9282 .L610: +5630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9283 .loc 1 5630 0 + 9284 00dc 2000 movs r0, r4 + 9285 00de FFF7FEFF bl I2C_ITSlaveSeqCplt + 9286 .LVL801: +5632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY; + 9287 .loc 1 5632 0 + 9288 00e2 0C4B ldr r3, .L612+4 + 9289 00e4 E362 str r3, [r4, #44] +5633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9290 .loc 1 5633 0 + 9291 00e6 4123 movs r3, #65 + 9292 00e8 2022 movs r2, #32 + 9293 00ea E254 strb r2, [r4, r3] +5636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9294 .loc 1 5636 0 + 9295 00ec 013B subs r3, r3, #1 + 9296 00ee 0022 movs r2, #0 + 9297 00f0 E254 strb r2, [r4, r3] +5642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9298 .loc 1 5642 0 + 9299 00f2 2000 movs r0, r4 + 9300 00f4 FFF7FEFF bl HAL_I2C_ListenCpltCallback + 9301 .LVL802: + 9302 .L600: +5674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9303 .loc 1 5674 0 + 9304 @ sp needed + 9305 .LVL803: + ARM GAS /tmp/ccskJbbb.s page 303 + + + 9306 .LVL804: + 9307 .LVL805: + 9308 00f8 70BD pop {r4, r5, r6, pc} + 9309 .LVL806: + 9310 .L611: +5648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9311 .loc 1 5648 0 + 9312 00fa 1F33 adds r3, r3, #31 + 9313 00fc 2022 movs r2, #32 + 9314 00fe E254 strb r2, [r4, r3] +5651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9315 .loc 1 5651 0 + 9316 0100 013B subs r3, r3, #1 + 9317 0102 0022 movs r2, #0 + 9318 0104 E254 strb r2, [r4, r3] +5657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9319 .loc 1 5657 0 + 9320 0106 2000 movs r0, r4 + 9321 0108 FFF7FEFF bl HAL_I2C_SlaveRxCpltCallback + 9322 .LVL807: + 9323 010c F4E7 b .L600 + 9324 .L613: + 9325 010e C046 .align 2 + 9326 .L612: + 9327 0110 00E800FE .word -33495040 + 9328 0114 0000FFFF .word -65536 + 9329 .cfi_endproc + 9330 .LFE99: + 9332 .section .text.I2C_Slave_ISR_IT,"ax",%progbits + 9333 .align 1 + 9334 .syntax unified + 9335 .code 16 + 9336 .thumb_func + 9337 .fpu softvfp + 9339 I2C_Slave_ISR_IT: + 9340 .LFB90: +4733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 9341 .loc 1 4733 0 + 9342 .cfi_startproc + 9343 @ args = 0, pretend = 0, frame = 0 + 9344 @ frame_needed = 0, uses_anonymous_args = 0 + 9345 .LVL808: + 9346 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 9347 .LCFI74: + 9348 .cfi_def_cfa_offset 24 + 9349 .cfi_offset 3, -24 + 9350 .cfi_offset 4, -20 + 9351 .cfi_offset 5, -16 + 9352 .cfi_offset 6, -12 + 9353 .cfi_offset 7, -8 + 9354 .cfi_offset 14, -4 + 9355 0002 0400 movs r4, r0 + 9356 0004 0D00 movs r5, r1 + 9357 0006 1600 movs r6, r2 +4734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags; + 9358 .loc 1 4734 0 + 9359 0008 C76A ldr r7, [r0, #44] + ARM GAS /tmp/ccskJbbb.s page 304 + + + 9360 .LVL809: +4738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9361 .loc 1 4738 0 + 9362 000a 4023 movs r3, #64 + 9363 000c C35C ldrb r3, [r0, r3] + 9364 000e 012B cmp r3, #1 + 9365 0010 00D1 bne .LCB9263 + 9366 0012 96E0 b .L628 @long jump + 9367 .LCB9263: +4738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9368 .loc 1 4738 0 is_stmt 0 discriminator 2 + 9369 0014 0123 movs r3, #1 + 9370 0016 4022 movs r2, #64 + 9371 .LVL810: + 9372 0018 8354 strb r3, [r0, r2] +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9373 .loc 1 4741 0 is_stmt 1 discriminator 2 + 9374 001a 4A09 lsrs r2, r1, #5 + 9375 001c 1342 tst r3, r2 + 9376 001e 01D0 beq .L616 +4741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9377 .loc 1 4741 0 is_stmt 0 discriminator 1 + 9378 0020 B306 lsls r3, r6, #26 + 9379 0022 17D4 bmi .L629 + 9380 .LVL811: + 9381 .L616: +4747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9382 .loc 1 4747 0 is_stmt 1 + 9383 0024 EB06 lsls r3, r5, #27 + 9384 0026 40D5 bpl .L617 +4747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9385 .loc 1 4747 0 is_stmt 0 discriminator 1 + 9386 0028 F306 lsls r3, r6, #27 + 9387 002a 3ED5 bpl .L617 +4753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9388 .loc 1 4753 0 is_stmt 1 + 9389 002c 638D ldrh r3, [r4, #42] + 9390 002e 9BB2 uxth r3, r3 + 9391 0030 002B cmp r3, #0 + 9392 0032 28D1 bne .L618 +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9393 .loc 1 4755 0 + 9394 0034 4133 adds r3, r3, #65 + 9395 0036 E35C ldrb r3, [r4, r3] + 9396 0038 282B cmp r3, #40 + 9397 003a 0ED0 beq .L630 + 9398 .L619: +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9399 .loc 1 4760 0 + 9400 003c 4123 movs r3, #65 + 9401 003e E35C ldrb r3, [r4, r3] + 9402 0040 292B cmp r3, #41 + 9403 0042 13D0 beq .L631 + 9404 .L621: +4775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9405 .loc 1 4775 0 + 9406 0044 2368 ldr r3, [r4] + ARM GAS /tmp/ccskJbbb.s page 305 + + + 9407 0046 1022 movs r2, #16 + 9408 0048 DA61 str r2, [r3, #28] + 9409 .L620: +4852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9410 .loc 1 4852 0 + 9411 004a 4023 movs r3, #64 + 9412 004c 0022 movs r2, #0 + 9413 004e E254 strb r2, [r4, r3] +4854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9414 .loc 1 4854 0 + 9415 0050 0020 movs r0, #0 + 9416 .L615: +4855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9417 .loc 1 4855 0 + 9418 @ sp needed + 9419 .LVL812: + 9420 .LVL813: + 9421 .LVL814: + 9422 .LVL815: + 9423 0052 F8BD pop {r3, r4, r5, r6, r7, pc} + 9424 .LVL816: + 9425 .L629: +4744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9426 .loc 1 4744 0 + 9427 0054 FFF7FEFF bl I2C_ITSlaveCplt + 9428 .LVL817: + 9429 0058 E4E7 b .L616 + 9430 .L630: +4755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9431 .loc 1 4755 0 discriminator 1 + 9432 005a 8023 movs r3, #128 + 9433 005c 9B04 lsls r3, r3, #18 + 9434 005e 9F42 cmp r7, r3 + 9435 0060 ECD1 bne .L619 +4758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9436 .loc 1 4758 0 + 9437 0062 2900 movs r1, r5 + 9438 0064 2000 movs r0, r4 + 9439 0066 FFF7FEFF bl I2C_ITListenCplt + 9440 .LVL818: + 9441 006a EEE7 b .L620 + 9442 .L631: +4760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9443 .loc 1 4760 0 discriminator 1 + 9444 006c 364B ldr r3, .L633 + 9445 006e 9F42 cmp r7, r3 + 9446 0070 E8D0 beq .L621 +4763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9447 .loc 1 4763 0 + 9448 0072 2368 ldr r3, [r4] + 9449 0074 1022 movs r2, #16 + 9450 0076 DA61 str r2, [r3, #28] +4766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9451 .loc 1 4766 0 + 9452 0078 2000 movs r0, r4 + 9453 007a FFF7FEFF bl I2C_Flush_TXDR + 9454 .LVL819: + ARM GAS /tmp/ccskJbbb.s page 306 + + +4770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9455 .loc 1 4770 0 + 9456 007e 2000 movs r0, r4 + 9457 0080 FFF7FEFF bl I2C_ITSlaveSeqCplt + 9458 .LVL820: + 9459 0084 E1E7 b .L620 + 9460 .L618: +4782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9461 .loc 1 4782 0 + 9462 0086 2368 ldr r3, [r4] + 9463 0088 1022 movs r2, #16 + 9464 008a DA61 str r2, [r3, #28] +4785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9465 .loc 1 4785 0 + 9466 008c 636C ldr r3, [r4, #68] + 9467 008e 0C3A subs r2, r2, #12 + 9468 0090 1343 orrs r3, r2 + 9469 0092 6364 str r3, [r4, #68] +4787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9470 .loc 1 4787 0 + 9471 0094 002F cmp r7, #0 + 9472 0096 03D0 beq .L622 +4787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9473 .loc 1 4787 0 is_stmt 0 discriminator 1 + 9474 0098 8023 movs r3, #128 + 9475 009a 5B04 lsls r3, r3, #17 + 9476 009c 9F42 cmp r7, r3 + 9477 009e D4D1 bne .L620 + 9478 .L622: +4790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9479 .loc 1 4790 0 is_stmt 1 + 9480 00a0 616C ldr r1, [r4, #68] + 9481 00a2 2000 movs r0, r4 + 9482 00a4 FFF7FEFF bl I2C_ITError + 9483 .LVL821: + 9484 00a8 CFE7 b .L620 + 9485 .L617: +4794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9486 .loc 1 4794 0 + 9487 00aa 6B07 lsls r3, r5, #29 + 9488 00ac 1ED5 bpl .L623 +4794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9489 .loc 1 4794 0 is_stmt 0 discriminator 1 + 9490 00ae 7307 lsls r3, r6, #29 + 9491 00b0 1CD5 bpl .L623 +4796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9492 .loc 1 4796 0 is_stmt 1 + 9493 00b2 638D ldrh r3, [r4, #42] + 9494 00b4 9BB2 uxth r3, r3 + 9495 00b6 002B cmp r3, #0 + 9496 00b8 0DD0 beq .L624 +4799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9497 .loc 1 4799 0 + 9498 00ba 2368 ldr r3, [r4] + 9499 00bc 5B6A ldr r3, [r3, #36] + 9500 00be 626A ldr r2, [r4, #36] + 9501 00c0 1370 strb r3, [r2] + ARM GAS /tmp/ccskJbbb.s page 307 + + +4802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9502 .loc 1 4802 0 + 9503 00c2 636A ldr r3, [r4, #36] + 9504 00c4 0133 adds r3, r3, #1 + 9505 00c6 6362 str r3, [r4, #36] +4804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 9506 .loc 1 4804 0 + 9507 00c8 238D ldrh r3, [r4, #40] + 9508 00ca 013B subs r3, r3, #1 + 9509 00cc 2385 strh r3, [r4, #40] +4805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9510 .loc 1 4805 0 + 9511 00ce 638D ldrh r3, [r4, #42] + 9512 00d0 013B subs r3, r3, #1 + 9513 00d2 9BB2 uxth r3, r3 + 9514 00d4 6385 strh r3, [r4, #42] + 9515 .L624: +4808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 9516 .loc 1 4808 0 + 9517 00d6 638D ldrh r3, [r4, #42] + 9518 00d8 9BB2 uxth r3, r3 + 9519 00da 002B cmp r3, #0 + 9520 00dc B5D1 bne .L620 +4808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (tmpoptions != I2C_NO_OPTION_FRAME)) + 9521 .loc 1 4808 0 is_stmt 0 discriminator 1 + 9522 00de 1A4B ldr r3, .L633 + 9523 00e0 9F42 cmp r7, r3 + 9524 00e2 B2D0 beq .L620 +4812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9525 .loc 1 4812 0 is_stmt 1 + 9526 00e4 2000 movs r0, r4 + 9527 00e6 FFF7FEFF bl I2C_ITSlaveSeqCplt + 9528 .LVL822: + 9529 00ea AEE7 b .L620 + 9530 .L623: +4815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9531 .loc 1 4815 0 + 9532 00ec 2B07 lsls r3, r5, #28 + 9533 00ee 01D5 bpl .L625 +4815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9534 .loc 1 4815 0 is_stmt 0 discriminator 1 + 9535 00f0 3307 lsls r3, r6, #28 + 9536 00f2 16D4 bmi .L632 + 9537 .L625: +4819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9538 .loc 1 4819 0 is_stmt 1 + 9539 00f4 AB07 lsls r3, r5, #30 + 9540 00f6 A8D5 bpl .L620 +4819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9541 .loc 1 4819 0 is_stmt 0 discriminator 1 + 9542 00f8 B307 lsls r3, r6, #30 + 9543 00fa A6D5 bpl .L620 +4825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9544 .loc 1 4825 0 is_stmt 1 + 9545 00fc 638D ldrh r3, [r4, #42] + 9546 00fe 9BB2 uxth r3, r3 + 9547 0100 002B cmp r3, #0 + ARM GAS /tmp/ccskJbbb.s page 308 + + + 9548 0102 13D0 beq .L626 +4828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9549 .loc 1 4828 0 + 9550 0104 2368 ldr r3, [r4] + 9551 0106 626A ldr r2, [r4, #36] + 9552 0108 1278 ldrb r2, [r2] + 9553 010a 9A62 str r2, [r3, #40] +4831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9554 .loc 1 4831 0 + 9555 010c 636A ldr r3, [r4, #36] + 9556 010e 0133 adds r3, r3, #1 + 9557 0110 6362 str r3, [r4, #36] +4833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferSize--; + 9558 .loc 1 4833 0 + 9559 0112 638D ldrh r3, [r4, #42] + 9560 0114 013B subs r3, r3, #1 + 9561 0116 9BB2 uxth r3, r3 + 9562 0118 6385 strh r3, [r4, #42] +4834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9563 .loc 1 4834 0 + 9564 011a 238D ldrh r3, [r4, #40] + 9565 011c 013B subs r3, r3, #1 + 9566 011e 2385 strh r3, [r4, #40] + 9567 0120 93E7 b .L620 + 9568 .L632: +4817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9569 .loc 1 4817 0 + 9570 0122 2900 movs r1, r5 + 9571 0124 2000 movs r0, r4 + 9572 0126 FFF7FEFF bl I2C_ITAddrCplt + 9573 .LVL823: + 9574 012a 8EE7 b .L620 + 9575 .L626: +4838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9576 .loc 1 4838 0 + 9577 012c 8023 movs r3, #128 + 9578 012e 5B04 lsls r3, r3, #17 + 9579 0130 9F42 cmp r7, r3 + 9580 0132 02D0 beq .L627 +4838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9581 .loc 1 4838 0 is_stmt 0 discriminator 1 + 9582 0134 002F cmp r7, #0 + 9583 0136 00D0 beq .LCB9518 + 9584 0138 87E7 b .L620 @long jump + 9585 .LCB9518: + 9586 .L627: +4842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9587 .loc 1 4842 0 is_stmt 1 + 9588 013a 2000 movs r0, r4 + 9589 013c FFF7FEFF bl I2C_ITSlaveSeqCplt + 9590 .LVL824: + 9591 0140 83E7 b .L620 + 9592 .LVL825: + 9593 .L628: +4738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9594 .loc 1 4738 0 + 9595 0142 0220 movs r0, #2 + ARM GAS /tmp/ccskJbbb.s page 309 + + + 9596 .LVL826: + 9597 0144 85E7 b .L615 + 9598 .L634: + 9599 0146 C046 .align 2 + 9600 .L633: + 9601 0148 0000FFFF .word -65536 + 9602 .cfi_endproc + 9603 .LFE90: + 9605 .section .text.I2C_ITMasterCplt,"ax",%progbits + 9606 .align 1 + 9607 .syntax unified + 9608 .code 16 + 9609 .thumb_func + 9610 .fpu softvfp + 9612 I2C_ITMasterCplt: + 9613 .LFB98: +5427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 9614 .loc 1 5427 0 + 9615 .cfi_startproc + 9616 @ args = 0, pretend = 0, frame = 0 + 9617 @ frame_needed = 0, uses_anonymous_args = 0 + 9618 .LVL827: + 9619 0000 10B5 push {r4, lr} + 9620 .LCFI75: + 9621 .cfi_def_cfa_offset 8 + 9622 .cfi_offset 4, -8 + 9623 .cfi_offset 14, -4 + 9624 0002 0400 movs r4, r0 +5431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9625 .loc 1 5431 0 + 9626 0004 0368 ldr r3, [r0] + 9627 0006 2022 movs r2, #32 + 9628 0008 DA61 str r2, [r3, #28] +5434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9629 .loc 1 5434 0 + 9630 000a 0268 ldr r2, [r0] + 9631 000c 5368 ldr r3, [r2, #4] + 9632 000e 2F48 ldr r0, .L646 + 9633 .LVL828: + 9634 0010 0340 ands r3, r0 + 9635 0012 5360 str r3, [r2, #4] +5437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferISR = NULL; + 9636 .loc 1 5437 0 + 9637 0014 0023 movs r3, #0 + 9638 0016 2363 str r3, [r4, #48] +5438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME; + 9639 .loc 1 5438 0 + 9640 0018 6363 str r3, [r4, #52] +5439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9641 .loc 1 5439 0 + 9642 001a 2D4B ldr r3, .L646+4 + 9643 001c E362 str r3, [r4, #44] +5441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9644 .loc 1 5441 0 + 9645 001e CB06 lsls r3, r1, #27 + 9646 0020 06D5 bpl .L636 +5444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 310 + + + 9647 .loc 1 5444 0 + 9648 0022 2368 ldr r3, [r4] + 9649 0024 1022 movs r2, #16 + 9650 0026 DA61 str r2, [r3, #28] +5447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9651 .loc 1 5447 0 + 9652 0028 636C ldr r3, [r4, #68] + 9653 002a 0C3A subs r2, r2, #12 + 9654 002c 1343 orrs r3, r2 + 9655 002e 6364 str r3, [r4, #68] + 9656 .L636: +5451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9657 .loc 1 5451 0 + 9658 0030 2000 movs r0, r4 + 9659 0032 FFF7FEFF bl I2C_Flush_TXDR + 9660 .LVL829: +5454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9661 .loc 1 5454 0 + 9662 0036 0321 movs r1, #3 + 9663 0038 2000 movs r0, r4 + 9664 003a FFF7FEFF bl I2C_Disable_IRQ + 9665 .LVL830: +5457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9666 .loc 1 5457 0 + 9667 003e 626C ldr r2, [r4, #68] + 9668 .LVL831: +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9669 .loc 1 5460 0 + 9670 0040 4123 movs r3, #65 + 9671 0042 E35C ldrb r3, [r4, r3] + 9672 0044 602B cmp r3, #96 + 9673 0046 19D0 beq .L637 +5460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9674 .loc 1 5460 0 is_stmt 0 discriminator 1 + 9675 0048 002A cmp r2, #0 + 9676 004a 17D1 bne .L637 +5466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9677 .loc 1 5466 0 is_stmt 1 + 9678 004c 4123 movs r3, #65 + 9679 004e E35C ldrb r3, [r4, r3] + 9680 0050 212B cmp r3, #33 + 9681 0052 18D0 beq .L643 +5500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9682 .loc 1 5500 0 + 9683 0054 4123 movs r3, #65 + 9684 0056 E35C ldrb r3, [r4, r3] + 9685 0058 222B cmp r3, #34 + 9686 005a 13D1 bne .L635 +5502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9687 .loc 1 5502 0 + 9688 005c 1F33 adds r3, r3, #31 + 9689 005e 2022 movs r2, #32 + 9690 .LVL832: + 9691 0060 E254 strb r2, [r4, r3] +5504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9692 .loc 1 5504 0 + 9693 0062 0133 adds r3, r3, #1 + ARM GAS /tmp/ccskJbbb.s page 311 + + + 9694 0064 E35C ldrb r3, [r4, r3] + 9695 0066 402B cmp r3, #64 + 9696 0068 26D0 beq .L644 +5520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9697 .loc 1 5520 0 + 9698 006a 0023 movs r3, #0 + 9699 006c 4222 movs r2, #66 + 9700 006e A354 strb r3, [r4, r2] +5523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9701 .loc 1 5523 0 + 9702 0070 023A subs r2, r2, #2 + 9703 0072 A354 strb r3, [r4, r2] +5529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9704 .loc 1 5529 0 + 9705 0074 2000 movs r0, r4 + 9706 0076 FFF7FEFF bl HAL_I2C_MasterRxCpltCallback + 9707 .LVL833: +5537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9708 .loc 1 5537 0 + 9709 007a 03E0 b .L635 + 9710 .LVL834: + 9711 .L637: +5463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9712 .loc 1 5463 0 + 9713 007c 616C ldr r1, [r4, #68] + 9714 007e 2000 movs r0, r4 + 9715 0080 FFF7FEFF bl I2C_ITError + 9716 .LVL835: + 9717 .L635: +5537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9718 .loc 1 5537 0 + 9719 @ sp needed + 9720 .LVL836: + 9721 0084 10BD pop {r4, pc} + 9722 .LVL837: + 9723 .L643: +5468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9724 .loc 1 5468 0 + 9725 0086 2033 adds r3, r3, #32 + 9726 0088 2022 movs r2, #32 + 9727 .LVL838: + 9728 008a E254 strb r2, [r4, r3] +5470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9729 .loc 1 5470 0 + 9730 008c 0133 adds r3, r3, #1 + 9731 008e E35C ldrb r3, [r4, r3] + 9732 0090 402B cmp r3, #64 + 9733 0092 08D0 beq .L645 +5486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9734 .loc 1 5486 0 + 9735 0094 0023 movs r3, #0 + 9736 0096 4222 movs r2, #66 + 9737 0098 A354 strb r3, [r4, r2] +5489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9738 .loc 1 5489 0 + 9739 009a 023A subs r2, r2, #2 + 9740 009c A354 strb r3, [r4, r2] + ARM GAS /tmp/ccskJbbb.s page 312 + + +5495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9741 .loc 1 5495 0 + 9742 009e 2000 movs r0, r4 + 9743 00a0 FFF7FEFF bl HAL_I2C_MasterTxCpltCallback + 9744 .LVL839: + 9745 00a4 EEE7 b .L635 + 9746 .L645: +5472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9747 .loc 1 5472 0 + 9748 00a6 0023 movs r3, #0 + 9749 00a8 2232 adds r2, r2, #34 + 9750 00aa A354 strb r3, [r4, r2] +5475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9751 .loc 1 5475 0 + 9752 00ac 023A subs r2, r2, #2 + 9753 00ae A354 strb r3, [r4, r2] +5481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9754 .loc 1 5481 0 + 9755 00b0 2000 movs r0, r4 + 9756 00b2 FFF7FEFF bl HAL_I2C_MemTxCpltCallback + 9757 .LVL840: + 9758 00b6 E5E7 b .L635 + 9759 .L644: +5506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9760 .loc 1 5506 0 + 9761 00b8 0023 movs r3, #0 + 9762 00ba 2232 adds r2, r2, #34 + 9763 00bc A354 strb r3, [r4, r2] +5509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9764 .loc 1 5509 0 + 9765 00be 023A subs r2, r2, #2 + 9766 00c0 A354 strb r3, [r4, r2] +5515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 9767 .loc 1 5515 0 + 9768 00c2 2000 movs r0, r4 + 9769 00c4 FFF7FEFF bl HAL_I2C_MemRxCpltCallback + 9770 .LVL841: + 9771 00c8 DCE7 b .L635 + 9772 .L647: + 9773 00ca C046 .align 2 + 9774 .L646: + 9775 00cc 00E800FE .word -33495040 + 9776 00d0 0000FFFF .word -65536 + 9777 .cfi_endproc + 9778 .LFE98: + 9780 .section .text.I2C_Master_ISR_IT,"ax",%progbits + 9781 .align 1 + 9782 .syntax unified + 9783 .code 16 + 9784 .thumb_func + 9785 .fpu softvfp + 9787 I2C_Master_ISR_IT: + 9788 .LFB89: +4596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 9789 .loc 1 4596 0 + 9790 .cfi_startproc + 9791 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccskJbbb.s page 313 + + + 9792 @ frame_needed = 0, uses_anonymous_args = 0 + 9793 .LVL842: + 9794 0000 70B5 push {r4, r5, r6, lr} + 9795 .LCFI76: + 9796 .cfi_def_cfa_offset 16 + 9797 .cfi_offset 4, -16 + 9798 .cfi_offset 5, -12 + 9799 .cfi_offset 6, -8 + 9800 .cfi_offset 14, -4 + 9801 0002 82B0 sub sp, sp, #8 + 9802 .LCFI77: + 9803 .cfi_def_cfa_offset 24 + 9804 0004 0400 movs r4, r0 + 9805 0006 0D00 movs r5, r1 + 9806 0008 1600 movs r6, r2 + 9807 .LVL843: +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9808 .loc 1 4601 0 + 9809 000a 4023 movs r3, #64 + 9810 000c C35C ldrb r3, [r0, r3] + 9811 000e 012B cmp r3, #1 + 9812 0010 00D1 bne .LCB9725 + 9813 0012 ADE0 b .L662 @long jump + 9814 .LCB9725: +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9815 .loc 1 4601 0 is_stmt 0 discriminator 2 + 9816 0014 0123 movs r3, #1 + 9817 0016 4022 movs r2, #64 + 9818 .LVL844: + 9819 0018 8354 strb r3, [r0, r2] +4603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9820 .loc 1 4603 0 is_stmt 1 discriminator 2 + 9821 001a 0A09 lsrs r2, r1, #4 + 9822 001c 1342 tst r3, r2 + 9823 001e 01D0 beq .L650 +4603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9824 .loc 1 4603 0 is_stmt 0 discriminator 1 + 9825 0020 F306 lsls r3, r6, #27 + 9826 0022 1ED4 bmi .L663 + 9827 .L650: +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9828 .loc 1 4616 0 is_stmt 1 + 9829 0024 6B07 lsls r3, r5, #29 + 9830 0026 26D5 bpl .L652 +4616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9831 .loc 1 4616 0 is_stmt 0 discriminator 1 + 9832 0028 7307 lsls r3, r6, #29 + 9833 002a 24D5 bpl .L652 +4619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9834 .loc 1 4619 0 is_stmt 1 + 9835 002c 0423 movs r3, #4 + 9836 002e 9D43 bics r5, r3 + 9837 .LVL845: +4622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9838 .loc 1 4622 0 + 9839 0030 2368 ldr r3, [r4] + 9840 0032 5B6A ldr r3, [r3, #36] + ARM GAS /tmp/ccskJbbb.s page 314 + + + 9841 0034 626A ldr r2, [r4, #36] + 9842 0036 1370 strb r3, [r2] +4625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9843 .loc 1 4625 0 + 9844 0038 636A ldr r3, [r4, #36] + 9845 003a 0133 adds r3, r3, #1 + 9846 003c 6362 str r3, [r4, #36] +4627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 9847 .loc 1 4627 0 + 9848 003e 238D ldrh r3, [r4, #40] + 9849 0040 013B subs r3, r3, #1 + 9850 0042 2385 strh r3, [r4, #40] +4628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9851 .loc 1 4628 0 + 9852 0044 638D ldrh r3, [r4, #42] + 9853 0046 013B subs r3, r3, #1 + 9854 0048 9BB2 uxth r3, r3 + 9855 004a 6385 strh r3, [r4, #42] + 9856 .LVL846: + 9857 .L651: +4712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9858 .loc 1 4712 0 + 9859 004c AB06 lsls r3, r5, #26 + 9860 004e 02D5 bpl .L661 +4712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9861 .loc 1 4712 0 is_stmt 0 discriminator 1 + 9862 0050 B306 lsls r3, r6, #26 + 9863 0052 00D5 bpl .LCB9787 + 9864 0054 87E0 b .L664 @long jump + 9865 .LCB9787: + 9866 .L661: +4719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9867 .loc 1 4719 0 is_stmt 1 + 9868 0056 4023 movs r3, #64 + 9869 0058 0022 movs r2, #0 + 9870 005a E254 strb r2, [r4, r3] +4721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9871 .loc 1 4721 0 + 9872 005c 0020 movs r0, #0 + 9873 .L649: +4722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9874 .loc 1 4722 0 + 9875 005e 02B0 add sp, sp, #8 + 9876 @ sp needed + 9877 .LVL847: + 9878 .LVL848: + 9879 .LVL849: + 9880 0060 70BD pop {r4, r5, r6, pc} + 9881 .LVL850: + 9882 .L663: +4606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9883 .loc 1 4606 0 + 9884 0062 0368 ldr r3, [r0] + 9885 0064 1022 movs r2, #16 + 9886 0066 DA61 str r2, [r3, #28] +4611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9887 .loc 1 4611 0 + ARM GAS /tmp/ccskJbbb.s page 315 + + + 9888 0068 436C ldr r3, [r0, #68] + 9889 006a 0C3A subs r2, r2, #12 + 9890 006c 1343 orrs r3, r2 + 9891 006e 4364 str r3, [r0, #68] +4614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9892 .loc 1 4614 0 + 9893 0070 FFF7FEFF bl I2C_Flush_TXDR + 9894 .LVL851: + 9895 0074 EAE7 b .L651 + 9896 .LVL852: + 9897 .L652: +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9898 .loc 1 4630 0 + 9899 0076 AB07 lsls r3, r5, #30 + 9900 0078 10D5 bpl .L653 +4630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9901 .loc 1 4630 0 is_stmt 0 discriminator 1 + 9902 007a B307 lsls r3, r6, #30 + 9903 007c 0ED5 bpl .L653 +4633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9904 .loc 1 4633 0 is_stmt 1 + 9905 007e 2368 ldr r3, [r4] + 9906 0080 626A ldr r2, [r4, #36] + 9907 0082 1278 ldrb r2, [r2] + 9908 0084 9A62 str r2, [r3, #40] +4636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9909 .loc 1 4636 0 + 9910 0086 636A ldr r3, [r4, #36] + 9911 0088 0133 adds r3, r3, #1 + 9912 008a 6362 str r3, [r4, #36] +4638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->XferCount--; + 9913 .loc 1 4638 0 + 9914 008c 238D ldrh r3, [r4, #40] + 9915 008e 013B subs r3, r3, #1 + 9916 0090 2385 strh r3, [r4, #40] +4639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9917 .loc 1 4639 0 + 9918 0092 638D ldrh r3, [r4, #42] + 9919 0094 013B subs r3, r3, #1 + 9920 0096 9BB2 uxth r3, r3 + 9921 0098 6385 strh r3, [r4, #42] + 9922 009a D7E7 b .L651 + 9923 .L653: +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9924 .loc 1 4641 0 + 9925 009c 2B06 lsls r3, r5, #24 + 9926 009e 40D5 bpl .L654 +4641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9927 .loc 1 4641 0 is_stmt 0 discriminator 1 + 9928 00a0 7306 lsls r3, r6, #25 + 9929 00a2 3ED5 bpl .L654 +4643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9930 .loc 1 4643 0 is_stmt 1 + 9931 00a4 638D ldrh r3, [r4, #42] + 9932 00a6 9BB2 uxth r3, r3 + 9933 00a8 002B cmp r3, #0 + 9934 00aa 2DD0 beq .L655 + ARM GAS /tmp/ccskJbbb.s page 316 + + +4643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9935 .loc 1 4643 0 is_stmt 0 discriminator 1 + 9936 00ac 238D ldrh r3, [r4, #40] + 9937 00ae 002B cmp r3, #0 + 9938 00b0 2AD1 bne .L655 +4645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 9939 .loc 1 4645 0 is_stmt 1 + 9940 00b2 2368 ldr r3, [r4] + 9941 00b4 5968 ldr r1, [r3, #4] + 9942 .LVL853: + 9943 00b6 8905 lsls r1, r1, #22 + 9944 00b8 890D lsrs r1, r1, #22 + 9945 .LVL854: +4647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9946 .loc 1 4647 0 + 9947 00ba 638D ldrh r3, [r4, #42] + 9948 00bc 9BB2 uxth r3, r3 + 9949 00be FF2B cmp r3, #255 + 9950 00c0 0ED8 bhi .L665 +4654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 9951 .loc 1 4654 0 + 9952 00c2 628D ldrh r2, [r4, #42] + 9953 00c4 92B2 uxth r2, r2 + 9954 00c6 2285 strh r2, [r4, #40] +4655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 9955 .loc 1 4655 0 + 9956 00c8 E06A ldr r0, [r4, #44] + 9957 .LVL855: + 9958 00ca 2A4B ldr r3, .L666 + 9959 00cc 9842 cmp r0, r3 + 9960 00ce 12D0 beq .L657 +4657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9961 .loc 1 4657 0 + 9962 00d0 E36A ldr r3, [r4, #44] + 9963 00d2 D2B2 uxtb r2, r2 + 9964 00d4 0020 movs r0, #0 + 9965 00d6 0090 str r0, [sp] + 9966 00d8 2000 movs r0, r4 + 9967 00da FFF7FEFF bl I2C_TransferConfig + 9968 .LVL856: + 9969 00de B5E7 b .L651 + 9970 .LVL857: + 9971 .L665: +4649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_TransferConfig(hi2c, devaddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, I2C_NO_START + 9972 .loc 1 4649 0 + 9973 00e0 FF23 movs r3, #255 + 9974 00e2 2385 strh r3, [r4, #40] +4650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9975 .loc 1 4650 0 + 9976 00e4 7F3B subs r3, r3, #127 + 9977 00e6 0022 movs r2, #0 + 9978 00e8 0092 str r2, [sp] + 9979 00ea 5B04 lsls r3, r3, #17 + 9980 00ec FF32 adds r2, r2, #255 + 9981 00ee 2000 movs r0, r4 + 9982 .LVL858: + 9983 00f0 FFF7FEFF bl I2C_TransferConfig + ARM GAS /tmp/ccskJbbb.s page 317 + + + 9984 .LVL859: + 9985 00f4 AAE7 b .L651 + 9986 .LVL860: + 9987 .L657: +4661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 9988 .loc 1 4661 0 + 9989 00f6 8023 movs r3, #128 + 9990 00f8 D2B2 uxtb r2, r2 + 9991 00fa 0020 movs r0, #0 + 9992 00fc 0090 str r0, [sp] + 9993 00fe 9B04 lsls r3, r3, #18 + 9994 0100 2000 movs r0, r4 + 9995 0102 FFF7FEFF bl I2C_TransferConfig + 9996 .LVL861: + 9997 0106 A1E7 b .L651 + 9998 .LVL862: + 9999 .L655: +4668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10000 .loc 1 4668 0 + 10001 0108 2368 ldr r3, [r4] + 10002 010a 5B68 ldr r3, [r3, #4] + 10003 010c 9B01 lsls r3, r3, #6 + 10004 010e 03D4 bmi .L658 +4671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10005 .loc 1 4671 0 + 10006 0110 2000 movs r0, r4 + 10007 .LVL863: + 10008 0112 FFF7FEFF bl I2C_ITMasterSeqCplt + 10009 .LVL864: + 10010 0116 99E7 b .L651 + 10011 .LVL865: + 10012 .L658: +4677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10013 .loc 1 4677 0 + 10014 0118 4021 movs r1, #64 + 10015 .LVL866: + 10016 011a 2000 movs r0, r4 + 10017 .LVL867: + 10018 011c FFF7FEFF bl I2C_ITError + 10019 .LVL868: + 10020 0120 94E7 b .L651 + 10021 .LVL869: + 10022 .L654: +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10023 .loc 1 4681 0 + 10024 0122 6B06 lsls r3, r5, #25 + 10025 0124 00D4 bmi .LCB9991 + 10026 0126 91E7 b .L651 @long jump + 10027 .LCB9991: +4681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10028 .loc 1 4681 0 is_stmt 0 discriminator 1 + 10029 0128 7306 lsls r3, r6, #25 + 10030 012a 00D4 bmi .LCB9996 + 10031 012c 8EE7 b .L651 @long jump + 10032 .LCB9996: +4683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10033 .loc 1 4683 0 is_stmt 1 + ARM GAS /tmp/ccskJbbb.s page 318 + + + 10034 012e 638D ldrh r3, [r4, #42] + 10035 0130 9BB2 uxth r3, r3 + 10036 0132 002B cmp r3, #0 + 10037 0134 12D1 bne .L659 +4685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10038 .loc 1 4685 0 + 10039 0136 2368 ldr r3, [r4] + 10040 0138 5A68 ldr r2, [r3, #4] + 10041 013a 9201 lsls r2, r2, #6 + 10042 013c 00D5 bpl .LCB10006 + 10043 013e 85E7 b .L651 @long jump + 10044 .LCB10006: +4688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10045 .loc 1 4688 0 + 10046 0140 E16A ldr r1, [r4, #44] + 10047 .LVL870: + 10048 0142 0C4A ldr r2, .L666 + 10049 0144 9142 cmp r1, r2 + 10050 0146 05D1 bne .L660 +4691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10051 .loc 1 4691 0 + 10052 0148 5968 ldr r1, [r3, #4] + 10053 014a 8022 movs r2, #128 + 10054 014c D201 lsls r2, r2, #7 + 10055 014e 0A43 orrs r2, r1 + 10056 0150 5A60 str r2, [r3, #4] + 10057 0152 7BE7 b .L651 + 10058 .L660: +4696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10059 .loc 1 4696 0 + 10060 0154 2000 movs r0, r4 + 10061 .LVL871: + 10062 0156 FFF7FEFF bl I2C_ITMasterSeqCplt + 10063 .LVL872: + 10064 015a 77E7 b .L651 + 10065 .LVL873: + 10066 .L659: +4704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10067 .loc 1 4704 0 + 10068 015c 4021 movs r1, #64 + 10069 .LVL874: + 10070 015e 2000 movs r0, r4 + 10071 .LVL875: + 10072 0160 FFF7FEFF bl I2C_ITError + 10073 .LVL876: + 10074 0164 72E7 b .L651 + 10075 .LVL877: + 10076 .L664: +4715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10077 .loc 1 4715 0 + 10078 0166 2900 movs r1, r5 + 10079 0168 2000 movs r0, r4 + 10080 016a FFF7FEFF bl I2C_ITMasterCplt + 10081 .LVL878: + 10082 016e 72E7 b .L661 + 10083 .LVL879: + 10084 .L662: + ARM GAS /tmp/ccskJbbb.s page 319 + + +4601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10085 .loc 1 4601 0 + 10086 0170 0220 movs r0, #2 + 10087 .LVL880: + 10088 0172 74E7 b .L649 + 10089 .L667: + 10090 .align 2 + 10091 .L666: + 10092 0174 0000FFFF .word -65536 + 10093 .cfi_endproc + 10094 .LFE89: + 10096 .section .text.I2C_Slave_ISR_DMA,"ax",%progbits + 10097 .align 1 + 10098 .syntax unified + 10099 .code 16 + 10100 .thumb_func + 10101 .fpu softvfp + 10103 I2C_Slave_ISR_DMA: + 10104 .LFB92: +5001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmpoptions = hi2c->XferOptions; + 10105 .loc 1 5001 0 + 10106 .cfi_startproc + 10107 @ args = 0, pretend = 0, frame = 0 + 10108 @ frame_needed = 0, uses_anonymous_args = 0 + 10109 .LVL881: + 10110 0000 F8B5 push {r3, r4, r5, r6, r7, lr} + 10111 .LCFI78: + 10112 .cfi_def_cfa_offset 24 + 10113 .cfi_offset 3, -24 + 10114 .cfi_offset 4, -20 + 10115 .cfi_offset 5, -16 + 10116 .cfi_offset 6, -12 + 10117 .cfi_offset 7, -8 + 10118 .cfi_offset 14, -4 + 10119 0002 0400 movs r4, r0 + 10120 0004 0D00 movs r5, r1 + 10121 0006 1600 movs r6, r2 +5002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t treatdmanack = 0U; + 10122 .loc 1 5002 0 + 10123 0008 C76A ldr r7, [r0, #44] + 10124 .LVL882: +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10125 .loc 1 5006 0 + 10126 000a 4023 movs r3, #64 + 10127 000c C35C ldrb r3, [r0, r3] + 10128 000e 012B cmp r3, #1 + 10129 0010 00D1 bne .LCB10095 + 10130 0012 75E0 b .L682 @long jump + 10131 .LCB10095: +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10132 .loc 1 5006 0 is_stmt 0 discriminator 2 + 10133 0014 0123 movs r3, #1 + 10134 0016 4022 movs r2, #64 + 10135 .LVL883: + 10136 0018 8354 strb r3, [r0, r2] +5009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10137 .loc 1 5009 0 is_stmt 1 discriminator 2 + ARM GAS /tmp/ccskJbbb.s page 320 + + + 10138 001a 4A09 lsrs r2, r1, #5 + 10139 001c 1342 tst r3, r2 + 10140 001e 01D0 beq .L670 +5009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10141 .loc 1 5009 0 is_stmt 0 discriminator 1 + 10142 0020 B306 lsls r3, r6, #26 + 10143 0022 14D4 bmi .L686 + 10144 .LVL884: + 10145 .L670: +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10146 .loc 1 5015 0 is_stmt 1 + 10147 0024 EB06 lsls r3, r5, #27 + 10148 0026 5DD5 bpl .L671 +5015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10149 .loc 1 5015 0 is_stmt 0 discriminator 1 + 10150 0028 F306 lsls r3, r6, #27 + 10151 002a 5BD5 bpl .L671 +5021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 10152 .loc 1 5021 0 is_stmt 1 + 10153 002c B20B lsrs r2, r6, #14 + 10154 002e 0123 movs r3, #1 + 10155 0030 1340 ands r3, r2 + 10156 0032 01D1 bne .L672 +5021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_CR1_RXDMAEN) != RESET)) + 10157 .loc 1 5021 0 is_stmt 0 discriminator 1 + 10158 0034 3204 lsls r2, r6, #16 + 10159 0036 51D5 bpl .L673 + 10160 .L672: +5025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10161 .loc 1 5025 0 is_stmt 1 + 10162 0038 E26B ldr r2, [r4, #60] + 10163 003a 002A cmp r2, #0 + 10164 003c 0AD0 beq .L683 +5027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10165 .loc 1 5027 0 + 10166 003e 3104 lsls r1, r6, #16 + 10167 0040 0AD5 bpl .L684 +5029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10168 .loc 1 5029 0 + 10169 0042 1268 ldr r2, [r2] + 10170 0044 5268 ldr r2, [r2, #4] + 10171 0046 002A cmp r2, #0 + 10172 0048 24D0 beq .L685 +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10173 .loc 1 5003 0 + 10174 004a 0021 movs r1, #0 + 10175 004c 05E0 b .L674 + 10176 .LVL885: + 10177 .L686: +5012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10178 .loc 1 5012 0 + 10179 004e FFF7FEFF bl I2C_ITSlaveCplt + 10180 .LVL886: + 10181 0052 E7E7 b .L670 + 10182 .L683: +5003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10183 .loc 1 5003 0 + ARM GAS /tmp/ccskJbbb.s page 321 + + + 10184 0054 0021 movs r1, #0 + 10185 0056 00E0 b .L674 + 10186 .L684: + 10187 0058 0021 movs r1, #0 + 10188 .L674: + 10189 .LVL887: +5037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10190 .loc 1 5037 0 + 10191 005a A26B ldr r2, [r4, #56] + 10192 005c 002A cmp r2, #0 + 10193 005e 05D0 beq .L675 +5039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10194 .loc 1 5039 0 + 10195 0060 002B cmp r3, #0 + 10196 0062 03D0 beq .L675 +5041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10197 .loc 1 5041 0 + 10198 0064 1368 ldr r3, [r2] + 10199 0066 5B68 ldr r3, [r3, #4] + 10200 0068 002B cmp r3, #0 + 10201 006a 15D0 beq .L676 + 10202 .L675: +5048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10203 .loc 1 5048 0 + 10204 006c 0129 cmp r1, #1 + 10205 006e 13D0 beq .L676 +5077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10206 .loc 1 5077 0 + 10207 0070 2368 ldr r3, [r4] + 10208 0072 1022 movs r2, #16 + 10209 0074 DA61 str r2, [r3, #28] +5080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10210 .loc 1 5080 0 + 10211 0076 636C ldr r3, [r4, #68] + 10212 0078 0C3A subs r2, r2, #12 + 10213 007a 1343 orrs r3, r2 + 10214 007c 6364 str r3, [r4, #68] +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10215 .loc 1 5082 0 + 10216 007e 002F cmp r7, #0 + 10217 0080 03D0 beq .L681 +5082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10218 .loc 1 5082 0 is_stmt 0 discriminator 1 + 10219 0082 8023 movs r3, #128 + 10220 0084 5B04 lsls r3, r3, #17 + 10221 0086 9F42 cmp r7, r3 + 10222 0088 30D1 bne .L679 + 10223 .L681: +5085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10224 .loc 1 5085 0 is_stmt 1 + 10225 008a 616C ldr r1, [r4, #68] + 10226 .LVL888: + 10227 008c 2000 movs r0, r4 + 10228 008e FFF7FEFF bl I2C_ITError + 10229 .LVL889: + 10230 0092 2BE0 b .L679 + 10231 .LVL890: + ARM GAS /tmp/ccskJbbb.s page 322 + + + 10232 .L685: +5031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10233 .loc 1 5031 0 + 10234 0094 0121 movs r1, #1 + 10235 0096 E0E7 b .L674 + 10236 .LVL891: + 10237 .L676: +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10238 .loc 1 5050 0 + 10239 0098 4123 movs r3, #65 + 10240 009a E35C ldrb r3, [r4, r3] + 10241 009c 282B cmp r3, #40 + 10242 009e 07D0 beq .L687 + 10243 .L678: +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10244 .loc 1 5055 0 + 10245 00a0 4123 movs r3, #65 + 10246 00a2 E35C ldrb r3, [r4, r3] + 10247 00a4 292B cmp r3, #41 + 10248 00a6 0CD0 beq .L688 + 10249 .L680: +5070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10250 .loc 1 5070 0 + 10251 00a8 2368 ldr r3, [r4] + 10252 00aa 1022 movs r2, #16 + 10253 00ac DA61 str r2, [r3, #28] + 10254 00ae 1DE0 b .L679 + 10255 .L687: +5050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10256 .loc 1 5050 0 discriminator 1 + 10257 00b0 8023 movs r3, #128 + 10258 00b2 9B04 lsls r3, r3, #18 + 10259 00b4 9F42 cmp r7, r3 + 10260 00b6 F3D1 bne .L678 +5053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10261 .loc 1 5053 0 + 10262 00b8 2900 movs r1, r5 + 10263 .LVL892: + 10264 00ba 2000 movs r0, r4 + 10265 00bc FFF7FEFF bl I2C_ITListenCplt + 10266 .LVL893: + 10267 00c0 14E0 b .L679 + 10268 .LVL894: + 10269 .L688: +5055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10270 .loc 1 5055 0 discriminator 1 + 10271 00c2 104B ldr r3, .L690 + 10272 00c4 9F42 cmp r7, r3 + 10273 00c6 EFD0 beq .L680 +5058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10274 .loc 1 5058 0 + 10275 00c8 2368 ldr r3, [r4] + 10276 00ca 1022 movs r2, #16 + 10277 00cc DA61 str r2, [r3, #28] +5061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10278 .loc 1 5061 0 + 10279 00ce 2000 movs r0, r4 + ARM GAS /tmp/ccskJbbb.s page 323 + + + 10280 00d0 FFF7FEFF bl I2C_Flush_TXDR + 10281 .LVL895: +5065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10282 .loc 1 5065 0 + 10283 00d4 2000 movs r0, r4 + 10284 00d6 FFF7FEFF bl I2C_ITSlaveSeqCplt + 10285 .LVL896: + 10286 00da 07E0 b .L679 + 10287 .LVL897: + 10288 .L673: +5092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10289 .loc 1 5092 0 + 10290 00dc 2368 ldr r3, [r4] + 10291 00de 1022 movs r2, #16 + 10292 00e0 DA61 str r2, [r3, #28] + 10293 00e2 03E0 b .L679 + 10294 .L671: +5095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10295 .loc 1 5095 0 + 10296 00e4 2B07 lsls r3, r5, #28 + 10297 00e6 01D5 bpl .L679 +5095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10298 .loc 1 5095 0 is_stmt 0 discriminator 1 + 10299 00e8 3307 lsls r3, r6, #28 + 10300 00ea 04D4 bmi .L689 + 10301 .LVL898: + 10302 .L679: +5105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10303 .loc 1 5105 0 is_stmt 1 + 10304 00ec 4023 movs r3, #64 + 10305 00ee 0022 movs r2, #0 + 10306 00f0 E254 strb r2, [r4, r3] +5107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10307 .loc 1 5107 0 + 10308 00f2 0020 movs r0, #0 + 10309 .L669: +5108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10310 .loc 1 5108 0 + 10311 @ sp needed + 10312 .LVL899: + 10313 .LVL900: + 10314 .LVL901: + 10315 .LVL902: + 10316 00f4 F8BD pop {r3, r4, r5, r6, r7, pc} + 10317 .LVL903: + 10318 .L689: +5097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10319 .loc 1 5097 0 + 10320 00f6 2900 movs r1, r5 + 10321 00f8 2000 movs r0, r4 + 10322 00fa FFF7FEFF bl I2C_ITAddrCplt + 10323 .LVL904: + 10324 00fe F5E7 b .L679 + 10325 .LVL905: + 10326 .L682: +5006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10327 .loc 1 5006 0 + ARM GAS /tmp/ccskJbbb.s page 324 + + + 10328 0100 0220 movs r0, #2 + 10329 .LVL906: + 10330 0102 F7E7 b .L669 + 10331 .L691: + 10332 .align 2 + 10333 .L690: + 10334 0104 0000FFFF .word -65536 + 10335 .cfi_endproc + 10336 .LFE92: + 10338 .section .text.I2C_Master_ISR_DMA,"ax",%progbits + 10339 .align 1 + 10340 .syntax unified + 10341 .code 16 + 10342 .thumb_func + 10343 .fpu softvfp + 10345 I2C_Master_ISR_DMA: + 10346 .LFB91: +4866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint16_t devaddress; + 10347 .loc 1 4866 0 + 10348 .cfi_startproc + 10349 @ args = 0, pretend = 0, frame = 0 + 10350 @ frame_needed = 0, uses_anonymous_args = 0 + 10351 .LVL907: + 10352 0000 10B5 push {r4, lr} + 10353 .LCFI79: + 10354 .cfi_def_cfa_offset 8 + 10355 .cfi_offset 4, -8 + 10356 .cfi_offset 14, -4 + 10357 0002 82B0 sub sp, sp, #8 + 10358 .LCFI80: + 10359 .cfi_def_cfa_offset 16 + 10360 0004 0400 movs r4, r0 +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10361 .loc 1 4871 0 + 10362 0006 4023 movs r3, #64 + 10363 0008 C35C ldrb r3, [r0, r3] + 10364 000a 012B cmp r3, #1 + 10365 000c 00D1 bne .LCB10362 + 10366 000e 91E0 b .L705 @long jump + 10367 .LCB10362: +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10368 .loc 1 4871 0 is_stmt 0 discriminator 2 + 10369 0010 0123 movs r3, #1 + 10370 0012 4020 movs r0, #64 + 10371 .LVL908: + 10372 0014 2354 strb r3, [r4, r0] +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10373 .loc 1 4873 0 is_stmt 1 discriminator 2 + 10374 0016 0809 lsrs r0, r1, #4 + 10375 0018 0342 tst r3, r0 + 10376 001a 01D0 beq .L694 +4873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10377 .loc 1 4873 0 is_stmt 0 discriminator 1 + 10378 001c D306 lsls r3, r2, #27 + 10379 001e 2FD4 bmi .L707 + 10380 .L694: +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + ARM GAS /tmp/ccskJbbb.s page 325 + + + 10381 .loc 1 4889 0 is_stmt 1 + 10382 0020 0B06 lsls r3, r1, #24 + 10383 0022 60D5 bpl .L696 +4889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10384 .loc 1 4889 0 is_stmt 0 discriminator 1 + 10385 0024 5306 lsls r3, r2, #25 + 10386 0026 5ED5 bpl .L696 +4892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10387 .loc 1 4892 0 is_stmt 1 + 10388 0028 2268 ldr r2, [r4] + 10389 .LVL909: + 10390 002a 1368 ldr r3, [r2] + 10391 002c 4021 movs r1, #64 + 10392 .LVL910: + 10393 002e 8B43 bics r3, r1 + 10394 0030 1360 str r3, [r2] +4894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10395 .loc 1 4894 0 + 10396 0032 638D ldrh r3, [r4, #42] + 10397 0034 9BB2 uxth r3, r3 + 10398 0036 002B cmp r3, #0 + 10399 0038 48D0 beq .L697 +4897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10400 .loc 1 4897 0 + 10401 003a 2368 ldr r3, [r4] + 10402 003c 5968 ldr r1, [r3, #4] + 10403 003e 8905 lsls r1, r1, #22 + 10404 0040 890D lsrs r1, r1, #22 + 10405 .LVL911: +4900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10406 .loc 1 4900 0 + 10407 0042 638D ldrh r3, [r4, #42] + 10408 0044 9BB2 uxth r3, r3 + 10409 0046 FF2B cmp r3, #255 + 10410 0048 2ED9 bls .L698 +4902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE; + 10411 .loc 1 4902 0 + 10412 004a FF23 movs r3, #255 + 10413 004c 2385 strh r3, [r4, #40] + 10414 .LVL912: +4903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10415 .loc 1 4903 0 + 10416 004e 8023 movs r3, #128 + 10417 0050 5B04 lsls r3, r3, #17 + 10418 .LVL913: + 10419 .L699: +4919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10420 .loc 1 4919 0 + 10421 0052 228D ldrh r2, [r4, #40] + 10422 0054 D2B2 uxtb r2, r2 + 10423 0056 0020 movs r0, #0 + 10424 0058 0090 str r0, [sp] + 10425 005a 2000 movs r0, r4 + 10426 005c FFF7FEFF bl I2C_TransferConfig + 10427 .LVL914: +4922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10428 .loc 1 4922 0 + ARM GAS /tmp/ccskJbbb.s page 326 + + + 10429 0060 638D ldrh r3, [r4, #42] + 10430 0062 228D ldrh r2, [r4, #40] + 10431 0064 9B1A subs r3, r3, r2 + 10432 0066 9BB2 uxth r3, r3 + 10433 0068 6385 strh r3, [r4, #42] +4925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10434 .loc 1 4925 0 + 10435 006a 4123 movs r3, #65 + 10436 006c E35C ldrb r3, [r4, r3] + 10437 006e 222B cmp r3, #34 + 10438 0070 25D0 beq .L708 +4931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10439 .loc 1 4931 0 + 10440 0072 2268 ldr r2, [r4] + 10441 0074 1168 ldr r1, [r2] + 10442 0076 8023 movs r3, #128 + 10443 0078 DB01 lsls r3, r3, #7 + 10444 007a 0B43 orrs r3, r1 + 10445 007c 1360 str r3, [r2] + 10446 007e 0DE0 b .L695 + 10447 .LVL915: + 10448 .L707: +4876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10449 .loc 1 4876 0 + 10450 0080 2368 ldr r3, [r4] + 10451 0082 1022 movs r2, #16 + 10452 .LVL916: + 10453 0084 DA61 str r2, [r3, #28] +4879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10454 .loc 1 4879 0 + 10455 0086 636C ldr r3, [r4, #68] + 10456 0088 0C3A subs r2, r2, #12 + 10457 008a 1343 orrs r3, r2 + 10458 008c 6364 str r3, [r4, #68] +4884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10459 .loc 1 4884 0 + 10460 008e 1221 movs r1, #18 + 10461 .LVL917: + 10462 0090 2000 movs r0, r4 + 10463 0092 FFF7FEFF bl I2C_Enable_IRQ + 10464 .LVL918: +4887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10465 .loc 1 4887 0 + 10466 0096 2000 movs r0, r4 + 10467 0098 FFF7FEFF bl I2C_Flush_TXDR + 10468 .LVL919: + 10469 .L695: +4987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10470 .loc 1 4987 0 + 10471 009c 4023 movs r3, #64 + 10472 009e 0022 movs r2, #0 + 10473 00a0 E254 strb r2, [r4, r3] +4989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10474 .loc 1 4989 0 + 10475 00a2 0020 movs r0, #0 + 10476 .L693: +4990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + ARM GAS /tmp/ccskJbbb.s page 327 + + + 10477 .loc 1 4990 0 + 10478 00a4 02B0 add sp, sp, #8 + 10479 @ sp needed + 10480 .LVL920: + 10481 00a6 10BD pop {r4, pc} + 10482 .LVL921: + 10483 .L698: +4907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME) + 10484 .loc 1 4907 0 + 10485 00a8 638D ldrh r3, [r4, #42] + 10486 00aa 2385 strh r3, [r4, #40] +4908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10487 .loc 1 4908 0 + 10488 00ac E26A ldr r2, [r4, #44] + 10489 00ae 224B ldr r3, .L709 + 10490 00b0 9A42 cmp r2, r3 + 10491 00b2 01D0 beq .L706 +4910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10492 .loc 1 4910 0 + 10493 00b4 E36A ldr r3, [r4, #44] + 10494 .LVL922: + 10495 00b6 CCE7 b .L699 + 10496 .LVL923: + 10497 .L706: +4914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10498 .loc 1 4914 0 + 10499 00b8 8023 movs r3, #128 + 10500 00ba 9B04 lsls r3, r3, #18 + 10501 00bc C9E7 b .L699 + 10502 .LVL924: + 10503 .L708: +4927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10504 .loc 1 4927 0 + 10505 00be 2268 ldr r2, [r4] + 10506 00c0 1168 ldr r1, [r2] + 10507 00c2 8023 movs r3, #128 + 10508 00c4 1B02 lsls r3, r3, #8 + 10509 00c6 0B43 orrs r3, r1 + 10510 00c8 1360 str r3, [r2] + 10511 00ca E7E7 b .L695 + 10512 .L697: +4937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10513 .loc 1 4937 0 + 10514 00cc 2368 ldr r3, [r4] + 10515 00ce 5B68 ldr r3, [r3, #4] + 10516 00d0 9B01 lsls r3, r3, #6 + 10517 00d2 03D4 bmi .L701 +4940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10518 .loc 1 4940 0 + 10519 00d4 2000 movs r0, r4 + 10520 00d6 FFF7FEFF bl I2C_ITMasterSeqCplt + 10521 .LVL925: + 10522 00da DFE7 b .L695 + 10523 .L701: +4946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10524 .loc 1 4946 0 + 10525 00dc 4021 movs r1, #64 + ARM GAS /tmp/ccskJbbb.s page 328 + + + 10526 00de 2000 movs r0, r4 + 10527 00e0 FFF7FEFF bl I2C_ITError + 10528 .LVL926: + 10529 00e4 DAE7 b .L695 + 10530 .LVL927: + 10531 .L696: +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10532 .loc 1 4950 0 + 10533 00e6 4B06 lsls r3, r1, #25 + 10534 00e8 1CD5 bpl .L702 +4950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10535 .loc 1 4950 0 is_stmt 0 discriminator 1 + 10536 00ea 5306 lsls r3, r2, #25 + 10537 00ec 1AD5 bpl .L702 +4952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10538 .loc 1 4952 0 is_stmt 1 + 10539 00ee 638D ldrh r3, [r4, #42] + 10540 00f0 9BB2 uxth r3, r3 + 10541 00f2 002B cmp r3, #0 + 10542 00f4 11D1 bne .L703 +4954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10543 .loc 1 4954 0 + 10544 00f6 2368 ldr r3, [r4] + 10545 00f8 5A68 ldr r2, [r3, #4] + 10546 .LVL928: + 10547 00fa 9201 lsls r2, r2, #6 + 10548 00fc CED4 bmi .L695 +4957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10549 .loc 1 4957 0 + 10550 00fe E16A ldr r1, [r4, #44] + 10551 .LVL929: + 10552 0100 0D4A ldr r2, .L709 + 10553 0102 9142 cmp r1, r2 + 10554 0104 05D1 bne .L704 +4960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10555 .loc 1 4960 0 + 10556 0106 5968 ldr r1, [r3, #4] + 10557 0108 8022 movs r2, #128 + 10558 010a D201 lsls r2, r2, #7 + 10559 010c 0A43 orrs r2, r1 + 10560 010e 5A60 str r2, [r3, #4] + 10561 0110 C4E7 b .L695 + 10562 .L704: +4965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10563 .loc 1 4965 0 + 10564 0112 2000 movs r0, r4 + 10565 0114 FFF7FEFF bl I2C_ITMasterSeqCplt + 10566 .LVL930: + 10567 0118 C0E7 b .L695 + 10568 .LVL931: + 10569 .L703: +4973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10570 .loc 1 4973 0 + 10571 011a 4021 movs r1, #64 + 10572 .LVL932: + 10573 011c 2000 movs r0, r4 + 10574 011e FFF7FEFF bl I2C_ITError + ARM GAS /tmp/ccskJbbb.s page 329 + + + 10575 .LVL933: + 10576 0122 BBE7 b .L695 + 10577 .LVL934: + 10578 .L702: +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10579 .loc 1 4976 0 + 10580 0124 8B06 lsls r3, r1, #26 + 10581 0126 B9D5 bpl .L695 +4976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10582 .loc 1 4976 0 is_stmt 0 discriminator 1 + 10583 0128 9306 lsls r3, r2, #26 + 10584 012a B7D5 bpl .L695 +4979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10585 .loc 1 4979 0 is_stmt 1 + 10586 012c 2000 movs r0, r4 + 10587 012e FFF7FEFF bl I2C_ITMasterCplt + 10588 .LVL935: + 10589 0132 B3E7 b .L695 + 10590 .LVL936: + 10591 .L705: +4871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10592 .loc 1 4871 0 + 10593 0134 0220 movs r0, #2 + 10594 .LVL937: + 10595 0136 B5E7 b .L693 + 10596 .L710: + 10597 .align 2 + 10598 .L709: + 10599 0138 0000FFFF .word -65536 + 10600 .cfi_endproc + 10601 .LFE91: + 10603 .section .text.I2C_DMAError,"ax",%progbits + 10604 .align 1 + 10605 .syntax unified + 10606 .code 16 + 10607 .thumb_func + 10608 .fpu softvfp + 10610 I2C_DMAError: + 10611 .LFB107: +6023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 10612 .loc 1 6023 0 + 10613 .cfi_startproc + 10614 @ args = 0, pretend = 0, frame = 0 + 10615 @ frame_needed = 0, uses_anonymous_args = 0 + 10616 .LVL938: + 10617 0000 10B5 push {r4, lr} + 10618 .LCFI81: + 10619 .cfi_def_cfa_offset 8 + 10620 .cfi_offset 4, -8 + 10621 .cfi_offset 14, -4 +6024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10622 .loc 1 6024 0 + 10623 0002 406A ldr r0, [r0, #36] + 10624 .LVL939: +6027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10625 .loc 1 6027 0 + 10626 0004 0268 ldr r2, [r0] + ARM GAS /tmp/ccskJbbb.s page 330 + + + 10627 0006 5168 ldr r1, [r2, #4] + 10628 0008 8023 movs r3, #128 + 10629 000a 1B02 lsls r3, r3, #8 + 10630 000c 0B43 orrs r3, r1 + 10631 000e 5360 str r3, [r2, #4] +6030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10632 .loc 1 6030 0 + 10633 0010 1021 movs r1, #16 + 10634 0012 FFF7FEFF bl I2C_ITError + 10635 .LVL940: +6031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10636 .loc 1 6031 0 + 10637 @ sp needed + 10638 0016 10BD pop {r4, pc} + 10639 .cfi_endproc + 10640 .LFE107: + 10642 .section .text.I2C_DMAMasterTransmitCplt,"ax",%progbits + 10643 .align 1 + 10644 .syntax unified + 10645 .code 16 + 10646 .thumb_func + 10647 .fpu softvfp + 10649 I2C_DMAMasterTransmitCplt: + 10650 .LFB103: +5873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 10651 .loc 1 5873 0 + 10652 .cfi_startproc + 10653 @ args = 0, pretend = 0, frame = 0 + 10654 @ frame_needed = 0, uses_anonymous_args = 0 + 10655 .LVL941: + 10656 0000 10B5 push {r4, lr} + 10657 .LCFI82: + 10658 .cfi_def_cfa_offset 8 + 10659 .cfi_offset 4, -8 + 10660 .cfi_offset 14, -4 +5874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10661 .loc 1 5874 0 + 10662 0002 446A ldr r4, [r0, #36] + 10663 .LVL942: +5877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10664 .loc 1 5877 0 + 10665 0004 2268 ldr r2, [r4] + 10666 0006 1368 ldr r3, [r2] + 10667 0008 1549 ldr r1, .L720 + 10668 000a 0B40 ands r3, r1 + 10669 000c 1360 str r3, [r2] +5880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10670 .loc 1 5880 0 + 10671 000e 638D ldrh r3, [r4, #42] + 10672 0010 9BB2 uxth r3, r3 + 10673 0012 002B cmp r3, #0 + 10674 0014 17D0 beq .L718 +5889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10675 .loc 1 5889 0 + 10676 0016 218D ldrh r1, [r4, #40] + 10677 0018 636A ldr r3, [r4, #36] + 10678 001a 9C46 mov ip, r3 + ARM GAS /tmp/ccskJbbb.s page 331 + + + 10679 001c 6144 add r1, r1, ip + 10680 001e 6162 str r1, [r4, #36] +5892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10681 .loc 1 5892 0 + 10682 0020 638D ldrh r3, [r4, #42] + 10683 0022 9BB2 uxth r3, r3 + 10684 0024 FF2B cmp r3, #255 + 10685 0026 13D9 bls .L715 +5894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10686 .loc 1 5894 0 + 10687 0028 FF23 movs r3, #255 + 10688 002a 2385 strh r3, [r4, #40] + 10689 .L716: +5902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10690 .loc 1 5902 0 + 10691 002c 2268 ldr r2, [r4] + 10692 002e 2832 adds r2, r2, #40 + 10693 0030 238D ldrh r3, [r4, #40] + 10694 0032 A06B ldr r0, [r4, #56] + 10695 .LVL943: + 10696 0034 FFF7FEFF bl HAL_DMA_Start_IT + 10697 .LVL944: + 10698 0038 0028 cmp r0, #0 + 10699 003a 0CD1 bne .L719 +5910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10700 .loc 1 5910 0 + 10701 003c 1221 movs r1, #18 + 10702 003e 2000 movs r0, r4 + 10703 0040 FFF7FEFF bl I2C_Enable_IRQ + 10704 .LVL945: + 10705 .L712: +5913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10706 .loc 1 5913 0 + 10707 @ sp needed + 10708 .LVL946: + 10709 0044 10BD pop {r4, pc} + 10710 .LVL947: + 10711 .L718: +5883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10712 .loc 1 5883 0 + 10713 0046 1221 movs r1, #18 + 10714 0048 2000 movs r0, r4 + 10715 .LVL948: + 10716 004a FFF7FEFF bl I2C_Enable_IRQ + 10717 .LVL949: + 10718 004e F9E7 b .L712 + 10719 .LVL950: + 10720 .L715: +5898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10721 .loc 1 5898 0 + 10722 0050 638D ldrh r3, [r4, #42] + 10723 0052 2385 strh r3, [r4, #40] + 10724 0054 EAE7 b .L716 + 10725 .LVL951: + 10726 .L719: +5905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10727 .loc 1 5905 0 + ARM GAS /tmp/ccskJbbb.s page 332 + + + 10728 0056 1021 movs r1, #16 + 10729 0058 2000 movs r0, r4 + 10730 005a FFF7FEFF bl I2C_ITError + 10731 .LVL952: + 10732 005e F1E7 b .L712 + 10733 .L721: + 10734 .align 2 + 10735 .L720: + 10736 0060 FFBFFFFF .word -16385 + 10737 .cfi_endproc + 10738 .LFE103: + 10740 .section .text.I2C_DMAMasterReceiveCplt,"ax",%progbits + 10741 .align 1 + 10742 .syntax unified + 10743 .code 16 + 10744 .thumb_func + 10745 .fpu softvfp + 10747 I2C_DMAMasterReceiveCplt: + 10748 .LFB105: +5948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 10749 .loc 1 5948 0 + 10750 .cfi_startproc + 10751 @ args = 0, pretend = 0, frame = 0 + 10752 @ frame_needed = 0, uses_anonymous_args = 0 + 10753 .LVL953: + 10754 0000 10B5 push {r4, lr} + 10755 .LCFI83: + 10756 .cfi_def_cfa_offset 8 + 10757 .cfi_offset 4, -8 + 10758 .cfi_offset 14, -4 +5949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10759 .loc 1 5949 0 + 10760 0002 446A ldr r4, [r0, #36] + 10761 .LVL954: +5952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10762 .loc 1 5952 0 + 10763 0004 2268 ldr r2, [r4] + 10764 0006 1368 ldr r3, [r2] + 10765 0008 1549 ldr r1, .L730 + 10766 000a 0B40 ands r3, r1 + 10767 000c 1360 str r3, [r2] +5955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10768 .loc 1 5955 0 + 10769 000e 638D ldrh r3, [r4, #42] + 10770 0010 9BB2 uxth r3, r3 + 10771 0012 002B cmp r3, #0 + 10772 0014 17D0 beq .L728 +5964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10773 .loc 1 5964 0 + 10774 0016 228D ldrh r2, [r4, #40] + 10775 0018 636A ldr r3, [r4, #36] + 10776 001a 9C46 mov ip, r3 + 10777 001c 6244 add r2, r2, ip + 10778 001e 6262 str r2, [r4, #36] +5967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10779 .loc 1 5967 0 + 10780 0020 638D ldrh r3, [r4, #42] + ARM GAS /tmp/ccskJbbb.s page 333 + + + 10781 0022 9BB2 uxth r3, r3 + 10782 0024 FF2B cmp r3, #255 + 10783 0026 13D9 bls .L725 +5969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10784 .loc 1 5969 0 + 10785 0028 FF23 movs r3, #255 + 10786 002a 2385 strh r3, [r4, #40] + 10787 .L726: +5977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10788 .loc 1 5977 0 + 10789 002c 2168 ldr r1, [r4] + 10790 002e 2431 adds r1, r1, #36 + 10791 0030 238D ldrh r3, [r4, #40] + 10792 0032 E06B ldr r0, [r4, #60] + 10793 .LVL955: + 10794 0034 FFF7FEFF bl HAL_DMA_Start_IT + 10795 .LVL956: + 10796 0038 0028 cmp r0, #0 + 10797 003a 0CD1 bne .L729 +5985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10798 .loc 1 5985 0 + 10799 003c 1221 movs r1, #18 + 10800 003e 2000 movs r0, r4 + 10801 0040 FFF7FEFF bl I2C_Enable_IRQ + 10802 .LVL957: + 10803 .L722: +5988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10804 .loc 1 5988 0 + 10805 @ sp needed + 10806 .LVL958: + 10807 0044 10BD pop {r4, pc} + 10808 .LVL959: + 10809 .L728: +5958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10810 .loc 1 5958 0 + 10811 0046 1221 movs r1, #18 + 10812 0048 2000 movs r0, r4 + 10813 .LVL960: + 10814 004a FFF7FEFF bl I2C_Enable_IRQ + 10815 .LVL961: + 10816 004e F9E7 b .L722 + 10817 .LVL962: + 10818 .L725: +5973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10819 .loc 1 5973 0 + 10820 0050 638D ldrh r3, [r4, #42] + 10821 0052 2385 strh r3, [r4, #40] + 10822 0054 EAE7 b .L726 + 10823 .LVL963: + 10824 .L729: +5980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10825 .loc 1 5980 0 + 10826 0056 1021 movs r1, #16 + 10827 0058 2000 movs r0, r4 + 10828 005a FFF7FEFF bl I2C_ITError + 10829 .LVL964: + 10830 005e F1E7 b .L722 + ARM GAS /tmp/ccskJbbb.s page 334 + + + 10831 .L731: + 10832 .align 2 + 10833 .L730: + 10834 0060 FF7FFFFF .word -32769 + 10835 .cfi_endproc + 10836 .LFE105: + 10838 .section .text.HAL_I2C_ER_IRQHandler,"ax",%progbits + 10839 .align 1 + 10840 .global HAL_I2C_ER_IRQHandler + 10841 .syntax unified + 10842 .code 16 + 10843 .thumb_func + 10844 .fpu softvfp + 10846 HAL_I2C_ER_IRQHandler: + 10847 .LFB75: +4317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR); + 10848 .loc 1 4317 0 + 10849 .cfi_startproc + 10850 @ args = 0, pretend = 0, frame = 0 + 10851 @ frame_needed = 0, uses_anonymous_args = 0 + 10852 .LVL965: + 10853 0000 70B5 push {r4, r5, r6, lr} + 10854 .LCFI84: + 10855 .cfi_def_cfa_offset 16 + 10856 .cfi_offset 4, -16 + 10857 .cfi_offset 5, -12 + 10858 .cfi_offset 6, -8 + 10859 .cfi_offset 14, -4 +4318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t itsources = READ_REG(hi2c->Instance->CR1); + 10860 .loc 1 4318 0 + 10861 0002 0268 ldr r2, [r0] + 10862 0004 9369 ldr r3, [r2, #24] + 10863 .LVL966: +4319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** uint32_t tmperror; + 10864 .loc 1 4319 0 + 10865 0006 1168 ldr r1, [r2] + 10866 .LVL967: +4323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10867 .loc 1 4323 0 + 10868 0008 DC05 lsls r4, r3, #23 + 10869 000a 08D5 bpl .L733 +4323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10870 .loc 1 4323 0 is_stmt 0 discriminator 1 + 10871 000c 0C06 lsls r4, r1, #24 + 10872 000e 06D5 bpl .L733 +4325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10873 .loc 1 4325 0 is_stmt 1 + 10874 0010 446C ldr r4, [r0, #68] + 10875 0012 0125 movs r5, #1 + 10876 0014 2C43 orrs r4, r5 + 10877 0016 4464 str r4, [r0, #68] +4328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10878 .loc 1 4328 0 + 10879 0018 8024 movs r4, #128 + 10880 001a 6400 lsls r4, r4, #1 + 10881 001c D461 str r4, [r2, #28] + 10882 .L733: + ARM GAS /tmp/ccskJbbb.s page 335 + + +4332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10883 .loc 1 4332 0 + 10884 001e 5A05 lsls r2, r3, #21 + 10885 0020 09D5 bpl .L734 +4332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10886 .loc 1 4332 0 is_stmt 0 discriminator 1 + 10887 0022 0A06 lsls r2, r1, #24 + 10888 0024 07D5 bpl .L734 +4334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10889 .loc 1 4334 0 is_stmt 1 + 10890 0026 426C ldr r2, [r0, #68] + 10891 0028 0824 movs r4, #8 + 10892 002a 2243 orrs r2, r4 + 10893 002c 4264 str r2, [r0, #68] +4337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10894 .loc 1 4337 0 + 10895 002e 0268 ldr r2, [r0] + 10896 0030 8024 movs r4, #128 + 10897 0032 E400 lsls r4, r4, #3 + 10898 0034 D461 str r4, [r2, #28] + 10899 .L734: +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10900 .loc 1 4341 0 + 10901 0036 9B05 lsls r3, r3, #22 + 10902 0038 09D5 bpl .L735 + 10903 .LVL968: +4341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10904 .loc 1 4341 0 is_stmt 0 discriminator 1 + 10905 003a 0B06 lsls r3, r1, #24 + 10906 003c 07D5 bpl .L735 +4343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10907 .loc 1 4343 0 is_stmt 1 + 10908 003e 436C ldr r3, [r0, #68] + 10909 0040 0222 movs r2, #2 + 10910 0042 1343 orrs r3, r2 + 10911 0044 4364 str r3, [r0, #68] +4346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10912 .loc 1 4346 0 + 10913 0046 0368 ldr r3, [r0] + 10914 0048 FF32 adds r2, r2, #255 + 10915 004a FF32 adds r2, r2, #255 + 10916 004c DA61 str r2, [r3, #28] + 10917 .L735: +4350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10918 .loc 1 4350 0 + 10919 004e 416C ldr r1, [r0, #68] + 10920 .LVL969: +4353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10921 .loc 1 4353 0 + 10922 0050 0B23 movs r3, #11 + 10923 0052 0B42 tst r3, r1 + 10924 0054 00D1 bne .L737 + 10925 .LVL970: + 10926 .L732: +4357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10927 .loc 1 4357 0 + 10928 @ sp needed + ARM GAS /tmp/ccskJbbb.s page 336 + + + 10929 0056 70BD pop {r4, r5, r6, pc} + 10930 .LVL971: + 10931 .L737: +4355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 10932 .loc 1 4355 0 + 10933 0058 FFF7FEFF bl I2C_ITError + 10934 .LVL972: +4357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10935 .loc 1 4357 0 + 10936 005c FBE7 b .L732 + 10937 .cfi_endproc + 10938 .LFE75: + 10940 .section .text.I2C_DMAAbort,"ax",%progbits + 10941 .align 1 + 10942 .syntax unified + 10943 .code 16 + 10944 .thumb_func + 10945 .fpu softvfp + 10947 I2C_DMAAbort: + 10948 .LFB108: +6040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)(((DMA_HandleTypeDef *)hdma)->Parent); /* Derogati + 10949 .loc 1 6040 0 + 10950 .cfi_startproc + 10951 @ args = 0, pretend = 0, frame = 0 + 10952 @ frame_needed = 0, uses_anonymous_args = 0 + 10953 .LVL973: + 10954 0000 10B5 push {r4, lr} + 10955 .LCFI85: + 10956 .cfi_def_cfa_offset 8 + 10957 .cfi_offset 4, -8 + 10958 .cfi_offset 14, -4 +6041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10959 .loc 1 6041 0 + 10960 0002 406A ldr r0, [r0, #36] + 10961 .LVL974: +6044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL; + 10962 .loc 1 6044 0 + 10963 0004 826B ldr r2, [r0, #56] + 10964 0006 0023 movs r3, #0 + 10965 0008 5363 str r3, [r2, #52] +6045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10966 .loc 1 6045 0 + 10967 000a C26B ldr r2, [r0, #60] + 10968 000c 5363 str r3, [r2, #52] +6048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** { + 10969 .loc 1 6048 0 + 10970 000e 4133 adds r3, r3, #65 + 10971 0010 C35C ldrb r3, [r0, r3] + 10972 0012 602B cmp r3, #96 + 10973 0014 02D0 beq .L741 +6065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10974 .loc 1 6065 0 + 10975 0016 FFF7FEFF bl HAL_I2C_ErrorCallback + 10976 .LVL975: + 10977 .L738: +6068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10978 .loc 1 6068 0 + ARM GAS /tmp/ccskJbbb.s page 337 + + + 10979 @ sp needed + 10980 001a 10BD pop {r4, pc} + 10981 .LVL976: + 10982 .L741: +6050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 10983 .loc 1 6050 0 + 10984 001c 1F3B subs r3, r3, #31 + 10985 001e 2022 movs r2, #32 + 10986 0020 C254 strb r2, [r0, r3] +6056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ + 10987 .loc 1 6056 0 + 10988 0022 FFF7FEFF bl HAL_I2C_AbortCpltCallback + 10989 .LVL977: + 10990 0026 F8E7 b .L738 + 10991 .cfi_endproc + 10992 .LFE108: + 10994 .section .text.HAL_I2C_GetState,"ax",%progbits + 10995 .align 1 + 10996 .global HAL_I2C_GetState + 10997 .syntax unified + 10998 .code 16 + 10999 .thumb_func + 11000 .fpu softvfp + 11002 HAL_I2C_GetState: + 11003 .LFB86: +4548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** /* Return I2C handle state */ + 11004 .loc 1 4548 0 + 11005 .cfi_startproc + 11006 @ args = 0, pretend = 0, frame = 0 + 11007 @ frame_needed = 0, uses_anonymous_args = 0 + 11008 @ link register save eliminated. + 11009 .LVL978: +4550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11010 .loc 1 4550 0 + 11011 0000 4123 movs r3, #65 + 11012 0002 C05C ldrb r0, [r0, r3] + 11013 .LVL979: + 11014 0004 C0B2 uxtb r0, r0 +4551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11015 .loc 1 4551 0 + 11016 @ sp needed + 11017 0006 7047 bx lr + 11018 .cfi_endproc + 11019 .LFE86: + 11021 .section .text.HAL_I2C_GetMode,"ax",%progbits + 11022 .align 1 + 11023 .global HAL_I2C_GetMode + 11024 .syntax unified + 11025 .code 16 + 11026 .thumb_func + 11027 .fpu softvfp + 11029 HAL_I2C_GetMode: + 11030 .LFB87: +4560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->Mode; + 11031 .loc 1 4560 0 + 11032 .cfi_startproc + 11033 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccskJbbb.s page 338 + + + 11034 @ frame_needed = 0, uses_anonymous_args = 0 + 11035 @ link register save eliminated. + 11036 .LVL980: +4561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11037 .loc 1 4561 0 + 11038 0000 4223 movs r3, #66 + 11039 0002 C05C ldrb r0, [r0, r3] + 11040 .LVL981: + 11041 0004 C0B2 uxtb r0, r0 +4562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11042 .loc 1 4562 0 + 11043 @ sp needed + 11044 0006 7047 bx lr + 11045 .cfi_endproc + 11046 .LFE87: + 11048 .section .text.HAL_I2C_GetError,"ax",%progbits + 11049 .align 1 + 11050 .global HAL_I2C_GetError + 11051 .syntax unified + 11052 .code 16 + 11053 .thumb_func + 11054 .fpu softvfp + 11056 HAL_I2C_GetError: + 11057 .LFB88: +4571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** return hi2c->ErrorCode; + 11058 .loc 1 4571 0 + 11059 .cfi_startproc + 11060 @ args = 0, pretend = 0, frame = 0 + 11061 @ frame_needed = 0, uses_anonymous_args = 0 + 11062 @ link register save eliminated. + 11063 .LVL982: +4572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** } + 11064 .loc 1 4572 0 + 11065 0000 406C ldr r0, [r0, #68] + 11066 .LVL983: +4573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c.c **** + 11067 .loc 1 4573 0 + 11068 @ sp needed + 11069 0002 7047 bx lr + 11070 .cfi_endproc + 11071 .LFE88: + 11073 .text + 11074 .Letext0: + 11075 .file 2 "/usr/include/newlib/machine/_default_types.h" + 11076 .file 3 "/usr/include/newlib/sys/_stdint.h" + 11077 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 11078 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 11079 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 11080 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 11081 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 11082 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h" + 11083 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccskJbbb.s page 339 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_i2c.c + /tmp/ccskJbbb.s:16 .text.I2C_Flush_TXDR:0000000000000000 $t + /tmp/ccskJbbb.s:22 .text.I2C_Flush_TXDR:0000000000000000 I2C_Flush_TXDR + /tmp/ccskJbbb.s:58 .text.I2C_TransferConfig:0000000000000000 $t + /tmp/ccskJbbb.s:64 .text.I2C_TransferConfig:0000000000000000 I2C_TransferConfig + /tmp/ccskJbbb.s:108 .text.I2C_TransferConfig:0000000000000028 $d + /tmp/ccskJbbb.s:113 .text.I2C_Enable_IRQ:0000000000000000 $t + /tmp/ccskJbbb.s:119 .text.I2C_Enable_IRQ:0000000000000000 I2C_Enable_IRQ + /tmp/ccskJbbb.s:240 .text.I2C_Enable_IRQ:0000000000000074 $d + /tmp/ccskJbbb.s:10345 .text.I2C_Master_ISR_DMA:0000000000000000 I2C_Master_ISR_DMA + /tmp/ccskJbbb.s:10103 .text.I2C_Slave_ISR_DMA:0000000000000000 I2C_Slave_ISR_DMA + /tmp/ccskJbbb.s:246 .text.I2C_Disable_IRQ:0000000000000000 $t + /tmp/ccskJbbb.s:252 .text.I2C_Disable_IRQ:0000000000000000 I2C_Disable_IRQ + /tmp/ccskJbbb.s:371 .text.I2C_ConvertOtherXferOptions:0000000000000000 $t + /tmp/ccskJbbb.s:377 .text.I2C_ConvertOtherXferOptions:0000000000000000 I2C_ConvertOtherXferOptions + /tmp/ccskJbbb.s:415 .text.I2C_IsAcknowledgeFailed:0000000000000000 $t + /tmp/ccskJbbb.s:421 .text.I2C_IsAcknowledgeFailed:0000000000000000 I2C_IsAcknowledgeFailed + /tmp/ccskJbbb.s:533 .text.I2C_IsAcknowledgeFailed:000000000000007c $d + /tmp/ccskJbbb.s:538 .text.I2C_WaitOnTXISFlagUntilTimeout:0000000000000000 $t + /tmp/ccskJbbb.s:544 .text.I2C_WaitOnTXISFlagUntilTimeout:0000000000000000 I2C_WaitOnTXISFlagUntilTimeout + /tmp/ccskJbbb.s:626 .text.I2C_WaitOnFlagUntilTimeout:0000000000000000 $t + /tmp/ccskJbbb.s:632 .text.I2C_WaitOnFlagUntilTimeout:0000000000000000 I2C_WaitOnFlagUntilTimeout + /tmp/ccskJbbb.s:709 .text.I2C_RequestMemoryWrite:0000000000000000 $t + /tmp/ccskJbbb.s:715 .text.I2C_RequestMemoryWrite:0000000000000000 I2C_RequestMemoryWrite + /tmp/ccskJbbb.s:812 .text.I2C_RequestMemoryWrite:0000000000000070 $d + /tmp/ccskJbbb.s:817 .text.I2C_RequestMemoryRead:0000000000000000 $t + /tmp/ccskJbbb.s:823 .text.I2C_RequestMemoryRead:0000000000000000 I2C_RequestMemoryRead + /tmp/ccskJbbb.s:917 .text.I2C_RequestMemoryRead:000000000000006c $d + /tmp/ccskJbbb.s:922 .text.I2C_WaitOnSTOPFlagUntilTimeout:0000000000000000 $t + /tmp/ccskJbbb.s:928 .text.I2C_WaitOnSTOPFlagUntilTimeout:0000000000000000 I2C_WaitOnSTOPFlagUntilTimeout + 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/tmp/ccskJbbb.s:11029 .text.HAL_I2C_GetMode:0000000000000000 HAL_I2C_GetMode + /tmp/ccskJbbb.s:11049 .text.HAL_I2C_GetError:0000000000000000 $t + /tmp/ccskJbbb.s:11056 .text.HAL_I2C_GetError:0000000000000000 HAL_I2C_GetError + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_DMA_Start_IT +HAL_DMA_Abort_IT diff --git a/fw/midi-dials/build/stm32f0xx_hal_i2c.o b/fw/midi-dials/build/stm32f0xx_hal_i2c.o Binary files differnew file mode 100644 index 0000000..2ad70b6 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_i2c.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_i2c_ex.d b/fw/midi-dials/build/stm32f0xx_hal_i2c_ex.d new file mode 100644 index 0000000..610dffb --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_i2c_ex.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_i2c_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_i2c_ex.lst b/fw/midi-dials/build/stm32f0xx_hal_i2c_ex.lst new file mode 100644 index 0000000..7128cbb --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_i2c_ex.lst @@ -0,0 +1,862 @@ +ARM GAS /tmp/cc8epE9P.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_i2c_ex.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_I2CEx_ConfigAnalogFilter,"ax",%progbits + 16 .align 1 + 17 .global HAL_I2CEx_ConfigAnalogFilter + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_I2CEx_ConfigAnalogFilter: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @file stm32f0xx_hal_i2c_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * functionalities of I2C Extended peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + Extended features functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @verbatim + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ============================================================================== + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### I2C peripheral Extended features ##### + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ============================================================================== + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] Comparing to other previous devices, the I2C interface for STM32F0xx + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** devices contains the following additional features + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Possibility to disable or enable Analog Noise Filter + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Use of a configured Digital Noise Filter + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Disable or enable wakeup from Stop mode(s) + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Disable or enable Fast Mode Plus + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### How to use this driver ##### + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ============================================================================== + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] This driver provides functions to configure Noise Filter and Wake Up Feature + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (#) Configure I2C Analog noise filter using the function HAL_I2CEx_ConfigAnalogFilter() + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (#) Configure I2C Digital noise filter using the function HAL_I2CEx_ConfigDigitalFilter() + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (#) Configure the enable or disable of I2C Wake Up Mode using the functions : + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableWakeUp() + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableWakeUp() + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (#) Configure the enable or disable of fast mode plus driving capability using the functions : + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (++) HAL_I2CEx_EnableFastModePlus() + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (++) HAL_I2CEx_DisableFastModePlus() + ARM GAS /tmp/cc8epE9P.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @endverbatim + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ****************************************************************************** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @attention + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * All rights reserved.</center></h2> + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This software component is licensed by ST under BSD 3-Clause license, + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the "License"; You may not use this file except in compliance with the + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * License. You may obtain a copy of the License at: + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * opensource.org/licenses/BSD-3-Clause + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ****************************************************************************** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Includes ------------------------------------------------------------------*/ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #include "stm32f0xx_hal.h" + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx I2CEx + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief I2C Extended HAL module driver + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #ifdef HAL_I2C_MODULE_ENABLED + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private define ------------------------------------------------------------*/ + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private macro -------------------------------------------------------------*/ + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private variables ---------------------------------------------------------*/ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Private functions ---------------------------------------------------------*/ + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions I2C Extended Exported Functions + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** @defgroup I2CEx_Exported_Functions_Group1 Extended features functions + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Extended features functions + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @verbatim + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** ##### Extended features functions ##### + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** =============================================================================== + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** [..] This section provides functions allowing to: + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Configure Noise Filters + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Configure Wake Up Feature + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** (+) Configure Fast Mode Plus + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** @endverbatim + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @{ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + ARM GAS /tmp/cc8epE9P.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Configure I2C Analog noise filter. + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param AnalogFilter New state of the Analog filter. + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 26 .loc 1 98 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 F0B5 push {r4, r5, r6, r7, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 20 + 34 .cfi_offset 4, -20 + 35 .cfi_offset 5, -16 + 36 .cfi_offset 6, -12 + 37 .cfi_offset 7, -8 + 38 .cfi_offset 14, -4 + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 39 .loc 1 103 0 + 40 0002 4123 movs r3, #65 + 41 0004 C35C ldrb r3, [r0, r3] + 42 0006 202B cmp r3, #32 + 43 0008 20D1 bne .L3 + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 44 .loc 1 106 0 + 45 000a 2033 adds r3, r3, #32 + 46 000c C35C ldrb r3, [r0, r3] + 47 000e 012B cmp r3, #1 + 48 0010 1ED0 beq .L4 + 49 .loc 1 106 0 is_stmt 0 discriminator 2 + 50 0012 4024 movs r4, #64 + 51 0014 0122 movs r2, #1 + 52 0016 0255 strb r2, [r0, r4] + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 53 .loc 1 108 0 is_stmt 1 discriminator 2 + 54 0018 4125 movs r5, #65 + 55 001a 2423 movs r3, #36 + 56 001c 4355 strb r3, [r0, r5] + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 57 .loc 1 111 0 discriminator 2 + 58 001e 0668 ldr r6, [r0] + 59 0020 3368 ldr r3, [r6] + 60 0022 9343 bics r3, r2 + 61 0024 3360 str r3, [r6] + ARM GAS /tmp/cc8epE9P.s page 4 + + + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Reset I2Cx ANOFF bit */ + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); + 62 .loc 1 114 0 discriminator 2 + 63 0026 0668 ldr r6, [r0] + 64 0028 3368 ldr r3, [r6] + 65 002a 0A4F ldr r7, .L5 + 66 002c 3B40 ands r3, r7 + 67 002e 3360 str r3, [r6] + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Set analog filter bit*/ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= AnalogFilter; + 68 .loc 1 117 0 discriminator 2 + 69 0030 0668 ldr r6, [r0] + 70 0032 3368 ldr r3, [r6] + 71 0034 1943 orrs r1, r3 + 72 .LVL1: + 73 0036 3160 str r1, [r6] + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 74 .loc 1 119 0 discriminator 2 + 75 0038 0168 ldr r1, [r0] + 76 003a 0B68 ldr r3, [r1] + 77 003c 1343 orrs r3, r2 + 78 003e 0B60 str r3, [r1] + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 79 .loc 1 121 0 discriminator 2 + 80 0040 2023 movs r3, #32 + 81 0042 4355 strb r3, [r0, r5] + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 82 .loc 1 124 0 discriminator 2 + 83 0044 0023 movs r3, #0 + 84 0046 0355 strb r3, [r0, r4] + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 85 .loc 1 126 0 discriminator 2 + 86 0048 0020 movs r0, #0 + 87 .LVL2: + 88 004a 00E0 b .L2 + 89 .LVL3: + 90 .L3: + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 91 .loc 1 130 0 + 92 004c 0220 movs r0, #2 + 93 .LVL4: + 94 .L2: + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 95 .loc 1 132 0 + 96 @ sp needed + 97 004e F0BD pop {r4, r5, r6, r7, pc} + ARM GAS /tmp/cc8epE9P.s page 5 + + + 98 .LVL5: + 99 .L4: + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 100 .loc 1 106 0 + 101 0050 0220 movs r0, #2 + 102 .LVL6: + 103 0052 FCE7 b .L2 + 104 .L6: + 105 .align 2 + 106 .L5: + 107 0054 FFEFFFFF .word -4097 + 108 .cfi_endproc + 109 .LFE40: + 111 .section .text.HAL_I2CEx_ConfigDigitalFilter,"ax",%progbits + 112 .align 1 + 113 .global HAL_I2CEx_ConfigDigitalFilter + 114 .syntax unified + 115 .code 16 + 116 .thumb_func + 117 .fpu softvfp + 119 HAL_I2CEx_ConfigDigitalFilter: + 120 .LFB41: + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Configure I2C Digital noise filter. + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 121 .loc 1 142 0 + 122 .cfi_startproc + 123 @ args = 0, pretend = 0, frame = 0 + 124 @ frame_needed = 0, uses_anonymous_args = 0 + 125 .LVL7: + 126 0000 F0B5 push {r4, r5, r6, r7, lr} + 127 .LCFI1: + 128 .cfi_def_cfa_offset 20 + 129 .cfi_offset 4, -20 + 130 .cfi_offset 5, -16 + 131 .cfi_offset 6, -12 + 132 .cfi_offset 7, -8 + 133 .cfi_offset 14, -4 + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** uint32_t tmpreg; + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 134 .loc 1 149 0 + 135 0002 4123 movs r3, #65 + 136 0004 C35C ldrb r3, [r0, r3] + 137 0006 202B cmp r3, #32 + 138 0008 1ED1 bne .L9 + ARM GAS /tmp/cc8epE9P.s page 6 + + + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 139 .loc 1 152 0 + 140 000a 2033 adds r3, r3, #32 + 141 000c C35C ldrb r3, [r0, r3] + 142 000e 012B cmp r3, #1 + 143 0010 1CD0 beq .L10 + 144 .loc 1 152 0 is_stmt 0 discriminator 2 + 145 0012 4024 movs r4, #64 + 146 0014 0122 movs r2, #1 + 147 0016 0255 strb r2, [r0, r4] + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 148 .loc 1 154 0 is_stmt 1 discriminator 2 + 149 0018 4125 movs r5, #65 + 150 001a 2423 movs r3, #36 + 151 001c 4355 strb r3, [r0, r5] + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 152 .loc 1 157 0 discriminator 2 + 153 001e 0668 ldr r6, [r0] + 154 0020 3368 ldr r3, [r6] + 155 0022 9343 bics r3, r2 + 156 0024 3360 str r3, [r6] + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Get the old register value */ + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** tmpreg = hi2c->Instance->CR1; + 157 .loc 1 160 0 discriminator 2 + 158 0026 0668 ldr r6, [r0] + 159 0028 3368 ldr r3, [r6] + 160 .LVL8: + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Reset I2Cx DNF bits [11:8] */ + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** tmpreg &= ~(I2C_CR1_DNF); + 161 .loc 1 163 0 discriminator 2 + 162 002a 094F ldr r7, .L11 + 163 002c 3B40 ands r3, r7 + 164 .LVL9: + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Set I2Cx DNF coefficient */ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** tmpreg |= DigitalFilter << 8U; + 165 .loc 1 166 0 discriminator 2 + 166 002e 0902 lsls r1, r1, #8 + 167 .LVL10: + 168 0030 1943 orrs r1, r3 + 169 .LVL11: + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Store the new register value */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 = tmpreg; + 170 .loc 1 169 0 discriminator 2 + 171 0032 3160 str r1, [r6] + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 172 .loc 1 171 0 discriminator 2 + 173 0034 0168 ldr r1, [r0] + ARM GAS /tmp/cc8epE9P.s page 7 + + + 174 .LVL12: + 175 0036 0B68 ldr r3, [r1] + 176 0038 1343 orrs r3, r2 + 177 003a 0B60 str r3, [r1] + 178 .LVL13: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 179 .loc 1 173 0 discriminator 2 + 180 003c 2023 movs r3, #32 + 181 003e 4355 strb r3, [r0, r5] + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 182 .loc 1 176 0 discriminator 2 + 183 0040 0023 movs r3, #0 + 184 0042 0355 strb r3, [r0, r4] + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 185 .loc 1 178 0 discriminator 2 + 186 0044 0020 movs r0, #0 + 187 .LVL14: + 188 0046 00E0 b .L8 + 189 .LVL15: + 190 .L9: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 191 .loc 1 182 0 + 192 0048 0220 movs r0, #2 + 193 .LVL16: + 194 .L8: + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 195 .loc 1 184 0 + 196 @ sp needed + 197 004a F0BD pop {r4, r5, r6, r7, pc} + 198 .LVL17: + 199 .L10: + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 200 .loc 1 152 0 + 201 004c 0220 movs r0, #2 + 202 .LVL18: + 203 004e FCE7 b .L8 + 204 .L12: + 205 .align 2 + 206 .L11: + 207 0050 FFF0FFFF .word -3841 + 208 .cfi_endproc + 209 .LFE41: + 211 .section .text.HAL_I2CEx_EnableWakeUp,"ax",%progbits + 212 .align 1 + 213 .global HAL_I2CEx_EnableWakeUp + 214 .syntax unified + 215 .code 16 + 216 .thumb_func + 217 .fpu softvfp + ARM GAS /tmp/cc8epE9P.s page 8 + + + 219 HAL_I2CEx_EnableWakeUp: + 220 .LFB42: + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #if defined(I2C_CR1_WUPEN) + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Enable I2C wakeup from Stop mode(s). + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c) + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 221 .loc 1 194 0 + 222 .cfi_startproc + 223 @ args = 0, pretend = 0, frame = 0 + 224 @ frame_needed = 0, uses_anonymous_args = 0 + 225 .LVL19: + 226 0000 70B5 push {r4, r5, r6, lr} + 227 .LCFI2: + 228 .cfi_def_cfa_offset 16 + 229 .cfi_offset 4, -16 + 230 .cfi_offset 5, -12 + 231 .cfi_offset 6, -8 + 232 .cfi_offset 14, -4 + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 233 .loc 1 198 0 + 234 0002 4123 movs r3, #65 + 235 0004 C35C ldrb r3, [r0, r3] + 236 0006 202B cmp r3, #32 + 237 0008 1DD1 bne .L15 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 238 .loc 1 201 0 + 239 000a 2033 adds r3, r3, #32 + 240 000c C35C ldrb r3, [r0, r3] + 241 000e 012B cmp r3, #1 + 242 0010 1BD0 beq .L16 + 243 .loc 1 201 0 is_stmt 0 discriminator 2 + 244 0012 4021 movs r1, #64 + 245 0014 0122 movs r2, #1 + 246 0016 4254 strb r2, [r0, r1] + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 247 .loc 1 203 0 is_stmt 1 discriminator 2 + 248 0018 4124 movs r4, #65 + 249 001a 2423 movs r3, #36 + 250 001c 0355 strb r3, [r0, r4] + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 251 .loc 1 206 0 discriminator 2 + 252 001e 0568 ldr r5, [r0] + 253 0020 2B68 ldr r3, [r5] + ARM GAS /tmp/cc8epE9P.s page 9 + + + 254 0022 9343 bics r3, r2 + 255 0024 2B60 str r3, [r5] + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 |= I2C_CR1_WUPEN; + 256 .loc 1 209 0 discriminator 2 + 257 0026 0568 ldr r5, [r0] + 258 0028 2E68 ldr r6, [r5] + 259 002a 8023 movs r3, #128 + 260 002c DB02 lsls r3, r3, #11 + 261 002e 3343 orrs r3, r6 + 262 0030 2B60 str r3, [r5] + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 263 .loc 1 211 0 discriminator 2 + 264 0032 0568 ldr r5, [r0] + 265 0034 2B68 ldr r3, [r5] + 266 0036 1343 orrs r3, r2 + 267 0038 2B60 str r3, [r5] + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 268 .loc 1 213 0 discriminator 2 + 269 003a 2023 movs r3, #32 + 270 003c 0355 strb r3, [r0, r4] + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 271 .loc 1 216 0 discriminator 2 + 272 003e 0023 movs r3, #0 + 273 0040 4354 strb r3, [r0, r1] + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 274 .loc 1 218 0 discriminator 2 + 275 0042 0020 movs r0, #0 + 276 .LVL20: + 277 0044 00E0 b .L14 + 278 .LVL21: + 279 .L15: + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 280 .loc 1 222 0 + 281 0046 0220 movs r0, #2 + 282 .LVL22: + 283 .L14: + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 284 .loc 1 224 0 + 285 @ sp needed + 286 0048 70BD pop {r4, r5, r6, pc} + 287 .LVL23: + 288 .L16: + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 289 .loc 1 201 0 + 290 004a 0220 movs r0, #2 + 291 .LVL24: + ARM GAS /tmp/cc8epE9P.s page 10 + + + 292 004c FCE7 b .L14 + 293 .cfi_endproc + 294 .LFE42: + 296 .section .text.HAL_I2CEx_DisableWakeUp,"ax",%progbits + 297 .align 1 + 298 .global HAL_I2CEx_DisableWakeUp + 299 .syntax unified + 300 .code 16 + 301 .thumb_func + 302 .fpu softvfp + 304 HAL_I2CEx_DisableWakeUp: + 305 .LFB43: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Disable I2C wakeup from Stop mode(s). + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral. + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval HAL status + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c) + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 306 .loc 1 233 0 + 307 .cfi_startproc + 308 @ args = 0, pretend = 0, frame = 0 + 309 @ frame_needed = 0, uses_anonymous_args = 0 + 310 .LVL25: + 311 0000 70B5 push {r4, r5, r6, lr} + 312 .LCFI3: + 313 .cfi_def_cfa_offset 16 + 314 .cfi_offset 4, -16 + 315 .cfi_offset 5, -12 + 316 .cfi_offset 6, -8 + 317 .cfi_offset 14, -4 + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameters */ + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_WAKEUP_FROMSTOP_INSTANCE(hi2c->Instance)); + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** if (hi2c->State == HAL_I2C_STATE_READY) + 318 .loc 1 237 0 + 319 0002 4123 movs r3, #65 + 320 0004 C35C ldrb r3, [r0, r3] + 321 0006 202B cmp r3, #32 + 322 0008 1CD1 bne .L19 + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Locked */ + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_LOCK(hi2c); + 323 .loc 1 240 0 + 324 000a 2033 adds r3, r3, #32 + 325 000c C35C ldrb r3, [r0, r3] + 326 000e 012B cmp r3, #1 + 327 0010 1AD0 beq .L20 + 328 .loc 1 240 0 is_stmt 0 discriminator 2 + 329 0012 4021 movs r1, #64 + 330 0014 0122 movs r2, #1 + 331 0016 4254 strb r2, [r0, r1] + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_BUSY; + 332 .loc 1 242 0 is_stmt 1 discriminator 2 + ARM GAS /tmp/cc8epE9P.s page 11 + + + 333 0018 4124 movs r4, #65 + 334 001a 2423 movs r3, #36 + 335 001c 0355 strb r3, [r0, r4] + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable the selected I2C peripheral */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_DISABLE(hi2c); + 336 .loc 1 245 0 discriminator 2 + 337 001e 0568 ldr r5, [r0] + 338 0020 2B68 ldr r3, [r5] + 339 0022 9343 bics r3, r2 + 340 0024 2B60 str r3, [r5] + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable wakeup from stop mode */ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_WUPEN); + 341 .loc 1 248 0 discriminator 2 + 342 0026 0568 ldr r5, [r0] + 343 0028 2B68 ldr r3, [r5] + 344 002a 084E ldr r6, .L21 + 345 002c 3340 ands r3, r6 + 346 002e 2B60 str r3, [r5] + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c); + 347 .loc 1 250 0 discriminator 2 + 348 0030 0568 ldr r5, [r0] + 349 0032 2B68 ldr r3, [r5] + 350 0034 1343 orrs r3, r2 + 351 0036 2B60 str r3, [r5] + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** hi2c->State = HAL_I2C_STATE_READY; + 352 .loc 1 252 0 discriminator 2 + 353 0038 2023 movs r3, #32 + 354 003a 0355 strb r3, [r0, r4] + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Process Unlocked */ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_UNLOCK(hi2c); + 355 .loc 1 255 0 discriminator 2 + 356 003c 0023 movs r3, #0 + 357 003e 4354 strb r3, [r0, r1] + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_OK; + 358 .loc 1 257 0 discriminator 2 + 359 0040 0020 movs r0, #0 + 360 .LVL26: + 361 0042 00E0 b .L18 + 362 .LVL27: + 363 .L19: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** else + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** return HAL_BUSY; + 364 .loc 1 261 0 + 365 0044 0220 movs r0, #2 + 366 .LVL28: + 367 .L18: + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 368 .loc 1 263 0 + ARM GAS /tmp/cc8epE9P.s page 12 + + + 369 @ sp needed + 370 0046 70BD pop {r4, r5, r6, pc} + 371 .LVL29: + 372 .L20: + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 373 .loc 1 240 0 + 374 0048 0220 movs r0, #2 + 375 .LVL30: + 376 004a FCE7 b .L18 + 377 .L22: + 378 .align 2 + 379 .L21: + 380 004c FFFFFBFF .word -262145 + 381 .cfi_endproc + 382 .LFE43: + 384 .section .text.HAL_I2CEx_EnableFastModePlus,"ax",%progbits + 385 .align 1 + 386 .global HAL_I2CEx_EnableFastModePlus + 387 .syntax unified + 388 .code 16 + 389 .thumb_func + 390 .fpu softvfp + 392 HAL_I2CEx_EnableFastModePlus: + 393 .LFB44: + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** #endif + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Enable the I2C fast mode plus driving capability. + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be enabled on all selected + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * can be enabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be enabled + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval None + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus) + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 394 .loc 1 280 0 + 395 .cfi_startproc + 396 @ args = 0, pretend = 0, frame = 8 + 397 @ frame_needed = 0, uses_anonymous_args = 0 + 398 @ link register save eliminated. + 399 .LVL31: + 400 0000 82B0 sub sp, sp, #8 + 401 .LCFI4: + 402 .cfi_def_cfa_offset 8 + 403 .LBB2: + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameter */ + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 404 .loc 1 285 0 + ARM GAS /tmp/cc8epE9P.s page 13 + + + 405 0002 074A ldr r2, .L24 + 406 0004 9169 ldr r1, [r2, #24] + 407 0006 0123 movs r3, #1 + 408 0008 1943 orrs r1, r3 + 409 000a 9161 str r1, [r2, #24] + 410 000c 9269 ldr r2, [r2, #24] + 411 000e 1340 ands r3, r2 + 412 0010 0193 str r3, [sp, #4] + 413 0012 019B ldr r3, [sp, #4] + 414 .LBE2: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable fast mode plus driving capability for selected pin */ + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** SET_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 415 .loc 1 288 0 + 416 0014 034A ldr r2, .L24+4 + 417 0016 1368 ldr r3, [r2] + 418 0018 1843 orrs r0, r3 + 419 .LVL32: + 420 001a 1060 str r0, [r2] + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 421 .loc 1 289 0 + 422 001c 02B0 add sp, sp, #8 + 423 @ sp needed + 424 001e 7047 bx lr + 425 .L25: + 426 .align 2 + 427 .L24: + 428 0020 00100240 .word 1073876992 + 429 0024 00000140 .word 1073807360 + 430 .cfi_endproc + 431 .LFE44: + 433 .section .text.HAL_I2CEx_DisableFastModePlus,"ax",%progbits + 434 .align 1 + 435 .global HAL_I2CEx_DisableFastModePlus + 436 .syntax unified + 437 .code 16 + 438 .thumb_func + 439 .fpu softvfp + 441 HAL_I2CEx_DisableFastModePlus: + 442 .LFB45: + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /** + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @brief Disable the I2C fast mode plus driving capability. + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @param ConfigFastModePlus Selects the pin. + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * This parameter can be one of the @ref I2CEx_FastModePlus values + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For I2C1, fast mode plus driving capability can be disabled on all selected + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9. + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter. + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @note For all I2C2 pins fast mode plus driving capability can be disabled + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * only by using I2C_FASTMODEPLUS_I2C2 parameter. + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** * @retval None + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** */ + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus) + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** { + 443 .loc 1 305 0 + ARM GAS /tmp/cc8epE9P.s page 14 + + + 444 .cfi_startproc + 445 @ args = 0, pretend = 0, frame = 8 + 446 @ frame_needed = 0, uses_anonymous_args = 0 + 447 @ link register save eliminated. + 448 .LVL33: + 449 0000 82B0 sub sp, sp, #8 + 450 .LCFI5: + 451 .cfi_def_cfa_offset 8 + 452 .LBB3: + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Check the parameter */ + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** assert_param(IS_I2C_FASTMODEPLUS(ConfigFastModePlus)); + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 453 .loc 1 310 0 + 454 0002 074A ldr r2, .L27 + 455 0004 9169 ldr r1, [r2, #24] + 456 0006 0123 movs r3, #1 + 457 0008 1943 orrs r1, r3 + 458 000a 9161 str r1, [r2, #24] + 459 000c 9269 ldr r2, [r2, #24] + 460 000e 1340 ands r3, r2 + 461 0010 0193 str r3, [sp, #4] + 462 0012 019B ldr r3, [sp, #4] + 463 .LBE3: + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** /* Disable fast mode plus driving capability for selected pin */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** CLEAR_BIT(SYSCFG->CFGR1, (uint32_t)ConfigFastModePlus); + 464 .loc 1 313 0 + 465 0014 034A ldr r2, .L27+4 + 466 0016 1368 ldr r3, [r2] + 467 0018 8343 bics r3, r0 + 468 001a 1360 str r3, [r2] + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_i2c_ex.c **** } + 469 .loc 1 314 0 + 470 001c 02B0 add sp, sp, #8 + 471 @ sp needed + 472 001e 7047 bx lr + 473 .L28: + 474 .align 2 + 475 .L27: + 476 0020 00100240 .word 1073876992 + 477 0024 00000140 .word 1073807360 + 478 .cfi_endproc + 479 .LFE45: + 481 .text + 482 .Letext0: + 483 .file 2 "/usr/include/newlib/machine/_default_types.h" + 484 .file 3 "/usr/include/newlib/sys/_stdint.h" + 485 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 486 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 487 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 488 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 489 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h" + 490 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/cc8epE9P.s page 15 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_i2c_ex.c + /tmp/cc8epE9P.s:16 .text.HAL_I2CEx_ConfigAnalogFilter:0000000000000000 $t + /tmp/cc8epE9P.s:23 .text.HAL_I2CEx_ConfigAnalogFilter:0000000000000000 HAL_I2CEx_ConfigAnalogFilter + /tmp/cc8epE9P.s:107 .text.HAL_I2CEx_ConfigAnalogFilter:0000000000000054 $d + /tmp/cc8epE9P.s:112 .text.HAL_I2CEx_ConfigDigitalFilter:0000000000000000 $t + /tmp/cc8epE9P.s:119 .text.HAL_I2CEx_ConfigDigitalFilter:0000000000000000 HAL_I2CEx_ConfigDigitalFilter + /tmp/cc8epE9P.s:207 .text.HAL_I2CEx_ConfigDigitalFilter:0000000000000050 $d + /tmp/cc8epE9P.s:212 .text.HAL_I2CEx_EnableWakeUp:0000000000000000 $t + /tmp/cc8epE9P.s:219 .text.HAL_I2CEx_EnableWakeUp:0000000000000000 HAL_I2CEx_EnableWakeUp + /tmp/cc8epE9P.s:297 .text.HAL_I2CEx_DisableWakeUp:0000000000000000 $t + /tmp/cc8epE9P.s:304 .text.HAL_I2CEx_DisableWakeUp:0000000000000000 HAL_I2CEx_DisableWakeUp + /tmp/cc8epE9P.s:380 .text.HAL_I2CEx_DisableWakeUp:000000000000004c $d + /tmp/cc8epE9P.s:385 .text.HAL_I2CEx_EnableFastModePlus:0000000000000000 $t + /tmp/cc8epE9P.s:392 .text.HAL_I2CEx_EnableFastModePlus:0000000000000000 HAL_I2CEx_EnableFastModePlus + /tmp/cc8epE9P.s:428 .text.HAL_I2CEx_EnableFastModePlus:0000000000000020 $d + /tmp/cc8epE9P.s:434 .text.HAL_I2CEx_DisableFastModePlus:0000000000000000 $t + /tmp/cc8epE9P.s:441 .text.HAL_I2CEx_DisableFastModePlus:0000000000000000 HAL_I2CEx_DisableFastModePlus + /tmp/cc8epE9P.s:476 .text.HAL_I2CEx_DisableFastModePlus:0000000000000020 $d + +NO UNDEFINED SYMBOLS diff --git a/fw/midi-dials/build/stm32f0xx_hal_i2c_ex.o b/fw/midi-dials/build/stm32f0xx_hal_i2c_ex.o Binary files differnew file mode 100644 index 0000000..90aa6b7 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_i2c_ex.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_msp.d b/fw/midi-dials/build/stm32f0xx_hal_msp.d new file mode 100644 index 0000000..364f2ef --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_msp.d @@ -0,0 +1,88 @@ +build/stm32f0xx_hal_msp.o: Src/stm32f0xx_hal_msp.c Inc/main.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Inc/main.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_msp.lst b/fw/midi-dials/build/stm32f0xx_hal_msp.lst new file mode 100644 index 0000000..9c12763 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_msp.lst @@ -0,0 +1,567 @@ +ARM GAS /tmp/ccqkHb8J.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_msp.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_MspInit,"ax",%progbits + 16 .align 1 + 17 .global HAL_MspInit + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_MspInit: + 24 .LFB40: + 25 .file 1 "Src/stm32f0xx_hal_msp.c" + 1:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Header */ + 2:Src/stm32f0xx_hal_msp.c **** /** + 3:Src/stm32f0xx_hal_msp.c **** ****************************************************************************** + 4:Src/stm32f0xx_hal_msp.c **** * File Name : stm32f0xx_hal_msp.c + 5:Src/stm32f0xx_hal_msp.c **** * Description : This file provides code for the MSP Initialization + 6:Src/stm32f0xx_hal_msp.c **** * and de-Initialization codes. + 7:Src/stm32f0xx_hal_msp.c **** ****************************************************************************** + 8:Src/stm32f0xx_hal_msp.c **** * @attention + 9:Src/stm32f0xx_hal_msp.c **** * + 10:Src/stm32f0xx_hal_msp.c **** * <h2><center>© Copyright (c) 2020 STMicroelectronics. + 11:Src/stm32f0xx_hal_msp.c **** * All rights reserved.</center></h2> + 12:Src/stm32f0xx_hal_msp.c **** * + 13:Src/stm32f0xx_hal_msp.c **** * This software component is licensed by ST under BSD 3-Clause license, + 14:Src/stm32f0xx_hal_msp.c **** * the "License"; You may not use this file except in compliance with the + 15:Src/stm32f0xx_hal_msp.c **** * License. You may obtain a copy of the License at: + 16:Src/stm32f0xx_hal_msp.c **** * opensource.org/licenses/BSD-3-Clause + 17:Src/stm32f0xx_hal_msp.c **** * + 18:Src/stm32f0xx_hal_msp.c **** ****************************************************************************** + 19:Src/stm32f0xx_hal_msp.c **** */ + 20:Src/stm32f0xx_hal_msp.c **** /* USER CODE END Header */ + 21:Src/stm32f0xx_hal_msp.c **** + 22:Src/stm32f0xx_hal_msp.c **** /* Includes ------------------------------------------------------------------*/ + 23:Src/stm32f0xx_hal_msp.c **** #include "main.h" + 24:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Includes */ + 25:Src/stm32f0xx_hal_msp.c **** + 26:Src/stm32f0xx_hal_msp.c **** /* USER CODE END Includes */ + 27:Src/stm32f0xx_hal_msp.c **** extern DMA_HandleTypeDef hdma_adc; + 28:Src/stm32f0xx_hal_msp.c **** + 29:Src/stm32f0xx_hal_msp.c **** /* Private typedef -----------------------------------------------------------*/ + 30:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN TD */ + 31:Src/stm32f0xx_hal_msp.c **** + 32:Src/stm32f0xx_hal_msp.c **** /* USER CODE END TD */ + 33:Src/stm32f0xx_hal_msp.c **** + ARM GAS /tmp/ccqkHb8J.s page 2 + + + 34:Src/stm32f0xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/ + 35:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Define */ + 36:Src/stm32f0xx_hal_msp.c **** + 37:Src/stm32f0xx_hal_msp.c **** /* USER CODE END Define */ + 38:Src/stm32f0xx_hal_msp.c **** + 39:Src/stm32f0xx_hal_msp.c **** /* Private macro -------------------------------------------------------------*/ + 40:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN Macro */ + 41:Src/stm32f0xx_hal_msp.c **** + 42:Src/stm32f0xx_hal_msp.c **** /* USER CODE END Macro */ + 43:Src/stm32f0xx_hal_msp.c **** + 44:Src/stm32f0xx_hal_msp.c **** /* Private variables ---------------------------------------------------------*/ + 45:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN PV */ + 46:Src/stm32f0xx_hal_msp.c **** + 47:Src/stm32f0xx_hal_msp.c **** /* USER CODE END PV */ + 48:Src/stm32f0xx_hal_msp.c **** + 49:Src/stm32f0xx_hal_msp.c **** /* Private function prototypes -----------------------------------------------*/ + 50:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN PFP */ + 51:Src/stm32f0xx_hal_msp.c **** + 52:Src/stm32f0xx_hal_msp.c **** /* USER CODE END PFP */ + 53:Src/stm32f0xx_hal_msp.c **** + 54:Src/stm32f0xx_hal_msp.c **** /* External functions --------------------------------------------------------*/ + 55:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ExternalFunctions */ + 56:Src/stm32f0xx_hal_msp.c **** + 57:Src/stm32f0xx_hal_msp.c **** /* USER CODE END ExternalFunctions */ + 58:Src/stm32f0xx_hal_msp.c **** + 59:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN 0 */ + 60:Src/stm32f0xx_hal_msp.c **** + 61:Src/stm32f0xx_hal_msp.c **** /* USER CODE END 0 */ + 62:Src/stm32f0xx_hal_msp.c **** /** + 63:Src/stm32f0xx_hal_msp.c **** * Initializes the Global MSP. + 64:Src/stm32f0xx_hal_msp.c **** */ + 65:Src/stm32f0xx_hal_msp.c **** void HAL_MspInit(void) + 66:Src/stm32f0xx_hal_msp.c **** { + 26 .loc 1 66 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 8 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 31 0000 82B0 sub sp, sp, #8 + 32 .LCFI0: + 33 .cfi_def_cfa_offset 8 + 34 .LBB2: + 67:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN MspInit 0 */ + 68:Src/stm32f0xx_hal_msp.c **** + 69:Src/stm32f0xx_hal_msp.c **** /* USER CODE END MspInit 0 */ + 70:Src/stm32f0xx_hal_msp.c **** + 71:Src/stm32f0xx_hal_msp.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 35 .loc 1 71 0 + 36 0002 0A4B ldr r3, .L2 + 37 0004 9969 ldr r1, [r3, #24] + 38 0006 0122 movs r2, #1 + 39 0008 1143 orrs r1, r2 + 40 000a 9961 str r1, [r3, #24] + 41 000c 9969 ldr r1, [r3, #24] + 42 000e 0A40 ands r2, r1 + 43 0010 0092 str r2, [sp] + 44 0012 009A ldr r2, [sp] + ARM GAS /tmp/ccqkHb8J.s page 3 + + + 45 .LBE2: + 46 .LBB3: + 72:Src/stm32f0xx_hal_msp.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 47 .loc 1 72 0 + 48 0014 DA69 ldr r2, [r3, #28] + 49 0016 8021 movs r1, #128 + 50 0018 4905 lsls r1, r1, #21 + 51 001a 0A43 orrs r2, r1 + 52 001c DA61 str r2, [r3, #28] + 53 001e DB69 ldr r3, [r3, #28] + 54 0020 0B40 ands r3, r1 + 55 0022 0193 str r3, [sp, #4] + 56 0024 019B ldr r3, [sp, #4] + 57 .LBE3: + 73:Src/stm32f0xx_hal_msp.c **** + 74:Src/stm32f0xx_hal_msp.c **** /* System interrupt init*/ + 75:Src/stm32f0xx_hal_msp.c **** + 76:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN MspInit 1 */ + 77:Src/stm32f0xx_hal_msp.c **** + 78:Src/stm32f0xx_hal_msp.c **** /* USER CODE END MspInit 1 */ + 79:Src/stm32f0xx_hal_msp.c **** } + 58 .loc 1 79 0 + 59 0026 02B0 add sp, sp, #8 + 60 @ sp needed + 61 0028 7047 bx lr + 62 .L3: + 63 002a C046 .align 2 + 64 .L2: + 65 002c 00100240 .word 1073876992 + 66 .cfi_endproc + 67 .LFE40: + 69 .section .text.HAL_ADC_MspInit,"ax",%progbits + 70 .align 1 + 71 .global HAL_ADC_MspInit + 72 .syntax unified + 73 .code 16 + 74 .thumb_func + 75 .fpu softvfp + 77 HAL_ADC_MspInit: + 78 .LFB41: + 80:Src/stm32f0xx_hal_msp.c **** + 81:Src/stm32f0xx_hal_msp.c **** /** + 82:Src/stm32f0xx_hal_msp.c **** * @brief ADC MSP Initialization + 83:Src/stm32f0xx_hal_msp.c **** * This function configures the hardware resources used in this example + 84:Src/stm32f0xx_hal_msp.c **** * @param hadc: ADC handle pointer + 85:Src/stm32f0xx_hal_msp.c **** * @retval None + 86:Src/stm32f0xx_hal_msp.c **** */ + 87:Src/stm32f0xx_hal_msp.c **** void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc) + 88:Src/stm32f0xx_hal_msp.c **** { + 79 .loc 1 88 0 + 80 .cfi_startproc + 81 @ args = 0, pretend = 0, frame = 32 + 82 @ frame_needed = 0, uses_anonymous_args = 0 + 83 .LVL0: + 84 0000 30B5 push {r4, r5, lr} + 85 .LCFI1: + 86 .cfi_def_cfa_offset 12 + ARM GAS /tmp/ccqkHb8J.s page 4 + + + 87 .cfi_offset 4, -12 + 88 .cfi_offset 5, -8 + 89 .cfi_offset 14, -4 + 90 0002 89B0 sub sp, sp, #36 + 91 .LCFI2: + 92 .cfi_def_cfa_offset 48 + 93 0004 0400 movs r4, r0 + 89:Src/stm32f0xx_hal_msp.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; + 94 .loc 1 89 0 + 95 0006 1422 movs r2, #20 + 96 0008 0021 movs r1, #0 + 97 000a 03A8 add r0, sp, #12 + 98 .LVL1: + 99 000c FFF7FEFF bl memset + 100 .LVL2: + 90:Src/stm32f0xx_hal_msp.c **** if(hadc->Instance==ADC1) + 101 .loc 1 90 0 + 102 0010 274B ldr r3, .L9 + 103 0012 2268 ldr r2, [r4] + 104 0014 9A42 cmp r2, r3 + 105 0016 01D0 beq .L7 + 106 .L4: + 91:Src/stm32f0xx_hal_msp.c **** { + 92:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 0 */ + 93:Src/stm32f0xx_hal_msp.c **** + 94:Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 0 */ + 95:Src/stm32f0xx_hal_msp.c **** /* Peripheral clock enable */ + 96:Src/stm32f0xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_ENABLE(); + 97:Src/stm32f0xx_hal_msp.c **** + 98:Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); + 99:Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 100:Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 101:Src/stm32f0xx_hal_msp.c **** PA0 ------> ADC_IN0 + 102:Src/stm32f0xx_hal_msp.c **** PA1 ------> ADC_IN1 + 103:Src/stm32f0xx_hal_msp.c **** PA2 ------> ADC_IN2 + 104:Src/stm32f0xx_hal_msp.c **** PA3 ------> ADC_IN3 + 105:Src/stm32f0xx_hal_msp.c **** PA4 ------> ADC_IN4 + 106:Src/stm32f0xx_hal_msp.c **** PA5 ------> ADC_IN5 + 107:Src/stm32f0xx_hal_msp.c **** PA6 ------> ADC_IN6 + 108:Src/stm32f0xx_hal_msp.c **** PA7 ------> ADC_IN7 + 109:Src/stm32f0xx_hal_msp.c **** PB0 ------> ADC_IN8 + 110:Src/stm32f0xx_hal_msp.c **** */ + 111:Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 + 112:Src/stm32f0xx_hal_msp.c **** |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + 113:Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 114:Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 115:Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 116:Src/stm32f0xx_hal_msp.c **** + 117:Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_0; + 118:Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 119:Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 120:Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 121:Src/stm32f0xx_hal_msp.c **** + 122:Src/stm32f0xx_hal_msp.c **** /* ADC1 DMA Init */ + 123:Src/stm32f0xx_hal_msp.c **** /* ADC Init */ + 124:Src/stm32f0xx_hal_msp.c **** hdma_adc.Instance = DMA1_Channel1; + 125:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.Direction = DMA_PERIPH_TO_MEMORY; + ARM GAS /tmp/ccqkHb8J.s page 5 + + + 126:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.PeriphInc = DMA_PINC_DISABLE; + 127:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.MemInc = DMA_MINC_ENABLE; + 128:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; + 129:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; + 130:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.Mode = DMA_CIRCULAR; + 131:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.Priority = DMA_PRIORITY_MEDIUM; + 132:Src/stm32f0xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc) != HAL_OK) + 133:Src/stm32f0xx_hal_msp.c **** { + 134:Src/stm32f0xx_hal_msp.c **** Error_Handler(); + 135:Src/stm32f0xx_hal_msp.c **** } + 136:Src/stm32f0xx_hal_msp.c **** + 137:Src/stm32f0xx_hal_msp.c **** __HAL_LINKDMA(hadc,DMA_Handle,hdma_adc); + 138:Src/stm32f0xx_hal_msp.c **** + 139:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspInit 1 */ + 140:Src/stm32f0xx_hal_msp.c **** + 141:Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspInit 1 */ + 142:Src/stm32f0xx_hal_msp.c **** } + 143:Src/stm32f0xx_hal_msp.c **** + 144:Src/stm32f0xx_hal_msp.c **** } + 107 .loc 1 144 0 + 108 0018 09B0 add sp, sp, #36 + 109 @ sp needed + 110 .LVL3: + 111 001a 30BD pop {r4, r5, pc} + 112 .LVL4: + 113 .L7: + 114 .LBB4: + 96:Src/stm32f0xx_hal_msp.c **** + 115 .loc 1 96 0 + 116 001c 254B ldr r3, .L9+4 + 117 001e 9969 ldr r1, [r3, #24] + 118 0020 8020 movs r0, #128 + 119 0022 8000 lsls r0, r0, #2 + 120 0024 0143 orrs r1, r0 + 121 0026 9961 str r1, [r3, #24] + 122 0028 9A69 ldr r2, [r3, #24] + 123 002a 0240 ands r2, r0 + 124 002c 0092 str r2, [sp] + 125 002e 009A ldr r2, [sp] + 126 .LBE4: + 127 .LBB5: + 98:Src/stm32f0xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); + 128 .loc 1 98 0 + 129 0030 5969 ldr r1, [r3, #20] + 130 0032 8020 movs r0, #128 + 131 0034 8002 lsls r0, r0, #10 + 132 0036 0143 orrs r1, r0 + 133 0038 5961 str r1, [r3, #20] + 134 003a 5A69 ldr r2, [r3, #20] + 135 003c 0240 ands r2, r0 + 136 003e 0192 str r2, [sp, #4] + 137 0040 019A ldr r2, [sp, #4] + 138 .LBE5: + 139 .LBB6: + 99:Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 140 .loc 1 99 0 + 141 0042 5A69 ldr r2, [r3, #20] + ARM GAS /tmp/ccqkHb8J.s page 6 + + + 142 0044 8021 movs r1, #128 + 143 0046 C902 lsls r1, r1, #11 + 144 0048 0A43 orrs r2, r1 + 145 004a 5A61 str r2, [r3, #20] + 146 004c 5B69 ldr r3, [r3, #20] + 147 004e 0B40 ands r3, r1 + 148 0050 0293 str r3, [sp, #8] + 149 0052 029B ldr r3, [sp, #8] + 150 .LBE6: + 111:Src/stm32f0xx_hal_msp.c **** |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7; + 151 .loc 1 111 0 + 152 0054 FF23 movs r3, #255 + 153 0056 0393 str r3, [sp, #12] + 113:Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 154 .loc 1 113 0 + 155 0058 0325 movs r5, #3 + 156 005a 0495 str r5, [sp, #16] + 115:Src/stm32f0xx_hal_msp.c **** + 157 .loc 1 115 0 + 158 005c 9020 movs r0, #144 + 159 005e 03A9 add r1, sp, #12 + 160 0060 C005 lsls r0, r0, #23 + 161 0062 FFF7FEFF bl HAL_GPIO_Init + 162 .LVL5: + 117:Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; + 163 .loc 1 117 0 + 164 0066 0123 movs r3, #1 + 165 0068 0393 str r3, [sp, #12] + 118:Src/stm32f0xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; + 166 .loc 1 118 0 + 167 006a 0495 str r5, [sp, #16] + 119:Src/stm32f0xx_hal_msp.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 168 .loc 1 119 0 + 169 006c 0025 movs r5, #0 + 170 006e 0595 str r5, [sp, #20] + 120:Src/stm32f0xx_hal_msp.c **** + 171 .loc 1 120 0 + 172 0070 03A9 add r1, sp, #12 + 173 0072 1148 ldr r0, .L9+8 + 174 0074 FFF7FEFF bl HAL_GPIO_Init + 175 .LVL6: + 124:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.Direction = DMA_PERIPH_TO_MEMORY; + 176 .loc 1 124 0 + 177 0078 1048 ldr r0, .L9+12 + 178 007a 114B ldr r3, .L9+16 + 179 007c 0360 str r3, [r0] + 125:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.PeriphInc = DMA_PINC_DISABLE; + 180 .loc 1 125 0 + 181 007e 4560 str r5, [r0, #4] + 126:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.MemInc = DMA_MINC_ENABLE; + 182 .loc 1 126 0 + 183 0080 8560 str r5, [r0, #8] + 127:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD; + 184 .loc 1 127 0 + 185 0082 8023 movs r3, #128 + 186 0084 C360 str r3, [r0, #12] + 128:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD; + ARM GAS /tmp/ccqkHb8J.s page 7 + + + 187 .loc 1 128 0 + 188 0086 8033 adds r3, r3, #128 + 189 0088 0361 str r3, [r0, #16] + 129:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.Mode = DMA_CIRCULAR; + 190 .loc 1 129 0 + 191 008a 8023 movs r3, #128 + 192 008c DB00 lsls r3, r3, #3 + 193 008e 4361 str r3, [r0, #20] + 130:Src/stm32f0xx_hal_msp.c **** hdma_adc.Init.Priority = DMA_PRIORITY_MEDIUM; + 194 .loc 1 130 0 + 195 0090 2023 movs r3, #32 + 196 0092 8361 str r3, [r0, #24] + 131:Src/stm32f0xx_hal_msp.c **** if (HAL_DMA_Init(&hdma_adc) != HAL_OK) + 197 .loc 1 131 0 + 198 0094 8023 movs r3, #128 + 199 0096 5B01 lsls r3, r3, #5 + 200 0098 C361 str r3, [r0, #28] + 132:Src/stm32f0xx_hal_msp.c **** { + 201 .loc 1 132 0 + 202 009a FFF7FEFF bl HAL_DMA_Init + 203 .LVL7: + 204 009e 0028 cmp r0, #0 + 205 00a0 03D1 bne .L8 + 206 .L6: + 137:Src/stm32f0xx_hal_msp.c **** + 207 .loc 1 137 0 + 208 00a2 064B ldr r3, .L9+12 + 209 00a4 2363 str r3, [r4, #48] + 210 00a6 5C62 str r4, [r3, #36] + 211 .loc 1 144 0 + 212 00a8 B6E7 b .L4 + 213 .L8: + 134:Src/stm32f0xx_hal_msp.c **** } + 214 .loc 1 134 0 + 215 00aa FFF7FEFF bl Error_Handler + 216 .LVL8: + 217 00ae F8E7 b .L6 + 218 .L10: + 219 .align 2 + 220 .L9: + 221 00b0 00240140 .word 1073816576 + 222 00b4 00100240 .word 1073876992 + 223 00b8 00040048 .word 1207960576 + 224 00bc 00000000 .word hdma_adc + 225 00c0 08000240 .word 1073872904 + 226 .cfi_endproc + 227 .LFE41: + 229 .section .text.HAL_ADC_MspDeInit,"ax",%progbits + 230 .align 1 + 231 .global HAL_ADC_MspDeInit + 232 .syntax unified + 233 .code 16 + 234 .thumb_func + 235 .fpu softvfp + 237 HAL_ADC_MspDeInit: + 238 .LFB42: + 145:Src/stm32f0xx_hal_msp.c **** + ARM GAS /tmp/ccqkHb8J.s page 8 + + + 146:Src/stm32f0xx_hal_msp.c **** /** + 147:Src/stm32f0xx_hal_msp.c **** * @brief ADC MSP De-Initialization + 148:Src/stm32f0xx_hal_msp.c **** * This function freeze the hardware resources used in this example + 149:Src/stm32f0xx_hal_msp.c **** * @param hadc: ADC handle pointer + 150:Src/stm32f0xx_hal_msp.c **** * @retval None + 151:Src/stm32f0xx_hal_msp.c **** */ + 152:Src/stm32f0xx_hal_msp.c **** void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc) + 153:Src/stm32f0xx_hal_msp.c **** { + 239 .loc 1 153 0 + 240 .cfi_startproc + 241 @ args = 0, pretend = 0, frame = 0 + 242 @ frame_needed = 0, uses_anonymous_args = 0 + 243 .LVL9: + 244 0000 10B5 push {r4, lr} + 245 .LCFI3: + 246 .cfi_def_cfa_offset 8 + 247 .cfi_offset 4, -8 + 248 .cfi_offset 14, -4 + 249 0002 0400 movs r4, r0 + 154:Src/stm32f0xx_hal_msp.c **** if(hadc->Instance==ADC1) + 250 .loc 1 154 0 + 251 0004 0B4B ldr r3, .L14 + 252 0006 0268 ldr r2, [r0] + 253 0008 9A42 cmp r2, r3 + 254 000a 00D0 beq .L13 + 255 .LVL10: + 256 .L11: + 155:Src/stm32f0xx_hal_msp.c **** { + 156:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 0 */ + 157:Src/stm32f0xx_hal_msp.c **** + 158:Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 0 */ + 159:Src/stm32f0xx_hal_msp.c **** /* Peripheral clock disable */ + 160:Src/stm32f0xx_hal_msp.c **** __HAL_RCC_ADC1_CLK_DISABLE(); + 161:Src/stm32f0xx_hal_msp.c **** + 162:Src/stm32f0xx_hal_msp.c **** /**ADC GPIO Configuration + 163:Src/stm32f0xx_hal_msp.c **** PA0 ------> ADC_IN0 + 164:Src/stm32f0xx_hal_msp.c **** PA1 ------> ADC_IN1 + 165:Src/stm32f0xx_hal_msp.c **** PA2 ------> ADC_IN2 + 166:Src/stm32f0xx_hal_msp.c **** PA3 ------> ADC_IN3 + 167:Src/stm32f0xx_hal_msp.c **** PA4 ------> ADC_IN4 + 168:Src/stm32f0xx_hal_msp.c **** PA5 ------> ADC_IN5 + 169:Src/stm32f0xx_hal_msp.c **** PA6 ------> ADC_IN6 + 170:Src/stm32f0xx_hal_msp.c **** PA7 ------> ADC_IN7 + 171:Src/stm32f0xx_hal_msp.c **** PB0 ------> ADC_IN8 + 172:Src/stm32f0xx_hal_msp.c **** */ + 173:Src/stm32f0xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOA, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 + 174:Src/stm32f0xx_hal_msp.c **** |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + 175:Src/stm32f0xx_hal_msp.c **** + 176:Src/stm32f0xx_hal_msp.c **** HAL_GPIO_DeInit(GPIOB, GPIO_PIN_0); + 177:Src/stm32f0xx_hal_msp.c **** + 178:Src/stm32f0xx_hal_msp.c **** /* ADC1 DMA DeInit */ + 179:Src/stm32f0xx_hal_msp.c **** HAL_DMA_DeInit(hadc->DMA_Handle); + 180:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ + 181:Src/stm32f0xx_hal_msp.c **** + 182:Src/stm32f0xx_hal_msp.c **** /* USER CODE END ADC1_MspDeInit 1 */ + 183:Src/stm32f0xx_hal_msp.c **** } + 184:Src/stm32f0xx_hal_msp.c **** + ARM GAS /tmp/ccqkHb8J.s page 9 + + + 185:Src/stm32f0xx_hal_msp.c **** } + 257 .loc 1 185 0 + 258 @ sp needed + 259 .LVL11: + 260 000c 10BD pop {r4, pc} + 261 .LVL12: + 262 .L13: + 160:Src/stm32f0xx_hal_msp.c **** + 263 .loc 1 160 0 + 264 000e 0A4A ldr r2, .L14+4 + 265 0010 9369 ldr r3, [r2, #24] + 266 0012 0A49 ldr r1, .L14+8 + 267 0014 0B40 ands r3, r1 + 268 0016 9361 str r3, [r2, #24] + 173:Src/stm32f0xx_hal_msp.c **** |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7); + 269 .loc 1 173 0 + 270 0018 9020 movs r0, #144 + 271 .LVL13: + 272 001a FF21 movs r1, #255 + 273 001c C005 lsls r0, r0, #23 + 274 001e FFF7FEFF bl HAL_GPIO_DeInit + 275 .LVL14: + 176:Src/stm32f0xx_hal_msp.c **** + 276 .loc 1 176 0 + 277 0022 0121 movs r1, #1 + 278 0024 0648 ldr r0, .L14+12 + 279 0026 FFF7FEFF bl HAL_GPIO_DeInit + 280 .LVL15: + 179:Src/stm32f0xx_hal_msp.c **** /* USER CODE BEGIN ADC1_MspDeInit 1 */ + 281 .loc 1 179 0 + 282 002a 206B ldr r0, [r4, #48] + 283 002c FFF7FEFF bl HAL_DMA_DeInit + 284 .LVL16: + 285 .loc 1 185 0 + 286 0030 ECE7 b .L11 + 287 .L15: + 288 0032 C046 .align 2 + 289 .L14: + 290 0034 00240140 .word 1073816576 + 291 0038 00100240 .word 1073876992 + 292 003c FFFDFFFF .word -513 + 293 0040 00040048 .word 1207960576 + 294 .cfi_endproc + 295 .LFE42: + 297 .text + 298 .Letext0: + 299 .file 2 "/usr/include/newlib/machine/_default_types.h" + 300 .file 3 "/usr/include/newlib/sys/_stdint.h" + 301 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 302 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 303 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 304 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 305 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + 306 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 307 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h" + 308 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 309 .file 12 "Inc/main.h" + ARM GAS /tmp/ccqkHb8J.s page 10 + + + 310 .file 13 "<built-in>" + ARM GAS /tmp/ccqkHb8J.s page 11 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_msp.c + /tmp/ccqkHb8J.s:16 .text.HAL_MspInit:0000000000000000 $t + /tmp/ccqkHb8J.s:23 .text.HAL_MspInit:0000000000000000 HAL_MspInit + /tmp/ccqkHb8J.s:65 .text.HAL_MspInit:000000000000002c $d + /tmp/ccqkHb8J.s:70 .text.HAL_ADC_MspInit:0000000000000000 $t + /tmp/ccqkHb8J.s:77 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit + /tmp/ccqkHb8J.s:221 .text.HAL_ADC_MspInit:00000000000000b0 $d + /tmp/ccqkHb8J.s:230 .text.HAL_ADC_MspDeInit:0000000000000000 $t + /tmp/ccqkHb8J.s:237 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit + /tmp/ccqkHb8J.s:290 .text.HAL_ADC_MspDeInit:0000000000000034 $d + +UNDEFINED SYMBOLS +memset +HAL_GPIO_Init +HAL_DMA_Init +Error_Handler +hdma_adc +HAL_GPIO_DeInit +HAL_DMA_DeInit diff --git a/fw/midi-dials/build/stm32f0xx_hal_msp.o b/fw/midi-dials/build/stm32f0xx_hal_msp.o Binary files differnew file mode 100644 index 0000000..0ac5f38 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_msp.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_pcd.d b/fw/midi-dials/build/stm32f0xx_hal_pcd.d new file mode 100644 index 0000000..deb2595 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pcd.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_pcd.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_pcd.lst b/fw/midi-dials/build/stm32f0xx_hal_pcd.lst new file mode 100644 index 0000000..d098e1d --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pcd.lst @@ -0,0 +1,4908 @@ +ARM GAS /tmp/ccYuHakw.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_pcd.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_PCD_MspInit,"ax",%progbits + 16 .align 1 + 17 .weak HAL_PCD_MspInit + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_PCD_MspInit: + 24 .LFB42: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @file stm32f0xx_hal_pcd.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief PCD HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * functionalities of the USB Peripheral Controller: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + Peripheral Control functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + Peripheral State functions + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @verbatim + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ##### How to use this driver ##### + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ============================================================================== + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** [..] + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** The PCD HAL driver can be used as follows: + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (#) Declare a PCD_HandleTypeDef handle structure, for example: + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_HandleTypeDef hpcd; + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (#) Fill parameters of Init structure in HCD handle + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (#) Call HAL_PCD_Init() API to initialize the PCD peripheral (Core, Device core, ...) + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (#) Initialize the PCD low level resources through the HAL_PCD_MspInit() API: + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (##) Enable the PCD/USB Low Level interface clock using + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (+++) __HAL_RCC_USB_CLK_ENABLE(); For USB Device only FS peripheral + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (##) Initialize the related GPIO clocks + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (##) Configure PCD pin-out + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (##) Configure PCD NVIC interrupt + ARM GAS /tmp/ccYuHakw.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (#)Associate the Upper USB device stack to the HAL PCD Driver: + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (##) hpcd.pData = pdev; + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (#)Enable PCD transmission and reception: + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (##) HAL_PCD_Start(); + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @endverbatim + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ****************************************************************************** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @attention + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * All rights reserved.</center></h2> + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * This software component is licensed by ST under BSD 3-Clause license, + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * the "License"; You may not use this file except in compliance with the + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * License. You may obtain a copy of the License at: + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * opensource.org/licenses/BSD-3-Clause + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ****************************************************************************** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Includes ------------------------------------------------------------------*/ + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #include "stm32f0xx_hal.h" + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @addtogroup STM32F0xx_HAL_Driver + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @defgroup PCD PCD + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief PCD HAL module driver + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #ifdef HAL_PCD_MODULE_ENABLED + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if defined (USB) + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Private types -------------------------------------------------------------*/ + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Private variables ---------------------------------------------------------*/ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Private constants ---------------------------------------------------------*/ + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Private macros ------------------------------------------------------------*/ + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @defgroup PCD_Private_Macros PCD Private Macros + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #define PCD_MIN(a, b) (((a) < (b)) ? (a) : (b)) + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #define PCD_MAX(a, b) (((a) > (b)) ? (a) : (b)) + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @} + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Private functions prototypes ----------------------------------------------*/ + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @defgroup PCD_Private_Functions PCD Private Functions + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd); + ARM GAS /tmp/ccYuHakw.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @} + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Exported functions --------------------------------------------------------*/ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @defgroup PCD_Exported_Functions PCD Exported Functions + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @defgroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Initialization and Configuration functions + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @verbatim + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** =============================================================================== + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ##### Initialization and de-initialization functions ##### + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** =============================================================================== + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** [..] This section provides functions allowing to: + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @endverbatim + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Initializes the PCD according to the specified + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * parameters in the PCD_InitTypeDef and initialize the associated handle. + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd) + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** uint8_t i; + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Check the PCD handle allocation */ + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd == NULL) + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Check the parameters */ + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance)); + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_RESET) + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Allocate lock resource and initialize it */ + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Lock = HAL_UNLOCKED; + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SOFCallback = HAL_PCD_SOFCallback; + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SetupStageCallback = HAL_PCD_SetupStageCallback; + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ResetCallback = HAL_PCD_ResetCallback; + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SuspendCallback = HAL_PCD_SuspendCallback; + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ResumeCallback = HAL_PCD_ResumeCallback; + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ConnectCallback = HAL_PCD_ConnectCallback; + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DisconnectCallback = HAL_PCD_DisconnectCallback; + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataOutStageCallback = HAL_PCD_DataOutStageCallback; + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataInStageCallback = HAL_PCD_DataInStageCallback; + ARM GAS /tmp/ccYuHakw.s page 4 + + + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ISOOUTIncompleteCallback = HAL_PCD_ISOOUTIncompleteCallback; + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ISOINIncompleteCallback = HAL_PCD_ISOINIncompleteCallback; + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->LPMCallback = HAL_PCDEx_LPM_Callback; + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->BCDCallback = HAL_PCDEx_BCD_Callback; + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->MspInitCallback == NULL) + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspInitCallback = HAL_PCD_MspInit; + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Init the low level hardware */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspInitCallback(hpcd); + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Init the low level hardware : GPIO, CLOCK, NVIC... */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_MspInit(hpcd); + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->State = HAL_PCD_STATE_BUSY; + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Disable the Interrupts */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_DISABLE(hpcd); + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Init endpoints structures */ + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** for (i = 0U; i < hpcd->Init.dev_endpoints; i++) + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Init ep structure */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].is_in = 1U; + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].num = i; + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].tx_fifo_num = i; + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Control until ep is activated */ + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].type = EP_TYPE_CTRL; + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].maxpacket = 0U; + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].xfer_buff = 0U; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].xfer_len = 0U; + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** for (i = 0U; i < hpcd->Init.dev_endpoints; i++) + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].is_in = 0U; + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].num = i; + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Control until ep is activated */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].type = EP_TYPE_CTRL; + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].maxpacket = 0U; + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].xfer_buff = 0U; + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].xfer_len = 0U; + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Init Device */ + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_DevInit(hpcd->Instance, hpcd->Init); + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->USB_Address = 0U; + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->State = HAL_PCD_STATE_READY; + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Activate LPM */ + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->Init.lpm_enable == 1U) + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + ARM GAS /tmp/ccYuHakw.s page 5 + + + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)HAL_PCDEx_ActivateLPM(hpcd); + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief DeInitializes the PCD peripheral. + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd) + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Check the PCD handle allocation */ + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd == NULL) + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->State = HAL_PCD_STATE_BUSY; + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Stop Device */ + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)HAL_PCD_Stop(hpcd); + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->MspDeInitCallback == NULL) + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspDeInitCallback = HAL_PCD_MspDeInit; /* Legacy weak MspDeInit */ + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* DeInit the low level hardware */ + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspDeInitCallback(hpcd); + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* DeInit the low level hardware: CLOCK, NVIC.*/ + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_MspDeInit(hpcd); + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->State = HAL_PCD_STATE_RESET; + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Initializes the PCD MSP. + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd) + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 26 .loc 1 253 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 31 .LVL0: + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); + ARM GAS /tmp/ccYuHakw.s page 6 + + + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_MspInit could be implemented in the user file + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 32 .loc 1 260 0 + 33 @ sp needed + 34 0000 7047 bx lr + 35 .cfi_endproc + 36 .LFE42: + 38 .section .text.HAL_PCD_Init,"ax",%progbits + 39 .align 1 + 40 .global HAL_PCD_Init + 41 .syntax unified + 42 .code 16 + 43 .thumb_func + 44 .fpu softvfp + 46 HAL_PCD_Init: + 47 .LFB40: + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** uint8_t i; + 48 .loc 1 121 0 + 49 .cfi_startproc + 50 @ args = 0, pretend = 0, frame = 0 + 51 @ frame_needed = 0, uses_anonymous_args = 0 + 52 .LVL1: + 53 0000 30B5 push {r4, r5, lr} + 54 .LCFI0: + 55 .cfi_def_cfa_offset 12 + 56 .cfi_offset 4, -12 + 57 .cfi_offset 5, -8 + 58 .cfi_offset 14, -4 + 59 0002 87B0 sub sp, sp, #28 + 60 .LCFI1: + 61 .cfi_def_cfa_offset 40 + 62 0004 041E subs r4, r0, #0 + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 63 .loc 1 125 0 + 64 0006 61D0 beq .L9 + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 65 .loc 1 133 0 + 66 0008 314B ldr r3, .L13 + 67 000a C35C ldrb r3, [r0, r3] + 68 000c 002B cmp r3, #0 + 69 000e 07D0 beq .L11 + 70 .LVL2: + 71 .L4: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 72 .loc 1 166 0 + 73 0010 2F4B ldr r3, .L13 + 74 0012 0322 movs r2, #3 + 75 0014 E254 strb r2, [r4, r3] + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 76 .loc 1 169 0 + 77 0016 2068 ldr r0, [r4] + 78 0018 FFF7FEFF bl USB_DisableGlobalInt + 79 .LVL3: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + ARM GAS /tmp/ccYuHakw.s page 7 + + + 80 .loc 1 172 0 + 81 001c 0023 movs r3, #0 + 82 001e 1AE0 b .L5 + 83 .LVL4: + 84 .L11: + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 85 .loc 1 136 0 + 86 0020 8A23 movs r3, #138 + 87 0022 9B00 lsls r3, r3, #2 + 88 0024 0022 movs r2, #0 + 89 0026 C254 strb r2, [r0, r3] + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */ + 90 .loc 1 162 0 + 91 0028 FFF7FEFF bl HAL_PCD_MspInit + 92 .LVL5: + 93 002c F0E7 b .L4 + 94 .LVL6: + 95 .L6: + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].num = i; + 96 .loc 1 175 0 discriminator 3 + 97 002e 5A01 lsls r2, r3, #5 + 98 0030 A218 adds r2, r4, r2 + 99 0032 1100 movs r1, r2 + 100 0034 2931 adds r1, r1, #41 + 101 0036 0120 movs r0, #1 + 102 0038 0870 strb r0, [r1] + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].tx_fifo_num = i; + 103 .loc 1 176 0 discriminator 3 + 104 003a 0139 subs r1, r1, #1 + 105 003c 0B70 strb r3, [r1] + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Control until ep is activated */ + 106 .loc 1 177 0 discriminator 3 + 107 003e D386 strh r3, [r2, #54] + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].maxpacket = 0U; + 108 .loc 1 179 0 discriminator 3 + 109 0040 1000 movs r0, r2 + 110 0042 2B30 adds r0, r0, #43 + 111 0044 0021 movs r1, #0 + 112 0046 0170 strb r1, [r0] + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].xfer_buff = 0U; + 113 .loc 1 180 0 discriminator 3 + 114 0048 9163 str r1, [r2, #56] + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->IN_ep[i].xfer_len = 0U; + 115 .loc 1 181 0 discriminator 3 + 116 004a D163 str r1, [r2, #60] + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 117 .loc 1 182 0 discriminator 3 + 118 004c 9A1C adds r2, r3, #2 + 119 004e 5201 lsls r2, r2, #5 + 120 0050 1151 str r1, [r2, r4] + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 121 .loc 1 172 0 discriminator 3 + 122 0052 0133 adds r3, r3, #1 + 123 .LVL7: + 124 0054 DBB2 uxtb r3, r3 + 125 .LVL8: + 126 .L5: + ARM GAS /tmp/ccYuHakw.s page 8 + + + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 127 .loc 1 172 0 is_stmt 0 discriminator 1 + 128 0056 6068 ldr r0, [r4, #4] + 129 0058 8342 cmp r3, r0 + 130 005a E8D3 bcc .L6 + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 131 .loc 1 185 0 is_stmt 1 + 132 005c 0022 movs r2, #0 + 133 005e 15E0 b .L7 + 134 .LVL9: + 135 .L8: + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].num = i; + 136 .loc 1 187 0 discriminator 3 + 137 0060 5301 lsls r3, r2, #5 + 138 0062 E318 adds r3, r4, r3 + 139 0064 1D00 movs r5, r3 + 140 0066 2A35 adds r5, r5, #42 + 141 0068 FF35 adds r5, r5, #255 + 142 006a 0021 movs r1, #0 + 143 006c 2970 strb r1, [r5] + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Control until ep is activated */ + 144 .loc 1 188 0 discriminator 3 + 145 006e 013D subs r5, r5, #1 + 146 0070 2A70 strb r2, [r5] + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].maxpacket = 0U; + 147 .loc 1 190 0 discriminator 3 + 148 0072 0335 adds r5, r5, #3 + 149 0074 2970 strb r1, [r5] + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].xfer_buff = 0U; + 150 .loc 1 191 0 discriminator 3 + 151 0076 0D35 adds r5, r5, #13 + 152 0078 2960 str r1, [r5] + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->OUT_ep[i].xfer_len = 0U; + 153 .loc 1 192 0 discriminator 3 + 154 007a 3D33 adds r3, r3, #61 + 155 007c FF33 adds r3, r3, #255 + 156 007e 1960 str r1, [r3] + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 157 .loc 1 193 0 discriminator 3 + 158 0080 1300 movs r3, r2 + 159 0082 0A33 adds r3, r3, #10 + 160 0084 5B01 lsls r3, r3, #5 + 161 0086 1951 str r1, [r3, r4] + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 162 .loc 1 185 0 discriminator 3 + 163 0088 0132 adds r2, r2, #1 + 164 .LVL10: + 165 008a D2B2 uxtb r2, r2 + 166 .LVL11: + 167 .L7: + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 168 .loc 1 185 0 is_stmt 0 discriminator 1 + 169 008c 9042 cmp r0, r2 + 170 008e E7D8 bhi .L8 + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 171 .loc 1 197 0 is_stmt 1 + 172 0090 6A46 mov r2, sp + ARM GAS /tmp/ccYuHakw.s page 9 + + + 173 .LVL12: + 174 0092 2300 movs r3, r4 + 175 0094 1033 adds r3, r3, #16 + 176 0096 23CB ldmia r3!, {r0, r1, r5} + 177 0098 23C2 stmia r2!, {r0, r1, r5} + 178 009a 03CB ldmia r3!, {r0, r1} + 179 009c 03C2 stmia r2!, {r0, r1} + 180 009e 6168 ldr r1, [r4, #4] + 181 00a0 A268 ldr r2, [r4, #8] + 182 00a2 E368 ldr r3, [r4, #12] + 183 00a4 2068 ldr r0, [r4] + 184 00a6 FFF7FEFF bl USB_DevInit + 185 .LVL13: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->State = HAL_PCD_STATE_READY; + 186 .loc 1 199 0 + 187 00aa 2423 movs r3, #36 + 188 00ac 0022 movs r2, #0 + 189 00ae E254 strb r2, [r4, r3] + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 190 .loc 1 200 0 + 191 00b0 074B ldr r3, .L13 + 192 00b2 0132 adds r2, r2, #1 + 193 00b4 E254 strb r2, [r4, r3] + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 194 .loc 1 203 0 + 195 00b6 E369 ldr r3, [r4, #28] + 196 00b8 012B cmp r3, #1 + 197 00ba 02D0 beq .L12 + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 198 .loc 1 208 0 + 199 00bc 0020 movs r0, #0 + 200 .L3: + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 201 .loc 1 209 0 + 202 00be 07B0 add sp, sp, #28 + 203 @ sp needed + 204 .LVL14: + 205 00c0 30BD pop {r4, r5, pc} + 206 .LVL15: + 207 .L12: + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 208 .loc 1 205 0 + 209 00c2 2000 movs r0, r4 + 210 00c4 FFF7FEFF bl HAL_PCDEx_ActivateLPM + 211 .LVL16: + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 212 .loc 1 208 0 + 213 00c8 0020 movs r0, #0 + 214 00ca F8E7 b .L3 + 215 .LVL17: + 216 .L9: + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 217 .loc 1 127 0 + 218 00cc 0120 movs r0, #1 + 219 .LVL18: + 220 00ce F6E7 b .L3 + 221 .L14: + ARM GAS /tmp/ccYuHakw.s page 10 + + + 222 .align 2 + 223 .L13: + 224 00d0 29020000 .word 553 + 225 .cfi_endproc + 226 .LFE40: + 228 .section .text.HAL_PCD_MspDeInit,"ax",%progbits + 229 .align 1 + 230 .weak HAL_PCD_MspDeInit + 231 .syntax unified + 232 .code 16 + 233 .thumb_func + 234 .fpu softvfp + 236 HAL_PCD_MspDeInit: + 237 .LFB43: + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief DeInitializes PCD MSP. + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd) + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 238 .loc 1 268 0 + 239 .cfi_startproc + 240 @ args = 0, pretend = 0, frame = 0 + 241 @ frame_needed = 0, uses_anonymous_args = 0 + 242 @ link register save eliminated. + 243 .LVL19: + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_MspDeInit could be implemented in the user file + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 244 .loc 1 275 0 + 245 @ sp needed + 246 0000 7047 bx lr + 247 .cfi_endproc + 248 .LFE43: + 250 .section .text.HAL_PCD_Start,"ax",%progbits + 251 .align 1 + 252 .global HAL_PCD_Start + 253 .syntax unified + 254 .code 16 + 255 .thumb_func + 256 .fpu softvfp + 258 HAL_PCD_Start: + 259 .LFB44: + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Register a User USB PCD Callback + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * To be used instead of the weak predefined callback + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd USB PCD handle + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param CallbackID ID of the callback to be registered + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * This parameter can be one of the following values: + ARM GAS /tmp/ccYuHakw.s page 11 + + + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_SOF_CB_ID USB PCD SOF callback ID + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_SETUPSTAGE_CB_ID USB PCD Setup callback ID + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_RESET_CB_ID USB PCD Reset callback ID + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_SUSPEND_CB_ID USB PCD Suspend callback ID + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_RESUME_CB_ID USB PCD Resume callback ID + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_CONNECT_CB_ID USB PCD Connect callback ID + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_DISCONNECT_CB_ID OTG PCD Disconnect callback ID + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_MSPINIT_CB_ID MspDeInit callback ID + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_MSPDEINIT_CB_ID MspDeInit callback ID + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param pCallback pointer to the Callback function + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef Callb + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (pCallback == NULL) + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** switch (CallbackID) + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_SOF_CB_ID : + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SOFCallback = pCallback; + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_SETUPSTAGE_CB_ID : + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SetupStageCallback = pCallback; + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_RESET_CB_ID : + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ResetCallback = pCallback; + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_SUSPEND_CB_ID : + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SuspendCallback = pCallback; + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_RESUME_CB_ID : + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ResumeCallback = pCallback; + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_CONNECT_CB_ID : + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ConnectCallback = pCallback; + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_DISCONNECT_CB_ID : + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DisconnectCallback = pCallback; + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 12 + + + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_MSPINIT_CB_ID : + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspInitCallback = pCallback; + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_MSPDEINIT_CB_ID : + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspDeInitCallback = pCallback; + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** default : + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else if (hpcd->State == HAL_PCD_STATE_RESET) + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** switch (CallbackID) + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_MSPINIT_CB_ID : + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspInitCallback = pCallback; + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_MSPDEINIT_CB_ID : + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspDeInitCallback = pCallback; + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** default : + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Unregister an USB PCD Callback + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * USB PCD callabck is redirected to the weak predefined callback + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd USB PCD handle + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param CallbackID ID of the callback to be unregistered + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * This parameter can be one of the following values: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_SOF_CB_ID USB PCD SOF callback ID + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_SETUPSTAGE_CB_ID USB PCD Setup callback ID + ARM GAS /tmp/ccYuHakw.s page 13 + + + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_RESET_CB_ID USB PCD Reset callback ID + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_SUSPEND_CB_ID USB PCD Suspend callback ID + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_RESUME_CB_ID USB PCD Resume callback ID + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_CONNECT_CB_ID USB PCD Connect callback ID + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_DISCONNECT_CB_ID OTG PCD Disconnect callback ID + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_MSPINIT_CB_ID MspDeInit callback ID + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @arg @ref HAL_PCD_MSPDEINIT_CB_ID MspDeInit callback ID + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef Cal + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Setup Legacy weak Callbacks */ + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** switch (CallbackID) + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_SOF_CB_ID : + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SOFCallback = HAL_PCD_SOFCallback; + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_SETUPSTAGE_CB_ID : + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SetupStageCallback = HAL_PCD_SetupStageCallback; + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_RESET_CB_ID : + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ResetCallback = HAL_PCD_ResetCallback; + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_SUSPEND_CB_ID : + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SuspendCallback = HAL_PCD_SuspendCallback; + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_RESUME_CB_ID : + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ResumeCallback = HAL_PCD_ResumeCallback; + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_CONNECT_CB_ID : + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ConnectCallback = HAL_PCD_ConnectCallback; + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_DISCONNECT_CB_ID : + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DisconnectCallback = HAL_PCD_DisconnectCallback; + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_MSPINIT_CB_ID : + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspInitCallback = HAL_PCD_MspInit; + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_MSPDEINIT_CB_ID : + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspDeInitCallback = HAL_PCD_MspDeInit; + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 14 + + + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** default : + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else if (hpcd->State == HAL_PCD_STATE_RESET) + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** switch (CallbackID) + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_MSPINIT_CB_ID : + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspInitCallback = HAL_PCD_MspInit; + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** case HAL_PCD_MSPDEINIT_CB_ID : + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->MspDeInitCallback = HAL_PCD_MspDeInit; + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** default : + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** break; + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Register USB PCD Data OUT Stage Callback + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * To be used instead of the weak HAL_PCD_DataOutStageCallback() predefined callback + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param pCallback pointer to the USB PCD Data OUT Stage Callback function + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCa + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (pCallback == NULL) + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + ARM GAS /tmp/ccYuHakw.s page 15 + + + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataOutStageCallback = pCallback; + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief UnRegister the USB PCD Data OUT Stage Callback + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataOutStageCallback( + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd) + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataOutStageCallback = HAL_PCD_DataOutStageCallback; /* Legacy weak DataOutStageCallback + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 16 + + + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Register USB PCD Data IN Stage Callback + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * To be used instead of the weak HAL_PCD_DataInStageCallback() predefined callback + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param pCallback pointer to the USB PCD Data IN Stage Callback function + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCall + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (pCallback == NULL) + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataInStageCallback = pCallback; + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief UnRegister the USB PCD Data IN Stage Callback + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * USB PCD Data OUT Stage Callback is redirected to the weak HAL_PCD_DataInStageCallback() + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd) + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 17 + + + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataInStageCallback = HAL_PCD_DataInStageCallback; /* Legacy weak DataInStageCallback */ + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Register USB PCD Iso OUT incomplete Callback + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * To be used instead of the weak HAL_PCD_ISOOUTIncompleteCallback() predefined callback + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param pCallback pointer to the USB PCD Iso OUT incomplete Callback function + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCa + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (pCallback == NULL) + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ISOOUTIncompleteCallback = pCallback; + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 18 + + + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief UnRegister the USB PCD Iso OUT incomplete Callback + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * USB PCD Iso OUT incomplete Callback is redirected to the weak HAL_PCD_ISOOUTIncompleteC + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd) + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ISOOUTIncompleteCallback = HAL_PCD_ISOOUTIncompleteCallback; /* Legacy weak ISOOUTIncompl + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Register USB PCD Iso IN incomplete Callback + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * To be used instead of the weak HAL_PCD_ISOINIncompleteCallback() predefined callback + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param pCallback pointer to the USB PCD Iso IN incomplete Callback function + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCall + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (pCallback == NULL) + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 19 + + + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ISOINIncompleteCallback = pCallback; + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief UnRegister the USB PCD Iso IN incomplete Callback + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * USB PCD Iso IN incomplete Callback is redirected to the weak HAL_PCD_ISOINIncompleteCal + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd) + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ISOINIncompleteCallback = HAL_PCD_ISOINIncompleteCallback; /* Legacy weak ISOINIncomplete + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Register USB PCD BCD Callback + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * To be used instead of the weak HAL_PCDEx_BCD_Callback() predefined callback + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param pCallback pointer to the USB PCD BCD Callback function + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + ARM GAS /tmp/ccYuHakw.s page 20 + + + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCal + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (pCallback == NULL) + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->BCDCallback = pCallback; + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief UnRegister the USB PCD BCD Callback + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * USB BCD Callback is redirected to the weak HAL_PCDEx_BCD_Callback() predefined callback + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd) + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->BCDCallback = HAL_PCDEx_BCD_Callback; /* Legacy weak HAL_PCDEx_BCD_Callback */ + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 21 + + + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Register USB PCD LPM Callback + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * To be used instead of the weak HAL_PCDEx_LPM_Callback() predefined callback + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param pCallback pointer to the USB PCD LPM Callback function + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCal + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (pCallback == NULL) + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->LPMCallback = pCallback; + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief UnRegister the USB PCD LPM Callback + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * USB LPM Callback is redirected to the weak HAL_PCDEx_LPM_Callback() predefined callback + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + ARM GAS /tmp/ccYuHakw.s page 22 + + + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd) + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef status = HAL_OK; + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process locked */ + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->State == HAL_PCD_STATE_READY) + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->LPMCallback = HAL_PCDEx_LPM_Callback; /* Legacy weak HAL_PCDEx_LPM_Callback */ + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Update the error code */ + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ErrorCode |= HAL_PCD_ERROR_INVALID_CALLBACK; + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Return error status */ + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** status = HAL_ERROR; + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Release Lock */ + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return status; + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @} + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @defgroup PCD_Exported_Functions_Group2 Input and Output operation functions + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Data transfers functions + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @verbatim + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** =============================================================================== + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ##### IO operation functions ##### + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** =============================================================================== + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** [..] + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** This subsection provides a set of functions allowing to manage the PCD data + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** transfers. + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @endverbatim + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Start the USB device + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd) + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 260 .loc 1 963 0 + 261 .cfi_startproc + 262 @ args = 0, pretend = 0, frame = 0 + 263 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccYuHakw.s page 23 + + + 264 .LVL20: + 265 0000 70B5 push {r4, r5, r6, lr} + 266 .LCFI2: + 267 .cfi_def_cfa_offset 16 + 268 .cfi_offset 4, -16 + 269 .cfi_offset 5, -12 + 270 .cfi_offset 6, -8 + 271 .cfi_offset 14, -4 + 272 0002 0400 movs r4, r0 + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 273 .loc 1 964 0 + 274 0004 8A23 movs r3, #138 + 275 0006 9B00 lsls r3, r3, #2 + 276 0008 C35C ldrb r3, [r0, r3] + 277 000a 012B cmp r3, #1 + 278 000c 0DD0 beq .L18 + 279 .loc 1 964 0 is_stmt 0 discriminator 2 + 280 000e 8A25 movs r5, #138 + 281 0010 AD00 lsls r5, r5, #2 + 282 0012 0123 movs r3, #1 + 283 0014 4355 strb r3, [r0, r5] + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_DevConnect(hpcd->Instance); + 284 .loc 1 965 0 is_stmt 1 discriminator 2 + 285 0016 0068 ldr r0, [r0] + 286 .LVL21: + 287 0018 FFF7FEFF bl USB_DevConnect + 288 .LVL22: + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_ENABLE(hpcd); + 289 .loc 1 966 0 discriminator 2 + 290 001c 2068 ldr r0, [r4] + 291 001e FFF7FEFF bl USB_EnableGlobalInt + 292 .LVL23: + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 293 .loc 1 967 0 discriminator 2 + 294 0022 0023 movs r3, #0 + 295 0024 6355 strb r3, [r4, r5] + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; + 296 .loc 1 968 0 discriminator 2 + 297 0026 0020 movs r0, #0 + 298 .L17: + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 299 .loc 1 969 0 + 300 @ sp needed + 301 .LVL24: + 302 0028 70BD pop {r4, r5, r6, pc} + 303 .LVL25: + 304 .L18: + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_DevConnect(hpcd->Instance); + 305 .loc 1 964 0 + 306 002a 0220 movs r0, #2 + 307 .LVL26: + 308 002c FCE7 b .L17 + 309 .cfi_endproc + 310 .LFE44: + 312 .section .text.HAL_PCD_Stop,"ax",%progbits + 313 .align 1 + 314 .global HAL_PCD_Stop + ARM GAS /tmp/ccYuHakw.s page 24 + + + 315 .syntax unified + 316 .code 16 + 317 .thumb_func + 318 .fpu softvfp + 320 HAL_PCD_Stop: + 321 .LFB45: + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Stop the USB device. + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd) + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 322 .loc 1 977 0 + 323 .cfi_startproc + 324 @ args = 0, pretend = 0, frame = 0 + 325 @ frame_needed = 0, uses_anonymous_args = 0 + 326 .LVL27: + 327 0000 70B5 push {r4, r5, r6, lr} + 328 .LCFI3: + 329 .cfi_def_cfa_offset 16 + 330 .cfi_offset 4, -16 + 331 .cfi_offset 5, -12 + 332 .cfi_offset 6, -8 + 333 .cfi_offset 14, -4 + 334 0002 0400 movs r4, r0 + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 335 .loc 1 978 0 + 336 0004 8A23 movs r3, #138 + 337 0006 9B00 lsls r3, r3, #2 + 338 0008 C35C ldrb r3, [r0, r3] + 339 000a 012B cmp r3, #1 + 340 000c 0DD0 beq .L21 + 341 .loc 1 978 0 is_stmt 0 discriminator 2 + 342 000e 8A25 movs r5, #138 + 343 0010 AD00 lsls r5, r5, #2 + 344 0012 0123 movs r3, #1 + 345 0014 4355 strb r3, [r0, r5] + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_DISABLE(hpcd); + 346 .loc 1 979 0 is_stmt 1 discriminator 2 + 347 0016 0068 ldr r0, [r0] + 348 .LVL28: + 349 0018 FFF7FEFF bl USB_DisableGlobalInt + 350 .LVL29: + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_StopDevice(hpcd->Instance); + 351 .loc 1 981 0 discriminator 2 + 352 001c 2068 ldr r0, [r4] + 353 001e FFF7FEFF bl USB_StopDevice + 354 .LVL30: + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 355 .loc 1 983 0 discriminator 2 + 356 0022 0023 movs r3, #0 + 357 0024 6355 strb r3, [r4, r5] + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 25 + + + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; + 358 .loc 1 985 0 discriminator 2 + 359 0026 0020 movs r0, #0 + 360 .L20: + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 361 .loc 1 986 0 + 362 @ sp needed + 363 .LVL31: + 364 0028 70BD pop {r4, r5, r6, pc} + 365 .LVL32: + 366 .L21: + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_DISABLE(hpcd); + 367 .loc 1 978 0 + 368 002a 0220 movs r0, #2 + 369 .LVL33: + 370 002c FCE7 b .L20 + 371 .cfi_endproc + 372 .LFE45: + 374 .section .text.HAL_PCD_DeInit,"ax",%progbits + 375 .align 1 + 376 .global HAL_PCD_DeInit + 377 .syntax unified + 378 .code 16 + 379 .thumb_func + 380 .fpu softvfp + 382 HAL_PCD_DeInit: + 383 .LFB41: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Check the PCD handle allocation */ + 384 .loc 1 217 0 + 385 .cfi_startproc + 386 @ args = 0, pretend = 0, frame = 0 + 387 @ frame_needed = 0, uses_anonymous_args = 0 + 388 .LVL34: + 389 0000 70B5 push {r4, r5, r6, lr} + 390 .LCFI4: + 391 .cfi_def_cfa_offset 16 + 392 .cfi_offset 4, -16 + 393 .cfi_offset 5, -12 + 394 .cfi_offset 6, -8 + 395 .cfi_offset 14, -4 + 396 0002 041E subs r4, r0, #0 + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 397 .loc 1 219 0 + 398 0004 0BD0 beq .L24 + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 399 .loc 1 224 0 + 400 0006 074D ldr r5, .L25 + 401 0008 0323 movs r3, #3 + 402 000a 4355 strb r3, [r0, r5] + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 403 .loc 1 227 0 + 404 000c FFF7FEFF bl HAL_PCD_Stop + 405 .LVL35: + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 406 .loc 1 239 0 + 407 0010 2000 movs r0, r4 + 408 0012 FFF7FEFF bl HAL_PCD_MspDeInit + ARM GAS /tmp/ccYuHakw.s page 26 + + + 409 .LVL36: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 410 .loc 1 242 0 + 411 0016 0023 movs r3, #0 + 412 0018 6355 strb r3, [r4, r5] + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 413 .loc 1 244 0 + 414 001a 0020 movs r0, #0 + 415 .L23: + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 416 .loc 1 245 0 + 417 @ sp needed + 418 .LVL37: + 419 001c 70BD pop {r4, r5, r6, pc} + 420 .LVL38: + 421 .L24: + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 422 .loc 1 221 0 + 423 001e 0120 movs r0, #1 + 424 .LVL39: + 425 0020 FCE7 b .L23 + 426 .L26: + 427 0022 C046 .align 2 + 428 .L25: + 429 0024 29020000 .word 553 + 430 .cfi_endproc + 431 .LFE41: + 433 .section .text.HAL_PCD_DataOutStageCallback,"ax",%progbits + 434 .align 1 + 435 .weak HAL_PCD_DataOutStageCallback + 436 .syntax unified + 437 .code 16 + 438 .thumb_func + 439 .fpu softvfp + 441 HAL_PCD_DataOutStageCallback: + 442 .LFB47: + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief This function handles PCD interrupt request. + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd) + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR)) + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* servicing of the endpoint correct transfer interrupt */ + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* clear of the CTR flag into the sub */ +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)PCD_EP_ISR_Handler(hpcd); +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_RESET)) +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET); +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + ARM GAS /tmp/ccYuHakw.s page 27 + + +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ResetCallback(hpcd); +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_ResetCallback(hpcd); +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)HAL_PCD_SetAddress(hpcd, 0U); +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_PMAOVR)) +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR); +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ERR)) +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR); +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP)) +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LPMODE); +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->LPM_State == LPM_L1) +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->LPM_State = LPM_L0; +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->LPMCallback(hpcd, PCD_LPM_L0_ACTIVE); +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L0_ACTIVE); +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->ResumeCallback(hpcd); +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_ResumeCallback(hpcd); +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP); +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SUSP)) +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Force low-power mode in the macrocell */ +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Instance->CNTR |= USB_CNTR_FSUSP; +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP); +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Instance->CNTR |= USB_CNTR_LPMODE; +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_WKUP) == 0U) +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SuspendCallback(hpcd); +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else + ARM GAS /tmp/ccYuHakw.s page 28 + + +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_SuspendCallback(hpcd); +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Handle LPM Interrupt */ +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_L1REQ)) +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_L1REQ); +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->LPM_State == LPM_L0) +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Force suspend and low-power mode before going to L1 state*/ +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Instance->CNTR |= USB_CNTR_LPMODE; +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Instance->CNTR |= USB_CNTR_FSUSP; +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->LPM_State = LPM_L1; +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->BESL = ((uint32_t)hpcd->Instance->LPMCSR & USB_LPMCSR_BESL) >> 2; +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->LPMCallback(hpcd, PCD_LPM_L1_ACTIVE); +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCDEx_LPM_Callback(hpcd, PCD_LPM_L1_ACTIVE); +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SuspendCallback(hpcd); +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_SuspendCallback(hpcd); +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_SOF)) +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF); +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SOFCallback(hpcd); +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_SOFCallback(hpcd); +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_ESOF)) +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* clear ESOF flag in ISTR */ +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF); +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Data OUT stage callback. +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param epnum endpoint number +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None + ARM GAS /tmp/ccYuHakw.s page 29 + + +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 443 .loc 1 1124 0 + 444 .cfi_startproc + 445 @ args = 0, pretend = 0, frame = 0 + 446 @ frame_needed = 0, uses_anonymous_args = 0 + 447 @ link register save eliminated. + 448 .LVL40: +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(epnum); +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_DataOutStageCallback could be implemented in the user file +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 449 .loc 1 1132 0 + 450 @ sp needed + 451 0000 7047 bx lr + 452 .cfi_endproc + 453 .LFE47: + 455 .section .text.HAL_PCD_DataInStageCallback,"ax",%progbits + 456 .align 1 + 457 .weak HAL_PCD_DataInStageCallback + 458 .syntax unified + 459 .code 16 + 460 .thumb_func + 461 .fpu softvfp + 463 HAL_PCD_DataInStageCallback: + 464 .LFB48: +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Data IN stage callback +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param epnum endpoint number +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 465 .loc 1 1141 0 + 466 .cfi_startproc + 467 @ args = 0, pretend = 0, frame = 0 + 468 @ frame_needed = 0, uses_anonymous_args = 0 + 469 @ link register save eliminated. + 470 .LVL41: +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(epnum); +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_DataInStageCallback could be implemented in the user file +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 471 .loc 1 1149 0 + 472 @ sp needed + 473 0000 7047 bx lr + ARM GAS /tmp/ccYuHakw.s page 30 + + + 474 .cfi_endproc + 475 .LFE48: + 477 .section .text.HAL_PCD_SetupStageCallback,"ax",%progbits + 478 .align 1 + 479 .weak HAL_PCD_SetupStageCallback + 480 .syntax unified + 481 .code 16 + 482 .thumb_func + 483 .fpu softvfp + 485 HAL_PCD_SetupStageCallback: + 486 .LFB49: +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Setup stage callback +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 487 .loc 1 1156 0 + 488 .cfi_startproc + 489 @ args = 0, pretend = 0, frame = 0 + 490 @ frame_needed = 0, uses_anonymous_args = 0 + 491 @ link register save eliminated. + 492 .LVL42: +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_SetupStageCallback could be implemented in the user file +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 493 .loc 1 1163 0 + 494 @ sp needed + 495 0000 7047 bx lr + 496 .cfi_endproc + 497 .LFE49: + 499 .section .text.HAL_PCD_SOFCallback,"ax",%progbits + 500 .align 1 + 501 .weak HAL_PCD_SOFCallback + 502 .syntax unified + 503 .code 16 + 504 .thumb_func + 505 .fpu softvfp + 507 HAL_PCD_SOFCallback: + 508 .LFB50: +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief USB Start Of Frame callback. +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 509 .loc 1 1171 0 + 510 .cfi_startproc + 511 @ args = 0, pretend = 0, frame = 0 + 512 @ frame_needed = 0, uses_anonymous_args = 0 + ARM GAS /tmp/ccYuHakw.s page 31 + + + 513 @ link register save eliminated. + 514 .LVL43: +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_SOFCallback could be implemented in the user file +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 515 .loc 1 1178 0 + 516 @ sp needed + 517 0000 7047 bx lr + 518 .cfi_endproc + 519 .LFE50: + 521 .section .text.HAL_PCD_ResetCallback,"ax",%progbits + 522 .align 1 + 523 .weak HAL_PCD_ResetCallback + 524 .syntax unified + 525 .code 16 + 526 .thumb_func + 527 .fpu softvfp + 529 HAL_PCD_ResetCallback: + 530 .LFB51: +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief USB Reset callback. +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 531 .loc 1 1186 0 + 532 .cfi_startproc + 533 @ args = 0, pretend = 0, frame = 0 + 534 @ frame_needed = 0, uses_anonymous_args = 0 + 535 @ link register save eliminated. + 536 .LVL44: +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_ResetCallback could be implemented in the user file +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 537 .loc 1 1193 0 + 538 @ sp needed + 539 0000 7047 bx lr + 540 .cfi_endproc + 541 .LFE51: + 543 .section .text.HAL_PCD_SuspendCallback,"ax",%progbits + 544 .align 1 + 545 .weak HAL_PCD_SuspendCallback + 546 .syntax unified + 547 .code 16 + 548 .thumb_func + 549 .fpu softvfp + 551 HAL_PCD_SuspendCallback: + ARM GAS /tmp/ccYuHakw.s page 32 + + + 552 .LFB52: +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Suspend event callback. +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 553 .loc 1 1201 0 + 554 .cfi_startproc + 555 @ args = 0, pretend = 0, frame = 0 + 556 @ frame_needed = 0, uses_anonymous_args = 0 + 557 @ link register save eliminated. + 558 .LVL45: +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_SuspendCallback could be implemented in the user file +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 559 .loc 1 1208 0 + 560 @ sp needed + 561 0000 7047 bx lr + 562 .cfi_endproc + 563 .LFE52: + 565 .section .text.HAL_PCD_ResumeCallback,"ax",%progbits + 566 .align 1 + 567 .weak HAL_PCD_ResumeCallback + 568 .syntax unified + 569 .code 16 + 570 .thumb_func + 571 .fpu softvfp + 573 HAL_PCD_ResumeCallback: + 574 .LFB53: +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Resume event callback. +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 575 .loc 1 1216 0 + 576 .cfi_startproc + 577 @ args = 0, pretend = 0, frame = 0 + 578 @ frame_needed = 0, uses_anonymous_args = 0 + 579 @ link register save eliminated. + 580 .LVL46: +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_ResumeCallback could be implemented in the user file +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + ARM GAS /tmp/ccYuHakw.s page 33 + + + 581 .loc 1 1223 0 + 582 @ sp needed + 583 0000 7047 bx lr + 584 .cfi_endproc + 585 .LFE53: + 587 .section .text.HAL_PCD_ISOOUTIncompleteCallback,"ax",%progbits + 588 .align 1 + 589 .weak HAL_PCD_ISOOUTIncompleteCallback + 590 .syntax unified + 591 .code 16 + 592 .thumb_func + 593 .fpu softvfp + 595 HAL_PCD_ISOOUTIncompleteCallback: + 596 .LFB54: +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Incomplete ISO OUT callback. +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param epnum endpoint number +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 597 .loc 1 1232 0 + 598 .cfi_startproc + 599 @ args = 0, pretend = 0, frame = 0 + 600 @ frame_needed = 0, uses_anonymous_args = 0 + 601 @ link register save eliminated. + 602 .LVL47: +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(epnum); +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_ISOOUTIncompleteCallback could be implemented in the user file +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 603 .loc 1 1240 0 + 604 @ sp needed + 605 0000 7047 bx lr + 606 .cfi_endproc + 607 .LFE54: + 609 .section .text.HAL_PCD_ISOINIncompleteCallback,"ax",%progbits + 610 .align 1 + 611 .weak HAL_PCD_ISOINIncompleteCallback + 612 .syntax unified + 613 .code 16 + 614 .thumb_func + 615 .fpu softvfp + 617 HAL_PCD_ISOINIncompleteCallback: + 618 .LFB55: +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Incomplete ISO IN callback. +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param epnum endpoint number +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None + ARM GAS /tmp/ccYuHakw.s page 34 + + +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 619 .loc 1 1249 0 + 620 .cfi_startproc + 621 @ args = 0, pretend = 0, frame = 0 + 622 @ frame_needed = 0, uses_anonymous_args = 0 + 623 @ link register save eliminated. + 624 .LVL48: +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(epnum); +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_ISOINIncompleteCallback could be implemented in the user file +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 625 .loc 1 1257 0 + 626 @ sp needed + 627 0000 7047 bx lr + 628 .cfi_endproc + 629 .LFE55: + 631 .section .text.HAL_PCD_ConnectCallback,"ax",%progbits + 632 .align 1 + 633 .weak HAL_PCD_ConnectCallback + 634 .syntax unified + 635 .code 16 + 636 .thumb_func + 637 .fpu softvfp + 639 HAL_PCD_ConnectCallback: + 640 .LFB56: +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Connection event callback. +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 641 .loc 1 1265 0 + 642 .cfi_startproc + 643 @ args = 0, pretend = 0, frame = 0 + 644 @ frame_needed = 0, uses_anonymous_args = 0 + 645 @ link register save eliminated. + 646 .LVL49: +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_ConnectCallback could be implemented in the user file +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 647 .loc 1 1272 0 + 648 @ sp needed + 649 0000 7047 bx lr + 650 .cfi_endproc + 651 .LFE56: + ARM GAS /tmp/ccYuHakw.s page 35 + + + 653 .section .text.HAL_PCD_DisconnectCallback,"ax",%progbits + 654 .align 1 + 655 .weak HAL_PCD_DisconnectCallback + 656 .syntax unified + 657 .code 16 + 658 .thumb_func + 659 .fpu softvfp + 661 HAL_PCD_DisconnectCallback: + 662 .LFB57: +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Disconnection event callback. +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval None +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __weak void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 663 .loc 1 1280 0 + 664 .cfi_startproc + 665 @ args = 0, pretend = 0, frame = 0 + 666 @ frame_needed = 0, uses_anonymous_args = 0 + 667 @ link register save eliminated. + 668 .LVL50: +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* NOTE : This function should not be modified, when the callback is needed, +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** the HAL_PCD_DisconnectCallback could be implemented in the user file +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 669 .loc 1 1287 0 + 670 @ sp needed + 671 0000 7047 bx lr + 672 .cfi_endproc + 673 .LFE57: + 675 .section .text.HAL_PCD_DevConnect,"ax",%progbits + 676 .align 1 + 677 .global HAL_PCD_DevConnect + 678 .syntax unified + 679 .code 16 + 680 .thumb_func + 681 .fpu softvfp + 683 HAL_PCD_DevConnect: + 684 .LFB58: +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @} +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @defgroup PCD_Exported_Functions_Group3 Peripheral Control functions +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief management functions +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @verbatim +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** =============================================================================== +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ##### Peripheral Control functions ##### +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** =============================================================================== +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** [..] + ARM GAS /tmp/ccYuHakw.s page 36 + + +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** This subsection provides a set of functions allowing to control the PCD data +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** transfers. +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @endverbatim +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Connect the USB device +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd) +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 685 .loc 1 1314 0 + 686 .cfi_startproc + 687 @ args = 0, pretend = 0, frame = 0 + 688 @ frame_needed = 0, uses_anonymous_args = 0 + 689 .LVL51: + 690 0000 70B5 push {r4, r5, r6, lr} + 691 .LCFI5: + 692 .cfi_def_cfa_offset 16 + 693 .cfi_offset 4, -16 + 694 .cfi_offset 5, -12 + 695 .cfi_offset 6, -8 + 696 .cfi_offset 14, -4 + 697 0002 0400 movs r4, r0 +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 698 .loc 1 1315 0 + 699 0004 8A23 movs r3, #138 + 700 0006 9B00 lsls r3, r3, #2 + 701 0008 C35C ldrb r3, [r0, r3] + 702 000a 012B cmp r3, #1 + 703 000c 0AD0 beq .L40 + 704 .loc 1 1315 0 is_stmt 0 discriminator 2 + 705 000e 8A25 movs r5, #138 + 706 0010 AD00 lsls r5, r5, #2 + 707 0012 0123 movs r3, #1 + 708 0014 4355 strb r3, [r0, r5] +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_DevConnect(hpcd->Instance); + 709 .loc 1 1316 0 is_stmt 1 discriminator 2 + 710 0016 0068 ldr r0, [r0] + 711 .LVL52: + 712 0018 FFF7FEFF bl USB_DevConnect + 713 .LVL53: +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 714 .loc 1 1317 0 discriminator 2 + 715 001c 0023 movs r3, #0 + 716 001e 6355 strb r3, [r4, r5] +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; + 717 .loc 1 1318 0 discriminator 2 + 718 0020 0020 movs r0, #0 + 719 .L39: +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 720 .loc 1 1319 0 + 721 @ sp needed + 722 .LVL54: + ARM GAS /tmp/ccYuHakw.s page 37 + + + 723 0022 70BD pop {r4, r5, r6, pc} + 724 .LVL55: + 725 .L40: +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_DevConnect(hpcd->Instance); + 726 .loc 1 1315 0 + 727 0024 0220 movs r0, #2 + 728 .LVL56: + 729 0026 FCE7 b .L39 + 730 .cfi_endproc + 731 .LFE58: + 733 .section .text.HAL_PCD_DevDisconnect,"ax",%progbits + 734 .align 1 + 735 .global HAL_PCD_DevDisconnect + 736 .syntax unified + 737 .code 16 + 738 .thumb_func + 739 .fpu softvfp + 741 HAL_PCD_DevDisconnect: + 742 .LFB59: +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Disconnect the USB device. +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd) +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 743 .loc 1 1327 0 + 744 .cfi_startproc + 745 @ args = 0, pretend = 0, frame = 0 + 746 @ frame_needed = 0, uses_anonymous_args = 0 + 747 .LVL57: + 748 0000 70B5 push {r4, r5, r6, lr} + 749 .LCFI6: + 750 .cfi_def_cfa_offset 16 + 751 .cfi_offset 4, -16 + 752 .cfi_offset 5, -12 + 753 .cfi_offset 6, -8 + 754 .cfi_offset 14, -4 + 755 0002 0400 movs r4, r0 +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 756 .loc 1 1328 0 + 757 0004 8A23 movs r3, #138 + 758 0006 9B00 lsls r3, r3, #2 + 759 0008 C35C ldrb r3, [r0, r3] + 760 000a 012B cmp r3, #1 + 761 000c 0AD0 beq .L43 + 762 .loc 1 1328 0 is_stmt 0 discriminator 2 + 763 000e 8A25 movs r5, #138 + 764 0010 AD00 lsls r5, r5, #2 + 765 0012 0123 movs r3, #1 + 766 0014 4355 strb r3, [r0, r5] +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_DevDisconnect(hpcd->Instance); + 767 .loc 1 1329 0 is_stmt 1 discriminator 2 + 768 0016 0068 ldr r0, [r0] + 769 .LVL58: + 770 0018 FFF7FEFF bl USB_DevDisconnect + ARM GAS /tmp/ccYuHakw.s page 38 + + + 771 .LVL59: +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 772 .loc 1 1330 0 discriminator 2 + 773 001c 0023 movs r3, #0 + 774 001e 6355 strb r3, [r4, r5] +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; + 775 .loc 1 1331 0 discriminator 2 + 776 0020 0020 movs r0, #0 + 777 .L42: +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 778 .loc 1 1332 0 + 779 @ sp needed + 780 .LVL60: + 781 0022 70BD pop {r4, r5, r6, pc} + 782 .LVL61: + 783 .L43: +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_DevDisconnect(hpcd->Instance); + 784 .loc 1 1328 0 + 785 0024 0220 movs r0, #2 + 786 .LVL62: + 787 0026 FCE7 b .L42 + 788 .cfi_endproc + 789 .LFE59: + 791 .section .text.HAL_PCD_SetAddress,"ax",%progbits + 792 .align 1 + 793 .global HAL_PCD_SetAddress + 794 .syntax unified + 795 .code 16 + 796 .thumb_func + 797 .fpu softvfp + 799 HAL_PCD_SetAddress: + 800 .LFB60: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Set the USB Device address. +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param address new device address +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address) +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 801 .loc 1 1341 0 + 802 .cfi_startproc + 803 @ args = 0, pretend = 0, frame = 0 + 804 @ frame_needed = 0, uses_anonymous_args = 0 + 805 .LVL63: + 806 0000 70B5 push {r4, r5, r6, lr} + 807 .LCFI7: + 808 .cfi_def_cfa_offset 16 + 809 .cfi_offset 4, -16 + 810 .cfi_offset 5, -12 + 811 .cfi_offset 6, -8 + 812 .cfi_offset 14, -4 + 813 0002 0400 movs r4, r0 +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 814 .loc 1 1342 0 + 815 0004 8A23 movs r3, #138 + ARM GAS /tmp/ccYuHakw.s page 39 + + + 816 0006 9B00 lsls r3, r3, #2 + 817 0008 C35C ldrb r3, [r0, r3] + 818 000a 012B cmp r3, #1 + 819 000c 0CD0 beq .L46 + 820 .loc 1 1342 0 is_stmt 0 discriminator 2 + 821 000e 8A25 movs r5, #138 + 822 0010 AD00 lsls r5, r5, #2 + 823 0012 0123 movs r3, #1 + 824 0014 4355 strb r3, [r0, r5] +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->USB_Address = address; + 825 .loc 1 1343 0 is_stmt 1 discriminator 2 + 826 0016 2333 adds r3, r3, #35 + 827 0018 C154 strb r1, [r0, r3] +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_SetDevAddress(hpcd->Instance, address); + 828 .loc 1 1344 0 discriminator 2 + 829 001a 0068 ldr r0, [r0] + 830 .LVL64: + 831 001c FFF7FEFF bl USB_SetDevAddress + 832 .LVL65: +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 833 .loc 1 1345 0 discriminator 2 + 834 0020 0023 movs r3, #0 + 835 0022 6355 strb r3, [r4, r5] +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; + 836 .loc 1 1346 0 discriminator 2 + 837 0024 0020 movs r0, #0 + 838 .L45: +1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 839 .loc 1 1347 0 + 840 @ sp needed + 841 .LVL66: + 842 0026 70BD pop {r4, r5, r6, pc} + 843 .LVL67: + 844 .L46: +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->USB_Address = address; + 845 .loc 1 1342 0 + 846 0028 0220 movs r0, #2 + 847 .LVL68: + 848 002a FCE7 b .L45 + 849 .cfi_endproc + 850 .LFE60: + 852 .section .text.HAL_PCD_EP_Open,"ax",%progbits + 853 .align 1 + 854 .global HAL_PCD_EP_Open + 855 .syntax unified + 856 .code 16 + 857 .thumb_func + 858 .fpu softvfp + 860 HAL_PCD_EP_Open: + 861 .LFB61: +1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Open and configure an endpoint. +1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_addr endpoint address +1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_mps endpoint max packet size +1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_type endpoint type +1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status + ARM GAS /tmp/ccYuHakw.s page 40 + + +1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_ +1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 862 .loc 1 1357 0 + 863 .cfi_startproc + 864 @ args = 0, pretend = 0, frame = 0 + 865 @ frame_needed = 0, uses_anonymous_args = 0 + 866 .LVL69: + 867 0000 70B5 push {r4, r5, r6, lr} + 868 .LCFI8: + 869 .cfi_def_cfa_offset 16 + 870 .cfi_offset 4, -16 + 871 .cfi_offset 5, -12 + 872 .cfi_offset 6, -8 + 873 .cfi_offset 14, -4 + 874 0002 0500 movs r5, r0 + 875 .LVL70: +1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef ret = HAL_OK; +1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_EPTypeDef *ep; +1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((ep_addr & 0x80U) == 0x80U) + 876 .loc 1 1361 0 + 877 0004 48B2 sxtb r0, r1 + 878 .LVL71: + 879 0006 0028 cmp r0, #0 + 880 0008 27DB blt .L54 +1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 1U; +1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; + 881 .loc 1 1368 0 + 882 000a 0724 movs r4, #7 + 883 000c 0C40 ands r4, r1 + 884 000e 6401 lsls r4, r4, #5 + 885 0010 2000 movs r0, r4 + 886 0012 2930 adds r0, r0, #41 + 887 0014 FF30 adds r0, r0, #255 + 888 0016 2818 adds r0, r5, r0 + 889 .LVL72: +1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 0U; + 890 .loc 1 1369 0 + 891 0018 2C19 adds r4, r5, r4 + 892 001a 2A34 adds r4, r4, #42 + 893 001c FF34 adds r4, r4, #255 + 894 001e 0026 movs r6, #0 + 895 0020 2670 strb r6, [r4] + 896 .L49: +1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->num = ep_addr & EP_ADDR_MSK; + 897 .loc 1 1372 0 + 898 0022 0724 movs r4, #7 + 899 0024 2140 ands r1, r4 + 900 .LVL73: + ARM GAS /tmp/ccYuHakw.s page 41 + + + 901 0026 0170 strb r1, [r0] +1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->maxpacket = ep_mps; + 902 .loc 1 1373 0 + 903 0028 0261 str r2, [r0, #16] +1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->type = ep_type; + 904 .loc 1 1374 0 + 905 002a C370 strb r3, [r0, #3] +1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (ep->is_in != 0U) + 906 .loc 1 1376 0 + 907 002c 4278 ldrb r2, [r0, #1] + 908 .LVL74: + 909 002e 002A cmp r2, #0 + 910 0030 00D0 beq .L50 +1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Assign a Tx FIFO */ +1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->tx_fifo_num = ep->num; + 911 .loc 1 1379 0 + 912 0032 C181 strh r1, [r0, #14] + 913 .L50: +1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Set initial data PID. */ +1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (ep_type == EP_TYPE_BULK) + 914 .loc 1 1382 0 + 915 0034 022B cmp r3, #2 + 916 0036 1BD0 beq .L55 + 917 .LVL75: + 918 .L51: +1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->data_pid_start = 0U; +1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 919 .loc 1 1387 0 + 920 0038 8A23 movs r3, #138 + 921 003a 9B00 lsls r3, r3, #2 + 922 003c EB5C ldrb r3, [r5, r3] + 923 003e 012B cmp r3, #1 + 924 0040 19D0 beq .L53 + 925 .loc 1 1387 0 is_stmt 0 discriminator 2 + 926 0042 8A24 movs r4, #138 + 927 0044 A400 lsls r4, r4, #2 + 928 0046 0123 movs r3, #1 + 929 0048 2B55 strb r3, [r5, r4] + 930 .LVL76: +1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_ActivateEndpoint(hpcd->Instance, ep); + 931 .loc 1 1388 0 is_stmt 1 discriminator 2 + 932 004a 0100 movs r1, r0 + 933 004c 2868 ldr r0, [r5] + 934 .LVL77: + 935 004e FFF7FEFF bl USB_ActivateEndpoint + 936 .LVL78: +1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 937 .loc 1 1389 0 discriminator 2 + 938 0052 0023 movs r3, #0 + 939 0054 2B55 strb r3, [r5, r4] +1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 42 + + +1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return ret; + 940 .loc 1 1391 0 discriminator 2 + 941 0056 0020 movs r0, #0 + 942 .L52: +1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 943 .loc 1 1392 0 + 944 @ sp needed + 945 .LVL79: + 946 0058 70BD pop {r4, r5, r6, pc} + 947 .LVL80: + 948 .L54: +1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 1U; + 949 .loc 1 1363 0 + 950 005a 0724 movs r4, #7 + 951 005c 0C40 ands r4, r1 + 952 005e 6401 lsls r4, r4, #5 + 953 0060 2000 movs r0, r4 + 954 0062 2830 adds r0, r0, #40 + 955 0064 2818 adds r0, r5, r0 + 956 .LVL81: +1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 957 .loc 1 1364 0 + 958 0066 2C19 adds r4, r5, r4 + 959 0068 2934 adds r4, r4, #41 + 960 006a 0126 movs r6, #1 + 961 006c 2670 strb r6, [r4] + 962 006e D8E7 b .L49 + 963 .LVL82: + 964 .L55: +1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 965 .loc 1 1384 0 + 966 0070 0023 movs r3, #0 + 967 .LVL83: + 968 0072 0371 strb r3, [r0, #4] + 969 0074 E0E7 b .L51 + 970 .L53: +1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_ActivateEndpoint(hpcd->Instance, ep); + 971 .loc 1 1387 0 + 972 0076 0220 movs r0, #2 + 973 .LVL84: + 974 0078 EEE7 b .L52 + 975 .cfi_endproc + 976 .LFE61: + 978 .section .text.HAL_PCD_EP_Close,"ax",%progbits + 979 .align 1 + 980 .global HAL_PCD_EP_Close + 981 .syntax unified + 982 .code 16 + 983 .thumb_func + 984 .fpu softvfp + 986 HAL_PCD_EP_Close: + 987 .LFB62: +1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Deactivate an endpoint. +1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_addr endpoint address + ARM GAS /tmp/ccYuHakw.s page 43 + + +1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 988 .loc 1 1401 0 + 989 .cfi_startproc + 990 @ args = 0, pretend = 0, frame = 0 + 991 @ frame_needed = 0, uses_anonymous_args = 0 + 992 .LVL85: + 993 0000 70B5 push {r4, r5, r6, lr} + 994 .LCFI9: + 995 .cfi_def_cfa_offset 16 + 996 .cfi_offset 4, -16 + 997 .cfi_offset 5, -12 + 998 .cfi_offset 6, -8 + 999 .cfi_offset 14, -4 + 1000 0002 0400 movs r4, r0 +1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_EPTypeDef *ep; +1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((ep_addr & 0x80U) == 0x80U) + 1001 .loc 1 1404 0 + 1002 0004 4BB2 sxtb r3, r1 + 1003 0006 002B cmp r3, #0 + 1004 0008 1FDB blt .L61 +1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 1U; +1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; + 1005 .loc 1 1411 0 + 1006 000a 0723 movs r3, #7 + 1007 000c 0B40 ands r3, r1 + 1008 000e 5B01 lsls r3, r3, #5 + 1009 0010 1A00 movs r2, r3 + 1010 0012 2932 adds r2, r2, #41 + 1011 0014 FF32 adds r2, r2, #255 + 1012 0016 8218 adds r2, r0, r2 + 1013 .LVL86: +1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 0U; + 1014 .loc 1 1412 0 + 1015 0018 C318 adds r3, r0, r3 + 1016 001a 2A33 adds r3, r3, #42 + 1017 001c FF33 adds r3, r3, #255 + 1018 001e 0020 movs r0, #0 + 1019 .LVL87: + 1020 0020 1870 strb r0, [r3] + 1021 .L58: +1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->num = ep_addr & EP_ADDR_MSK; + 1022 .loc 1 1414 0 + 1023 0022 0723 movs r3, #7 + 1024 0024 1940 ands r1, r3 + 1025 .LVL88: + 1026 0026 1170 strb r1, [r2] +1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 44 + + +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); + 1027 .loc 1 1416 0 + 1028 0028 8A23 movs r3, #138 + 1029 002a 9B00 lsls r3, r3, #2 + 1030 002c E35C ldrb r3, [r4, r3] + 1031 002e 012B cmp r3, #1 + 1032 0030 16D0 beq .L60 + 1033 .loc 1 1416 0 is_stmt 0 discriminator 2 + 1034 0032 8A25 movs r5, #138 + 1035 0034 AD00 lsls r5, r5, #2 + 1036 0036 0123 movs r3, #1 + 1037 0038 6355 strb r3, [r4, r5] +1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_DeactivateEndpoint(hpcd->Instance, ep); + 1038 .loc 1 1417 0 is_stmt 1 discriminator 2 + 1039 003a 1100 movs r1, r2 + 1040 003c 2068 ldr r0, [r4] + 1041 003e FFF7FEFF bl USB_DeactivateEndpoint + 1042 .LVL89: +1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 1043 .loc 1 1418 0 discriminator 2 + 1044 0042 0023 movs r3, #0 + 1045 0044 6355 strb r3, [r4, r5] +1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; + 1046 .loc 1 1419 0 discriminator 2 + 1047 0046 0020 movs r0, #0 + 1048 .L59: +1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1049 .loc 1 1420 0 + 1050 @ sp needed + 1051 .LVL90: + 1052 0048 70BD pop {r4, r5, r6, pc} + 1053 .LVL91: + 1054 .L61: +1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 1U; + 1055 .loc 1 1406 0 + 1056 004a 0723 movs r3, #7 + 1057 004c 0B40 ands r3, r1 + 1058 004e 5B01 lsls r3, r3, #5 + 1059 0050 1A00 movs r2, r3 + 1060 0052 2832 adds r2, r2, #40 + 1061 0054 8218 adds r2, r0, r2 + 1062 .LVL92: +1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1063 .loc 1 1407 0 + 1064 0056 C318 adds r3, r0, r3 + 1065 0058 2933 adds r3, r3, #41 + 1066 005a 0120 movs r0, #1 + 1067 .LVL93: + 1068 005c 1870 strb r0, [r3] + 1069 005e E0E7 b .L58 + 1070 .LVL94: + 1071 .L60: +1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_DeactivateEndpoint(hpcd->Instance, ep); + 1072 .loc 1 1416 0 + 1073 0060 0220 movs r0, #2 + 1074 0062 F1E7 b .L59 + 1075 .cfi_endproc + ARM GAS /tmp/ccYuHakw.s page 45 + + + 1076 .LFE62: + 1078 .section .text.HAL_PCD_EP_Receive,"ax",%progbits + 1079 .align 1 + 1080 .global HAL_PCD_EP_Receive + 1081 .syntax unified + 1082 .code 16 + 1083 .thumb_func + 1084 .fpu softvfp + 1086 HAL_PCD_EP_Receive: + 1087 .LFB63: +1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Receive an amount of data. +1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_addr endpoint address +1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param pBuf pointer to the reception buffer +1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param len amount of data to be received +1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint3 +1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1088 .loc 1 1432 0 + 1089 .cfi_startproc + 1090 @ args = 0, pretend = 0, frame = 0 + 1091 @ frame_needed = 0, uses_anonymous_args = 0 + 1092 .LVL95: + 1093 0000 70B5 push {r4, r5, r6, lr} + 1094 .LCFI10: + 1095 .cfi_def_cfa_offset 16 + 1096 .cfi_offset 4, -16 + 1097 .cfi_offset 5, -12 + 1098 .cfi_offset 6, -8 + 1099 .cfi_offset 14, -4 + 1100 0002 0725 movs r5, #7 + 1101 0004 0D40 ands r5, r1 +1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_EPTypeDef *ep; +1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; + 1102 .loc 1 1435 0 + 1103 0006 6C01 lsls r4, r5, #5 + 1104 0008 2100 movs r1, r4 + 1105 .LVL96: + 1106 000a 2931 adds r1, r1, #41 + 1107 000c FF31 adds r1, r1, #255 + 1108 000e 4118 adds r1, r0, r1 + 1109 .LVL97: +1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /*setup and start the Xfer */ +1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_buff = pBuf; + 1110 .loc 1 1438 0 + 1111 0010 0419 adds r4, r0, r4 + 1112 0012 2600 movs r6, r4 + 1113 0014 3D36 adds r6, r6, #61 + 1114 0016 FF36 adds r6, r6, #255 + 1115 0018 3260 str r2, [r6] +1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_len = len; + ARM GAS /tmp/ccYuHakw.s page 46 + + + 1116 .loc 1 1439 0 + 1117 001a 2A00 movs r2, r5 + 1118 .LVL98: + 1119 001c 0A32 adds r2, r2, #10 + 1120 001e 5201 lsls r2, r2, #5 + 1121 0020 1350 str r3, [r2, r0] + 1122 .LVL99: +1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_count = 0U; + 1123 .loc 1 1440 0 + 1124 0022 8218 adds r2, r0, r2 + 1125 0024 0023 movs r3, #0 + 1126 .LVL100: + 1127 0026 5360 str r3, [r2, #4] +1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 0U; + 1128 .loc 1 1441 0 + 1129 0028 2200 movs r2, r4 + 1130 .LVL101: + 1131 002a 2A32 adds r2, r2, #42 + 1132 002c FF32 adds r2, r2, #255 + 1133 002e 1370 strb r3, [r2] + 1134 .LVL102: +1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->num = ep_addr & EP_ADDR_MSK; + 1135 .loc 1 1442 0 + 1136 0030 2934 adds r4, r4, #41 + 1137 0032 FF34 adds r4, r4, #255 + 1138 0034 2570 strb r5, [r4] +1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((ep_addr & EP_ADDR_MSK) == 0U) + 1139 .loc 1 1444 0 + 1140 0036 002D cmp r5, #0 + 1141 0038 04D0 beq .L65 +1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EP0StartXfer(hpcd->Instance, ep); +1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EPStartXfer(hpcd->Instance, ep); + 1142 .loc 1 1450 0 + 1143 003a 0068 ldr r0, [r0] + 1144 .LVL103: + 1145 003c FFF7FEFF bl USB_EPStartXfer + 1146 .LVL104: + 1147 .L64: +1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; +1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1148 .loc 1 1454 0 + 1149 0040 0020 movs r0, #0 + 1150 @ sp needed + 1151 .LVL105: + 1152 0042 70BD pop {r4, r5, r6, pc} + 1153 .LVL106: + 1154 .L65: +1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1155 .loc 1 1446 0 + 1156 0044 0068 ldr r0, [r0] + ARM GAS /tmp/ccYuHakw.s page 47 + + + 1157 .LVL107: + 1158 0046 FFF7FEFF bl USB_EPStartXfer + 1159 .LVL108: + 1160 004a F9E7 b .L64 + 1161 .cfi_endproc + 1162 .LFE63: + 1164 .section .text.HAL_PCD_EP_GetRxCount,"ax",%progbits + 1165 .align 1 + 1166 .global HAL_PCD_EP_GetRxCount + 1167 .syntax unified + 1168 .code 16 + 1169 .thumb_func + 1170 .fpu softvfp + 1172 HAL_PCD_EP_GetRxCount: + 1173 .LFB64: +1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Get Received Data Size +1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_addr endpoint address +1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval Data Size +1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1174 .loc 1 1463 0 + 1175 .cfi_startproc + 1176 @ args = 0, pretend = 0, frame = 0 + 1177 @ frame_needed = 0, uses_anonymous_args = 0 + 1178 @ link register save eliminated. + 1179 .LVL109: + 1180 0000 0B00 movs r3, r1 +1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count; + 1181 .loc 1 1464 0 + 1182 0002 0721 movs r1, #7 + 1183 .LVL110: + 1184 0004 1940 ands r1, r3 + 1185 0006 0A31 adds r1, r1, #10 + 1186 0008 4901 lsls r1, r1, #5 + 1187 000a 4018 adds r0, r0, r1 + 1188 .LVL111: + 1189 000c 4068 ldr r0, [r0, #4] +1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1190 .loc 1 1465 0 + 1191 @ sp needed + 1192 000e 7047 bx lr + 1193 .cfi_endproc + 1194 .LFE64: + 1196 .section .text.HAL_PCD_EP_Transmit,"ax",%progbits + 1197 .align 1 + 1198 .global HAL_PCD_EP_Transmit + 1199 .syntax unified + 1200 .code 16 + 1201 .thumb_func + 1202 .fpu softvfp + 1204 HAL_PCD_EP_Transmit: + 1205 .LFB65: +1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** + ARM GAS /tmp/ccYuHakw.s page 48 + + +1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Send an amount of data +1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_addr endpoint address +1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param pBuf pointer to the transmission buffer +1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param len amount of data to be sent +1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint +1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1206 .loc 1 1475 0 + 1207 .cfi_startproc + 1208 @ args = 0, pretend = 0, frame = 0 + 1209 @ frame_needed = 0, uses_anonymous_args = 0 + 1210 .LVL112: + 1211 0000 70B5 push {r4, r5, r6, lr} + 1212 .LCFI11: + 1213 .cfi_def_cfa_offset 16 + 1214 .cfi_offset 4, -16 + 1215 .cfi_offset 5, -12 + 1216 .cfi_offset 6, -8 + 1217 .cfi_offset 14, -4 + 1218 0002 0725 movs r5, #7 + 1219 0004 0D40 ands r5, r1 +1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_EPTypeDef *ep; +1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; + 1220 .loc 1 1478 0 + 1221 0006 6C01 lsls r4, r5, #5 + 1222 0008 2100 movs r1, r4 + 1223 .LVL113: + 1224 000a 2831 adds r1, r1, #40 + 1225 000c 4118 adds r1, r0, r1 + 1226 .LVL114: +1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /*setup and start the Xfer */ +1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_buff = pBuf; + 1227 .loc 1 1481 0 + 1228 000e 0419 adds r4, r0, r4 + 1229 0010 E263 str r2, [r4, #60] +1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_len = len; + 1230 .loc 1 1482 0 + 1231 0012 AA1C adds r2, r5, #2 + 1232 .LVL115: + 1233 0014 5201 lsls r2, r2, #5 + 1234 0016 1350 str r3, [r2, r0] + 1235 .LVL116: +1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_count = 0U; + 1236 .loc 1 1483 0 + 1237 0018 8218 adds r2, r0, r2 + 1238 001a 0023 movs r3, #0 + 1239 .LVL117: + 1240 001c 5360 str r3, [r2, #4] +1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 1U; + 1241 .loc 1 1484 0 + 1242 001e 2300 movs r3, r4 + 1243 0020 2933 adds r3, r3, #41 + 1244 0022 0122 movs r2, #1 + ARM GAS /tmp/ccYuHakw.s page 49 + + + 1245 .LVL118: + 1246 0024 1A70 strb r2, [r3] + 1247 .LVL119: +1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->num = ep_addr & EP_ADDR_MSK; + 1248 .loc 1 1485 0 + 1249 0026 2834 adds r4, r4, #40 + 1250 0028 2570 strb r5, [r4] +1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((ep_addr & EP_ADDR_MSK) == 0U) + 1251 .loc 1 1487 0 + 1252 002a 002D cmp r5, #0 + 1253 002c 04D0 beq .L70 +1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EP0StartXfer(hpcd->Instance, ep); +1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EPStartXfer(hpcd->Instance, ep); + 1254 .loc 1 1493 0 + 1255 002e 0068 ldr r0, [r0] + 1256 .LVL120: + 1257 0030 FFF7FEFF bl USB_EPStartXfer + 1258 .LVL121: + 1259 .L69: +1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; +1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1260 .loc 1 1497 0 + 1261 0034 0020 movs r0, #0 + 1262 @ sp needed + 1263 .LVL122: + 1264 0036 70BD pop {r4, r5, r6, pc} + 1265 .LVL123: + 1266 .L70: +1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1267 .loc 1 1489 0 + 1268 0038 0068 ldr r0, [r0] + 1269 .LVL124: + 1270 003a FFF7FEFF bl USB_EPStartXfer + 1271 .LVL125: + 1272 003e F9E7 b .L69 + 1273 .cfi_endproc + 1274 .LFE65: + 1276 .section .text.PCD_EP_ISR_Handler,"ax",%progbits + 1277 .align 1 + 1278 .syntax unified + 1279 .code 16 + 1280 .thumb_func + 1281 .fpu softvfp + 1283 PCD_EP_ISR_Handler: + 1284 .LFB72: +1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Set a STALL condition over an endpoint +1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_addr endpoint address + ARM GAS /tmp/ccYuHakw.s page 50 + + +1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_EPTypeDef *ep; +1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints) +1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; +1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((0x80U & ep_addr) == 0x80U) +1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 1U; +1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->OUT_ep[ep_addr]; +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 0U; +1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_stall = 1U; +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->num = ep_addr & EP_ADDR_MSK; +1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); +1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EPSetStall(hpcd->Instance, ep); +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((ep_addr & EP_ADDR_MSK) == 0U) +1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup); +1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); +1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Clear a STALL condition over in an endpoint +1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_addr endpoint address +1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_EPTypeDef *ep; +1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints) +1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_ERROR; +1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((0x80U & ep_addr) == 0x80U) +1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 1U; +1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + ARM GAS /tmp/ccYuHakw.s page 51 + + +1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK]; +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 0U; +1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_stall = 0U; +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->num = ep_addr & EP_ADDR_MSK; +1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_LOCK(hpcd); +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EPClearStall(hpcd->Instance, ep); +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); +1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Flush an endpoint +1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param ep_addr endpoint address +1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr) +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ +1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(hpcd); +1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** UNUSED(ep_addr); +1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Activate remote wakeup signalling +1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return (USB_ActivateRemoteWakeup(hpcd->Instance)); +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief De-activate remote wakeup signalling. +1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd) +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return (USB_DeActivateRemoteWakeup(hpcd->Instance)); +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @} +1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @defgroup PCD_Exported_Functions_Group4 Peripheral State functions +1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Peripheral State functions + ARM GAS /tmp/ccYuHakw.s page 52 + + +1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * +1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @verbatim +1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** =============================================================================== +1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ##### Peripheral State functions ##### +1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** =============================================================================== +1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** [..] +1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** This subsection permits to get in run-time the status of the peripheral +1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** and the data flow. +1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** @endverbatim +1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ +1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief Return the PCD handle state. +1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL state +1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd) +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return hpcd->State; +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @} +1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @} +1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Private functions ---------------------------------------------------------*/ +1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** @addtogroup PCD_Private_Functions +1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @{ +1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /** +1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @brief This function handles PCD Endpoint interrupt request. +1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @param hpcd PCD handle +1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** * @retval HAL status +1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** */ +1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd) +1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1285 .loc 1 1660 0 + 1286 .cfi_startproc + 1287 @ args = 0, pretend = 0, frame = 0 + 1288 @ frame_needed = 0, uses_anonymous_args = 0 + 1289 .LVL126: + 1290 0000 F0B5 push {r4, r5, r6, r7, lr} + 1291 .LCFI12: + 1292 .cfi_def_cfa_offset 20 + 1293 .cfi_offset 4, -20 + 1294 .cfi_offset 5, -16 + 1295 .cfi_offset 6, -12 + 1296 .cfi_offset 7, -8 + 1297 .cfi_offset 14, -4 + ARM GAS /tmp/ccYuHakw.s page 53 + + + 1298 0002 C646 mov lr, r8 + 1299 0004 00B5 push {lr} + 1300 .LCFI13: + 1301 .cfi_def_cfa_offset 24 + 1302 .cfi_offset 8, -24 + 1303 0006 0500 movs r5, r0 + 1304 .LVL127: + 1305 .L72: +1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_EPTypeDef *ep; +1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** uint16_t count; +1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** uint16_t wIstr; +1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** uint16_t wEPVal; +1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** uint8_t epindex; +1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* stay in loop while pending interrupts */ +1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U) + 1306 .loc 1 1668 0 + 1307 0008 2868 ldr r0, [r5] + 1308 000a 4423 movs r3, #68 + 1309 000c C35A ldrh r3, [r0, r3] + 1310 000e 1BB2 sxth r3, r3 + 1311 0010 002B cmp r3, #0 + 1312 0012 00DB blt .LCB1072 + 1313 0014 AAE1 b .L92 @long jump + 1314 .LCB1072: +1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** wIstr = hpcd->Instance->ISTR; + 1315 .loc 1 1670 0 + 1316 0016 4423 movs r3, #68 + 1317 0018 C35A ldrh r3, [r0, r3] + 1318 001a 9BB2 uxth r3, r3 + 1319 .LVL128: +1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* extract highest priority endpoint number */ +1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID); + 1320 .loc 1 1672 0 + 1321 001c 0F24 movs r4, #15 + 1322 001e 1C40 ands r4, r3 + 1323 .LVL129: +1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (epindex == 0U) + 1324 .loc 1 1674 0 + 1325 0020 00D0 beq .LCB1083 + 1326 0022 BCE0 b .L73 @long jump + 1327 .LCB1083: +1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Decode and service control endpoint interrupt */ +1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* DIR bit = origin of the interrupt */ +1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((wIstr & USB_ISTR_DIR) == 0U) + 1328 .loc 1 1679 0 + 1329 0024 DB06 lsls r3, r3, #27 + 1330 0026 51D5 bpl .L93 + 1331 .LVL130: +1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* DIR = 0 */ +1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* DIR = 0 => IN int */ + ARM GAS /tmp/ccYuHakw.s page 54 + + +1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* DIR = 0 implies that (EP_CTR_TX = 1) always */ +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0); +1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->IN_ep[0]; +1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_buff += ep->xfer_count; +1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* TX COMPLETE */ +1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataInStageCallback(hpcd, 0U); +1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_DataInStageCallback(hpcd, 0U); +1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U)) +1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF); +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->USB_Address = 0U; +1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* DIR = 1 */ +1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* DIR = 1 & CTR_RX => SETUP or OUT int */ +1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */ +1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->OUT_ep[0]; +1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0); + 1332 .loc 1 1711 0 + 1333 0028 0388 ldrh r3, [r0] + 1334 002a 9BB2 uxth r3, r3 + 1335 .LVL131: +1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((wEPVal & USB_EP_SETUP) != 0U) + 1336 .loc 1 1713 0 + 1337 002c 1A05 lsls r2, r3, #20 + 1338 002e 00D5 bpl .LCB1098 + 1339 0030 7FE0 b .L94 @long jump + 1340 .LCB1098: +1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Get SETUP Packet*/ +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); +1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup, +1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->pmaadress, (uint16_t)ep->xfer_count); +1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* SETUP bit kept frozen while CTR_RX = 1*/ +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); +1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process SETUP Packet*/ +1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->SetupStageCallback(hpcd); +1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_SetupStageCallback(hpcd); +1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 55 + + +1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else if ((wEPVal & USB_EP_CTR_RX) != 0U) + 1341 .loc 1 1732 0 + 1342 0032 1BB2 sxth r3, r3 + 1343 0034 002B cmp r3, #0 + 1344 0036 E7DA bge .L72 + 1345 .LBB2: +1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0); + 1346 .loc 1 1734 0 + 1347 0038 0388 ldrh r3, [r0] + 1348 .LVL132: + 1349 003a CE4A ldr r2, .L97 + 1350 003c 1340 ands r3, r2 + 1351 .LVL133: + 1352 003e 8022 movs r2, #128 + 1353 0040 1343 orrs r3, r2 + 1354 .LVL134: + 1355 0042 0380 strh r3, [r0] + 1356 .LBE2: +1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Get Control Data OUT Packet*/ +1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); + 1357 .loc 1 1737 0 + 1358 0044 2868 ldr r0, [r5] + 1359 0046 5023 movs r3, #80 + 1360 0048 C35A ldrh r3, [r0, r3] + 1361 004a 9422 movs r2, #148 + 1362 004c 5200 lsls r2, r2, #1 + 1363 004e AA5C ldrb r2, [r5, r2] + 1364 0050 D200 lsls r2, r2, #3 + 1365 0052 9B18 adds r3, r3, r2 + 1366 0054 1B18 adds r3, r3, r0 + 1367 0056 C84A ldr r2, .L97+4 + 1368 0058 9446 mov ip, r2 + 1369 005a 6344 add r3, r3, ip + 1370 005c 1B88 ldrh r3, [r3] + 1371 005e 9B05 lsls r3, r3, #22 + 1372 0060 9B0D lsrs r3, r3, #22 + 1373 0062 2A00 movs r2, r5 + 1374 0064 2932 adds r2, r2, #41 + 1375 0066 FF32 adds r2, r2, #255 + 1376 0068 D361 str r3, [r2, #28] +1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U)) + 1377 .loc 1 1739 0 + 1378 006a 002B cmp r3, #0 + 1379 006c 0FD0 beq .L77 + 1380 .loc 1 1739 0 is_stmt 0 discriminator 1 + 1381 006e 5169 ldr r1, [r2, #20] + 1382 0070 0029 cmp r1, #0 + 1383 0072 0CD0 beq .L77 +1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** USB_ReadPMA(hpcd->Instance, ep->xfer_buff, + 1384 .loc 1 1741 0 is_stmt 1 + 1385 0074 1400 movs r4, r2 + 1386 .LVL135: + 1387 0076 D288 ldrh r2, [r2, #6] + ARM GAS /tmp/ccYuHakw.s page 56 + + + 1388 0078 FFF7FEFF bl USB_ReadPMA + 1389 .LVL136: +1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->pmaadress, (uint16_t)ep->xfer_count); +1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_buff += ep->xfer_count; + 1390 .loc 1 1744 0 + 1391 007c 6369 ldr r3, [r4, #20] + 1392 007e E269 ldr r2, [r4, #28] + 1393 0080 9446 mov ip, r2 + 1394 0082 6344 add r3, r3, ip + 1395 0084 6361 str r3, [r4, #20] +1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Process Control Data OUT Packet*/ +1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataOutStageCallback(hpcd, 0U); +1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_DataOutStageCallback(hpcd, 0U); + 1396 .loc 1 1750 0 + 1397 0086 0021 movs r1, #0 + 1398 0088 2800 movs r0, r5 + 1399 008a FFF7FEFF bl HAL_PCD_DataOutStageCallback + 1400 .LVL137: + 1401 .L77: + 1402 .LBB3: +1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket); + 1403 .loc 1 1754 0 + 1404 008e 2B68 ldr r3, [r5] + 1405 .LVL138: + 1406 0090 5022 movs r2, #80 + 1407 0092 9A5A ldrh r2, [r3, r2] + 1408 0094 9B18 adds r3, r3, r2 + 1409 .LVL139: + 1410 0096 B84A ldr r2, .L97+4 + 1411 0098 9446 mov ip, r2 + 1412 009a 6344 add r3, r3, ip + 1413 .LVL140: + 1414 .LBB4: + 1415 009c 2A00 movs r2, r5 + 1416 009e 2932 adds r2, r2, #41 + 1417 00a0 FF32 adds r2, r2, #255 + 1418 00a2 1269 ldr r2, [r2, #16] + 1419 00a4 002A cmp r2, #0 + 1420 00a6 67D1 bne .L78 + 1421 .loc 1 1754 0 is_stmt 0 discriminator 1 + 1422 00a8 1A88 ldrh r2, [r3] + 1423 00aa B449 ldr r1, .L97+8 + 1424 00ac 1140 ands r1, r2 + 1425 00ae B44A ldr r2, .L97+12 + 1426 00b0 0A43 orrs r2, r1 + 1427 00b2 1A80 strh r2, [r3] + 1428 .L79: + 1429 .LBE4: + 1430 .LBE3: + 1431 .LBB6: + ARM GAS /tmp/ccYuHakw.s page 57 + + +1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + 1432 .loc 1 1755 0 is_stmt 1 + 1433 00b4 2968 ldr r1, [r5] + 1434 00b6 0A88 ldrh r2, [r1] + 1435 00b8 B24B ldr r3, .L97+16 + 1436 .LVL141: + 1437 00ba 1A40 ands r2, r3 + 1438 .LVL142: + 1439 00bc C023 movs r3, #192 + 1440 00be 9B01 lsls r3, r3, #6 + 1441 00c0 5A40 eors r2, r3 + 1442 .LVL143: + 1443 00c2 B14B ldr r3, .L97+20 + 1444 00c4 1343 orrs r3, r2 + 1445 00c6 9BB2 uxth r3, r3 + 1446 00c8 0B80 strh r3, [r1] + 1447 00ca 9DE7 b .L72 + 1448 .LVL144: + 1449 .L93: + 1450 .LBE6: + 1451 .LBB7: +1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->IN_ep[0]; + 1452 .loc 1 1685 0 + 1453 00cc 0388 ldrh r3, [r0] + 1454 00ce AF4A ldr r2, .L97+24 + 1455 00d0 1A40 ands r2, r3 + 1456 .LVL145: + 1457 00d2 AB4B ldr r3, .L97+12 + 1458 00d4 1343 orrs r3, r2 + 1459 00d6 9BB2 uxth r3, r3 + 1460 00d8 0380 strh r3, [r0] + 1461 .LVL146: + 1462 .LBE7: +1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_buff += ep->xfer_count; + 1463 .loc 1 1688 0 + 1464 00da 2968 ldr r1, [r5] + 1465 00dc 5023 movs r3, #80 + 1466 00de CB5A ldrh r3, [r1, r3] + 1467 00e0 2822 movs r2, #40 + 1468 .LVL147: + 1469 00e2 AA5C ldrb r2, [r5, r2] + 1470 00e4 D200 lsls r2, r2, #3 + 1471 00e6 9B18 adds r3, r3, r2 + 1472 00e8 5B18 adds r3, r3, r1 + 1473 00ea A94A ldr r2, .L97+28 + 1474 00ec 9446 mov ip, r2 + 1475 00ee 6344 add r3, r3, ip + 1476 00f0 1B88 ldrh r3, [r3] + 1477 00f2 9B05 lsls r3, r3, #22 + 1478 00f4 9B0D lsrs r3, r3, #22 + 1479 00f6 6B64 str r3, [r5, #68] +1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 1480 .loc 1 1689 0 + 1481 00f8 EA6B ldr r2, [r5, #60] + 1482 00fa 9446 mov ip, r2 + 1483 00fc 6344 add r3, r3, ip + 1484 00fe EB63 str r3, [r5, #60] + ARM GAS /tmp/ccYuHakw.s page 58 + + +1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 1485 .loc 1 1695 0 + 1486 0100 0021 movs r1, #0 + 1487 0102 2800 movs r0, r5 + 1488 0104 FFF7FEFF bl HAL_PCD_DataInStageCallback + 1489 .LVL148: +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1490 .loc 1 1698 0 + 1491 0108 2423 movs r3, #36 + 1492 010a EB5C ldrb r3, [r5, r3] + 1493 010c 002B cmp r3, #0 + 1494 010e 00D1 bne .LCB1270 + 1495 0110 7AE7 b .L72 @long jump + 1496 .LCB1270: +1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1497 .loc 1 1698 0 is_stmt 0 discriminator 1 + 1498 0112 2B6C ldr r3, [r5, #64] + 1499 0114 002B cmp r3, #0 + 1500 0116 00D0 beq .LCB1274 + 1501 0118 76E7 b .L72 @long jump + 1502 .LCB1274: +1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->USB_Address = 0U; + 1503 .loc 1 1700 0 is_stmt 1 + 1504 011a 2422 movs r2, #36 + 1505 011c AB5C ldrb r3, [r5, r2] + 1506 011e 8021 movs r1, #128 + 1507 0120 4942 rsbs r1, r1, #0 + 1508 0122 0B43 orrs r3, r1 + 1509 0124 DBB2 uxtb r3, r3 + 1510 0126 CC31 adds r1, r1, #204 + 1511 0128 2868 ldr r0, [r5] + 1512 012a 4352 strh r3, [r0, r1] +1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1513 .loc 1 1701 0 + 1514 012c 0023 movs r3, #0 + 1515 012e AB54 strb r3, [r5, r2] + 1516 0130 6AE7 b .L72 + 1517 .LVL149: + 1518 .L94: +1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 1519 .loc 1 1716 0 + 1520 0132 5023 movs r3, #80 + 1521 .LVL150: + 1522 0134 C35A ldrh r3, [r0, r3] + 1523 0136 9422 movs r2, #148 + 1524 0138 5200 lsls r2, r2, #1 + 1525 013a AA5C ldrb r2, [r5, r2] + 1526 013c D200 lsls r2, r2, #3 + 1527 013e 9B18 adds r3, r3, r2 + 1528 0140 1B18 adds r3, r3, r0 + 1529 0142 8D4A ldr r2, .L97+4 + 1530 0144 9446 mov ip, r2 + 1531 0146 6344 add r3, r3, ip + 1532 0148 1B88 ldrh r3, [r3] + 1533 014a 9B05 lsls r3, r3, #22 + 1534 014c 9B0D lsrs r3, r3, #22 + 1535 014e 2A00 movs r2, r5 + ARM GAS /tmp/ccYuHakw.s page 59 + + + 1536 0150 2932 adds r2, r2, #41 + 1537 0152 FF32 adds r2, r2, #255 + 1538 0154 D361 str r3, [r2, #28] +1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->pmaadress, (uint16_t)ep->xfer_count); + 1539 .loc 1 1718 0 + 1540 0156 8C21 movs r1, #140 + 1541 0158 8900 lsls r1, r1, #2 + 1542 015a 6918 adds r1, r5, r1 + 1543 015c D288 ldrh r2, [r2, #6] + 1544 015e FFF7FEFF bl USB_ReadPMA + 1545 .LVL151: + 1546 .LBB8: +1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 1547 .loc 1 1722 0 + 1548 0162 2A68 ldr r2, [r5] + 1549 0164 1388 ldrh r3, [r2] + 1550 0166 8349 ldr r1, .L97 + 1551 0168 0B40 ands r3, r1 + 1552 .LVL152: + 1553 016a 8021 movs r1, #128 + 1554 016c 0B43 orrs r3, r1 + 1555 .LVL153: + 1556 016e 1380 strh r3, [r2] + 1557 .LBE8: +1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 1558 .loc 1 1728 0 + 1559 0170 2800 movs r0, r5 + 1560 0172 FFF7FEFF bl HAL_PCD_SetupStageCallback + 1561 .LVL154: + 1562 0176 47E7 b .L72 + 1563 .LVL155: + 1564 .L78: + 1565 .LBB9: + 1566 .LBB5: +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + 1567 .loc 1 1754 0 discriminator 2 + 1568 0178 3E2A cmp r2, #62 + 1569 017a 06D8 bhi .L80 +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + 1570 .loc 1 1754 0 is_stmt 0 discriminator 3 + 1571 017c 5108 lsrs r1, r2, #1 + 1572 .LVL156: + 1573 017e D207 lsls r2, r2, #31 + 1574 0180 00D5 bpl .L81 +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + 1575 .loc 1 1754 0 discriminator 5 + 1576 0182 0131 adds r1, r1, #1 + 1577 .LVL157: + 1578 .L81: +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + 1579 .loc 1 1754 0 discriminator 7 + 1580 0184 8902 lsls r1, r1, #10 + 1581 .LVL158: + 1582 0186 1980 strh r1, [r3] + 1583 0188 94E7 b .L79 + 1584 .L80: +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + ARM GAS /tmp/ccYuHakw.s page 60 + + + 1585 .loc 1 1754 0 discriminator 4 + 1586 018a 5109 lsrs r1, r2, #5 + 1587 .LVL159: + 1588 018c D206 lsls r2, r2, #27 + 1589 018e 00D1 bne .L82 +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + 1590 .loc 1 1754 0 discriminator 8 + 1591 0190 0139 subs r1, r1, #1 + 1592 .LVL160: + 1593 .L82: +1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID); + 1594 .loc 1 1754 0 discriminator 10 + 1595 0192 8902 lsls r1, r1, #10 + 1596 .LVL161: + 1597 0194 89B2 uxth r1, r1 + 1598 0196 7A4A ldr r2, .L97+12 + 1599 0198 1143 orrs r1, r2 + 1600 019a 1980 strh r1, [r3] + 1601 019c 8AE7 b .L79 + 1602 .LVL162: + 1603 .L73: + 1604 .LBE5: + 1605 .LBE9: +1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Decode and service non control endpoints interrupt */ +1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* process related endpoint register */ +1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex); + 1606 .loc 1 1764 0 is_stmt 1 + 1607 019e A300 lsls r3, r4, #2 + 1608 .LVL163: + 1609 01a0 9846 mov r8, r3 + 1610 01a2 4044 add r0, r0, r8 + 1611 01a4 0688 ldrh r6, [r0] + 1612 01a6 B6B2 uxth r6, r6 + 1613 .LVL164: +1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((wEPVal & USB_EP_CTR_RX) != 0U) + 1614 .loc 1 1765 0 + 1615 01a8 33B2 sxth r3, r6 + 1616 01aa 002B cmp r3, #0 + 1617 01ac 30DB blt .L95 + 1618 .L83: +1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* clear int flag */ +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex); +1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->OUT_ep[epindex]; +1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* OUT double Buffering*/ +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (ep->doublebuffer == 0U) +1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num); +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (count != 0U) +1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + ARM GAS /tmp/ccYuHakw.s page 61 + + +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count); +1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U) +1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /*read from endpoint BUF0Addr buffer*/ +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num); +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (count != 0U) +1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count); +1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /*read from endpoint BUF1Addr buffer*/ +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num); +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (count != 0U) +1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count); +1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* free EP OUT Buffer */ +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_FreeUserBuffer(hpcd->Instance, ep->num, 0U); +1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /*multi-packet on the NON control OUT endpoint*/ +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_count += count; +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_buff += count; +1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((ep->xfer_len == 0U) || (count < ep->maxpacket)) +1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* RX COMPLETE */ +1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataOutStageCallback(hpcd, ep->num); +1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_DataOutStageCallback(hpcd, ep->num); +1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)HAL_PCD_EP_Receive(hpcd, ep->num, ep->xfer_buff, ep->xfer_len); +1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } /* if((wEPVal & EP_CTR_RX) */ +1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((wEPVal & USB_EP_CTR_TX) != 0U) + 1619 .loc 1 1823 0 + 1620 01ae 3306 lsls r3, r6, #24 + 1621 01b0 00D4 bmi .LCB1430 + 1622 01b2 29E7 b .L72 @long jump + 1623 .LCB1430: + 1624 .LVL165: + 1625 .LBB10: +1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->IN_ep[epindex]; +1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + ARM GAS /tmp/ccYuHakw.s page 62 + + +1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* clear int flag */ +1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); + 1626 .loc 1 1828 0 + 1627 01b4 2B68 ldr r3, [r5] + 1628 01b6 4344 add r3, r3, r8 + 1629 01b8 1A00 movs r2, r3 + 1630 01ba 1B88 ldrh r3, [r3] + 1631 01bc 7349 ldr r1, .L97+24 + 1632 01be 1940 ands r1, r3 + 1633 .LVL166: + 1634 01c0 6F4B ldr r3, .L97+12 + 1635 01c2 0B43 orrs r3, r1 + 1636 01c4 9BB2 uxth r3, r3 + 1637 01c6 1380 strh r3, [r2] + 1638 .LBE10: +1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /*multi-packet on the NON control IN endpoint*/ +1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num); + 1639 .loc 1 1831 0 + 1640 01c8 2868 ldr r0, [r5] + 1641 01ca 5023 movs r3, #80 + 1642 01cc C35A ldrh r3, [r0, r3] + 1643 01ce 6101 lsls r1, r4, #5 + 1644 .LVL167: + 1645 01d0 6918 adds r1, r5, r1 + 1646 01d2 0A00 movs r2, r1 + 1647 01d4 2832 adds r2, r2, #40 + 1648 .LVL168: + 1649 01d6 1278 ldrb r2, [r2] + 1650 .LVL169: + 1651 01d8 D200 lsls r2, r2, #3 + 1652 01da 9B18 adds r3, r3, r2 + 1653 01dc 1B18 adds r3, r3, r0 + 1654 01de 6C4A ldr r2, .L97+28 + 1655 01e0 9446 mov ip, r2 + 1656 01e2 6344 add r3, r3, ip + 1657 01e4 1A88 ldrh r2, [r3] + 1658 01e6 9205 lsls r2, r2, #22 + 1659 01e8 920D lsrs r2, r2, #22 + 1660 01ea A31C adds r3, r4, #2 + 1661 01ec 5B01 lsls r3, r3, #5 + 1662 01ee E818 adds r0, r5, r3 + 1663 01f0 4260 str r2, [r0, #4] +1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_buff += ep->xfer_count; + 1664 .loc 1 1832 0 + 1665 01f2 C86B ldr r0, [r1, #60] + 1666 01f4 8446 mov ip, r0 + 1667 01f6 6244 add r2, r2, ip + 1668 01f8 CA63 str r2, [r1, #60] +1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** +1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Zero Length Packet? */ +1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (ep->xfer_len == 0U) + 1669 .loc 1 1835 0 + 1670 01fa 5B59 ldr r3, [r3, r5] + 1671 01fc 002B cmp r3, #0 + 1672 01fe 00D0 beq .LCB1481 + 1673 0200 ACE0 b .L90 @long jump + ARM GAS /tmp/ccYuHakw.s page 63 + + + 1674 .LCB1481: +1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* TX COMPLETE */ +1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) +1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->DataInStageCallback(hpcd, ep->num); +1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #else +1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** HAL_PCD_DataInStageCallback(hpcd, ep->num); + 1675 .loc 1 1841 0 + 1676 0202 0C00 movs r4, r1 + 1677 .LVL170: + 1678 0204 2834 adds r4, r4, #40 + 1679 .LVL171: + 1680 0206 2178 ldrb r1, [r4] + 1681 0208 2800 movs r0, r5 + 1682 020a FFF7FEFF bl HAL_PCD_DataInStageCallback + 1683 .LVL172: + 1684 020e FBE6 b .L72 + 1685 .LVL173: + 1686 .L95: + 1687 .LBB11: +1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep = &hpcd->OUT_ep[epindex]; + 1688 .loc 1 1768 0 + 1689 0210 0388 ldrh r3, [r0] + 1690 0212 584A ldr r2, .L97 + 1691 0214 1340 ands r3, r2 + 1692 .LVL174: + 1693 0216 8022 movs r2, #128 + 1694 0218 1343 orrs r3, r2 + 1695 .LVL175: + 1696 021a 0380 strh r3, [r0] + 1697 .LVL176: + 1698 .LBE11: +1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1699 .loc 1 1772 0 + 1700 021c 6301 lsls r3, r4, #5 + 1701 021e EB18 adds r3, r5, r3 + 1702 0220 3533 adds r3, r3, #53 + 1703 0222 FF33 adds r3, r3, #255 + 1704 0224 1B78 ldrb r3, [r3] + 1705 0226 002B cmp r3, #0 + 1706 0228 1ED1 bne .L84 +1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (count != 0U) + 1707 .loc 1 1774 0 + 1708 022a 2868 ldr r0, [r5] + 1709 022c 5033 adds r3, r3, #80 + 1710 022e C35A ldrh r3, [r0, r3] + 1711 0230 6201 lsls r2, r4, #5 + 1712 0232 AA18 adds r2, r5, r2 + 1713 0234 2932 adds r2, r2, #41 + 1714 0236 FF32 adds r2, r2, #255 + 1715 0238 1278 ldrb r2, [r2] + 1716 023a D200 lsls r2, r2, #3 + 1717 023c 9B18 adds r3, r3, r2 + 1718 023e 1B18 adds r3, r3, r0 + 1719 0240 4D4A ldr r2, .L97+4 + 1720 0242 9446 mov ip, r2 + 1721 0244 6344 add r3, r3, ip + ARM GAS /tmp/ccYuHakw.s page 64 + + + 1722 0246 1F88 ldrh r7, [r3] + 1723 0248 BF05 lsls r7, r7, #22 + 1724 024a BF0D lsrs r7, r7, #22 + 1725 .LVL177: +1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1726 .loc 1 1775 0 + 1727 024c 33D0 beq .L85 +1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1728 .loc 1 1777 0 + 1729 024e 6301 lsls r3, r4, #5 + 1730 0250 EB18 adds r3, r5, r3 + 1731 0252 1A00 movs r2, r3 + 1732 0254 2F32 adds r2, r2, #47 + 1733 0256 FF32 adds r2, r2, #255 + 1734 0258 1288 ldrh r2, [r2] + 1735 025a 3D33 adds r3, r3, #61 + 1736 025c FF33 adds r3, r3, #255 + 1737 025e 1968 ldr r1, [r3] + 1738 0260 3B00 movs r3, r7 + 1739 0262 FFF7FEFF bl USB_ReadPMA + 1740 .LVL178: + 1741 0266 26E0 b .L85 + 1742 .LVL179: + 1743 .L84: +1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1744 .loc 1 1782 0 + 1745 0268 2868 ldr r0, [r5] + 1746 026a 6301 lsls r3, r4, #5 + 1747 026c EB18 adds r3, r5, r3 + 1748 026e 2933 adds r3, r3, #41 + 1749 0270 FF33 adds r3, r3, #255 + 1750 0272 1B78 ldrb r3, [r3] + 1751 0274 9A00 lsls r2, r3, #2 + 1752 0276 8218 adds r2, r0, r2 + 1753 0278 1288 ldrh r2, [r2] + 1754 027a 5204 lsls r2, r2, #17 + 1755 027c 4BD5 bpl .L86 +1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (count != 0U) + 1756 .loc 1 1785 0 + 1757 027e 5022 movs r2, #80 + 1758 0280 825A ldrh r2, [r0, r2] + 1759 0282 DB00 lsls r3, r3, #3 + 1760 0284 D318 adds r3, r2, r3 + 1761 0286 1B18 adds r3, r3, r0 + 1762 0288 414A ldr r2, .L97+28 + 1763 028a 9446 mov ip, r2 + 1764 028c 6344 add r3, r3, ip + 1765 028e 1F88 ldrh r7, [r3] + 1766 0290 BF05 lsls r7, r7, #22 + 1767 0292 BF0D lsrs r7, r7, #22 + 1768 .LVL180: +1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1769 .loc 1 1786 0 + 1770 0294 32D1 bne .L96 + 1771 .L87: + 1772 .LBB12: +1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + ARM GAS /tmp/ccYuHakw.s page 65 + + + 1773 .loc 1 1801 0 discriminator 1 + 1774 0296 6301 lsls r3, r4, #5 + 1775 0298 EB18 adds r3, r5, r3 + 1776 029a 2933 adds r3, r3, #41 + 1777 029c FF33 adds r3, r3, #255 + 1778 029e 1A78 ldrb r2, [r3] + 1779 02a0 9200 lsls r2, r2, #2 + 1780 02a2 2B68 ldr r3, [r5] + 1781 02a4 9C46 mov ip, r3 + 1782 02a6 6244 add r2, r2, ip + 1783 02a8 1388 ldrh r3, [r2] + 1784 02aa 3A49 ldr r1, .L97+32 + 1785 02ac 1940 ands r1, r3 + 1786 .LVL181: + 1787 02ae 3A4B ldr r3, .L97+36 + 1788 02b0 0B43 orrs r3, r1 + 1789 02b2 9BB2 uxth r3, r3 + 1790 02b4 1380 strh r3, [r2] + 1791 .LVL182: + 1792 .L85: + 1793 .LBE12: +1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->xfer_buff += count; + 1794 .loc 1 1804 0 + 1795 02b6 3900 movs r1, r7 + 1796 02b8 2000 movs r0, r4 + 1797 02ba 0A30 adds r0, r0, #10 + 1798 02bc 4001 lsls r0, r0, #5 + 1799 02be 2A18 adds r2, r5, r0 + 1800 02c0 5368 ldr r3, [r2, #4] + 1801 02c2 DB19 adds r3, r3, r7 + 1802 02c4 5360 str r3, [r2, #4] +1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 1803 .loc 1 1805 0 + 1804 02c6 6301 lsls r3, r4, #5 + 1805 02c8 EB18 adds r3, r5, r3 + 1806 02ca 3D33 adds r3, r3, #61 + 1807 02cc FF33 adds r3, r3, #255 + 1808 02ce 1A68 ldr r2, [r3] + 1809 02d0 9446 mov ip, r2 + 1810 02d2 6744 add r7, r7, ip + 1811 .LVL183: + 1812 02d4 1F60 str r7, [r3] +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1813 .loc 1 1807 0 + 1814 02d6 4359 ldr r3, [r0, r5] + 1815 02d8 002B cmp r3, #0 + 1816 02da 06D0 beq .L88 +1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1817 .loc 1 1807 0 is_stmt 0 discriminator 1 + 1818 02dc 6201 lsls r2, r4, #5 + 1819 02de AA18 adds r2, r5, r2 + 1820 02e0 3932 adds r2, r2, #57 + 1821 02e2 FF32 adds r2, r2, #255 + 1822 02e4 1268 ldr r2, [r2] + 1823 02e6 9142 cmp r1, r2 + 1824 02e8 2ED2 bcs .L89 + 1825 .L88: + ARM GAS /tmp/ccYuHakw.s page 66 + + +1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 1826 .loc 1 1813 0 is_stmt 1 + 1827 02ea 6301 lsls r3, r4, #5 + 1828 02ec EB18 adds r3, r5, r3 + 1829 02ee 2933 adds r3, r3, #41 + 1830 02f0 FF33 adds r3, r3, #255 + 1831 02f2 1978 ldrb r1, [r3] + 1832 02f4 2800 movs r0, r5 + 1833 02f6 FFF7FEFF bl HAL_PCD_DataOutStageCallback + 1834 .LVL184: + 1835 02fa 58E7 b .L83 + 1836 .LVL185: + 1837 .L96: +1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1838 .loc 1 1788 0 + 1839 02fc 6301 lsls r3, r4, #5 + 1840 02fe EB18 adds r3, r5, r3 + 1841 0300 1A00 movs r2, r3 + 1842 0302 3132 adds r2, r2, #49 + 1843 0304 FF32 adds r2, r2, #255 + 1844 0306 1288 ldrh r2, [r2] + 1845 0308 3D33 adds r3, r3, #61 + 1846 030a FF33 adds r3, r3, #255 + 1847 030c 1968 ldr r1, [r3] + 1848 030e 3B00 movs r3, r7 + 1849 0310 FFF7FEFF bl USB_ReadPMA + 1850 .LVL186: + 1851 0314 BFE7 b .L87 + 1852 .LVL187: + 1853 .L86: +1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (count != 0U) + 1854 .loc 1 1794 0 + 1855 0316 5022 movs r2, #80 + 1856 0318 825A ldrh r2, [r0, r2] + 1857 031a DB00 lsls r3, r3, #3 + 1858 031c D318 adds r3, r2, r3 + 1859 031e 1B18 adds r3, r3, r0 + 1860 0320 154A ldr r2, .L97+4 + 1861 0322 9446 mov ip, r2 + 1862 0324 6344 add r3, r3, ip + 1863 0326 1F88 ldrh r7, [r3] + 1864 0328 BF05 lsls r7, r7, #22 + 1865 032a BF0D lsrs r7, r7, #22 + 1866 .LVL188: +1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1867 .loc 1 1795 0 + 1868 032c B3D0 beq .L87 +1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1869 .loc 1 1797 0 + 1870 032e 6301 lsls r3, r4, #5 + 1871 0330 EB18 adds r3, r5, r3 + 1872 0332 1A00 movs r2, r3 + 1873 0334 3332 adds r2, r2, #51 + 1874 0336 FF32 adds r2, r2, #255 + 1875 0338 1288 ldrh r2, [r2] + 1876 033a 3D33 adds r3, r3, #61 + 1877 033c FF33 adds r3, r3, #255 + ARM GAS /tmp/ccYuHakw.s page 67 + + + 1878 033e 1968 ldr r1, [r3] + 1879 0340 3B00 movs r3, r7 + 1880 0342 FFF7FEFF bl USB_ReadPMA + 1881 .LVL189: + 1882 0346 A6E7 b .L87 + 1883 .LVL190: + 1884 .L89: +1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1885 .loc 1 1818 0 + 1886 0348 6201 lsls r2, r4, #5 + 1887 034a AA18 adds r2, r5, r2 + 1888 034c 2932 adds r2, r2, #41 + 1889 034e FF32 adds r2, r2, #255 + 1890 0350 1178 ldrb r1, [r2] + 1891 0352 3A00 movs r2, r7 + 1892 0354 2800 movs r0, r5 + 1893 0356 FFF7FEFF bl HAL_PCD_EP_Receive + 1894 .LVL191: + 1895 035a 28E7 b .L83 + 1896 .LVL192: + 1897 .L90: +1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ +1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** else +1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { +1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)HAL_PCD_EP_Transmit(hpcd, ep->num, ep->xfer_buff, ep->xfer_len); + 1898 .loc 1 1846 0 + 1899 035c 6401 lsls r4, r4, #5 + 1900 .LVL193: + 1901 035e 2C19 adds r4, r5, r4 + 1902 0360 2834 adds r4, r4, #40 + 1903 0362 2178 ldrb r1, [r4] + 1904 0364 2800 movs r0, r5 + 1905 0366 FFF7FEFF bl HAL_PCD_EP_Transmit + 1906 .LVL194: + 1907 036a 4DE6 b .L72 + 1908 .LVL195: + 1909 .L92: +1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } +1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return HAL_OK; +1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1910 .loc 1 1852 0 + 1911 036c 0020 movs r0, #0 + 1912 @ sp needed + 1913 .LVL196: + 1914 036e 04BC pop {r2} + 1915 0370 9046 mov r8, r2 + 1916 0372 F0BD pop {r4, r5, r6, r7, pc} + 1917 .L98: + 1918 .align 2 + 1919 .L97: + 1920 0374 8F0F0000 .word 3983 + 1921 0378 06040000 .word 1030 + 1922 037c FF83FFFF .word -31745 + ARM GAS /tmp/ccYuHakw.s page 68 + + + 1923 0380 0080FFFF .word -32768 + 1924 0384 8FBFFFFF .word -16497 + 1925 0388 8080FFFF .word -32640 + 1926 038c 0F8FFFFF .word -28913 + 1927 0390 02040000 .word 1026 + 1928 0394 8F8FFFFF .word -28785 + 1929 0398 C080FFFF .word -32576 + 1930 .cfi_endproc + 1931 .LFE72: + 1933 .section .text.HAL_PCD_IRQHandler,"ax",%progbits + 1934 .align 1 + 1935 .global HAL_PCD_IRQHandler + 1936 .syntax unified + 1937 .code 16 + 1938 .thumb_func + 1939 .fpu softvfp + 1941 HAL_PCD_IRQHandler: + 1942 .LFB46: + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (__HAL_PCD_GET_FLAG(hpcd, USB_ISTR_CTR)) + 1943 .loc 1 995 0 + 1944 .cfi_startproc + 1945 @ args = 0, pretend = 0, frame = 0 + 1946 @ frame_needed = 0, uses_anonymous_args = 0 + 1947 .LVL197: + 1948 0000 70B5 push {r4, r5, r6, lr} + 1949 .LCFI14: + 1950 .cfi_def_cfa_offset 16 + 1951 .cfi_offset 4, -16 + 1952 .cfi_offset 5, -12 + 1953 .cfi_offset 6, -8 + 1954 .cfi_offset 14, -4 + 1955 0002 0400 movs r4, r0 + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1956 .loc 1 996 0 + 1957 0004 0068 ldr r0, [r0] + 1958 .LVL198: + 1959 0006 FFF7FEFF bl USB_ReadInterrupts + 1960 .LVL199: + 1961 000a 0304 lsls r3, r0, #16 + 1962 000c 00D5 bpl .LCB1807 + 1963 000e 7BE0 b .L111 @long jump + 1964 .LCB1807: + 1965 .L100: +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1966 .loc 1 1003 0 + 1967 0010 2068 ldr r0, [r4] + 1968 0012 FFF7FEFF bl USB_ReadInterrupts + 1969 .LVL200: + 1970 0016 4305 lsls r3, r0, #21 + 1971 0018 00D5 bpl .LCB1816 + 1972 001a 79E0 b .L112 @long jump + 1973 .LCB1816: + 1974 .L101: +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1975 .loc 1 1016 0 + 1976 001c 2068 ldr r0, [r4] + 1977 001e FFF7FEFF bl USB_ReadInterrupts + ARM GAS /tmp/ccYuHakw.s page 69 + + + 1978 .LVL201: + 1979 0022 4304 lsls r3, r0, #17 + 1980 0024 05D5 bpl .L102 +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1981 .loc 1 1018 0 + 1982 0026 2168 ldr r1, [r4] + 1983 0028 4422 movs r2, #68 + 1984 002a 8B5A ldrh r3, [r1, r2] + 1985 002c 5848 ldr r0, .L116 + 1986 002e 0340 ands r3, r0 + 1987 0030 8B52 strh r3, [r1, r2] + 1988 .L102: +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 1989 .loc 1 1021 0 + 1990 0032 2068 ldr r0, [r4] + 1991 0034 FFF7FEFF bl USB_ReadInterrupts + 1992 .LVL202: + 1993 0038 8304 lsls r3, r0, #18 + 1994 003a 05D5 bpl .L103 +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 1995 .loc 1 1023 0 + 1996 003c 2168 ldr r1, [r4] + 1997 003e 4422 movs r2, #68 + 1998 0040 8B5A ldrh r3, [r1, r2] + 1999 0042 5448 ldr r0, .L116+4 + 2000 0044 0340 ands r3, r0 + 2001 0046 8B52 strh r3, [r1, r2] + 2002 .L103: +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2003 .loc 1 1026 0 + 2004 0048 2068 ldr r0, [r4] + 2005 004a FFF7FEFF bl USB_ReadInterrupts + 2006 .LVL203: + 2007 004e C304 lsls r3, r0, #19 + 2008 0050 18D5 bpl .L104 +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP); + 2009 .loc 1 1028 0 + 2010 0052 2168 ldr r1, [r4] + 2011 0054 4023 movs r3, #64 + 2012 0056 CA5A ldrh r2, [r1, r3] + 2013 0058 0420 movs r0, #4 + 2014 005a 8243 bics r2, r0 + 2015 005c CA52 strh r2, [r1, r3] +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2016 .loc 1 1029 0 + 2017 005e 2168 ldr r1, [r4] + 2018 0060 CA5A ldrh r2, [r1, r3] + 2019 0062 0430 adds r0, r0, #4 + 2020 0064 8243 bics r2, r0 + 2021 0066 CA52 strh r2, [r1, r3] +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2022 .loc 1 1031 0 + 2023 0068 9823 movs r3, #152 + 2024 006a 9B00 lsls r3, r3, #2 + 2025 006c E35C ldrb r3, [r4, r3] + 2026 006e 012B cmp r3, #1 + 2027 0070 5CD0 beq .L113 + ARM GAS /tmp/ccYuHakw.s page 70 + + + 2028 .L105: +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 2029 .loc 1 1044 0 + 2030 0072 2000 movs r0, r4 + 2031 0074 FFF7FEFF bl HAL_PCD_ResumeCallback + 2032 .LVL204: +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2033 .loc 1 1047 0 + 2034 0078 2168 ldr r1, [r4] + 2035 007a 4422 movs r2, #68 + 2036 007c 8B5A ldrh r3, [r1, r2] + 2037 007e 4648 ldr r0, .L116+8 + 2038 0080 0340 ands r3, r0 + 2039 0082 8B52 strh r3, [r1, r2] + 2040 .L104: +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2041 .loc 1 1050 0 + 2042 0084 2068 ldr r0, [r4] + 2043 0086 FFF7FEFF bl USB_ReadInterrupts + 2044 .LVL205: + 2045 008a 0305 lsls r3, r0, #20 + 2046 008c 57D4 bmi .L114 + 2047 .L106: +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2048 .loc 1 1071 0 + 2049 008e 2068 ldr r0, [r4] + 2050 0090 FFF7FEFF bl USB_ReadInterrupts + 2051 .LVL206: + 2052 0094 0306 lsls r3, r0, #24 + 2053 0096 26D5 bpl .L107 +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if (hpcd->LPM_State == LPM_L0) + 2054 .loc 1 1073 0 + 2055 0098 2168 ldr r1, [r4] + 2056 009a 4422 movs r2, #68 + 2057 009c 8B5A ldrh r3, [r1, r2] + 2058 009e 8020 movs r0, #128 + 2059 00a0 8343 bics r3, r0 + 2060 00a2 8B52 strh r3, [r1, r2] +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2061 .loc 1 1074 0 + 2062 00a4 9823 movs r3, #152 + 2063 00a6 9B00 lsls r3, r3, #2 + 2064 00a8 E35C ldrb r3, [r4, r3] + 2065 00aa 002B cmp r3, #0 + 2066 00ac 62D1 bne .L108 +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->Instance->CNTR |= USB_CNTR_FSUSP; + 2067 .loc 1 1077 0 + 2068 00ae 2168 ldr r1, [r4] + 2069 00b0 4033 adds r3, r3, #64 + 2070 00b2 CA5A ldrh r2, [r1, r3] + 2071 00b4 0420 movs r0, #4 + 2072 00b6 0243 orrs r2, r0 + 2073 00b8 CA52 strh r2, [r1, r3] +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2074 .loc 1 1078 0 + 2075 00ba 2168 ldr r1, [r4] + 2076 00bc CA5A ldrh r2, [r1, r3] + ARM GAS /tmp/ccYuHakw.s page 71 + + + 2077 00be 0820 movs r0, #8 + 2078 00c0 0243 orrs r2, r0 + 2079 00c2 CA52 strh r2, [r1, r3] +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** hpcd->BESL = ((uint32_t)hpcd->Instance->LPMCSR & USB_LPMCSR_BESL) >> 2; + 2080 .loc 1 1080 0 + 2081 00c4 9823 movs r3, #152 + 2082 00c6 9B00 lsls r3, r3, #2 + 2083 00c8 0122 movs r2, #1 + 2084 00ca E254 strb r2, [r4, r3] +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 2085 .loc 1 1081 0 + 2086 00cc 5423 movs r3, #84 + 2087 00ce 2268 ldr r2, [r4] + 2088 00d0 D25A ldrh r2, [r2, r3] + 2089 00d2 9208 lsrs r2, r2, #2 + 2090 00d4 183B subs r3, r3, #24 + 2091 00d6 1340 ands r3, r2 + 2092 00d8 9922 movs r2, #153 + 2093 00da 9200 lsls r2, r2, #2 + 2094 00dc A350 str r3, [r4, r2] +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 2095 .loc 1 1085 0 + 2096 00de 0121 movs r1, #1 + 2097 00e0 2000 movs r0, r4 + 2098 00e2 FFF7FEFF bl HAL_PCDEx_LPM_Callback + 2099 .LVL207: + 2100 .L107: +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2101 .loc 1 1098 0 + 2102 00e6 2068 ldr r0, [r4] + 2103 00e8 FFF7FEFF bl USB_ReadInterrupts + 2104 .LVL208: + 2105 00ec 8305 lsls r3, r0, #22 + 2106 00ee 45D4 bmi .L115 + 2107 .L109: +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2108 .loc 1 1109 0 + 2109 00f0 2068 ldr r0, [r4] + 2110 00f2 FFF7FEFF bl USB_ReadInterrupts + 2111 .LVL209: + 2112 00f6 C305 lsls r3, r0, #23 + 2113 00f8 05D5 bpl .L99 +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2114 .loc 1 1112 0 + 2115 00fa 2168 ldr r1, [r4] + 2116 00fc 4422 movs r2, #68 + 2117 00fe 8B5A ldrh r3, [r1, r2] + 2118 0100 2648 ldr r0, .L116+12 + 2119 0102 0340 ands r3, r0 + 2120 0104 8B52 strh r3, [r1, r2] + 2121 .L99: +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2122 .loc 1 1114 0 + 2123 @ sp needed + 2124 .LVL210: + 2125 0106 70BD pop {r4, r5, r6, pc} + 2126 .LVL211: + ARM GAS /tmp/ccYuHakw.s page 72 + + + 2127 .L111: +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2128 .loc 1 1000 0 + 2129 0108 2000 movs r0, r4 + 2130 010a FFF7FEFF bl PCD_EP_ISR_Handler + 2131 .LVL212: + 2132 010e 7FE7 b .L100 + 2133 .L112: +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2134 .loc 1 1005 0 + 2135 0110 2168 ldr r1, [r4] + 2136 0112 4422 movs r2, #68 + 2137 0114 8B5A ldrh r3, [r1, r2] + 2138 0116 2248 ldr r0, .L116+16 + 2139 0118 0340 ands r3, r0 + 2140 011a 8B52 strh r3, [r1, r2] +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 2141 .loc 1 1010 0 + 2142 011c 2000 movs r0, r4 + 2143 011e FFF7FEFF bl HAL_PCD_ResetCallback + 2144 .LVL213: +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2145 .loc 1 1013 0 + 2146 0122 0021 movs r1, #0 + 2147 0124 2000 movs r0, r4 + 2148 0126 FFF7FEFF bl HAL_PCD_SetAddress + 2149 .LVL214: + 2150 012a 77E7 b .L101 + 2151 .L113: +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 2152 .loc 1 1033 0 + 2153 012c 9823 movs r3, #152 + 2154 012e 9B00 lsls r3, r3, #2 + 2155 0130 0022 movs r2, #0 + 2156 0132 E254 strb r2, [r4, r3] +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 2157 .loc 1 1037 0 + 2158 0134 0021 movs r1, #0 + 2159 0136 2000 movs r0, r4 + 2160 0138 FFF7FEFF bl HAL_PCDEx_LPM_Callback + 2161 .LVL215: + 2162 013c 99E7 b .L105 + 2163 .L114: +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2164 .loc 1 1053 0 + 2165 013e 2168 ldr r1, [r4] + 2166 0140 4023 movs r3, #64 + 2167 0142 CA5A ldrh r2, [r1, r3] + 2168 0144 0820 movs r0, #8 + 2169 0146 0243 orrs r2, r0 + 2170 0148 CA52 strh r2, [r1, r3] +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2171 .loc 1 1056 0 + 2172 014a 2068 ldr r0, [r4] + 2173 014c 4421 movs r1, #68 + 2174 014e 425A ldrh r2, [r0, r1] + 2175 0150 144D ldr r5, .L116+20 + ARM GAS /tmp/ccYuHakw.s page 73 + + + 2176 0152 2A40 ands r2, r5 + 2177 0154 4252 strh r2, [r0, r1] +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2178 .loc 1 1058 0 + 2179 0156 2168 ldr r1, [r4] + 2180 0158 CA5A ldrh r2, [r1, r3] + 2181 015a 0420 movs r0, #4 + 2182 015c 0243 orrs r2, r0 + 2183 015e CA52 strh r2, [r1, r3] +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2184 .loc 1 1060 0 + 2185 0160 2068 ldr r0, [r4] + 2186 0162 FFF7FEFF bl USB_ReadInterrupts + 2187 .LVL216: + 2188 0166 C304 lsls r3, r0, #19 + 2189 0168 00D5 bpl .LCB2071 + 2190 016a 90E7 b .L106 @long jump + 2191 .LCB2071: +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 2192 .loc 1 1065 0 + 2193 016c 2000 movs r0, r4 + 2194 016e FFF7FEFF bl HAL_PCD_SuspendCallback + 2195 .LVL217: + 2196 0172 8CE7 b .L106 + 2197 .L108: +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 2198 .loc 1 1093 0 + 2199 0174 2000 movs r0, r4 + 2200 0176 FFF7FEFF bl HAL_PCD_SuspendCallback + 2201 .LVL218: + 2202 017a B4E7 b .L107 + 2203 .L115: +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2204 .loc 1 1100 0 + 2205 017c 2168 ldr r1, [r4] + 2206 017e 4422 movs r2, #68 + 2207 0180 8B5A ldrh r3, [r1, r2] + 2208 0182 0948 ldr r0, .L116+24 + 2209 0184 0340 ands r3, r0 + 2210 0186 8B52 strh r3, [r1, r2] +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 2211 .loc 1 1105 0 + 2212 0188 2000 movs r0, r4 + 2213 018a FFF7FEFF bl HAL_PCD_SOFCallback + 2214 .LVL219: + 2215 018e AFE7 b .L109 + 2216 .L117: + 2217 .align 2 + 2218 .L116: + 2219 0190 FFBFFFFF .word -16385 + 2220 0194 FFDFFFFF .word -8193 + 2221 0198 FFEFFFFF .word -4097 + 2222 019c FFFEFFFF .word -257 + 2223 01a0 FFFBFFFF .word -1025 + 2224 01a4 FFF7FFFF .word -2049 + 2225 01a8 FFFDFFFF .word -513 + 2226 .cfi_endproc + ARM GAS /tmp/ccYuHakw.s page 74 + + + 2227 .LFE46: + 2229 .section .text.HAL_PCD_EP_SetStall,"ax",%progbits + 2230 .align 1 + 2231 .global HAL_PCD_EP_SetStall + 2232 .syntax unified + 2233 .code 16 + 2234 .thumb_func + 2235 .fpu softvfp + 2237 HAL_PCD_EP_SetStall: + 2238 .LFB66: +1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_EPTypeDef *ep; + 2239 .loc 1 1506 0 + 2240 .cfi_startproc + 2241 @ args = 0, pretend = 0, frame = 0 + 2242 @ frame_needed = 0, uses_anonymous_args = 0 + 2243 .LVL220: + 2244 0000 70B5 push {r4, r5, r6, lr} + 2245 .LCFI15: + 2246 .cfi_def_cfa_offset 16 + 2247 .cfi_offset 4, -16 + 2248 .cfi_offset 5, -12 + 2249 .cfi_offset 6, -8 + 2250 .cfi_offset 14, -4 + 2251 0002 0500 movs r5, r0 + 2252 0004 0724 movs r4, #7 + 2253 0006 0C40 ands r4, r1 +1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2254 .loc 1 1509 0 + 2255 0008 4368 ldr r3, [r0, #4] + 2256 000a 9C42 cmp r4, r3 + 2257 000c 33D8 bhi .L123 +1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2258 .loc 1 1514 0 + 2259 000e 4BB2 sxtb r3, r1 + 2260 0010 002B cmp r3, #0 + 2261 0012 20DB blt .L125 +1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 0U; + 2262 .loc 1 1521 0 + 2263 0014 4B01 lsls r3, r1, #5 + 2264 0016 1900 movs r1, r3 + 2265 .LVL221: + 2266 0018 2931 adds r1, r1, #41 + 2267 001a FF31 adds r1, r1, #255 + 2268 001c 4118 adds r1, r0, r1 + 2269 .LVL222: +1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2270 .loc 1 1522 0 + 2271 001e C318 adds r3, r0, r3 + 2272 0020 2A33 adds r3, r3, #42 + 2273 0022 FF33 adds r3, r3, #255 + 2274 0024 0022 movs r2, #0 + 2275 0026 1A70 strb r2, [r3] + 2276 .L121: +1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->num = ep_addr & EP_ADDR_MSK; + 2277 .loc 1 1525 0 + 2278 0028 0123 movs r3, #1 + 2279 002a 8B70 strb r3, [r1, #2] + ARM GAS /tmp/ccYuHakw.s page 75 + + +1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2280 .loc 1 1526 0 + 2281 002c 0C70 strb r4, [r1] +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2282 .loc 1 1528 0 + 2283 002e 8A23 movs r3, #138 + 2284 0030 9B00 lsls r3, r3, #2 + 2285 0032 EB5C ldrb r3, [r5, r3] + 2286 0034 012B cmp r3, #1 + 2287 0036 20D0 beq .L124 +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2288 .loc 1 1528 0 is_stmt 0 discriminator 2 + 2289 0038 8A23 movs r3, #138 + 2290 003a 9B00 lsls r3, r3, #2 + 2291 003c 0122 movs r2, #1 + 2292 003e EA54 strb r2, [r5, r3] +1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** if ((ep_addr & EP_ADDR_MSK) == 0U) + 2293 .loc 1 1530 0 is_stmt 1 discriminator 2 + 2294 0040 2868 ldr r0, [r5] + 2295 .LVL223: + 2296 0042 FFF7FEFF bl USB_EPSetStall + 2297 .LVL224: +1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2298 .loc 1 1531 0 discriminator 2 + 2299 0046 002C cmp r4, #0 + 2300 0048 0ED0 beq .L126 + 2301 .L122: +1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2302 .loc 1 1535 0 + 2303 004a 8A23 movs r3, #138 + 2304 004c 9B00 lsls r3, r3, #2 + 2305 004e 0022 movs r2, #0 + 2306 0050 EA54 strb r2, [r5, r3] +1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2307 .loc 1 1537 0 + 2308 0052 0020 movs r0, #0 + 2309 0054 10E0 b .L119 + 2310 .LVL225: + 2311 .L125: +1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 1U; + 2312 .loc 1 1516 0 + 2313 0056 6301 lsls r3, r4, #5 + 2314 0058 1900 movs r1, r3 + 2315 .LVL226: + 2316 005a 2831 adds r1, r1, #40 + 2317 005c 4118 adds r1, r0, r1 + 2318 .LVL227: +1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2319 .loc 1 1517 0 + 2320 005e C318 adds r3, r0, r3 + 2321 0060 2933 adds r3, r3, #41 + 2322 0062 0122 movs r2, #1 + 2323 0064 1A70 strb r2, [r3] + 2324 0066 DFE7 b .L121 + 2325 .LVL228: + 2326 .L126: +1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + ARM GAS /tmp/ccYuHakw.s page 76 + + + 2327 .loc 1 1533 0 + 2328 0068 8C23 movs r3, #140 + 2329 006a 9B00 lsls r3, r3, #2 + 2330 006c E918 adds r1, r5, r3 + 2331 006e 2868 ldr r0, [r5] + 2332 0070 FFF7FEFF bl USB_EP0_OutStart + 2333 .LVL229: + 2334 0074 E9E7 b .L122 + 2335 .LVL230: + 2336 .L123: +1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2337 .loc 1 1511 0 + 2338 0076 0120 movs r0, #1 + 2339 .LVL231: + 2340 .L119: +1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2341 .loc 1 1538 0 + 2342 @ sp needed + 2343 .LVL232: + 2344 0078 70BD pop {r4, r5, r6, pc} + 2345 .LVL233: + 2346 .L124: +1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2347 .loc 1 1528 0 + 2348 007a 0220 movs r0, #2 + 2349 .LVL234: + 2350 007c FCE7 b .L119 + 2351 .cfi_endproc + 2352 .LFE66: + 2354 .section .text.HAL_PCD_EP_ClrStall,"ax",%progbits + 2355 .align 1 + 2356 .global HAL_PCD_EP_ClrStall + 2357 .syntax unified + 2358 .code 16 + 2359 .thumb_func + 2360 .fpu softvfp + 2362 HAL_PCD_EP_ClrStall: + 2363 .LFB67: +1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** PCD_EPTypeDef *ep; + 2364 .loc 1 1547 0 + 2365 .cfi_startproc + 2366 @ args = 0, pretend = 0, frame = 0 + 2367 @ frame_needed = 0, uses_anonymous_args = 0 + 2368 .LVL235: + 2369 0000 70B5 push {r4, r5, r6, lr} + 2370 .LCFI16: + 2371 .cfi_def_cfa_offset 16 + 2372 .cfi_offset 4, -16 + 2373 .cfi_offset 5, -12 + 2374 .cfi_offset 6, -8 + 2375 .cfi_offset 14, -4 + 2376 0002 0400 movs r4, r0 +1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2377 .loc 1 1550 0 + 2378 0004 0F23 movs r3, #15 + 2379 0006 0B40 ands r3, r1 + 2380 0008 4268 ldr r2, [r0, #4] + ARM GAS /tmp/ccYuHakw.s page 77 + + + 2381 000a 9342 cmp r3, r2 + 2382 000c 2FD8 bhi .L131 +1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** { + 2383 .loc 1 1555 0 + 2384 000e 4BB2 sxtb r3, r1 + 2385 0010 002B cmp r3, #0 + 2386 0012 21DB blt .L133 +1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 0U; + 2387 .loc 1 1562 0 + 2388 0014 0723 movs r3, #7 + 2389 0016 0B40 ands r3, r1 + 2390 0018 5B01 lsls r3, r3, #5 + 2391 001a 1A00 movs r2, r3 + 2392 001c 2932 adds r2, r2, #41 + 2393 001e FF32 adds r2, r2, #255 + 2394 0020 8218 adds r2, r0, r2 + 2395 .LVL236: +1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2396 .loc 1 1563 0 + 2397 0022 C318 adds r3, r0, r3 + 2398 0024 2A33 adds r3, r3, #42 + 2399 0026 FF33 adds r3, r3, #255 + 2400 0028 0020 movs r0, #0 + 2401 .LVL237: + 2402 002a 1870 strb r0, [r3] + 2403 .L130: +1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->num = ep_addr & EP_ADDR_MSK; + 2404 .loc 1 1566 0 + 2405 002c 0023 movs r3, #0 + 2406 002e 9370 strb r3, [r2, #2] +1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2407 .loc 1 1567 0 + 2408 0030 0733 adds r3, r3, #7 + 2409 0032 1940 ands r1, r3 + 2410 .LVL238: + 2411 0034 1170 strb r1, [r2] +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EPClearStall(hpcd->Instance, ep); + 2412 .loc 1 1569 0 + 2413 0036 8A23 movs r3, #138 + 2414 0038 9B00 lsls r3, r3, #2 + 2415 003a E35C ldrb r3, [r4, r3] + 2416 003c 012B cmp r3, #1 + 2417 003e 18D0 beq .L132 +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EPClearStall(hpcd->Instance, ep); + 2418 .loc 1 1569 0 is_stmt 0 discriminator 2 + 2419 0040 8A25 movs r5, #138 + 2420 0042 AD00 lsls r5, r5, #2 + 2421 0044 0123 movs r3, #1 + 2422 0046 6355 strb r3, [r4, r5] +1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** __HAL_UNLOCK(hpcd); + 2423 .loc 1 1570 0 is_stmt 1 discriminator 2 + 2424 0048 1100 movs r1, r2 + 2425 004a 2068 ldr r0, [r4] + 2426 004c FFF7FEFF bl USB_EPClearStall + 2427 .LVL239: +1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2428 .loc 1 1571 0 discriminator 2 + ARM GAS /tmp/ccYuHakw.s page 78 + + + 2429 0050 0023 movs r3, #0 + 2430 0052 6355 strb r3, [r4, r5] +1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2431 .loc 1 1573 0 discriminator 2 + 2432 0054 0020 movs r0, #0 + 2433 0056 0BE0 b .L128 + 2434 .LVL240: + 2435 .L133: +1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** ep->is_in = 1U; + 2436 .loc 1 1557 0 + 2437 0058 0723 movs r3, #7 + 2438 005a 0B40 ands r3, r1 + 2439 005c 5B01 lsls r3, r3, #5 + 2440 005e 1A00 movs r2, r3 + 2441 0060 2832 adds r2, r2, #40 + 2442 0062 8218 adds r2, r0, r2 + 2443 .LVL241: +1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2444 .loc 1 1558 0 + 2445 0064 C318 adds r3, r0, r3 + 2446 0066 2933 adds r3, r3, #41 + 2447 0068 0120 movs r0, #1 + 2448 .LVL242: + 2449 006a 1870 strb r0, [r3] + 2450 006c DEE7 b .L130 + 2451 .LVL243: + 2452 .L131: +1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2453 .loc 1 1552 0 + 2454 006e 0120 movs r0, #1 + 2455 .LVL244: + 2456 .L128: +1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2457 .loc 1 1574 0 + 2458 @ sp needed + 2459 .LVL245: + 2460 0070 70BD pop {r4, r5, r6, pc} + 2461 .LVL246: + 2462 .L132: +1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** (void)USB_EPClearStall(hpcd->Instance, ep); + 2463 .loc 1 1569 0 + 2464 0072 0220 movs r0, #2 + 2465 0074 FCE7 b .L128 + 2466 .cfi_endproc + 2467 .LFE67: + 2469 .section .text.HAL_PCD_EP_Flush,"ax",%progbits + 2470 .align 1 + 2471 .global HAL_PCD_EP_Flush + 2472 .syntax unified + 2473 .code 16 + 2474 .thumb_func + 2475 .fpu softvfp + 2477 HAL_PCD_EP_Flush: + 2478 .LFB68: +1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** /* Prevent unused argument(s) compilation warning */ + 2479 .loc 1 1583 0 + 2480 .cfi_startproc + ARM GAS /tmp/ccYuHakw.s page 79 + + + 2481 @ args = 0, pretend = 0, frame = 0 + 2482 @ frame_needed = 0, uses_anonymous_args = 0 + 2483 @ link register save eliminated. + 2484 .LVL247: +1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2485 .loc 1 1589 0 + 2486 0000 0020 movs r0, #0 + 2487 .LVL248: + 2488 @ sp needed + 2489 0002 7047 bx lr + 2490 .cfi_endproc + 2491 .LFE68: + 2493 .section .text.HAL_PCD_ActivateRemoteWakeup,"ax",%progbits + 2494 .align 1 + 2495 .global HAL_PCD_ActivateRemoteWakeup + 2496 .syntax unified + 2497 .code 16 + 2498 .thumb_func + 2499 .fpu softvfp + 2501 HAL_PCD_ActivateRemoteWakeup: + 2502 .LFB69: +1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return (USB_ActivateRemoteWakeup(hpcd->Instance)); + 2503 .loc 1 1597 0 + 2504 .cfi_startproc + 2505 @ args = 0, pretend = 0, frame = 0 + 2506 @ frame_needed = 0, uses_anonymous_args = 0 + 2507 .LVL249: + 2508 0000 10B5 push {r4, lr} + 2509 .LCFI17: + 2510 .cfi_def_cfa_offset 8 + 2511 .cfi_offset 4, -8 + 2512 .cfi_offset 14, -4 +1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2513 .loc 1 1598 0 + 2514 0002 0068 ldr r0, [r0] + 2515 .LVL250: + 2516 0004 FFF7FEFF bl USB_ActivateRemoteWakeup + 2517 .LVL251: +1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2518 .loc 1 1599 0 + 2519 @ sp needed + 2520 0008 10BD pop {r4, pc} + 2521 .cfi_endproc + 2522 .LFE69: + 2524 .section .text.HAL_PCD_DeActivateRemoteWakeup,"ax",%progbits + 2525 .align 1 + 2526 .global HAL_PCD_DeActivateRemoteWakeup + 2527 .syntax unified + 2528 .code 16 + 2529 .thumb_func + 2530 .fpu softvfp + 2532 HAL_PCD_DeActivateRemoteWakeup: + 2533 .LFB70: +1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return (USB_DeActivateRemoteWakeup(hpcd->Instance)); + 2534 .loc 1 1607 0 + 2535 .cfi_startproc + 2536 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccYuHakw.s page 80 + + + 2537 @ frame_needed = 0, uses_anonymous_args = 0 + 2538 .LVL252: + 2539 0000 10B5 push {r4, lr} + 2540 .LCFI18: + 2541 .cfi_def_cfa_offset 8 + 2542 .cfi_offset 4, -8 + 2543 .cfi_offset 14, -4 +1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2544 .loc 1 1608 0 + 2545 0002 0068 ldr r0, [r0] + 2546 .LVL253: + 2547 0004 FFF7FEFF bl USB_DeActivateRemoteWakeup + 2548 .LVL254: +1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2549 .loc 1 1609 0 + 2550 @ sp needed + 2551 0008 10BD pop {r4, pc} + 2552 .cfi_endproc + 2553 .LFE70: + 2555 .section .text.HAL_PCD_GetState,"ax",%progbits + 2556 .align 1 + 2557 .global HAL_PCD_GetState + 2558 .syntax unified + 2559 .code 16 + 2560 .thumb_func + 2561 .fpu softvfp + 2563 HAL_PCD_GetState: + 2564 .LFB71: +1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** return hpcd->State; + 2565 .loc 1 1636 0 + 2566 .cfi_startproc + 2567 @ args = 0, pretend = 0, frame = 0 + 2568 @ frame_needed = 0, uses_anonymous_args = 0 + 2569 @ link register save eliminated. + 2570 .LVL255: +1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** } + 2571 .loc 1 1637 0 + 2572 0000 014B ldr r3, .L138 + 2573 0002 C05C ldrb r0, [r0, r3] + 2574 .LVL256: + 2575 0004 C0B2 uxtb r0, r0 +1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd.c **** + 2576 .loc 1 1638 0 + 2577 @ sp needed + 2578 0006 7047 bx lr + 2579 .L139: + 2580 .align 2 + 2581 .L138: + 2582 0008 29020000 .word 553 + 2583 .cfi_endproc + 2584 .LFE71: + 2586 .text + 2587 .Letext0: + 2588 .file 2 "/usr/include/newlib/machine/_default_types.h" + 2589 .file 3 "/usr/include/newlib/sys/_stdint.h" + 2590 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 2591 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + ARM GAS /tmp/ccYuHakw.s page 81 + + + 2592 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 2593 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h" + 2594 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h" + 2595 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 2596 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h" + ARM GAS /tmp/ccYuHakw.s page 82 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_pcd.c + /tmp/ccYuHakw.s:16 .text.HAL_PCD_MspInit:0000000000000000 $t + /tmp/ccYuHakw.s:23 .text.HAL_PCD_MspInit:0000000000000000 HAL_PCD_MspInit + /tmp/ccYuHakw.s:39 .text.HAL_PCD_Init:0000000000000000 $t + /tmp/ccYuHakw.s:46 .text.HAL_PCD_Init:0000000000000000 HAL_PCD_Init + /tmp/ccYuHakw.s:224 .text.HAL_PCD_Init:00000000000000d0 $d + /tmp/ccYuHakw.s:229 .text.HAL_PCD_MspDeInit:0000000000000000 $t + /tmp/ccYuHakw.s:236 .text.HAL_PCD_MspDeInit:0000000000000000 HAL_PCD_MspDeInit + /tmp/ccYuHakw.s:251 .text.HAL_PCD_Start:0000000000000000 $t + /tmp/ccYuHakw.s:258 .text.HAL_PCD_Start:0000000000000000 HAL_PCD_Start + /tmp/ccYuHakw.s:313 .text.HAL_PCD_Stop:0000000000000000 $t + /tmp/ccYuHakw.s:320 .text.HAL_PCD_Stop:0000000000000000 HAL_PCD_Stop + /tmp/ccYuHakw.s:375 .text.HAL_PCD_DeInit:0000000000000000 $t + /tmp/ccYuHakw.s:382 .text.HAL_PCD_DeInit:0000000000000000 HAL_PCD_DeInit + /tmp/ccYuHakw.s:429 .text.HAL_PCD_DeInit:0000000000000024 $d + /tmp/ccYuHakw.s:434 .text.HAL_PCD_DataOutStageCallback:0000000000000000 $t + /tmp/ccYuHakw.s:441 .text.HAL_PCD_DataOutStageCallback:0000000000000000 HAL_PCD_DataOutStageCallback + /tmp/ccYuHakw.s:456 .text.HAL_PCD_DataInStageCallback:0000000000000000 $t + /tmp/ccYuHakw.s:463 .text.HAL_PCD_DataInStageCallback:0000000000000000 HAL_PCD_DataInStageCallback + /tmp/ccYuHakw.s:478 .text.HAL_PCD_SetupStageCallback:0000000000000000 $t + /tmp/ccYuHakw.s:485 .text.HAL_PCD_SetupStageCallback:0000000000000000 HAL_PCD_SetupStageCallback + /tmp/ccYuHakw.s:500 .text.HAL_PCD_SOFCallback:0000000000000000 $t + /tmp/ccYuHakw.s:507 .text.HAL_PCD_SOFCallback:0000000000000000 HAL_PCD_SOFCallback + /tmp/ccYuHakw.s:522 .text.HAL_PCD_ResetCallback:0000000000000000 $t + /tmp/ccYuHakw.s:529 .text.HAL_PCD_ResetCallback:0000000000000000 HAL_PCD_ResetCallback + /tmp/ccYuHakw.s:544 .text.HAL_PCD_SuspendCallback:0000000000000000 $t + /tmp/ccYuHakw.s:551 .text.HAL_PCD_SuspendCallback:0000000000000000 HAL_PCD_SuspendCallback + /tmp/ccYuHakw.s:566 .text.HAL_PCD_ResumeCallback:0000000000000000 $t + /tmp/ccYuHakw.s:573 .text.HAL_PCD_ResumeCallback:0000000000000000 HAL_PCD_ResumeCallback + /tmp/ccYuHakw.s:588 .text.HAL_PCD_ISOOUTIncompleteCallback:0000000000000000 $t + /tmp/ccYuHakw.s:595 .text.HAL_PCD_ISOOUTIncompleteCallback:0000000000000000 HAL_PCD_ISOOUTIncompleteCallback + /tmp/ccYuHakw.s:610 .text.HAL_PCD_ISOINIncompleteCallback:0000000000000000 $t + /tmp/ccYuHakw.s:617 .text.HAL_PCD_ISOINIncompleteCallback:0000000000000000 HAL_PCD_ISOINIncompleteCallback + /tmp/ccYuHakw.s:632 .text.HAL_PCD_ConnectCallback:0000000000000000 $t + /tmp/ccYuHakw.s:639 .text.HAL_PCD_ConnectCallback:0000000000000000 HAL_PCD_ConnectCallback + /tmp/ccYuHakw.s:654 .text.HAL_PCD_DisconnectCallback:0000000000000000 $t + /tmp/ccYuHakw.s:661 .text.HAL_PCD_DisconnectCallback:0000000000000000 HAL_PCD_DisconnectCallback + /tmp/ccYuHakw.s:676 .text.HAL_PCD_DevConnect:0000000000000000 $t + /tmp/ccYuHakw.s:683 .text.HAL_PCD_DevConnect:0000000000000000 HAL_PCD_DevConnect + /tmp/ccYuHakw.s:734 .text.HAL_PCD_DevDisconnect:0000000000000000 $t + /tmp/ccYuHakw.s:741 .text.HAL_PCD_DevDisconnect:0000000000000000 HAL_PCD_DevDisconnect + /tmp/ccYuHakw.s:792 .text.HAL_PCD_SetAddress:0000000000000000 $t + /tmp/ccYuHakw.s:799 .text.HAL_PCD_SetAddress:0000000000000000 HAL_PCD_SetAddress + /tmp/ccYuHakw.s:853 .text.HAL_PCD_EP_Open:0000000000000000 $t + /tmp/ccYuHakw.s:860 .text.HAL_PCD_EP_Open:0000000000000000 HAL_PCD_EP_Open + /tmp/ccYuHakw.s:979 .text.HAL_PCD_EP_Close:0000000000000000 $t + /tmp/ccYuHakw.s:986 .text.HAL_PCD_EP_Close:0000000000000000 HAL_PCD_EP_Close + /tmp/ccYuHakw.s:1079 .text.HAL_PCD_EP_Receive:0000000000000000 $t + /tmp/ccYuHakw.s:1086 .text.HAL_PCD_EP_Receive:0000000000000000 HAL_PCD_EP_Receive + /tmp/ccYuHakw.s:1165 .text.HAL_PCD_EP_GetRxCount:0000000000000000 $t + /tmp/ccYuHakw.s:1172 .text.HAL_PCD_EP_GetRxCount:0000000000000000 HAL_PCD_EP_GetRxCount + /tmp/ccYuHakw.s:1197 .text.HAL_PCD_EP_Transmit:0000000000000000 $t + /tmp/ccYuHakw.s:1204 .text.HAL_PCD_EP_Transmit:0000000000000000 HAL_PCD_EP_Transmit + /tmp/ccYuHakw.s:1277 .text.PCD_EP_ISR_Handler:0000000000000000 $t + /tmp/ccYuHakw.s:1283 .text.PCD_EP_ISR_Handler:0000000000000000 PCD_EP_ISR_Handler + /tmp/ccYuHakw.s:1920 .text.PCD_EP_ISR_Handler:0000000000000374 $d + ARM GAS /tmp/ccYuHakw.s page 83 + + + /tmp/ccYuHakw.s:1934 .text.HAL_PCD_IRQHandler:0000000000000000 $t + /tmp/ccYuHakw.s:1941 .text.HAL_PCD_IRQHandler:0000000000000000 HAL_PCD_IRQHandler + /tmp/ccYuHakw.s:2219 .text.HAL_PCD_IRQHandler:0000000000000190 $d + /tmp/ccYuHakw.s:2230 .text.HAL_PCD_EP_SetStall:0000000000000000 $t + /tmp/ccYuHakw.s:2237 .text.HAL_PCD_EP_SetStall:0000000000000000 HAL_PCD_EP_SetStall + /tmp/ccYuHakw.s:2355 .text.HAL_PCD_EP_ClrStall:0000000000000000 $t + /tmp/ccYuHakw.s:2362 .text.HAL_PCD_EP_ClrStall:0000000000000000 HAL_PCD_EP_ClrStall + /tmp/ccYuHakw.s:2470 .text.HAL_PCD_EP_Flush:0000000000000000 $t + /tmp/ccYuHakw.s:2477 .text.HAL_PCD_EP_Flush:0000000000000000 HAL_PCD_EP_Flush + /tmp/ccYuHakw.s:2494 .text.HAL_PCD_ActivateRemoteWakeup:0000000000000000 $t + /tmp/ccYuHakw.s:2501 .text.HAL_PCD_ActivateRemoteWakeup:0000000000000000 HAL_PCD_ActivateRemoteWakeup + /tmp/ccYuHakw.s:2525 .text.HAL_PCD_DeActivateRemoteWakeup:0000000000000000 $t + /tmp/ccYuHakw.s:2532 .text.HAL_PCD_DeActivateRemoteWakeup:0000000000000000 HAL_PCD_DeActivateRemoteWakeup + /tmp/ccYuHakw.s:2556 .text.HAL_PCD_GetState:0000000000000000 $t + /tmp/ccYuHakw.s:2563 .text.HAL_PCD_GetState:0000000000000000 HAL_PCD_GetState + /tmp/ccYuHakw.s:2582 .text.HAL_PCD_GetState:0000000000000008 $d + +UNDEFINED SYMBOLS +USB_DisableGlobalInt +USB_DevInit +HAL_PCDEx_ActivateLPM +USB_DevConnect +USB_EnableGlobalInt +USB_StopDevice +USB_DevDisconnect +USB_SetDevAddress +USB_ActivateEndpoint +USB_DeactivateEndpoint +USB_EPStartXfer +USB_ReadPMA +USB_ReadInterrupts +HAL_PCDEx_LPM_Callback +USB_EPSetStall +USB_EP0_OutStart +USB_EPClearStall +USB_ActivateRemoteWakeup +USB_DeActivateRemoteWakeup diff --git a/fw/midi-dials/build/stm32f0xx_hal_pcd.o b/fw/midi-dials/build/stm32f0xx_hal_pcd.o Binary files differnew file mode 100644 index 0000000..68cc1e4 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pcd.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_pcd_ex.d b/fw/midi-dials/build/stm32f0xx_hal_pcd_ex.d new file mode 100644 index 0000000..99ce307 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pcd_ex.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_pcd_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_pcd_ex.lst b/fw/midi-dials/build/stm32f0xx_hal_pcd_ex.lst new file mode 100644 index 0000000..5d520d1 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pcd_ex.lst @@ -0,0 +1,877 @@ +ARM GAS /tmp/ccvcbbKR.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_pcd_ex.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_PCDEx_PMAConfig,"ax",%progbits + 16 .align 1 + 17 .global HAL_PCDEx_PMAConfig + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_PCDEx_PMAConfig: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @file stm32f0xx_hal_pcd_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief PCD Extended HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * functionalities of the USB Peripheral Controller: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * + Extended features functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ****************************************************************************** + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @attention + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * All rights reserved.</center></h2> + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * This software component is licensed by ST under BSD 3-Clause license, + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * the "License"; You may not use this file except in compliance with the + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * License. You may obtain a copy of the License at: + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * opensource.org/licenses/BSD-3-Clause + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ****************************************************************************** + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Includes ------------------------------------------------------------------*/ + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #include "stm32f0xx_hal.h" + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @{ + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** @defgroup PCDEx PCDEx + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief PCD Extended HAL module driver + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @{ + ARM GAS /tmp/ccvcbbKR.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #ifdef HAL_PCD_MODULE_ENABLED + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #if defined (USB) + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Private types -------------------------------------------------------------*/ + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Private variables ---------------------------------------------------------*/ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Private constants ---------------------------------------------------------*/ + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Private macros ------------------------------------------------------------*/ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Private functions ---------------------------------------------------------*/ + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Exported functions --------------------------------------------------------*/ + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** @defgroup PCDEx_Exported_Functions PCDEx Exported Functions + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @{ + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** @defgroup PCDEx_Exported_Functions_Group1 Peripheral Control functions + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief PCDEx control functions + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** @verbatim + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** =============================================================================== + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ##### Extended features functions ##### + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** =============================================================================== + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** [..] This section provides functions allowing to: + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** (+) Update FIFO configuration + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** @endverbatim + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @{ + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief Configure PMA for EP + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param hpcd Device instance + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param ep_addr endpoint address + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param ep_kind endpoint Kind + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * USB_SNG_BUF: Single Buffer used + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * USB_DBL_BUF: Double Buffer used + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param pmaadress: EP address in The PMA: In case of single buffer endpoint + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * this parameter is 16-bit value providing the address + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * in PMA allocated to endpoint. + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * In case of double buffer endpoint this parameter + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * is a 32-bit value providing the endpoint buffer 0 address + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * in the LSB part of 32-bit value and endpoint buffer 1 address + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * in the MSB part of 32-bit value. + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @retval HAL status + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** uint16_t ep_addr, + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** uint16_t ep_kind, + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** uint32_t pmaadress) + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 26 .loc 1 85 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + ARM GAS /tmp/ccvcbbKR.s page 3 + + + 31 0000 10B5 push {r4, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 8 + 34 .cfi_offset 4, -8 + 35 .cfi_offset 14, -4 + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** PCD_EPTypeDef *ep; + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* initialize ep structure*/ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** if ((0x80U & ep_addr) == 0x80U) + 36 .loc 1 89 0 + 37 0002 0C06 lsls r4, r1, #24 + 38 0004 0DD5 bpl .L2 + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK]; + 39 .loc 1 91 0 + 40 0006 0724 movs r4, #7 + 41 0008 2140 ands r1, r4 + 42 .LVL1: + 43 000a 4901 lsls r1, r1, #5 + 44 000c 2831 adds r1, r1, #40 + 45 000e 4018 adds r0, r0, r1 + 46 .LVL2: + 47 .L3: + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** else + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ep = &hpcd->OUT_ep[ep_addr]; + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Here we check if the endpoint is single or double Buffer*/ + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** if (ep_kind == PCD_SNG_BUF) + 48 .loc 1 99 0 + 49 0010 002A cmp r2, #0 + 50 0012 0BD0 beq .L6 + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Single Buffer */ + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ep->doublebuffer = 0U; + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Configure the PMA */ + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ep->pmaadress = (uint16_t)pmaadress; + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** else /* USB_DBL_BUF */ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Double Buffer Endpoint */ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ep->doublebuffer = 1U; + 51 .loc 1 109 0 + 52 0014 0122 movs r2, #1 + 53 .LVL3: + 54 0016 0273 strb r2, [r0, #12] + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Configure the PMA */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU); + 55 .loc 1 111 0 + 56 0018 0381 strh r3, [r0, #8] + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16); + 57 .loc 1 112 0 + 58 001a 1B0C lsrs r3, r3, #16 + 59 .LVL4: + 60 001c 4381 strh r3, [r0, #10] + ARM GAS /tmp/ccvcbbKR.s page 4 + + + 61 .L5: + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** return HAL_OK; + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 62 .loc 1 116 0 + 63 001e 0020 movs r0, #0 + 64 .LVL5: + 65 @ sp needed + 66 0020 10BD pop {r4, pc} + 67 .LVL6: + 68 .L2: + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 69 .loc 1 95 0 + 70 0022 4901 lsls r1, r1, #5 + 71 .LVL7: + 72 0024 2931 adds r1, r1, #41 + 73 0026 FF31 adds r1, r1, #255 + 74 0028 4018 adds r0, r0, r1 + 75 .LVL8: + 76 002a F1E7 b .L3 + 77 .L6: + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Configure the PMA */ + 78 .loc 1 102 0 + 79 002c 0273 strb r2, [r0, #12] + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 80 .loc 1 104 0 + 81 002e C380 strh r3, [r0, #6] + 82 0030 F5E7 b .L5 + 83 .cfi_endproc + 84 .LFE40: + 86 .section .text.HAL_PCDEx_ActivateBCD,"ax",%progbits + 87 .align 1 + 88 .global HAL_PCDEx_ActivateBCD + 89 .syntax unified + 90 .code 16 + 91 .thumb_func + 92 .fpu softvfp + 94 HAL_PCDEx_ActivateBCD: + 95 .LFB41: + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief Activate BatteryCharging feature. + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param hpcd PCD handle + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @retval HAL status + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd) + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 96 .loc 1 124 0 + 97 .cfi_startproc + 98 @ args = 0, pretend = 0, frame = 0 + 99 @ frame_needed = 0, uses_anonymous_args = 0 + 100 @ link register save eliminated. + 101 .LVL9: + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USB_TypeDef *USBx = hpcd->Instance; + 102 .loc 1 125 0 + 103 0000 0268 ldr r2, [r0] + ARM GAS /tmp/ccvcbbKR.s page 5 + + + 104 .LVL10: + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->battery_charging_active = 1U; + 105 .loc 1 126 0 + 106 0002 9B23 movs r3, #155 + 107 0004 9B00 lsls r3, r3, #2 + 108 0006 0121 movs r1, #1 + 109 0008 C150 str r1, [r0, r3] + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Enable BCD feature */ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR |= USB_BCDR_BCDEN; + 110 .loc 1 129 0 + 111 000a 5823 movs r3, #88 + 112 000c D15A ldrh r1, [r2, r3] + 113 000e 0120 movs r0, #1 + 114 .LVL11: + 115 0010 0143 orrs r1, r0 + 116 0012 D152 strh r1, [r2, r3] + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Enable DCD : Data Contact Detect */ + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR &= ~(USB_BCDR_PDEN); + 117 .loc 1 132 0 + 118 0014 D15A ldrh r1, [r2, r3] + 119 0016 0420 movs r0, #4 + 120 0018 8143 bics r1, r0 + 121 001a D152 strh r1, [r2, r3] + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR &= ~(USB_BCDR_SDEN); + 122 .loc 1 133 0 + 123 001c D15A ldrh r1, [r2, r3] + 124 001e 0430 adds r0, r0, #4 + 125 0020 8143 bics r1, r0 + 126 0022 D152 strh r1, [r2, r3] + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR |= USB_BCDR_DCDEN; + 127 .loc 1 134 0 + 128 0024 D15A ldrh r1, [r2, r3] + 129 0026 0220 movs r0, #2 + 130 0028 0143 orrs r1, r0 + 131 002a D152 strh r1, [r2, r3] + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** return HAL_OK; + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 132 .loc 1 137 0 + 133 002c 0020 movs r0, #0 + 134 @ sp needed + 135 002e 7047 bx lr + 136 .cfi_endproc + 137 .LFE41: + 139 .section .text.HAL_PCDEx_DeActivateBCD,"ax",%progbits + 140 .align 1 + 141 .global HAL_PCDEx_DeActivateBCD + 142 .syntax unified + 143 .code 16 + 144 .thumb_func + 145 .fpu softvfp + 147 HAL_PCDEx_DeActivateBCD: + 148 .LFB42: + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** + ARM GAS /tmp/ccvcbbKR.s page 6 + + + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief Deactivate BatteryCharging feature. + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param hpcd PCD handle + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @retval HAL status + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd) + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 149 .loc 1 145 0 + 150 .cfi_startproc + 151 @ args = 0, pretend = 0, frame = 0 + 152 @ frame_needed = 0, uses_anonymous_args = 0 + 153 @ link register save eliminated. + 154 .LVL12: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USB_TypeDef *USBx = hpcd->Instance; + 155 .loc 1 146 0 + 156 0000 0168 ldr r1, [r0] + 157 .LVL13: + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->battery_charging_active = 0U; + 158 .loc 1 147 0 + 159 0002 9B23 movs r3, #155 + 160 0004 9B00 lsls r3, r3, #2 + 161 0006 0022 movs r2, #0 + 162 0008 C250 str r2, [r0, r3] + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Disable BCD feature */ + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR &= ~(USB_BCDR_BCDEN); + 163 .loc 1 150 0 + 164 000a 5832 adds r2, r2, #88 + 165 000c 8B5A ldrh r3, [r1, r2] + 166 000e 0120 movs r0, #1 + 167 .LVL14: + 168 0010 8343 bics r3, r0 + 169 0012 8B52 strh r3, [r1, r2] + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** return HAL_OK; + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 170 .loc 1 153 0 + 171 0014 0020 movs r0, #0 + 172 @ sp needed + 173 0016 7047 bx lr + 174 .cfi_endproc + 175 .LFE42: + 177 .section .text.HAL_PCDEx_ActivateLPM,"ax",%progbits + 178 .align 1 + 179 .global HAL_PCDEx_ActivateLPM + 180 .syntax unified + 181 .code 16 + 182 .thumb_func + 183 .fpu softvfp + 185 HAL_PCDEx_ActivateLPM: + 186 .LFB44: + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief Handle BatteryCharging Process. + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param hpcd PCD handle + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @retval HAL status + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd) + ARM GAS /tmp/ccvcbbKR.s page 7 + + + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USB_TypeDef *USBx = hpcd->Instance; + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** uint32_t tickstart = HAL_GetTick(); + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Wait Detect flag or a timeout is happen*/ + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** while ((USBx->BCDR & USB_BCDR_DCDET) == 0U) + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Check for the Timeout */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** if ((HAL_GetTick() - tickstart) > 1000U) + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->BCDCallback(hpcd, PCD_BCD_ERROR); + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #else + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_ERROR); + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** return; + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_Delay(200U); + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Data Pin Contact ? Check Detect flag */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** if ((USBx->BCDR & USB_BCDR_DCDET) == USB_BCDR_DCDET) + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->BCDCallback(hpcd, PCD_BCD_CONTACT_DETECTION); + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #else + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CONTACT_DETECTION); + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Primary detection: checks if connected to Standard Downstream Port + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** (without charging capability) */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR &= ~(USB_BCDR_DCDEN); + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_Delay(50U); + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR |= (USB_BCDR_PDEN); + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_Delay(50U); + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* If Charger detect ? */ + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** if ((USBx->BCDR & USB_BCDR_PDET) == USB_BCDR_PDET) + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Start secondary detection to check connection to Charging Downstream + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** Port or Dedicated Charging Port */ + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR &= ~(USB_BCDR_PDEN); + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_Delay(50U); + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR |= (USB_BCDR_SDEN); + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_Delay(50U); + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* If CDP ? */ + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** if ((USBx->BCDR & USB_BCDR_SDET) == USB_BCDR_SDET) + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Dedicated Downstream Port DCP */ + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->BCDCallback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #else + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DEDICATED_CHARGING_PORT); + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + ARM GAS /tmp/ccvcbbKR.s page 8 + + + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** else + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Charging Downstream Port CDP */ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->BCDCallback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #else + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_CHARGING_DOWNSTREAM_PORT); + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** else /* NO */ + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Standard Downstream Port */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->BCDCallback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #else + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_STD_DOWNSTREAM_PORT); + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Battery Charging capability discovery finished Start Enumeration */ + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** (void)HAL_PCDEx_DeActivateBCD(hpcd); + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->BCDCallback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #else + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_PCDEx_BCD_Callback(hpcd, PCD_BCD_DISCOVERY_COMPLETED); + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief Activate LPM feature. + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param hpcd PCD handle + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @retval HAL status + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd) + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 187 .loc 1 255 0 + 188 .cfi_startproc + 189 @ args = 0, pretend = 0, frame = 0 + 190 @ frame_needed = 0, uses_anonymous_args = 0 + 191 @ link register save eliminated. + 192 .LVL15: + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USB_TypeDef *USBx = hpcd->Instance; + 193 .loc 1 257 0 + 194 0000 0268 ldr r2, [r0] + 195 .LVL16: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->lpm_active = 1U; + 196 .loc 1 258 0 + 197 0002 9A23 movs r3, #154 + 198 0004 9B00 lsls r3, r3, #2 + 199 0006 0121 movs r1, #1 + 200 0008 C150 str r1, [r0, r3] + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->LPM_State = LPM_L0; + 201 .loc 1 259 0 + ARM GAS /tmp/ccvcbbKR.s page 9 + + + 202 000a 083B subs r3, r3, #8 + 203 000c 0021 movs r1, #0 + 204 000e C154 strb r1, [r0, r3] + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->LPMCSR |= USB_LPMCSR_LMPEN; + 205 .loc 1 261 0 + 206 0010 5423 movs r3, #84 + 207 0012 D15A ldrh r1, [r2, r3] + 208 0014 0120 movs r0, #1 + 209 .LVL17: + 210 0016 0143 orrs r1, r0 + 211 0018 D152 strh r1, [r2, r3] + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->LPMCSR |= USB_LPMCSR_LPMACK; + 212 .loc 1 262 0 + 213 001a D15A ldrh r1, [r2, r3] + 214 001c 0220 movs r0, #2 + 215 001e 0143 orrs r1, r0 + 216 0020 D152 strh r1, [r2, r3] + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** return HAL_OK; + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 217 .loc 1 265 0 + 218 0022 0020 movs r0, #0 + 219 @ sp needed + 220 0024 7047 bx lr + 221 .cfi_endproc + 222 .LFE44: + 224 .section .text.HAL_PCDEx_DeActivateLPM,"ax",%progbits + 225 .align 1 + 226 .global HAL_PCDEx_DeActivateLPM + 227 .syntax unified + 228 .code 16 + 229 .thumb_func + 230 .fpu softvfp + 232 HAL_PCDEx_DeActivateLPM: + 233 .LFB45: + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief Deactivate LPM feature. + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param hpcd PCD handle + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @retval HAL status + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd) + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 234 .loc 1 273 0 + 235 .cfi_startproc + 236 @ args = 0, pretend = 0, frame = 0 + 237 @ frame_needed = 0, uses_anonymous_args = 0 + 238 @ link register save eliminated. + 239 .LVL18: + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USB_TypeDef *USBx = hpcd->Instance; + 240 .loc 1 274 0 + 241 0000 0268 ldr r2, [r0] + 242 .LVL19: + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** hpcd->lpm_active = 0U; + 243 .loc 1 276 0 + ARM GAS /tmp/ccvcbbKR.s page 10 + + + 244 0002 9A23 movs r3, #154 + 245 0004 9B00 lsls r3, r3, #2 + 246 0006 0021 movs r1, #0 + 247 0008 C150 str r1, [r0, r3] + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->LPMCSR &= ~(USB_LPMCSR_LMPEN); + 248 .loc 1 278 0 + 249 000a 5423 movs r3, #84 + 250 000c D15A ldrh r1, [r2, r3] + 251 000e 0120 movs r0, #1 + 252 .LVL20: + 253 0010 8143 bics r1, r0 + 254 0012 D152 strh r1, [r2, r3] + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->LPMCSR &= ~(USB_LPMCSR_LPMACK); + 255 .loc 1 279 0 + 256 0014 D15A ldrh r1, [r2, r3] + 257 0016 0130 adds r0, r0, #1 + 258 0018 8143 bics r1, r0 + 259 001a D152 strh r1, [r2, r3] + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** return HAL_OK; + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 260 .loc 1 282 0 + 261 001c 0020 movs r0, #0 + 262 @ sp needed + 263 001e 7047 bx lr + 264 .cfi_endproc + 265 .LFE45: + 267 .section .text.HAL_PCDEx_LPM_Callback,"ax",%progbits + 268 .align 1 + 269 .weak HAL_PCDEx_LPM_Callback + 270 .syntax unified + 271 .code 16 + 272 .thumb_func + 273 .fpu softvfp + 275 HAL_PCDEx_LPM_Callback: + 276 .LFB46: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief Send LPM message to user layer callback. + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param hpcd PCD handle + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param msg LPM message + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @retval HAL status + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** __weak void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg) + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 277 .loc 1 293 0 + 278 .cfi_startproc + 279 @ args = 0, pretend = 0, frame = 0 + 280 @ frame_needed = 0, uses_anonymous_args = 0 + 281 @ link register save eliminated. + 282 .LVL21: + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Prevent unused argument(s) compilation warning */ + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** UNUSED(hpcd); + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** UNUSED(msg); + ARM GAS /tmp/ccvcbbKR.s page 11 + + + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** the HAL_PCDEx_LPM_Callback could be implemented in the user file + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 283 .loc 1 301 0 + 284 @ sp needed + 285 0000 7047 bx lr + 286 .cfi_endproc + 287 .LFE46: + 289 .section .text.HAL_PCDEx_BCD_Callback,"ax",%progbits + 290 .align 1 + 291 .weak HAL_PCDEx_BCD_Callback + 292 .syntax unified + 293 .code 16 + 294 .thumb_func + 295 .fpu softvfp + 297 HAL_PCDEx_BCD_Callback: + 298 .LFB47: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /** + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @brief Send BatteryCharging message to user layer callback. + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param hpcd PCD handle + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @param msg LPM message + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** * @retval HAL status + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** __weak void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg) + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 299 .loc 1 310 0 + 300 .cfi_startproc + 301 @ args = 0, pretend = 0, frame = 0 + 302 @ frame_needed = 0, uses_anonymous_args = 0 + 303 @ link register save eliminated. + 304 .LVL22: + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* Prevent unused argument(s) compilation warning */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** UNUSED(hpcd); + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** UNUSED(msg); + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** the HAL_PCDEx_BCD_Callback could be implemented in the user file + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** */ + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 305 .loc 1 318 0 + 306 @ sp needed + 307 0000 7047 bx lr + 308 .cfi_endproc + 309 .LFE47: + 311 .section .text.HAL_PCDEx_BCD_VBUSDetect,"ax",%progbits + 312 .align 1 + 313 .global HAL_PCDEx_BCD_VBUSDetect + 314 .syntax unified + 315 .code 16 + 316 .thumb_func + 317 .fpu softvfp + 319 HAL_PCDEx_BCD_VBUSDetect: + 320 .LFB43: + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USB_TypeDef *USBx = hpcd->Instance; + ARM GAS /tmp/ccvcbbKR.s page 12 + + + 321 .loc 1 161 0 + 322 .cfi_startproc + 323 @ args = 0, pretend = 0, frame = 0 + 324 @ frame_needed = 0, uses_anonymous_args = 0 + 325 .LVL23: + 326 0000 70B5 push {r4, r5, r6, lr} + 327 .LCFI1: + 328 .cfi_def_cfa_offset 16 + 329 .cfi_offset 4, -16 + 330 .cfi_offset 5, -12 + 331 .cfi_offset 6, -8 + 332 .cfi_offset 14, -4 + 333 0002 0600 movs r6, r0 + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** uint32_t tickstart = HAL_GetTick(); + 334 .loc 1 162 0 + 335 0004 0468 ldr r4, [r0] + 336 .LVL24: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 337 .loc 1 163 0 + 338 0006 FFF7FEFF bl HAL_GetTick + 339 .LVL25: + 340 000a 0500 movs r5, r0 + 341 .LVL26: + 342 .L14: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 343 .loc 1 166 0 + 344 000c 5823 movs r3, #88 + 345 000e E35A ldrh r3, [r4, r3] + 346 0010 DB06 lsls r3, r3, #27 + 347 0012 0BD4 bmi .L21 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 348 .loc 1 169 0 + 349 0014 FFF7FEFF bl HAL_GetTick + 350 .LVL27: + 351 0018 401B subs r0, r0, r5 + 352 001a FA23 movs r3, #250 + 353 001c 9B00 lsls r3, r3, #2 + 354 001e 9842 cmp r0, r3 + 355 0020 F4D9 bls .L14 + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 356 .loc 1 174 0 + 357 0022 FF21 movs r1, #255 + 358 0024 3000 movs r0, r6 + 359 0026 FFF7FEFF bl HAL_PCDEx_BCD_Callback + 360 .LVL28: + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** } + 361 .loc 1 177 0 + 362 002a 43E0 b .L13 + 363 .L21: + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 364 .loc 1 181 0 + 365 002c C820 movs r0, #200 + 366 002e FFF7FEFF bl HAL_Delay + 367 .LVL29: + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 368 .loc 1 184 0 + 369 0032 5823 movs r3, #88 + ARM GAS /tmp/ccvcbbKR.s page 13 + + + 370 0034 E35A ldrh r3, [r4, r3] + 371 0036 DB06 lsls r3, r3, #27 + 372 0038 27D4 bmi .L22 + 373 .L17: + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_Delay(50U); + 374 .loc 1 194 0 + 375 003a 5825 movs r5, #88 + 376 .LVL30: + 377 003c 635B ldrh r3, [r4, r5] + 378 003e 0222 movs r2, #2 + 379 0040 9343 bics r3, r2 + 380 0042 6353 strh r3, [r4, r5] + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR |= (USB_BCDR_PDEN); + 381 .loc 1 195 0 + 382 0044 3220 movs r0, #50 + 383 0046 FFF7FEFF bl HAL_Delay + 384 .LVL31: + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_Delay(50U); + 385 .loc 1 196 0 + 386 004a 635B ldrh r3, [r4, r5] + 387 004c 0422 movs r2, #4 + 388 004e 1343 orrs r3, r2 + 389 0050 6353 strh r3, [r4, r5] + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 390 .loc 1 197 0 + 391 0052 3220 movs r0, #50 + 392 0054 FFF7FEFF bl HAL_Delay + 393 .LVL32: + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 394 .loc 1 200 0 + 395 0058 635B ldrh r3, [r4, r5] + 396 005a 9B06 lsls r3, r3, #26 + 397 005c 1FD5 bpl .L18 + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_Delay(50U); + 398 .loc 1 204 0 + 399 005e 635B ldrh r3, [r4, r5] + 400 0060 0422 movs r2, #4 + 401 0062 9343 bics r3, r2 + 402 0064 6353 strh r3, [r4, r5] + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** USBx->BCDR |= (USB_BCDR_SDEN); + 403 .loc 1 205 0 + 404 0066 3220 movs r0, #50 + 405 0068 FFF7FEFF bl HAL_Delay + 406 .LVL33: + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** HAL_Delay(50U); + 407 .loc 1 206 0 + 408 006c 635B ldrh r3, [r4, r5] + 409 006e 0822 movs r2, #8 + 410 0070 1343 orrs r3, r2 + 411 0072 6353 strh r3, [r4, r5] + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 412 .loc 1 207 0 + 413 0074 3220 movs r0, #50 + 414 0076 FFF7FEFF bl HAL_Delay + 415 .LVL34: + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** { + 416 .loc 1 210 0 + ARM GAS /tmp/ccvcbbKR.s page 14 + + + 417 007a 635B ldrh r3, [r4, r5] + 418 007c 5B06 lsls r3, r3, #25 + 419 007e 09D5 bpl .L19 + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 420 .loc 1 216 0 + 421 0080 FB21 movs r1, #251 + 422 0082 3000 movs r0, r6 + 423 0084 FFF7FEFF bl HAL_PCDEx_BCD_Callback + 424 .LVL35: + 425 0088 0DE0 b .L20 + 426 .LVL36: + 427 .L22: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 428 .loc 1 189 0 + 429 008a FE21 movs r1, #254 + 430 008c 3000 movs r0, r6 + 431 008e FFF7FEFF bl HAL_PCDEx_BCD_Callback + 432 .LVL37: + 433 0092 D2E7 b .L17 + 434 .LVL38: + 435 .L19: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 436 .loc 1 225 0 + 437 0094 FC21 movs r1, #252 + 438 0096 3000 movs r0, r6 + 439 0098 FFF7FEFF bl HAL_PCDEx_BCD_Callback + 440 .LVL39: + 441 009c 03E0 b .L20 + 442 .L18: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 443 .loc 1 235 0 + 444 009e FD21 movs r1, #253 + 445 00a0 3000 movs r0, r6 + 446 00a2 FFF7FEFF bl HAL_PCDEx_BCD_Callback + 447 .LVL40: + 448 .L20: + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U) + 449 .loc 1 240 0 + 450 00a6 3000 movs r0, r6 + 451 00a8 FFF7FEFF bl HAL_PCDEx_DeActivateBCD + 452 .LVL41: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */ + 453 .loc 1 244 0 + 454 00ac 0021 movs r1, #0 + 455 00ae 3000 movs r0, r6 + 456 00b0 FFF7FEFF bl HAL_PCDEx_BCD_Callback + 457 .LVL42: + 458 .L13: + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pcd_ex.c **** + 459 .loc 1 246 0 + 460 @ sp needed + 461 .LVL43: + 462 .LVL44: + 463 00b4 70BD pop {r4, r5, r6, pc} + 464 .cfi_endproc + 465 .LFE43: + 467 .text + ARM GAS /tmp/ccvcbbKR.s page 15 + + + 468 .Letext0: + 469 .file 2 "/usr/include/newlib/machine/_default_types.h" + 470 .file 3 "/usr/include/newlib/sys/_stdint.h" + 471 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 472 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 473 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 474 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h" + 475 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h" + 476 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccvcbbKR.s page 16 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_pcd_ex.c + /tmp/ccvcbbKR.s:16 .text.HAL_PCDEx_PMAConfig:0000000000000000 $t + /tmp/ccvcbbKR.s:23 .text.HAL_PCDEx_PMAConfig:0000000000000000 HAL_PCDEx_PMAConfig + /tmp/ccvcbbKR.s:87 .text.HAL_PCDEx_ActivateBCD:0000000000000000 $t + /tmp/ccvcbbKR.s:94 .text.HAL_PCDEx_ActivateBCD:0000000000000000 HAL_PCDEx_ActivateBCD + /tmp/ccvcbbKR.s:140 .text.HAL_PCDEx_DeActivateBCD:0000000000000000 $t + /tmp/ccvcbbKR.s:147 .text.HAL_PCDEx_DeActivateBCD:0000000000000000 HAL_PCDEx_DeActivateBCD + /tmp/ccvcbbKR.s:178 .text.HAL_PCDEx_ActivateLPM:0000000000000000 $t + /tmp/ccvcbbKR.s:185 .text.HAL_PCDEx_ActivateLPM:0000000000000000 HAL_PCDEx_ActivateLPM + /tmp/ccvcbbKR.s:225 .text.HAL_PCDEx_DeActivateLPM:0000000000000000 $t + /tmp/ccvcbbKR.s:232 .text.HAL_PCDEx_DeActivateLPM:0000000000000000 HAL_PCDEx_DeActivateLPM + /tmp/ccvcbbKR.s:268 .text.HAL_PCDEx_LPM_Callback:0000000000000000 $t + /tmp/ccvcbbKR.s:275 .text.HAL_PCDEx_LPM_Callback:0000000000000000 HAL_PCDEx_LPM_Callback + /tmp/ccvcbbKR.s:290 .text.HAL_PCDEx_BCD_Callback:0000000000000000 $t + /tmp/ccvcbbKR.s:297 .text.HAL_PCDEx_BCD_Callback:0000000000000000 HAL_PCDEx_BCD_Callback + /tmp/ccvcbbKR.s:312 .text.HAL_PCDEx_BCD_VBUSDetect:0000000000000000 $t + /tmp/ccvcbbKR.s:319 .text.HAL_PCDEx_BCD_VBUSDetect:0000000000000000 HAL_PCDEx_BCD_VBUSDetect + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_Delay diff --git a/fw/midi-dials/build/stm32f0xx_hal_pcd_ex.o b/fw/midi-dials/build/stm32f0xx_hal_pcd_ex.o Binary files differnew file mode 100644 index 0000000..c601674 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pcd_ex.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_pwr.d b/fw/midi-dials/build/stm32f0xx_hal_pwr.d new file mode 100644 index 0000000..90f1e7a --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pwr.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_pwr.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_pwr.lst b/fw/midi-dials/build/stm32f0xx_hal_pwr.lst new file mode 100644 index 0000000..23c2fe9 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pwr.lst @@ -0,0 +1,1014 @@ +ARM GAS /tmp/ccVEwfab.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_pwr.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_PWR_DeInit,"ax",%progbits + 16 .align 1 + 17 .global HAL_PWR_DeInit + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_PWR_DeInit: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @file stm32f0xx_hal_pwr.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief PWR HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * functionalities of the Power Controller (PWR) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + Initialization/de-initialization function + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + Peripheral Control function + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @verbatim + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ****************************************************************************** + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @attention + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * All rights reserved.</center></h2> + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This software component is licensed by ST under BSD 3-Clause license, + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * the "License"; You may not use this file except in compliance with the + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * License. You may obtain a copy of the License at: + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * opensource.org/licenses/BSD-3-Clause + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ****************************************************************************** + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Includes ------------------------------------------------------------------*/ + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #include "stm32f0xx_hal.h" + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @addtogroup STM32F0xx_HAL_Driver + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @defgroup PWR PWR + ARM GAS /tmp/ccVEwfab.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief PWR HAL module driver + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #ifdef HAL_PWR_MODULE_ENABLED + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private typedef -----------------------------------------------------------*/ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private define ------------------------------------------------------------*/ + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private macro -------------------------------------------------------------*/ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private variables ---------------------------------------------------------*/ + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private function prototypes -----------------------------------------------*/ + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Private functions ---------------------------------------------------------*/ + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions PWR Exported Functions + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Initialization and de-initialization functions + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @verbatim + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ##### Initialization and de-initialization functions ##### + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** After reset, the backup domain (RTC registers, RTC backup data + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** registers) is protected against possible unwanted + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** write accesses. + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** To enable access to the RTC Domain and RTC registers, proceed as follows: + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Enable the Power Controller (PWR) APB1 interface clock using the + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __HAL_RCC_PWR_CLK_ENABLE() macro. + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function. + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @endverbatim + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Deinitializes the PWR peripheral registers to their default reset values. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DeInit(void) + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 26 .loc 1 76 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __HAL_RCC_PWR_FORCE_RESET(); + 31 .loc 1 77 0 + 32 0000 054B ldr r3, .L2 + 33 0002 1969 ldr r1, [r3, #16] + 34 0004 8022 movs r2, #128 + 35 0006 5205 lsls r2, r2, #21 + 36 0008 0A43 orrs r2, r1 + 37 000a 1A61 str r2, [r3, #16] + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __HAL_RCC_PWR_RELEASE_RESET(); + ARM GAS /tmp/ccVEwfab.s page 3 + + + 38 .loc 1 78 0 + 39 000c 1A69 ldr r2, [r3, #16] + 40 000e 0349 ldr r1, .L2+4 + 41 0010 0A40 ands r2, r1 + 42 0012 1A61 str r2, [r3, #16] + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 43 .loc 1 79 0 + 44 @ sp needed + 45 0014 7047 bx lr + 46 .L3: + 47 0016 C046 .align 2 + 48 .L2: + 49 0018 00100240 .word 1073876992 + 50 001c FFFFFFEF .word -268435457 + 51 .cfi_endproc + 52 .LFE40: + 54 .section .text.HAL_PWR_EnableBkUpAccess,"ax",%progbits + 55 .align 1 + 56 .global HAL_PWR_EnableBkUpAccess + 57 .syntax unified + 58 .code 16 + 59 .thumb_func + 60 .fpu softvfp + 62 HAL_PWR_EnableBkUpAccess: + 63 .LFB41: + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enables access to the backup domain (RTC registers, RTC + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * backup data registers when present). + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableBkUpAccess(void) + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 64 .loc 1 89 0 + 65 .cfi_startproc + 66 @ args = 0, pretend = 0, frame = 0 + 67 @ frame_needed = 0, uses_anonymous_args = 0 + 68 @ link register save eliminated. + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR |= (uint32_t)PWR_CR_DBP; + 69 .loc 1 90 0 + 70 0000 034A ldr r2, .L5 + 71 0002 1168 ldr r1, [r2] + 72 0004 8023 movs r3, #128 + 73 0006 5B00 lsls r3, r3, #1 + 74 0008 0B43 orrs r3, r1 + 75 000a 1360 str r3, [r2] + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 76 .loc 1 91 0 + 77 @ sp needed + 78 000c 7047 bx lr + 79 .L6: + 80 000e C046 .align 2 + 81 .L5: + 82 0010 00700040 .word 1073770496 + 83 .cfi_endproc + ARM GAS /tmp/ccVEwfab.s page 4 + + + 84 .LFE41: + 86 .section .text.HAL_PWR_DisableBkUpAccess,"ax",%progbits + 87 .align 1 + 88 .global HAL_PWR_DisableBkUpAccess + 89 .syntax unified + 90 .code 16 + 91 .thumb_func + 92 .fpu softvfp + 94 HAL_PWR_DisableBkUpAccess: + 95 .LFB42: + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables access to the backup domain (RTC registers, RTC + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * backup data registers when present). + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note If the HSE divided by 32 is used as the RTC clock, the + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Backup Domain Access should be kept enabled. + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableBkUpAccess(void) + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 96 .loc 1 101 0 + 97 .cfi_startproc + 98 @ args = 0, pretend = 0, frame = 0 + 99 @ frame_needed = 0, uses_anonymous_args = 0 + 100 @ link register save eliminated. + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR &= ~((uint32_t)PWR_CR_DBP); + 101 .loc 1 102 0 + 102 0000 024A ldr r2, .L8 + 103 0002 1368 ldr r3, [r2] + 104 0004 0249 ldr r1, .L8+4 + 105 0006 0B40 ands r3, r1 + 106 0008 1360 str r3, [r2] + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 107 .loc 1 103 0 + 108 @ sp needed + 109 000a 7047 bx lr + 110 .L9: + 111 .align 2 + 112 .L8: + 113 000c 00700040 .word 1073770496 + 114 0010 FFFEFFFF .word -257 + 115 .cfi_endproc + 116 .LFE42: + 118 .section .text.HAL_PWR_EnableWakeUpPin,"ax",%progbits + 119 .align 1 + 120 .global HAL_PWR_EnableWakeUpPin + 121 .syntax unified + 122 .code 16 + 123 .thumb_func + 124 .fpu softvfp + 126 HAL_PWR_EnableWakeUpPin: + 127 .LFB43: + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @} + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + ARM GAS /tmp/ccVEwfab.s page 5 + + + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Low Power modes configuration functions + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @verbatim + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ##### Peripheral Control functions ##### + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** =============================================================================== + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** WakeUp pin configuration *** + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ================================ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) WakeUp pin is used to wakeup the system from Standby mode. This pin is + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** forced in input pull down configuration and is active on rising edges. + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) There are two WakeUp pins, and up to eight Wakeup pins on STM32F07x & STM32F09x devices. + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 1 on PA.00. + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 2 on PC.13. + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 3 on PE.06.(STM32F07x/STM32F09x) + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 4 on PA.02.(STM32F07x/STM32F09x) + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 5 on PC.05.(STM32F07x/STM32F09x) + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 6 on PB.05.(STM32F07x/STM32F09x) + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 7 on PB.15.(STM32F07x/STM32F09x) + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++)WakeUp Pin 8 on PF.02.(STM32F07x/STM32F09x) + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Low Power modes configuration *** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ===================================== + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The devices feature 3 low-power modes: + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Sleep mode: Cortex-M0 core stopped, peripherals kept running. + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Stop mode: all clocks are stopped, regulator running, regulator + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** in low power mode + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Standby mode: 1.2V domain powered off (mode not available on STM32F0x8 devices). + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Sleep mode *** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ================== + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Entry: + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_S + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** functions with + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Exit: + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Any peripheral interrupt acknowledged by the nested vectored interrupt + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** controller (NVIC) can wake up the device from Sleep mode. + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Stop mode *** + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ================= + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** In Stop mode, all clocks in the 1.8V domain are stopped, the PLL, the HSI, + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** and the HSE RC oscillators are disabled. Internal SRAM and register contents + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** are preserved. + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The voltage regulator can be configured either in normal or low-power mode. + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** To minimize the consumption. + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Entry: + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The Stop mode is entered using the HAL_PWR_EnterSTOPMode(PWR_MAINREGULATOR_ON, PWR_STOPEN + ARM GAS /tmp/ccVEwfab.s page 6 + + + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** function with: + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Main regulator ON. + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Low Power regulator ON. + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFI: enter STOP mode with WFI instruction + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) PWR_STOPENTRY_WFE: enter STOP mode with WFE instruction + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Exit: + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Any EXTI Line (Internal or External) configured in Interrupt/Event mode. + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) Some specific communication peripherals (CEC, USART, I2C) interrupts, + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** when programmed in wakeup mode (the peripheral must be + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** programmed in wakeup mode and the corresponding interrupt vector + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** must be enabled in the NVIC) + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Standby mode *** + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ==================== + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The Standby mode allows to achieve the lowest power consumption. It is based + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** on the Cortex-M0 deep sleep mode, with the voltage regulator disabled. + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The 1.8V domain is consequently powered off. The PLL, the HSI oscillator and + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** the HSE oscillator are also switched off. SRAM and register contents are lost + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** except for the RTC registers, RTC backup registers and Standby circuitry. + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The voltage regulator is OFF. + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Entry: + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) The Standby mode is entered using the HAL_PWR_EnterSTANDBYMode() function. + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Exit: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) WKUP pin rising edge, RTC alarm (Alarm A), RTC wakeup, + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tamper event, time-stamp event, external reset in NRST pin, IWDG reset. + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** *** Auto-wakeup (AWU) from low-power mode *** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** ============================================= + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** [..] + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** Wakeup event, a tamper event, a time-stamp event, or a comparator event, + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** without depending on an external interrupt (Auto-wakeup mode). + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) RTC auto-wakeup (AWU) from the Stop and Standby modes + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function. + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** is necessary to configure the RTC to detect the tamper or time stamp event using the + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** HAL_RTC_SetTimeStamp_IT() or HAL_RTC_SetTamper_IT() functions. + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** configure the RTC to generate the RTC WakeUp event using the HAL_RTC_SetWakeUpTimer_IT() + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+) Comparator auto-wakeup (AWU) from the Stop mode + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (++) To wake up from the Stop mode with a comparator wakeup event, it is necessary to: + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+++) Configure the EXTI Line associated with the comparator (example EXTI Line 22 for c + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** to be sensitive to to the selected edges (falling, rising or falling + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** and rising) (Interrupt or Event modes) using the EXTI_Init() function. + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** (+++) Configure the comparator to generate the event. + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** @endverbatim + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @{ + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + ARM GAS /tmp/ccVEwfab.s page 7 + + + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enables the WakeUp PINx functionality. + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to enable. + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be value of : + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @ref PWREx_WakeUp_Pins + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx) + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 128 .loc 1 232 0 + 129 .cfi_startproc + 130 @ args = 0, pretend = 0, frame = 0 + 131 @ frame_needed = 0, uses_anonymous_args = 0 + 132 @ link register save eliminated. + 133 .LVL0: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Enable the EWUPx pin */ + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SET_BIT(PWR->CSR, WakeUpPinx); + 134 .loc 1 236 0 + 135 0000 024A ldr r2, .L11 + 136 0002 5368 ldr r3, [r2, #4] + 137 0004 1843 orrs r0, r3 + 138 .LVL1: + 139 0006 5060 str r0, [r2, #4] + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 140 .loc 1 237 0 + 141 @ sp needed + 142 0008 7047 bx lr + 143 .L12: + 144 000a C046 .align 2 + 145 .L11: + 146 000c 00700040 .word 1073770496 + 147 .cfi_endproc + 148 .LFE43: + 150 .section .text.HAL_PWR_DisableWakeUpPin,"ax",%progbits + 151 .align 1 + 152 .global HAL_PWR_DisableWakeUpPin + 153 .syntax unified + 154 .code 16 + 155 .thumb_func + 156 .fpu softvfp + 158 HAL_PWR_DisableWakeUpPin: + 159 .LFB44: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables the WakeUp PINx functionality. + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param WakeUpPinx Specifies the Power Wake-Up pin to disable. + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be values of : + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @ref PWREx_WakeUp_Pins + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx) + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 160 .loc 1 247 0 + 161 .cfi_startproc + ARM GAS /tmp/ccVEwfab.s page 8 + + + 162 @ args = 0, pretend = 0, frame = 0 + 163 @ frame_needed = 0, uses_anonymous_args = 0 + 164 @ link register save eliminated. + 165 .LVL2: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx)); + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Disable the EWUPx pin */ + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** CLEAR_BIT(PWR->CSR, WakeUpPinx); + 166 .loc 1 251 0 + 167 0000 024A ldr r2, .L14 + 168 0002 5368 ldr r3, [r2, #4] + 169 0004 8343 bics r3, r0 + 170 0006 5360 str r3, [r2, #4] + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 171 .loc 1 252 0 + 172 @ sp needed + 173 0008 7047 bx lr + 174 .L15: + 175 000a C046 .align 2 + 176 .L14: + 177 000c 00700040 .word 1073770496 + 178 .cfi_endproc + 179 .LFE44: + 181 .section .text.HAL_PWR_EnterSLEEPMode,"ax",%progbits + 182 .align 1 + 183 .global HAL_PWR_EnterSLEEPMode + 184 .syntax unified + 185 .code 16 + 186 .thumb_func + 187 .fpu softvfp + 189 HAL_PWR_EnterSLEEPMode: + 190 .LFB45: + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enters Sleep mode. + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note In Sleep mode, all I/O pins keep the same state as in Run mode. + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in SLEEP mode. + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * On STM32F0 devices, this parameter is a dummy value and it is ignored + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * as regulator can't be modified in this mode. Parameter is kept for platform + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * compatibility. + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param SLEEPEntry Specifies if SLEEP mode is entered with WFI or WFE instruction. + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * When WFI entry is used, tick interrupt have to be disabled if not desired as + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * the interrupt wake up source. + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be one of the following values: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry) + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 191 .loc 1 270 0 + 192 .cfi_startproc + 193 @ args = 0, pretend = 0, frame = 0 + 194 @ frame_needed = 0, uses_anonymous_args = 0 + 195 @ link register save eliminated. + 196 .LVL3: + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + ARM GAS /tmp/ccVEwfab.s page 9 + + + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry)); + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear SLEEPDEEP bit of Cortex System Control Register */ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 197 .loc 1 276 0 + 198 0000 064A ldr r2, .L20 + 199 0002 1369 ldr r3, [r2, #16] + 200 0004 0420 movs r0, #4 + 201 .LVL4: + 202 0006 8343 bics r3, r0 + 203 0008 1361 str r3, [r2, #16] + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select SLEEP mode entry -------------------------------------------------*/ + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** if(SLEEPEntry == PWR_SLEEPENTRY_WFI) + 204 .loc 1 279 0 + 205 000a 0129 cmp r1, #1 + 206 000c 03D0 beq .L19 + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFI(); + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** else + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Event */ + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __SEV(); + 207 .loc 1 287 0 + 208 .syntax divided + 209 @ 287 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 210 000e 40BF sev + 211 @ 0 "" 2 + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 212 .loc 1 288 0 + 213 @ 288 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 214 0010 20BF wfe + 215 @ 0 "" 2 + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 216 .loc 1 289 0 + 217 @ 289 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 218 0012 20BF wfe + 219 @ 0 "" 2 + 220 .thumb + 221 .syntax unified + 222 .L16: + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 223 .loc 1 291 0 + 224 @ sp needed + 225 0014 7047 bx lr + 226 .L19: + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 227 .loc 1 282 0 + 228 .syntax divided + 229 @ 282 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 230 0016 30BF wfi + 231 @ 0 "" 2 + 232 .thumb + ARM GAS /tmp/ccVEwfab.s page 10 + + + 233 .syntax unified + 234 0018 FCE7 b .L16 + 235 .L21: + 236 001a C046 .align 2 + 237 .L20: + 238 001c 00ED00E0 .word -536810240 + 239 .cfi_endproc + 240 .LFE45: + 242 .section .text.HAL_PWR_EnterSTOPMode,"ax",%progbits + 243 .align 1 + 244 .global HAL_PWR_EnterSTOPMode + 245 .syntax unified + 246 .code 16 + 247 .thumb_func + 248 .fpu softvfp + 250 HAL_PWR_EnterSTOPMode: + 251 .LFB46: + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enters STOP mode. + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode. + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event, + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * the HSI RC oscillator is selected as system clock. + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note When the voltage regulator operates in low power mode, an additional + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * startup delay is incurred when waking up from Stop mode. + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * By keeping the internal regulator ON during Stop mode, the consumption + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * is higher although the startup time is reduced. + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param Regulator Specifies the regulator state in STOP mode. + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be one of the following values: + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_MAINREGULATOR_ON: STOP mode with regulator ON + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_LOWPOWERREGULATOR_ON: STOP mode with low power regulator ON + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @param STOPEntry specifies if STOP mode in entered with WFI or WFE instruction. + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * This parameter can be one of the following values: + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFI:Enter STOP mode with WFI instruction + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @arg PWR_STOPENTRY_WFE: Enter STOP mode with WFE instruction + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry) + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 252 .loc 1 313 0 + 253 .cfi_startproc + 254 @ args = 0, pretend = 0, frame = 0 + 255 @ frame_needed = 0, uses_anonymous_args = 0 + 256 .LVL5: + 257 0000 10B5 push {r4, lr} + 258 .LCFI0: + 259 .cfi_def_cfa_offset 8 + 260 .cfi_offset 4, -8 + 261 .cfi_offset 14, -4 + 262 .LVL6: + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** uint32_t tmpreg = 0; + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Check the parameters */ + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_REGULATOR(Regulator)); + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select the regulator state in STOP mode ---------------------------------*/ + ARM GAS /tmp/ccVEwfab.s page 11 + + + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tmpreg = PWR->CR; + 263 .loc 1 321 0 + 264 0002 0C4A ldr r2, .L26 + 265 0004 1368 ldr r3, [r2] + 266 .LVL7: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear PDDS and LPDS bits */ + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tmpreg &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS); + 267 .loc 1 324 0 + 268 0006 0324 movs r4, #3 + 269 0008 A343 bics r3, r4 + 270 .LVL8: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set LPDS bit according to Regulator value */ + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** tmpreg |= Regulator; + 271 .loc 1 327 0 + 272 000a 1843 orrs r0, r3 + 273 .LVL9: + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Store the new value */ + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR = tmpreg; + 274 .loc 1 330 0 + 275 000c 1060 str r0, [r2] + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 276 .loc 1 333 0 + 277 000e 0A4A ldr r2, .L26+4 + 278 0010 1369 ldr r3, [r2, #16] + 279 0012 0420 movs r0, #4 + 280 .LVL10: + 281 0014 0343 orrs r3, r0 + 282 0016 1361 str r3, [r2, #16] + 283 .LVL11: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select STOP mode entry --------------------------------------------------*/ + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** if(STOPEntry == PWR_STOPENTRY_WFI) + 284 .loc 1 336 0 + 285 0018 0129 cmp r1, #1 + 286 001a 08D0 beq .L25 + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFI(); + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** else + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Event */ + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __SEV(); + 287 .loc 1 344 0 + 288 .syntax divided + 289 @ 344 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 290 001c 40BF sev + 291 @ 0 "" 2 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 292 .loc 1 345 0 + 293 @ 345 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 294 001e 20BF wfe + ARM GAS /tmp/ccVEwfab.s page 12 + + + 295 @ 0 "" 2 + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFE(); + 296 .loc 1 346 0 + 297 @ 346 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 298 0020 20BF wfe + 299 @ 0 "" 2 + 300 .thumb + 301 .syntax unified + 302 .L24: + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Reset SLEEPDEEP bit of Cortex System Control Register */ + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); + 303 .loc 1 350 0 + 304 0022 054A ldr r2, .L26+4 + 305 0024 1369 ldr r3, [r2, #16] + 306 0026 0421 movs r1, #4 + 307 .LVL12: + 308 0028 8B43 bics r3, r1 + 309 002a 1361 str r3, [r2, #16] + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 310 .loc 1 351 0 + 311 @ sp needed + 312 002c 10BD pop {r4, pc} + 313 .LVL13: + 314 .L25: + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 315 .loc 1 339 0 + 316 .syntax divided + 317 @ 339 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 318 002e 30BF wfi + 319 @ 0 "" 2 + 320 .thumb + 321 .syntax unified + 322 0030 F7E7 b .L24 + 323 .L27: + 324 0032 C046 .align 2 + 325 .L26: + 326 0034 00700040 .word 1073770496 + 327 0038 00ED00E0 .word -536810240 + 328 .cfi_endproc + 329 .LFE46: + 331 .section .text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits + 332 .align 1 + 333 .global HAL_PWR_EnterSTANDBYMode + 334 .syntax unified + 335 .code 16 + 336 .thumb_func + 337 .fpu softvfp + 339 HAL_PWR_EnterSTANDBYMode: + 340 .LFB47: + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enters STANDBY mode. + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note In Standby mode, all I/O pins are high impedance except for: + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * - Reset pad (still available) + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * - RTC alternate function pins if configured for tamper, time-stamp, RTC + ARM GAS /tmp/ccVEwfab.s page 13 + + + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Alarm out, or RTC clock calibration out. + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * - WKUP pins if enabled. + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * STM32F0x8 devices, the Stop mode is available, but it is + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * aningless to distinguish between voltage regulator in Low power + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * mode and voltage regulator in Run mode because the regulator + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * not used and the core is supplied directly from an external source. + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Consequently, the Standby mode is not available on those devices. + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnterSTANDBYMode(void) + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 341 .loc 1 368 0 + 342 .cfi_startproc + 343 @ args = 0, pretend = 0, frame = 0 + 344 @ frame_needed = 0, uses_anonymous_args = 0 + 345 @ link register save eliminated. + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Select STANDBY mode */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** PWR->CR |= (uint32_t)PWR_CR_PDDS; + 346 .loc 1 370 0 + 347 0000 054A ldr r2, .L29 + 348 0002 1368 ldr r3, [r2] + 349 0004 0221 movs r1, #2 + 350 0006 0B43 orrs r3, r1 + 351 0008 1360 str r3, [r2] + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SLEEPDEEP bit of Cortex System Control Register */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; + 352 .loc 1 373 0 + 353 000a 044A ldr r2, .L29+4 + 354 000c 1369 ldr r3, [r2, #16] + 355 000e 0231 adds r1, r1, #2 + 356 0010 0B43 orrs r3, r1 + 357 0012 1361 str r3, [r2, #16] + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* This option is used to ensure that store operations are completed */ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #if defined ( __CC_ARM) + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __force_stores(); + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** #endif + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Request Wait For Interrupt */ + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** __WFI(); + 358 .loc 1 380 0 + 359 .syntax divided + 360 @ 380 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c" 1 + 361 0014 30BF wfi + 362 @ 0 "" 2 + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 363 .loc 1 381 0 + 364 .thumb + 365 .syntax unified + 366 @ sp needed + 367 0016 7047 bx lr + 368 .L30: + 369 .align 2 + 370 .L29: + 371 0018 00700040 .word 1073770496 + 372 001c 00ED00E0 .word -536810240 + 373 .cfi_endproc + ARM GAS /tmp/ccVEwfab.s page 14 + + + 374 .LFE47: + 376 .section .text.HAL_PWR_EnableSleepOnExit,"ax",%progbits + 377 .align 1 + 378 .global HAL_PWR_EnableSleepOnExit + 379 .syntax unified + 380 .code 16 + 381 .thumb_func + 382 .fpu softvfp + 384 HAL_PWR_EnableSleepOnExit: + 385 .LFB48: + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Indicates Sleep-On-Exit when returning from Handler mode to Thread mode. + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * Setting this bit is useful when the processor is expected to run only on + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * interruptions handling. + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableSleepOnExit(void) + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 386 .loc 1 392 0 + 387 .cfi_startproc + 388 @ args = 0, pretend = 0, frame = 0 + 389 @ frame_needed = 0, uses_anonymous_args = 0 + 390 @ link register save eliminated. + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SLEEPONEXIT bit of Cortex System Control Register */ + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 391 .loc 1 394 0 + 392 0000 024A ldr r2, .L32 + 393 0002 1369 ldr r3, [r2, #16] + 394 0004 0221 movs r1, #2 + 395 0006 0B43 orrs r3, r1 + 396 0008 1361 str r3, [r2, #16] + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 397 .loc 1 395 0 + 398 @ sp needed + 399 000a 7047 bx lr + 400 .L33: + 401 .align 2 + 402 .L32: + 403 000c 00ED00E0 .word -536810240 + 404 .cfi_endproc + 405 .LFE48: + 407 .section .text.HAL_PWR_DisableSleepOnExit,"ax",%progbits + 408 .align 1 + 409 .global HAL_PWR_DisableSleepOnExit + 410 .syntax unified + 411 .code 16 + 412 .thumb_func + 413 .fpu softvfp + 415 HAL_PWR_DisableSleepOnExit: + 416 .LFB49: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables Sleep-On-Exit feature when returning from Handler mode to Thread mode. + ARM GAS /tmp/ccVEwfab.s page 15 + + + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Clears SLEEPONEXIT bit of SCR register. When this bit is set, the processor + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * re-enters SLEEP mode when an interruption handling is over. + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableSleepOnExit(void) + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 417 .loc 1 405 0 + 418 .cfi_startproc + 419 @ args = 0, pretend = 0, frame = 0 + 420 @ frame_needed = 0, uses_anonymous_args = 0 + 421 @ link register save eliminated. + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear SLEEPONEXIT bit of Cortex System Control Register */ + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk)); + 422 .loc 1 407 0 + 423 0000 024A ldr r2, .L35 + 424 0002 1369 ldr r3, [r2, #16] + 425 0004 0221 movs r1, #2 + 426 0006 8B43 bics r3, r1 + 427 0008 1361 str r3, [r2, #16] + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 428 .loc 1 408 0 + 429 @ sp needed + 430 000a 7047 bx lr + 431 .L36: + 432 .align 2 + 433 .L35: + 434 000c 00ED00E0 .word -536810240 + 435 .cfi_endproc + 436 .LFE49: + 438 .section .text.HAL_PWR_EnableSEVOnPend,"ax",%progbits + 439 .align 1 + 440 .global HAL_PWR_EnableSEVOnPend + 441 .syntax unified + 442 .code 16 + 443 .thumb_func + 444 .fpu softvfp + 446 HAL_PWR_EnableSEVOnPend: + 447 .LFB50: + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Enables CORTEX M4 SEVONPEND bit. + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Sets SEVONPEND bit of SCR register. When this bit is set, this causes + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_EnableSEVOnPend(void) + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 448 .loc 1 419 0 + 449 .cfi_startproc + 450 @ args = 0, pretend = 0, frame = 0 + 451 @ frame_needed = 0, uses_anonymous_args = 0 + 452 @ link register save eliminated. + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Set SEVONPEND bit of Cortex System Control Register */ + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 453 .loc 1 421 0 + ARM GAS /tmp/ccVEwfab.s page 16 + + + 454 0000 024A ldr r2, .L38 + 455 0002 1369 ldr r3, [r2, #16] + 456 0004 1021 movs r1, #16 + 457 0006 0B43 orrs r3, r1 + 458 0008 1361 str r3, [r2, #16] + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 459 .loc 1 422 0 + 460 @ sp needed + 461 000a 7047 bx lr + 462 .L39: + 463 .align 2 + 464 .L38: + 465 000c 00ED00E0 .word -536810240 + 466 .cfi_endproc + 467 .LFE50: + 469 .section .text.HAL_PWR_DisableSEVOnPend,"ax",%progbits + 470 .align 1 + 471 .global HAL_PWR_DisableSEVOnPend + 472 .syntax unified + 473 .code 16 + 474 .thumb_func + 475 .fpu softvfp + 477 HAL_PWR_DisableSEVOnPend: + 478 .LFB51: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /** + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @brief Disables CORTEX M4 SEVONPEND bit. + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @note Clears SEVONPEND bit of SCR register. When this bit is set, this causes + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * WFE to wake up when an interrupt moves from inactive to pended. + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** * @retval None + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** */ + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** void HAL_PWR_DisableSEVOnPend(void) + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** { + 479 .loc 1 432 0 + 480 .cfi_startproc + 481 @ args = 0, pretend = 0, frame = 0 + 482 @ frame_needed = 0, uses_anonymous_args = 0 + 483 @ link register save eliminated. + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** /* Clear SEVONPEND bit of Cortex System Control Register */ + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk)); + 484 .loc 1 434 0 + 485 0000 024A ldr r2, .L41 + 486 0002 1369 ldr r3, [r2, #16] + 487 0004 1021 movs r1, #16 + 488 0006 8B43 bics r3, r1 + 489 0008 1361 str r3, [r2, #16] + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr.c **** } + 490 .loc 1 435 0 + 491 @ sp needed + 492 000a 7047 bx lr + 493 .L42: + 494 .align 2 + 495 .L41: + 496 000c 00ED00E0 .word -536810240 + 497 .cfi_endproc + 498 .LFE51: + ARM GAS /tmp/ccVEwfab.s page 17 + + + 500 .text + 501 .Letext0: + 502 .file 2 "/usr/include/newlib/machine/_default_types.h" + 503 .file 3 "/usr/include/newlib/sys/_stdint.h" + 504 .file 4 "Drivers/CMSIS/Include/core_cm0.h" + 505 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 506 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 507 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccVEwfab.s page 18 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_pwr.c + /tmp/ccVEwfab.s:16 .text.HAL_PWR_DeInit:0000000000000000 $t + /tmp/ccVEwfab.s:23 .text.HAL_PWR_DeInit:0000000000000000 HAL_PWR_DeInit + /tmp/ccVEwfab.s:49 .text.HAL_PWR_DeInit:0000000000000018 $d + /tmp/ccVEwfab.s:55 .text.HAL_PWR_EnableBkUpAccess:0000000000000000 $t + /tmp/ccVEwfab.s:62 .text.HAL_PWR_EnableBkUpAccess:0000000000000000 HAL_PWR_EnableBkUpAccess + /tmp/ccVEwfab.s:82 .text.HAL_PWR_EnableBkUpAccess:0000000000000010 $d + /tmp/ccVEwfab.s:87 .text.HAL_PWR_DisableBkUpAccess:0000000000000000 $t + /tmp/ccVEwfab.s:94 .text.HAL_PWR_DisableBkUpAccess:0000000000000000 HAL_PWR_DisableBkUpAccess + /tmp/ccVEwfab.s:113 .text.HAL_PWR_DisableBkUpAccess:000000000000000c $d + /tmp/ccVEwfab.s:119 .text.HAL_PWR_EnableWakeUpPin:0000000000000000 $t + /tmp/ccVEwfab.s:126 .text.HAL_PWR_EnableWakeUpPin:0000000000000000 HAL_PWR_EnableWakeUpPin + /tmp/ccVEwfab.s:146 .text.HAL_PWR_EnableWakeUpPin:000000000000000c $d + /tmp/ccVEwfab.s:151 .text.HAL_PWR_DisableWakeUpPin:0000000000000000 $t + /tmp/ccVEwfab.s:158 .text.HAL_PWR_DisableWakeUpPin:0000000000000000 HAL_PWR_DisableWakeUpPin + /tmp/ccVEwfab.s:177 .text.HAL_PWR_DisableWakeUpPin:000000000000000c $d + /tmp/ccVEwfab.s:182 .text.HAL_PWR_EnterSLEEPMode:0000000000000000 $t + /tmp/ccVEwfab.s:189 .text.HAL_PWR_EnterSLEEPMode:0000000000000000 HAL_PWR_EnterSLEEPMode + /tmp/ccVEwfab.s:238 .text.HAL_PWR_EnterSLEEPMode:000000000000001c $d + /tmp/ccVEwfab.s:243 .text.HAL_PWR_EnterSTOPMode:0000000000000000 $t + /tmp/ccVEwfab.s:250 .text.HAL_PWR_EnterSTOPMode:0000000000000000 HAL_PWR_EnterSTOPMode + /tmp/ccVEwfab.s:326 .text.HAL_PWR_EnterSTOPMode:0000000000000034 $d + /tmp/ccVEwfab.s:332 .text.HAL_PWR_EnterSTANDBYMode:0000000000000000 $t + /tmp/ccVEwfab.s:339 .text.HAL_PWR_EnterSTANDBYMode:0000000000000000 HAL_PWR_EnterSTANDBYMode + /tmp/ccVEwfab.s:371 .text.HAL_PWR_EnterSTANDBYMode:0000000000000018 $d + /tmp/ccVEwfab.s:377 .text.HAL_PWR_EnableSleepOnExit:0000000000000000 $t + /tmp/ccVEwfab.s:384 .text.HAL_PWR_EnableSleepOnExit:0000000000000000 HAL_PWR_EnableSleepOnExit + /tmp/ccVEwfab.s:403 .text.HAL_PWR_EnableSleepOnExit:000000000000000c $d + /tmp/ccVEwfab.s:408 .text.HAL_PWR_DisableSleepOnExit:0000000000000000 $t + /tmp/ccVEwfab.s:415 .text.HAL_PWR_DisableSleepOnExit:0000000000000000 HAL_PWR_DisableSleepOnExit + /tmp/ccVEwfab.s:434 .text.HAL_PWR_DisableSleepOnExit:000000000000000c $d + /tmp/ccVEwfab.s:439 .text.HAL_PWR_EnableSEVOnPend:0000000000000000 $t + /tmp/ccVEwfab.s:446 .text.HAL_PWR_EnableSEVOnPend:0000000000000000 HAL_PWR_EnableSEVOnPend + /tmp/ccVEwfab.s:465 .text.HAL_PWR_EnableSEVOnPend:000000000000000c $d + /tmp/ccVEwfab.s:470 .text.HAL_PWR_DisableSEVOnPend:0000000000000000 $t + /tmp/ccVEwfab.s:477 .text.HAL_PWR_DisableSEVOnPend:0000000000000000 HAL_PWR_DisableSEVOnPend + /tmp/ccVEwfab.s:496 .text.HAL_PWR_DisableSEVOnPend:000000000000000c $d + +NO UNDEFINED SYMBOLS diff --git a/fw/midi-dials/build/stm32f0xx_hal_pwr.o b/fw/midi-dials/build/stm32f0xx_hal_pwr.o Binary files differnew file mode 100644 index 0000000..cded285 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pwr.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_pwr_ex.d b/fw/midi-dials/build/stm32f0xx_hal_pwr_ex.d new file mode 100644 index 0000000..d8bb886 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pwr_ex.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_pwr_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_pwr_ex.lst b/fw/midi-dials/build/stm32f0xx_hal_pwr_ex.lst new file mode 100644 index 0000000..6eac358 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pwr_ex.lst @@ -0,0 +1,710 @@ +ARM GAS /tmp/ccpHOCtt.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_pwr_ex.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_PWR_ConfigPVD,"ax",%progbits + 16 .align 1 + 17 .global HAL_PWR_ConfigPVD + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_PWR_ConfigPVD: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @file stm32f0xx_hal_pwr_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * All rights reserved.</center></h2> + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * This software component is licensed by ST under BSD 3-Clause license, + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * the "License"; You may not use this file except in compliance with the + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * License. You may obtain a copy of the License at: + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * opensource.org/licenses/BSD-3-Clause + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ****************************************************************************** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/ + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #include "stm32f0xx_hal.h" + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWREx HAL module driver + ARM GAS /tmp/ccpHOCtt.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Private_Constants PWREx Private Constants + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_MODE_IT (0x00010000U) + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_MODE_EVT (0x00020000U) + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_RISING_EDGE (0x00000001U) + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_FALLING_EDGE (0x00000002U) + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @} + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Exported functions ---------------------------------------------------------*/ + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** @verbatim + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** =============================================================================== + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ##### Peripheral extended control functions ##### + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** =============================================================================== + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *** PVD configuration *** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ========================= + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** [..] + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) The PVD is used to monitor the VDD power supply by comparing it to a + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR). + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions. + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode. + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** -@- PVD is not available on STM32F030x4/x6/x8 + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *** VDDIO2 Monitor Configuration *** + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ==================================== + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** [..] + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** to VREFInt Voltage + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) This monitor is internally connected to the EXTI line31 + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** and can generate an interrupt if enabled. This is done through + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWREx_EnableVddio2Monitor() function. + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** -@- VDDIO2 is available on STM32F07x/09x/04x + ARM GAS /tmp/ccpHOCtt.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** @endverbatim + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{ + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #if defined (STM32F031x6) || defined (STM32F051x8) || \ + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F071xB) || defined (STM32F091xC) || \ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F042x6) || defined (STM32F072xB) + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD). + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * information for the PVD. + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * more details about the voltage threshold corresponding to each + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * detection level. + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD) + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 26 .loc 1 109 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 31 .LVL0: + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check the parameters */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel)); + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode)); + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Set PLS[7:5] bits according to PVDLevel value */ + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel); + 32 .loc 1 115 0 + 33 0000 1C4A ldr r2, .L6 + 34 0002 1368 ldr r3, [r2] + 35 0004 E021 movs r1, #224 + 36 0006 8B43 bics r3, r1 + 37 0008 0168 ldr r1, [r0] + 38 000a 0B43 orrs r3, r1 + 39 000c 1360 str r3, [r2] + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */ + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_EVENT(); + 40 .loc 1 118 0 + 41 000e 1A4B ldr r3, .L6+4 + 42 0010 5968 ldr r1, [r3, #4] + 43 0012 1A4A ldr r2, .L6+8 + 44 0014 1140 ands r1, r2 + 45 0016 5960 str r1, [r3, #4] + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT(); + 46 .loc 1 119 0 + 47 0018 1968 ldr r1, [r3] + 48 001a 1140 ands r1, r2 + 49 001c 1960 str r1, [r3] + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); + 50 .loc 1 120 0 + 51 001e 9968 ldr r1, [r3, #8] + 52 0020 1140 ands r1, r2 + ARM GAS /tmp/ccpHOCtt.s page 4 + + + 53 0022 9960 str r1, [r3, #8] + 54 0024 D968 ldr r1, [r3, #12] + 55 0026 0A40 ands r2, r1 + 56 0028 DA60 str r2, [r3, #12] + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure interrupt mode */ + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT) + 57 .loc 1 123 0 + 58 002a 4368 ldr r3, [r0, #4] + 59 002c DB03 lsls r3, r3, #15 + 60 002e 05D5 bpl .L2 + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT(); + 61 .loc 1 125 0 + 62 0030 114A ldr r2, .L6+4 + 63 0032 1168 ldr r1, [r2] + 64 0034 8023 movs r3, #128 + 65 0036 5B02 lsls r3, r3, #9 + 66 0038 0B43 orrs r3, r1 + 67 003a 1360 str r3, [r2] + 68 .L2: + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure event mode */ + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT) + 69 .loc 1 129 0 + 70 003c 4368 ldr r3, [r0, #4] + 71 003e 9B03 lsls r3, r3, #14 + 72 0040 05D5 bpl .L3 + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_EVENT(); + 73 .loc 1 131 0 + 74 0042 0D4A ldr r2, .L6+4 + 75 0044 5168 ldr r1, [r2, #4] + 76 0046 8023 movs r3, #128 + 77 0048 5B02 lsls r3, r3, #9 + 78 004a 0B43 orrs r3, r1 + 79 004c 5360 str r3, [r2, #4] + 80 .L3: + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure the edge */ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE) + 81 .loc 1 135 0 + 82 004e 4368 ldr r3, [r0, #4] + 83 0050 DB07 lsls r3, r3, #31 + 84 0052 05D5 bpl .L4 + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); + 85 .loc 1 137 0 + 86 0054 084A ldr r2, .L6+4 + 87 0056 9168 ldr r1, [r2, #8] + 88 0058 8023 movs r3, #128 + 89 005a 5B02 lsls r3, r3, #9 + 90 005c 0B43 orrs r3, r1 + 91 005e 9360 str r3, [r2, #8] + 92 .L4: + ARM GAS /tmp/ccpHOCtt.s page 5 + + + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE) + 93 .loc 1 140 0 + 94 0060 4368 ldr r3, [r0, #4] + 95 0062 9B07 lsls r3, r3, #30 + 96 0064 05D5 bpl .L1 + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); + 97 .loc 1 142 0 + 98 0066 044A ldr r2, .L6+4 + 99 0068 D168 ldr r1, [r2, #12] + 100 006a 8023 movs r3, #128 + 101 006c 5B02 lsls r3, r3, #9 + 102 006e 0B43 orrs r3, r1 + 103 0070 D360 str r3, [r2, #12] + 104 .L1: + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 105 .loc 1 144 0 + 106 @ sp needed + 107 0072 7047 bx lr + 108 .L7: + 109 .align 2 + 110 .L6: + 111 0074 00700040 .word 1073770496 + 112 0078 00040140 .word 1073808384 + 113 007c FFFFFEFF .word -65537 + 114 .cfi_endproc + 115 .LFE40: + 117 .section .text.HAL_PWR_EnablePVD,"ax",%progbits + 118 .align 1 + 119 .global HAL_PWR_EnablePVD + 120 .syntax unified + 121 .code 16 + 122 .thumb_func + 123 .fpu softvfp + 125 HAL_PWR_EnablePVD: + 126 .LFB41: + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Enables the Power Voltage Detector(PVD). + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_EnablePVD(void) + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 127 .loc 1 151 0 + 128 .cfi_startproc + 129 @ args = 0, pretend = 0, frame = 0 + 130 @ frame_needed = 0, uses_anonymous_args = 0 + 131 @ link register save eliminated. + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** PWR->CR |= (uint32_t)PWR_CR_PVDE; + 132 .loc 1 152 0 + 133 0000 024A ldr r2, .L9 + 134 0002 1368 ldr r3, [r2] + 135 0004 1021 movs r1, #16 + 136 0006 0B43 orrs r3, r1 + ARM GAS /tmp/ccpHOCtt.s page 6 + + + 137 0008 1360 str r3, [r2] + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 138 .loc 1 153 0 + 139 @ sp needed + 140 000a 7047 bx lr + 141 .L10: + 142 .align 2 + 143 .L9: + 144 000c 00700040 .word 1073770496 + 145 .cfi_endproc + 146 .LFE41: + 148 .section .text.HAL_PWR_DisablePVD,"ax",%progbits + 149 .align 1 + 150 .global HAL_PWR_DisablePVD + 151 .syntax unified + 152 .code 16 + 153 .thumb_func + 154 .fpu softvfp + 156 HAL_PWR_DisablePVD: + 157 .LFB42: + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Disables the Power Voltage Detector(PVD). + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_DisablePVD(void) + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 158 .loc 1 160 0 + 159 .cfi_startproc + 160 @ args = 0, pretend = 0, frame = 0 + 161 @ frame_needed = 0, uses_anonymous_args = 0 + 162 @ link register save eliminated. + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** PWR->CR &= ~((uint32_t)PWR_CR_PVDE); + 163 .loc 1 161 0 + 164 0000 024A ldr r2, .L12 + 165 0002 1368 ldr r3, [r2] + 166 0004 1021 movs r1, #16 + 167 0006 8B43 bics r3, r1 + 168 0008 1360 str r3, [r2] + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 169 .loc 1 162 0 + 170 @ sp needed + 171 000a 7047 bx lr + 172 .L13: + 173 .align 2 + 174 .L12: + 175 000c 00700040 .word 1073770496 + 176 .cfi_endproc + 177 .LFE42: + 179 .section .text.HAL_PWR_PVDCallback,"ax",%progbits + 180 .align 1 + 181 .weak HAL_PWR_PVDCallback + 182 .syntax unified + 183 .code 16 + 184 .thumb_func + 185 .fpu softvfp + 187 HAL_PWR_PVDCallback: + ARM GAS /tmp/ccpHOCtt.s page 7 + + + 188 .LFB44: + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD interrupt request. + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_IRQHandler() or PVD_VDDIO2_IRQHandler(). + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_PVD_IRQHandler(void) + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET) + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */ + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback(); + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */ + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG(); + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWR PVD interrupt callback + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __weak void HAL_PWR_PVDCallback(void) + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 189 .loc 1 187 0 + 190 .cfi_startproc + 191 @ args = 0, pretend = 0, frame = 0 + 192 @ frame_needed = 0, uses_anonymous_args = 0 + 193 @ link register save eliminated. + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** the HAL_PWR_PVDCallback could be implemented in the user file + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 194 .loc 1 191 0 + 195 @ sp needed + 196 0000 7047 bx lr + 197 .cfi_endproc + 198 .LFE44: + 200 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits + 201 .align 1 + 202 .global HAL_PWR_PVD_IRQHandler + 203 .syntax unified + 204 .code 16 + 205 .thumb_func + 206 .fpu softvfp + 208 HAL_PWR_PVD_IRQHandler: + 209 .LFB43: + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 210 .loc 1 170 0 + 211 .cfi_startproc + 212 @ args = 0, pretend = 0, frame = 0 + 213 @ frame_needed = 0, uses_anonymous_args = 0 + 214 0000 10B5 push {r4, lr} + 215 .LCFI0: + 216 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccpHOCtt.s page 8 + + + 217 .cfi_offset 4, -8 + 218 .cfi_offset 14, -4 + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 219 .loc 1 172 0 + 220 0002 064B ldr r3, .L18 + 221 0004 5B69 ldr r3, [r3, #20] + 222 0006 DB03 lsls r3, r3, #15 + 223 0008 00D4 bmi .L17 + 224 .L15: + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 225 .loc 1 180 0 + 226 @ sp needed + 227 000a 10BD pop {r4, pc} + 228 .L17: + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 229 .loc 1 175 0 + 230 000c FFF7FEFF bl HAL_PWR_PVDCallback + 231 .LVL1: + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 232 .loc 1 178 0 + 233 0010 024B ldr r3, .L18 + 234 0012 8022 movs r2, #128 + 235 0014 5202 lsls r2, r2, #9 + 236 0016 5A61 str r2, [r3, #20] + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 237 .loc 1 180 0 + 238 0018 F7E7 b .L15 + 239 .L19: + 240 001a C046 .align 2 + 241 .L18: + 242 001c 00040140 .word 1073808384 + 243 .cfi_endproc + 244 .LFE43: + 246 .section .text.HAL_PWREx_EnableVddio2Monitor,"ax",%progbits + 247 .align 1 + 248 .global HAL_PWREx_EnableVddio2Monitor + 249 .syntax unified + 250 .code 16 + 251 .thumb_func + 252 .fpu softvfp + 254 HAL_PWREx_EnableVddio2Monitor: + 255 .LFB45: + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #endif /* defined (STM32F031x6) || defined (STM32F051x8) || */ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* defined (STM32F071xB) || defined (STM32F091xC) || */ + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* defined (STM32F042x6) || defined (STM32F072xB) */ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #if defined (STM32F042x6) || defined (STM32F048xx) || \ + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F091xC) || defined (STM32F098xx) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection. + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint, + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** an interrupt is generated Irq line 1. + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** NVIS has to be enable by user. + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + ARM GAS /tmp/ccpHOCtt.s page 9 + + + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_EnableVddio2Monitor(void) + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 256 .loc 1 208 0 + 257 .cfi_startproc + 258 @ args = 0, pretend = 0, frame = 0 + 259 @ frame_needed = 0, uses_anonymous_args = 0 + 260 @ link register save eliminated. + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_ENABLE_IT(); + 261 .loc 1 209 0 + 262 0000 044B ldr r3, .L21 + 263 0002 1968 ldr r1, [r3] + 264 0004 8022 movs r2, #128 + 265 0006 1206 lsls r2, r2, #24 + 266 0008 1143 orrs r1, r2 + 267 000a 1960 str r1, [r3] + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE(); + 268 .loc 1 210 0 + 269 000c D968 ldr r1, [r3, #12] + 270 000e 0A43 orrs r2, r1 + 271 0010 DA60 str r2, [r3, #12] + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 272 .loc 1 211 0 + 273 @ sp needed + 274 0012 7047 bx lr + 275 .L22: + 276 .align 2 + 277 .L21: + 278 0014 00040140 .word 1073808384 + 279 .cfi_endproc + 280 .LFE45: + 282 .section .text.HAL_PWREx_DisableVddio2Monitor,"ax",%progbits + 283 .align 1 + 284 .global HAL_PWREx_DisableVddio2Monitor + 285 .syntax unified + 286 .code 16 + 287 .thumb_func + 288 .fpu softvfp + 290 HAL_PWREx_DisableVddio2Monitor: + 291 .LFB46: + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Disable the Vddio2 Monitor. + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_DisableVddio2Monitor(void) + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 292 .loc 1 218 0 + 293 .cfi_startproc + 294 @ args = 0, pretend = 0, frame = 0 + 295 @ frame_needed = 0, uses_anonymous_args = 0 + 296 @ link register save eliminated. + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_DISABLE_IT(); + 297 .loc 1 219 0 + 298 0000 064B ldr r3, .L24 + 299 0002 1A68 ldr r2, [r3] + 300 0004 5200 lsls r2, r2, #1 + 301 0006 5208 lsrs r2, r2, #1 + ARM GAS /tmp/ccpHOCtt.s page 10 + + + 302 0008 1A60 str r2, [r3] + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE(); + 303 .loc 1 220 0 + 304 000a DA68 ldr r2, [r3, #12] + 305 000c 5200 lsls r2, r2, #1 + 306 000e 5208 lsrs r2, r2, #1 + 307 0010 DA60 str r2, [r3, #12] + 308 0012 9A68 ldr r2, [r3, #8] + 309 0014 5200 lsls r2, r2, #1 + 310 0016 5208 lsrs r2, r2, #1 + 311 0018 9A60 str r2, [r3, #8] + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 312 .loc 1 222 0 + 313 @ sp needed + 314 001a 7047 bx lr + 315 .L25: + 316 .align 2 + 317 .L24: + 318 001c 00040140 .word 1073808384 + 319 .cfi_endproc + 320 .LFE46: + 322 .section .text.HAL_PWREx_Vddio2MonitorCallback,"ax",%progbits + 323 .align 1 + 324 .weak HAL_PWREx_Vddio2MonitorCallback + 325 .syntax unified + 326 .code 16 + 327 .thumb_func + 328 .fpu softvfp + 330 HAL_PWREx_Vddio2MonitorCallback: + 331 .LFB48: + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief This function handles the PWR Vddio2 monitor interrupt request. + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler(). + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_Vddio2Monitor_IRQHandler(void) + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET) + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* PWR Vddio2 monitor interrupt user callback */ + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWREx_Vddio2MonitorCallback(); + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG(); + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWR Vddio2 Monitor interrupt callback + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __weak void HAL_PWREx_Vddio2MonitorCallback(void) + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 332 .loc 1 247 0 + ARM GAS /tmp/ccpHOCtt.s page 11 + + + 333 .cfi_startproc + 334 @ args = 0, pretend = 0, frame = 0 + 335 @ frame_needed = 0, uses_anonymous_args = 0 + 336 @ link register save eliminated. + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed, + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */ + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 337 .loc 1 251 0 + 338 @ sp needed + 339 0000 7047 bx lr + 340 .cfi_endproc + 341 .LFE48: + 343 .section .text.HAL_PWREx_Vddio2Monitor_IRQHandler,"ax",%progbits + 344 .align 1 + 345 .global HAL_PWREx_Vddio2Monitor_IRQHandler + 346 .syntax unified + 347 .code 16 + 348 .thumb_func + 349 .fpu softvfp + 351 HAL_PWREx_Vddio2Monitor_IRQHandler: + 352 .LFB47: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */ + 353 .loc 1 230 0 + 354 .cfi_startproc + 355 @ args = 0, pretend = 0, frame = 0 + 356 @ frame_needed = 0, uses_anonymous_args = 0 + 357 0000 10B5 push {r4, lr} + 358 .LCFI1: + 359 .cfi_def_cfa_offset 8 + 360 .cfi_offset 4, -8 + 361 .cfi_offset 14, -4 + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** { + 362 .loc 1 232 0 + 363 0002 064B ldr r3, .L30 + 364 0004 5B69 ldr r3, [r3, #20] + 365 0006 002B cmp r3, #0 + 366 0008 00DB blt .L29 + 367 .L27: + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 368 .loc 1 240 0 + 369 @ sp needed + 370 000a 10BD pop {r4, pc} + 371 .L29: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 372 .loc 1 235 0 + 373 000c FFF7FEFF bl HAL_PWREx_Vddio2MonitorCallback + 374 .LVL2: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** } + 375 .loc 1 238 0 + 376 0010 024B ldr r3, .L30 + 377 0012 8022 movs r2, #128 + 378 0014 1206 lsls r2, r2, #24 + 379 0016 5A61 str r2, [r3, #20] + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** + 380 .loc 1 240 0 + 381 0018 F7E7 b .L27 + ARM GAS /tmp/ccpHOCtt.s page 12 + + + 382 .L31: + 383 001a C046 .align 2 + 384 .L30: + 385 001c 00040140 .word 1073808384 + 386 .cfi_endproc + 387 .LFE47: + 389 .text + 390 .Letext0: + 391 .file 2 "/usr/include/newlib/machine/_default_types.h" + 392 .file 3 "/usr/include/newlib/sys/_stdint.h" + 393 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 394 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 395 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h" + 396 .file 7 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 397 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccpHOCtt.s page 13 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_pwr_ex.c + /tmp/ccpHOCtt.s:16 .text.HAL_PWR_ConfigPVD:0000000000000000 $t + /tmp/ccpHOCtt.s:23 .text.HAL_PWR_ConfigPVD:0000000000000000 HAL_PWR_ConfigPVD + /tmp/ccpHOCtt.s:111 .text.HAL_PWR_ConfigPVD:0000000000000074 $d + /tmp/ccpHOCtt.s:118 .text.HAL_PWR_EnablePVD:0000000000000000 $t + /tmp/ccpHOCtt.s:125 .text.HAL_PWR_EnablePVD:0000000000000000 HAL_PWR_EnablePVD + /tmp/ccpHOCtt.s:144 .text.HAL_PWR_EnablePVD:000000000000000c $d + /tmp/ccpHOCtt.s:149 .text.HAL_PWR_DisablePVD:0000000000000000 $t + /tmp/ccpHOCtt.s:156 .text.HAL_PWR_DisablePVD:0000000000000000 HAL_PWR_DisablePVD + /tmp/ccpHOCtt.s:175 .text.HAL_PWR_DisablePVD:000000000000000c $d + /tmp/ccpHOCtt.s:180 .text.HAL_PWR_PVDCallback:0000000000000000 $t + /tmp/ccpHOCtt.s:187 .text.HAL_PWR_PVDCallback:0000000000000000 HAL_PWR_PVDCallback + /tmp/ccpHOCtt.s:201 .text.HAL_PWR_PVD_IRQHandler:0000000000000000 $t + /tmp/ccpHOCtt.s:208 .text.HAL_PWR_PVD_IRQHandler:0000000000000000 HAL_PWR_PVD_IRQHandler + /tmp/ccpHOCtt.s:242 .text.HAL_PWR_PVD_IRQHandler:000000000000001c $d + /tmp/ccpHOCtt.s:247 .text.HAL_PWREx_EnableVddio2Monitor:0000000000000000 $t + /tmp/ccpHOCtt.s:254 .text.HAL_PWREx_EnableVddio2Monitor:0000000000000000 HAL_PWREx_EnableVddio2Monitor + /tmp/ccpHOCtt.s:278 .text.HAL_PWREx_EnableVddio2Monitor:0000000000000014 $d + /tmp/ccpHOCtt.s:283 .text.HAL_PWREx_DisableVddio2Monitor:0000000000000000 $t + /tmp/ccpHOCtt.s:290 .text.HAL_PWREx_DisableVddio2Monitor:0000000000000000 HAL_PWREx_DisableVddio2Monitor + /tmp/ccpHOCtt.s:318 .text.HAL_PWREx_DisableVddio2Monitor:000000000000001c $d + /tmp/ccpHOCtt.s:323 .text.HAL_PWREx_Vddio2MonitorCallback:0000000000000000 $t + /tmp/ccpHOCtt.s:330 .text.HAL_PWREx_Vddio2MonitorCallback:0000000000000000 HAL_PWREx_Vddio2MonitorCallback + /tmp/ccpHOCtt.s:344 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:0000000000000000 $t + /tmp/ccpHOCtt.s:351 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:0000000000000000 HAL_PWREx_Vddio2Monitor_IRQHandler + /tmp/ccpHOCtt.s:385 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:000000000000001c $d + +NO UNDEFINED SYMBOLS diff --git a/fw/midi-dials/build/stm32f0xx_hal_pwr_ex.o b/fw/midi-dials/build/stm32f0xx_hal_pwr_ex.o Binary files differnew file mode 100644 index 0000000..3d2e75f --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_pwr_ex.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_rcc.d b/fw/midi-dials/build/stm32f0xx_hal_rcc.d new file mode 100644 index 0000000..a36a57b --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_rcc.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_rcc.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_rcc.lst b/fw/midi-dials/build/stm32f0xx_hal_rcc.lst new file mode 100644 index 0000000..b8645c0 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_rcc.lst @@ -0,0 +1,3828 @@ +ARM GAS /tmp/ccQfjpF5.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_rcc.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_RCC_DeInit,"ax",%progbits + 16 .align 1 + 17 .global HAL_RCC_DeInit + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_RCC_DeInit: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @file stm32f0xx_hal_rcc.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * functionalities of the Reset and Clock Control (RCC) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + Peripheral Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ============================================================================== + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### RCC specific features ##### + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** After reset the device is running from Internal High Speed oscillator + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled, + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** and all peripherals are off except internal SRAM, Flash and JTAG. + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses; + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** all peripherals mapped on these buses are running at HSI speed. + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) The clock for all peripherals is switched off, except the SRAM and FLASH. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) All GPIOs are in input floating state, except the JTAG pins which + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** are assigned to be used for debug purpose. + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] Once the device started from reset, the user application has to: + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the clock source to be used to drive the System clock + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (if the application needs higher frequency/performance) + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) Configure the clock source(s) for peripherals whose clocks are not + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** derived from the System clock (RTC, ADC, I2C, USART, TIM, USB FS, etc..) + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### RCC Limitations ##### + ARM GAS /tmp/ccQfjpF5.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ============================================================================== + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** A delay between an RCC peripheral clock enable and the effective peripheral + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** enabling should be taken into account in order to manage the peripheral read/write + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** from/to registers. + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (+) This delay depends on the peripheral mapping. + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) AHB & APB peripherals, 1 dummy read is necessary + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** Workarounds: + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) For AHB & APB peripherals, a dummy read to the peripheral register has been + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro. + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ****************************************************************************** + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @attention + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * All rights reserved.</center></h2> + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This software component is licensed by ST under BSD 3-Clause license, + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * the "License"; You may not use this file except in compliance with the + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * License. You may obtain a copy of the License at: + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * opensource.org/licenses/BSD-3-Clause + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ****************************************************************************** + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #include "stm32f0xx_hal.h" + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @addtogroup STM32F0xx_HAL_Driver + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC RCC + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC HAL module driver + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/ + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/ + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @} + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/ + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA + ARM GAS /tmp/ccQfjpF5.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8 + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @} + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/ + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @} + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/ + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Exported functions ---------------------------------------------------------*/ + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initialization and Configuration functions + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### Initialization and de-initialization functions ##### + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** This section provides functions allowing to configure the internal/external oscillators + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HSE, HSI, HSI14, HSI48, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** AHB and APB1). + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] Internal/external clock and PLL configuration + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the PLL as System clock source. + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** The HSI clock can be used also to clock the USART and I2C peripherals. + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) HSI14 (high-speed internal), 14 MHz factory-trimmed RC used directly to clock + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the ADC peripheral. + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** clock source. + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** through the PLL as System clock source. Can be used also as RTC clock source. + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) PLL (clocked by HSI, HSI48 or HSE), featuring different output clocks: + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The first output is used to generate the high speed system clock (up to 48 MHz) + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The second output is used to generate the clock for the USB FS (48 MHz) + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The third output may be used to generate the clock for the TIM, I2C and USART + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** peripherals (up to 48 MHz) + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE() + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System + ARM GAS /tmp/ccQfjpF5.s page 4 + + + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** clock source), the System clocks automatically switched to HSI and an interrupt + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M0 NMI + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (Non-Maskable Interrupt) exception vector. + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** clock (divided by 2) output on pin (such as PA8 pin). + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] System, AHB and APB buses clocks configuration + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI, + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HSE and PLL. + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** The AHB clock (HCLK) is derived from System clock through configurable + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prescaler and used to clock the CPU, memory and peripherals mapped + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** on AHB bus (DMA, GPIO...). APB1 (PCLK1) clock is derived + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** from AHB clock through configurable prescalers and used to clock + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the peripherals mapped on these buses. You can use + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** "@ref HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks. + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) All the peripheral clocks are derived from the System clock (SYSCLK) except: + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The FLASH program/erase clock which is always HSI 8MHz clock. + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The USB 48 MHz clock which is derived from the PLL VCO clock. + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE. + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The I2C clock which can be derived as well from HSI 8MHz clock. + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The ADC clock which is derived from PLL output. + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HSE divided by a programmable prescaler). The System clock (SYSCLK) + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** frequency must be higher or equal to the RTC clock frequency. + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (++) IWDG clock which is always the LSI clock. + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) For the STM32F0xx devices, the maximum frequency of the SYSCLK, HCLK and PCLK1 is 48 MHz, + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** Depending on the SYSCLK frequency, the flash latency should be adapted accordingly. + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prefetch is disabled. + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** Additional consideration on the SYSCLK based on Latency settings: + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +-----------------------------------------------+ + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** | Latency | SYSCLK clock frequency (MHz) | + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |---------------|-------------------------------| + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |0WS(1CPU cycle)| 0 < SYSCLK <= 24 | + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |---------------|-------------------------------| + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** |1WS(2CPU cycle)| 24 < SYSCLK <= 48 | + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +-----------------------------------------------+ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Resets the RCC clock configuration to the default reset state. + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The default reset state of the clock configuration is given below: + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - HSI ON and used as system clock source + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - HSE and PLL OFF + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - AHB, APB1 prescaler set to 1. + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - CSS and MCO1 OFF + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - All interrupts disabled + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - All interrupt and reset flags cleared + ARM GAS /tmp/ccQfjpF5.s page 5 + + + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This function does not modify the configuration of the + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - Peripheral clocks + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * - LSI, LSE and RTC clocks + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void) + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 26 .loc 1 211 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 0000 70B5 push {r4, r5, r6, lr} + 31 .LCFI0: + 32 .cfi_def_cfa_offset 16 + 33 .cfi_offset 4, -16 + 34 .cfi_offset 5, -12 + 35 .cfi_offset 6, -8 + 36 .cfi_offset 14, -4 + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick*/ + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 37 .loc 1 215 0 + 38 0002 FFF7FEFF bl HAL_GetTick + 39 .LVL0: + 40 0006 0400 movs r4, r0 + 41 .LVL1: + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set HSION bit, HSITRIM[4:0] bits to the reset value*/ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4); + 42 .loc 1 218 0 + 43 0008 284A ldr r2, .L17 + 44 000a 1368 ldr r3, [r2] + 45 000c 8121 movs r1, #129 + 46 000e 0B43 orrs r3, r1 + 47 0010 1360 str r3, [r2] + 48 .LVL2: + 49 .L2: + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET) + 50 .loc 1 221 0 + 51 0012 264B ldr r3, .L17 + 52 0014 1B68 ldr r3, [r3] + 53 0016 9B07 lsls r3, r3, #30 + 54 0018 07D4 bmi .L13 + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) + 55 .loc 1 223 0 + 56 001a FFF7FEFF bl HAL_GetTick + 57 .LVL3: + 58 001e 001B subs r0, r0, r4 + 59 0020 0228 cmp r0, #2 + 60 0022 F6D9 bls .L2 + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 61 .loc 1 225 0 + ARM GAS /tmp/ccQfjpF5.s page 6 + + + 62 0024 0324 movs r4, #3 + 63 .LVL4: + 64 .L3: + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset SW[1:0], HPRE[3:0], PPRE[2:0] and MCOSEL[2:0] bits */ + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCO); + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI as SYSCLK status is enabled */ + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET) + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update the SystemCoreClock global variable for HSI as system clock source */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SystemCoreClock = HSI_VALUE; + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adapt Systick interrupt period */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if (HAL_InitTick(uwTickPrio) != HAL_OK) + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset HSEON, CSSON, PLLON bits */ + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON); + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset HSEBYP bit */ + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP); + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get start tick */ + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLLRDY is cleared */ + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET) + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR register */ + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR); + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR2 register */ + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR2); + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Reset CFGR3 register */ + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CFGR3); + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable all interrupts */ + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_REG(RCC->CIR); + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccQfjpF5.s page 7 + + + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Clear all reset flags */ + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_CLEAR_RESET_FLAGS(); + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK; + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 65 .loc 1 284 0 + 66 0026 2000 movs r0, r4 + 67 @ sp needed + 68 0028 70BD pop {r4, r5, r6, pc} + 69 .LVL5: + 70 .L13: + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 71 .loc 1 230 0 + 72 002a 204A ldr r2, .L17 + 73 002c 5368 ldr r3, [r2, #4] + 74 002e 2049 ldr r1, .L17+4 + 75 0030 0B40 ands r3, r1 + 76 0032 5360 str r3, [r2, #4] + 77 .L5: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 78 .loc 1 233 0 + 79 0034 1D4B ldr r3, .L17 + 80 0036 5B68 ldr r3, [r3, #4] + 81 0038 0C22 movs r2, #12 + 82 003a 1A42 tst r2, r3 + 83 003c 07D0 beq .L14 + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 84 .loc 1 235 0 + 85 003e FFF7FEFF bl HAL_GetTick + 86 .LVL6: + 87 0042 001B subs r0, r0, r4 + 88 0044 1B4B ldr r3, .L17+8 + 89 0046 9842 cmp r0, r3 + 90 0048 F4D9 bls .L5 + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 91 .loc 1 237 0 + 92 004a 0324 movs r4, #3 + 93 .LVL7: + 94 004c EBE7 b .L3 + 95 .LVL8: + 96 .L14: + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 97 .loc 1 242 0 + 98 004e 1A4B ldr r3, .L17+12 + 99 0050 1A4A ldr r2, .L17+16 + 100 0052 1A60 str r2, [r3] + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 101 .loc 1 245 0 + 102 0054 1A4B ldr r3, .L17+20 + 103 0056 1868 ldr r0, [r3] + 104 0058 FFF7FEFF bl HAL_InitTick + 105 .LVL9: + 106 005c 041E subs r4, r0, #0 + 107 .LVL10: + 108 005e 01D0 beq .L15 + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 109 .loc 1 247 0 + ARM GAS /tmp/ccQfjpF5.s page 8 + + + 110 0060 0124 movs r4, #1 + 111 0062 E0E7 b .L3 + 112 .L15: + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 113 .loc 1 251 0 + 114 0064 114B ldr r3, .L17 + 115 0066 1A68 ldr r2, [r3] + 116 0068 1649 ldr r1, .L17+24 + 117 006a 0A40 ands r2, r1 + 118 006c 1A60 str r2, [r3] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 119 .loc 1 254 0 + 120 006e 1A68 ldr r2, [r3] + 121 0070 1549 ldr r1, .L17+28 + 122 0072 0A40 ands r2, r1 + 123 0074 1A60 str r2, [r3] + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 124 .loc 1 257 0 + 125 0076 FFF7FEFF bl HAL_GetTick + 126 .LVL11: + 127 007a 0500 movs r5, r0 + 128 .LVL12: + 129 .L7: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 130 .loc 1 260 0 + 131 007c 0B4B ldr r3, .L17 + 132 007e 1B68 ldr r3, [r3] + 133 0080 9B01 lsls r3, r3, #6 + 134 0082 06D5 bpl .L16 + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 135 .loc 1 262 0 + 136 0084 FFF7FEFF bl HAL_GetTick + 137 .LVL13: + 138 0088 401B subs r0, r0, r5 + 139 008a 0228 cmp r0, #2 + 140 008c F6D9 bls .L7 + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 141 .loc 1 264 0 + 142 008e 0324 movs r4, #3 + 143 0090 C9E7 b .L3 + 144 .L16: + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 145 .loc 1 269 0 + 146 0092 064B ldr r3, .L17 + 147 0094 0022 movs r2, #0 + 148 0096 5A60 str r2, [r3, #4] + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 149 .loc 1 272 0 + 150 0098 DA62 str r2, [r3, #44] + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 151 .loc 1 275 0 + 152 009a 1A63 str r2, [r3, #48] + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 153 .loc 1 278 0 + 154 009c 9A60 str r2, [r3, #8] + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 155 .loc 1 281 0 + ARM GAS /tmp/ccQfjpF5.s page 9 + + + 156 009e 596A ldr r1, [r3, #36] + 157 00a0 8022 movs r2, #128 + 158 00a2 5204 lsls r2, r2, #17 + 159 00a4 0A43 orrs r2, r1 + 160 00a6 5A62 str r2, [r3, #36] + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 161 .loc 1 283 0 + 162 00a8 BDE7 b .L3 + 163 .L18: + 164 00aa C046 .align 2 + 165 .L17: + 166 00ac 00100240 .word 1073876992 + 167 00b0 0CF8FFF0 .word -251660276 + 168 00b4 88130000 .word 5000 + 169 00b8 00000000 .word SystemCoreClock + 170 00bc 00127A00 .word 8000000 + 171 00c0 00000000 .word uwTickPrio + 172 00c4 FFFFF6FE .word -17367041 + 173 00c8 FFFFFBFF .word -262145 + 174 .cfi_endproc + 175 .LFE40: + 177 .section .text.HAL_RCC_OscConfig,"ax",%progbits + 178 .align 1 + 179 .global HAL_RCC_OscConfig + 180 .syntax unified + 181 .code 16 + 182 .thumb_func + 183 .fpu softvfp + 185 HAL_RCC_OscConfig: + 186 .LFB41: + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initializes the RCC Oscillators according to the specified parameters in the + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC_OscInitTypeDef. + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the configuration information for the RCC Oscillators. + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The PLL is not disabled when used as system clock. + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * supported by this macro. User should request a transition to LSE Off + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * first and then LSE On or LSE Bypass. + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * supported by this macro. User should request a transition to HSE Off + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * first and then HSE On or HSE Bypass. + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 187 .loc 1 301 0 + 188 .cfi_startproc + 189 @ args = 0, pretend = 0, frame = 8 + 190 @ frame_needed = 0, uses_anonymous_args = 0 + 191 .LVL14: + 192 0000 70B5 push {r4, r5, r6, lr} + 193 .LCFI1: + 194 .cfi_def_cfa_offset 16 + 195 .cfi_offset 4, -16 + 196 .cfi_offset 5, -12 + ARM GAS /tmp/ccQfjpF5.s page 10 + + + 197 .cfi_offset 6, -8 + 198 .cfi_offset 14, -4 + 199 0002 82B0 sub sp, sp, #8 + 200 .LCFI2: + 201 .cfi_def_cfa_offset 24 + 202 0004 041E subs r4, r0, #0 + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t pll_config; + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t pll_config2; + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check Null pointer */ + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct == NULL) + 203 .loc 1 307 0 + 204 0006 00D1 bne .LCB169 + 205 0008 85E2 b .L86 @long jump + 206 .LCB169: + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------- HSE Configuration ------------------------*/ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) + 207 .loc 1 316 0 + 208 000a 0368 ldr r3, [r0] + 209 000c DB07 lsls r3, r3, #31 + 210 000e 2BD5 bpl .L21 + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) + 211 .loc 1 322 0 + 212 0010 B34B ldr r3, .L131 + 213 0012 5A68 ldr r2, [r3, #4] + 214 0014 0C23 movs r3, #12 + 215 0016 1340 ands r3, r2 + 216 0018 042B cmp r3, #4 + 217 001a 1DD0 beq .L22 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 218 .loc 1 323 0 + 219 001c B04B ldr r3, .L131 + 220 001e 5A68 ldr r2, [r3, #4] + 221 0020 0C23 movs r3, #12 + 222 0022 1340 ands r3, r2 + 223 0024 082B cmp r3, #8 + 224 0026 0ED0 beq .L112 + 225 .L23: + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_ + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + ARM GAS /tmp/ccQfjpF5.s page 11 + + + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new HSE configuration ---------------------------------------*/ + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); + 226 .loc 1 333 0 + 227 0028 6368 ldr r3, [r4, #4] + 228 002a 012B cmp r3, #1 + 229 002c 41D0 beq .L113 + 230 .loc 1 333 0 is_stmt 0 discriminator 2 + 231 002e 002B cmp r3, #0 + 232 0030 56D1 bne .L26 + 233 .loc 1 333 0 discriminator 3 + 234 0032 AB4B ldr r3, .L131 + 235 0034 1A68 ldr r2, [r3] + 236 0036 AB49 ldr r1, .L131+4 + 237 0038 0A40 ands r2, r1 + 238 003a 1A60 str r2, [r3] + 239 003c 1A68 ldr r2, [r3] + 240 003e AA49 ldr r1, .L131+8 + 241 0040 0A40 ands r2, r1 + 242 0042 1A60 str r2, [r3] + 243 0044 3BE0 b .L25 + 244 .L112: + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 245 .loc 1 323 0 is_stmt 1 discriminator 1 + 246 0046 A64B ldr r3, .L131 + 247 0048 5B68 ldr r3, [r3, #4] + 248 004a C022 movs r2, #192 + 249 004c 5202 lsls r2, r2, #9 + 250 004e 1340 ands r3, r2 + 251 0050 8022 movs r2, #128 + 252 0052 5202 lsls r2, r2, #9 + 253 0054 9342 cmp r3, r2 + 254 0056 E7D1 bne .L23 + 255 .L22: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 256 .loc 1 325 0 + 257 0058 A14B ldr r3, .L131 + 258 005a 1B68 ldr r3, [r3] + 259 005c 9B03 lsls r3, r3, #14 + 260 005e 03D5 bpl .L21 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 261 .loc 1 325 0 is_stmt 0 discriminator 1 + 262 0060 6368 ldr r3, [r4, #4] + 263 0062 002B cmp r3, #0 + 264 0064 00D1 bne .LCB227 + 265 0066 59E2 b .L114 @long jump + 266 .LCB227: + 267 .LVL15: + 268 .L21: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSE State */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF) + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + ARM GAS /tmp/ccQfjpF5.s page 12 + + + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSE is ready */ + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSE is disabled */ + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE) + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI Configuration --------------------------*/ + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) + 269 .loc 1 368 0 is_stmt 1 + 270 0068 2368 ldr r3, [r4] + 271 006a 9B07 lsls r3, r3, #30 + 272 006c 78D5 bpl .L33 + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock * + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) + 273 .loc 1 375 0 + 274 006e 9C4B ldr r3, .L131 + 275 0070 5B68 ldr r3, [r3, #4] + 276 0072 0C22 movs r2, #12 + 277 0074 1A42 tst r2, r3 + 278 0076 62D0 beq .L34 + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_ + 279 .loc 1 376 0 + 280 0078 994B ldr r3, .L131 + 281 007a 5A68 ldr r2, [r3, #4] + 282 007c 0C23 movs r3, #12 + 283 007e 1340 ands r3, r2 + 284 0080 082B cmp r3, #8 + 285 0082 53D0 beq .L115 + 286 .L35: + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When HSI is used as system clock it will not disabled */ + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ + ARM GAS /tmp/ccQfjpF5.s page 13 + + + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Otherwise, just the calibration is allowed */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI State */ + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF) + 287 .loc 1 393 0 + 288 0084 E368 ldr r3, [r4, #12] + 289 0086 002B cmp r3, #0 + 290 0088 00D1 bne .LCB252 + 291 008a 8BE0 b .L37 @long jump + 292 .LCB252: + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_ENABLE(); + 293 .loc 1 396 0 + 294 008c 944A ldr r2, .L131 + 295 008e 1368 ldr r3, [r2] + 296 0090 0121 movs r1, #1 + 297 0092 0B43 orrs r3, r1 + 298 0094 1360 str r3, [r2] + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 299 .loc 1 399 0 + 300 0096 FFF7FEFF bl HAL_GetTick + 301 .LVL16: + 302 009a 0500 movs r5, r0 + 303 .LVL17: + 304 .L38: + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 305 .loc 1 402 0 + 306 009c 904B ldr r3, .L131 + 307 009e 1B68 ldr r3, [r3] + 308 00a0 9B07 lsls r3, r3, #30 + 309 00a2 76D4 bmi .L116 + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 310 .loc 1 404 0 + 311 00a4 FFF7FEFF bl HAL_GetTick + 312 .LVL18: + 313 00a8 401B subs r0, r0, r5 + 314 00aa 0228 cmp r0, #2 + 315 00ac F6D9 bls .L38 + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 316 .loc 1 406 0 + ARM GAS /tmp/ccQfjpF5.s page 14 + + + 317 00ae 0320 movs r0, #3 + 318 00b0 32E2 b .L20 + 319 .LVL19: + 320 .L113: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 321 .loc 1 333 0 discriminator 1 + 322 00b2 8B4A ldr r2, .L131 + 323 00b4 1168 ldr r1, [r2] + 324 00b6 8023 movs r3, #128 + 325 00b8 5B02 lsls r3, r3, #9 + 326 00ba 0B43 orrs r3, r1 + 327 00bc 1360 str r3, [r2] + 328 .L25: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 329 .loc 1 337 0 + 330 00be 6368 ldr r3, [r4, #4] + 331 00c0 002B cmp r3, #0 + 332 00c2 25D0 beq .L28 + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 333 .loc 1 340 0 + 334 00c4 FFF7FEFF bl HAL_GetTick + 335 .LVL20: + 336 00c8 0500 movs r5, r0 + 337 .LVL21: + 338 .L29: + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 339 .loc 1 343 0 + 340 00ca 854B ldr r3, .L131 + 341 00cc 1B68 ldr r3, [r3] + 342 00ce 9B03 lsls r3, r3, #14 + 343 00d0 CAD4 bmi .L21 + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 344 .loc 1 345 0 + 345 00d2 FFF7FEFF bl HAL_GetTick + 346 .LVL22: + 347 00d6 401B subs r0, r0, r5 + 348 00d8 6428 cmp r0, #100 + 349 00da F6D9 bls .L29 + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 350 .loc 1 347 0 + 351 00dc 0320 movs r0, #3 + 352 00de 1BE2 b .L20 + 353 .LVL23: + 354 .L26: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 355 .loc 1 333 0 discriminator 4 + 356 00e0 052B cmp r3, #5 + 357 00e2 09D0 beq .L117 + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 358 .loc 1 333 0 is_stmt 0 discriminator 6 + 359 00e4 7E4B ldr r3, .L131 + 360 00e6 1A68 ldr r2, [r3] + 361 00e8 7E49 ldr r1, .L131+4 + 362 00ea 0A40 ands r2, r1 + 363 00ec 1A60 str r2, [r3] + 364 00ee 1A68 ldr r2, [r3] + 365 00f0 7D49 ldr r1, .L131+8 + ARM GAS /tmp/ccQfjpF5.s page 15 + + + 366 00f2 0A40 ands r2, r1 + 367 00f4 1A60 str r2, [r3] + 368 00f6 E2E7 b .L25 + 369 .L117: + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 370 .loc 1 333 0 discriminator 5 + 371 00f8 794B ldr r3, .L131 + 372 00fa 1968 ldr r1, [r3] + 373 00fc 8022 movs r2, #128 + 374 00fe D202 lsls r2, r2, #11 + 375 0100 0A43 orrs r2, r1 + 376 0102 1A60 str r2, [r3] + 377 0104 1968 ldr r1, [r3] + 378 0106 8022 movs r2, #128 + 379 0108 5202 lsls r2, r2, #9 + 380 010a 0A43 orrs r2, r1 + 381 010c 1A60 str r2, [r3] + 382 010e D6E7 b .L25 + 383 .L28: + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 384 .loc 1 354 0 is_stmt 1 + 385 0110 FFF7FEFF bl HAL_GetTick + 386 .LVL24: + 387 0114 0500 movs r5, r0 + 388 .LVL25: + 389 .L31: + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 390 .loc 1 357 0 + 391 0116 724B ldr r3, .L131 + 392 0118 1B68 ldr r3, [r3] + 393 011a 9B03 lsls r3, r3, #14 + 394 011c A4D5 bpl .L21 + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 395 .loc 1 359 0 + 396 011e FFF7FEFF bl HAL_GetTick + 397 .LVL26: + 398 0122 401B subs r0, r0, r5 + 399 0124 6428 cmp r0, #100 + 400 0126 F6D9 bls .L31 + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 401 .loc 1 361 0 + 402 0128 0320 movs r0, #3 + 403 012a F5E1 b .L20 + 404 .LVL27: + 405 .L115: + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 406 .loc 1 376 0 discriminator 1 + 407 012c 6C4B ldr r3, .L131 + 408 012e 5B68 ldr r3, [r3, #4] + 409 0130 C022 movs r2, #192 + 410 0132 5202 lsls r2, r2, #9 + 411 0134 1340 ands r3, r2 + 412 0136 8022 movs r2, #128 + 413 0138 1202 lsls r2, r2, #8 + 414 013a 9342 cmp r3, r2 + 415 013c A2D1 bne .L35 + 416 .L34: + ARM GAS /tmp/ccQfjpF5.s page 16 + + + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 417 .loc 1 379 0 + 418 013e 684B ldr r3, .L131 + 419 0140 1B68 ldr r3, [r3] + 420 0142 9B07 lsls r3, r3, #30 + 421 0144 04D5 bpl .L36 + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 422 .loc 1 379 0 is_stmt 0 discriminator 1 + 423 0146 E368 ldr r3, [r4, #12] + 424 0148 012B cmp r3, #1 + 425 014a 01D0 beq .L36 + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 426 .loc 1 381 0 is_stmt 1 + 427 014c 0120 movs r0, #1 + 428 014e E3E1 b .L20 + 429 .L36: + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 430 .loc 1 387 0 + 431 0150 6349 ldr r1, .L131 + 432 0152 0B68 ldr r3, [r1] + 433 0154 F822 movs r2, #248 + 434 0156 9343 bics r3, r2 + 435 0158 2269 ldr r2, [r4, #16] + 436 015a D200 lsls r2, r2, #3 + 437 015c 1343 orrs r3, r2 + 438 015e 0B60 str r3, [r1] + 439 .L33: + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI_DISABLE(); + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is disabled */ + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE) + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------ LSI Configuration -------------------------*/ + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) + 440 .loc 1 433 0 + 441 0160 2368 ldr r3, [r4] + 442 0162 1B07 lsls r3, r3, #28 + ARM GAS /tmp/ccQfjpF5.s page 17 + + + 443 0164 44D5 bpl .L42 + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSI State */ + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF) + 444 .loc 1 439 0 + 445 0166 E369 ldr r3, [r4, #28] + 446 0168 002B cmp r3, #0 + 447 016a 2ED0 beq .L43 + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal Low Speed oscillator (LSI). */ + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSI_ENABLE(); + 448 .loc 1 442 0 + 449 016c 5C4A ldr r2, .L131 + 450 016e 536A ldr r3, [r2, #36] + 451 0170 0121 movs r1, #1 + 452 0172 0B43 orrs r3, r1 + 453 0174 5362 str r3, [r2, #36] + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 454 .loc 1 445 0 + 455 0176 FFF7FEFF bl HAL_GetTick + 456 .LVL28: + 457 017a 0500 movs r5, r0 + 458 .LVL29: + 459 .L44: + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSI is ready */ + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) + 460 .loc 1 448 0 + 461 017c 584B ldr r3, .L131 + 462 017e 5B6A ldr r3, [r3, #36] + 463 0180 9B07 lsls r3, r3, #30 + 464 0182 35D4 bmi .L42 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 465 .loc 1 450 0 + 466 0184 FFF7FEFF bl HAL_GetTick + 467 .LVL30: + 468 0188 401B subs r0, r0, r5 + 469 018a 0228 cmp r0, #2 + 470 018c F6D9 bls .L44 + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 471 .loc 1 452 0 + 472 018e 0320 movs r0, #3 + 473 0190 C2E1 b .L20 + 474 .L116: + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 475 .loc 1 411 0 + 476 0192 5349 ldr r1, .L131 + 477 0194 0B68 ldr r3, [r1] + 478 0196 F822 movs r2, #248 + 479 0198 9343 bics r3, r2 + ARM GAS /tmp/ccQfjpF5.s page 18 + + + 480 019a 2269 ldr r2, [r4, #16] + 481 019c D200 lsls r2, r2, #3 + 482 019e 1343 orrs r3, r2 + 483 01a0 0B60 str r3, [r1] + 484 01a2 DDE7 b .L33 + 485 .LVL31: + 486 .L37: + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 487 .loc 1 416 0 + 488 01a4 4E4A ldr r2, .L131 + 489 01a6 1368 ldr r3, [r2] + 490 01a8 0121 movs r1, #1 + 491 01aa 8B43 bics r3, r1 + 492 01ac 1360 str r3, [r2] + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 493 .loc 1 419 0 + 494 01ae FFF7FEFF bl HAL_GetTick + 495 .LVL32: + 496 01b2 0500 movs r5, r0 + 497 .LVL33: + 498 .L40: + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 499 .loc 1 422 0 + 500 01b4 4A4B ldr r3, .L131 + 501 01b6 1B68 ldr r3, [r3] + 502 01b8 9B07 lsls r3, r3, #30 + 503 01ba D1D5 bpl .L33 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 504 .loc 1 424 0 + 505 01bc FFF7FEFF bl HAL_GetTick + 506 .LVL34: + 507 01c0 401B subs r0, r0, r5 + 508 01c2 0228 cmp r0, #2 + 509 01c4 F6D9 bls .L40 + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 510 .loc 1 426 0 + 511 01c6 0320 movs r0, #3 + 512 01c8 A6E1 b .L20 + 513 .LVL35: + 514 .L43: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal Low Speed oscillator (LSI). */ + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSI_DISABLE(); + 515 .loc 1 459 0 + 516 01ca 454A ldr r2, .L131 + 517 01cc 536A ldr r3, [r2, #36] + 518 01ce 0121 movs r1, #1 + 519 01d0 8B43 bics r3, r1 + 520 01d2 5362 str r3, [r2, #36] + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 521 .loc 1 462 0 + ARM GAS /tmp/ccQfjpF5.s page 19 + + + 522 01d4 FFF7FEFF bl HAL_GetTick + 523 .LVL36: + 524 01d8 0500 movs r5, r0 + 525 .LVL37: + 526 .L46: + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSI is disabled */ + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) + 527 .loc 1 465 0 + 528 01da 414B ldr r3, .L131 + 529 01dc 5B6A ldr r3, [r3, #36] + 530 01de 9B07 lsls r3, r3, #30 + 531 01e0 06D5 bpl .L42 + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE) + 532 .loc 1 467 0 + 533 01e2 FFF7FEFF bl HAL_GetTick + 534 .LVL38: + 535 01e6 401B subs r0, r0, r5 + 536 01e8 0228 cmp r0, #2 + 537 01ea F6D9 bls .L46 + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 538 .loc 1 469 0 + 539 01ec 0320 movs r0, #3 + 540 01ee 93E1 b .L20 + 541 .LVL39: + 542 .L42: + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------------ LSE Configuration -------------------------*/ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) + 543 .loc 1 475 0 + 544 01f0 2368 ldr r3, [r4] + 545 01f2 5B07 lsls r3, r3, #29 + 546 01f4 00D4 bmi .LCB535 + 547 01f6 7FE0 b .L48 @long jump + 548 .LCB535: + 549 .LVL40: + 550 .LBB2: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET; + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update LSE configuration in Backup Domain control register */ + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Requires to enable write access to Backup Domain of necessary */ + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 551 .loc 1 484 0 + 552 01f8 394B ldr r3, .L131 + 553 01fa DB69 ldr r3, [r3, #28] + 554 01fc DB00 lsls r3, r3, #3 + 555 01fe 1DD4 bmi .L95 + 556 .LBB3: + ARM GAS /tmp/ccQfjpF5.s page 20 + + + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 557 .loc 1 486 0 + 558 0200 374A ldr r2, .L131 + 559 0202 D169 ldr r1, [r2, #28] + 560 0204 8020 movs r0, #128 + 561 0206 4005 lsls r0, r0, #21 + 562 0208 0143 orrs r1, r0 + 563 020a D161 str r1, [r2, #28] + 564 020c D369 ldr r3, [r2, #28] + 565 020e 0340 ands r3, r0 + 566 0210 0193 str r3, [sp, #4] + 567 0212 019B ldr r3, [sp, #4] + 568 .LVL41: + 569 .LBE3: + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pwrclkchanged = SET; + 570 .loc 1 487 0 + 571 0214 0125 movs r5, #1 + 572 .LVL42: + 573 .L49: + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 574 .loc 1 490 0 + 575 0216 354B ldr r3, .L131+12 + 576 0218 1B68 ldr r3, [r3] + 577 021a DB05 lsls r3, r3, #23 + 578 021c 10D5 bpl .L118 + 579 .L50: + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable write access to Backup domain */ + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait for Backup domain Write protection disable */ + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new LSE configuration -----------------------------------------*/ + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); + 580 .loc 1 508 0 + 581 021e A368 ldr r3, [r4, #8] + 582 0220 012B cmp r3, #1 + 583 0222 21D0 beq .L119 + 584 .loc 1 508 0 is_stmt 0 discriminator 2 + 585 0224 002B cmp r3, #0 + 586 0226 36D1 bne .L55 + 587 .loc 1 508 0 discriminator 3 + 588 0228 2D4B ldr r3, .L131 + 589 022a 1A6A ldr r2, [r3, #32] + ARM GAS /tmp/ccQfjpF5.s page 21 + + + 590 022c 0121 movs r1, #1 + 591 022e 8A43 bics r2, r1 + 592 0230 1A62 str r2, [r3, #32] + 593 0232 1A6A ldr r2, [r3, #32] + 594 0234 0331 adds r1, r1, #3 + 595 0236 8A43 bics r2, r1 + 596 0238 1A62 str r2, [r3, #32] + 597 023a 1AE0 b .L54 + 598 .LVL43: + 599 .L95: + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 600 .loc 1 477 0 is_stmt 1 + 601 023c 0025 movs r5, #0 + 602 023e EAE7 b .L49 + 603 .LVL44: + 604 .L118: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 605 .loc 1 493 0 + 606 0240 2A4A ldr r2, .L131+12 + 607 0242 1168 ldr r1, [r2] + 608 0244 8023 movs r3, #128 + 609 0246 5B00 lsls r3, r3, #1 + 610 0248 0B43 orrs r3, r1 + 611 024a 1360 str r3, [r2] + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 612 .loc 1 496 0 + 613 024c FFF7FEFF bl HAL_GetTick + 614 .LVL45: + 615 0250 0600 movs r6, r0 + 616 .LVL46: + 617 .L51: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 618 .loc 1 498 0 + 619 0252 264B ldr r3, .L131+12 + 620 0254 1B68 ldr r3, [r3] + 621 0256 DB05 lsls r3, r3, #23 + 622 0258 E1D4 bmi .L50 + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 623 .loc 1 500 0 + 624 025a FFF7FEFF bl HAL_GetTick + 625 .LVL47: + 626 025e 801B subs r0, r0, r6 + 627 0260 6428 cmp r0, #100 + 628 0262 F6D9 bls .L51 + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 629 .loc 1 502 0 + 630 0264 0320 movs r0, #3 + 631 0266 57E1 b .L20 + 632 .LVL48: + 633 .L119: + 634 .loc 1 508 0 discriminator 1 + 635 0268 1D4A ldr r2, .L131 + 636 026a 136A ldr r3, [r2, #32] + 637 026c 0121 movs r1, #1 + 638 026e 0B43 orrs r3, r1 + 639 0270 1362 str r3, [r2, #32] + 640 .L54: + ARM GAS /tmp/ccQfjpF5.s page 22 + + + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF) + 641 .loc 1 510 0 + 642 0272 A368 ldr r3, [r4, #8] + 643 0274 002B cmp r3, #0 + 644 0276 24D0 beq .L57 + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 645 .loc 1 513 0 + 646 0278 FFF7FEFF bl HAL_GetTick + 647 .LVL49: + 648 027c 0600 movs r6, r0 + 649 .LVL50: + 650 .L58: + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSE is ready */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 651 .loc 1 516 0 + 652 027e 184B ldr r3, .L131 + 653 0280 1B6A ldr r3, [r3, #32] + 654 0282 9B07 lsls r3, r3, #30 + 655 0284 36D4 bmi .L60 + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 656 .loc 1 518 0 + 657 0286 FFF7FEFF bl HAL_GetTick + 658 .LVL51: + 659 028a 801B subs r0, r0, r6 + 660 028c 184B ldr r3, .L131+16 + 661 028e 9842 cmp r0, r3 + 662 0290 F5D9 bls .L58 + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 663 .loc 1 520 0 + 664 0292 0320 movs r0, #3 + 665 0294 40E1 b .L20 + 666 .LVL52: + 667 .L55: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 668 .loc 1 508 0 discriminator 4 + 669 0296 052B cmp r3, #5 + 670 0298 09D0 beq .L120 + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + 671 .loc 1 508 0 is_stmt 0 discriminator 6 + 672 029a 114B ldr r3, .L131 + 673 029c 1A6A ldr r2, [r3, #32] + 674 029e 0121 movs r1, #1 + 675 02a0 8A43 bics r2, r1 + 676 02a2 1A62 str r2, [r3, #32] + 677 02a4 1A6A ldr r2, [r3, #32] + 678 02a6 0331 adds r1, r1, #3 + 679 02a8 8A43 bics r2, r1 + 680 02aa 1A62 str r2, [r3, #32] + 681 02ac E1E7 b .L54 + 682 .L120: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the LSE State */ + ARM GAS /tmp/ccQfjpF5.s page 23 + + + 683 .loc 1 508 0 discriminator 5 + 684 02ae 0C4B ldr r3, .L131 + 685 02b0 1A6A ldr r2, [r3, #32] + 686 02b2 0421 movs r1, #4 + 687 02b4 0A43 orrs r2, r1 + 688 02b6 1A62 str r2, [r3, #32] + 689 02b8 1A6A ldr r2, [r3, #32] + 690 02ba 0339 subs r1, r1, #3 + 691 02bc 0A43 orrs r2, r1 + 692 02be 1A62 str r2, [r3, #32] + 693 02c0 D7E7 b .L54 + 694 .L57: + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 695 .loc 1 527 0 is_stmt 1 + 696 02c2 FFF7FEFF bl HAL_GetTick + 697 .LVL53: + 698 02c6 0600 movs r6, r0 + 699 .LVL54: + 700 .L61: + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till LSE is disabled */ + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) + 701 .loc 1 530 0 + 702 02c8 054B ldr r3, .L131 + 703 02ca 1B6A ldr r3, [r3, #32] + 704 02cc 9B07 lsls r3, r3, #30 + 705 02ce 11D5 bpl .L60 + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) + 706 .loc 1 532 0 + 707 02d0 FFF7FEFF bl HAL_GetTick + 708 .LVL55: + 709 02d4 801B subs r0, r0, r6 + 710 02d6 064B ldr r3, .L131+16 + 711 02d8 9842 cmp r0, r3 + 712 02da F5D9 bls .L61 + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 713 .loc 1 534 0 + 714 02dc 0320 movs r0, #3 + 715 02de 1BE1 b .L20 + 716 .L132: + 717 .align 2 + 718 .L131: + 719 02e0 00100240 .word 1073876992 + 720 02e4 FFFFFEFF .word -65537 + 721 02e8 FFFFFBFF .word -262145 + 722 02ec 00700040 .word 1073770496 + 723 02f0 88130000 .word 5000 + 724 .L60: + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + ARM GAS /tmp/ccQfjpF5.s page 24 + + + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Require to disable power clock if necessary */ + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(pwrclkchanged == SET) + 725 .loc 1 540 0 + 726 02f4 012D cmp r5, #1 + 727 02f6 3AD0 beq .L121 + 728 .LVL56: + 729 .L48: + 730 .LBE2: + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI14 Configuration --------------------------*/ + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14) + 731 .loc 1 547 0 + 732 02f8 2368 ldr r3, [r4] + 733 02fa DB06 lsls r3, r3, #27 + 734 02fc 10D5 bpl .L63 + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State)); + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue)); + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI14 State */ + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON) + 735 .loc 1 554 0 + 736 02fe 6369 ldr r3, [r4, #20] + 737 0300 012B cmp r3, #1 + 738 0302 3AD0 beq .L122 + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable ADC control of the Internal High Speed oscillator HSI14 */ + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_DISABLE(); + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI). */ + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_ENABLE(); + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET) + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL) + 739 .loc 1 577 0 + ARM GAS /tmp/ccQfjpF5.s page 25 + + + 740 0304 0533 adds r3, r3, #5 + 741 0306 58D1 bne .L67 + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable ADC control of the Internal High Speed oscillator HSI14 */ + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_ENABLE(); + 742 .loc 1 580 0 + 743 0308 884A ldr r2, .L133 + 744 030a 536B ldr r3, [r2, #52] + 745 030c 0421 movs r1, #4 + 746 030e 8B43 bics r3, r1 + 747 0310 5363 str r3, [r2, #52] + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */ + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue); + 748 .loc 1 583 0 + 749 0312 536B ldr r3, [r2, #52] + 750 0314 F431 adds r1, r1, #244 + 751 0316 8B43 bics r3, r1 + 752 0318 A169 ldr r1, [r4, #24] + 753 031a C900 lsls r1, r1, #3 + 754 031c 0B43 orrs r3, r1 + 755 031e 5363 str r3, [r2, #52] + 756 .L63: + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable ADC control of the Internal High Speed oscillator HSI14 */ + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14ADC_DISABLE(); + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI). */ + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI14_DISABLE(); + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI is ready */ + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET) + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE) + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT) + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*----------------------------- HSI48 Configuration --------------------------*/ + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48) + 757 .loc 1 609 0 + 758 0320 2368 ldr r3, [r4] + 759 0322 9B06 lsls r3, r3, #26 + 760 0324 00D4 bmi .LCB765 + 761 0326 82E0 b .L70 @long jump + 762 .LCB765: + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + ARM GAS /tmp/ccQfjpF5.s page 26 + + + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State)); + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* When the HSI48 is used as system clock it is not allowed to be disabled */ + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) || + 763 .loc 1 615 0 + 764 0328 804B ldr r3, .L133 + 765 032a 5A68 ldr r2, [r3, #4] + 766 032c 0C23 movs r3, #12 + 767 032e 1340 ands r3, r2 + 768 0330 0C2B cmp r3, #12 + 769 0332 60D0 beq .L71 + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC + 770 .loc 1 616 0 discriminator 1 + 771 0334 7D4B ldr r3, .L133 + 772 0336 5A68 ldr r2, [r3, #4] + 773 0338 0C23 movs r3, #12 + 774 033a 1340 ands r3, r2 + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC + 775 .loc 1 615 0 discriminator 1 + 776 033c 082B cmp r3, #8 + 777 033e 53D0 beq .L123 + 778 .L72: + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_ + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI48 State */ + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF) + 779 .loc 1 626 0 + 780 0340 236A ldr r3, [r4, #32] + 781 0342 002B cmp r3, #0 + 782 0344 60D0 beq .L73 + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the Internal High Speed oscillator (HSI48). */ + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI48_ENABLE(); + 783 .loc 1 629 0 + 784 0346 794A ldr r2, .L133 + 785 0348 516B ldr r1, [r2, #52] + 786 034a 8023 movs r3, #128 + 787 034c 5B02 lsls r3, r3, #9 + 788 034e 0B43 orrs r3, r1 + 789 0350 5363 str r3, [r2, #52] + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 790 .loc 1 632 0 + 791 0352 FFF7FEFF bl HAL_GetTick + 792 .LVL57: + 793 0356 0500 movs r5, r0 + 794 .LVL58: + 795 .L74: + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI48 is ready */ + ARM GAS /tmp/ccQfjpF5.s page 27 + + + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) + 796 .loc 1 635 0 + 797 0358 744B ldr r3, .L133 + 798 035a 5B6B ldr r3, [r3, #52] + 799 035c DB03 lsls r3, r3, #15 + 800 035e 66D4 bmi .L70 + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) + 801 .loc 1 637 0 + 802 0360 FFF7FEFF bl HAL_GetTick + 803 .LVL59: + 804 0364 401B subs r0, r0, r5 + 805 0366 0228 cmp r0, #2 + 806 0368 F6D9 bls .L74 + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 807 .loc 1 639 0 + 808 036a 0320 movs r0, #3 + 809 036c D4E0 b .L20 + 810 .LVL60: + 811 .L121: + 812 .LBB4: + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 813 .loc 1 542 0 + 814 036e 6F4A ldr r2, .L133 + 815 0370 D369 ldr r3, [r2, #28] + 816 0372 6F49 ldr r1, .L133+4 + 817 0374 0B40 ands r3, r1 + 818 0376 D361 str r3, [r2, #28] + 819 0378 BEE7 b .L48 + 820 .LVL61: + 821 .L122: + 822 .LBE4: + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 823 .loc 1 557 0 + 824 037a 6C4B ldr r3, .L133 + 825 037c 5A6B ldr r2, [r3, #52] + 826 037e 0421 movs r1, #4 + 827 0380 0A43 orrs r2, r1 + 828 0382 5A63 str r2, [r3, #52] + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 829 .loc 1 560 0 + 830 0384 5A6B ldr r2, [r3, #52] + 831 0386 0339 subs r1, r1, #3 + 832 0388 0A43 orrs r2, r1 + 833 038a 5A63 str r2, [r3, #52] + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 834 .loc 1 563 0 + 835 038c FFF7FEFF bl HAL_GetTick + 836 .LVL62: + 837 0390 0500 movs r5, r0 + 838 .LVL63: + 839 .L65: + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 840 .loc 1 566 0 + 841 0392 664B ldr r3, .L133 + 842 0394 5B6B ldr r3, [r3, #52] + ARM GAS /tmp/ccQfjpF5.s page 28 + + + 843 0396 9B07 lsls r3, r3, #30 + 844 0398 06D4 bmi .L124 + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 845 .loc 1 568 0 + 846 039a FFF7FEFF bl HAL_GetTick + 847 .LVL64: + 848 039e 401B subs r0, r0, r5 + 849 03a0 0228 cmp r0, #2 + 850 03a2 F6D9 bls .L65 + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 851 .loc 1 570 0 + 852 03a4 0320 movs r0, #3 + 853 03a6 B7E0 b .L20 + 854 .L124: + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 855 .loc 1 575 0 + 856 03a8 6049 ldr r1, .L133 + 857 03aa 4B6B ldr r3, [r1, #52] + 858 03ac F822 movs r2, #248 + 859 03ae 9343 bics r3, r2 + 860 03b0 A269 ldr r2, [r4, #24] + 861 03b2 D200 lsls r2, r2, #3 + 862 03b4 1343 orrs r3, r2 + 863 03b6 4B63 str r3, [r1, #52] + 864 03b8 B2E7 b .L63 + 865 .LVL65: + 866 .L67: + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 867 .loc 1 588 0 + 868 03ba 5C4B ldr r3, .L133 + 869 03bc 5A6B ldr r2, [r3, #52] + 870 03be 0421 movs r1, #4 + 871 03c0 0A43 orrs r2, r1 + 872 03c2 5A63 str r2, [r3, #52] + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 873 .loc 1 591 0 + 874 03c4 5A6B ldr r2, [r3, #52] + 875 03c6 0339 subs r1, r1, #3 + 876 03c8 8A43 bics r2, r1 + 877 03ca 5A63 str r2, [r3, #52] + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 878 .loc 1 594 0 + 879 03cc FFF7FEFF bl HAL_GetTick + 880 .LVL66: + 881 03d0 0500 movs r5, r0 + 882 .LVL67: + 883 .L68: + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 884 .loc 1 597 0 + 885 03d2 564B ldr r3, .L133 + 886 03d4 5B6B ldr r3, [r3, #52] + 887 03d6 9B07 lsls r3, r3, #30 + 888 03d8 A2D5 bpl .L63 + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 889 .loc 1 599 0 + 890 03da FFF7FEFF bl HAL_GetTick + 891 .LVL68: + ARM GAS /tmp/ccQfjpF5.s page 29 + + + 892 03de 401B subs r0, r0, r5 + 893 03e0 0228 cmp r0, #2 + 894 03e2 F6D9 bls .L68 + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 895 .loc 1 601 0 + 896 03e4 0320 movs r0, #3 + 897 03e6 97E0 b .L20 + 898 .LVL69: + 899 .L123: + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 900 .loc 1 616 0 + 901 03e8 504B ldr r3, .L133 + 902 03ea 5B68 ldr r3, [r3, #4] + 903 03ec C022 movs r2, #192 + 904 03ee 5202 lsls r2, r2, #9 + 905 03f0 1340 ands r3, r2 + 906 03f2 9342 cmp r3, r2 + 907 03f4 A4D1 bne .L72 + 908 .L71: + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 909 .loc 1 618 0 + 910 03f6 4D4B ldr r3, .L133 + 911 03f8 5B6B ldr r3, [r3, #52] + 912 03fa DB03 lsls r3, r3, #15 + 913 03fc 17D5 bpl .L70 + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 914 .loc 1 618 0 is_stmt 0 discriminator 1 + 915 03fe 236A ldr r3, [r4, #32] + 916 0400 012B cmp r3, #1 + 917 0402 14D0 beq .L70 + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 918 .loc 1 620 0 is_stmt 1 + 919 0404 0120 movs r0, #1 + 920 0406 87E0 b .L20 + 921 .L73: + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the Internal High Speed oscillator (HSI48). */ + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_HSI48_DISABLE(); + 922 .loc 1 646 0 + 923 0408 484A ldr r2, .L133 + 924 040a 536B ldr r3, [r2, #52] + 925 040c 4949 ldr r1, .L133+8 + 926 040e 0B40 ands r3, r1 + 927 0410 5363 str r3, [r2, #52] + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 928 .loc 1 649 0 + 929 0412 FFF7FEFF bl HAL_GetTick + 930 .LVL70: + 931 0416 0500 movs r5, r0 + 932 .LVL71: + 933 .L76: + ARM GAS /tmp/ccQfjpF5.s page 30 + + + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till HSI48 is ready */ + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) + 934 .loc 1 652 0 + 935 0418 444B ldr r3, .L133 + 936 041a 5B6B ldr r3, [r3, #52] + 937 041c DB03 lsls r3, r3, #15 + 938 041e 06D5 bpl .L70 + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE) + 939 .loc 1 654 0 + 940 0420 FFF7FEFF bl HAL_GetTick + 941 .LVL72: + 942 0424 401B subs r0, r0, r5 + 943 0426 0228 cmp r0, #2 + 944 0428 F6D9 bls .L76 + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 945 .loc 1 656 0 + 946 042a 0320 movs r0, #3 + 947 042c 74E0 b .L20 + 948 .LVL73: + 949 .L70: + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */ + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------------- PLL Configuration -----------------------*/ + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) + 950 .loc 1 667 0 + 951 042e 636A ldr r3, [r4, #36] + 952 0430 002B cmp r3, #0 + 953 0432 00D1 bne .LCB967 + 954 0434 74E0 b .L104 @long jump + 955 .LCB967: + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if the PLL is used as system clock or not */ + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) + 956 .loc 1 670 0 + 957 0436 3D4A ldr r2, .L133 + 958 0438 5168 ldr r1, [r2, #4] + 959 043a 0C22 movs r2, #12 + 960 043c 0A40 ands r2, r1 + 961 043e 082A cmp r2, #8 + 962 0440 4DD0 beq .L78 + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) + 963 .loc 1 672 0 + 964 0442 022B cmp r3, #2 + 965 0444 12D0 beq .L125 + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + ARM GAS /tmp/ccQfjpF5.s page 31 + + + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource)); + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL)); + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV)); + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the main PLL. */ + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the main PLL clock source, predivider and multiplication factor. */ + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL); + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Enable the main PLL. */ + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_ENABLE(); + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is ready */ + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Disable the main PLL. */ + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_PLL_DISABLE(); + 966 .loc 1 716 0 + 967 0446 394A ldr r2, .L133 + 968 0448 1368 ldr r3, [r2] + 969 044a 3B49 ldr r1, .L133+12 + 970 044c 0B40 ands r3, r1 + 971 044e 1360 str r3, [r2] + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 972 .loc 1 719 0 + 973 0450 FFF7FEFF bl HAL_GetTick + 974 .LVL74: + 975 0454 0400 movs r4, r0 + 976 .LVL75: + 977 .L84: + ARM GAS /tmp/ccQfjpF5.s page 32 + + + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Wait till PLL is disabled */ + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) + 978 .loc 1 722 0 + 979 0456 354B ldr r3, .L133 + 980 0458 1B68 ldr r3, [r3] + 981 045a 9B01 lsls r3, r3, #6 + 982 045c 3DD5 bpl .L126 + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) + 983 .loc 1 724 0 + 984 045e FFF7FEFF bl HAL_GetTick + 985 .LVL76: + 986 0462 001B subs r0, r0, r4 + 987 0464 0228 cmp r0, #2 + 988 0466 F6D9 bls .L84 + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 989 .loc 1 726 0 + 990 0468 0320 movs r0, #3 + 991 046a 55E0 b .L20 + 992 .LVL77: + 993 .L125: + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 994 .loc 1 680 0 + 995 046c 2F4A ldr r2, .L133 + 996 046e 1368 ldr r3, [r2] + 997 0470 3149 ldr r1, .L133+12 + 998 0472 0B40 ands r3, r1 + 999 0474 1360 str r3, [r2] + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1000 .loc 1 683 0 + 1001 0476 FFF7FEFF bl HAL_GetTick + 1002 .LVL78: + 1003 047a 0500 movs r5, r0 + 1004 .LVL79: + 1005 .L80: + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1006 .loc 1 686 0 + 1007 047c 2B4B ldr r3, .L133 + 1008 047e 1B68 ldr r3, [r3] + 1009 0480 9B01 lsls r3, r3, #6 + 1010 0482 06D5 bpl .L127 + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1011 .loc 1 688 0 + 1012 0484 FFF7FEFF bl HAL_GetTick + 1013 .LVL80: + 1014 0488 401B subs r0, r0, r5 + 1015 048a 0228 cmp r0, #2 + 1016 048c F6D9 bls .L80 + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1017 .loc 1 690 0 + 1018 048e 0320 movs r0, #3 + 1019 0490 42E0 b .L20 + 1020 .L127: + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV, + 1021 .loc 1 695 0 + ARM GAS /tmp/ccQfjpF5.s page 33 + + + 1022 0492 264B ldr r3, .L133 + 1023 0494 DA6A ldr r2, [r3, #44] + 1024 0496 0F21 movs r1, #15 + 1025 0498 8A43 bics r2, r1 + 1026 049a 216B ldr r1, [r4, #48] + 1027 049c 0A43 orrs r2, r1 + 1028 049e DA62 str r2, [r3, #44] + 1029 04a0 5A68 ldr r2, [r3, #4] + 1030 04a2 2649 ldr r1, .L133+16 + 1031 04a4 0A40 ands r2, r1 + 1032 04a6 E16A ldr r1, [r4, #44] + 1033 04a8 A06A ldr r0, [r4, #40] + 1034 04aa 0143 orrs r1, r0 + 1035 04ac 0A43 orrs r2, r1 + 1036 04ae 5A60 str r2, [r3, #4] + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1037 .loc 1 699 0 + 1038 04b0 1968 ldr r1, [r3] + 1039 04b2 8022 movs r2, #128 + 1040 04b4 5204 lsls r2, r2, #17 + 1041 04b6 0A43 orrs r2, r1 + 1042 04b8 1A60 str r2, [r3] + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1043 .loc 1 702 0 + 1044 04ba FFF7FEFF bl HAL_GetTick + 1045 .LVL81: + 1046 04be 0400 movs r4, r0 + 1047 .LVL82: + 1048 .L82: + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1049 .loc 1 705 0 + 1050 04c0 1A4B ldr r3, .L133 + 1051 04c2 1B68 ldr r3, [r3] + 1052 04c4 9B01 lsls r3, r3, #6 + 1053 04c6 06D4 bmi .L128 + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1054 .loc 1 707 0 + 1055 04c8 FFF7FEFF bl HAL_GetTick + 1056 .LVL83: + 1057 04cc 001B subs r0, r0, r4 + 1058 04ce 0228 cmp r0, #2 + 1059 04d0 F6D9 bls .L82 + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1060 .loc 1 709 0 + 1061 04d2 0320 movs r0, #3 + 1062 04d4 20E0 b .L20 + 1063 .L128: + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check if there is a request to disable the PLL used as System clock source */ + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + ARM GAS /tmp/ccQfjpF5.s page 34 + + + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Do not return HAL_ERROR if request repeats the current configuration */ + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config = RCC->CFGR; + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK; + 1064 .loc 1 753 0 + 1065 04d6 0020 movs r0, #0 + 1066 04d8 1EE0 b .L20 + 1067 .L126: + 1068 04da 0020 movs r0, #0 + 1069 04dc 1CE0 b .L20 + 1070 .LVL84: + 1071 .L78: + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1072 .loc 1 734 0 + 1073 04de 012B cmp r3, #1 + 1074 04e0 20D0 beq .L108 + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pll_config2 = RCC->CFGR2; + 1075 .loc 1 741 0 + 1076 04e2 124B ldr r3, .L133 + 1077 04e4 5A68 ldr r2, [r3, #4] + 1078 .LVL85: + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || + 1079 .loc 1 742 0 + 1080 04e6 D96A ldr r1, [r3, #44] + 1081 .LVL86: + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1082 .loc 1 743 0 + 1083 04e8 C023 movs r3, #192 + 1084 04ea 5B02 lsls r3, r3, #9 + 1085 04ec 1340 ands r3, r2 + 1086 04ee A06A ldr r0, [r4, #40] + 1087 04f0 8342 cmp r3, r0 + 1088 04f2 01D0 beq .L129 + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1089 .loc 1 747 0 + 1090 04f4 0120 movs r0, #1 + 1091 04f6 0FE0 b .L20 + 1092 .L129: + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1093 .loc 1 744 0 discriminator 1 + 1094 04f8 0F23 movs r3, #15 + 1095 04fa 0B40 ands r3, r1 + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV) || + 1096 .loc 1 743 0 discriminator 1 + ARM GAS /tmp/ccQfjpF5.s page 35 + + + 1097 04fc 216B ldr r1, [r4, #48] + 1098 .LVL87: + 1099 04fe 8B42 cmp r3, r1 + 1100 0500 01D0 beq .L130 + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1101 .loc 1 747 0 + 1102 0502 0120 movs r0, #1 + 1103 0504 08E0 b .L20 + 1104 .L130: + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1105 .loc 1 745 0 + 1106 0506 F023 movs r3, #240 + 1107 0508 9B03 lsls r3, r3, #14 + 1108 050a 1A40 ands r2, r3 + 1109 .LVL88: + 1110 050c E36A ldr r3, [r4, #44] + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL)) + 1111 .loc 1 744 0 + 1112 050e 9A42 cmp r2, r3 + 1113 0510 0AD0 beq .L111 + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1114 .loc 1 747 0 + 1115 0512 0120 movs r0, #1 + 1116 0514 00E0 b .L20 + 1117 .LVL89: + 1118 .L86: + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1119 .loc 1 309 0 + 1120 0516 0120 movs r0, #1 + 1121 .LVL90: + 1122 .L20: + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1123 .loc 1 754 0 + 1124 0518 02B0 add sp, sp, #8 + 1125 @ sp needed + 1126 051a 70BD pop {r4, r5, r6, pc} + 1127 .LVL91: + 1128 .L114: + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1129 .loc 1 327 0 + 1130 051c 0120 movs r0, #1 + 1131 .LVL92: + 1132 051e FBE7 b .L20 + 1133 .L104: + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1134 .loc 1 753 0 + 1135 0520 0020 movs r0, #0 + 1136 0522 F9E7 b .L20 + 1137 .L108: + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1138 .loc 1 736 0 + 1139 0524 0120 movs r0, #1 + 1140 0526 F7E7 b .L20 + 1141 .L111: + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1142 .loc 1 753 0 + 1143 0528 0020 movs r0, #0 + ARM GAS /tmp/ccQfjpF5.s page 36 + + + 1144 052a F5E7 b .L20 + 1145 .L134: + 1146 .align 2 + 1147 .L133: + 1148 052c 00100240 .word 1073876992 + 1149 0530 FFFFFFEF .word -268435457 + 1150 0534 FFFFFEFF .word -65537 + 1151 0538 FFFFFFFE .word -16777217 + 1152 053c FF7FC2FF .word -4030465 + 1153 .cfi_endproc + 1154 .LFE41: + 1156 .section .text.HAL_RCC_MCOConfig,"ax",%progbits + 1157 .align 1 + 1158 .global HAL_RCC_MCOConfig + 1159 .syntax unified + 1160 .code 16 + 1161 .thumb_func + 1162 .fpu softvfp + 1164 HAL_RCC_MCOConfig: + 1165 .LFB43: + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Initializes the CPU, AHB and APB buses clocks according to the specified + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * parameters in the RCC_ClkInitStruct. + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the configuration information for the RCC peripheral. + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param FLatency FLASH Latency + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * The value of this parameter depend on device used within the same series + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The HSI is used (enabled by hardware) as system clock source after + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * start-up from Reset, wake-up from STOP and STANDBY mode, or in case + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * of failure of the HSE used directly or indirectly as system clock + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * (if the Clock Security System CSS is enabled). + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note A switch from one clock source to another occurs only if the target + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * clock source is ready (clock stable after start-up delay or PLL locked). + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * If a clock source which is not yet ready is selected, the switch will + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * occur when the clock source will be ready. + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * You can use @ref HAL_RCC_GetClockConfig() function to know which clock is + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * currently used as system clock source. + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HAL status + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check Null pointer */ + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_ClkInitStruct == NULL) + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType)); + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_FLASH_LATENCY(FLatency)); + ARM GAS /tmp/ccQfjpF5.s page 37 + + + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* To correctly read data from FLASH memory, the number of wait states (LATENCY) + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** must be correctly programmed according to the frequency of the CPU clock + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** (HCLK) of the device. */ + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Increasing the number of wait states because of higher CPU frequency */ + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(FLatency > __HAL_FLASH_GET_LATENCY()) + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------- HCLK Configuration --------------------------*/ + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the highest APB divider in order to ensure that we do not go through + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** a non-spec phase whatever we decrease or increase HCLK. */ + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16); + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set the new HCLK clock divider */ + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*------------------------- SYSCLK Configuration ---------------------------*/ + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSE is selected as System Clock Source */ + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSE ready flag */ + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* PLL is selected as System Clock Source */ + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the PLL ready flag */ + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + ARM GAS /tmp/ccQfjpF5.s page 38 + + + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48) + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI48 is selected as System Clock Source */ + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48) + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI48 ready flag */ + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET) + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */ + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI is selected as System Clock Source */ + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the HSI ready flag */ + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get Start Tick */ + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tickstart = HAL_GetTick(); + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE) + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_TIMEOUT; + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Decreasing the number of wait states because of lower CPU frequency */ + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(FLatency < __HAL_FLASH_GET_LATENCY()) + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_FLASH_SET_LATENCY(FLatency); + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check that the new number of wait states is taken into account to access the Flash + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** memory by reading the FLASH_ACR register */ + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_FLASH_GET_LATENCY() != FLatency) + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_ERROR; + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/ + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider); + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Update the SystemCoreClock global variable */ + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF + ARM GAS /tmp/ccQfjpF5.s page 39 + + + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the source of time base considering new system clocks settings*/ + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_InitTick (TICK_INT_PRIORITY); + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return HAL_OK; + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @} + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC clocks control functions + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @verbatim + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** ##### Peripheral Control functions ##### + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** =============================================================================== + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** [..] + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** frequencies. + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endverbatim + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @{ + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE) + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). + 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. + 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected + 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System Clock selected as MCO clock + 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock + 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock + 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock + 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock + 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI14 HSI14 selected as MCO clock + 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @if STM32F042x6 + 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F048xx + 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F071xB + 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F072xB + 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F078xx + 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + ARM GAS /tmp/ccQfjpF5.s page 40 + + + 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F091xC + 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elseif STM32F098xx + 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI48 HSI48 selected as MCO clock + 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F030x6 + 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F030xC + 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F031x6 + 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F038xx + 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F070x6 + 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @elif STM32F070xB + 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK PLLCLK selected as MCO clock + 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** @endif + 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock + 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. + 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: + 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock + 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_2 division by 2 applied to MCO clock + 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_4 division by 4 applied to MCO clock + 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_8 division by 8 applied to MCO clock + 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_16 division by 16 applied to MCO clock + 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_32 division by 32 applied to MCO clock + 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_64 division by 64 applied to MCO clock + 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock + 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None + 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ + 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** + 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Selects the clock source to output on MCO pin. + 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note MCO pin should be configured in alternate function mode. + 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOx specifies the output direction for the clock source. +1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: +1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8). +1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCOSource specifies the clock source to output. +1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: +1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_NOCLOCK No clock selected as MCO clock +1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_SYSCLK System clock selected as MCO clock +1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI HSI selected as MCO clock +1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSE HSE selected as MCO clock +1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSI LSI selected as MCO clock +1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_LSE LSE selected as MCO clock +1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_HSI14 HSI14 selected as MCO clock +1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock +1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCO DIV. +1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * This parameter can be one of the following values: +1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @arg @ref RCC_MCODIV_1 no division applied to MCO clock +1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif +1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv) +1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + ARM GAS /tmp/ccQfjpF5.s page 41 + + + 1166 .loc 1 1019 0 + 1167 .cfi_startproc + 1168 @ args = 0, pretend = 0, frame = 24 + 1169 @ frame_needed = 0, uses_anonymous_args = 0 + 1170 .LVL93: + 1171 0000 70B5 push {r4, r5, r6, lr} + 1172 .LCFI3: + 1173 .cfi_def_cfa_offset 16 + 1174 .cfi_offset 4, -16 + 1175 .cfi_offset 5, -12 + 1176 .cfi_offset 6, -8 + 1177 .cfi_offset 14, -4 + 1178 0002 86B0 sub sp, sp, #24 + 1179 .LCFI4: + 1180 .cfi_def_cfa_offset 40 + 1181 0004 0D00 movs r5, r1 + 1182 0006 1600 movs r6, r2 +1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** GPIO_InitTypeDef gpio; +1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ +1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCO(RCC_MCOx)); +1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCODIV(RCC_MCODiv)); +1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource)); +1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the MCO1 pin in alternate function mode */ +1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Mode = GPIO_MODE_AF_PP; + 1183 .loc 1 1028 0 + 1184 0008 0223 movs r3, #2 + 1185 000a 0293 str r3, [sp, #8] +1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Speed = GPIO_SPEED_FREQ_HIGH; + 1186 .loc 1 1029 0 + 1187 000c 0133 adds r3, r3, #1 + 1188 000e 0493 str r3, [sp, #16] +1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Pull = GPIO_NOPULL; + 1189 .loc 1 1030 0 + 1190 0010 0023 movs r3, #0 + 1191 0012 0393 str r3, [sp, #12] +1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Pin = MCO1_PIN; + 1192 .loc 1 1031 0 + 1193 0014 8022 movs r2, #128 + 1194 .LVL94: + 1195 0016 5200 lsls r2, r2, #1 + 1196 0018 0192 str r2, [sp, #4] +1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** gpio.Alternate = GPIO_AF0_MCO; + 1197 .loc 1 1032 0 + 1198 001a 0593 str r3, [sp, #20] + 1199 .LBB5: +1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* MCO1 Clock Enable */ +1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** MCO1_CLK_ENABLE(); + 1200 .loc 1 1035 0 + 1201 001c 0B4C ldr r4, .L136 + 1202 001e 6269 ldr r2, [r4, #20] + 1203 0020 8021 movs r1, #128 + 1204 .LVL95: + 1205 0022 8902 lsls r1, r1, #10 + 1206 0024 0A43 orrs r2, r1 + ARM GAS /tmp/ccQfjpF5.s page 42 + + + 1207 0026 6261 str r2, [r4, #20] + 1208 0028 6369 ldr r3, [r4, #20] + 1209 002a 0B40 ands r3, r1 + 1210 002c 0093 str r3, [sp] + 1211 002e 009B ldr r3, [sp] + 1212 .LBE5: +1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio); + 1213 .loc 1 1037 0 + 1214 0030 9020 movs r0, #144 + 1215 .LVL96: + 1216 0032 01A9 add r1, sp, #4 + 1217 0034 C005 lsls r0, r0, #23 + 1218 0036 FFF7FEFF bl HAL_GPIO_Init + 1219 .LVL97: +1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Configure the MCO clock source */ +1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv); + 1220 .loc 1 1040 0 + 1221 003a 6268 ldr r2, [r4, #4] + 1222 003c 044B ldr r3, .L136+4 + 1223 003e 1A40 ands r2, r3 + 1224 0040 3543 orrs r5, r6 + 1225 .LVL98: + 1226 0042 2A43 orrs r2, r5 + 1227 0044 6260 str r2, [r4, #4] +1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1228 .loc 1 1041 0 + 1229 0046 06B0 add sp, sp, #24 + 1230 @ sp needed + 1231 .LVL99: + 1232 0048 70BD pop {r4, r5, r6, pc} + 1233 .L137: + 1234 004a C046 .align 2 + 1235 .L136: + 1236 004c 00100240 .word 1073876992 + 1237 0050 FFFFFF80 .word -2130706433 + 1238 .cfi_endproc + 1239 .LFE43: + 1241 .section .text.HAL_RCC_EnableCSS,"ax",%progbits + 1242 .align 1 + 1243 .global HAL_RCC_EnableCSS + 1244 .syntax unified + 1245 .code 16 + 1246 .thumb_func + 1247 .fpu softvfp + 1249 HAL_RCC_EnableCSS: + 1250 .LFB44: +1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Enables the Clock Security System. +1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If a failure is detected on the HSE oscillator clock, this oscillator +1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * is automatically disabled and an interrupt is generated to inform the +1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * software about the failure (Clock Security System Interrupt, CSSI), +1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * allowing the MCU to perform rescue operations. The CSSI is linked to +1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector. +1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None + ARM GAS /tmp/ccQfjpF5.s page 43 + + +1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void) +1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1251 .loc 1 1053 0 + 1252 .cfi_startproc + 1253 @ args = 0, pretend = 0, frame = 0 + 1254 @ frame_needed = 0, uses_anonymous_args = 0 + 1255 @ link register save eliminated. +1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** SET_BIT(RCC->CR, RCC_CR_CSSON) ; + 1256 .loc 1 1054 0 + 1257 0000 034A ldr r2, .L139 + 1258 0002 1168 ldr r1, [r2] + 1259 0004 8023 movs r3, #128 + 1260 0006 1B03 lsls r3, r3, #12 + 1261 0008 0B43 orrs r3, r1 + 1262 000a 1360 str r3, [r2] +1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1263 .loc 1 1055 0 + 1264 @ sp needed + 1265 000c 7047 bx lr + 1266 .L140: + 1267 000e C046 .align 2 + 1268 .L139: + 1269 0010 00100240 .word 1073876992 + 1270 .cfi_endproc + 1271 .LFE44: + 1273 .section .text.HAL_RCC_DisableCSS,"ax",%progbits + 1274 .align 1 + 1275 .global HAL_RCC_DisableCSS + 1276 .syntax unified + 1277 .code 16 + 1278 .thumb_func + 1279 .fpu softvfp + 1281 HAL_RCC_DisableCSS: + 1282 .LFB45: +1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Disables the Clock Security System. +1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void) +1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1283 .loc 1 1062 0 + 1284 .cfi_startproc + 1285 @ args = 0, pretend = 0, frame = 0 + 1286 @ frame_needed = 0, uses_anonymous_args = 0 + 1287 @ link register save eliminated. +1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** CLEAR_BIT(RCC->CR, RCC_CR_CSSON) ; + 1288 .loc 1 1063 0 + 1289 0000 024A ldr r2, .L142 + 1290 0002 1368 ldr r3, [r2] + 1291 0004 0249 ldr r1, .L142+4 + 1292 0006 0B40 ands r3, r1 + 1293 0008 1360 str r3, [r2] +1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1294 .loc 1 1064 0 + 1295 @ sp needed + ARM GAS /tmp/ccQfjpF5.s page 44 + + + 1296 000a 7047 bx lr + 1297 .L143: + 1298 .align 2 + 1299 .L142: + 1300 000c 00100240 .word 1073876992 + 1301 0010 FFFFF7FF .word -524289 + 1302 .cfi_endproc + 1303 .LFE45: + 1305 .global __aeabi_uidiv + 1306 .section .text.HAL_RCC_GetSysClockFreq,"ax",%progbits + 1307 .align 1 + 1308 .global HAL_RCC_GetSysClockFreq + 1309 .syntax unified + 1310 .code 16 + 1311 .thumb_func + 1312 .fpu softvfp + 1314 HAL_RCC_GetSysClockFreq: + 1315 .LFB46: +1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the SYSCLK frequency +1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The system frequency computed by this function is not the real +1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * frequency in the chip. It is calculated based on the predefined +1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * constant and the selected clock source: +1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*) +1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE +1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * divided by PREDIV factor(**) +1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE +1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * divided by PREDIV factor(**) or depending on STM32F0xxxx devices either a value based +1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * on HSI_VALUE divided by 2 or HSI_VALUE divided by PREDIV factor(*) multiplied by the +1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * PLL factor. +1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value +1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * 8 MHz) but the real value may vary depending on the variations +1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * in voltage and temperature. +1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value +1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real +1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * frequency of the crystal used. Otherwise, this function may +1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * have wrong result. +1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The result of this function could be not correct when using fractional +1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * value for HSE crystal. +1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This function can be used by the user application to compute the +1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * baud-rate for the communication peripherals or configure other parameters. +1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time SYSCLK changes, this function must be called to update the +1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right SYSCLK value. Otherwise, any configuration based on this function will be incorre +1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval SYSCLK frequency +1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void) +1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1316 .loc 1 1098 0 + 1317 .cfi_startproc + 1318 @ args = 0, pretend = 0, frame = 32 + 1319 @ frame_needed = 0, uses_anonymous_args = 0 + 1320 0000 30B5 push {r4, r5, lr} + ARM GAS /tmp/ccQfjpF5.s page 45 + + + 1321 .LCFI5: + 1322 .cfi_def_cfa_offset 12 + 1323 .cfi_offset 4, -12 + 1324 .cfi_offset 5, -8 + 1325 .cfi_offset 14, -4 + 1326 0002 89B0 sub sp, sp, #36 + 1327 .LCFI6: + 1328 .cfi_def_cfa_offset 48 +1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** const uint8_t aPLLMULFactorTable[16] = { 2U, 3U, 4U, 5U, 6U, 7U, 8U, 9U, + 1329 .loc 1 1099 0 + 1330 0004 04AA add r2, sp, #16 + 1331 0006 1F4B ldr r3, .L153 + 1332 0008 1800 movs r0, r3 + 1333 000a 32C8 ldmia r0!, {r1, r4, r5} + 1334 000c 32C2 stmia r2!, {r1, r4, r5} + 1335 000e 1100 movs r1, r2 + 1336 0010 0268 ldr r2, [r0] + 1337 0012 0A60 str r2, [r1] +1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U}; +1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** const uint8_t aPredivFactorTable[16] = { 1U, 2U, 3U, 4U, 5U, 6U, 7U, 8U, + 1338 .loc 1 1101 0 + 1339 0014 6A46 mov r2, sp + 1340 0016 1033 adds r3, r3, #16 + 1341 0018 13CB ldmia r3!, {r0, r1, r4} + 1342 001a 13C2 stmia r2!, {r0, r1, r4} + 1343 001c 1B68 ldr r3, [r3] + 1344 001e 1360 str r3, [r2] + 1345 .LVL100: +1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 9U,10U, 11U, 12U, 13U, 14U, 15U, 16U}; +1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U; +1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t sysclockfreq = 0U; +1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** tmpreg = RCC->CFGR; + 1346 .loc 1 1107 0 + 1347 0020 194B ldr r3, .L153+4 + 1348 0022 5A68 ldr r2, [r3, #4] + 1349 .LVL101: +1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get SYSCLK source -------------------------------------------------------*/ +1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** switch (tmpreg & RCC_CFGR_SWS) + 1350 .loc 1 1110 0 + 1351 0024 0C23 movs r3, #12 + 1352 0026 1340 ands r3, r2 + 1353 0028 082B cmp r3, #8 + 1354 002a 04D0 beq .L146 + 1355 002c 0C2B cmp r3, #12 + 1356 002e 26D0 beq .L150 +1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */ +1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSE_VALUE; + 1357 .loc 1 1114 0 + 1358 0030 1648 ldr r0, .L153+8 + 1359 .LVL102: + 1360 .L144: +1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; + ARM GAS /tmp/ccQfjpF5.s page 46 + + +1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */ +1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) +1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */ +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI48_PREDIV) +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48) +1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */ +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI48_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI48_PREDIV */ +1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) +1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */ +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul); +1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else +1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */ +1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul)); +1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif +1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = pllclk; +1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48) +1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI48: /* HSI48 used as system clock source */ +1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSI48_VALUE; +1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */ +1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ +1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** default: /* HSI used as system clock */ +1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** sysclockfreq = HSI_VALUE; +1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; +1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return sysclockfreq; +1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1361 .loc 1 1161 0 + 1362 0032 09B0 add sp, sp, #36 + 1363 @ sp needed + 1364 0034 30BD pop {r4, r5, pc} + 1365 .LVL103: + 1366 .L146: +1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT + 1367 .loc 1 1119 0 + 1368 0036 910C lsrs r1, r2, #18 + 1369 0038 0F23 movs r3, #15 + 1370 003a 1940 ands r1, r3 + ARM GAS /tmp/ccQfjpF5.s page 47 + + + 1371 003c 04A8 add r0, sp, #16 + 1372 003e 445C ldrb r4, [r0, r1] + 1373 .LVL104: +1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE) + 1374 .loc 1 1120 0 + 1375 0040 1149 ldr r1, .L153+4 + 1376 0042 C96A ldr r1, [r1, #44] + 1377 0044 0B40 ands r3, r1 + 1378 0046 6946 mov r1, sp + 1379 0048 C95C ldrb r1, [r1, r3] + 1380 .LVL105: +1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1381 .loc 1 1121 0 + 1382 004a C023 movs r3, #192 + 1383 004c 5B02 lsls r3, r3, #9 + 1384 004e 1A40 ands r2, r3 + 1385 .LVL106: + 1386 0050 8023 movs r3, #128 + 1387 0052 5B02 lsls r3, r3, #9 + 1388 0054 9A42 cmp r2, r3 + 1389 0056 08D0 beq .L151 +1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1390 .loc 1 1127 0 + 1391 0058 C023 movs r3, #192 + 1392 005a 5B02 lsls r3, r3, #9 + 1393 005c 9A42 cmp r2, r3 + 1394 005e 09D0 beq .L152 +1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else + 1395 .loc 1 1137 0 + 1396 0060 0A48 ldr r0, .L153+8 + 1397 0062 FFF7FEFF bl __aeabi_uidiv + 1398 .LVL107: + 1399 0066 6043 muls r0, r4 + 1400 .LVL108: + 1401 0068 E3E7 b .L144 + 1402 .LVL109: + 1403 .L151: +1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1404 .loc 1 1124 0 + 1405 006a 0848 ldr r0, .L153+8 + 1406 006c FFF7FEFF bl __aeabi_uidiv + 1407 .LVL110: + 1408 0070 6043 muls r0, r4 + 1409 .LVL111: + 1410 0072 DEE7 b .L144 + 1411 .LVL112: + 1412 .L152: +1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1413 .loc 1 1130 0 + 1414 0074 0648 ldr r0, .L153+12 + 1415 0076 FFF7FEFF bl __aeabi_uidiv + 1416 .LVL113: + 1417 007a 6043 muls r0, r4 + 1418 .LVL114: + 1419 007c D9E7 b .L144 + 1420 .LVL115: + 1421 .L150: + ARM GAS /tmp/ccQfjpF5.s page 48 + + +1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** break; + 1422 .loc 1 1149 0 + 1423 007e 0448 ldr r0, .L153+12 + 1424 .LVL116: +1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1425 .loc 1 1160 0 + 1426 0080 D7E7 b .L144 + 1427 .L154: + 1428 0082 C046 .align 2 + 1429 .L153: + 1430 0084 00000000 .word .LANCHOR0 + 1431 0088 00100240 .word 1073876992 + 1432 008c 00127A00 .word 8000000 + 1433 0090 006CDC02 .word 48000000 + 1434 .cfi_endproc + 1435 .LFE46: + 1437 .section .text.HAL_RCC_ClockConfig,"ax",%progbits + 1438 .align 1 + 1439 .global HAL_RCC_ClockConfig + 1440 .syntax unified + 1441 .code 16 + 1442 .thumb_func + 1443 .fpu softvfp + 1445 HAL_RCC_ClockConfig: + 1446 .LFB42: + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t tickstart; + 1447 .loc 1 780 0 + 1448 .cfi_startproc + 1449 @ args = 0, pretend = 0, frame = 0 + 1450 @ frame_needed = 0, uses_anonymous_args = 0 + 1451 .LVL117: + 1452 0000 70B5 push {r4, r5, r6, lr} + 1453 .LCFI7: + 1454 .cfi_def_cfa_offset 16 + 1455 .cfi_offset 4, -16 + 1456 .cfi_offset 5, -12 + 1457 .cfi_offset 6, -8 + 1458 .cfi_offset 14, -4 + 1459 0002 0400 movs r4, r0 + 1460 0004 0D00 movs r5, r1 + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1461 .loc 1 784 0 + 1462 0006 0028 cmp r0, #0 + 1463 0008 00D1 bne .LCB1473 + 1464 000a 89E0 b .L169 @long jump + 1465 .LCB1473: + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1466 .loc 1 798 0 + 1467 000c 464B ldr r3, .L181 + 1468 000e 1A68 ldr r2, [r3] + 1469 0010 0123 movs r3, #1 + 1470 0012 1340 ands r3, r2 + 1471 0014 8B42 cmp r3, r1 + 1472 0016 0BD2 bcs .L157 + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1473 .loc 1 801 0 + 1474 0018 4349 ldr r1, .L181 + ARM GAS /tmp/ccQfjpF5.s page 49 + + + 1475 .LVL118: + 1476 001a 0B68 ldr r3, [r1] + 1477 001c 0122 movs r2, #1 + 1478 001e 9343 bics r3, r2 + 1479 0020 2B43 orrs r3, r5 + 1480 0022 0B60 str r3, [r1] + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1481 .loc 1 805 0 + 1482 0024 0B68 ldr r3, [r1] + 1483 0026 1A40 ands r2, r3 + 1484 0028 AA42 cmp r2, r5 + 1485 002a 01D0 beq .L157 + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1486 .loc 1 807 0 + 1487 002c 0120 movs r0, #1 + 1488 .LVL119: + 1489 002e 78E0 b .L156 + 1490 .LVL120: + 1491 .L157: + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1492 .loc 1 812 0 + 1493 0030 2368 ldr r3, [r4] + 1494 0032 9A07 lsls r2, r3, #30 + 1495 0034 0ED5 bpl .L158 + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1496 .loc 1 816 0 + 1497 0036 5B07 lsls r3, r3, #29 + 1498 0038 05D5 bpl .L159 + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1499 .loc 1 818 0 + 1500 003a 3C4A ldr r2, .L181+4 + 1501 003c 5168 ldr r1, [r2, #4] + 1502 003e E023 movs r3, #224 + 1503 0040 DB00 lsls r3, r3, #3 + 1504 0042 0B43 orrs r3, r1 + 1505 0044 5360 str r3, [r2, #4] + 1506 .L159: + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1507 .loc 1 823 0 + 1508 0046 394A ldr r2, .L181+4 + 1509 0048 5368 ldr r3, [r2, #4] + 1510 004a F021 movs r1, #240 + 1511 004c 8B43 bics r3, r1 + 1512 004e A168 ldr r1, [r4, #8] + 1513 0050 0B43 orrs r3, r1 + 1514 0052 5360 str r3, [r2, #4] + 1515 .L158: + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1516 .loc 1 827 0 + 1517 0054 2368 ldr r3, [r4] + 1518 0056 DB07 lsls r3, r3, #31 + 1519 0058 35D5 bpl .L160 + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1520 .loc 1 832 0 + 1521 005a 6368 ldr r3, [r4, #4] + 1522 005c 012B cmp r3, #1 + 1523 005e 09D0 beq .L177 + ARM GAS /tmp/ccQfjpF5.s page 50 + + + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1524 .loc 1 841 0 + 1525 0060 022B cmp r3, #2 + 1526 0062 24D0 beq .L178 + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1527 .loc 1 851 0 + 1528 0064 032B cmp r3, #3 + 1529 0066 28D0 beq .L179 + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1530 .loc 1 864 0 + 1531 0068 304A ldr r2, .L181+4 + 1532 006a 1268 ldr r2, [r2] + 1533 006c 9207 lsls r2, r2, #30 + 1534 006e 05D4 bmi .L162 + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1535 .loc 1 866 0 + 1536 0070 0120 movs r0, #1 + 1537 .LVL121: + 1538 0072 56E0 b .L156 + 1539 .LVL122: + 1540 .L177: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1541 .loc 1 835 0 + 1542 0074 2D4A ldr r2, .L181+4 + 1543 0076 1268 ldr r2, [r2] + 1544 0078 9203 lsls r2, r2, #14 + 1545 007a 53D5 bpl .L180 + 1546 .L162: + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1547 .loc 1 869 0 + 1548 007c 2B49 ldr r1, .L181+4 + 1549 007e 4A68 ldr r2, [r1, #4] + 1550 0080 0320 movs r0, #3 + 1551 .LVL123: + 1552 0082 8243 bics r2, r0 + 1553 0084 1343 orrs r3, r2 + 1554 0086 4B60 str r3, [r1, #4] + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1555 .loc 1 872 0 + 1556 0088 FFF7FEFF bl HAL_GetTick + 1557 .LVL124: + 1558 008c 0600 movs r6, r0 + 1559 .LVL125: + 1560 .L165: + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1561 .loc 1 874 0 + 1562 008e 274B ldr r3, .L181+4 + 1563 0090 5B68 ldr r3, [r3, #4] + 1564 0092 0C22 movs r2, #12 + 1565 0094 1A40 ands r2, r3 + 1566 0096 6368 ldr r3, [r4, #4] + 1567 0098 9B00 lsls r3, r3, #2 + 1568 009a 9A42 cmp r2, r3 + 1569 009c 13D0 beq .L160 + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1570 .loc 1 876 0 + 1571 009e FFF7FEFF bl HAL_GetTick + ARM GAS /tmp/ccQfjpF5.s page 51 + + + 1572 .LVL126: + 1573 00a2 801B subs r0, r0, r6 + 1574 00a4 224B ldr r3, .L181+8 + 1575 00a6 9842 cmp r0, r3 + 1576 00a8 F1D9 bls .L165 + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1577 .loc 1 878 0 + 1578 00aa 0320 movs r0, #3 + 1579 00ac 39E0 b .L156 + 1580 .LVL127: + 1581 .L178: + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1582 .loc 1 844 0 + 1583 00ae 1F4A ldr r2, .L181+4 + 1584 00b0 1268 ldr r2, [r2] + 1585 00b2 9201 lsls r2, r2, #6 + 1586 00b4 E2D4 bmi .L162 + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1587 .loc 1 846 0 + 1588 00b6 0120 movs r0, #1 + 1589 .LVL128: + 1590 00b8 33E0 b .L156 + 1591 .LVL129: + 1592 .L179: + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1593 .loc 1 854 0 + 1594 00ba 1C4A ldr r2, .L181+4 + 1595 00bc 526B ldr r2, [r2, #52] + 1596 00be D203 lsls r2, r2, #15 + 1597 00c0 DCD4 bmi .L162 + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1598 .loc 1 856 0 + 1599 00c2 0120 movs r0, #1 + 1600 .LVL130: + 1601 00c4 2DE0 b .L156 + 1602 .L160: + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1603 .loc 1 884 0 + 1604 00c6 184B ldr r3, .L181 + 1605 00c8 1A68 ldr r2, [r3] + 1606 00ca 0123 movs r3, #1 + 1607 00cc 1340 ands r3, r2 + 1608 00ce AB42 cmp r3, r5 + 1609 00d0 0BD9 bls .L167 + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1610 .loc 1 887 0 + 1611 00d2 1549 ldr r1, .L181 + 1612 00d4 0B68 ldr r3, [r1] + 1613 00d6 0122 movs r2, #1 + 1614 00d8 9343 bics r3, r2 + 1615 00da 2B43 orrs r3, r5 + 1616 00dc 0B60 str r3, [r1] + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1617 .loc 1 891 0 + 1618 00de 0B68 ldr r3, [r1] + 1619 00e0 1A40 ands r2, r3 + 1620 00e2 AA42 cmp r2, r5 + ARM GAS /tmp/ccQfjpF5.s page 52 + + + 1621 00e4 01D0 beq .L167 + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1622 .loc 1 893 0 + 1623 00e6 0120 movs r0, #1 + 1624 00e8 1BE0 b .L156 + 1625 .L167: + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1626 .loc 1 898 0 + 1627 00ea 2368 ldr r3, [r4] + 1628 00ec 5B07 lsls r3, r3, #29 + 1629 00ee 06D5 bpl .L168 + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1630 .loc 1 901 0 + 1631 00f0 0E4A ldr r2, .L181+4 + 1632 00f2 5368 ldr r3, [r2, #4] + 1633 00f4 0F49 ldr r1, .L181+12 + 1634 00f6 0B40 ands r3, r1 + 1635 00f8 E168 ldr r1, [r4, #12] + 1636 00fa 0B43 orrs r3, r1 + 1637 00fc 5360 str r3, [r2, #4] + 1638 .L168: + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1639 .loc 1 905 0 + 1640 00fe FFF7FEFF bl HAL_RCC_GetSysClockFreq + 1641 .LVL131: + 1642 0102 0A4B ldr r3, .L181+4 + 1643 0104 5A68 ldr r2, [r3, #4] + 1644 0106 1209 lsrs r2, r2, #4 + 1645 0108 0F23 movs r3, #15 + 1646 010a 1340 ands r3, r2 + 1647 010c 0A4A ldr r2, .L181+16 + 1648 010e D35C ldrb r3, [r2, r3] + 1649 0110 D840 lsrs r0, r0, r3 + 1650 0112 0A4B ldr r3, .L181+20 + 1651 0114 1860 str r0, [r3] + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1652 .loc 1 908 0 + 1653 0116 0020 movs r0, #0 + 1654 0118 FFF7FEFF bl HAL_InitTick + 1655 .LVL132: + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1656 .loc 1 910 0 + 1657 011c 0020 movs r0, #0 + 1658 011e 00E0 b .L156 + 1659 .LVL133: + 1660 .L169: + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1661 .loc 1 786 0 + 1662 0120 0120 movs r0, #1 + 1663 .LVL134: + 1664 .L156: + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 1665 .loc 1 911 0 + 1666 @ sp needed + 1667 .LVL135: + 1668 .LVL136: + 1669 0122 70BD pop {r4, r5, r6, pc} + ARM GAS /tmp/ccQfjpF5.s page 53 + + + 1670 .LVL137: + 1671 .L180: + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1672 .loc 1 837 0 + 1673 0124 0120 movs r0, #1 + 1674 .LVL138: + 1675 0126 FCE7 b .L156 + 1676 .L182: + 1677 .align 2 + 1678 .L181: + 1679 0128 00200240 .word 1073881088 + 1680 012c 00100240 .word 1073876992 + 1681 0130 88130000 .word 5000 + 1682 0134 FFF8FFFF .word -1793 + 1683 0138 00000000 .word AHBPrescTable + 1684 013c 00000000 .word SystemCoreClock + 1685 .cfi_endproc + 1686 .LFE42: + 1688 .section .text.HAL_RCC_GetHCLKFreq,"ax",%progbits + 1689 .align 1 + 1690 .global HAL_RCC_GetHCLKFreq + 1691 .syntax unified + 1692 .code 16 + 1693 .thumb_func + 1694 .fpu softvfp + 1696 HAL_RCC_GetHCLKFreq: + 1697 .LFB47: +1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the HCLK frequency +1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time HCLK changes, this function must be called to update the +1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right HCLK value. Otherwise, any configuration based on this function will be incorrect +1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * +1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency +1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * and updated within this function +1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval HCLK frequency +1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void) +1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1698 .loc 1 1173 0 + 1699 .cfi_startproc + 1700 @ args = 0, pretend = 0, frame = 0 + 1701 @ frame_needed = 0, uses_anonymous_args = 0 + 1702 @ link register save eliminated. +1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return SystemCoreClock; + 1703 .loc 1 1174 0 + 1704 0000 014B ldr r3, .L184 + 1705 0002 1868 ldr r0, [r3] +1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1706 .loc 1 1175 0 + 1707 @ sp needed + 1708 0004 7047 bx lr + 1709 .L185: + 1710 0006 C046 .align 2 + 1711 .L184: + 1712 0008 00000000 .word SystemCoreClock + 1713 .cfi_endproc + ARM GAS /tmp/ccQfjpF5.s page 54 + + + 1714 .LFE47: + 1716 .section .text.HAL_RCC_GetPCLK1Freq,"ax",%progbits + 1717 .align 1 + 1718 .global HAL_RCC_GetPCLK1Freq + 1719 .syntax unified + 1720 .code 16 + 1721 .thumb_func + 1722 .fpu softvfp + 1724 HAL_RCC_GetPCLK1Freq: + 1725 .LFB48: +1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Returns the PCLK1 frequency +1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note Each time PCLK1 changes, this function must be called to update the +1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * right PCLK1 value. Otherwise, any configuration based on this function will be incorrec +1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval PCLK1 frequency +1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void) +1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1726 .loc 1 1184 0 + 1727 .cfi_startproc + 1728 @ args = 0, pretend = 0, frame = 0 + 1729 @ frame_needed = 0, uses_anonymous_args = 0 + 1730 0000 10B5 push {r4, lr} + 1731 .LCFI8: + 1732 .cfi_def_cfa_offset 8 + 1733 .cfi_offset 4, -8 + 1734 .cfi_offset 14, -4 +1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ +1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNU + 1735 .loc 1 1186 0 + 1736 0002 FFF7FEFF bl HAL_RCC_GetHCLKFreq + 1737 .LVL139: + 1738 0006 044B ldr r3, .L187 + 1739 0008 5A68 ldr r2, [r3, #4] + 1740 000a 120A lsrs r2, r2, #8 + 1741 000c 0723 movs r3, #7 + 1742 000e 1340 ands r3, r2 + 1743 0010 024A ldr r2, .L187+4 + 1744 0012 D35C ldrb r3, [r2, r3] + 1745 0014 D840 lsrs r0, r0, r3 +1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1746 .loc 1 1187 0 + 1747 @ sp needed + 1748 0016 10BD pop {r4, pc} + 1749 .L188: + 1750 .align 2 + 1751 .L187: + 1752 0018 00100240 .word 1073876992 + 1753 001c 00000000 .word APBPrescTable + 1754 .cfi_endproc + 1755 .LFE48: + 1757 .section .text.HAL_RCC_GetOscConfig,"ax",%progbits + 1758 .align 1 + 1759 .global HAL_RCC_GetOscConfig + 1760 .syntax unified + 1761 .code 16 + ARM GAS /tmp/ccQfjpF5.s page 55 + + + 1762 .thumb_func + 1763 .fpu softvfp + 1765 HAL_RCC_GetOscConfig: + 1766 .LFB49: +1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Configures the RCC_OscInitStruct according to the internal +1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC configuration registers. +1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that +1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * will be configured. +1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct) +1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1767 .loc 1 1197 0 + 1768 .cfi_startproc + 1769 @ args = 0, pretend = 0, frame = 0 + 1770 @ frame_needed = 0, uses_anonymous_args = 0 + 1771 @ link register save eliminated. + 1772 .LVL140: +1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ +1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(RCC_OscInitStruct != NULL); +1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set all possible values for the Oscillator type parameter ---------------*/ +1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \ +1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI14; +1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT) +1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->OscillatorType |= RCC_OSCILLATORTYPE_HSI48; + 1773 .loc 1 1205 0 + 1774 0000 3F23 movs r3, #63 + 1775 0002 0360 str r3, [r0] +1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */ +1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSE configuration -----------------------------------------------*/ +1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP) + 1776 .loc 1 1210 0 + 1777 0004 324B ldr r3, .L205 + 1778 0006 1B68 ldr r3, [r3] + 1779 0008 5B03 lsls r3, r3, #13 + 1780 000a 40D5 bpl .L190 +1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS; + 1781 .loc 1 1212 0 + 1782 000c 0523 movs r3, #5 + 1783 000e 4360 str r3, [r0, #4] + 1784 .L191: +1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON) +1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_ON; +1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSEState = RCC_HSE_OFF; +1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccQfjpF5.s page 56 + + +1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI configuration -----------------------------------------------*/ +1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION) + 1785 .loc 1 1224 0 + 1786 0010 2F4B ldr r3, .L205 + 1787 0012 1B68 ldr r3, [r3] + 1788 0014 DB07 lsls r3, r3, #31 + 1789 0016 44D5 bpl .L193 +1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_ON; + 1790 .loc 1 1226 0 + 1791 0018 0123 movs r3, #1 + 1792 001a C360 str r3, [r0, #12] + 1793 .L194: +1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSIState = RCC_HSI_OFF; +1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_B + 1794 .loc 1 1233 0 + 1795 001c 2C49 ldr r1, .L205 + 1796 001e 0A68 ldr r2, [r1] + 1797 0020 D208 lsrs r2, r2, #3 + 1798 0022 1F23 movs r3, #31 + 1799 0024 1340 ands r3, r2 + 1800 0026 0361 str r3, [r0, #16] +1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the LSE configuration -----------------------------------------------*/ +1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP) + 1801 .loc 1 1236 0 + 1802 0028 0B6A ldr r3, [r1, #32] + 1803 002a 5B07 lsls r3, r3, #29 + 1804 002c 3CD5 bpl .L195 +1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS; + 1805 .loc 1 1238 0 + 1806 002e 0523 movs r3, #5 + 1807 0030 8360 str r3, [r0, #8] + 1808 .L196: +1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON) +1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_ON; +1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSEState = RCC_LSE_OFF; +1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the LSI configuration -----------------------------------------------*/ +1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION) + 1809 .loc 1 1250 0 + 1810 0032 274B ldr r3, .L205 + 1811 0034 5B6A ldr r3, [r3, #36] + 1812 0036 DB07 lsls r3, r3, #31 + 1813 0038 40D5 bpl .L198 + ARM GAS /tmp/ccQfjpF5.s page 57 + + +1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_ON; + 1814 .loc 1 1252 0 + 1815 003a 0123 movs r3, #1 + 1816 003c C361 str r3, [r0, #28] + 1817 .L199: +1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->LSIState = RCC_LSI_OFF; +1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI14 configuration -----------------------------------------------*/ +1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR2 & RCC_CR2_HSI14ON) == RCC_CR2_HSI14ON) + 1818 .loc 1 1260 0 + 1819 003e 244B ldr r3, .L205 + 1820 0040 5B6B ldr r3, [r3, #52] + 1821 0042 DB07 lsls r3, r3, #31 + 1822 0044 3DD5 bpl .L200 +1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14State = RCC_HSI_ON; + 1823 .loc 1 1262 0 + 1824 0046 0123 movs r3, #1 + 1825 0048 4361 str r3, [r0, #20] + 1826 .L201: +1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14State = RCC_HSI_OFF; +1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI14CalibrationValue = (uint32_t)((RCC->CR2 & RCC_CR2_HSI14TRIM) >> RCC_HSI14 + 1827 .loc 1 1269 0 + 1828 004a 214A ldr r2, .L205 + 1829 004c 516B ldr r1, [r2, #52] + 1830 004e C908 lsrs r1, r1, #3 + 1831 0050 1F23 movs r3, #31 + 1832 0052 0B40 ands r3, r1 + 1833 0054 8361 str r3, [r0, #24] +1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT) +1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HSI48 configuration if any-----------------------------------------*/ +1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->HSI48State = __HAL_RCC_GET_HSI48_STATE(); + 1834 .loc 1 1273 0 + 1835 0056 536B ldr r3, [r2, #52] + 1836 0058 8021 movs r1, #128 + 1837 005a 4902 lsls r1, r1, #9 + 1838 005c 0B40 ands r3, r1 + 1839 005e 591E subs r1, r3, #1 + 1840 0060 8B41 sbcs r3, r3, r1 + 1841 0062 0362 str r3, [r0, #32] +1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */ +1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the PLL configuration -----------------------------------------------*/ +1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON) + 1842 .loc 1 1277 0 + 1843 0064 1368 ldr r3, [r2] + ARM GAS /tmp/ccQfjpF5.s page 58 + + + 1844 0066 DB01 lsls r3, r3, #7 + 1845 0068 2ED4 bmi .L204 +1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON; +1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** else +1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF; + 1846 .loc 1 1283 0 + 1847 006a 0123 movs r3, #1 + 1848 006c 4362 str r3, [r0, #36] + 1849 .L203: +1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC); + 1850 .loc 1 1285 0 + 1851 006e 184B ldr r3, .L205 + 1852 0070 5A68 ldr r2, [r3, #4] + 1853 0072 C021 movs r1, #192 + 1854 0074 4902 lsls r1, r1, #9 + 1855 0076 0A40 ands r2, r1 + 1856 0078 8262 str r2, [r0, #40] +1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL); + 1857 .loc 1 1286 0 + 1858 007a 5A68 ldr r2, [r3, #4] + 1859 007c F021 movs r1, #240 + 1860 007e 8903 lsls r1, r1, #14 + 1861 0080 0A40 ands r2, r1 + 1862 0082 C262 str r2, [r0, #44] +1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV); + 1863 .loc 1 1287 0 + 1864 0084 DA6A ldr r2, [r3, #44] + 1865 0086 0F23 movs r3, #15 + 1866 0088 1340 ands r3, r2 + 1867 008a 0363 str r3, [r0, #48] +1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1868 .loc 1 1288 0 + 1869 @ sp needed + 1870 008c 7047 bx lr + 1871 .L190: +1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1872 .loc 1 1214 0 + 1873 008e 104B ldr r3, .L205 + 1874 0090 1B68 ldr r3, [r3] + 1875 0092 DB03 lsls r3, r3, #15 + 1876 0094 02D5 bpl .L192 +1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1877 .loc 1 1216 0 + 1878 0096 0123 movs r3, #1 + 1879 0098 4360 str r3, [r0, #4] + 1880 009a B9E7 b .L191 + 1881 .L192: +1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1882 .loc 1 1220 0 + 1883 009c 0023 movs r3, #0 + 1884 009e 4360 str r3, [r0, #4] + 1885 00a0 B6E7 b .L191 + 1886 .L193: + ARM GAS /tmp/ccQfjpF5.s page 59 + + +1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1887 .loc 1 1230 0 + 1888 00a2 0023 movs r3, #0 + 1889 00a4 C360 str r3, [r0, #12] + 1890 00a6 B9E7 b .L194 + 1891 .L195: +1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1892 .loc 1 1240 0 + 1893 00a8 094B ldr r3, .L205 + 1894 00aa 1B6A ldr r3, [r3, #32] + 1895 00ac DB07 lsls r3, r3, #31 + 1896 00ae 02D5 bpl .L197 +1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1897 .loc 1 1242 0 + 1898 00b0 0123 movs r3, #1 + 1899 00b2 8360 str r3, [r0, #8] + 1900 00b4 BDE7 b .L196 + 1901 .L197: +1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1902 .loc 1 1246 0 + 1903 00b6 0023 movs r3, #0 + 1904 00b8 8360 str r3, [r0, #8] + 1905 00ba BAE7 b .L196 + 1906 .L198: +1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1907 .loc 1 1256 0 + 1908 00bc 0023 movs r3, #0 + 1909 00be C361 str r3, [r0, #28] + 1910 00c0 BDE7 b .L199 + 1911 .L200: +1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1912 .loc 1 1266 0 + 1913 00c2 0023 movs r3, #0 + 1914 00c4 4361 str r3, [r0, #20] + 1915 00c6 C0E7 b .L201 + 1916 .L204: +1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1917 .loc 1 1279 0 + 1918 00c8 0223 movs r3, #2 + 1919 00ca 4362 str r3, [r0, #36] + 1920 00cc CFE7 b .L203 + 1921 .L206: + 1922 00ce C046 .align 2 + 1923 .L205: + 1924 00d0 00100240 .word 1073876992 + 1925 .cfi_endproc + 1926 .LFE49: + 1928 .section .text.HAL_RCC_GetClockConfig,"ax",%progbits + 1929 .align 1 + 1930 .global HAL_RCC_GetClockConfig + 1931 .syntax unified + 1932 .code 16 + 1933 .thumb_func + 1934 .fpu softvfp + 1936 HAL_RCC_GetClockConfig: + 1937 .LFB50: +1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + ARM GAS /tmp/ccQfjpF5.s page 60 + + +1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief Get the RCC_ClkInitStruct according to the internal +1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * RCC configuration registers. +1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that +1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * contains the current clock configuration. +1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @param pFLatency Pointer on the Flash Latency. +1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) +1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1938 .loc 1 1299 0 + 1939 .cfi_startproc + 1940 @ args = 0, pretend = 0, frame = 0 + 1941 @ frame_needed = 0, uses_anonymous_args = 0 + 1942 .LVL141: + 1943 0000 10B5 push {r4, lr} + 1944 .LCFI9: + 1945 .cfi_def_cfa_offset 8 + 1946 .cfi_offset 4, -8 + 1947 .cfi_offset 14, -4 +1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check the parameters */ +1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(RCC_ClkInitStruct != NULL); +1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** assert_param(pFLatency != NULL); +1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Set all possible values for the Clock type parameter --------------------*/ +1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1; + 1948 .loc 1 1305 0 + 1949 0002 0723 movs r3, #7 + 1950 0004 0360 str r3, [r0] +1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the SYSCLK configuration --------------------------------------------*/ +1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); + 1951 .loc 1 1308 0 + 1952 0006 0A4B ldr r3, .L208 + 1953 0008 5C68 ldr r4, [r3, #4] + 1954 000a 0322 movs r2, #3 + 1955 000c 2240 ands r2, r4 + 1956 000e 4260 str r2, [r0, #4] +1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the HCLK configuration ----------------------------------------------*/ +1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); + 1957 .loc 1 1311 0 + 1958 0010 5C68 ldr r4, [r3, #4] + 1959 0012 F022 movs r2, #240 + 1960 0014 2240 ands r2, r4 + 1961 0016 8260 str r2, [r0, #8] +1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the APB1 configuration ----------------------------------------------*/ +1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE); + 1962 .loc 1 1314 0 + 1963 0018 5B68 ldr r3, [r3, #4] + 1964 001a E022 movs r2, #224 + 1965 001c D200 lsls r2, r2, #3 + 1966 001e 1340 ands r3, r2 + 1967 0020 C360 str r3, [r0, #12] +1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Get the Flash Wait State (Latency) configuration ------------------------*/ +1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** *pFLatency = __HAL_FLASH_GET_LATENCY(); + ARM GAS /tmp/ccQfjpF5.s page 61 + + + 1968 .loc 1 1316 0 + 1969 0022 044B ldr r3, .L208+4 + 1970 0024 1A68 ldr r2, [r3] + 1971 0026 0123 movs r3, #1 + 1972 0028 1340 ands r3, r2 + 1973 002a 0B60 str r3, [r1] +1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 1974 .loc 1 1317 0 + 1975 @ sp needed + 1976 002c 10BD pop {r4, pc} + 1977 .L209: + 1978 002e C046 .align 2 + 1979 .L208: + 1980 0030 00100240 .word 1073876992 + 1981 0034 00200240 .word 1073881088 + 1982 .cfi_endproc + 1983 .LFE50: + 1985 .section .text.HAL_RCC_CSSCallback,"ax",%progbits + 1986 .align 1 + 1987 .weak HAL_RCC_CSSCallback + 1988 .syntax unified + 1989 .code 16 + 1990 .thumb_func + 1991 .fpu softvfp + 1993 HAL_RCC_CSSCallback: + 1994 .LFB52: +1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief This function handles the RCC CSS interrupt request. +1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @note This API should be called under the NMI_Handler(). +1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval None +1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void) +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check RCC CSSF flag */ +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** if(__HAL_RCC_GET_IT(RCC_IT_CSS)) +1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { +1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* RCC Clock Security System interrupt user callback */ +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_RCC_CSSCallback(); +1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Clear RCC CSS pending bit */ +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __HAL_RCC_CLEAR_IT(RCC_IT_CSS); +1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } +1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** +1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** +1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback +1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @retval none +1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void) +1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 1995 .loc 1 1342 0 + 1996 .cfi_startproc + 1997 @ args = 0, pretend = 0, frame = 0 + 1998 @ frame_needed = 0, uses_anonymous_args = 0 + 1999 @ link register save eliminated. +1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* NOTE : This function Should not be modified, when the callback is needed, + ARM GAS /tmp/ccQfjpF5.s page 62 + + +1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** the HAL_RCC_CSSCallback could be implemented in the user file +1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** */ +1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2000 .loc 1 1346 0 + 2001 @ sp needed + 2002 0000 7047 bx lr + 2003 .cfi_endproc + 2004 .LFE52: + 2006 .section .text.HAL_RCC_NMI_IRQHandler,"ax",%progbits + 2007 .align 1 + 2008 .global HAL_RCC_NMI_IRQHandler + 2009 .syntax unified + 2010 .code 16 + 2011 .thumb_func + 2012 .fpu softvfp + 2014 HAL_RCC_NMI_IRQHandler: + 2015 .LFB51: +1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Check RCC CSSF flag */ + 2016 .loc 1 1325 0 + 2017 .cfi_startproc + 2018 @ args = 0, pretend = 0, frame = 0 + 2019 @ frame_needed = 0, uses_anonymous_args = 0 + 2020 0000 10B5 push {r4, lr} + 2021 .LCFI10: + 2022 .cfi_def_cfa_offset 8 + 2023 .cfi_offset 4, -8 + 2024 .cfi_offset 14, -4 +1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** { + 2025 .loc 1 1327 0 + 2026 0002 054B ldr r3, .L214 + 2027 0004 9B68 ldr r3, [r3, #8] + 2028 0006 1B06 lsls r3, r3, #24 + 2029 0008 00D4 bmi .L213 + 2030 .L211: +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 2031 .loc 1 1335 0 + 2032 @ sp needed + 2033 000a 10BD pop {r4, pc} + 2034 .L213: +1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 2035 .loc 1 1330 0 + 2036 000c FFF7FEFF bl HAL_RCC_CSSCallback + 2037 .LVL142: +1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** } + 2038 .loc 1 1333 0 + 2039 0010 024B ldr r3, .L214+4 + 2040 0012 8022 movs r2, #128 + 2041 0014 1A70 strb r2, [r3] +1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** + 2042 .loc 1 1335 0 + 2043 0016 F8E7 b .L211 + 2044 .L215: + 2045 .align 2 + 2046 .L214: + 2047 0018 00100240 .word 1073876992 + 2048 001c 0A100240 .word 1073877002 + 2049 .cfi_endproc + ARM GAS /tmp/ccQfjpF5.s page 63 + + + 2050 .LFE51: + 2052 .section .rodata + 2053 .align 2 + 2054 .set .LANCHOR0,. + 0 + 2055 .LC0: + 2056 0000 02 .byte 2 + 2057 0001 03 .byte 3 + 2058 0002 04 .byte 4 + 2059 0003 05 .byte 5 + 2060 0004 06 .byte 6 + 2061 0005 07 .byte 7 + 2062 0006 08 .byte 8 + 2063 0007 09 .byte 9 + 2064 0008 0A .byte 10 + 2065 0009 0B .byte 11 + 2066 000a 0C .byte 12 + 2067 000b 0D .byte 13 + 2068 000c 0E .byte 14 + 2069 000d 0F .byte 15 + 2070 000e 10 .byte 16 + 2071 000f 10 .byte 16 + 2072 .LC1: + 2073 0010 01 .byte 1 + 2074 0011 02 .byte 2 + 2075 0012 03 .byte 3 + 2076 0013 04 .byte 4 + 2077 0014 05 .byte 5 + 2078 0015 06 .byte 6 + 2079 0016 07 .byte 7 + 2080 0017 08 .byte 8 + 2081 0018 09 .byte 9 + 2082 0019 0A .byte 10 + 2083 001a 0B .byte 11 + 2084 001b 0C .byte 12 + 2085 001c 0D .byte 13 + 2086 001d 0E .byte 14 + 2087 001e 0F .byte 15 + 2088 001f 10 .byte 16 + 2089 .text + 2090 .Letext0: + 2091 .file 2 "/usr/include/newlib/machine/_default_types.h" + 2092 .file 3 "/usr/include/newlib/sys/_stdint.h" + 2093 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 2094 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 2095 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 2096 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 2097 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h" + 2098 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + 2099 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccQfjpF5.s page 64 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_rcc.c + /tmp/ccQfjpF5.s:16 .text.HAL_RCC_DeInit:0000000000000000 $t + /tmp/ccQfjpF5.s:23 .text.HAL_RCC_DeInit:0000000000000000 HAL_RCC_DeInit + /tmp/ccQfjpF5.s:166 .text.HAL_RCC_DeInit:00000000000000ac $d + /tmp/ccQfjpF5.s:178 .text.HAL_RCC_OscConfig:0000000000000000 $t + /tmp/ccQfjpF5.s:185 .text.HAL_RCC_OscConfig:0000000000000000 HAL_RCC_OscConfig + /tmp/ccQfjpF5.s:719 .text.HAL_RCC_OscConfig:00000000000002e0 $d + /tmp/ccQfjpF5.s:726 .text.HAL_RCC_OscConfig:00000000000002f4 $t + /tmp/ccQfjpF5.s:1148 .text.HAL_RCC_OscConfig:000000000000052c $d + /tmp/ccQfjpF5.s:1157 .text.HAL_RCC_MCOConfig:0000000000000000 $t + /tmp/ccQfjpF5.s:1164 .text.HAL_RCC_MCOConfig:0000000000000000 HAL_RCC_MCOConfig + /tmp/ccQfjpF5.s:1236 .text.HAL_RCC_MCOConfig:000000000000004c $d + /tmp/ccQfjpF5.s:1242 .text.HAL_RCC_EnableCSS:0000000000000000 $t + /tmp/ccQfjpF5.s:1249 .text.HAL_RCC_EnableCSS:0000000000000000 HAL_RCC_EnableCSS + /tmp/ccQfjpF5.s:1269 .text.HAL_RCC_EnableCSS:0000000000000010 $d + /tmp/ccQfjpF5.s:1274 .text.HAL_RCC_DisableCSS:0000000000000000 $t + /tmp/ccQfjpF5.s:1281 .text.HAL_RCC_DisableCSS:0000000000000000 HAL_RCC_DisableCSS + /tmp/ccQfjpF5.s:1300 .text.HAL_RCC_DisableCSS:000000000000000c $d + /tmp/ccQfjpF5.s:1307 .text.HAL_RCC_GetSysClockFreq:0000000000000000 $t + /tmp/ccQfjpF5.s:1314 .text.HAL_RCC_GetSysClockFreq:0000000000000000 HAL_RCC_GetSysClockFreq + /tmp/ccQfjpF5.s:1430 .text.HAL_RCC_GetSysClockFreq:0000000000000084 $d + /tmp/ccQfjpF5.s:1438 .text.HAL_RCC_ClockConfig:0000000000000000 $t + /tmp/ccQfjpF5.s:1445 .text.HAL_RCC_ClockConfig:0000000000000000 HAL_RCC_ClockConfig + /tmp/ccQfjpF5.s:1679 .text.HAL_RCC_ClockConfig:0000000000000128 $d + /tmp/ccQfjpF5.s:1689 .text.HAL_RCC_GetHCLKFreq:0000000000000000 $t + /tmp/ccQfjpF5.s:1696 .text.HAL_RCC_GetHCLKFreq:0000000000000000 HAL_RCC_GetHCLKFreq + /tmp/ccQfjpF5.s:1712 .text.HAL_RCC_GetHCLKFreq:0000000000000008 $d + /tmp/ccQfjpF5.s:1717 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 $t + /tmp/ccQfjpF5.s:1724 .text.HAL_RCC_GetPCLK1Freq:0000000000000000 HAL_RCC_GetPCLK1Freq + /tmp/ccQfjpF5.s:1752 .text.HAL_RCC_GetPCLK1Freq:0000000000000018 $d + /tmp/ccQfjpF5.s:1758 .text.HAL_RCC_GetOscConfig:0000000000000000 $t + /tmp/ccQfjpF5.s:1765 .text.HAL_RCC_GetOscConfig:0000000000000000 HAL_RCC_GetOscConfig + /tmp/ccQfjpF5.s:1924 .text.HAL_RCC_GetOscConfig:00000000000000d0 $d + /tmp/ccQfjpF5.s:1929 .text.HAL_RCC_GetClockConfig:0000000000000000 $t + /tmp/ccQfjpF5.s:1936 .text.HAL_RCC_GetClockConfig:0000000000000000 HAL_RCC_GetClockConfig + /tmp/ccQfjpF5.s:1980 .text.HAL_RCC_GetClockConfig:0000000000000030 $d + /tmp/ccQfjpF5.s:1986 .text.HAL_RCC_CSSCallback:0000000000000000 $t + /tmp/ccQfjpF5.s:1993 .text.HAL_RCC_CSSCallback:0000000000000000 HAL_RCC_CSSCallback + /tmp/ccQfjpF5.s:2007 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 $t + /tmp/ccQfjpF5.s:2014 .text.HAL_RCC_NMI_IRQHandler:0000000000000000 HAL_RCC_NMI_IRQHandler + /tmp/ccQfjpF5.s:2047 .text.HAL_RCC_NMI_IRQHandler:0000000000000018 $d + /tmp/ccQfjpF5.s:2053 .rodata:0000000000000000 $d + +UNDEFINED SYMBOLS +HAL_GetTick +HAL_InitTick +SystemCoreClock +uwTickPrio +HAL_GPIO_Init +__aeabi_uidiv +AHBPrescTable +APBPrescTable diff --git a/fw/midi-dials/build/stm32f0xx_hal_rcc.o b/fw/midi-dials/build/stm32f0xx_hal_rcc.o Binary files differnew file mode 100644 index 0000000..e423e35 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_rcc.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_rcc_ex.d b/fw/midi-dials/build/stm32f0xx_hal_rcc_ex.d new file mode 100644 index 0000000..602483b --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_rcc_ex.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_rcc_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_rcc_ex.lst b/fw/midi-dials/build/stm32f0xx_hal_rcc_ex.lst new file mode 100644 index 0000000..7929525 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_rcc_ex.lst @@ -0,0 +1,2572 @@ +ARM GAS /tmp/ccgjfOns.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_rcc_ex.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits + 16 .align 1 + 17 .global HAL_RCCEx_PeriphCLKConfig + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_RCCEx_PeriphCLKConfig: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @file stm32f0xx_hal_rcc_ex.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * functionalities RCC extension peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + Extended Clock Recovery System Control functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ****************************************************************************** + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @attention + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * All rights reserved.</center></h2> + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This software component is licensed by ST under BSD 3-Clause license, + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the "License"; You may not use this file except in compliance with the + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * License. You may obtain a copy of the License at: + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * opensource.org/licenses/BSD-3-Clause + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ****************************************************************************** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/ + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #include "stm32f0xx_hal.h" + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccgjfOns.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCC Extension HAL module driver. + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/ + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private define ------------------------------------------------------------*/ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CRS) + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Constants RCCEx Private Constants + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Bit position in register */ + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_CFGR_FELIM_BITNUMBER 16 + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_CR_TRIM_BITNUMBER 8 + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_ISR_FECAP_BITNUMBER 16 + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @} + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* CRS */ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private macro -------------------------------------------------------------*/ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Macros RCCEx Private Macros + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @} + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/ + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/ + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private functions ---------------------------------------------------------*/ + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @verbatim + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions ##### + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..] + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequencies. + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..] + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the backup registers) are set to their reset values. + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endverbatim + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + ARM GAS /tmp/ccgjfOns.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Initializes the RCC extended peripherals clocks according to the specified + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * parameters in the RCC_PeriphCLKInitTypeDef. + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * contains the configuration information for the Extended Peripherals clocks + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * (USART, RTC, I2C, CEC and USB). + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Care must be taken when @ref HAL_RCCEx_PeriphCLKConfig() is used to select + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the RTC clock source; in this case the Backup domain will be reset in + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * order to modify the RTC Clock source, as consequence RTC registers (including + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the backup registers) and RCC_BDCR register are set to their reset values. + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval HAL status + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 26 .loc 1 105 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 8 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 70B5 push {r4, r5, r6, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 16 + 34 .cfi_offset 4, -16 + 35 .cfi_offset 5, -12 + 36 .cfi_offset 6, -8 + 37 .cfi_offset 14, -4 + 38 0002 82B0 sub sp, sp, #8 + 39 .LCFI1: + 40 .cfi_def_cfa_offset 24 + 41 0004 0400 movs r4, r0 + 42 .LVL1: + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U; + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*---------------------------- RTC configuration -------------------------------*/ + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) + 43 .loc 1 113 0 + 44 0006 0368 ldr r3, [r0] + 45 0008 DB03 lsls r3, r3, #15 + 46 000a 35D5 bpl .L2 + 47 .LVL2: + 48 .LBB2: + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* check for RTC Parameters used to output RTCCLK */ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET; + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* As soon as function is called to change RTC clock source, activation of the + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** power domain is done. */ + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Requires to enable write access to Backup Domain of necessary */ + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED()) + 49 .loc 1 123 0 + ARM GAS /tmp/ccgjfOns.s page 4 + + + 50 000c 4B4B ldr r3, .L22 + 51 000e DB69 ldr r3, [r3, #28] + 52 0010 DB00 lsls r3, r3, #3 + 53 0012 66D4 bmi .L15 + 54 .LBB3: + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 55 .loc 1 125 0 + 56 0014 494A ldr r2, .L22 + 57 0016 D169 ldr r1, [r2, #28] + 58 0018 8020 movs r0, #128 + 59 .LVL3: + 60 001a 4005 lsls r0, r0, #21 + 61 001c 0143 orrs r1, r0 + 62 001e D161 str r1, [r2, #28] + 63 0020 D369 ldr r3, [r2, #28] + 64 0022 0340 ands r3, r0 + 65 0024 0193 str r3, [sp, #4] + 66 0026 019B ldr r3, [sp, #4] + 67 .LVL4: + 68 .LBE3: + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pwrclkchanged = SET; + 69 .loc 1 126 0 + 70 0028 0125 movs r5, #1 + 71 .LVL5: + 72 .L3: + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 73 .loc 1 129 0 + 74 002a 454B ldr r3, .L22+4 + 75 002c 1B68 ldr r3, [r3] + 76 002e DB05 lsls r3, r3, #23 + 77 0030 59D5 bpl .L19 + 78 .LVL6: + 79 .L4: + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */ + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(PWR->CR, PWR_CR_DBP); + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL); + 80 .loc 1 147 0 + 81 0032 424B ldr r3, .L22 + 82 0034 1B6A ldr r3, [r3, #32] + ARM GAS /tmp/ccgjfOns.s page 5 + + + 83 0036 C022 movs r2, #192 + 84 0038 9200 lsls r2, r2, #2 + 85 003a 1340 ands r3, r2 + 86 .LVL7: + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE + 87 .loc 1 148 0 + 88 003c 13D0 beq .L8 + 89 .loc 1 148 0 is_stmt 0 discriminator 1 + 90 003e 6168 ldr r1, [r4, #4] + 91 0040 0A40 ands r2, r1 + 92 0042 9A42 cmp r2, r3 + 93 0044 0FD0 beq .L8 + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Store the content of BDCR register before the reset of Backup Domain */ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); + 94 .loc 1 151 0 is_stmt 1 + 95 0046 3D4B ldr r3, .L22 + 96 .LVL8: + 97 0048 186A ldr r0, [r3, #32] + 98 004a 3E4A ldr r2, .L22+8 + 99 004c 0240 ands r2, r0 + 100 .LVL9: + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */ + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE(); + 101 .loc 1 153 0 + 102 004e 1E6A ldr r6, [r3, #32] + 103 0050 8021 movs r1, #128 + 104 0052 4902 lsls r1, r1, #9 + 105 0054 3143 orrs r1, r6 + 106 0056 1962 str r1, [r3, #32] + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE(); + 107 .loc 1 154 0 + 108 0058 196A ldr r1, [r3, #32] + 109 005a 3B4E ldr r6, .L22+12 + 110 005c 3140 ands r1, r6 + 111 005e 1962 str r1, [r3, #32] + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */ + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** RCC->BDCR = temp_reg; + 112 .loc 1 156 0 + 113 0060 1A62 str r2, [r3, #32] + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for LSERDY if LSE was enabled */ + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON)) + 114 .loc 1 159 0 + 115 0062 C307 lsls r3, r0, #31 + 116 0064 53D4 bmi .L20 + 117 .LVL10: + 118 .L8: + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Start Tick */ + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait till LSE is ready */ + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccgjfOns.s page 6 + + + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_TIMEOUT; + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); + 119 .loc 1 174 0 + 120 0066 354A ldr r2, .L22 + 121 0068 136A ldr r3, [r2, #32] + 122 006a 3649 ldr r1, .L22+8 + 123 006c 0B40 ands r3, r1 + 124 006e 6168 ldr r1, [r4, #4] + 125 0070 0B43 orrs r3, r1 + 126 0072 1362 str r3, [r2, #32] + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Require to disable power clock if necessary */ + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(pwrclkchanged == SET) + 127 .loc 1 177 0 + 128 0074 012D cmp r5, #1 + 129 0076 59D0 beq .L21 + 130 .LVL11: + 131 .L2: + 132 .LBE2: + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE(); + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------- USART1 Configuration ------------------------*/ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) + 133 .loc 1 184 0 + 134 0078 2368 ldr r3, [r4] + 135 007a DB07 lsls r3, r3, #31 + 136 007c 06D5 bpl .L11 + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART1 clock source */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); + 137 .loc 1 190 0 + 138 007e 2F4A ldr r2, .L22 + 139 0080 136B ldr r3, [r2, #48] + 140 0082 0321 movs r1, #3 + 141 0084 8B43 bics r3, r1 + 142 0086 A168 ldr r1, [r4, #8] + 143 0088 0B43 orrs r3, r1 + 144 008a 1363 str r3, [r2, #48] + 145 .L11: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*----------------------------- USART2 Configuration --------------------------*/ + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) + 146 .loc 1 196 0 + 147 008c 2368 ldr r3, [r4] + ARM GAS /tmp/ccgjfOns.s page 7 + + + 148 008e 9B07 lsls r3, r3, #30 + 149 0090 06D5 bpl .L12 + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART2 clock source */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); + 150 .loc 1 202 0 + 151 0092 2A4A ldr r2, .L22 + 152 0094 136B ldr r3, [r2, #48] + 153 0096 2D49 ldr r1, .L22+16 + 154 0098 0B40 ands r3, r1 + 155 009a E168 ldr r1, [r4, #12] + 156 009c 0B43 orrs r3, r1 + 157 009e 1363 str r3, [r2, #48] + 158 .L12: + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F091xC) || defined(STM32F098xx) + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*----------------------------- USART3 Configuration --------------------------*/ + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART3 clock source */ + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F091xC || STM32F098xx */ + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ I2C1 Configuration ------------------------*/ + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) + 159 .loc 1 220 0 + 160 00a0 2368 ldr r3, [r4] + 161 00a2 9B06 lsls r3, r3, #26 + 162 00a4 06D5 bpl .L13 + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the I2C1 clock source */ + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); + 163 .loc 1 226 0 + 164 00a6 254A ldr r2, .L22 + 165 00a8 136B ldr r3, [r2, #48] + 166 00aa 1021 movs r1, #16 + 167 00ac 8B43 bics r3, r1 + 168 00ae 2169 ldr r1, [r4, #16] + 169 00b0 0B43 orrs r3, r1 + 170 00b2 1363 str r3, [r2, #48] + 171 .L13: + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || + ARM GAS /tmp/ccgjfOns.s page 8 + + + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ USB Configuration ------------------------*/ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB) + 172 .loc 1 231 0 + 173 00b4 2368 ldr r3, [r4] + 174 00b6 9B03 lsls r3, r3, #14 + 175 00b8 06D5 bpl .L14 + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USB clock source */ + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); + 176 .loc 1 237 0 + 177 00ba 204A ldr r2, .L22 + 178 00bc 136B ldr r3, [r2, #48] + 179 00be 8021 movs r1, #128 + 180 00c0 8B43 bics r3, r1 + 181 00c2 A169 ldr r1, [r4, #24] + 182 00c4 0B43 orrs r3, r1 + 183 00c6 1363 str r3, [r2, #48] + 184 .L14: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */ + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx)\ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F051x8) || defined(STM32F058xx)\ + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ CEC clock Configuration -------------------*/ + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC) + 185 .loc 1 246 0 + 186 00c8 2368 ldr r3, [r4] + 187 00ca 5B05 lsls r3, r3, #21 + 188 00cc 33D5 bpl .L18 + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection)); + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the CEC clock source */ + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection); + 189 .loc 1 252 0 + 190 00ce 1B4A ldr r2, .L22 + 191 00d0 136B ldr r3, [r2, #48] + 192 00d2 4021 movs r1, #64 + 193 00d4 8B43 bics r3, r1 + 194 00d6 6169 ldr r1, [r4, #20] + 195 00d8 0B43 orrs r3, r1 + 196 00da 1363 str r3, [r2, #48] + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || */ + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F051x8 || STM32F058xx || */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_OK; + 197 .loc 1 259 0 + 198 00dc 0020 movs r0, #0 + ARM GAS /tmp/ccgjfOns.s page 9 + + + 199 .L6: + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 200 .loc 1 260 0 + 201 00de 02B0 add sp, sp, #8 + 202 @ sp needed + 203 .LVL12: + 204 00e0 70BD pop {r4, r5, r6, pc} + 205 .LVL13: + 206 .L15: + 207 .LBB4: + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 208 .loc 1 118 0 + 209 00e2 0025 movs r5, #0 + 210 00e4 A1E7 b .L3 + 211 .LVL14: + 212 .L19: + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 213 .loc 1 132 0 + 214 00e6 164A ldr r2, .L22+4 + 215 00e8 1168 ldr r1, [r2] + 216 00ea 8023 movs r3, #128 + 217 00ec 5B00 lsls r3, r3, #1 + 218 00ee 0B43 orrs r3, r1 + 219 00f0 1360 str r3, [r2] + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 220 .loc 1 135 0 + 221 00f2 FFF7FEFF bl HAL_GetTick + 222 .LVL15: + 223 00f6 0600 movs r6, r0 + 224 .LVL16: + 225 .L5: + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 226 .loc 1 137 0 + 227 00f8 114B ldr r3, .L22+4 + 228 00fa 1B68 ldr r3, [r3] + 229 00fc DB05 lsls r3, r3, #23 + 230 00fe 98D4 bmi .L4 + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 231 .loc 1 139 0 + 232 0100 FFF7FEFF bl HAL_GetTick + 233 .LVL17: + 234 0104 801B subs r0, r0, r6 + 235 0106 6428 cmp r0, #100 + 236 0108 F6D9 bls .L5 + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 237 .loc 1 141 0 + 238 010a 0320 movs r0, #3 + 239 010c E7E7 b .L6 + 240 .LVL18: + 241 .L20: + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 242 .loc 1 162 0 + 243 010e FFF7FEFF bl HAL_GetTick + 244 .LVL19: + 245 0112 0600 movs r6, r0 + 246 .LVL20: + 247 .L9: + ARM GAS /tmp/ccgjfOns.s page 10 + + + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 248 .loc 1 165 0 + 249 0114 094B ldr r3, .L22 + 250 0116 1B6A ldr r3, [r3, #32] + 251 0118 9B07 lsls r3, r3, #30 + 252 011a A4D4 bmi .L8 + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 253 .loc 1 167 0 + 254 011c FFF7FEFF bl HAL_GetTick + 255 .LVL21: + 256 0120 801B subs r0, r0, r6 + 257 0122 0B4B ldr r3, .L22+20 + 258 0124 9842 cmp r0, r3 + 259 0126 F5D9 bls .L9 + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 260 .loc 1 169 0 + 261 0128 0320 movs r0, #3 + 262 012a D8E7 b .L6 + 263 .LVL22: + 264 .L21: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 265 .loc 1 179 0 + 266 012c D369 ldr r3, [r2, #28] + 267 012e 0949 ldr r1, .L22+24 + 268 0130 0B40 ands r3, r1 + 269 0132 D361 str r3, [r2, #28] + 270 0134 A0E7 b .L2 + 271 .LVL23: + 272 .L18: + 273 .LBE4: + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 274 .loc 1 259 0 + 275 0136 0020 movs r0, #0 + 276 0138 D1E7 b .L6 + 277 .L23: + 278 013a C046 .align 2 + 279 .L22: + 280 013c 00100240 .word 1073876992 + 281 0140 00700040 .word 1073770496 + 282 0144 FFFCFFFF .word -769 + 283 0148 FFFFFEFF .word -65537 + 284 014c FFFFFCFF .word -196609 + 285 0150 88130000 .word 5000 + 286 0154 FFFFFFEF .word -268435457 + 287 .cfi_endproc + 288 .LFE40: + 290 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits + 291 .align 1 + 292 .global HAL_RCCEx_GetPeriphCLKConfig + 293 .syntax unified + 294 .code 16 + 295 .thumb_func + 296 .fpu softvfp + 298 HAL_RCCEx_GetPeriphCLKConfig: + 299 .LFB41: + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + ARM GAS /tmp/ccgjfOns.s page 11 + + + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Get the RCC_ClkInitStruct according to the internal + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * RCC configuration registers. + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals clocks + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * (USART, RTC, I2C, CEC and USB). + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 300 .loc 1 271 0 + 301 .cfi_startproc + 302 @ args = 0, pretend = 0, frame = 0 + 303 @ frame_needed = 0, uses_anonymous_args = 0 + 304 @ link register save eliminated. + 305 .LVL24: + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Common part first */ + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK + 306 .loc 1 274 0 + 307 0000 114B ldr r3, .L25 + 308 0002 0360 str r3, [r0] + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the RTC configuration --------------------------------------------*/ + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE(); + 309 .loc 1 276 0 + 310 0004 114B ldr r3, .L25+4 + 311 0006 1A6A ldr r2, [r3, #32] + 312 0008 C021 movs r1, #192 + 313 000a 8900 lsls r1, r1, #2 + 314 000c 0A40 ands r2, r1 + 315 000e 4260 str r2, [r0, #4] + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/ + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE(); + 316 .loc 1 278 0 + 317 0010 196B ldr r1, [r3, #48] + 318 0012 0322 movs r2, #3 + 319 0014 0A40 ands r2, r1 + 320 0016 8260 str r2, [r0, #8] + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the I2C1 clock source -----------------------------------------------*/ + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE(); + 321 .loc 1 280 0 + 322 0018 196B ldr r1, [r3, #48] + 323 001a 1022 movs r2, #16 + 324 001c 0A40 ands r2, r1 + 325 001e 0261 str r2, [r0, #16] + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART2; + 326 .loc 1 284 0 + 327 0020 0B4A ldr r2, .L25+8 + 328 0022 0260 str r2, [r0] + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART2 clock source ---------------------------------------------*/ + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE(); + 329 .loc 1 286 0 + 330 0024 1A6B ldr r2, [r3, #48] + 331 0026 C021 movs r1, #192 + 332 0028 8902 lsls r1, r1, #10 + ARM GAS /tmp/ccgjfOns.s page 12 + + + 333 002a 0A40 ands r2, r1 + 334 002c C260 str r2, [r0, #12] + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F091xC) || defined(STM32F098xx) + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART3; + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART3 clock source ---------------------------------------------*/ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE(); + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F091xC || STM32F098xx */ + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB; + 335 .loc 1 297 0 + 336 002e 094A ldr r2, .L25+12 + 337 0030 0260 str r2, [r0] + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USB clock source ---------------------------------------------*/ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE(); + 338 .loc 1 299 0 + 339 0032 196B ldr r1, [r3, #48] + 340 0034 8022 movs r2, #128 + 341 0036 0A40 ands r2, r1 + 342 0038 8261 str r2, [r0, #24] + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx)\ + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F051x8) || defined(STM32F058xx)\ + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\ + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx) + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_CEC; + 343 .loc 1 306 0 + 344 003a 074A ldr r2, .L25+16 + 345 003c 0260 str r2, [r0] + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the CEC clock source ------------------------------------------------*/ + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE(); + 346 .loc 1 308 0 + 347 003e 1A6B ldr r2, [r3, #48] + 348 0040 4023 movs r3, #64 + 349 0042 1340 ands r3, r2 + 350 0044 4361 str r3, [r0, #20] + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || */ + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F051x8 || STM32F058xx || */ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F071xB || STM32F072xB || STM32F078xx || */ + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 351 .loc 1 314 0 + 352 @ sp needed + 353 0046 7047 bx lr + 354 .L26: + 355 .align 2 + 356 .L25: + 357 0048 21000100 .word 65569 + 358 004c 00100240 .word 1073876992 + 359 0050 23000100 .word 65571 + 360 0054 23000300 .word 196643 + 361 0058 23040300 .word 197667 + ARM GAS /tmp/ccgjfOns.s page 13 + + + 362 .cfi_endproc + 363 .LFE41: + 365 .global __aeabi_uidiv + 366 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits + 367 .align 1 + 368 .global HAL_RCCEx_GetPeriphCLKFreq + 369 .syntax unified + 370 .code 16 + 371 .thumb_func + 372 .fpu softvfp + 374 HAL_RCCEx_GetPeriphCLKFreq: + 375 .LFB42: + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Returns the peripheral clock frequency + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Returns 0 if peripheral clock is unknown + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be one of the following values: + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F042x6 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F048xx + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F051x8 + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F058xx + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F070x6 + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F070xB + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F071xB + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F072xB + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F078xx + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F091xC + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + ARM GAS /tmp/ccgjfOns.s page 14 + + + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART2 peripheral clock + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F098xx + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART2 peripheral clock + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval Frequency in Hz (0: means that no available frequency for the peripheral) + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 376 .loc 1 371 0 + 377 .cfi_startproc + 378 @ args = 0, pretend = 0, frame = 0 + 379 @ frame_needed = 0, uses_anonymous_args = 0 + 380 .LVL25: + 381 0000 10B5 push {r4, lr} + 382 .LCFI2: + 383 .cfi_def_cfa_offset 8 + 384 .cfi_offset 4, -8 + 385 .cfi_offset 14, -4 + 386 .LVL26: + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */ + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t frequency = 0U; + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t srcclk = 0U; + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(USB) + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t pllmull = 0U, pllsource = 0U, predivfactor = 0U; + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* USB */ + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** switch (PeriphClk) + 387 .loc 1 383 0 + 388 0002 2028 cmp r0, #32 + 389 0004 00D1 bne .LCB374 + 390 0006 80E0 b .L29 @long jump + 391 .LCB374: + 392 0008 0FD9 bls .L67 + 393 000a 8023 movs r3, #128 + 394 000c 5B02 lsls r3, r3, #9 + 395 000e 9842 cmp r0, r3 + 396 0010 23D0 beq .L33 + 397 0012 8023 movs r3, #128 + 398 0014 9B02 lsls r3, r3, #10 + 399 0016 9842 cmp r0, r3 + 400 0018 00D1 bne .LCB384 + 401 001a 86E0 b .L34 @long jump + 402 .LCB384: + 403 001c 8023 movs r3, #128 + 404 001e DB00 lsls r3, r3, #3 + 405 0020 9842 cmp r0, r3 + 406 0022 00D1 bne .LCB388 + 407 0024 B7E0 b .L68 @long jump + 408 .LCB388: + ARM GAS /tmp/ccgjfOns.s page 15 + + + 409 .L49: + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 410 .loc 1 373 0 + 411 0026 0020 movs r0, #0 + 412 .LVL27: + 413 .L27: + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RTC: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current RTC source */ + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE(); + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if RTC clock selection is LSE */ + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSI is ready and if RTC clock selection is LSI */ + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSI_VALUE; + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/ + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 32U; + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART1: + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART1 source */ + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART1_SOURCE(); + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is PCLK1 */ + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK1) + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART1 clock selection is HSI */ + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is SYSCLK */ + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK) + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART1 clock selection is LSE */ + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW) + ARM GAS /tmp/ccgjfOns.s page 16 + + + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART2: + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART2 source */ + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART2_SOURCE(); + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is PCLK1 */ + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART2CLKSOURCE_PCLK1) + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART2 clock selection is HSI */ + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is SYSCLK */ + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK) + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART2 clock selection is LSE */ + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */ + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW) + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART3: + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART3 source */ + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART3_SOURCE(); + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is PCLK1 */ + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART3CLKSOURCE_PCLK1) + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq(); + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART3 clock selection is HSI */ + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is SYSCLK */ + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART3CLKSOURCE_SYSCLK) + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART3 clock selection is LSE */ + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */ + ARM GAS /tmp/ccgjfOns.s page 17 + + + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C1: + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current I2C1 source */ + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C1_SOURCE(); + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C1 clock selection is HSI */ + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if I2C1 clock selection is SYSCLK */ + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK) + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq(); + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(USB) + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB: + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USB source */ + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USB_SOURCE(); + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if PLL is ready and if USB clock selection is PLL */ + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_USBCLKSOURCE_PLL) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY))) + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get PLL clock source and multiplication factor ----------------------*/ + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = (pllmull >> RCC_CFGR_PLLMUL_BITNUMBER) + 2U; + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U; + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : frequency = HSE/PREDIV * PLLMUL */ + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSE_VALUE/predivfactor) * pllmull; + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CR2_HSI48ON) + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI48 used as PLL clock source : frequency = HSI48/PREDIV * PLLMUL */ + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI48_VALUE / predivfactor) * pllmull; + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CR2_HSI48ON */ + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F078xx) || defined(STM32F072xB) || + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : frequency = HSI/PREDIV * PLLMUL */ + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI_VALUE / predivfactor) * pllmull; + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #else + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : frequency = HSI/2U * PLLMUL */ + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI_VALUE >> 1U) * pllmull; + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB */ + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CR2_HSI48ON) + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI48 is ready and if USB clock selection is HSI48 */ + ARM GAS /tmp/ccgjfOns.s page 18 + + + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USBCLKSOURCE_HSI48) && (HAL_IS_BIT_SET(RCC->CR2, RCC_CR2_HSI48RDY))) + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI48_VALUE; + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CR2_HSI48ON */ + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* USB */ + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CEC) + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_CEC: + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current CEC source */ + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_CEC_SOURCE(); + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if CEC clock selection is HSI */ + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_CECCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE; + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if CEC clock selection is LSE */ + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_CECCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE; + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* CEC */ + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** default: + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break; + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return(frequency); + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 414 .loc 1 582 0 + 415 @ sp needed + 416 0028 10BD pop {r4, pc} + 417 .LVL28: + 418 .L67: + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 419 .loc 1 383 0 + 420 002a 0128 cmp r0, #1 + 421 002c 3CD0 beq .L31 + 422 002e 0228 cmp r0, #2 + 423 0030 F9D1 bne .L49 + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 424 .loc 1 438 0 + 425 0032 6B4B ldr r3, .L83 + 426 0034 1B6B ldr r3, [r3, #48] + 427 0036 C022 movs r2, #192 + 428 0038 9202 lsls r2, r2, #10 + 429 003a 1340 ands r3, r2 + 430 .LVL29: + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 431 .loc 1 441 0 + 432 003c 53D0 beq .L69 + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccgjfOns.s page 19 + + + 433 .loc 1 446 0 + 434 003e C022 movs r2, #192 + 435 0040 9202 lsls r2, r2, #10 + 436 0042 9342 cmp r3, r2 + 437 0044 52D0 beq .L70 + 438 .L42: + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 439 .loc 1 451 0 + 440 0046 8022 movs r2, #128 + 441 0048 5202 lsls r2, r2, #9 + 442 004a 9342 cmp r3, r2 + 443 004c 54D0 beq .L71 + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 444 .loc 1 456 0 + 445 004e 8022 movs r2, #128 + 446 0050 9202 lsls r2, r2, #10 + 447 0052 9342 cmp r3, r2 + 448 0054 53D0 beq .L72 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 449 .loc 1 373 0 + 450 0056 0020 movs r0, #0 + 451 .LVL30: + 452 0058 E6E7 b .L27 + 453 .LVL31: + 454 .L33: + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 455 .loc 1 388 0 + 456 005a 614B ldr r3, .L83 + 457 005c 1B6A ldr r3, [r3, #32] + 458 005e C022 movs r2, #192 + 459 0060 9200 lsls r2, r2, #2 + 460 0062 1340 ands r3, r2 + 461 .LVL32: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 462 .loc 1 391 0 + 463 0064 8022 movs r2, #128 + 464 0066 5200 lsls r2, r2, #1 + 465 0068 9342 cmp r3, r2 + 466 006a 09D0 beq .L73 + 467 .L36: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 468 .loc 1 396 0 + 469 006c 8022 movs r2, #128 + 470 006e 9200 lsls r2, r2, #2 + 471 0070 9342 cmp r3, r2 + 472 0072 0CD0 beq .L74 + 473 .L37: + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 474 .loc 1 401 0 + 475 0074 C022 movs r2, #192 + 476 0076 9200 lsls r2, r2, #2 + 477 0078 9342 cmp r3, r2 + 478 007a 0ED0 beq .L75 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 479 .loc 1 373 0 + 480 007c 0020 movs r0, #0 + 481 .LVL33: + ARM GAS /tmp/ccgjfOns.s page 20 + + + 482 007e D3E7 b .L27 + 483 .LVL34: + 484 .L73: + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 485 .loc 1 391 0 discriminator 1 + 486 0080 574A ldr r2, .L83 + 487 0082 126A ldr r2, [r2, #32] + 488 0084 9207 lsls r2, r2, #30 + 489 0086 F1D5 bpl .L36 + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 490 .loc 1 393 0 + 491 0088 8020 movs r0, #128 + 492 .LVL35: + 493 008a 0002 lsls r0, r0, #8 + 494 008c CCE7 b .L27 + 495 .LVL36: + 496 .L74: + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 497 .loc 1 396 0 discriminator 1 + 498 008e 544A ldr r2, .L83 + 499 0090 526A ldr r2, [r2, #36] + 500 0092 9207 lsls r2, r2, #30 + 501 0094 EED5 bpl .L37 + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 502 .loc 1 398 0 + 503 0096 5348 ldr r0, .L83+4 + 504 .LVL37: + 505 0098 C6E7 b .L27 + 506 .LVL38: + 507 .L75: + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 508 .loc 1 401 0 discriminator 1 + 509 009a 514B ldr r3, .L83 + 510 .LVL39: + 511 009c 1B68 ldr r3, [r3] + 512 009e 9B03 lsls r3, r3, #14 + 513 00a0 00D5 bpl .LCB506 + 514 00a2 89E0 b .L53 @long jump + 515 .LCB506: + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 516 .loc 1 373 0 + 517 00a4 0020 movs r0, #0 + 518 .LVL40: + 519 00a6 BFE7 b .L27 + 520 .LVL41: + 521 .L31: + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 522 .loc 1 410 0 + 523 00a8 4D4B ldr r3, .L83 + 524 00aa 1A6B ldr r2, [r3, #48] + 525 00ac 0323 movs r3, #3 + 526 00ae 1340 ands r3, r2 + 527 .LVL42: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 528 .loc 1 413 0 + 529 00b0 07D0 beq .L76 + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + ARM GAS /tmp/ccgjfOns.s page 21 + + + 530 .loc 1 418 0 + 531 00b2 032B cmp r3, #3 + 532 00b4 08D0 beq .L77 + 533 .L39: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 534 .loc 1 423 0 + 535 00b6 012B cmp r3, #1 + 536 00b8 0CD0 beq .L78 + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 537 .loc 1 428 0 + 538 00ba 022B cmp r3, #2 + 539 00bc 0DD0 beq .L79 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 540 .loc 1 373 0 + 541 00be 0020 movs r0, #0 + 542 .LVL43: + 543 00c0 B2E7 b .L27 + 544 .LVL44: + 545 .L76: + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 546 .loc 1 415 0 + 547 00c2 FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 548 .LVL45: + 549 00c6 AFE7 b .L27 + 550 .LVL46: + 551 .L77: + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 552 .loc 1 418 0 discriminator 1 + 553 00c8 454A ldr r2, .L83 + 554 00ca 1268 ldr r2, [r2] + 555 00cc 9207 lsls r2, r2, #30 + 556 00ce F2D5 bpl .L39 + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 557 .loc 1 420 0 + 558 00d0 4548 ldr r0, .L83+8 + 559 .LVL47: + 560 00d2 A9E7 b .L27 + 561 .LVL48: + 562 .L78: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 563 .loc 1 425 0 + 564 00d4 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 565 .LVL49: + 566 00d8 A6E7 b .L27 + 567 .LVL50: + 568 .L79: + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 569 .loc 1 428 0 discriminator 1 + 570 00da 414B ldr r3, .L83 + 571 .LVL51: + 572 00dc 1B6A ldr r3, [r3, #32] + 573 00de 9B07 lsls r3, r3, #30 + 574 00e0 6CD4 bmi .L56 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 575 .loc 1 373 0 + 576 00e2 0020 movs r0, #0 + 577 .LVL52: + ARM GAS /tmp/ccgjfOns.s page 22 + + + 578 00e4 A0E7 b .L27 + 579 .LVL53: + 580 .L69: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 581 .loc 1 443 0 + 582 00e6 FFF7FEFF bl HAL_RCC_GetPCLK1Freq + 583 .LVL54: + 584 00ea 9DE7 b .L27 + 585 .LVL55: + 586 .L70: + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 587 .loc 1 446 0 discriminator 1 + 588 00ec 3C4A ldr r2, .L83 + 589 00ee 1268 ldr r2, [r2] + 590 00f0 9207 lsls r2, r2, #30 + 591 00f2 A8D5 bpl .L42 + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 592 .loc 1 448 0 + 593 00f4 3C48 ldr r0, .L83+8 + 594 .LVL56: + 595 00f6 97E7 b .L27 + 596 .LVL57: + 597 .L71: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 598 .loc 1 453 0 + 599 00f8 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 600 .LVL58: + 601 00fc 94E7 b .L27 + 602 .LVL59: + 603 .L72: + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 604 .loc 1 456 0 discriminator 1 + 605 00fe 384B ldr r3, .L83 + 606 .LVL60: + 607 0100 1B6A ldr r3, [r3, #32] + 608 0102 9B07 lsls r3, r3, #30 + 609 0104 5DD4 bmi .L59 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 610 .loc 1 373 0 + 611 0106 0020 movs r0, #0 + 612 .LVL61: + 613 0108 8EE7 b .L27 + 614 .LVL62: + 615 .L29: + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 616 .loc 1 495 0 + 617 010a 354B ldr r3, .L83 + 618 010c 1A6B ldr r2, [r3, #48] + 619 010e 1023 movs r3, #16 + 620 0110 1340 ands r3, r2 + 621 .LVL63: + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 622 .loc 1 498 0 + 623 0112 03D1 bne .L44 + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 624 .loc 1 498 0 is_stmt 0 discriminator 1 + 625 0114 324A ldr r2, .L83 + ARM GAS /tmp/ccgjfOns.s page 23 + + + 626 0116 1268 ldr r2, [r2] + 627 0118 9207 lsls r2, r2, #30 + 628 011a 55D4 bmi .L60 + 629 .L44: + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 630 .loc 1 503 0 is_stmt 1 + 631 011c 002B cmp r3, #0 + 632 011e 01D1 bne .L80 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 633 .loc 1 373 0 + 634 0120 0020 movs r0, #0 + 635 .LVL64: + 636 0122 81E7 b .L27 + 637 .LVL65: + 638 .L80: + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 639 .loc 1 505 0 + 640 0124 FFF7FEFF bl HAL_RCC_GetSysClockFreq + 641 .LVL66: + 642 0128 7EE7 b .L27 + 643 .LVL67: + 644 .L34: + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 645 .loc 1 513 0 + 646 012a 2D4B ldr r3, .L83 + 647 012c 1B6B ldr r3, [r3, #48] + 648 012e 8020 movs r0, #128 + 649 .LVL68: + 650 0130 1840 ands r0, r3 + 651 .LVL69: + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 652 .loc 1 516 0 + 653 0132 27D0 beq .L45 + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 654 .loc 1 516 0 is_stmt 0 discriminator 1 + 655 0134 2A4B ldr r3, .L83 + 656 0136 1B68 ldr r3, [r3] + 657 0138 9B01 lsls r3, r3, #6 + 658 013a 23D5 bpl .L45 + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 659 .loc 1 519 0 is_stmt 1 + 660 013c 284A ldr r2, .L83 + 661 013e 5068 ldr r0, [r2, #4] + 662 .LVL70: + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = (pllmull >> RCC_CFGR_PLLMUL_BITNUMBER) + 2U; + 663 .loc 1 520 0 + 664 0140 5368 ldr r3, [r2, #4] + 665 0142 C021 movs r1, #192 + 666 0144 4902 lsls r1, r1, #9 + 667 0146 0B40 ands r3, r1 + 668 .LVL71: + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U; + 669 .loc 1 521 0 + 670 0148 800C lsrs r0, r0, #18 + 671 .LVL72: + 672 014a 0F21 movs r1, #15 + 673 014c 0840 ands r0, r1 + ARM GAS /tmp/ccgjfOns.s page 24 + + + 674 014e 841C adds r4, r0, #2 + 675 .LVL73: + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 676 .loc 1 522 0 + 677 0150 D26A ldr r2, [r2, #44] + 678 0152 1140 ands r1, r2 + 679 0154 0131 adds r1, r1, #1 + 680 .LVL74: + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 681 .loc 1 524 0 + 682 0156 8022 movs r2, #128 + 683 0158 5202 lsls r2, r2, #9 + 684 015a 9342 cmp r3, r2 + 685 015c 08D0 beq .L81 + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 686 .loc 1 530 0 + 687 015e C022 movs r2, #192 + 688 0160 5202 lsls r2, r2, #9 + 689 0162 9342 cmp r3, r2 + 690 0164 09D0 beq .L82 + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #else + 691 .loc 1 540 0 + 692 0166 2048 ldr r0, .L83+8 + 693 0168 FFF7FEFF bl __aeabi_uidiv + 694 .LVL75: + 695 016c 6043 muls r0, r4 + 696 .LVL76: + 697 016e 5BE7 b .L27 + 698 .LVL77: + 699 .L81: + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 700 .loc 1 527 0 + 701 0170 1D48 ldr r0, .L83+8 + 702 0172 FFF7FEFF bl __aeabi_uidiv + 703 .LVL78: + 704 0176 6043 muls r0, r4 + 705 .LVL79: + 706 0178 56E7 b .L27 + 707 .LVL80: + 708 .L82: + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 709 .loc 1 533 0 + 710 017a 1C48 ldr r0, .L83+12 + 711 017c FFF7FEFF bl __aeabi_uidiv + 712 .LVL81: + 713 0180 6043 muls r0, r4 + 714 .LVL82: + 715 0182 51E7 b .L27 + 716 .LVL83: + 717 .L45: + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 718 .loc 1 549 0 + 719 0184 0028 cmp r0, #0 + 720 0186 21D1 bne .L62 + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 721 .loc 1 549 0 is_stmt 0 discriminator 1 + 722 0188 154B ldr r3, .L83 + ARM GAS /tmp/ccgjfOns.s page 25 + + + 723 018a 5B6B ldr r3, [r3, #52] + 724 018c 9B03 lsls r3, r3, #14 + 725 018e 00D4 bmi .LCB770 + 726 0190 4AE7 b .L27 @long jump + 727 .LCB770: + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 728 .loc 1 551 0 is_stmt 1 + 729 0192 1648 ldr r0, .L83+12 + 730 .LVL84: + 731 0194 48E7 b .L27 + 732 .LVL85: + 733 .L68: + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 734 .loc 1 561 0 + 735 0196 124B ldr r3, .L83 + 736 0198 1A6B ldr r2, [r3, #48] + 737 019a 4023 movs r3, #64 + 738 019c 1340 ands r3, r2 + 739 .LVL86: + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 740 .loc 1 564 0 + 741 019e 03D1 bne .L48 + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 742 .loc 1 564 0 is_stmt 0 discriminator 1 + 743 01a0 0F4A ldr r2, .L83 + 744 01a2 1268 ldr r2, [r2] + 745 01a4 9207 lsls r2, r2, #30 + 746 01a6 13D4 bmi .L64 + 747 .L48: + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 748 .loc 1 569 0 is_stmt 1 + 749 01a8 002B cmp r3, #0 + 750 01aa 13D0 beq .L65 + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 751 .loc 1 569 0 is_stmt 0 discriminator 1 + 752 01ac 0C4B ldr r3, .L83 + 753 .LVL87: + 754 01ae 1B6A ldr r3, [r3, #32] + 755 01b0 9B07 lsls r3, r3, #30 + 756 01b2 11D4 bmi .L66 + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 757 .loc 1 373 0 is_stmt 1 + 758 01b4 0020 movs r0, #0 + 759 .LVL88: + 760 01b6 37E7 b .L27 + 761 .LVL89: + 762 .L53: + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 763 .loc 1 403 0 + 764 01b8 0D48 ldr r0, .L83+16 + 765 .LVL90: + 766 01ba 35E7 b .L27 + 767 .LVL91: + 768 .L56: + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 769 .loc 1 430 0 + 770 01bc 8020 movs r0, #128 + ARM GAS /tmp/ccgjfOns.s page 26 + + + 771 .LVL92: + 772 01be 0002 lsls r0, r0, #8 + 773 01c0 32E7 b .L27 + 774 .LVL93: + 775 .L59: + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 776 .loc 1 458 0 + 777 01c2 8020 movs r0, #128 + 778 .LVL94: + 779 01c4 0002 lsls r0, r0, #8 + 780 01c6 2FE7 b .L27 + 781 .LVL95: + 782 .L60: + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 783 .loc 1 500 0 + 784 01c8 0748 ldr r0, .L83+8 + 785 .LVL96: + 786 01ca 2DE7 b .L27 + 787 .LVL97: + 788 .L62: + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 789 .loc 1 373 0 + 790 01cc 0020 movs r0, #0 + 791 .LVL98: + 792 01ce 2BE7 b .L27 + 793 .LVL99: + 794 .L64: + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 795 .loc 1 566 0 + 796 01d0 0548 ldr r0, .L83+8 + 797 .LVL100: + 798 01d2 29E7 b .L27 + 799 .LVL101: + 800 .L65: + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 801 .loc 1 373 0 + 802 01d4 0020 movs r0, #0 + 803 .LVL102: + 804 01d6 27E7 b .L27 + 805 .LVL103: + 806 .L66: + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 807 .loc 1 571 0 + 808 01d8 8020 movs r0, #128 + 809 .LVL104: + 810 01da 0002 lsls r0, r0, #8 + 811 .LVL105: + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 812 .loc 1 581 0 + 813 01dc 24E7 b .L27 + 814 .L84: + 815 01de C046 .align 2 + 816 .L83: + 817 01e0 00100240 .word 1073876992 + 818 01e4 409C0000 .word 40000 + 819 01e8 00127A00 .word 8000000 + 820 01ec 006CDC02 .word 48000000 + ARM GAS /tmp/ccgjfOns.s page 27 + + + 821 01f0 90D00300 .word 250000 + 822 .cfi_endproc + 823 .LFE42: + 825 .section .text.HAL_RCCEx_CRSConfig,"ax",%progbits + 826 .align 1 + 827 .global HAL_RCCEx_CRSConfig + 828 .syntax unified + 829 .code 16 + 830 .thumb_func + 831 .fpu softvfp + 833 HAL_RCCEx_CRSConfig: + 834 .LFB43: + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @} + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CRS) + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended Clock Recovery System Control functions + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @verbatim + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ##### Extended Clock Recovery System Control functions ##### + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** =============================================================================== + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..] + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** For devices with Clock Recovery System feature (CRS), RCC Extention HAL driver can be used as + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) In System clock config, HSI48 needs to be enabled + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Enable CRS clock in IP MSP init which will use CRS functions + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Call CRS functions as follows: + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) Prepare synchronization configuration necessary for HSI48 calibration + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Default values can be set for frequency Error Measurement (reload and error lim + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** and also HSI48 oscillator smooth trimming. + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Macro @ref __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** directly reload value with target and synchronization frequencies values + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) Call function @ref HAL_RCCEx_CRSConfig which + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Reset CRS registers to their default values. + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Configure CRS registers with synchronization configuration + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Enable automatic calibration and frequency error counter feature + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** periodic USB SOF will not be generated by the host. No SYNC signal will therefore be + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** should be used as SYNC signal. + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) A polling function is provided to wait for complete synchronization + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Call function @ref HAL_RCCEx_CRSWaitSynchronization() + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) According to CRS status, user can decide to adjust again the calibration or con + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** application if synchronization is OK + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) User can retrieve information related to synchronization in calling function + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @ref HAL_RCCEx_CRSGetSynchronizationInfo() + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + ARM GAS /tmp/ccgjfOns.s page 28 + + + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Regarding synchronization status and synchronization information, user can try a new cali + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** in changing synchronization configuration and call again HAL_RCCEx_CRSConfig. + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** Note: When the SYNC event is detected during the downcounting phase (before reaching the + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** it means that the actual frequency is lower than the target (and so, that the TRIM value + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** incremented), while when it is detected during the upcounting phase it means that the ac + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** is higher (and that the TRIM value should be decremented). + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interr + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** through CRS Handler (RCC_IRQn/RCC_IRQHandler) + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Call function @ref HAL_RCCEx_CRSConfig() + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Enable RCC_IRQn (thanks to NVIC functions) + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Enable CRS interrupt (@ref __HAL_RCC_CRS_ENABLE_IT) + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Implement CRS status management in the following user callbacks called from + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_IRQHandler(): + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_SyncOkCallback() + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_SyncWarnCallback() + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_ExpectedSyncCallback() + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_ErrorCallback() + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) To force a SYNC EVENT, user can use the function @ref HAL_RCCEx_CRSSoftwareSynchronizatio + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** This function can be called before calling @ref HAL_RCCEx_CRSConfig (for instance in Syst + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endverbatim + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{ + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Start automatic synchronization for polling mode + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param pInit Pointer on RCC_CRSInitTypeDef structure + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit) + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 835 .loc 1 660 0 + 836 .cfi_startproc + 837 @ args = 0, pretend = 0, frame = 0 + 838 @ frame_needed = 0, uses_anonymous_args = 0 + 839 @ link register save eliminated. + 840 .LVL106: + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t value = 0U; + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */ + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler)); + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source)); + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity)); + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue)); + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue)); + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue)); + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CONFIGURATION */ + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Before configuration, reset CRS registers to their default values*/ + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_FORCE_RESET(); + 841 .loc 1 674 0 + 842 0000 104B ldr r3, .L86 + 843 0002 1969 ldr r1, [r3, #16] + 844 0004 8022 movs r2, #128 + ARM GAS /tmp/ccgjfOns.s page 29 + + + 845 0006 1205 lsls r2, r2, #20 + 846 0008 0A43 orrs r2, r1 + 847 000a 1A61 str r2, [r3, #16] + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_RELEASE_RESET(); + 848 .loc 1 675 0 + 849 000c 1A69 ldr r2, [r3, #16] + 850 000e 0E49 ldr r1, .L86+4 + 851 0010 0A40 ands r2, r1 + 852 0012 1A61 str r2, [r3, #16] + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCDIV[2:0] bits according to Prescaler value */ + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCSRC[1:0] bits according to Source value */ + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCSPOL bit according to Polarity value */ + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value = (pInit->Prescaler | pInit->Source | pInit->Polarity); + 853 .loc 1 680 0 + 854 0014 0268 ldr r2, [r0] + 855 0016 4368 ldr r3, [r0, #4] + 856 0018 1A43 orrs r2, r3 + 857 001a 8368 ldr r3, [r0, #8] + 858 001c 1A43 orrs r2, r3 + 859 .LVL107: + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the RELOAD[15:0] bits according to ReloadValue value */ + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value |= pInit->ReloadValue; + 860 .loc 1 682 0 + 861 001e C368 ldr r3, [r0, #12] + 862 0020 1343 orrs r3, r2 + 863 .LVL108: + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the FELIM[7:0] bits according to ErrorLimitValue value */ + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_BITNUMBER); + 864 .loc 1 684 0 + 865 0022 0269 ldr r2, [r0, #16] + 866 0024 1204 lsls r2, r2, #16 + 867 0026 1A43 orrs r2, r3 + 868 .LVL109: + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->CFGR, value); + 869 .loc 1 685 0 + 870 0028 084B ldr r3, .L86+8 + 871 002a 5A60 str r2, [r3, #4] + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Adjust HSI48 oscillator smooth trimming */ + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */ + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_BITNUMBER)); + 872 .loc 1 689 0 + 873 002c 1A68 ldr r2, [r3] + 874 .LVL110: + 875 002e 0849 ldr r1, .L86+12 + 876 0030 0A40 ands r2, r1 + 877 0032 4169 ldr r1, [r0, #20] + 878 0034 0902 lsls r1, r1, #8 + 879 0036 0A43 orrs r2, r1 + 880 0038 1A60 str r2, [r3] + 881 .LVL111: + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* START AUTOMATIC SYNCHRONIZATION*/ + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Enable Automatic trimming & Frequency error counter */ + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); + ARM GAS /tmp/ccgjfOns.s page 30 + + + 882 .loc 1 694 0 + 883 003a 1A68 ldr r2, [r3] + 884 003c 6021 movs r1, #96 + 885 003e 0A43 orrs r2, r1 + 886 0040 1A60 str r2, [r3] + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 887 .loc 1 695 0 + 888 @ sp needed + 889 0042 7047 bx lr + 890 .L87: + 891 .align 2 + 892 .L86: + 893 0044 00100240 .word 1073876992 + 894 0048 FFFFFFF7 .word -134217729 + 895 004c 006C0040 .word 1073769472 + 896 0050 FFC0FFFF .word -16129 + 897 .cfi_endproc + 898 .LFE43: + 900 .section .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate,"ax",%progbits + 901 .align 1 + 902 .global HAL_RCCEx_CRSSoftwareSynchronizationGenerate + 903 .syntax unified + 904 .code 16 + 905 .thumb_func + 906 .fpu softvfp + 908 HAL_RCCEx_CRSSoftwareSynchronizationGenerate: + 909 .LFB44: + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Generate the software synchronization event + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void) + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 910 .loc 1 702 0 + 911 .cfi_startproc + 912 @ args = 0, pretend = 0, frame = 0 + 913 @ frame_needed = 0, uses_anonymous_args = 0 + 914 @ link register save eliminated. + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_SWSYNC); + 915 .loc 1 703 0 + 916 0000 024A ldr r2, .L89 + 917 0002 1368 ldr r3, [r2] + 918 0004 8021 movs r1, #128 + 919 0006 0B43 orrs r3, r1 + 920 0008 1360 str r3, [r2] + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 921 .loc 1 704 0 + 922 @ sp needed + 923 000a 7047 bx lr + 924 .L90: + 925 .align 2 + 926 .L89: + 927 000c 006C0040 .word 1073769472 + 928 .cfi_endproc + 929 .LFE44: + 931 .section .text.HAL_RCCEx_CRSGetSynchronizationInfo,"ax",%progbits + ARM GAS /tmp/ccgjfOns.s page 31 + + + 932 .align 1 + 933 .global HAL_RCCEx_CRSGetSynchronizationInfo + 934 .syntax unified + 935 .code 16 + 936 .thumb_func + 937 .fpu softvfp + 939 HAL_RCCEx_CRSGetSynchronizationInfo: + 940 .LFB45: + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Return synchronization info + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo) + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 941 .loc 1 712 0 + 942 .cfi_startproc + 943 @ args = 0, pretend = 0, frame = 0 + 944 @ frame_needed = 0, uses_anonymous_args = 0 + 945 @ link register save eliminated. + 946 .LVL112: + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameter */ + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(pSynchroInfo != NULL); + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the reload value */ + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); + 947 .loc 1 717 0 + 948 0000 094A ldr r2, .L92 + 949 0002 5368 ldr r3, [r2, #4] + 950 0004 1B04 lsls r3, r3, #16 + 951 0006 1B0C lsrs r3, r3, #16 + 952 0008 0360 str r3, [r0] + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get HSI48 oscillator smooth trimming */ + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_BI + 953 .loc 1 720 0 + 954 000a 1168 ldr r1, [r2] + 955 000c 090A lsrs r1, r1, #8 + 956 000e 3F23 movs r3, #63 + 957 0010 0B40 ands r3, r1 + 958 0012 4360 str r3, [r0, #4] + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Frequency error capture */ + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_BI + 959 .loc 1 723 0 + 960 0014 9368 ldr r3, [r2, #8] + 961 0016 1B0C lsrs r3, r3, #16 + 962 0018 8360 str r3, [r0, #8] + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Frequency error direction */ + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); + 963 .loc 1 726 0 + 964 001a 9368 ldr r3, [r2, #8] + 965 001c 8022 movs r2, #128 + 966 001e 1202 lsls r2, r2, #8 + 967 0020 1340 ands r3, r2 + ARM GAS /tmp/ccgjfOns.s page 32 + + + 968 0022 C360 str r3, [r0, #12] + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 969 .loc 1 727 0 + 970 @ sp needed + 971 0024 7047 bx lr + 972 .L93: + 973 0026 C046 .align 2 + 974 .L92: + 975 0028 006C0040 .word 1073769472 + 976 .cfi_endproc + 977 .LFE45: + 979 .section .text.HAL_RCCEx_CRSWaitSynchronization,"ax",%progbits + 980 .align 1 + 981 .global HAL_RCCEx_CRSWaitSynchronization + 982 .syntax unified + 983 .code 16 + 984 .thumb_func + 985 .fpu softvfp + 987 HAL_RCCEx_CRSWaitSynchronization: + 988 .LFB46: + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Wait for CRS Synchronization status. + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param Timeout Duration of the timeout + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Timeout is based on the maximum time to receive a SYNC event based on synchronization + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * frequency. + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned. + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval Combination of Synchronization status + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values: + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TIMEOUT + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCOK + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCWARN + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout) + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 989 .loc 1 745 0 + 990 .cfi_startproc + 991 @ args = 0, pretend = 0, frame = 0 + 992 @ frame_needed = 0, uses_anonymous_args = 0 + 993 .LVL113: + 994 0000 70B5 push {r4, r5, r6, lr} + 995 .LCFI3: + 996 .cfi_def_cfa_offset 16 + 997 .cfi_offset 4, -16 + 998 .cfi_offset 5, -12 + 999 .cfi_offset 6, -8 + 1000 .cfi_offset 14, -4 + 1001 0002 0500 movs r5, r0 + 1002 .LVL114: + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crsstatus = RCC_CRS_NONE; + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U; + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get timeout */ + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick(); + ARM GAS /tmp/ccgjfOns.s page 33 + + + 1003 .loc 1 750 0 + 1004 0004 FFF7FEFF bl HAL_GetTick + 1005 .LVL115: + 1006 0008 0600 movs r6, r0 + 1007 .LVL116: + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crsstatus = RCC_CRS_NONE; + 1008 .loc 1 746 0 + 1009 000a 0024 movs r4, #0 + 1010 000c 3AE0 b .L102 + 1011 .LVL117: + 1012 .L106: + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for CRS flag or timeout detection */ + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** do + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(Timeout != HAL_MAX_DELAY) + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout)) + 1013 .loc 1 757 0 discriminator 1 + 1014 000e FFF7FEFF bl HAL_GetTick + 1015 .LVL118: + 1016 0012 801B subs r0, r0, r6 + 1017 0014 A842 cmp r0, r5 + 1018 0016 3BD8 bhi .L104 + 1019 .LVL119: + 1020 .L95: + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus = RCC_CRS_TIMEOUT; + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */ + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK)) + 1021 .loc 1 763 0 + 1022 0018 1F4B ldr r3, .L107 + 1023 001a 9B68 ldr r3, [r3, #8] + 1024 001c DB07 lsls r3, r3, #31 + 1025 001e 04D5 bpl .L96 + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC event OK */ + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCOK; + 1026 .loc 1 766 0 + 1027 0020 0223 movs r3, #2 + 1028 0022 1C43 orrs r4, r3 + 1029 .LVL120: + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK bit */ + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK); + 1030 .loc 1 769 0 + 1031 0024 1C4B ldr r3, .L107 + 1032 0026 0122 movs r2, #1 + 1033 0028 DA60 str r2, [r3, #12] + 1034 .L96: + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */ + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN)) + 1035 .loc 1 773 0 + ARM GAS /tmp/ccgjfOns.s page 34 + + + 1036 002a 1B4B ldr r3, .L107 + 1037 002c 9B68 ldr r3, [r3, #8] + 1038 002e 9B07 lsls r3, r3, #30 + 1039 0030 04D5 bpl .L97 + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC warning */ + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCWARN; + 1040 .loc 1 776 0 + 1041 0032 0423 movs r3, #4 + 1042 0034 1C43 orrs r4, r3 + 1043 .LVL121: + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN bit */ + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN); + 1044 .loc 1 779 0 + 1045 0036 184B ldr r3, .L107 + 1046 0038 0222 movs r2, #2 + 1047 003a DA60 str r2, [r3, #12] + 1048 .L97: + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS TRIM overflow flag */ + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF)) + 1049 .loc 1 783 0 + 1050 003c 164B ldr r3, .L107 + 1051 003e 9B68 ldr r3, [r3, #8] + 1052 0040 5B05 lsls r3, r3, #21 + 1053 0042 04D5 bpl .L98 + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Error */ + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_TRIMOVF; + 1054 .loc 1 786 0 + 1055 0044 2023 movs r3, #32 + 1056 0046 1C43 orrs r4, r3 + 1057 .LVL122: + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */ + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF); + 1058 .loc 1 789 0 + 1059 0048 134B ldr r3, .L107 + 1060 004a 0422 movs r2, #4 + 1061 004c DA60 str r2, [r3, #12] + 1062 .L98: + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Error flag */ + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR)) + 1063 .loc 1 793 0 + 1064 004e 124B ldr r3, .L107 + 1065 0050 9B68 ldr r3, [r3, #8] + 1066 0052 DB05 lsls r3, r3, #23 + 1067 0054 04D5 bpl .L99 + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Error */ + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCERR; + 1068 .loc 1 796 0 + 1069 0056 0823 movs r3, #8 + ARM GAS /tmp/ccgjfOns.s page 35 + + + 1070 0058 1C43 orrs r4, r3 + 1071 .LVL123: + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */ + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR); + 1072 .loc 1 799 0 + 1073 005a 0F4B ldr r3, .L107 + 1074 005c 0422 movs r2, #4 + 1075 005e DA60 str r2, [r3, #12] + 1076 .L99: + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNC Missed flag */ + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS)) + 1077 .loc 1 803 0 + 1078 0060 0D4B ldr r3, .L107 + 1079 0062 9B68 ldr r3, [r3, #8] + 1080 0064 9B05 lsls r3, r3, #22 + 1081 0066 04D5 bpl .L100 + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Missed */ + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCMISS; + 1082 .loc 1 806 0 + 1083 0068 1023 movs r3, #16 + 1084 006a 1C43 orrs r4, r3 + 1085 .LVL124: + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC Missed bit */ + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS); + 1086 .loc 1 809 0 + 1087 006c 0A4B ldr r3, .L107 + 1088 006e 0422 movs r2, #4 + 1089 0070 DA60 str r2, [r3, #12] + 1090 .L100: + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */ + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC)) + 1091 .loc 1 813 0 + 1092 0072 094B ldr r3, .L107 + 1093 0074 9B68 ldr r3, [r3, #8] + 1094 0076 1B07 lsls r3, r3, #28 + 1095 0078 02D5 bpl .L101 + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */ + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC); + 1096 .loc 1 816 0 discriminator 2 + 1097 007a 074B ldr r3, .L107 + 1098 007c 0822 movs r2, #8 + 1099 007e DA60 str r2, [r3, #12] + 1100 .L101: + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } while(RCC_CRS_NONE == crsstatus); + 1101 .loc 1 818 0 + 1102 0080 002C cmp r4, #0 + 1103 0082 07D1 bne .L105 + 1104 .LVL125: + ARM GAS /tmp/ccgjfOns.s page 36 + + + 1105 .L102: + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1106 .loc 1 755 0 + 1107 0084 6B1C adds r3, r5, #1 + 1108 0086 C7D0 beq .L95 + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1109 .loc 1 757 0 + 1110 0088 002D cmp r5, #0 + 1111 008a C0D1 bne .L106 + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1112 .loc 1 759 0 + 1113 008c 0124 movs r4, #1 + 1114 .LVL126: + 1115 008e C3E7 b .L95 + 1116 .LVL127: + 1117 .L104: + 1118 0090 0124 movs r4, #1 + 1119 .LVL128: + 1120 0092 C1E7 b .L95 + 1121 .LVL129: + 1122 .L105: + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return crsstatus; + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1123 .loc 1 821 0 + 1124 0094 2000 movs r0, r4 + 1125 @ sp needed + 1126 .LVL130: + 1127 .LVL131: + 1128 .LVL132: + 1129 0096 70BD pop {r4, r5, r6, pc} + 1130 .L108: + 1131 .align 2 + 1132 .L107: + 1133 0098 006C0040 .word 1073769472 + 1134 .cfi_endproc + 1135 .LFE46: + 1137 .section .text.HAL_RCCEx_CRS_SyncOkCallback,"ax",%progbits + 1138 .align 1 + 1139 .weak HAL_RCCEx_CRS_SyncOkCallback + 1140 .syntax unified + 1141 .code 16 + 1142 .thumb_func + 1143 .fpu softvfp + 1145 HAL_RCCEx_CRS_SyncOkCallback: + 1146 .LFB48: + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Handle the Clock Recovery System interrupt request. + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRS_IRQHandler(void) + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE; + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */ + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itflags = READ_REG(CRS->ISR); + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR); + ARM GAS /tmp/ccgjfOns.s page 37 + + + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */ + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_SYNCOK) != RESET) && ((itsources & RCC_CRS_IT_SYNCOK) != RESET)) + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK flag */ + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC); + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */ + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncOkCallback(); + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */ + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != RESET) && ((itsources & RCC_CRS_IT_SYNCWARN) != RES + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN flag */ + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC); + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */ + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncWarnCallback(); + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */ + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_ESYNC) != RESET) && ((itsources & RCC_CRS_IT_ESYNC) != RESET)) + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */ + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC); + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */ + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ExpectedSyncCallback(); + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Error flags */ + 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else + 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_ERR) != RESET) && ((itsources & RCC_CRS_IT_ERR) != RESET)) + 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCERR) != RESET) + 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCERR; + 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCMISS) != RESET) + 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCMISS; + 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_TRIMOVF) != RESET) + 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_TRIMOVF; + 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error flags */ + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ERRC); + 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user error callback */ + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ErrorCallback(crserror); + 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCOK interrupt callback. + ARM GAS /tmp/ccgjfOns.s page 38 + + + 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncOkCallback(void) + 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1147 .loc 1 893 0 + 1148 .cfi_startproc + 1149 @ args = 0, pretend = 0, frame = 0 + 1150 @ frame_needed = 0, uses_anonymous_args = 0 + 1151 @ link register save eliminated. + 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file + 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1152 .loc 1 897 0 + 1153 @ sp needed + 1154 0000 7047 bx lr + 1155 .cfi_endproc + 1156 .LFE48: + 1158 .section .text.HAL_RCCEx_CRS_SyncWarnCallback,"ax",%progbits + 1159 .align 1 + 1160 .weak HAL_RCCEx_CRS_SyncWarnCallback + 1161 .syntax unified + 1162 .code 16 + 1163 .thumb_func + 1164 .fpu softvfp + 1166 HAL_RCCEx_CRS_SyncWarnCallback: + 1167 .LFB49: + 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCWARN interrupt callback. + 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncWarnCallback(void) + 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1168 .loc 1 904 0 + 1169 .cfi_startproc + 1170 @ args = 0, pretend = 0, frame = 0 + 1171 @ frame_needed = 0, uses_anonymous_args = 0 + 1172 @ link register save eliminated. + 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file + 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1173 .loc 1 908 0 + 1174 @ sp needed + 1175 0000 7047 bx lr + 1176 .cfi_endproc + 1177 .LFE49: + 1179 .section .text.HAL_RCCEx_CRS_ExpectedSyncCallback,"ax",%progbits + 1180 .align 1 + 1181 .weak HAL_RCCEx_CRS_ExpectedSyncCallback + 1182 .syntax unified + 1183 .code 16 + 1184 .thumb_func + 1185 .fpu softvfp + 1187 HAL_RCCEx_CRS_ExpectedSyncCallback: + 1188 .LFB50: + ARM GAS /tmp/ccgjfOns.s page 39 + + + 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Expected SYNC interrupt callback. + 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void) + 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1189 .loc 1 915 0 + 1190 .cfi_startproc + 1191 @ args = 0, pretend = 0, frame = 0 + 1192 @ frame_needed = 0, uses_anonymous_args = 0 + 1193 @ link register save eliminated. + 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file + 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1194 .loc 1 919 0 + 1195 @ sp needed + 1196 0000 7047 bx lr + 1197 .cfi_endproc + 1198 .LFE50: + 1200 .section .text.HAL_RCCEx_CRS_ErrorCallback,"ax",%progbits + 1201 .align 1 + 1202 .weak HAL_RCCEx_CRS_ErrorCallback + 1203 .syntax unified + 1204 .code 16 + 1205 .thumb_func + 1206 .fpu softvfp + 1208 HAL_RCCEx_CRS_ErrorCallback: + 1209 .LFB51: + 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** + 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Error interrupt callback. + 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param Error Combination of Error status. + 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values: + 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR + 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS + 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF + 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none + 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error) + 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1210 .loc 1 931 0 + 1211 .cfi_startproc + 1212 @ args = 0, pretend = 0, frame = 0 + 1213 @ frame_needed = 0, uses_anonymous_args = 0 + 1214 @ link register save eliminated. + 1215 .LVL133: + 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Prevent unused argument(s) compilation warning */ + 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** UNUSED(Error); + 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed, + 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file + 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */ + 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1216 .loc 1 938 0 + 1217 @ sp needed + ARM GAS /tmp/ccgjfOns.s page 40 + + + 1218 0000 7047 bx lr + 1219 .cfi_endproc + 1220 .LFE51: + 1222 .section .text.HAL_RCCEx_CRS_IRQHandler,"ax",%progbits + 1223 .align 1 + 1224 .global HAL_RCCEx_CRS_IRQHandler + 1225 .syntax unified + 1226 .code 16 + 1227 .thumb_func + 1228 .fpu softvfp + 1230 HAL_RCCEx_CRS_IRQHandler: + 1231 .LFB47: + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE; + 1232 .loc 1 828 0 + 1233 .cfi_startproc + 1234 @ args = 0, pretend = 0, frame = 0 + 1235 @ frame_needed = 0, uses_anonymous_args = 0 + 1236 0000 10B5 push {r4, lr} + 1237 .LCFI4: + 1238 .cfi_def_cfa_offset 8 + 1239 .cfi_offset 4, -8 + 1240 .cfi_offset 14, -4 + 1241 .LVL134: + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR); + 1242 .loc 1 831 0 + 1243 0002 1C4A ldr r2, .L125 + 1244 0004 9368 ldr r3, [r2, #8] + 1245 .LVL135: + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1246 .loc 1 832 0 + 1247 0006 1268 ldr r2, [r2] + 1248 .LVL136: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1249 .loc 1 835 0 + 1250 0008 D907 lsls r1, r3, #31 + 1251 000a 01D5 bpl .L114 + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1252 .loc 1 835 0 is_stmt 0 discriminator 1 + 1253 000c D107 lsls r1, r2, #31 + 1254 000e 1CD4 bmi .L122 + 1255 .L114: + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1256 .loc 1 844 0 is_stmt 1 + 1257 0010 9907 lsls r1, r3, #30 + 1258 0012 01D5 bpl .L116 + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1259 .loc 1 844 0 is_stmt 0 discriminator 1 + 1260 0014 9107 lsls r1, r2, #30 + 1261 0016 1ED4 bmi .L123 + 1262 .L116: + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1263 .loc 1 853 0 is_stmt 1 + 1264 0018 1907 lsls r1, r3, #28 + 1265 001a 01D5 bpl .L117 + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1266 .loc 1 853 0 is_stmt 0 discriminator 1 + 1267 001c 1107 lsls r1, r2, #28 + ARM GAS /tmp/ccgjfOns.s page 41 + + + 1268 001e 20D4 bmi .L124 + 1269 .L117: + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1270 .loc 1 864 0 is_stmt 1 + 1271 0020 5907 lsls r1, r3, #29 + 1272 0022 11D5 bpl .L113 + 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1273 .loc 1 864 0 is_stmt 0 discriminator 1 + 1274 0024 5207 lsls r2, r2, #29 + 1275 0026 0FD5 bpl .L113 + 1276 .LVL137: + 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1277 .loc 1 866 0 is_stmt 1 + 1278 0028 DA05 lsls r2, r3, #23 + 1279 002a 20D4 bmi .L121 + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */ + 1280 .loc 1 829 0 + 1281 002c 0020 movs r0, #0 + 1282 .L118: + 1283 .LVL138: + 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1284 .loc 1 870 0 + 1285 002e 9A05 lsls r2, r3, #22 + 1286 0030 01D5 bpl .L119 + 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1287 .loc 1 872 0 + 1288 0032 1022 movs r2, #16 + 1289 0034 1043 orrs r0, r2 + 1290 .LVL139: + 1291 .L119: + 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** { + 1292 .loc 1 874 0 + 1293 0036 5B05 lsls r3, r3, #21 + 1294 0038 01D5 bpl .L120 + 1295 .LVL140: + 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1296 .loc 1 876 0 + 1297 003a 2023 movs r3, #32 + 1298 003c 1843 orrs r0, r3 + 1299 .LVL141: + 1300 .L120: + 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1301 .loc 1 880 0 + 1302 003e 0D4B ldr r3, .L125 + 1303 0040 0422 movs r2, #4 + 1304 0042 DA60 str r2, [r3, #12] + 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1305 .loc 1 883 0 + 1306 0044 FFF7FEFF bl HAL_RCCEx_CRS_ErrorCallback + 1307 .LVL142: + 1308 .L113: + 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1309 .loc 1 886 0 + 1310 @ sp needed + 1311 0048 10BD pop {r4, pc} + 1312 .LVL143: + 1313 .L122: + ARM GAS /tmp/ccgjfOns.s page 42 + + + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1314 .loc 1 838 0 + 1315 004a 0A4B ldr r3, .L125 + 1316 .LVL144: + 1317 004c 0122 movs r2, #1 + 1318 .LVL145: + 1319 004e DA60 str r2, [r3, #12] + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1320 .loc 1 841 0 + 1321 0050 FFF7FEFF bl HAL_RCCEx_CRS_SyncOkCallback + 1322 .LVL146: + 1323 0054 F8E7 b .L113 + 1324 .LVL147: + 1325 .L123: + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1326 .loc 1 847 0 + 1327 0056 074B ldr r3, .L125 + 1328 .LVL148: + 1329 0058 0222 movs r2, #2 + 1330 .LVL149: + 1331 005a DA60 str r2, [r3, #12] + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1332 .loc 1 850 0 + 1333 005c FFF7FEFF bl HAL_RCCEx_CRS_SyncWarnCallback + 1334 .LVL150: + 1335 0060 F2E7 b .L113 + 1336 .LVL151: + 1337 .L124: + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** + 1338 .loc 1 856 0 + 1339 0062 044B ldr r3, .L125 + 1340 .LVL152: + 1341 0064 0822 movs r2, #8 + 1342 .LVL153: + 1343 0066 DA60 str r2, [r3, #12] + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1344 .loc 1 859 0 + 1345 0068 FFF7FEFF bl HAL_RCCEx_CRS_ExpectedSyncCallback + 1346 .LVL154: + 1347 006c ECE7 b .L113 + 1348 .LVL155: + 1349 .L121: + 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } + 1350 .loc 1 868 0 + 1351 006e 0820 movs r0, #8 + 1352 0070 DDE7 b .L118 + 1353 .L126: + 1354 0072 C046 .align 2 + 1355 .L125: + 1356 0074 006C0040 .word 1073769472 + 1357 .cfi_endproc + 1358 .LFE47: + 1360 .text + 1361 .Letext0: + 1362 .file 2 "/usr/include/newlib/machine/_default_types.h" + 1363 .file 3 "/usr/include/newlib/sys/_stdint.h" + 1364 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + ARM GAS /tmp/ccgjfOns.s page 43 + + + 1365 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 1366 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 1367 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1368 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h" + 1369 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 1370 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h" + ARM GAS /tmp/ccgjfOns.s page 44 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_rcc_ex.c + /tmp/ccgjfOns.s:16 .text.HAL_RCCEx_PeriphCLKConfig:0000000000000000 $t + /tmp/ccgjfOns.s:23 .text.HAL_RCCEx_PeriphCLKConfig:0000000000000000 HAL_RCCEx_PeriphCLKConfig + /tmp/ccgjfOns.s:280 .text.HAL_RCCEx_PeriphCLKConfig:000000000000013c $d + /tmp/ccgjfOns.s:291 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000000 $t + /tmp/ccgjfOns.s:298 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000000 HAL_RCCEx_GetPeriphCLKConfig + /tmp/ccgjfOns.s:357 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000048 $d + /tmp/ccgjfOns.s:367 .text.HAL_RCCEx_GetPeriphCLKFreq:0000000000000000 $t + /tmp/ccgjfOns.s:374 .text.HAL_RCCEx_GetPeriphCLKFreq:0000000000000000 HAL_RCCEx_GetPeriphCLKFreq + /tmp/ccgjfOns.s:817 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000000001e0 $d + /tmp/ccgjfOns.s:826 .text.HAL_RCCEx_CRSConfig:0000000000000000 $t + /tmp/ccgjfOns.s:833 .text.HAL_RCCEx_CRSConfig:0000000000000000 HAL_RCCEx_CRSConfig + /tmp/ccgjfOns.s:893 .text.HAL_RCCEx_CRSConfig:0000000000000044 $d + /tmp/ccgjfOns.s:901 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:0000000000000000 $t + /tmp/ccgjfOns.s:908 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:0000000000000000 HAL_RCCEx_CRSSoftwareSynchronizationGenerate + /tmp/ccgjfOns.s:927 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:000000000000000c $d + /tmp/ccgjfOns.s:932 .text.HAL_RCCEx_CRSGetSynchronizationInfo:0000000000000000 $t + /tmp/ccgjfOns.s:939 .text.HAL_RCCEx_CRSGetSynchronizationInfo:0000000000000000 HAL_RCCEx_CRSGetSynchronizationInfo + /tmp/ccgjfOns.s:975 .text.HAL_RCCEx_CRSGetSynchronizationInfo:0000000000000028 $d + /tmp/ccgjfOns.s:980 .text.HAL_RCCEx_CRSWaitSynchronization:0000000000000000 $t + /tmp/ccgjfOns.s:987 .text.HAL_RCCEx_CRSWaitSynchronization:0000000000000000 HAL_RCCEx_CRSWaitSynchronization + /tmp/ccgjfOns.s:1133 .text.HAL_RCCEx_CRSWaitSynchronization:0000000000000098 $d + /tmp/ccgjfOns.s:1138 .text.HAL_RCCEx_CRS_SyncOkCallback:0000000000000000 $t + /tmp/ccgjfOns.s:1145 .text.HAL_RCCEx_CRS_SyncOkCallback:0000000000000000 HAL_RCCEx_CRS_SyncOkCallback + /tmp/ccgjfOns.s:1159 .text.HAL_RCCEx_CRS_SyncWarnCallback:0000000000000000 $t + /tmp/ccgjfOns.s:1166 .text.HAL_RCCEx_CRS_SyncWarnCallback:0000000000000000 HAL_RCCEx_CRS_SyncWarnCallback + /tmp/ccgjfOns.s:1180 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:0000000000000000 $t + /tmp/ccgjfOns.s:1187 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:0000000000000000 HAL_RCCEx_CRS_ExpectedSyncCallback + /tmp/ccgjfOns.s:1201 .text.HAL_RCCEx_CRS_ErrorCallback:0000000000000000 $t + /tmp/ccgjfOns.s:1208 .text.HAL_RCCEx_CRS_ErrorCallback:0000000000000000 HAL_RCCEx_CRS_ErrorCallback + /tmp/ccgjfOns.s:1223 .text.HAL_RCCEx_CRS_IRQHandler:0000000000000000 $t + /tmp/ccgjfOns.s:1230 .text.HAL_RCCEx_CRS_IRQHandler:0000000000000000 HAL_RCCEx_CRS_IRQHandler + /tmp/ccgjfOns.s:1356 .text.HAL_RCCEx_CRS_IRQHandler:0000000000000074 $d + +UNDEFINED SYMBOLS +HAL_GetTick +__aeabi_uidiv +HAL_RCC_GetPCLK1Freq +HAL_RCC_GetSysClockFreq diff --git a/fw/midi-dials/build/stm32f0xx_hal_rcc_ex.o b/fw/midi-dials/build/stm32f0xx_hal_rcc_ex.o Binary files differnew file mode 100644 index 0000000..8f0294c --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_rcc_ex.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_tim.d b/fw/midi-dials/build/stm32f0xx_hal_tim.d new file mode 100644 index 0000000..86764e6 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_tim.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_tim.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_tim.lst b/fw/midi-dials/build/stm32f0xx_hal_tim.lst new file mode 100644 index 0000000..28390a2 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_tim.lst @@ -0,0 +1,29 @@ +ARM GAS /tmp/ccolyl4P.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_tim.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .Letext0: + 16 .file 1 "/usr/include/newlib/machine/_default_types.h" + 17 .file 2 "/usr/include/newlib/sys/_stdint.h" + 18 .file 3 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 19 .file 4 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccolyl4P.s page 2 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_tim.c + +NO UNDEFINED SYMBOLS diff --git a/fw/midi-dials/build/stm32f0xx_hal_tim.o b/fw/midi-dials/build/stm32f0xx_hal_tim.o Binary files differnew file mode 100644 index 0000000..4073c7e --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_tim.o diff --git a/fw/midi-dials/build/stm32f0xx_hal_tim_ex.d b/fw/midi-dials/build/stm32f0xx_hal_tim_ex.d new file mode 100644 index 0000000..8b8b4b7 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_tim_ex.d @@ -0,0 +1,87 @@ +build/stm32f0xx_hal_tim_ex.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_tim_ex.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_hal_tim_ex.lst b/fw/midi-dials/build/stm32f0xx_hal_tim_ex.lst new file mode 100644 index 0000000..4e46de5 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_tim_ex.lst @@ -0,0 +1,29 @@ +ARM GAS /tmp/ccIOJwtb.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_tim_ex.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .Letext0: + 16 .file 1 "/usr/include/newlib/machine/_default_types.h" + 17 .file 2 "/usr/include/newlib/sys/_stdint.h" + 18 .file 3 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 19 .file 4 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccIOJwtb.s page 2 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_tim_ex.c + +NO UNDEFINED SYMBOLS diff --git a/fw/midi-dials/build/stm32f0xx_hal_tim_ex.o b/fw/midi-dials/build/stm32f0xx_hal_tim_ex.o Binary files differnew file mode 100644 index 0000000..6b3cae0 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_tim_ex.o diff --git a/fw/midi-dials/build/stm32f0xx_it.d b/fw/midi-dials/build/stm32f0xx_it.d new file mode 100644 index 0000000..691be57 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_it.d @@ -0,0 +1,91 @@ +build/stm32f0xx_it.o: Src/stm32f0xx_it.c Inc/main.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Inc/stm32f0xx_it.h + +Inc/main.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Inc/stm32f0xx_it.h: diff --git a/fw/midi-dials/build/stm32f0xx_it.lst b/fw/midi-dials/build/stm32f0xx_it.lst new file mode 100644 index 0000000..931f212 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_it.lst @@ -0,0 +1,409 @@ +ARM GAS /tmp/ccxPgspp.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_it.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.NMI_Handler,"ax",%progbits + 16 .align 1 + 17 .global NMI_Handler + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 NMI_Handler: + 24 .LFB40: + 25 .file 1 "Src/stm32f0xx_it.c" + 1:Src/stm32f0xx_it.c **** /* USER CODE BEGIN Header */ + 2:Src/stm32f0xx_it.c **** /** + 3:Src/stm32f0xx_it.c **** ****************************************************************************** + 4:Src/stm32f0xx_it.c **** * @file stm32f0xx_it.c + 5:Src/stm32f0xx_it.c **** * @brief Interrupt Service Routines. + 6:Src/stm32f0xx_it.c **** ****************************************************************************** + 7:Src/stm32f0xx_it.c **** * @attention + 8:Src/stm32f0xx_it.c **** * + 9:Src/stm32f0xx_it.c **** * <h2><center>© Copyright (c) 2020 STMicroelectronics. + 10:Src/stm32f0xx_it.c **** * All rights reserved.</center></h2> + 11:Src/stm32f0xx_it.c **** * + 12:Src/stm32f0xx_it.c **** * This software component is licensed by ST under BSD 3-Clause license, + 13:Src/stm32f0xx_it.c **** * the "License"; You may not use this file except in compliance with the + 14:Src/stm32f0xx_it.c **** * License. You may obtain a copy of the License at: + 15:Src/stm32f0xx_it.c **** * opensource.org/licenses/BSD-3-Clause + 16:Src/stm32f0xx_it.c **** * + 17:Src/stm32f0xx_it.c **** ****************************************************************************** + 18:Src/stm32f0xx_it.c **** */ + 19:Src/stm32f0xx_it.c **** /* USER CODE END Header */ + 20:Src/stm32f0xx_it.c **** + 21:Src/stm32f0xx_it.c **** /* Includes ------------------------------------------------------------------*/ + 22:Src/stm32f0xx_it.c **** #include "main.h" + 23:Src/stm32f0xx_it.c **** #include "stm32f0xx_it.h" + 24:Src/stm32f0xx_it.c **** /* Private includes ----------------------------------------------------------*/ + 25:Src/stm32f0xx_it.c **** /* USER CODE BEGIN Includes */ + 26:Src/stm32f0xx_it.c **** /* USER CODE END Includes */ + 27:Src/stm32f0xx_it.c **** + 28:Src/stm32f0xx_it.c **** /* Private typedef -----------------------------------------------------------*/ + 29:Src/stm32f0xx_it.c **** /* USER CODE BEGIN TD */ + 30:Src/stm32f0xx_it.c **** + 31:Src/stm32f0xx_it.c **** /* USER CODE END TD */ + 32:Src/stm32f0xx_it.c **** + 33:Src/stm32f0xx_it.c **** /* Private define ------------------------------------------------------------*/ + ARM GAS /tmp/ccxPgspp.s page 2 + + + 34:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PD */ + 35:Src/stm32f0xx_it.c **** + 36:Src/stm32f0xx_it.c **** /* USER CODE END PD */ + 37:Src/stm32f0xx_it.c **** + 38:Src/stm32f0xx_it.c **** /* Private macro -------------------------------------------------------------*/ + 39:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PM */ + 40:Src/stm32f0xx_it.c **** + 41:Src/stm32f0xx_it.c **** /* USER CODE END PM */ + 42:Src/stm32f0xx_it.c **** + 43:Src/stm32f0xx_it.c **** /* Private variables ---------------------------------------------------------*/ + 44:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PV */ + 45:Src/stm32f0xx_it.c **** + 46:Src/stm32f0xx_it.c **** /* USER CODE END PV */ + 47:Src/stm32f0xx_it.c **** + 48:Src/stm32f0xx_it.c **** /* Private function prototypes -----------------------------------------------*/ + 49:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PFP */ + 50:Src/stm32f0xx_it.c **** + 51:Src/stm32f0xx_it.c **** /* USER CODE END PFP */ + 52:Src/stm32f0xx_it.c **** + 53:Src/stm32f0xx_it.c **** /* Private user code ---------------------------------------------------------*/ + 54:Src/stm32f0xx_it.c **** /* USER CODE BEGIN 0 */ + 55:Src/stm32f0xx_it.c **** + 56:Src/stm32f0xx_it.c **** /* USER CODE END 0 */ + 57:Src/stm32f0xx_it.c **** + 58:Src/stm32f0xx_it.c **** /* External variables --------------------------------------------------------*/ + 59:Src/stm32f0xx_it.c **** extern DMA_HandleTypeDef hdma_adc; + 60:Src/stm32f0xx_it.c **** extern PCD_HandleTypeDef hpcd_USB_FS; + 61:Src/stm32f0xx_it.c **** + 62:Src/stm32f0xx_it.c **** /* USER CODE BEGIN EV */ + 63:Src/stm32f0xx_it.c **** + 64:Src/stm32f0xx_it.c **** /* USER CODE END EV */ + 65:Src/stm32f0xx_it.c **** + 66:Src/stm32f0xx_it.c **** /******************************************************************************/ + 67:Src/stm32f0xx_it.c **** /* Cortex-M0 Processor Interruption and Exception Handlers */ + 68:Src/stm32f0xx_it.c **** /******************************************************************************/ + 69:Src/stm32f0xx_it.c **** /** + 70:Src/stm32f0xx_it.c **** * @brief This function handles Non maskable interrupt. + 71:Src/stm32f0xx_it.c **** */ + 72:Src/stm32f0xx_it.c **** void NMI_Handler(void) + 73:Src/stm32f0xx_it.c **** { + 26 .loc 1 73 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 74:Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + 75:Src/stm32f0xx_it.c **** + 76:Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */ + 77:Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + 78:Src/stm32f0xx_it.c **** + 79:Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */ + 80:Src/stm32f0xx_it.c **** } + 31 .loc 1 80 0 + 32 @ sp needed + 33 0000 7047 bx lr + 34 .cfi_endproc + 35 .LFE40: + ARM GAS /tmp/ccxPgspp.s page 3 + + + 37 .section .text.HardFault_Handler,"ax",%progbits + 38 .align 1 + 39 .global HardFault_Handler + 40 .syntax unified + 41 .code 16 + 42 .thumb_func + 43 .fpu softvfp + 45 HardFault_Handler: + 46 .LFB41: + 81:Src/stm32f0xx_it.c **** + 82:Src/stm32f0xx_it.c **** /** + 83:Src/stm32f0xx_it.c **** * @brief This function handles Hard fault interrupt. + 84:Src/stm32f0xx_it.c **** */ + 85:Src/stm32f0xx_it.c **** void HardFault_Handler(void) + 86:Src/stm32f0xx_it.c **** { + 47 .loc 1 86 0 + 48 .cfi_startproc + 49 @ Volatile: function does not return. + 50 @ args = 0, pretend = 0, frame = 0 + 51 @ frame_needed = 0, uses_anonymous_args = 0 + 52 @ link register save eliminated. + 53 .L3: + 54 0000 FEE7 b .L3 + 55 .cfi_endproc + 56 .LFE41: + 58 .section .text.SVC_Handler,"ax",%progbits + 59 .align 1 + 60 .global SVC_Handler + 61 .syntax unified + 62 .code 16 + 63 .thumb_func + 64 .fpu softvfp + 66 SVC_Handler: + 67 .LFB42: + 87:Src/stm32f0xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */ + 88:Src/stm32f0xx_it.c **** + 89:Src/stm32f0xx_it.c **** /* USER CODE END HardFault_IRQn 0 */ + 90:Src/stm32f0xx_it.c **** while (1) + 91:Src/stm32f0xx_it.c **** { + 92:Src/stm32f0xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + 93:Src/stm32f0xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */ + 94:Src/stm32f0xx_it.c **** } + 95:Src/stm32f0xx_it.c **** } + 96:Src/stm32f0xx_it.c **** + 97:Src/stm32f0xx_it.c **** /** + 98:Src/stm32f0xx_it.c **** * @brief This function handles System service call via SWI instruction. + 99:Src/stm32f0xx_it.c **** */ + 100:Src/stm32f0xx_it.c **** void SVC_Handler(void) + 101:Src/stm32f0xx_it.c **** { + 68 .loc 1 101 0 + 69 .cfi_startproc + 70 @ args = 0, pretend = 0, frame = 0 + 71 @ frame_needed = 0, uses_anonymous_args = 0 + 72 @ link register save eliminated. + 102:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 0 */ + 103:Src/stm32f0xx_it.c **** + 104:Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 0 */ + ARM GAS /tmp/ccxPgspp.s page 4 + + + 105:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 1 */ + 106:Src/stm32f0xx_it.c **** + 107:Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 1 */ + 108:Src/stm32f0xx_it.c **** } + 73 .loc 1 108 0 + 74 @ sp needed + 75 0000 7047 bx lr + 76 .cfi_endproc + 77 .LFE42: + 79 .section .text.PendSV_Handler,"ax",%progbits + 80 .align 1 + 81 .global PendSV_Handler + 82 .syntax unified + 83 .code 16 + 84 .thumb_func + 85 .fpu softvfp + 87 PendSV_Handler: + 88 .LFB43: + 109:Src/stm32f0xx_it.c **** + 110:Src/stm32f0xx_it.c **** /** + 111:Src/stm32f0xx_it.c **** * @brief This function handles Pendable request for system service. + 112:Src/stm32f0xx_it.c **** */ + 113:Src/stm32f0xx_it.c **** void PendSV_Handler(void) + 114:Src/stm32f0xx_it.c **** { + 89 .loc 1 114 0 + 90 .cfi_startproc + 91 @ args = 0, pretend = 0, frame = 0 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 @ link register save eliminated. + 115:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */ + 116:Src/stm32f0xx_it.c **** + 117:Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 0 */ + 118:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */ + 119:Src/stm32f0xx_it.c **** + 120:Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 1 */ + 121:Src/stm32f0xx_it.c **** } + 94 .loc 1 121 0 + 95 @ sp needed + 96 0000 7047 bx lr + 97 .cfi_endproc + 98 .LFE43: + 100 .section .text.SysTick_Handler,"ax",%progbits + 101 .align 1 + 102 .global SysTick_Handler + 103 .syntax unified + 104 .code 16 + 105 .thumb_func + 106 .fpu softvfp + 108 SysTick_Handler: + 109 .LFB44: + 122:Src/stm32f0xx_it.c **** + 123:Src/stm32f0xx_it.c **** /** + 124:Src/stm32f0xx_it.c **** * @brief This function handles System tick timer. + 125:Src/stm32f0xx_it.c **** */ + 126:Src/stm32f0xx_it.c **** void SysTick_Handler(void) + 127:Src/stm32f0xx_it.c **** { + 110 .loc 1 127 0 + ARM GAS /tmp/ccxPgspp.s page 5 + + + 111 .cfi_startproc + 112 @ args = 0, pretend = 0, frame = 0 + 113 @ frame_needed = 0, uses_anonymous_args = 0 + 114 0000 10B5 push {r4, lr} + 115 .LCFI0: + 116 .cfi_def_cfa_offset 8 + 117 .cfi_offset 4, -8 + 118 .cfi_offset 14, -4 + 128:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */ + 129:Src/stm32f0xx_it.c **** + 130:Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 0 */ + 131:Src/stm32f0xx_it.c **** HAL_IncTick(); + 119 .loc 1 131 0 + 120 0002 FFF7FEFF bl HAL_IncTick + 121 .LVL0: + 132:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ + 133:Src/stm32f0xx_it.c **** + 134:Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ + 135:Src/stm32f0xx_it.c **** } + 122 .loc 1 135 0 + 123 @ sp needed + 124 0006 10BD pop {r4, pc} + 125 .cfi_endproc + 126 .LFE44: + 128 .section .text.DMA1_Channel1_IRQHandler,"ax",%progbits + 129 .align 1 + 130 .global DMA1_Channel1_IRQHandler + 131 .syntax unified + 132 .code 16 + 133 .thumb_func + 134 .fpu softvfp + 136 DMA1_Channel1_IRQHandler: + 137 .LFB45: + 136:Src/stm32f0xx_it.c **** + 137:Src/stm32f0xx_it.c **** /******************************************************************************/ + 138:Src/stm32f0xx_it.c **** /* STM32F0xx Peripheral Interrupt Handlers */ + 139:Src/stm32f0xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */ + 140:Src/stm32f0xx_it.c **** /* For the available peripheral interrupt handler names, */ + 141:Src/stm32f0xx_it.c **** /* please refer to the startup file (startup_stm32f0xx.s). */ + 142:Src/stm32f0xx_it.c **** /******************************************************************************/ + 143:Src/stm32f0xx_it.c **** + 144:Src/stm32f0xx_it.c **** /** + 145:Src/stm32f0xx_it.c **** * @brief This function handles DMA1 channel 1 global interrupt. + 146:Src/stm32f0xx_it.c **** */ + 147:Src/stm32f0xx_it.c **** void DMA1_Channel1_IRQHandler(void) + 148:Src/stm32f0xx_it.c **** { + 138 .loc 1 148 0 + 139 .cfi_startproc + 140 @ args = 0, pretend = 0, frame = 0 + 141 @ frame_needed = 0, uses_anonymous_args = 0 + 142 0000 10B5 push {r4, lr} + 143 .LCFI1: + 144 .cfi_def_cfa_offset 8 + 145 .cfi_offset 4, -8 + 146 .cfi_offset 14, -4 + 149:Src/stm32f0xx_it.c **** /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ + 150:Src/stm32f0xx_it.c **** + ARM GAS /tmp/ccxPgspp.s page 6 + + + 151:Src/stm32f0xx_it.c **** /* USER CODE END DMA1_Channel1_IRQn 0 */ + 152:Src/stm32f0xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc); + 147 .loc 1 152 0 + 148 0002 0248 ldr r0, .L8 + 149 0004 FFF7FEFF bl HAL_DMA_IRQHandler + 150 .LVL1: + 153:Src/stm32f0xx_it.c **** /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ + 154:Src/stm32f0xx_it.c **** + 155:Src/stm32f0xx_it.c **** /* USER CODE END DMA1_Channel1_IRQn 1 */ + 156:Src/stm32f0xx_it.c **** } + 151 .loc 1 156 0 + 152 @ sp needed + 153 0008 10BD pop {r4, pc} + 154 .L9: + 155 000a C046 .align 2 + 156 .L8: + 157 000c 00000000 .word hdma_adc + 158 .cfi_endproc + 159 .LFE45: + 161 .section .text.USB_IRQHandler,"ax",%progbits + 162 .align 1 + 163 .global USB_IRQHandler + 164 .syntax unified + 165 .code 16 + 166 .thumb_func + 167 .fpu softvfp + 169 USB_IRQHandler: + 170 .LFB46: + 157:Src/stm32f0xx_it.c **** + 158:Src/stm32f0xx_it.c **** /** + 159:Src/stm32f0xx_it.c **** * @brief This function handles USB global Interrupt / USB wake-up interrupt through EXTI line 18. + 160:Src/stm32f0xx_it.c **** */ + 161:Src/stm32f0xx_it.c **** void USB_IRQHandler(void) + 162:Src/stm32f0xx_it.c **** { + 171 .loc 1 162 0 + 172 .cfi_startproc + 173 @ args = 0, pretend = 0, frame = 0 + 174 @ frame_needed = 0, uses_anonymous_args = 0 + 175 0000 10B5 push {r4, lr} + 176 .LCFI2: + 177 .cfi_def_cfa_offset 8 + 178 .cfi_offset 4, -8 + 179 .cfi_offset 14, -4 + 163:Src/stm32f0xx_it.c **** /* USER CODE BEGIN USB_IRQn 0 */ + 164:Src/stm32f0xx_it.c **** + 165:Src/stm32f0xx_it.c **** /* USER CODE END USB_IRQn 0 */ + 166:Src/stm32f0xx_it.c **** HAL_PCD_IRQHandler(&hpcd_USB_FS); + 180 .loc 1 166 0 + 181 0002 0248 ldr r0, .L11 + 182 0004 FFF7FEFF bl HAL_PCD_IRQHandler + 183 .LVL2: + 167:Src/stm32f0xx_it.c **** /* USER CODE BEGIN USB_IRQn 1 */ + 168:Src/stm32f0xx_it.c **** + 169:Src/stm32f0xx_it.c **** /* USER CODE END USB_IRQn 1 */ + 170:Src/stm32f0xx_it.c **** } + 184 .loc 1 170 0 + 185 @ sp needed + ARM GAS /tmp/ccxPgspp.s page 7 + + + 186 0008 10BD pop {r4, pc} + 187 .L12: + 188 000a C046 .align 2 + 189 .L11: + 190 000c 00000000 .word hpcd_USB_FS + 191 .cfi_endproc + 192 .LFE46: + 194 .text + 195 .Letext0: + 196 .file 2 "/usr/include/newlib/machine/_default_types.h" + 197 .file 3 "/usr/include/newlib/sys/_stdint.h" + 198 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 199 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 200 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 201 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 202 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h" + 203 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h" + 204 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccxPgspp.s page 8 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_it.c + /tmp/ccxPgspp.s:16 .text.NMI_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:23 .text.NMI_Handler:0000000000000000 NMI_Handler + /tmp/ccxPgspp.s:38 .text.HardFault_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:45 .text.HardFault_Handler:0000000000000000 HardFault_Handler + /tmp/ccxPgspp.s:59 .text.SVC_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:66 .text.SVC_Handler:0000000000000000 SVC_Handler + /tmp/ccxPgspp.s:80 .text.PendSV_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:87 .text.PendSV_Handler:0000000000000000 PendSV_Handler + /tmp/ccxPgspp.s:101 .text.SysTick_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:108 .text.SysTick_Handler:0000000000000000 SysTick_Handler + /tmp/ccxPgspp.s:129 .text.DMA1_Channel1_IRQHandler:0000000000000000 $t + /tmp/ccxPgspp.s:136 .text.DMA1_Channel1_IRQHandler:0000000000000000 DMA1_Channel1_IRQHandler + /tmp/ccxPgspp.s:157 .text.DMA1_Channel1_IRQHandler:000000000000000c $d + /tmp/ccxPgspp.s:162 .text.USB_IRQHandler:0000000000000000 $t + /tmp/ccxPgspp.s:169 .text.USB_IRQHandler:0000000000000000 USB_IRQHandler + /tmp/ccxPgspp.s:190 .text.USB_IRQHandler:000000000000000c $d + +UNDEFINED SYMBOLS +HAL_IncTick +HAL_DMA_IRQHandler +hdma_adc +HAL_PCD_IRQHandler +hpcd_USB_FS diff --git a/fw/midi-dials/build/stm32f0xx_it.o b/fw/midi-dials/build/stm32f0xx_it.o Binary files differnew file mode 100644 index 0000000..7d1aca0 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_it.o diff --git a/fw/midi-dials/build/stm32f0xx_ll_usb.d b/fw/midi-dials/build/stm32f0xx_ll_usb.d new file mode 100644 index 0000000..571f25b --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_ll_usb.d @@ -0,0 +1,87 @@ +build/stm32f0xx_ll_usb.o: \ + Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/stm32f0xx_ll_usb.lst b/fw/midi-dials/build/stm32f0xx_ll_usb.lst new file mode 100644 index 0000000..ac9d768 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_ll_usb.lst @@ -0,0 +1,3886 @@ +ARM GAS /tmp/ccalJhl3.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_ll_usb.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.USB_CoreInit,"ax",%progbits + 16 .align 1 + 17 .global USB_CoreInit + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 USB_CoreInit: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @file stm32f0xx_ll_usb.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB Low Layer HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * This file provides firmware functions to manage the following + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * functionalities of the USB Peripheral Controller: + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * + Initialization/de-initialization functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * + I/O operation functions + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * + Peripheral Control functions + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * + Peripheral State functions + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** @verbatim + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ============================================================================== + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ##### How to use this driver ##### + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ============================================================================== + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** [..] + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** (#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure. + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** (#) Call USB_CoreInit() API to initialize the USB Core peripheral. + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** (#) The upper HAL HCD/PCD driver will call the right routines for its internal processes. + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** @endverbatim + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ****************************************************************************** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @attention + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * All rights reserved.</center></h2> + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * This software component is licensed by ST under BSD 3-Clause license, + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * the "License"; You may not use this file except in compliance with the + ARM GAS /tmp/ccalJhl3.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * License. You may obtain a copy of the License at: + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * opensource.org/licenses/BSD-3-Clause + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ****************************************************************************** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Includes ------------------------------------------------------------------*/ + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** #include "stm32f0xx_hal.h" + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** @addtogroup STM32F0xx_LL_USB_DRIVER + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @{ + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** #if defined (HAL_PCD_MODULE_ENABLED) || defined (HAL_HCD_MODULE_ENABLED) + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** #if defined (USB) + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Private typedef -----------------------------------------------------------*/ + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Private define ------------------------------------------------------------*/ + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Private macro -------------------------------------------------------------*/ + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Private variables ---------------------------------------------------------*/ + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Private function prototypes -----------------------------------------------*/ + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Private functions ---------------------------------------------------------*/ + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief Initializes the USB Core + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx: USB Instance + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param cfg : pointer to a USB_CfgTypeDef structure that contains + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * the configuration information for the specified USBx peripheral. + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 26 .loc 1 65 0 + 27 .cfi_startproc + 28 @ args = 36, pretend = 16, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 31 .LVL0: + 32 0000 84B0 sub sp, sp, #16 + 33 .LCFI0: + 34 .cfi_def_cfa_offset 16 + 35 0002 0191 str r1, [sp, #4] + 36 0004 0292 str r2, [sp, #8] + 37 0006 0393 str r3, [sp, #12] + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(cfg); + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 38 .loc 1 76 0 + 39 0008 0020 movs r0, #0 + ARM GAS /tmp/ccalJhl3.s page 3 + + + 40 .LVL1: + 41 @ sp needed + 42 000a 04B0 add sp, sp, #16 + 43 000c 7047 bx lr + 44 .cfi_endproc + 45 .LFE40: + 47 .section .text.USB_EnableGlobalInt,"ax",%progbits + 48 .align 1 + 49 .global USB_EnableGlobalInt + 50 .syntax unified + 51 .code 16 + 52 .thumb_func + 53 .fpu softvfp + 55 USB_EnableGlobalInt: + 56 .LFB41: + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_EnableGlobalInt + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * Enables the controller's Global Int in the AHB Config reg + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx) + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 57 .loc 1 85 0 + 58 .cfi_startproc + 59 @ args = 0, pretend = 0, frame = 0 + 60 @ frame_needed = 0, uses_anonymous_args = 0 + 61 @ link register save eliminated. + 62 .LVL2: + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint16_t winterruptmask; + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Set winterruptmask variable */ + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USB_CNTR_SUSPM | USB_CNTR_ERRM | + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USB_CNTR_SOFM | USB_CNTR_ESOFM | + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USB_CNTR_RESETM | USB_CNTR_L1REQM; + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Set interrupt mask */ + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->CNTR |= winterruptmask; + 63 .loc 1 95 0 + 64 0000 4022 movs r2, #64 + 65 0002 835A ldrh r3, [r0, r2] + 66 0004 0249 ldr r1, .L3 + 67 0006 0B43 orrs r3, r1 + 68 0008 9BB2 uxth r3, r3 + 69 000a 8352 strh r3, [r0, r2] + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 70 .loc 1 98 0 + 71 000c 0020 movs r0, #0 + 72 .LVL3: + 73 @ sp needed + 74 000e 7047 bx lr + 75 .L4: + 76 .align 2 + ARM GAS /tmp/ccalJhl3.s page 4 + + + 77 .L3: + 78 0010 80BFFFFF .word -16512 + 79 .cfi_endproc + 80 .LFE41: + 82 .section .text.USB_DisableGlobalInt,"ax",%progbits + 83 .align 1 + 84 .global USB_DisableGlobalInt + 85 .syntax unified + 86 .code 16 + 87 .thumb_func + 88 .fpu softvfp + 90 USB_DisableGlobalInt: + 91 .LFB42: + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_DisableGlobalInt + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * Disable the controller's Global Int in the AHB Config reg + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx) + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 92 .loc 1 107 0 + 93 .cfi_startproc + 94 @ args = 0, pretend = 0, frame = 0 + 95 @ frame_needed = 0, uses_anonymous_args = 0 + 96 @ link register save eliminated. + 97 .LVL4: + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint16_t winterruptmask; + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Set winterruptmask variable */ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM | + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USB_CNTR_SUSPM | USB_CNTR_ERRM | + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USB_CNTR_SOFM | USB_CNTR_ESOFM | + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USB_CNTR_RESETM | USB_CNTR_L1REQM; + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Clear interrupt mask */ + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->CNTR &= ~winterruptmask; + 98 .loc 1 117 0 + 99 0000 4022 movs r2, #64 + 100 0002 835A ldrh r3, [r0, r2] + 101 0004 0249 ldr r1, .L6 + 102 0006 0B40 ands r3, r1 + 103 0008 8352 strh r3, [r0, r2] + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 104 .loc 1 120 0 + 105 000a 0020 movs r0, #0 + 106 .LVL5: + 107 @ sp needed + 108 000c 7047 bx lr + 109 .L7: + 110 000e C046 .align 2 + 111 .L6: + 112 0010 7F400000 .word 16511 + 113 .cfi_endproc + ARM GAS /tmp/ccalJhl3.s page 5 + + + 114 .LFE42: + 116 .section .text.USB_SetCurrentMode,"ax",%progbits + 117 .align 1 + 118 .global USB_SetCurrentMode + 119 .syntax unified + 120 .code 16 + 121 .thumb_func + 122 .fpu softvfp + 124 USB_SetCurrentMode: + 125 .LFB43: + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_SetCurrentMode : Set functional mode + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param mode : current core mode + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * This parameter can be one of the these values: + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @arg USB_DEVICE_MODE: Peripheral mode mode + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode) + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 126 .loc 1 131 0 + 127 .cfi_startproc + 128 @ args = 0, pretend = 0, frame = 0 + 129 @ frame_needed = 0, uses_anonymous_args = 0 + 130 @ link register save eliminated. + 131 .LVL6: + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(mode); + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 132 .loc 1 141 0 + 133 0000 0020 movs r0, #0 + 134 .LVL7: + 135 @ sp needed + 136 0002 7047 bx lr + 137 .cfi_endproc + 138 .LFE43: + 140 .section .text.USB_DevInit,"ax",%progbits + 141 .align 1 + 142 .global USB_DevInit + 143 .syntax unified + 144 .code 16 + 145 .thumb_func + 146 .fpu softvfp + 148 USB_DevInit: + 149 .LFB44: + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_DevInit : Initializes the USB controller registers + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * for device mode + ARM GAS /tmp/ccalJhl3.s page 6 + + + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param cfg : pointer to a USB_CfgTypeDef structure that contains + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * the configuration information for the specified USBx peripheral. + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg) + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 150 .loc 1 152 0 + 151 .cfi_startproc + 152 @ args = 36, pretend = 16, frame = 0 + 153 @ frame_needed = 0, uses_anonymous_args = 0 + 154 .LVL8: + 155 0000 84B0 sub sp, sp, #16 + 156 .LCFI1: + 157 .cfi_def_cfa_offset 16 + 158 0002 10B5 push {r4, lr} + 159 .LCFI2: + 160 .cfi_def_cfa_offset 24 + 161 .cfi_offset 4, -24 + 162 .cfi_offset 14, -20 + 163 0004 0391 str r1, [sp, #12] + 164 0006 0492 str r2, [sp, #16] + 165 0008 0593 str r3, [sp, #20] + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(cfg); + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Init Device */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*CNTR_FRES = 1*/ + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->CNTR = USB_CNTR_FRES; + 166 .loc 1 158 0 + 167 000a 4022 movs r2, #64 + 168 000c 0123 movs r3, #1 + 169 000e 8352 strh r3, [r0, r2] + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*CNTR_FRES = 0*/ + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->CNTR = 0; + 170 .loc 1 161 0 + 171 0010 0023 movs r3, #0 + 172 0012 8352 strh r3, [r0, r2] + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Clear pending interrupts*/ + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->ISTR = 0; + 173 .loc 1 164 0 + 174 0014 0432 adds r2, r2, #4 + 175 0016 8352 strh r3, [r0, r2] + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Set Btable Address*/ + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->BTABLE = BTABLE_ADDRESS; + 176 .loc 1 167 0 + 177 0018 0C32 adds r2, r2, #12 + 178 001a 8352 strh r3, [r0, r2] + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Enable USB Device Interrupt mask */ + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** (void)USB_EnableGlobalInt(USBx); + 179 .loc 1 170 0 + 180 001c FFF7FEFF bl USB_EnableGlobalInt + 181 .LVL9: + ARM GAS /tmp/ccalJhl3.s page 7 + + + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 182 .loc 1 173 0 + 183 0020 0020 movs r0, #0 + 184 @ sp needed + 185 0022 10BC pop {r4} + 186 0024 08BC pop {r3} + 187 0026 04B0 add sp, sp, #16 + 188 0028 1847 bx r3 + 189 .cfi_endproc + 190 .LFE44: + 192 .section .text.USB_SetDevSpeed,"ax",%progbits + 193 .align 1 + 194 .global USB_SetDevSpeed + 195 .syntax unified + 196 .code 16 + 197 .thumb_func + 198 .fpu softvfp + 200 USB_SetDevSpeed: + 201 .LFB45: + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_SetDevSpeed :Initializes the device speed + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * depending on the PHY type and the enumeration speed of the device. + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx Selected device + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param speed device speed + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval Hal status + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_SetDevSpeed(USB_TypeDef *USBx, uint8_t speed) + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 202 .loc 1 183 0 + 203 .cfi_startproc + 204 @ args = 0, pretend = 0, frame = 0 + 205 @ frame_needed = 0, uses_anonymous_args = 0 + 206 @ link register save eliminated. + 207 .LVL10: + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(speed); + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 208 .loc 1 194 0 + 209 0000 0020 movs r0, #0 + 210 .LVL11: + 211 @ sp needed + 212 0002 7047 bx lr + 213 .cfi_endproc + 214 .LFE45: + 216 .section .text.USB_FlushTxFifo,"ax",%progbits + 217 .align 1 + ARM GAS /tmp/ccalJhl3.s page 8 + + + 218 .global USB_FlushTxFifo + 219 .syntax unified + 220 .code 16 + 221 .thumb_func + 222 .fpu softvfp + 224 USB_FlushTxFifo: + 225 .LFB46: + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_FlushTxFifo : Flush a Tx FIFO + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param num : FIFO number + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * This parameter can be a value from 1 to 15 + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** 15 means Flush all Tx FIFOs + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_FlushTxFifo(USB_TypeDef *USBx, uint32_t num) + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 226 .loc 1 205 0 + 227 .cfi_startproc + 228 @ args = 0, pretend = 0, frame = 0 + 229 @ frame_needed = 0, uses_anonymous_args = 0 + 230 @ link register save eliminated. + 231 .LVL12: + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(num); + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 232 .loc 1 216 0 + 233 0000 0020 movs r0, #0 + 234 .LVL13: + 235 @ sp needed + 236 0002 7047 bx lr + 237 .cfi_endproc + 238 .LFE46: + 240 .section .text.USB_FlushRxFifo,"ax",%progbits + 241 .align 1 + 242 .global USB_FlushRxFifo + 243 .syntax unified + 244 .code 16 + 245 .thumb_func + 246 .fpu softvfp + 248 USB_FlushRxFifo: + 249 .LFB47: + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_FlushRxFifo : Flush Rx FIFO + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + ARM GAS /tmp/ccalJhl3.s page 9 + + + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_FlushRxFifo(USB_TypeDef *USBx) + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 250 .loc 1 224 0 + 251 .cfi_startproc + 252 @ args = 0, pretend = 0, frame = 0 + 253 @ frame_needed = 0, uses_anonymous_args = 0 + 254 @ link register save eliminated. + 255 .LVL14: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 256 .loc 1 234 0 + 257 0000 0020 movs r0, #0 + 258 .LVL15: + 259 @ sp needed + 260 0002 7047 bx lr + 261 .cfi_endproc + 262 .LFE47: + 264 .section .text.USB_ActivateEndpoint,"ax",%progbits + 265 .align 1 + 266 .global USB_ActivateEndpoint + 267 .syntax unified + 268 .code 16 + 269 .thumb_func + 270 .fpu softvfp + 272 USB_ActivateEndpoint: + 273 .LFB48: + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief Activate and configure an endpoint + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param ep: pointer to endpoint structure + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 274 .loc 1 243 0 + 275 .cfi_startproc + 276 @ args = 0, pretend = 0, frame = 0 + 277 @ frame_needed = 0, uses_anonymous_args = 0 + 278 .LVL16: + 279 0000 F0B5 push {r4, r5, r6, r7, lr} + 280 .LCFI3: + 281 .cfi_def_cfa_offset 20 + 282 .cfi_offset 4, -20 + 283 .cfi_offset 5, -16 + 284 .cfi_offset 6, -12 + 285 .cfi_offset 7, -8 + 286 .cfi_offset 14, -4 + 287 .LVL17: + ARM GAS /tmp/ccalJhl3.s page 10 + + + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef ret = HAL_OK; + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint16_t wEpRegVal; + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK; + 288 .loc 1 247 0 + 289 0002 0D78 ldrb r5, [r1] + 290 0004 AD00 lsls r5, r5, #2 + 291 0006 4519 adds r5, r0, r5 + 292 0008 2B88 ldrh r3, [r5] + 293 000a B14A ldr r2, .L39 + 294 000c 1340 ands r3, r2 + 295 .LVL18: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* initialize Endpoint */ + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** switch (ep->type) + 296 .loc 1 250 0 + 297 000e CA78 ldrb r2, [r1, #3] + 298 0010 012A cmp r2, #1 + 299 0012 54D0 beq .L15 + 300 0014 002A cmp r2, #0 + 301 0016 48D0 beq .L16 + 302 0018 022A cmp r2, #2 + 303 001a 03D0 beq .L17 + 304 001c 032A cmp r2, #3 + 305 001e 49D0 beq .L18 + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** case EP_TYPE_CTRL: + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** wEpRegVal |= USB_EP_CONTROL; + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** break; + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** case EP_TYPE_BULK: + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** wEpRegVal |= USB_EP_BULK; + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** break; + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** case EP_TYPE_INTR: + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** wEpRegVal |= USB_EP_INTERRUPT; + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** break; + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** case EP_TYPE_ISOC: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** wEpRegVal |= USB_EP_ISOCHRONOUS; + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** break; + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** default: + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ret = HAL_ERROR; + 306 .loc 1 269 0 + 307 0020 0124 movs r4, #1 + 308 0022 00E0 b .L14 + 309 .L17: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint16_t wEpRegVal; + 310 .loc 1 244 0 + 311 0024 0024 movs r4, #0 + 312 .L14: + 313 .LVL19: + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** break; + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_ENDPOINT(USBx, ep->num, wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX); + ARM GAS /tmp/ccalJhl3.s page 11 + + + 314 .loc 1 273 0 + 315 0026 AB4A ldr r2, .L39+4 + 316 0028 1343 orrs r3, r2 + 317 .LVL20: + 318 002a 9BB2 uxth r3, r3 + 319 002c 2B80 strh r3, [r5] + 320 .LBB2: + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num); + 321 .loc 1 275 0 + 322 002e 0B78 ldrb r3, [r1] + 323 0030 9E00 lsls r6, r3, #2 + 324 0032 8619 adds r6, r0, r6 + 325 0034 3588 ldrh r5, [r6] + 326 0036 2DB2 sxth r5, r5 + 327 0038 A74F ldr r7, .L39+8 + 328 003a 3D40 ands r5, r7 + 329 003c 2B43 orrs r3, r5 + 330 003e 9BB2 uxth r3, r3 + 331 .LVL21: + 332 0040 1A43 orrs r2, r3 + 333 0042 92B2 uxth r2, r2 + 334 0044 3280 strh r2, [r6] + 335 .LBE2: + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->doublebuffer == 0U) + 336 .loc 1 277 0 + 337 0046 0B7B ldrb r3, [r1, #12] + 338 .LVL22: + 339 0048 002B cmp r3, #0 + 340 004a 00D0 beq .LCB243 + 341 004c 94E0 b .L19 @long jump + 342 .LCB243: + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->is_in != 0U) + 343 .loc 1 279 0 + 344 004e 4B78 ldrb r3, [r1, #1] + 345 0050 002B cmp r3, #0 + 346 0052 44D0 beq .L20 + 347 .LVL23: + 348 .LBB3: + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Set the endpoint Transmit buffer address */ + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress); + 349 .loc 1 282 0 + 350 0054 5023 movs r3, #80 + 351 0056 C25A ldrh r2, [r0, r3] + 352 0058 8218 adds r2, r0, r2 + 353 .LVL24: + 354 005a 0B78 ldrb r3, [r1] + 355 005c DB00 lsls r3, r3, #3 + 356 005e 9B18 adds r3, r3, r2 + 357 0060 8022 movs r2, #128 + 358 .LVL25: + 359 0062 D200 lsls r2, r2, #3 + 360 0064 9446 mov ip, r2 + 361 0066 6344 add r3, r3, ip + ARM GAS /tmp/ccalJhl3.s page 12 + + + 362 .LVL26: + 363 0068 CA88 ldrh r2, [r1, #6] + 364 006a 5208 lsrs r2, r2, #1 + 365 006c 5200 lsls r2, r2, #1 + 366 006e 1A80 strh r2, [r3] + 367 .LBE3: + 368 .LBB4: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 369 .loc 1 283 0 + 370 0070 0B78 ldrb r3, [r1] + 371 .LVL27: + 372 0072 9B00 lsls r3, r3, #2 + 373 0074 C318 adds r3, r0, r3 + 374 0076 1A88 ldrh r2, [r3] + 375 .LVL28: + 376 0078 5206 lsls r2, r2, #25 + 377 007a 06D5 bpl .L21 + 378 .LVL29: + 379 .LBB5: + 380 .loc 1 283 0 is_stmt 0 discriminator 1 + 381 007c 1A88 ldrh r2, [r3] + 382 007e 3D00 movs r5, r7 + 383 0080 1540 ands r5, r2 + 384 .LVL30: + 385 0082 964A ldr r2, .L39+12 + 386 0084 2A43 orrs r2, r5 + 387 0086 92B2 uxth r2, r2 + 388 0088 1A80 strh r2, [r3] + 389 .LVL31: + 390 .L21: + 391 .LBE5: + 392 .LBE4: + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->type != EP_TYPE_ISOC) + 393 .loc 1 285 0 is_stmt 1 + 394 008a CB78 ldrb r3, [r1, #3] + 395 008c 012B cmp r3, #1 + 396 008e 1BD0 beq .L22 + 397 .LBB6: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure NAK status for the Endpoint */ + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); + 398 .loc 1 288 0 + 399 0090 0B78 ldrb r3, [r1] + 400 0092 9B00 lsls r3, r3, #2 + 401 0094 C018 adds r0, r0, r3 + 402 .LVL32: + 403 0096 0388 ldrh r3, [r0] + 404 0098 914A ldr r2, .L39+16 + 405 009a 1340 ands r3, r2 + 406 .LVL33: + 407 009c 2022 movs r2, #32 + 408 009e 5A40 eors r2, r3 + 409 .LVL34: + 410 00a0 8C4B ldr r3, .L39+4 + 411 00a2 1343 orrs r3, r2 + 412 00a4 9BB2 uxth r3, r3 + ARM GAS /tmp/ccalJhl3.s page 13 + + + 413 00a6 0380 strh r3, [r0] + 414 .LBE6: + 415 00a8 51E0 b .L23 + 416 .LVL35: + 417 .L16: + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** break; + 418 .loc 1 253 0 + 419 00aa 8022 movs r2, #128 + 420 00ac 9200 lsls r2, r2, #2 + 421 00ae 1343 orrs r3, r2 + 422 .LVL36: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint16_t wEpRegVal; + 423 .loc 1 244 0 + 424 00b0 0024 movs r4, #0 + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 425 .loc 1 254 0 + 426 00b2 B8E7 b .L14 + 427 .L18: + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** break; + 428 .loc 1 261 0 + 429 00b4 C022 movs r2, #192 + 430 00b6 D200 lsls r2, r2, #3 + 431 00b8 1343 orrs r3, r2 + 432 .LVL37: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint16_t wEpRegVal; + 433 .loc 1 244 0 + 434 00ba 0024 movs r4, #0 + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 435 .loc 1 262 0 + 436 00bc B3E7 b .L14 + 437 .L15: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** break; + 438 .loc 1 265 0 + 439 00be 8022 movs r2, #128 + 440 00c0 D200 lsls r2, r2, #3 + 441 00c2 1343 orrs r3, r2 + 442 .LVL38: + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint16_t wEpRegVal; + 443 .loc 1 244 0 + 444 00c4 0024 movs r4, #0 + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 445 .loc 1 266 0 + 446 00c6 AEE7 b .L14 + 447 .LVL39: + 448 .L22: + 449 .LBB7: + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure TX Endpoint to disabled state */ + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); + 450 .loc 1 293 0 + 451 00c8 0B78 ldrb r3, [r1] + 452 00ca 9B00 lsls r3, r3, #2 + 453 00cc C018 adds r0, r0, r3 + 454 .LVL40: + 455 00ce 0388 ldrh r3, [r0] + ARM GAS /tmp/ccalJhl3.s page 14 + + + 456 00d0 834A ldr r2, .L39+16 + 457 00d2 1A40 ands r2, r3 + 458 .LVL41: + 459 00d4 7F4B ldr r3, .L39+4 + 460 00d6 1343 orrs r3, r2 + 461 00d8 9BB2 uxth r3, r3 + 462 00da 0380 strh r3, [r0] + 463 00dc 37E0 b .L23 + 464 .LVL42: + 465 .L20: + 466 .LBE7: + 467 .LBB8: + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Set the endpoint Receive buffer address */ + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress); + 468 .loc 1 299 0 + 469 00de 5025 movs r5, #80 + 470 00e0 425B ldrh r2, [r0, r5] + 471 00e2 8218 adds r2, r0, r2 + 472 .LVL43: + 473 00e4 0B78 ldrb r3, [r1] + 474 00e6 DB00 lsls r3, r3, #3 + 475 00e8 9B18 adds r3, r3, r2 + 476 00ea 7E4A ldr r2, .L39+20 + 477 .LVL44: + 478 00ec 9446 mov ip, r2 + 479 00ee 6344 add r3, r3, ip + 480 .LVL45: + 481 00f0 CA88 ldrh r2, [r1, #6] + 482 00f2 5208 lsrs r2, r2, #1 + 483 00f4 5200 lsls r2, r2, #1 + 484 00f6 1A80 strh r2, [r3] + 485 .LVL46: + 486 .LBE8: + 487 .LBB9: + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Set the endpoint Receive buffer counter*/ + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket); + 488 .loc 1 301 0 + 489 00f8 425B ldrh r2, [r0, r5] + 490 00fa 8218 adds r2, r0, r2 + 491 .LVL47: + 492 00fc 0B78 ldrb r3, [r1] + 493 .LVL48: + 494 00fe DB00 lsls r3, r3, #3 + 495 0100 9B18 adds r3, r3, r2 + 496 0102 794A ldr r2, .L39+24 + 497 .LVL49: + 498 0104 9446 mov ip, r2 + 499 0106 6344 add r3, r3, ip + 500 .LVL50: + 501 .LBB10: + 502 0108 0A69 ldr r2, [r1, #16] + 503 010a 002A cmp r2, #0 + 504 010c 21D1 bne .L24 + ARM GAS /tmp/ccalJhl3.s page 15 + + + 505 .loc 1 301 0 is_stmt 0 discriminator 1 + 506 010e 1A88 ldrh r2, [r3] + 507 0110 764D ldr r5, .L39+28 + 508 0112 1540 ands r5, r2 + 509 0114 764A ldr r2, .L39+32 + 510 0116 2A43 orrs r2, r5 + 511 0118 1A80 strh r2, [r3] + 512 .L25: + 513 .LBE10: + 514 .LBE9: + 515 .LBB12: + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 516 .loc 1 302 0 is_stmt 1 + 517 011a 0B78 ldrb r3, [r1] + 518 .LVL51: + 519 011c 9B00 lsls r3, r3, #2 + 520 011e C318 adds r3, r0, r3 + 521 0120 1A88 ldrh r2, [r3] + 522 .LVL52: + 523 0122 5204 lsls r2, r2, #17 + 524 0124 06D5 bpl .L29 + 525 .LVL53: + 526 .LBB13: + 527 .loc 1 302 0 is_stmt 0 discriminator 1 + 528 0126 1A88 ldrh r2, [r3] + 529 0128 6B4D ldr r5, .L39+8 + 530 012a 1540 ands r5, r2 + 531 .LVL54: + 532 012c 714A ldr r2, .L39+36 + 533 012e 2A43 orrs r2, r5 + 534 0130 92B2 uxth r2, r2 + 535 0132 1A80 strh r2, [r3] + 536 .LVL55: + 537 .L29: + 538 .LBE13: + 539 .LBE12: + 540 .LBB14: + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure VALID status for the Endpoint*/ + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); + 541 .loc 1 304 0 is_stmt 1 + 542 0134 0B78 ldrb r3, [r1] + 543 0136 9B00 lsls r3, r3, #2 + 544 0138 C018 adds r0, r0, r3 + 545 .LVL56: + 546 013a 0288 ldrh r2, [r0] + 547 013c 6E4B ldr r3, .L39+40 + 548 013e 1A40 ands r2, r3 + 549 .LVL57: + 550 0140 C023 movs r3, #192 + 551 0142 9B01 lsls r3, r3, #6 + 552 0144 5A40 eors r2, r3 + 553 .LVL58: + 554 0146 634B ldr r3, .L39+4 + 555 0148 1343 orrs r3, r2 + 556 014a 9BB2 uxth r3, r3 + 557 014c 0380 strh r3, [r0] + 558 .LVL59: + ARM GAS /tmp/ccalJhl3.s page 16 + + + 559 .L23: + 560 .LBE14: + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Double Buffer*/ + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Set the endpoint as double buffered */ + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_DBUF(USBx, ep->num); + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Set buffer address for double buffered mode */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1); + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->is_in == 0U) + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Clear the data toggle bits for the endpoint IN/OUT */ + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Reset value of the data toggle bits for the endpoint out */ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_TX_DTOG(USBx, ep->num); + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Clear the data toggle bits for the endpoint IN/OUT */ + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_RX_DTOG(USBx, ep->num); + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->type != EP_TYPE_ISOC) + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure NAK status for the Endpoint */ + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure TX Endpoint to disabled state */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return ret; + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 561 .loc 1 350 0 + 562 014e 2000 movs r0, r4 + 563 @ sp needed + 564 .LVL60: + 565 0150 F0BD pop {r4, r5, r6, r7, pc} + 566 .LVL61: + 567 .L24: + 568 .LBB15: + 569 .LBB11: + ARM GAS /tmp/ccalJhl3.s page 17 + + + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 570 .loc 1 301 0 discriminator 2 + 571 0152 3E2A cmp r2, #62 + 572 0154 06D8 bhi .L26 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 573 .loc 1 301 0 is_stmt 0 discriminator 3 + 574 0156 5508 lsrs r5, r2, #1 + 575 .LVL62: + 576 0158 D207 lsls r2, r2, #31 + 577 015a 00D5 bpl .L27 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 578 .loc 1 301 0 discriminator 5 + 579 015c 0135 adds r5, r5, #1 + 580 .LVL63: + 581 .L27: + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 582 .loc 1 301 0 discriminator 7 + 583 015e AD02 lsls r5, r5, #10 + 584 .LVL64: + 585 0160 1D80 strh r5, [r3] + 586 0162 DAE7 b .L25 + 587 .L26: + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 588 .loc 1 301 0 discriminator 4 + 589 0164 5509 lsrs r5, r2, #5 + 590 .LVL65: + 591 0166 D206 lsls r2, r2, #27 + 592 0168 00D1 bne .L28 + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 593 .loc 1 301 0 discriminator 8 + 594 016a 013D subs r5, r5, #1 + 595 .LVL66: + 596 .L28: + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 597 .loc 1 301 0 discriminator 10 + 598 016c AD02 lsls r5, r5, #10 + 599 .LVL67: + 600 016e ADB2 uxth r5, r5 + 601 0170 5F4A ldr r2, .L39+32 + 602 0172 1543 orrs r5, r2 + 603 0174 1D80 strh r5, [r3] + 604 0176 D0E7 b .L25 + 605 .LVL68: + 606 .L19: + 607 .LBE11: + 608 .LBE15: + 609 .LBB16: + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Set buffer address for double buffered mode */ + 610 .loc 1 311 0 is_stmt 1 + 611 0178 0B78 ldrb r3, [r1] + 612 017a 9B00 lsls r3, r3, #2 + 613 017c C318 adds r3, r0, r3 + 614 017e 1A88 ldrh r2, [r3] + 615 0180 554D ldr r5, .L39+8 + 616 0182 1540 ands r5, r2 + 617 .LVL69: + 618 0184 5D4A ldr r2, .L39+44 + ARM GAS /tmp/ccalJhl3.s page 18 + + + 619 0186 2A43 orrs r2, r5 + 620 0188 92B2 uxth r2, r2 + 621 018a 1A80 strh r2, [r3] + 622 .LVL70: + 623 .LBE16: + 624 .LBB17: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 625 .loc 1 313 0 + 626 018c 5025 movs r5, #80 + 627 .LVL71: + 628 018e 425B ldrh r2, [r0, r5] + 629 0190 8218 adds r2, r0, r2 + 630 .LVL72: + 631 0192 0B78 ldrb r3, [r1] + 632 0194 DB00 lsls r3, r3, #3 + 633 0196 9B18 adds r3, r3, r2 + 634 0198 8022 movs r2, #128 + 635 .LVL73: + 636 019a D200 lsls r2, r2, #3 + 637 019c 9446 mov ip, r2 + 638 019e 6344 add r3, r3, ip + 639 .LVL74: + 640 01a0 0A89 ldrh r2, [r1, #8] + 641 01a2 5208 lsrs r2, r2, #1 + 642 01a4 5200 lsls r2, r2, #1 + 643 01a6 1A80 strh r2, [r3] + 644 .LVL75: + 645 .LBE17: + 646 .LBB18: + 647 01a8 425B ldrh r2, [r0, r5] + 648 01aa 8218 adds r2, r0, r2 + 649 .LVL76: + 650 01ac 0B78 ldrb r3, [r1] + 651 .LVL77: + 652 01ae DB00 lsls r3, r3, #3 + 653 01b0 9B18 adds r3, r3, r2 + 654 01b2 4C4A ldr r2, .L39+20 + 655 .LVL78: + 656 01b4 9446 mov ip, r2 + 657 01b6 6344 add r3, r3, ip + 658 .LVL79: + 659 01b8 4A89 ldrh r2, [r1, #10] + 660 01ba 5208 lsrs r2, r2, #1 + 661 01bc 5200 lsls r2, r2, #1 + 662 01be 1A80 strh r2, [r3] + 663 .LBE18: + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 664 .loc 1 315 0 + 665 01c0 4B78 ldrb r3, [r1, #1] + 666 .LVL80: + 667 01c2 002B cmp r3, #0 + 668 01c4 3AD1 bne .L30 + 669 .LBB19: + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 670 .loc 1 318 0 + 671 01c6 0B78 ldrb r3, [r1] + 672 01c8 9B00 lsls r3, r3, #2 + ARM GAS /tmp/ccalJhl3.s page 19 + + + 673 01ca C318 adds r3, r0, r3 + 674 01cc 1A88 ldrh r2, [r3] + 675 .LVL81: + 676 01ce 5204 lsls r2, r2, #17 + 677 01d0 06D5 bpl .L31 + 678 .LVL82: + 679 .LBB20: + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 680 .loc 1 318 0 is_stmt 0 discriminator 1 + 681 01d2 1A88 ldrh r2, [r3] + 682 01d4 404D ldr r5, .L39+8 + 683 01d6 1540 ands r5, r2 + 684 .LVL83: + 685 01d8 464A ldr r2, .L39+36 + 686 01da 2A43 orrs r2, r5 + 687 01dc 92B2 uxth r2, r2 + 688 01de 1A80 strh r2, [r3] + 689 .LVL84: + 690 .L31: + 691 .LBE20: + 692 .LBE19: + 693 .LBB21: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 694 .loc 1 319 0 is_stmt 1 + 695 01e0 0B78 ldrb r3, [r1] + 696 01e2 9B00 lsls r3, r3, #2 + 697 01e4 C318 adds r3, r0, r3 + 698 01e6 1A88 ldrh r2, [r3] + 699 .LVL85: + 700 01e8 5206 lsls r2, r2, #25 + 701 01ea 06D5 bpl .L32 + 702 .LVL86: + 703 .LBB22: + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 704 .loc 1 319 0 is_stmt 0 discriminator 1 + 705 01ec 1A88 ldrh r2, [r3] + 706 01ee 3A4D ldr r5, .L39+8 + 707 01f0 1540 ands r5, r2 + 708 .LVL87: + 709 01f2 3A4A ldr r2, .L39+12 + 710 01f4 2A43 orrs r2, r5 + 711 01f6 92B2 uxth r2, r2 + 712 01f8 1A80 strh r2, [r3] + 713 .LVL88: + 714 .L32: + 715 .LBE22: + 716 .LBE21: + 717 .LBB23: + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 718 .loc 1 322 0 is_stmt 1 + 719 01fa 0B78 ldrb r3, [r1] + 720 01fc 9B00 lsls r3, r3, #2 + 721 01fe C318 adds r3, r0, r3 + 722 0200 1A88 ldrh r2, [r3] + 723 0202 354D ldr r5, .L39+8 + 724 0204 1540 ands r5, r2 + 725 .LVL89: + ARM GAS /tmp/ccalJhl3.s page 20 + + + 726 0206 354A ldr r2, .L39+12 + 727 0208 2A43 orrs r2, r5 + 728 020a 92B2 uxth r2, r2 + 729 020c 1A80 strh r2, [r3] + 730 .LBE23: + 731 .LBB24: + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); + 732 .loc 1 324 0 + 733 020e 0A78 ldrb r2, [r1] + 734 0210 9200 lsls r2, r2, #2 + 735 0212 8218 adds r2, r0, r2 + 736 0214 1388 ldrh r3, [r2] + 737 0216 384D ldr r5, .L39+40 + 738 .LVL90: + 739 0218 1D40 ands r5, r3 + 740 .LVL91: + 741 021a C023 movs r3, #192 + 742 021c 9B01 lsls r3, r3, #6 + 743 021e 6B40 eors r3, r5 + 744 .LVL92: + 745 0220 2C4D ldr r5, .L39+4 + 746 0222 2B43 orrs r3, r5 + 747 .LVL93: + 748 0224 9BB2 uxth r3, r3 + 749 0226 1380 strh r3, [r2] + 750 .LBE24: + 751 .LBB25: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 752 .loc 1 325 0 + 753 0228 0B78 ldrb r3, [r1] + 754 022a 9B00 lsls r3, r3, #2 + 755 022c C018 adds r0, r0, r3 + 756 .LVL94: + 757 022e 0388 ldrh r3, [r0] + 758 0230 2B4A ldr r2, .L39+16 + 759 0232 1340 ands r3, r2 + 760 .LVL95: + 761 0234 2B43 orrs r3, r5 + 762 .LVL96: + 763 0236 9BB2 uxth r3, r3 + 764 0238 0380 strh r3, [r0] + 765 .LBE25: + 766 023a 88E7 b .L23 + 767 .LVL97: + 768 .L30: + 769 .LBB26: + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 770 .loc 1 330 0 + 771 023c 0B78 ldrb r3, [r1] + 772 023e 9B00 lsls r3, r3, #2 + 773 0240 C318 adds r3, r0, r3 + 774 0242 1A88 ldrh r2, [r3] + 775 .LVL98: + 776 0244 5204 lsls r2, r2, #17 + 777 0246 06D5 bpl .L33 + 778 .LVL99: + 779 .LBB27: + ARM GAS /tmp/ccalJhl3.s page 21 + + + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 780 .loc 1 330 0 is_stmt 0 discriminator 1 + 781 0248 1A88 ldrh r2, [r3] + 782 024a 234D ldr r5, .L39+8 + 783 024c 1540 ands r5, r2 + 784 .LVL100: + 785 024e 294A ldr r2, .L39+36 + 786 0250 2A43 orrs r2, r5 + 787 0252 92B2 uxth r2, r2 + 788 0254 1A80 strh r2, [r3] + 789 .LVL101: + 790 .L33: + 791 .LBE27: + 792 .LBE26: + 793 .LBB28: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_RX_DTOG(USBx, ep->num); + 794 .loc 1 331 0 is_stmt 1 + 795 0256 0B78 ldrb r3, [r1] + 796 0258 9B00 lsls r3, r3, #2 + 797 025a C318 adds r3, r0, r3 + 798 025c 1A88 ldrh r2, [r3] + 799 .LVL102: + 800 025e 5206 lsls r2, r2, #25 + 801 0260 06D5 bpl .L34 + 802 .LVL103: + 803 .LBB29: + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_RX_DTOG(USBx, ep->num); + 804 .loc 1 331 0 is_stmt 0 discriminator 1 + 805 0262 1A88 ldrh r2, [r3] + 806 0264 1C4D ldr r5, .L39+8 + 807 0266 1540 ands r5, r2 + 808 .LVL104: + 809 0268 1C4A ldr r2, .L39+12 + 810 026a 2A43 orrs r2, r5 + 811 026c 92B2 uxth r2, r2 + 812 026e 1A80 strh r2, [r3] + 813 .LVL105: + 814 .L34: + 815 .LBE29: + 816 .LBE28: + 817 .LBB30: + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 818 .loc 1 332 0 is_stmt 1 + 819 0270 0B78 ldrb r3, [r1] + 820 0272 9B00 lsls r3, r3, #2 + 821 0274 C318 adds r3, r0, r3 + 822 0276 1A88 ldrh r2, [r3] + 823 0278 174D ldr r5, .L39+8 + 824 027a 1540 ands r5, r2 + 825 .LVL106: + 826 027c 1D4A ldr r2, .L39+36 + 827 027e 2A43 orrs r2, r5 + 828 0280 92B2 uxth r2, r2 + 829 0282 1A80 strh r2, [r3] + 830 .LBE30: + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 831 .loc 1 334 0 + ARM GAS /tmp/ccalJhl3.s page 22 + + + 832 0284 CB78 ldrb r3, [r1, #3] + 833 0286 012B cmp r3, #1 + 834 0288 16D0 beq .L35 + 835 .LBB31: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 836 .loc 1 337 0 + 837 028a 0B78 ldrb r3, [r1] + 838 028c 9B00 lsls r3, r3, #2 + 839 028e C318 adds r3, r0, r3 + 840 0290 1A88 ldrh r2, [r3] + 841 0292 134D ldr r5, .L39+16 + 842 .LVL107: + 843 0294 2A40 ands r2, r5 + 844 .LVL108: + 845 0296 2025 movs r5, #32 + 846 0298 5540 eors r5, r2 + 847 .LVL109: + 848 029a 0E4A ldr r2, .L39+4 + 849 029c 2A43 orrs r2, r5 + 850 029e 92B2 uxth r2, r2 + 851 02a0 1A80 strh r2, [r3] + 852 .LVL110: + 853 .L36: + 854 .LBE31: + 855 .LBB32: + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 856 .loc 1 345 0 + 857 02a2 0B78 ldrb r3, [r1] + 858 02a4 9B00 lsls r3, r3, #2 + 859 02a6 C318 adds r3, r0, r3 + 860 02a8 1A88 ldrh r2, [r3] + 861 02aa 1349 ldr r1, .L39+40 + 862 .LVL111: + 863 02ac 1140 ands r1, r2 + 864 .LVL112: + 865 02ae 094A ldr r2, .L39+4 + 866 02b0 0A43 orrs r2, r1 + 867 02b2 92B2 uxth r2, r2 + 868 02b4 1A80 strh r2, [r3] + 869 02b6 4AE7 b .L23 + 870 .LVL113: + 871 .L35: + 872 .LBE32: + 873 .LBB33: + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 874 .loc 1 342 0 + 875 02b8 0B78 ldrb r3, [r1] + 876 02ba 9B00 lsls r3, r3, #2 + 877 02bc C318 adds r3, r0, r3 + 878 02be 1A88 ldrh r2, [r3] + 879 02c0 074D ldr r5, .L39+16 + 880 .LVL114: + 881 02c2 1540 ands r5, r2 + 882 .LVL115: + 883 02c4 034A ldr r2, .L39+4 + 884 02c6 2A43 orrs r2, r5 + 885 02c8 92B2 uxth r2, r2 + ARM GAS /tmp/ccalJhl3.s page 23 + + + 886 02ca 1A80 strh r2, [r3] + 887 02cc E9E7 b .L36 + 888 .L40: + 889 02ce C046 .align 2 + 890 .L39: + 891 02d0 8F89FFFF .word -30321 + 892 02d4 8080FFFF .word -32640 + 893 02d8 8F8FFFFF .word -28785 + 894 02dc C080FFFF .word -32576 + 895 02e0 BF8FFFFF .word -28737 + 896 02e4 04040000 .word 1028 + 897 02e8 06040000 .word 1030 + 898 02ec FF83FFFF .word -31745 + 899 02f0 0080FFFF .word -32768 + 900 02f4 80C0FFFF .word -16256 + 901 02f8 8FBFFFFF .word -16497 + 902 02fc 8081FFFF .word -32384 + 903 .LBE33: + 904 .cfi_endproc + 905 .LFE48: + 907 .section .text.USB_DeactivateEndpoint,"ax",%progbits + 908 .align 1 + 909 .global USB_DeactivateEndpoint + 910 .syntax unified + 911 .code 16 + 912 .thumb_func + 913 .fpu softvfp + 915 USB_DeactivateEndpoint: + 916 .LFB49: + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief De-activate and de-initialize an endpoint + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param ep: pointer to endpoint structure + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep) + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 917 .loc 1 359 0 + 918 .cfi_startproc + 919 @ args = 0, pretend = 0, frame = 0 + 920 @ frame_needed = 0, uses_anonymous_args = 0 + 921 .LVL116: + 922 0000 10B5 push {r4, lr} + 923 .LCFI4: + 924 .cfi_def_cfa_offset 8 + 925 .cfi_offset 4, -8 + 926 .cfi_offset 14, -4 + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->doublebuffer == 0U) + 927 .loc 1 360 0 + 928 0002 0B7B ldrb r3, [r1, #12] + 929 0004 002B cmp r3, #0 + 930 0006 33D1 bne .L42 + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->is_in != 0U) + 931 .loc 1 362 0 + 932 0008 4B78 ldrb r3, [r1, #1] + ARM GAS /tmp/ccalJhl3.s page 24 + + + 933 000a 002B cmp r3, #0 + 934 000c 18D0 beq .L43 + 935 .LBB34: + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 936 .loc 1 364 0 + 937 000e 0B78 ldrb r3, [r1] + 938 0010 9B00 lsls r3, r3, #2 + 939 0012 C318 adds r3, r0, r3 + 940 0014 1A88 ldrh r2, [r3] + 941 .LVL117: + 942 0016 5206 lsls r2, r2, #25 + 943 0018 06D5 bpl .L44 + 944 .LVL118: + 945 .LBB35: + 946 .loc 1 364 0 is_stmt 0 discriminator 1 + 947 001a 1A88 ldrh r2, [r3] + 948 001c 4E4C ldr r4, .L52 + 949 001e 1440 ands r4, r2 + 950 .LVL119: + 951 0020 4E4A ldr r2, .L52+4 + 952 0022 2243 orrs r2, r4 + 953 0024 92B2 uxth r2, r2 + 954 0026 1A80 strh r2, [r3] + 955 .LVL120: + 956 .L44: + 957 .LBE35: + 958 .LBE34: + 959 .LBB36: + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure DISABLE status for the Endpoint*/ + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); + 960 .loc 1 366 0 is_stmt 1 + 961 0028 0B78 ldrb r3, [r1] + 962 002a 9B00 lsls r3, r3, #2 + 963 002c C018 adds r0, r0, r3 + 964 .LVL121: + 965 002e 0388 ldrh r3, [r0] + 966 0030 4B4A ldr r2, .L52+8 + 967 0032 1A40 ands r2, r3 + 968 .LVL122: + 969 0034 4B4B ldr r3, .L52+12 + 970 0036 1343 orrs r3, r2 + 971 0038 9BB2 uxth r3, r3 + 972 003a 0380 strh r3, [r0] + 973 .LVL123: + 974 .L45: + 975 .LBE36: + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure DISABLE status for the Endpoint*/ + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Double Buffer*/ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + ARM GAS /tmp/ccalJhl3.s page 25 + + + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->is_in == 0U) + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Clear the data toggle bits for the endpoint IN/OUT*/ + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Reset value of the data toggle bits for the endpoint out*/ + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_TX_DTOG(USBx, ep->num); + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Clear the data toggle bits for the endpoint IN/OUT*/ + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_RX_DTOG(USBx, ep->num); + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure DISABLE status for the Endpoint*/ + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 976 .loc 1 403 0 + 977 003c 0020 movs r0, #0 + 978 @ sp needed + 979 003e 10BD pop {r4, pc} + 980 .LVL124: + 981 .L43: + 982 .LBB37: + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure DISABLE status for the Endpoint*/ + 983 .loc 1 370 0 + 984 0040 0B78 ldrb r3, [r1] + 985 0042 9B00 lsls r3, r3, #2 + 986 0044 C318 adds r3, r0, r3 + 987 0046 1A88 ldrh r2, [r3] + 988 .LVL125: + 989 0048 5204 lsls r2, r2, #17 + 990 004a 06D5 bpl .L46 + 991 .LVL126: + 992 .LBB38: + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure DISABLE status for the Endpoint*/ + 993 .loc 1 370 0 is_stmt 0 discriminator 1 + 994 004c 1A88 ldrh r2, [r3] + 995 004e 424C ldr r4, .L52 + 996 0050 1440 ands r4, r2 + 997 .LVL127: + 998 0052 454A ldr r2, .L52+16 + 999 0054 2243 orrs r2, r4 + 1000 0056 92B2 uxth r2, r2 + 1001 0058 1A80 strh r2, [r3] + 1002 .LVL128: + 1003 .L46: + ARM GAS /tmp/ccalJhl3.s page 26 + + + 1004 .LBE38: + 1005 .LBE37: + 1006 .LBB39: + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1007 .loc 1 372 0 is_stmt 1 + 1008 005a 0B78 ldrb r3, [r1] + 1009 005c 9B00 lsls r3, r3, #2 + 1010 005e C018 adds r0, r0, r3 + 1011 .LVL129: + 1012 0060 0388 ldrh r3, [r0] + 1013 0062 424A ldr r2, .L52+20 + 1014 0064 1A40 ands r2, r3 + 1015 .LVL130: + 1016 0066 3F4B ldr r3, .L52+12 + 1017 0068 1343 orrs r3, r2 + 1018 006a 9BB2 uxth r3, r3 + 1019 006c 0380 strh r3, [r0] + 1020 006e E5E7 b .L45 + 1021 .LVL131: + 1022 .L42: + 1023 .LBE39: + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1024 .loc 1 378 0 + 1025 0070 4B78 ldrb r3, [r1, #1] + 1026 0072 002B cmp r3, #0 + 1027 0074 37D1 bne .L47 + 1028 .LBB40: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 1029 .loc 1 381 0 + 1030 0076 0B78 ldrb r3, [r1] + 1031 0078 9B00 lsls r3, r3, #2 + 1032 007a C318 adds r3, r0, r3 + 1033 007c 1A88 ldrh r2, [r3] + 1034 .LVL132: + 1035 007e 5204 lsls r2, r2, #17 + 1036 0080 06D5 bpl .L48 + 1037 .LVL133: + 1038 .LBB41: + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 1039 .loc 1 381 0 is_stmt 0 discriminator 1 + 1040 0082 1A88 ldrh r2, [r3] + 1041 0084 344C ldr r4, .L52 + 1042 0086 1440 ands r4, r2 + 1043 .LVL134: + 1044 0088 374A ldr r2, .L52+16 + 1045 008a 2243 orrs r2, r4 + 1046 008c 92B2 uxth r2, r2 + 1047 008e 1A80 strh r2, [r3] + 1048 .LVL135: + 1049 .L48: + 1050 .LBE41: + 1051 .LBE40: + 1052 .LBB42: + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 1053 .loc 1 382 0 is_stmt 1 + 1054 0090 0B78 ldrb r3, [r1] + 1055 0092 9B00 lsls r3, r3, #2 + ARM GAS /tmp/ccalJhl3.s page 27 + + + 1056 0094 C318 adds r3, r0, r3 + 1057 0096 1A88 ldrh r2, [r3] + 1058 .LVL136: + 1059 0098 5206 lsls r2, r2, #25 + 1060 009a 06D5 bpl .L49 + 1061 .LVL137: + 1062 .LBB43: + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 1063 .loc 1 382 0 is_stmt 0 discriminator 1 + 1064 009c 1A88 ldrh r2, [r3] + 1065 009e 2E4C ldr r4, .L52 + 1066 00a0 1440 ands r4, r2 + 1067 .LVL138: + 1068 00a2 2E4A ldr r2, .L52+4 + 1069 00a4 2243 orrs r2, r4 + 1070 00a6 92B2 uxth r2, r2 + 1071 00a8 1A80 strh r2, [r3] + 1072 .LVL139: + 1073 .L49: + 1074 .LBE43: + 1075 .LBE42: + 1076 .LBB44: + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 1077 .loc 1 385 0 is_stmt 1 + 1078 00aa 0B78 ldrb r3, [r1] + 1079 00ac 9B00 lsls r3, r3, #2 + 1080 00ae C318 adds r3, r0, r3 + 1081 00b0 1A88 ldrh r2, [r3] + 1082 00b2 294C ldr r4, .L52 + 1083 00b4 1440 ands r4, r2 + 1084 .LVL140: + 1085 00b6 294A ldr r2, .L52+4 + 1086 00b8 2243 orrs r2, r4 + 1087 00ba 92B2 uxth r2, r2 + 1088 00bc 1A80 strh r2, [r3] + 1089 .LBE44: + 1090 .LBB45: + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS); + 1091 .loc 1 387 0 + 1092 00be 0C78 ldrb r4, [r1] + 1093 .LVL141: + 1094 00c0 A400 lsls r4, r4, #2 + 1095 00c2 0419 adds r4, r0, r4 + 1096 00c4 2388 ldrh r3, [r4] + 1097 00c6 294A ldr r2, .L52+20 + 1098 00c8 1340 ands r3, r2 + 1099 .LVL142: + 1100 00ca 264A ldr r2, .L52+12 + 1101 00cc 1343 orrs r3, r2 + 1102 .LVL143: + 1103 00ce 9BB2 uxth r3, r3 + 1104 00d0 2380 strh r3, [r4] + 1105 .LBE45: + 1106 .LBB46: + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1107 .loc 1 388 0 + 1108 00d2 0B78 ldrb r3, [r1] + ARM GAS /tmp/ccalJhl3.s page 28 + + + 1109 00d4 9B00 lsls r3, r3, #2 + 1110 00d6 C018 adds r0, r0, r3 + 1111 .LVL144: + 1112 00d8 0388 ldrh r3, [r0] + 1113 00da 2149 ldr r1, .L52+8 + 1114 .LVL145: + 1115 00dc 0B40 ands r3, r1 + 1116 .LVL146: + 1117 00de 1A43 orrs r2, r3 + 1118 00e0 92B2 uxth r2, r2 + 1119 00e2 0280 strh r2, [r0] + 1120 .LBE46: + 1121 00e4 AAE7 b .L45 + 1122 .LVL147: + 1123 .L47: + 1124 .LBB47: + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 1125 .loc 1 393 0 + 1126 00e6 0B78 ldrb r3, [r1] + 1127 00e8 9B00 lsls r3, r3, #2 + 1128 00ea C318 adds r3, r0, r3 + 1129 00ec 1A88 ldrh r2, [r3] + 1130 .LVL148: + 1131 00ee 5204 lsls r2, r2, #17 + 1132 00f0 06D5 bpl .L50 + 1133 .LVL149: + 1134 .LBB48: + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 1135 .loc 1 393 0 is_stmt 0 discriminator 1 + 1136 00f2 1A88 ldrh r2, [r3] + 1137 00f4 184C ldr r4, .L52 + 1138 00f6 1440 ands r4, r2 + 1139 .LVL150: + 1140 00f8 1B4A ldr r2, .L52+16 + 1141 00fa 2243 orrs r2, r4 + 1142 00fc 92B2 uxth r2, r2 + 1143 00fe 1A80 strh r2, [r3] + 1144 .LVL151: + 1145 .L50: + 1146 .LBE48: + 1147 .LBE47: + 1148 .LBB49: + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_RX_DTOG(USBx, ep->num); + 1149 .loc 1 394 0 is_stmt 1 + 1150 0100 0B78 ldrb r3, [r1] + 1151 0102 9B00 lsls r3, r3, #2 + 1152 0104 C318 adds r3, r0, r3 + 1153 0106 1A88 ldrh r2, [r3] + 1154 .LVL152: + 1155 0108 5206 lsls r2, r2, #25 + 1156 010a 06D5 bpl .L51 + 1157 .LVL153: + 1158 .LBB50: + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_RX_DTOG(USBx, ep->num); + 1159 .loc 1 394 0 is_stmt 0 discriminator 1 + 1160 010c 1A88 ldrh r2, [r3] + 1161 010e 124C ldr r4, .L52 + ARM GAS /tmp/ccalJhl3.s page 29 + + + 1162 0110 1440 ands r4, r2 + 1163 .LVL154: + 1164 0112 124A ldr r2, .L52+4 + 1165 0114 2243 orrs r2, r4 + 1166 0116 92B2 uxth r2, r2 + 1167 0118 1A80 strh r2, [r3] + 1168 .LVL155: + 1169 .L51: + 1170 .LBE50: + 1171 .LBE49: + 1172 .LBB51: + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure DISABLE status for the Endpoint*/ + 1173 .loc 1 395 0 is_stmt 1 + 1174 011a 0B78 ldrb r3, [r1] + 1175 011c 9B00 lsls r3, r3, #2 + 1176 011e C318 adds r3, r0, r3 + 1177 0120 1A88 ldrh r2, [r3] + 1178 0122 0D4C ldr r4, .L52 + 1179 0124 1440 ands r4, r2 + 1180 .LVL156: + 1181 0126 104A ldr r2, .L52+16 + 1182 0128 2243 orrs r2, r4 + 1183 012a 92B2 uxth r2, r2 + 1184 012c 1A80 strh r2, [r3] + 1185 .LBE51: + 1186 .LBB52: + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS); + 1187 .loc 1 397 0 + 1188 012e 0C78 ldrb r4, [r1] + 1189 .LVL157: + 1190 0130 A400 lsls r4, r4, #2 + 1191 0132 0419 adds r4, r0, r4 + 1192 0134 2388 ldrh r3, [r4] + 1193 0136 0A4A ldr r2, .L52+8 + 1194 0138 1340 ands r3, r2 + 1195 .LVL158: + 1196 013a 0A4A ldr r2, .L52+12 + 1197 013c 1343 orrs r3, r2 + 1198 .LVL159: + 1199 013e 9BB2 uxth r3, r3 + 1200 0140 2380 strh r3, [r4] + 1201 .LBE52: + 1202 .LBB53: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1203 .loc 1 398 0 + 1204 0142 0B78 ldrb r3, [r1] + 1205 0144 9B00 lsls r3, r3, #2 + 1206 0146 C018 adds r0, r0, r3 + 1207 .LVL160: + 1208 0148 0388 ldrh r3, [r0] + 1209 014a 0849 ldr r1, .L52+20 + 1210 .LVL161: + 1211 014c 0B40 ands r3, r1 + 1212 .LVL162: + 1213 014e 1A43 orrs r2, r3 + 1214 0150 92B2 uxth r2, r2 + 1215 0152 0280 strh r2, [r0] + ARM GAS /tmp/ccalJhl3.s page 30 + + + 1216 0154 72E7 b .L45 + 1217 .L53: + 1218 0156 C046 .align 2 + 1219 .L52: + 1220 0158 8F8FFFFF .word -28785 + 1221 015c C080FFFF .word -32576 + 1222 0160 BF8FFFFF .word -28737 + 1223 0164 8080FFFF .word -32640 + 1224 0168 80C0FFFF .word -16256 + 1225 016c 8FBFFFFF .word -16497 + 1226 .LBE53: + 1227 .cfi_endproc + 1228 .LFE49: + 1230 .section .text.USB_WritePacket,"ax",%progbits + 1231 .align 1 + 1232 .global USB_WritePacket + 1233 .syntax unified + 1234 .code 16 + 1235 .thumb_func + 1236 .fpu softvfp + 1238 USB_WritePacket: + 1239 .LFB51: + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_EPStartXfer : setup and starts a transfer over an EP + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param ep: pointer to endpoint structure + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep) + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint16_t pmabuffer; + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t len; + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* IN endpoint */ + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->is_in == 1U) + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Multi packet transfer*/ + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->xfer_len > ep->maxpacket) + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** len = ep->maxpacket; + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ep->xfer_len -= len; + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** len = ep->xfer_len; + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ep->xfer_len = 0U; + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* configure and validate Tx endpoint */ + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->doublebuffer == 0U) + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len); + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_CNT(USBx, ep->num, len); + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + ARM GAS /tmp/ccalJhl3.s page 31 + + + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Write the data to the USB endpoint */ + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U) + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Set the Double buffer counter for pmabuffer1 */ + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len); + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Set the Double buffer counter for pmabuffer0 */ + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len); + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len); + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_FreeUserBuffer(USBx, ep->num, ep->is_in); + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID); + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else /* OUT endpoint */ + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Multi packet transfer*/ + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->xfer_len > ep->maxpacket) + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** len = ep->maxpacket; + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ep->xfer_len -= len; + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** len = ep->xfer_len; + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ep->xfer_len = 0U; + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* configure and validate Rx endpoint */ + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->doublebuffer == 0U) + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Set RX buffer count*/ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_CNT(USBx, ep->num, len); + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /*Set the Double buffer counter*/ + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len); + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_WritePacket : Writes a packet into the Tx FIFO associated + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * with the EP/channel + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param src : pointer to source buffer + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param ch_ep_num : endpoint or host channel number + ARM GAS /tmp/ccalJhl3.s page 32 + + + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param len : Number of bytes to write + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_WritePacket(USB_TypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len) + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1240 .loc 1 500 0 + 1241 .cfi_startproc + 1242 @ args = 0, pretend = 0, frame = 0 + 1243 @ frame_needed = 0, uses_anonymous_args = 0 + 1244 @ link register save eliminated. + 1245 .LVL163: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(src); + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(ch_ep_num); + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(len); + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1246 .loc 1 511 0 + 1247 0000 0020 movs r0, #0 + 1248 .LVL164: + 1249 @ sp needed + 1250 0002 7047 bx lr + 1251 .cfi_endproc + 1252 .LFE51: + 1254 .section .text.USB_ReadPacket,"ax",%progbits + 1255 .align 1 + 1256 .global USB_ReadPacket + 1257 .syntax unified + 1258 .code 16 + 1259 .thumb_func + 1260 .fpu softvfp + 1262 USB_ReadPacket: + 1263 .LFB52: + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_ReadPacket : read a packet from the Tx FIFO associated + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * with the EP/channel + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param dest : destination pointer + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param len : Number of bytes to read + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval pointer to destination buffer + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** void *USB_ReadPacket(USB_TypeDef *USBx, uint8_t *dest, uint16_t len) + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1264 .loc 1 522 0 + 1265 .cfi_startproc + 1266 @ args = 0, pretend = 0, frame = 0 + 1267 @ frame_needed = 0, uses_anonymous_args = 0 + 1268 @ link register save eliminated. + 1269 .LVL165: + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + ARM GAS /tmp/ccalJhl3.s page 33 + + + 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(dest); + 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(len); + 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return ((void *)NULL); + 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1270 .loc 1 532 0 + 1271 0000 0020 movs r0, #0 + 1272 .LVL166: + 1273 @ sp needed + 1274 0002 7047 bx lr + 1275 .cfi_endproc + 1276 .LFE52: + 1278 .section .text.USB_EPSetStall,"ax",%progbits + 1279 .align 1 + 1280 .global USB_EPSetStall + 1281 .syntax unified + 1282 .code 16 + 1283 .thumb_func + 1284 .fpu softvfp + 1286 USB_EPSetStall: + 1287 .LFB53: + 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_EPSetStall : set a stall condition over an EP + 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param ep: pointer to endpoint structure + 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) + 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1288 .loc 1 541 0 + 1289 .cfi_startproc + 1290 @ args = 0, pretend = 0, frame = 0 + 1291 @ frame_needed = 0, uses_anonymous_args = 0 + 1292 @ link register save eliminated. + 1293 .LVL167: + 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->is_in != 0U) + 1294 .loc 1 542 0 + 1295 0000 4B78 ldrb r3, [r1, #1] + 1296 0002 002B cmp r3, #0 + 1297 0004 0ED1 bne .L59 + 1298 .LBB54: + 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL); + 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL); + 1299 .loc 1 548 0 + 1300 0006 0B78 ldrb r3, [r1] + 1301 0008 9B00 lsls r3, r3, #2 + 1302 000a C018 adds r0, r0, r3 + 1303 .LVL168: + 1304 000c 0288 ldrh r2, [r0] + ARM GAS /tmp/ccalJhl3.s page 34 + + + 1305 000e 0C4B ldr r3, .L60 + 1306 0010 1A40 ands r2, r3 + 1307 .LVL169: + 1308 0012 8023 movs r3, #128 + 1309 0014 5B01 lsls r3, r3, #5 + 1310 0016 5A40 eors r2, r3 + 1311 .LVL170: + 1312 0018 0A4B ldr r3, .L60+4 + 1313 001a 1343 orrs r3, r2 + 1314 001c 9BB2 uxth r3, r3 + 1315 001e 0380 strh r3, [r0] + 1316 .LVL171: + 1317 .L58: + 1318 .LBE54: + 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1319 .loc 1 552 0 + 1320 0020 0020 movs r0, #0 + 1321 @ sp needed + 1322 0022 7047 bx lr + 1323 .LVL172: + 1324 .L59: + 1325 .LBB55: + 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1326 .loc 1 544 0 + 1327 0024 0B78 ldrb r3, [r1] + 1328 0026 9B00 lsls r3, r3, #2 + 1329 0028 C018 adds r0, r0, r3 + 1330 .LVL173: + 1331 002a 0388 ldrh r3, [r0] + 1332 002c 064A ldr r2, .L60+8 + 1333 002e 1340 ands r3, r2 + 1334 .LVL174: + 1335 0030 1022 movs r2, #16 + 1336 0032 5A40 eors r2, r3 + 1337 .LVL175: + 1338 0034 034B ldr r3, .L60+4 + 1339 0036 1343 orrs r3, r2 + 1340 0038 9BB2 uxth r3, r3 + 1341 003a 0380 strh r3, [r0] + 1342 .LBE55: + 1343 003c F0E7 b .L58 + 1344 .L61: + 1345 003e C046 .align 2 + 1346 .L60: + 1347 0040 8FBFFFFF .word -16497 + 1348 0044 8080FFFF .word -32640 + 1349 0048 BF8FFFFF .word -28737 + 1350 .cfi_endproc + 1351 .LFE53: + 1353 .section .text.USB_EPClearStall,"ax",%progbits + 1354 .align 1 + 1355 .global USB_EPClearStall + 1356 .syntax unified + 1357 .code 16 + ARM GAS /tmp/ccalJhl3.s page 35 + + + 1358 .thumb_func + 1359 .fpu softvfp + 1361 USB_EPClearStall: + 1362 .LFB54: + 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_EPClearStall : Clear a stall condition over an EP + 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param ep: pointer to endpoint structure + 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep) + 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1363 .loc 1 561 0 + 1364 .cfi_startproc + 1365 @ args = 0, pretend = 0, frame = 0 + 1366 @ frame_needed = 0, uses_anonymous_args = 0 + 1367 .LVL176: + 1368 0000 10B5 push {r4, lr} + 1369 .LCFI5: + 1370 .cfi_def_cfa_offset 8 + 1371 .cfi_offset 4, -8 + 1372 .cfi_offset 14, -4 + 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->doublebuffer == 0U) + 1373 .loc 1 562 0 + 1374 0002 0B7B ldrb r3, [r1, #12] + 1375 0004 002B cmp r3, #0 + 1376 0006 39D1 bne .L63 + 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->is_in != 0U) + 1377 .loc 1 564 0 + 1378 0008 4B78 ldrb r3, [r1, #1] + 1379 000a 002B cmp r3, #0 + 1380 000c 1CD0 beq .L64 + 1381 .LBB56: + 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_TX_DTOG(USBx, ep->num); + 1382 .loc 1 566 0 + 1383 000e 0B78 ldrb r3, [r1] + 1384 0010 9B00 lsls r3, r3, #2 + 1385 0012 C318 adds r3, r0, r3 + 1386 0014 1A88 ldrh r2, [r3] + 1387 .LVL177: + 1388 0016 5206 lsls r2, r2, #25 + 1389 0018 06D5 bpl .L65 + 1390 .LVL178: + 1391 .LBB57: + 1392 .loc 1 566 0 is_stmt 0 discriminator 1 + 1393 001a 1A88 ldrh r2, [r3] + 1394 001c 184C ldr r4, .L67 + 1395 001e 1440 ands r4, r2 + 1396 .LVL179: + 1397 0020 184A ldr r2, .L67+4 + 1398 0022 2243 orrs r2, r4 + 1399 0024 92B2 uxth r2, r2 + 1400 0026 1A80 strh r2, [r3] + 1401 .LVL180: + ARM GAS /tmp/ccalJhl3.s page 36 + + + 1402 .L65: + 1403 .LBE57: + 1404 .LBE56: + 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (ep->type != EP_TYPE_ISOC) + 1405 .loc 1 568 0 is_stmt 1 + 1406 0028 CB78 ldrb r3, [r1, #3] + 1407 002a 012B cmp r3, #1 + 1408 002c 26D0 beq .L63 + 1409 .LBB58: + 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure NAK status for the Endpoint */ + 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK); + 1410 .loc 1 571 0 + 1411 002e 0B78 ldrb r3, [r1] + 1412 0030 9B00 lsls r3, r3, #2 + 1413 0032 C018 adds r0, r0, r3 + 1414 .LVL181: + 1415 0034 0388 ldrh r3, [r0] + 1416 0036 144A ldr r2, .L67+8 + 1417 0038 1340 ands r3, r2 + 1418 .LVL182: + 1419 003a 2022 movs r2, #32 + 1420 003c 5A40 eors r2, r3 + 1421 .LVL183: + 1422 003e 134B ldr r3, .L67+12 + 1423 0040 1343 orrs r3, r2 + 1424 0042 9BB2 uxth r3, r3 + 1425 0044 0380 strh r3, [r0] + 1426 0046 19E0 b .L63 + 1427 .LVL184: + 1428 .L64: + 1429 .LBE58: + 1430 .LBB59: + 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** else + 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_CLEAR_RX_DTOG(USBx, ep->num); + 1431 .loc 1 576 0 + 1432 0048 0B78 ldrb r3, [r1] + 1433 004a 9B00 lsls r3, r3, #2 + 1434 004c C318 adds r3, r0, r3 + 1435 004e 1A88 ldrh r2, [r3] + 1436 .LVL185: + 1437 0050 5204 lsls r2, r2, #17 + 1438 0052 06D5 bpl .L66 + 1439 .LVL186: + 1440 .LBB60: + 1441 .loc 1 576 0 is_stmt 0 discriminator 1 + 1442 0054 1A88 ldrh r2, [r3] + 1443 0056 0A4C ldr r4, .L67 + 1444 0058 1440 ands r4, r2 + 1445 .LVL187: + 1446 005a 0D4A ldr r2, .L67+16 + 1447 005c 2243 orrs r2, r4 + 1448 005e 92B2 uxth r2, r2 + ARM GAS /tmp/ccalJhl3.s page 37 + + + 1449 0060 1A80 strh r2, [r3] + 1450 .LVL188: + 1451 .L66: + 1452 .LBE60: + 1453 .LBE59: + 1454 .LBB61: + 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Configure VALID status for the Endpoint*/ + 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID); + 1455 .loc 1 579 0 is_stmt 1 + 1456 0062 0B78 ldrb r3, [r1] + 1457 0064 9B00 lsls r3, r3, #2 + 1458 0066 C018 adds r0, r0, r3 + 1459 .LVL189: + 1460 0068 0288 ldrh r2, [r0] + 1461 006a 0A4B ldr r3, .L67+20 + 1462 006c 1A40 ands r2, r3 + 1463 .LVL190: + 1464 006e C023 movs r3, #192 + 1465 0070 9B01 lsls r3, r3, #6 + 1466 0072 5A40 eors r2, r3 + 1467 .LVL191: + 1468 0074 054B ldr r3, .L67+12 + 1469 0076 1343 orrs r3, r2 + 1470 0078 9BB2 uxth r3, r3 + 1471 007a 0380 strh r3, [r0] + 1472 .LVL192: + 1473 .L63: + 1474 .LBE61: + 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1475 .loc 1 584 0 + 1476 007c 0020 movs r0, #0 + 1477 @ sp needed + 1478 007e 10BD pop {r4, pc} + 1479 .L68: + 1480 .align 2 + 1481 .L67: + 1482 0080 8F8FFFFF .word -28785 + 1483 0084 C080FFFF .word -32576 + 1484 0088 BF8FFFFF .word -28737 + 1485 008c 8080FFFF .word -32640 + 1486 0090 80C0FFFF .word -16256 + 1487 0094 8FBFFFFF .word -16497 + 1488 .cfi_endproc + 1489 .LFE54: + 1491 .section .text.USB_StopDevice,"ax",%progbits + 1492 .align 1 + 1493 .global USB_StopDevice + 1494 .syntax unified + 1495 .code 16 + 1496 .thumb_func + 1497 .fpu softvfp + 1499 USB_StopDevice: + ARM GAS /tmp/ccalJhl3.s page 38 + + + 1500 .LFB55: + 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_StopDevice : Stop the usb device mode + 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_StopDevice(USB_TypeDef *USBx) + 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1501 .loc 1 592 0 + 1502 .cfi_startproc + 1503 @ args = 0, pretend = 0, frame = 0 + 1504 @ frame_needed = 0, uses_anonymous_args = 0 + 1505 @ link register save eliminated. + 1506 .LVL193: + 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* disable all interrupts and force USB reset */ + 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->CNTR = USB_CNTR_FRES; + 1507 .loc 1 594 0 + 1508 0000 4023 movs r3, #64 + 1509 0002 0122 movs r2, #1 + 1510 0004 C252 strh r2, [r0, r3] + 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* clear interrupt status register */ + 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->ISTR = 0; + 1511 .loc 1 597 0 + 1512 0006 4332 adds r2, r2, #67 + 1513 0008 0021 movs r1, #0 + 1514 000a 8152 strh r1, [r0, r2] + 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* switch-off device */ + 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->CNTR = (USB_CNTR_FRES | USB_CNTR_PDWN); + 1515 .loc 1 600 0 + 1516 000c 413A subs r2, r2, #65 + 1517 000e C252 strh r2, [r0, r3] + 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1518 .loc 1 603 0 + 1519 0010 0020 movs r0, #0 + 1520 .LVL194: + 1521 @ sp needed + 1522 0012 7047 bx lr + 1523 .cfi_endproc + 1524 .LFE55: + 1526 .section .text.USB_SetDevAddress,"ax",%progbits + 1527 .align 1 + 1528 .global USB_SetDevAddress + 1529 .syntax unified + 1530 .code 16 + 1531 .thumb_func + 1532 .fpu softvfp + 1534 USB_SetDevAddress: + 1535 .LFB56: + 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_SetDevAddress : Stop the usb device mode + 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + ARM GAS /tmp/ccalJhl3.s page 39 + + + 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param address : new device address to be assigned + 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * This parameter can be a value from 0 to 255 + 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address) + 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1536 .loc 1 613 0 + 1537 .cfi_startproc + 1538 @ args = 0, pretend = 0, frame = 0 + 1539 @ frame_needed = 0, uses_anonymous_args = 0 + 1540 @ link register save eliminated. + 1541 .LVL195: + 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if (address == 0U) + 1542 .loc 1 614 0 + 1543 0000 0029 cmp r1, #0 + 1544 0002 02D1 bne .L71 + 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* set device address and enable function */ + 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->DADDR = USB_DADDR_EF; + 1545 .loc 1 617 0 + 1546 0004 4C23 movs r3, #76 + 1547 0006 8022 movs r2, #128 + 1548 0008 C252 strh r2, [r0, r3] + 1549 .L71: + 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1550 .loc 1 621 0 + 1551 000a 0020 movs r0, #0 + 1552 .LVL196: + 1553 @ sp needed + 1554 000c 7047 bx lr + 1555 .cfi_endproc + 1556 .LFE56: + 1558 .section .text.USB_DevConnect,"ax",%progbits + 1559 .align 1 + 1560 .global USB_DevConnect + 1561 .syntax unified + 1562 .code 16 + 1563 .thumb_func + 1564 .fpu softvfp + 1566 USB_DevConnect: + 1567 .LFB57: + 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down + 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx) + 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1568 .loc 1 629 0 + 1569 .cfi_startproc + 1570 @ args = 0, pretend = 0, frame = 0 + 1571 @ frame_needed = 0, uses_anonymous_args = 0 + 1572 @ link register save eliminated. + ARM GAS /tmp/ccalJhl3.s page 40 + + + 1573 .LVL197: + 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Enabling DP Pull-UP bit to Connect internal PU resistor on USB DP line */ + 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->BCDR |= USB_BCDR_DPPU; + 1574 .loc 1 631 0 + 1575 0000 5822 movs r2, #88 + 1576 0002 835A ldrh r3, [r0, r2] + 1577 0004 0249 ldr r1, .L73 + 1578 0006 0B43 orrs r3, r1 + 1579 0008 9BB2 uxth r3, r3 + 1580 000a 8352 strh r3, [r0, r2] + 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1581 .loc 1 634 0 + 1582 000c 0020 movs r0, #0 + 1583 .LVL198: + 1584 @ sp needed + 1585 000e 7047 bx lr + 1586 .L74: + 1587 .align 2 + 1588 .L73: + 1589 0010 0080FFFF .word -32768 + 1590 .cfi_endproc + 1591 .LFE57: + 1593 .section .text.USB_DevDisconnect,"ax",%progbits + 1594 .align 1 + 1595 .global USB_DevDisconnect + 1596 .syntax unified + 1597 .code 16 + 1598 .thumb_func + 1599 .fpu softvfp + 1601 USB_DevDisconnect: + 1602 .LFB58: + 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down + 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx) + 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1603 .loc 1 642 0 + 1604 .cfi_startproc + 1605 @ args = 0, pretend = 0, frame = 0 + 1606 @ frame_needed = 0, uses_anonymous_args = 0 + 1607 @ link register save eliminated. + 1608 .LVL199: + 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Disable DP Pull-Up bit to disconnect the Internal PU resistor on USB DP line */ + 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->BCDR &= (uint16_t)(~(USB_BCDR_DPPU)); + 1609 .loc 1 644 0 + 1610 0000 5822 movs r2, #88 + 1611 0002 835A ldrh r3, [r0, r2] + 1612 0004 5B04 lsls r3, r3, #17 + 1613 0006 5B0C lsrs r3, r3, #17 + 1614 0008 8352 strh r3, [r0, r2] + 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + ARM GAS /tmp/ccalJhl3.s page 41 + + + 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1615 .loc 1 647 0 + 1616 000a 0020 movs r0, #0 + 1617 .LVL200: + 1618 @ sp needed + 1619 000c 7047 bx lr + 1620 .cfi_endproc + 1621 .LFE58: + 1623 .section .text.USB_ReadInterrupts,"ax",%progbits + 1624 .align 1 + 1625 .global USB_ReadInterrupts + 1626 .syntax unified + 1627 .code 16 + 1628 .thumb_func + 1629 .fpu softvfp + 1631 USB_ReadInterrupts: + 1632 .LFB59: + 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_ReadInterrupts: return the global USB interrupt status + 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t USB_ReadInterrupts(USB_TypeDef *USBx) + 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1633 .loc 1 655 0 + 1634 .cfi_startproc + 1635 @ args = 0, pretend = 0, frame = 0 + 1636 @ frame_needed = 0, uses_anonymous_args = 0 + 1637 @ link register save eliminated. + 1638 .LVL201: + 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t tmpreg; + 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** tmpreg = USBx->ISTR; + 1639 .loc 1 658 0 + 1640 0000 4423 movs r3, #68 + 1641 0002 C05A ldrh r0, [r0, r3] + 1642 .LVL202: + 1643 0004 80B2 uxth r0, r0 + 1644 .LVL203: + 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return tmpreg; + 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1645 .loc 1 660 0 + 1646 @ sp needed + 1647 0006 7047 bx lr + 1648 .cfi_endproc + 1649 .LFE59: + 1651 .section .text.USB_ReadDevAllOutEpInterrupt,"ax",%progbits + 1652 .align 1 + 1653 .global USB_ReadDevAllOutEpInterrupt + 1654 .syntax unified + 1655 .code 16 + 1656 .thumb_func + 1657 .fpu softvfp + 1659 USB_ReadDevAllOutEpInterrupt: + 1660 .LFB60: + 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + ARM GAS /tmp/ccalJhl3.s page 42 + + + 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status + 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t USB_ReadDevAllOutEpInterrupt(USB_TypeDef *USBx) + 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1661 .loc 1 668 0 + 1662 .cfi_startproc + 1663 @ args = 0, pretend = 0, frame = 0 + 1664 @ frame_needed = 0, uses_anonymous_args = 0 + 1665 @ link register save eliminated. + 1666 .LVL204: + 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return (0); + 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1667 .loc 1 676 0 + 1668 0000 0020 movs r0, #0 + 1669 .LVL205: + 1670 @ sp needed + 1671 0002 7047 bx lr + 1672 .cfi_endproc + 1673 .LFE60: + 1675 .section .text.USB_ReadDevAllInEpInterrupt,"ax",%progbits + 1676 .align 1 + 1677 .global USB_ReadDevAllInEpInterrupt + 1678 .syntax unified + 1679 .code 16 + 1680 .thumb_func + 1681 .fpu softvfp + 1683 USB_ReadDevAllInEpInterrupt: + 1684 .LFB61: + 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status + 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t USB_ReadDevAllInEpInterrupt(USB_TypeDef *USBx) + 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1685 .loc 1 684 0 + 1686 .cfi_startproc + 1687 @ args = 0, pretend = 0, frame = 0 + 1688 @ frame_needed = 0, uses_anonymous_args = 0 + 1689 @ link register save eliminated. + 1690 .LVL206: + 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + ARM GAS /tmp/ccalJhl3.s page 43 + + + 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return (0); + 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1691 .loc 1 692 0 + 1692 0000 0020 movs r0, #0 + 1693 .LVL207: + 1694 @ sp needed + 1695 0002 7047 bx lr + 1696 .cfi_endproc + 1697 .LFE61: + 1699 .section .text.USB_ReadDevOutEPInterrupt,"ax",%progbits + 1700 .align 1 + 1701 .global USB_ReadDevOutEPInterrupt + 1702 .syntax unified + 1703 .code 16 + 1704 .thumb_func + 1705 .fpu softvfp + 1707 USB_ReadDevOutEPInterrupt: + 1708 .LFB62: + 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief Returns Device OUT EP Interrupt register + 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param epnum : endpoint number + 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * This parameter can be a value from 0 to 15 + 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval Device OUT EP Interrupt register + 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t USB_ReadDevOutEPInterrupt(USB_TypeDef *USBx, uint8_t epnum) + 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1709 .loc 1 702 0 + 1710 .cfi_startproc + 1711 @ args = 0, pretend = 0, frame = 0 + 1712 @ frame_needed = 0, uses_anonymous_args = 0 + 1713 @ link register save eliminated. + 1714 .LVL208: + 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(epnum); + 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return (0); + 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1715 .loc 1 711 0 + 1716 0000 0020 movs r0, #0 + 1717 .LVL209: + 1718 @ sp needed + 1719 0002 7047 bx lr + 1720 .cfi_endproc + 1721 .LFE62: + 1723 .section .text.USB_ReadDevInEPInterrupt,"ax",%progbits + 1724 .align 1 + 1725 .global USB_ReadDevInEPInterrupt + 1726 .syntax unified + 1727 .code 16 + 1728 .thumb_func + 1729 .fpu softvfp + ARM GAS /tmp/ccalJhl3.s page 44 + + + 1731 USB_ReadDevInEPInterrupt: + 1732 .LFB63: + 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief Returns Device IN EP Interrupt register + 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx : Selected device + 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param epnum : endpoint number + 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * This parameter can be a value from 0 to 15 + 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval Device IN EP Interrupt register + 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t USB_ReadDevInEPInterrupt(USB_TypeDef *USBx, uint8_t epnum) + 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1733 .loc 1 721 0 + 1734 .cfi_startproc + 1735 @ args = 0, pretend = 0, frame = 0 + 1736 @ frame_needed = 0, uses_anonymous_args = 0 + 1737 @ link register save eliminated. + 1738 .LVL210: + 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(epnum); + 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return (0); + 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1739 .loc 1 730 0 + 1740 0000 0020 movs r0, #0 + 1741 .LVL211: + 1742 @ sp needed + 1743 0002 7047 bx lr + 1744 .cfi_endproc + 1745 .LFE63: + 1747 .section .text.USB_ClearInterrupts,"ax",%progbits + 1748 .align 1 + 1749 .global USB_ClearInterrupts + 1750 .syntax unified + 1751 .code 16 + 1752 .thumb_func + 1753 .fpu softvfp + 1755 USB_ClearInterrupts: + 1756 .LFB64: + 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_ClearInterrupts: clear a USB interrupt + 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx Selected device + 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param interrupt interrupt flag + 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval None + 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** void USB_ClearInterrupts(USB_TypeDef *USBx, uint32_t interrupt) + 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1757 .loc 1 739 0 + 1758 .cfi_startproc + 1759 @ args = 0, pretend = 0, frame = 0 + 1760 @ frame_needed = 0, uses_anonymous_args = 0 + 1761 @ link register save eliminated. + ARM GAS /tmp/ccalJhl3.s page 45 + + + 1762 .LVL212: + 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(interrupt); + 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1763 .loc 1 747 0 + 1764 @ sp needed + 1765 0000 7047 bx lr + 1766 .cfi_endproc + 1767 .LFE64: + 1769 .section .text.USB_EP0_OutStart,"ax",%progbits + 1770 .align 1 + 1771 .global USB_EP0_OutStart + 1772 .syntax unified + 1773 .code 16 + 1774 .thumb_func + 1775 .fpu softvfp + 1777 USB_EP0_OutStart: + 1778 .LFB65: + 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief Prepare the EP0 to start the first control setup + 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx Selected device + 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param psetup pointer to setup packet + 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup) + 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1779 .loc 1 756 0 + 1780 .cfi_startproc + 1781 @ args = 0, pretend = 0, frame = 0 + 1782 @ frame_needed = 0, uses_anonymous_args = 0 + 1783 @ link register save eliminated. + 1784 .LVL213: + 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* Prevent unused argument(s) compilation warning */ + 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(USBx); + 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** UNUSED(psetup); + 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /* NOTE : - This function is not required by USB Device FS peripheral, it is used + 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** only by USB OTG FS peripheral. + 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** - This function is added to ensure compatibility across platforms. + 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1785 .loc 1 765 0 + 1786 0000 0020 movs r0, #0 + 1787 .LVL214: + 1788 @ sp needed + 1789 0002 7047 bx lr + 1790 .cfi_endproc + 1791 .LFE65: + 1793 .section .text.USB_ActivateRemoteWakeup,"ax",%progbits + 1794 .align 1 + 1795 .global USB_ActivateRemoteWakeup + ARM GAS /tmp/ccalJhl3.s page 46 + + + 1796 .syntax unified + 1797 .code 16 + 1798 .thumb_func + 1799 .fpu softvfp + 1801 USB_ActivateRemoteWakeup: + 1802 .LFB66: + 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_ActivateRemoteWakeup : active remote wakeup signalling + 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx Selected device + 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_TypeDef *USBx) + 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1803 .loc 1 773 0 + 1804 .cfi_startproc + 1805 @ args = 0, pretend = 0, frame = 0 + 1806 @ frame_needed = 0, uses_anonymous_args = 0 + 1807 @ link register save eliminated. + 1808 .LVL215: + 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->CNTR |= USB_CNTR_RESUME; + 1809 .loc 1 774 0 + 1810 0000 4022 movs r2, #64 + 1811 0002 835A ldrh r3, [r0, r2] + 1812 0004 1021 movs r1, #16 + 1813 0006 0B43 orrs r3, r1 + 1814 0008 8352 strh r3, [r0, r2] + 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1815 .loc 1 777 0 + 1816 000a 0020 movs r0, #0 + 1817 .LVL216: + 1818 @ sp needed + 1819 000c 7047 bx lr + 1820 .cfi_endproc + 1821 .LFE66: + 1823 .section .text.USB_DeActivateRemoteWakeup,"ax",%progbits + 1824 .align 1 + 1825 .global USB_DeActivateRemoteWakeup + 1826 .syntax unified + 1827 .code 16 + 1828 .thumb_func + 1829 .fpu softvfp + 1831 USB_DeActivateRemoteWakeup: + 1832 .LFB67: + 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief USB_DeActivateRemoteWakeup : de-active remote wakeup signalling + 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx Selected device + 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval HAL status + 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_TypeDef *USBx) + 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1833 .loc 1 785 0 + 1834 .cfi_startproc + 1835 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccalJhl3.s page 47 + + + 1836 @ frame_needed = 0, uses_anonymous_args = 0 + 1837 @ link register save eliminated. + 1838 .LVL217: + 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** USBx->CNTR &= ~(USB_CNTR_RESUME); + 1839 .loc 1 786 0 + 1840 0000 4022 movs r2, #64 + 1841 0002 835A ldrh r3, [r0, r2] + 1842 0004 1021 movs r1, #16 + 1843 0006 8B43 bics r3, r1 + 1844 0008 8352 strh r3, [r0, r2] + 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** return HAL_OK; + 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1845 .loc 1 788 0 + 1846 000a 0020 movs r0, #0 + 1847 .LVL218: + 1848 @ sp needed + 1849 000c 7047 bx lr + 1850 .cfi_endproc + 1851 .LFE67: + 1853 .section .text.USB_WritePMA,"ax",%progbits + 1854 .align 1 + 1855 .global USB_WritePMA + 1856 .syntax unified + 1857 .code 16 + 1858 .thumb_func + 1859 .fpu softvfp + 1861 USB_WritePMA: + 1862 .LFB68: + 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief Copy a buffer from user memory area to packet memory area (PMA) + 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx USB peripheral instance register address. + 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param pbUsrBuf pointer to user memory area. + 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param wPMABufAddr address into PMA. + 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param wNBytes: no. of bytes to be copied. + 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval None + 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** void USB_WritePMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) + 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1863 .loc 1 799 0 + 1864 .cfi_startproc + 1865 @ args = 0, pretend = 0, frame = 0 + 1866 @ frame_needed = 0, uses_anonymous_args = 0 + 1867 .LVL219: + 1868 0000 10B5 push {r4, lr} + 1869 .LCFI6: + 1870 .cfi_def_cfa_offset 8 + 1871 .cfi_offset 4, -8 + 1872 .cfi_offset 14, -4 + 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t n = ((uint32_t)wNBytes + 1U) >> 1; + 1873 .loc 1 800 0 + 1874 0002 0133 adds r3, r3, #1 + 1875 .LVL220: + 1876 0004 5B08 lsrs r3, r3, #1 + 1877 .LVL221: + 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t BaseAddr = (uint32_t)USBx; + 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t i, temp1, temp2; + ARM GAS /tmp/ccalJhl3.s page 48 + + + 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** __IO uint16_t *pdwVal; + 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint8_t *pBuf = pbUsrBuf; + 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); + 1878 .loc 1 806 0 + 1879 0006 1218 adds r2, r2, r0 + 1880 .LVL222: + 1881 0008 8020 movs r0, #128 + 1882 .LVL223: + 1883 000a C000 lsls r0, r0, #3 + 1884 000c 8446 mov ip, r0 + 1885 000e 6244 add r2, r2, ip + 1886 .LVL224: + 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** for (i = n; i != 0U; i--) + 1887 .loc 1 808 0 + 1888 0010 07E0 b .L86 + 1889 .LVL225: + 1890 .L87: + 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** temp1 = *pBuf; + 1891 .loc 1 810 0 discriminator 3 + 1892 0012 0878 ldrb r0, [r1] + 1893 .LVL226: + 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pBuf++; + 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** temp2 = temp1 | ((uint16_t)((uint16_t) *pBuf << 8)); + 1894 .loc 1 812 0 discriminator 3 + 1895 0014 4C78 ldrb r4, [r1, #1] + 1896 0016 2402 lsls r4, r4, #8 + 1897 .LVL227: + 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** *pdwVal = (uint16_t)temp2; + 1898 .loc 1 813 0 discriminator 3 + 1899 0018 0443 orrs r4, r0 + 1900 .LVL228: + 1901 001a 1480 strh r4, [r2] + 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pdwVal++; + 1902 .loc 1 814 0 discriminator 3 + 1903 001c 0232 adds r2, r2, #2 + 1904 .LVL229: + 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** #if PMA_ACCESS > 1U + 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pdwVal++; + 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** #endif + 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pBuf++; + 1905 .loc 1 820 0 discriminator 3 + 1906 001e 0231 adds r1, r1, #2 + 1907 .LVL230: + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1908 .loc 1 808 0 discriminator 3 + 1909 0020 013B subs r3, r3, #1 + 1910 .LVL231: + 1911 .L86: + 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1912 .loc 1 808 0 is_stmt 0 discriminator 1 + 1913 0022 002B cmp r3, #0 + 1914 0024 F5D1 bne .L87 + ARM GAS /tmp/ccalJhl3.s page 49 + + + 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1915 .loc 1 822 0 is_stmt 1 + 1916 @ sp needed + 1917 0026 10BD pop {r4, pc} + 1918 .cfi_endproc + 1919 .LFE68: + 1921 .section .text.USB_EPStartXfer,"ax",%progbits + 1922 .align 1 + 1923 .global USB_EPStartXfer + 1924 .syntax unified + 1925 .code 16 + 1926 .thumb_func + 1927 .fpu softvfp + 1929 USB_EPStartXfer: + 1930 .LFB50: + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint16_t pmabuffer; + 1931 .loc 1 412 0 + 1932 .cfi_startproc + 1933 @ args = 0, pretend = 0, frame = 0 + 1934 @ frame_needed = 0, uses_anonymous_args = 0 + 1935 .LVL232: + 1936 0000 70B5 push {r4, r5, r6, lr} + 1937 .LCFI7: + 1938 .cfi_def_cfa_offset 16 + 1939 .cfi_offset 4, -16 + 1940 .cfi_offset 5, -12 + 1941 .cfi_offset 6, -8 + 1942 .cfi_offset 14, -4 + 1943 0002 0500 movs r5, r0 + 1944 0004 0C00 movs r4, r1 + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1945 .loc 1 417 0 + 1946 0006 4978 ldrb r1, [r1, #1] + 1947 .LVL233: + 1948 0008 0129 cmp r1, #1 + 1949 000a 2BD0 beq .L128 + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1950 .loc 1 461 0 + 1951 000c A269 ldr r2, [r4, #24] + 1952 000e 2369 ldr r3, [r4, #16] + 1953 0010 9A42 cmp r2, r3 + 1954 0012 00D8 bhi .LCB1926 + 1955 0014 D8E0 b .L110 @long jump + 1956 .LCB1926: + 1957 .LVL234: + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1958 .loc 1 464 0 + 1959 0016 D21A subs r2, r2, r3 + 1960 0018 A261 str r2, [r4, #24] + 1961 .L111: + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 1962 .loc 1 473 0 + 1963 001a 227B ldrb r2, [r4, #12] + 1964 001c 002A cmp r2, #0 + 1965 001e 00D0 beq .LCB1936 + 1966 0020 E9E0 b .L112 @long jump + ARM GAS /tmp/ccalJhl3.s page 50 + + + 1967 .LCB1936: + 1968 .LVL235: + 1969 .LBB62: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1970 .loc 1 476 0 + 1971 0022 5032 adds r2, r2, #80 + 1972 0024 A95A ldrh r1, [r5, r2] + 1973 0026 6918 adds r1, r5, r1 + 1974 .LVL236: + 1975 0028 2278 ldrb r2, [r4] + 1976 002a D200 lsls r2, r2, #3 + 1977 002c 5218 adds r2, r2, r1 + 1978 002e A049 ldr r1, .L130 + 1979 .LVL237: + 1980 0030 8C46 mov ip, r1 + 1981 0032 6244 add r2, r2, ip + 1982 .LVL238: + 1983 .LBB63: + 1984 0034 002B cmp r3, #0 + 1985 0036 00D0 beq .LCB1955 + 1986 0038 CAE0 b .L113 @long jump + 1987 .LCB1955: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 1988 .loc 1 476 0 is_stmt 0 discriminator 1 + 1989 003a 1388 ldrh r3, [r2] + 1990 .LVL239: + 1991 003c 9D49 ldr r1, .L130+4 + 1992 003e 1940 ands r1, r3 + 1993 0040 9D4B ldr r3, .L130+8 + 1994 0042 0B43 orrs r3, r1 + 1995 0044 1380 strh r3, [r2] + 1996 .LVL240: + 1997 .L114: + 1998 .LBE63: + 1999 .LBE62: + 2000 .LBB65: + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2001 .loc 1 484 0 is_stmt 1 + 2002 0046 2378 ldrb r3, [r4] + 2003 0048 9B00 lsls r3, r3, #2 + 2004 004a ED18 adds r5, r5, r3 + 2005 .LVL241: + 2006 004c 2A88 ldrh r2, [r5] + 2007 004e 9B4B ldr r3, .L130+12 + 2008 0050 1A40 ands r2, r3 + 2009 .LVL242: + 2010 0052 C023 movs r3, #192 + 2011 0054 9B01 lsls r3, r3, #6 + 2012 0056 5A40 eors r2, r3 + 2013 .LVL243: + 2014 0058 994B ldr r3, .L130+16 + 2015 005a 1343 orrs r3, r2 + 2016 005c 9BB2 uxth r3, r3 + 2017 005e 2B80 strh r3, [r5] + 2018 .LVL244: + 2019 .L109: + 2020 .LBE65: + ARM GAS /tmp/ccalJhl3.s page 51 + + + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 2021 .loc 1 488 0 + 2022 0060 0020 movs r0, #0 + 2023 @ sp needed + 2024 .LVL245: + 2025 0062 70BD pop {r4, r5, r6, pc} + 2026 .LVL246: + 2027 .L128: + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 2028 .loc 1 420 0 + 2029 0064 A269 ldr r2, [r4, #24] + 2030 0066 2369 ldr r3, [r4, #16] + 2031 0068 9A42 cmp r2, r3 + 2032 006a 1DD9 bls .L90 + 2033 .LVL247: + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2034 .loc 1 423 0 + 2035 006c D21A subs r2, r2, r3 + 2036 006e A261 str r2, [r4, #24] + 2037 .L91: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 2038 .loc 1 432 0 + 2039 0070 227B ldrb r2, [r4, #12] + 2040 0072 002A cmp r2, #0 + 2041 0074 1CD0 beq .L129 + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 2042 .loc 1 440 0 + 2043 0076 2278 ldrb r2, [r4] + 2044 0078 9000 lsls r0, r2, #2 + 2045 .LVL248: + 2046 007a 2818 adds r0, r5, r0 + 2047 007c 0088 ldrh r0, [r0] + 2048 007e 4006 lsls r0, r0, #25 + 2049 0080 64D5 bpl .L94 + 2050 .LVL249: + 2051 .LBB66: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2052 .loc 1 443 0 + 2053 0082 0029 cmp r1, #0 + 2054 0084 39D1 bne .L95 + 2055 .LVL250: + 2056 .LBB67: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2057 .loc 1 443 0 is_stmt 0 discriminator 1 + 2058 0086 5031 adds r1, r1, #80 + 2059 0088 695A ldrh r1, [r5, r1] + 2060 008a 6918 adds r1, r5, r1 + 2061 .LVL251: + 2062 008c D200 lsls r2, r2, #3 + 2063 008e 5218 adds r2, r2, r1 + 2064 0090 8749 ldr r1, .L130 + 2065 .LVL252: + 2066 0092 8C46 mov ip, r1 + 2067 0094 6244 add r2, r2, ip + 2068 .LVL253: + 2069 .LBB68: + 2070 0096 002B cmp r3, #0 + ARM GAS /tmp/ccalJhl3.s page 52 + + + 2071 0098 1CD1 bne .L96 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2072 .loc 1 443 0 discriminator 3 + 2073 009a 1188 ldrh r1, [r2] + 2074 009c 8548 ldr r0, .L130+4 + 2075 009e 0840 ands r0, r1 + 2076 00a0 8549 ldr r1, .L130+8 + 2077 00a2 0143 orrs r1, r0 + 2078 00a4 1180 strh r1, [r2] + 2079 00a6 31E0 b .L97 + 2080 .LVL254: + 2081 .L90: + 2082 .LBE68: + 2083 .LBE67: + 2084 .LBE66: + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2085 .loc 1 428 0 is_stmt 1 + 2086 00a8 0023 movs r3, #0 + 2087 00aa A361 str r3, [r4, #24] + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ep->xfer_len = 0U; + 2088 .loc 1 427 0 + 2089 00ac 1300 movs r3, r2 + 2090 00ae DFE7 b .L91 + 2091 .LVL255: + 2092 .L129: + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_SET_EP_TX_CNT(USBx, ep->num, len); + 2093 .loc 1 434 0 + 2094 00b0 9EB2 uxth r6, r3 + 2095 00b2 E288 ldrh r2, [r4, #6] + 2096 00b4 3300 movs r3, r6 + 2097 .LVL256: + 2098 00b6 6169 ldr r1, [r4, #20] + 2099 00b8 2800 movs r0, r5 + 2100 .LVL257: + 2101 00ba FFF7FEFF bl USB_WritePMA + 2102 .LVL258: + 2103 .LBB71: + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2104 .loc 1 435 0 + 2105 00be 5023 movs r3, #80 + 2106 00c0 EA5A ldrh r2, [r5, r3] + 2107 00c2 AA18 adds r2, r5, r2 + 2108 .LVL259: + 2109 00c4 2378 ldrb r3, [r4] + 2110 00c6 DB00 lsls r3, r3, #3 + 2111 00c8 9B18 adds r3, r3, r2 + 2112 00ca 7E4A ldr r2, .L130+20 + 2113 .LVL260: + 2114 00cc 9446 mov ip, r2 + 2115 00ce 6344 add r3, r3, ip + 2116 .LVL261: + 2117 00d0 1E80 strh r6, [r3] + 2118 .LBE71: + 2119 00d2 2EE0 b .L93 + 2120 .LVL262: + 2121 .L96: + 2122 .LBB72: + ARM GAS /tmp/ccalJhl3.s page 53 + + + 2123 .LBB70: + 2124 .LBB69: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2125 .loc 1 443 0 discriminator 4 + 2126 00d4 3E2B cmp r3, #62 + 2127 00d6 06D8 bhi .L98 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2128 .loc 1 443 0 is_stmt 0 discriminator 5 + 2129 00d8 5908 lsrs r1, r3, #1 + 2130 .LVL263: + 2131 00da D807 lsls r0, r3, #31 + 2132 00dc 00D5 bpl .L99 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2133 .loc 1 443 0 discriminator 7 + 2134 00de 0131 adds r1, r1, #1 + 2135 .LVL264: + 2136 .L99: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2137 .loc 1 443 0 discriminator 9 + 2138 00e0 8902 lsls r1, r1, #10 + 2139 .LVL265: + 2140 00e2 1180 strh r1, [r2] + 2141 00e4 12E0 b .L97 + 2142 .L98: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2143 .loc 1 443 0 discriminator 6 + 2144 00e6 5909 lsrs r1, r3, #5 + 2145 .LVL266: + 2146 00e8 D806 lsls r0, r3, #27 + 2147 00ea 00D1 bne .L100 + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2148 .loc 1 443 0 discriminator 10 + 2149 00ec 0139 subs r1, r1, #1 + 2150 .LVL267: + 2151 .L100: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2152 .loc 1 443 0 discriminator 12 + 2153 00ee 8902 lsls r1, r1, #10 + 2154 .LVL268: + 2155 00f0 89B2 uxth r1, r1 + 2156 00f2 7148 ldr r0, .L130+8 + 2157 00f4 0143 orrs r1, r0 + 2158 00f6 1180 strh r1, [r2] + 2159 00f8 08E0 b .L97 + 2160 .LVL269: + 2161 .L95: + 2162 .LBE69: + 2163 .LBE70: + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr1; + 2164 .loc 1 443 0 discriminator 13 + 2165 00fa 5021 movs r1, #80 + 2166 00fc 695A ldrh r1, [r5, r1] + 2167 00fe 6918 adds r1, r5, r1 + 2168 .LVL270: + 2169 0100 D200 lsls r2, r2, #3 + 2170 0102 5218 adds r2, r2, r1 + 2171 0104 6A49 ldr r1, .L130 + ARM GAS /tmp/ccalJhl3.s page 54 + + + 2172 .LVL271: + 2173 0106 8C46 mov ip, r1 + 2174 0108 6244 add r2, r2, ip + 2175 .LVL272: + 2176 010a 1380 strh r3, [r2] + 2177 .LVL273: + 2178 .L97: + 2179 .LBE72: + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2180 .loc 1 444 0 is_stmt 1 + 2181 010c 6289 ldrh r2, [r4, #10] + 2182 .LVL274: + 2183 .L101: + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** PCD_FreeUserBuffer(USBx, ep->num, ep->is_in); + 2184 .loc 1 452 0 + 2185 010e 9BB2 uxth r3, r3 + 2186 .LVL275: + 2187 0110 6169 ldr r1, [r4, #20] + 2188 0112 2800 movs r0, r5 + 2189 0114 FFF7FEFF bl USB_WritePMA + 2190 .LVL276: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2191 .loc 1 453 0 + 2192 0118 6378 ldrb r3, [r4, #1] + 2193 011a 002B cmp r3, #0 + 2194 011c 47D1 bne .L108 + 2195 .LBB73: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2196 .loc 1 453 0 is_stmt 0 discriminator 1 + 2197 011e 2378 ldrb r3, [r4] + 2198 0120 9B00 lsls r3, r3, #2 + 2199 0122 EB18 adds r3, r5, r3 + 2200 0124 1A88 ldrh r2, [r3] + 2201 0126 6849 ldr r1, .L130+24 + 2202 0128 1140 ands r1, r2 + 2203 .LVL277: + 2204 012a 684A ldr r2, .L130+28 + 2205 012c 0A43 orrs r2, r1 + 2206 012e 92B2 uxth r2, r2 + 2207 0130 1A80 strh r2, [r3] + 2208 .LVL278: + 2209 .L93: + 2210 .LBE73: + 2211 .LBB74: + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2212 .loc 1 456 0 is_stmt 1 + 2213 0132 2378 ldrb r3, [r4] + 2214 0134 9B00 lsls r3, r3, #2 + 2215 0136 ED18 adds r5, r5, r3 + 2216 .LVL279: + 2217 0138 2B88 ldrh r3, [r5] + 2218 013a 654A ldr r2, .L130+32 + 2219 013c 1340 ands r3, r2 + 2220 .LVL280: + 2221 013e 3022 movs r2, #48 + 2222 0140 5A40 eors r2, r3 + 2223 .LVL281: + ARM GAS /tmp/ccalJhl3.s page 55 + + + 2224 0142 5F4B ldr r3, .L130+16 + 2225 0144 1343 orrs r3, r2 + 2226 0146 9BB2 uxth r3, r3 + 2227 0148 2B80 strh r3, [r5] + 2228 .LBE74: + 2229 014a 89E7 b .L109 + 2230 .LVL282: + 2231 .L94: + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2232 .loc 1 449 0 + 2233 014c 0029 cmp r1, #0 + 2234 014e 23D1 bne .L102 + 2235 .LVL283: + 2236 .LBB75: + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2237 .loc 1 449 0 is_stmt 0 discriminator 1 + 2238 0150 5031 adds r1, r1, #80 + 2239 0152 695A ldrh r1, [r5, r1] + 2240 0154 6918 adds r1, r5, r1 + 2241 .LVL284: + 2242 0156 D200 lsls r2, r2, #3 + 2243 0158 5218 adds r2, r2, r1 + 2244 015a 5A49 ldr r1, .L130+20 + 2245 .LVL285: + 2246 015c 8C46 mov ip, r1 + 2247 015e 6244 add r2, r2, ip + 2248 .LVL286: + 2249 .LBB76: + 2250 0160 002B cmp r3, #0 + 2251 0162 06D1 bne .L103 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2252 .loc 1 449 0 discriminator 3 + 2253 0164 1188 ldrh r1, [r2] + 2254 0166 5348 ldr r0, .L130+4 + 2255 0168 0840 ands r0, r1 + 2256 016a 5349 ldr r1, .L130+8 + 2257 016c 0143 orrs r1, r0 + 2258 016e 1180 strh r1, [r2] + 2259 0170 1BE0 b .L104 + 2260 .L103: + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2261 .loc 1 449 0 discriminator 4 + 2262 0172 3E2B cmp r3, #62 + 2263 0174 06D8 bhi .L105 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2264 .loc 1 449 0 discriminator 5 + 2265 0176 5908 lsrs r1, r3, #1 + 2266 .LVL287: + 2267 0178 D807 lsls r0, r3, #31 + 2268 017a 00D5 bpl .L106 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2269 .loc 1 449 0 discriminator 7 + 2270 017c 0131 adds r1, r1, #1 + 2271 .LVL288: + 2272 .L106: + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2273 .loc 1 449 0 discriminator 9 + ARM GAS /tmp/ccalJhl3.s page 56 + + + 2274 017e 8902 lsls r1, r1, #10 + 2275 .LVL289: + 2276 0180 1180 strh r1, [r2] + 2277 0182 12E0 b .L104 + 2278 .L105: + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2279 .loc 1 449 0 discriminator 6 + 2280 0184 5909 lsrs r1, r3, #5 + 2281 .LVL290: + 2282 0186 D806 lsls r0, r3, #27 + 2283 0188 00D1 bne .L107 + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2284 .loc 1 449 0 discriminator 10 + 2285 018a 0139 subs r1, r1, #1 + 2286 .LVL291: + 2287 .L107: + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2288 .loc 1 449 0 discriminator 12 + 2289 018c 8902 lsls r1, r1, #10 + 2290 .LVL292: + 2291 018e 89B2 uxth r1, r1 + 2292 0190 4948 ldr r0, .L130+8 + 2293 0192 0143 orrs r1, r0 + 2294 0194 1180 strh r1, [r2] + 2295 0196 08E0 b .L104 + 2296 .LVL293: + 2297 .L102: + 2298 .LBE76: + 2299 .LBE75: + 2300 .LBB77: + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pmabuffer = ep->pmaaddr0; + 2301 .loc 1 449 0 discriminator 13 + 2302 0198 5021 movs r1, #80 + 2303 019a 695A ldrh r1, [r5, r1] + 2304 019c 6918 adds r1, r5, r1 + 2305 .LVL294: + 2306 019e D200 lsls r2, r2, #3 + 2307 01a0 5218 adds r2, r2, r1 + 2308 01a2 4849 ldr r1, .L130+20 + 2309 .LVL295: + 2310 01a4 8C46 mov ip, r1 + 2311 01a6 6244 add r2, r2, ip + 2312 .LVL296: + 2313 01a8 1380 strh r3, [r2] + 2314 .LVL297: + 2315 .L104: + 2316 .LBE77: + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2317 .loc 1 450 0 is_stmt 1 + 2318 01aa 2289 ldrh r2, [r4, #8] + 2319 .LVL298: + 2320 01ac AFE7 b .L101 + 2321 .LVL299: + 2322 .L108: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2323 .loc 1 453 0 discriminator 2 + 2324 01ae 012B cmp r3, #1 + ARM GAS /tmp/ccalJhl3.s page 57 + + + 2325 01b0 BFD1 bne .L93 + 2326 .LBB78: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2327 .loc 1 453 0 is_stmt 0 discriminator 3 + 2328 01b2 2378 ldrb r3, [r4] + 2329 01b4 9B00 lsls r3, r3, #2 + 2330 01b6 EB18 adds r3, r5, r3 + 2331 01b8 1A88 ldrh r2, [r3] + 2332 01ba 4349 ldr r1, .L130+24 + 2333 01bc 1140 ands r1, r2 + 2334 .LVL300: + 2335 01be 454A ldr r2, .L130+36 + 2336 01c0 0A43 orrs r2, r1 + 2337 01c2 92B2 uxth r2, r2 + 2338 01c4 1A80 strh r2, [r3] + 2339 01c6 B4E7 b .L93 + 2340 .LVL301: + 2341 .L110: + 2342 .LBE78: + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2343 .loc 1 469 0 is_stmt 1 + 2344 01c8 0023 movs r3, #0 + 2345 01ca A361 str r3, [r4, #24] + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** ep->xfer_len = 0U; + 2346 .loc 1 468 0 + 2347 01cc 1300 movs r3, r2 + 2348 01ce 24E7 b .L111 + 2349 .LVL302: + 2350 .L113: + 2351 .LBB79: + 2352 .LBB64: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2353 .loc 1 476 0 discriminator 2 + 2354 01d0 3E2B cmp r3, #62 + 2355 01d2 06D8 bhi .L115 + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2356 .loc 1 476 0 is_stmt 0 discriminator 3 + 2357 01d4 5908 lsrs r1, r3, #1 + 2358 .LVL303: + 2359 01d6 DB07 lsls r3, r3, #31 + 2360 01d8 00D5 bpl .L116 + 2361 .LVL304: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2362 .loc 1 476 0 discriminator 5 + 2363 01da 0131 adds r1, r1, #1 + 2364 .LVL305: + 2365 .L116: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2366 .loc 1 476 0 discriminator 7 + 2367 01dc 8902 lsls r1, r1, #10 + 2368 .LVL306: + 2369 01de 1180 strh r1, [r2] + 2370 01e0 31E7 b .L114 + 2371 .LVL307: + 2372 .L115: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2373 .loc 1 476 0 discriminator 4 + ARM GAS /tmp/ccalJhl3.s page 58 + + + 2374 01e2 5909 lsrs r1, r3, #5 + 2375 .LVL308: + 2376 01e4 DB06 lsls r3, r3, #27 + 2377 01e6 00D1 bne .L117 + 2378 .LVL309: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2379 .loc 1 476 0 discriminator 8 + 2380 01e8 0139 subs r1, r1, #1 + 2381 .LVL310: + 2382 .L117: + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2383 .loc 1 476 0 discriminator 10 + 2384 01ea 8902 lsls r1, r1, #10 + 2385 .LVL311: + 2386 01ec 89B2 uxth r1, r1 + 2387 01ee 324B ldr r3, .L130+8 + 2388 01f0 1943 orrs r1, r3 + 2389 01f2 1180 strh r1, [r2] + 2390 01f4 27E7 b .L114 + 2391 .LVL312: + 2392 .L112: + 2393 .LBE64: + 2394 .LBE79: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2395 .loc 1 481 0 is_stmt 1 + 2396 01f6 0029 cmp r1, #0 + 2397 01f8 10D1 bne .L118 + 2398 .LVL313: + 2399 .LBB80: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2400 .loc 1 481 0 is_stmt 0 discriminator 1 + 2401 01fa 5022 movs r2, #80 + 2402 01fc A95A ldrh r1, [r5, r2] + 2403 01fe 6918 adds r1, r5, r1 + 2404 .LVL314: + 2405 0200 2278 ldrb r2, [r4] + 2406 0202 D200 lsls r2, r2, #3 + 2407 0204 5218 adds r2, r2, r1 + 2408 0206 2F49 ldr r1, .L130+20 + 2409 .LVL315: + 2410 0208 8C46 mov ip, r1 + 2411 020a 6244 add r2, r2, ip + 2412 .LVL316: + 2413 .LBB81: + 2414 020c 002B cmp r3, #0 + 2415 020e 1AD1 bne .L119 + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2416 .loc 1 481 0 discriminator 3 + 2417 0210 1188 ldrh r1, [r2] + 2418 0212 2848 ldr r0, .L130+4 + 2419 .LVL317: + 2420 0214 0840 ands r0, r1 + 2421 0216 2849 ldr r1, .L130+8 + 2422 0218 0143 orrs r1, r0 + 2423 021a 1180 strh r1, [r2] + 2424 .LVL318: + 2425 .L118: + ARM GAS /tmp/ccalJhl3.s page 59 + + + 2426 .LBE81: + 2427 .LBE80: + 2428 .LBB83: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2429 .loc 1 481 0 discriminator 15 + 2430 021c 6278 ldrb r2, [r4, #1] + 2431 021e 002A cmp r2, #0 + 2432 0220 37D1 bne .L123 + 2433 .LVL319: + 2434 .LBB84: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2435 .loc 1 481 0 discriminator 16 + 2436 0222 5032 adds r2, r2, #80 + 2437 0224 A95A ldrh r1, [r5, r2] + 2438 0226 6918 adds r1, r5, r1 + 2439 .LVL320: + 2440 0228 2278 ldrb r2, [r4] + 2441 022a D200 lsls r2, r2, #3 + 2442 022c 5218 adds r2, r2, r1 + 2443 022e 2049 ldr r1, .L130 + 2444 .LVL321: + 2445 0230 8C46 mov ip, r1 + 2446 0232 6244 add r2, r2, ip + 2447 .LVL322: + 2448 .LBB85: + 2449 0234 002B cmp r3, #0 + 2450 0236 19D1 bne .L124 + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2451 .loc 1 481 0 discriminator 18 + 2452 0238 1388 ldrh r3, [r2] + 2453 .LVL323: + 2454 023a 1E49 ldr r1, .L130+4 + 2455 023c 1940 ands r1, r3 + 2456 023e 1E4B ldr r3, .L130+8 + 2457 0240 0B43 orrs r3, r1 + 2458 0242 1380 strh r3, [r2] + 2459 0244 FFE6 b .L114 + 2460 .LVL324: + 2461 .L119: + 2462 .LBE85: + 2463 .LBE84: + 2464 .LBE83: + 2465 .LBB88: + 2466 .LBB82: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2467 .loc 1 481 0 discriminator 4 + 2468 0246 3E2B cmp r3, #62 + 2469 0248 06D8 bhi .L120 + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2470 .loc 1 481 0 discriminator 5 + 2471 024a 5908 lsrs r1, r3, #1 + 2472 .LVL325: + 2473 024c D807 lsls r0, r3, #31 + 2474 024e 00D5 bpl .L121 + 2475 .LVL326: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2476 .loc 1 481 0 discriminator 7 + ARM GAS /tmp/ccalJhl3.s page 60 + + + 2477 0250 0131 adds r1, r1, #1 + 2478 .LVL327: + 2479 .L121: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2480 .loc 1 481 0 discriminator 9 + 2481 0252 8902 lsls r1, r1, #10 + 2482 .LVL328: + 2483 0254 1180 strh r1, [r2] + 2484 0256 E1E7 b .L118 + 2485 .LVL329: + 2486 .L120: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2487 .loc 1 481 0 discriminator 6 + 2488 0258 5909 lsrs r1, r3, #5 + 2489 .LVL330: + 2490 025a D806 lsls r0, r3, #27 + 2491 025c 00D1 bne .L122 + 2492 .LVL331: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2493 .loc 1 481 0 discriminator 10 + 2494 025e 0139 subs r1, r1, #1 + 2495 .LVL332: + 2496 .L122: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2497 .loc 1 481 0 discriminator 12 + 2498 0260 8902 lsls r1, r1, #10 + 2499 .LVL333: + 2500 0262 89B2 uxth r1, r1 + 2501 0264 1448 ldr r0, .L130+8 + 2502 0266 0143 orrs r1, r0 + 2503 0268 1180 strh r1, [r2] + 2504 026a D7E7 b .L118 + 2505 .LVL334: + 2506 .L124: + 2507 .LBE82: + 2508 .LBE88: + 2509 .LBB89: + 2510 .LBB87: + 2511 .LBB86: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2512 .loc 1 481 0 discriminator 19 + 2513 026c 3E2B cmp r3, #62 + 2514 026e 06D8 bhi .L125 + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2515 .loc 1 481 0 discriminator 20 + 2516 0270 5908 lsrs r1, r3, #1 + 2517 .LVL335: + 2518 0272 DB07 lsls r3, r3, #31 + 2519 0274 00D5 bpl .L126 + 2520 .LVL336: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2521 .loc 1 481 0 discriminator 22 + 2522 0276 0131 adds r1, r1, #1 + 2523 .LVL337: + 2524 .L126: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2525 .loc 1 481 0 discriminator 24 + ARM GAS /tmp/ccalJhl3.s page 61 + + + 2526 0278 8902 lsls r1, r1, #10 + 2527 .LVL338: + 2528 027a 1180 strh r1, [r2] + 2529 027c E3E6 b .L114 + 2530 .LVL339: + 2531 .L125: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2532 .loc 1 481 0 discriminator 21 + 2533 027e 5909 lsrs r1, r3, #5 + 2534 .LVL340: + 2535 0280 DB06 lsls r3, r3, #27 + 2536 0282 00D1 bne .L127 + 2537 .LVL341: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2538 .loc 1 481 0 discriminator 25 + 2539 0284 0139 subs r1, r1, #1 + 2540 .LVL342: + 2541 .L127: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2542 .loc 1 481 0 discriminator 27 + 2543 0286 8902 lsls r1, r1, #10 + 2544 .LVL343: + 2545 0288 89B2 uxth r1, r1 + 2546 028a 0B4B ldr r3, .L130+8 + 2547 028c 1943 orrs r1, r3 + 2548 028e 1180 strh r1, [r2] + 2549 0290 D9E6 b .L114 + 2550 .LVL344: + 2551 .L123: + 2552 .LBE86: + 2553 .LBE87: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2554 .loc 1 481 0 discriminator 17 + 2555 0292 012A cmp r2, #1 + 2556 0294 00D0 beq .LCB2716 + 2557 0296 D6E6 b .L114 @long jump + 2558 .LCB2716: + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2559 .loc 1 481 0 discriminator 28 + 2560 0298 4F32 adds r2, r2, #79 + 2561 029a A95A ldrh r1, [r5, r2] + 2562 029c 6918 adds r1, r5, r1 + 2563 .LVL345: + 2564 029e 2278 ldrb r2, [r4] + 2565 02a0 D200 lsls r2, r2, #3 + 2566 02a2 5218 adds r2, r2, r1 + 2567 02a4 0249 ldr r1, .L130 + 2568 .LVL346: + 2569 02a6 8C46 mov ip, r1 + 2570 02a8 6244 add r2, r2, ip + 2571 .LVL347: + 2572 02aa 1380 strh r3, [r2] + 2573 02ac CBE6 b .L114 + 2574 .L131: + 2575 02ae C046 .align 2 + 2576 .L130: + 2577 02b0 06040000 .word 1030 + ARM GAS /tmp/ccalJhl3.s page 62 + + + 2578 02b4 FF83FFFF .word -31745 + 2579 02b8 0080FFFF .word -32768 + 2580 02bc 8FBFFFFF .word -16497 + 2581 02c0 8080FFFF .word -32640 + 2582 02c4 02040000 .word 1026 + 2583 02c8 8F8FFFFF .word -28785 + 2584 02cc C080FFFF .word -32576 + 2585 02d0 BF8FFFFF .word -28737 + 2586 02d4 80C0FFFF .word -16256 + 2587 .LBE89: + 2588 .cfi_endproc + 2589 .LFE50: + 2591 .section .text.USB_ReadPMA,"ax",%progbits + 2592 .align 1 + 2593 .global USB_ReadPMA + 2594 .syntax unified + 2595 .code 16 + 2596 .thumb_func + 2597 .fpu softvfp + 2599 USB_ReadPMA: + 2600 .LFB69: + 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** /** + 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @brief Copy a buffer from user memory area to packet memory area (PMA) + 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param USBx: USB peripheral instance register address. + 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param pbUsrBuf pointer to user memory area. + 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param wPMABufAddr address into PMA. + 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @param wNBytes: no. of bytes to be copied. + 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** * @retval None + 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** */ + 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** void USB_ReadPMA(USB_TypeDef *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) + 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 2601 .loc 1 833 0 is_stmt 1 + 2602 .cfi_startproc + 2603 @ args = 0, pretend = 0, frame = 0 + 2604 @ frame_needed = 0, uses_anonymous_args = 0 + 2605 .LVL348: + 2606 0000 30B5 push {r4, r5, lr} + 2607 .LCFI8: + 2608 .cfi_def_cfa_offset 12 + 2609 .cfi_offset 4, -12 + 2610 .cfi_offset 5, -8 + 2611 .cfi_offset 14, -4 + 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t n = (uint32_t)wNBytes >> 1; + 2612 .loc 1 834 0 + 2613 0002 5D08 lsrs r5, r3, #1 + 2614 .LVL349: + 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t BaseAddr = (uint32_t)USBx; + 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint32_t i, temp; + 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** __IO uint16_t *pdwVal; + 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** uint8_t *pBuf = pbUsrBuf; + 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS)); + 2615 .loc 1 840 0 + 2616 0004 1218 adds r2, r2, r0 + 2617 .LVL350: + 2618 0006 8020 movs r0, #128 + ARM GAS /tmp/ccalJhl3.s page 63 + + + 2619 .LVL351: + 2620 0008 C000 lsls r0, r0, #3 + 2621 000a 8446 mov ip, r0 + 2622 000c 6244 add r2, r2, ip + 2623 .LVL352: + 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** for (i = n; i != 0U; i--) + 2624 .loc 1 842 0 + 2625 000e 07E0 b .L133 + 2626 .LVL353: + 2627 .L134: + 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** temp = *(__IO uint16_t *)pdwVal; + 2628 .loc 1 844 0 discriminator 3 + 2629 0010 1488 ldrh r4, [r2] + 2630 0012 A4B2 uxth r4, r4 + 2631 .LVL354: + 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pdwVal++; + 2632 .loc 1 845 0 discriminator 3 + 2633 0014 0232 adds r2, r2, #2 + 2634 .LVL355: + 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** *pBuf = (uint8_t)((temp >> 0) & 0xFFU); + 2635 .loc 1 846 0 discriminator 3 + 2636 0016 0C70 strb r4, [r1] + 2637 .LVL356: + 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pBuf++; + 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** *pBuf = (uint8_t)((temp >> 8) & 0xFFU); + 2638 .loc 1 848 0 discriminator 3 + 2639 0018 240A lsrs r4, r4, #8 + 2640 .LVL357: + 2641 001a 4C70 strb r4, [r1, #1] + 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pBuf++; + 2642 .loc 1 849 0 discriminator 3 + 2643 001c 0231 adds r1, r1, #2 + 2644 .LVL358: + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 2645 .loc 1 842 0 discriminator 3 + 2646 001e 013D subs r5, r5, #1 + 2647 .LVL359: + 2648 .L133: + 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 2649 .loc 1 842 0 is_stmt 0 discriminator 1 + 2650 0020 002D cmp r5, #0 + 2651 0022 F5D1 bne .L134 + 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** #if PMA_ACCESS > 1U + 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** pdwVal++; + 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** #endif + 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** + 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** if ((wNBytes % 2U) != 0U) + 2652 .loc 1 856 0 is_stmt 1 + 2653 0024 DB07 lsls r3, r3, #31 + 2654 0026 01D5 bpl .L132 + 2655 .LVL360: + 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** { + 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** temp = *pdwVal; + ARM GAS /tmp/ccalJhl3.s page 64 + + + 2656 .loc 1 858 0 + 2657 0028 1388 ldrh r3, [r2] + 2658 .LVL361: + 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** *pBuf = (uint8_t)((temp >> 0) & 0xFFU); + 2659 .loc 1 859 0 + 2660 002a 0B70 strb r3, [r1] + 2661 .LVL362: + 2662 .L132: + 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usb.c **** } + 2663 .loc 1 861 0 + 2664 @ sp needed + 2665 .LVL363: + 2666 002c 30BD pop {r4, r5, pc} + 2667 .cfi_endproc + 2668 .LFE69: + 2670 .text + 2671 .Letext0: + 2672 .file 2 "/usr/include/newlib/machine/_default_types.h" + 2673 .file 3 "/usr/include/newlib/sys/_stdint.h" + 2674 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 2675 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 2676 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 2677 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h" + 2678 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccalJhl3.s page 65 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_ll_usb.c + /tmp/ccalJhl3.s:16 .text.USB_CoreInit:0000000000000000 $t + /tmp/ccalJhl3.s:23 .text.USB_CoreInit:0000000000000000 USB_CoreInit + /tmp/ccalJhl3.s:48 .text.USB_EnableGlobalInt:0000000000000000 $t + /tmp/ccalJhl3.s:55 .text.USB_EnableGlobalInt:0000000000000000 USB_EnableGlobalInt + /tmp/ccalJhl3.s:78 .text.USB_EnableGlobalInt:0000000000000010 $d + /tmp/ccalJhl3.s:83 .text.USB_DisableGlobalInt:0000000000000000 $t + /tmp/ccalJhl3.s:90 .text.USB_DisableGlobalInt:0000000000000000 USB_DisableGlobalInt + /tmp/ccalJhl3.s:112 .text.USB_DisableGlobalInt:0000000000000010 $d + /tmp/ccalJhl3.s:117 .text.USB_SetCurrentMode:0000000000000000 $t + /tmp/ccalJhl3.s:124 .text.USB_SetCurrentMode:0000000000000000 USB_SetCurrentMode + /tmp/ccalJhl3.s:141 .text.USB_DevInit:0000000000000000 $t + /tmp/ccalJhl3.s:148 .text.USB_DevInit:0000000000000000 USB_DevInit + /tmp/ccalJhl3.s:193 .text.USB_SetDevSpeed:0000000000000000 $t + /tmp/ccalJhl3.s:200 .text.USB_SetDevSpeed:0000000000000000 USB_SetDevSpeed + /tmp/ccalJhl3.s:217 .text.USB_FlushTxFifo:0000000000000000 $t + /tmp/ccalJhl3.s:224 .text.USB_FlushTxFifo:0000000000000000 USB_FlushTxFifo + /tmp/ccalJhl3.s:241 .text.USB_FlushRxFifo:0000000000000000 $t + /tmp/ccalJhl3.s:248 .text.USB_FlushRxFifo:0000000000000000 USB_FlushRxFifo + /tmp/ccalJhl3.s:265 .text.USB_ActivateEndpoint:0000000000000000 $t + /tmp/ccalJhl3.s:272 .text.USB_ActivateEndpoint:0000000000000000 USB_ActivateEndpoint + /tmp/ccalJhl3.s:891 .text.USB_ActivateEndpoint:00000000000002d0 $d + /tmp/ccalJhl3.s:908 .text.USB_DeactivateEndpoint:0000000000000000 $t + /tmp/ccalJhl3.s:915 .text.USB_DeactivateEndpoint:0000000000000000 USB_DeactivateEndpoint + /tmp/ccalJhl3.s:1220 .text.USB_DeactivateEndpoint:0000000000000158 $d + /tmp/ccalJhl3.s:1231 .text.USB_WritePacket:0000000000000000 $t + /tmp/ccalJhl3.s:1238 .text.USB_WritePacket:0000000000000000 USB_WritePacket + /tmp/ccalJhl3.s:1255 .text.USB_ReadPacket:0000000000000000 $t + /tmp/ccalJhl3.s:1262 .text.USB_ReadPacket:0000000000000000 USB_ReadPacket + /tmp/ccalJhl3.s:1279 .text.USB_EPSetStall:0000000000000000 $t + /tmp/ccalJhl3.s:1286 .text.USB_EPSetStall:0000000000000000 USB_EPSetStall + /tmp/ccalJhl3.s:1347 .text.USB_EPSetStall:0000000000000040 $d + /tmp/ccalJhl3.s:1354 .text.USB_EPClearStall:0000000000000000 $t + /tmp/ccalJhl3.s:1361 .text.USB_EPClearStall:0000000000000000 USB_EPClearStall + /tmp/ccalJhl3.s:1482 .text.USB_EPClearStall:0000000000000080 $d + /tmp/ccalJhl3.s:1492 .text.USB_StopDevice:0000000000000000 $t + /tmp/ccalJhl3.s:1499 .text.USB_StopDevice:0000000000000000 USB_StopDevice + /tmp/ccalJhl3.s:1527 .text.USB_SetDevAddress:0000000000000000 $t + /tmp/ccalJhl3.s:1534 .text.USB_SetDevAddress:0000000000000000 USB_SetDevAddress + /tmp/ccalJhl3.s:1559 .text.USB_DevConnect:0000000000000000 $t + /tmp/ccalJhl3.s:1566 .text.USB_DevConnect:0000000000000000 USB_DevConnect + /tmp/ccalJhl3.s:1589 .text.USB_DevConnect:0000000000000010 $d + /tmp/ccalJhl3.s:1594 .text.USB_DevDisconnect:0000000000000000 $t + /tmp/ccalJhl3.s:1601 .text.USB_DevDisconnect:0000000000000000 USB_DevDisconnect + /tmp/ccalJhl3.s:1624 .text.USB_ReadInterrupts:0000000000000000 $t + /tmp/ccalJhl3.s:1631 .text.USB_ReadInterrupts:0000000000000000 USB_ReadInterrupts + /tmp/ccalJhl3.s:1652 .text.USB_ReadDevAllOutEpInterrupt:0000000000000000 $t + /tmp/ccalJhl3.s:1659 .text.USB_ReadDevAllOutEpInterrupt:0000000000000000 USB_ReadDevAllOutEpInterrupt + /tmp/ccalJhl3.s:1676 .text.USB_ReadDevAllInEpInterrupt:0000000000000000 $t + /tmp/ccalJhl3.s:1683 .text.USB_ReadDevAllInEpInterrupt:0000000000000000 USB_ReadDevAllInEpInterrupt + /tmp/ccalJhl3.s:1700 .text.USB_ReadDevOutEPInterrupt:0000000000000000 $t + /tmp/ccalJhl3.s:1707 .text.USB_ReadDevOutEPInterrupt:0000000000000000 USB_ReadDevOutEPInterrupt + /tmp/ccalJhl3.s:1724 .text.USB_ReadDevInEPInterrupt:0000000000000000 $t + /tmp/ccalJhl3.s:1731 .text.USB_ReadDevInEPInterrupt:0000000000000000 USB_ReadDevInEPInterrupt + /tmp/ccalJhl3.s:1748 .text.USB_ClearInterrupts:0000000000000000 $t + /tmp/ccalJhl3.s:1755 .text.USB_ClearInterrupts:0000000000000000 USB_ClearInterrupts + ARM GAS /tmp/ccalJhl3.s page 66 + + + /tmp/ccalJhl3.s:1770 .text.USB_EP0_OutStart:0000000000000000 $t + /tmp/ccalJhl3.s:1777 .text.USB_EP0_OutStart:0000000000000000 USB_EP0_OutStart + /tmp/ccalJhl3.s:1794 .text.USB_ActivateRemoteWakeup:0000000000000000 $t + /tmp/ccalJhl3.s:1801 .text.USB_ActivateRemoteWakeup:0000000000000000 USB_ActivateRemoteWakeup + /tmp/ccalJhl3.s:1824 .text.USB_DeActivateRemoteWakeup:0000000000000000 $t + /tmp/ccalJhl3.s:1831 .text.USB_DeActivateRemoteWakeup:0000000000000000 USB_DeActivateRemoteWakeup + /tmp/ccalJhl3.s:1854 .text.USB_WritePMA:0000000000000000 $t + /tmp/ccalJhl3.s:1861 .text.USB_WritePMA:0000000000000000 USB_WritePMA + /tmp/ccalJhl3.s:1922 .text.USB_EPStartXfer:0000000000000000 $t + /tmp/ccalJhl3.s:1929 .text.USB_EPStartXfer:0000000000000000 USB_EPStartXfer + /tmp/ccalJhl3.s:2577 .text.USB_EPStartXfer:00000000000002b0 $d + /tmp/ccalJhl3.s:2592 .text.USB_ReadPMA:0000000000000000 $t + /tmp/ccalJhl3.s:2599 .text.USB_ReadPMA:0000000000000000 USB_ReadPMA + +NO UNDEFINED SYMBOLS diff --git a/fw/midi-dials/build/stm32f0xx_ll_usb.o b/fw/midi-dials/build/stm32f0xx_ll_usb.o Binary files differnew file mode 100644 index 0000000..b0efa3f --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_ll_usb.o diff --git a/fw/midi-dials/build/system_stm32f0xx.d b/fw/midi-dials/build/system_stm32f0xx.d new file mode 100644 index 0000000..ad1d99e --- /dev/null +++ b/fw/midi-dials/build/system_stm32f0xx.d @@ -0,0 +1,86 @@ +build/system_stm32f0xx.o: Src/system_stm32f0xx.c \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: diff --git a/fw/midi-dials/build/system_stm32f0xx.lst b/fw/midi-dials/build/system_stm32f0xx.lst new file mode 100644 index 0000000..5794d8c --- /dev/null +++ b/fw/midi-dials/build/system_stm32f0xx.lst @@ -0,0 +1,539 @@ +ARM GAS /tmp/ccfT8vne.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "system_stm32f0xx.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.SystemInit,"ax",%progbits + 16 .align 1 + 17 .global SystemInit + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 SystemInit: + 24 .LFB40: + 25 .file 1 "Src/system_stm32f0xx.c" + 1:Src/system_stm32f0xx.c **** /** + 2:Src/system_stm32f0xx.c **** ****************************************************************************** + 3:Src/system_stm32f0xx.c **** * @file system_stm32f0xx.c + 4:Src/system_stm32f0xx.c **** * @author MCD Application Team + 5:Src/system_stm32f0xx.c **** * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File. + 6:Src/system_stm32f0xx.c **** * + 7:Src/system_stm32f0xx.c **** * 1. This file provides two functions and one global variable to be called from + 8:Src/system_stm32f0xx.c **** * user application: + 9:Src/system_stm32f0xx.c **** * - SystemInit(): This function is called at startup just after reset and + 10:Src/system_stm32f0xx.c **** * before branch to main program. This call is made inside + 11:Src/system_stm32f0xx.c **** * the "startup_stm32f0xx.s" file. + 12:Src/system_stm32f0xx.c **** * + 13:Src/system_stm32f0xx.c **** * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + 14:Src/system_stm32f0xx.c **** * by the user application to setup the SysTick + 15:Src/system_stm32f0xx.c **** * timer or configure other parameters. + 16:Src/system_stm32f0xx.c **** * + 17:Src/system_stm32f0xx.c **** * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + 18:Src/system_stm32f0xx.c **** * be called whenever the core clock is changed + 19:Src/system_stm32f0xx.c **** * during program execution. + 20:Src/system_stm32f0xx.c **** * + 21:Src/system_stm32f0xx.c **** * 2. After each device reset the HSI (8 MHz) is used as system clock source. + 22:Src/system_stm32f0xx.c **** * Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to + 23:Src/system_stm32f0xx.c **** * configure the system clock before to branch to main program. + 24:Src/system_stm32f0xx.c **** * + 25:Src/system_stm32f0xx.c **** * 3. This file configures the system clock as follows: + 26:Src/system_stm32f0xx.c **** *============================================================================= + 27:Src/system_stm32f0xx.c **** * Supported STM32F0xx device + 28:Src/system_stm32f0xx.c **** *----------------------------------------------------------------------------- + 29:Src/system_stm32f0xx.c **** * System Clock source | HSI + 30:Src/system_stm32f0xx.c **** *----------------------------------------------------------------------------- + 31:Src/system_stm32f0xx.c **** * SYSCLK(Hz) | 8000000 + 32:Src/system_stm32f0xx.c **** *----------------------------------------------------------------------------- + 33:Src/system_stm32f0xx.c **** * HCLK(Hz) | 8000000 + ARM GAS /tmp/ccfT8vne.s page 2 + + + 34:Src/system_stm32f0xx.c **** *----------------------------------------------------------------------------- + 35:Src/system_stm32f0xx.c **** * AHB Prescaler | 1 + 36:Src/system_stm32f0xx.c **** *----------------------------------------------------------------------------- + 37:Src/system_stm32f0xx.c **** * APB1 Prescaler | 1 + 38:Src/system_stm32f0xx.c **** *----------------------------------------------------------------------------- + 39:Src/system_stm32f0xx.c **** *============================================================================= + 40:Src/system_stm32f0xx.c **** ****************************************************************************** + 41:Src/system_stm32f0xx.c **** * @attention + 42:Src/system_stm32f0xx.c **** * + 43:Src/system_stm32f0xx.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 44:Src/system_stm32f0xx.c **** * All rights reserved.</center></h2> + 45:Src/system_stm32f0xx.c **** * + 46:Src/system_stm32f0xx.c **** * This software component is licensed by ST under BSD 3-Clause license, + 47:Src/system_stm32f0xx.c **** * the "License"; You may not use this file except in compliance with the + 48:Src/system_stm32f0xx.c **** * License. You may obtain a copy of the License at: + 49:Src/system_stm32f0xx.c **** * opensource.org/licenses/BSD-3-Clause + 50:Src/system_stm32f0xx.c **** * + 51:Src/system_stm32f0xx.c **** ****************************************************************************** + 52:Src/system_stm32f0xx.c **** */ + 53:Src/system_stm32f0xx.c **** + 54:Src/system_stm32f0xx.c **** /** @addtogroup CMSIS + 55:Src/system_stm32f0xx.c **** * @{ + 56:Src/system_stm32f0xx.c **** */ + 57:Src/system_stm32f0xx.c **** + 58:Src/system_stm32f0xx.c **** /** @addtogroup stm32f0xx_system + 59:Src/system_stm32f0xx.c **** * @{ + 60:Src/system_stm32f0xx.c **** */ + 61:Src/system_stm32f0xx.c **** + 62:Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Includes + 63:Src/system_stm32f0xx.c **** * @{ + 64:Src/system_stm32f0xx.c **** */ + 65:Src/system_stm32f0xx.c **** + 66:Src/system_stm32f0xx.c **** #include "stm32f0xx.h" + 67:Src/system_stm32f0xx.c **** + 68:Src/system_stm32f0xx.c **** /** + 69:Src/system_stm32f0xx.c **** * @} + 70:Src/system_stm32f0xx.c **** */ + 71:Src/system_stm32f0xx.c **** + 72:Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_TypesDefinitions + 73:Src/system_stm32f0xx.c **** * @{ + 74:Src/system_stm32f0xx.c **** */ + 75:Src/system_stm32f0xx.c **** + 76:Src/system_stm32f0xx.c **** /** + 77:Src/system_stm32f0xx.c **** * @} + 78:Src/system_stm32f0xx.c **** */ + 79:Src/system_stm32f0xx.c **** + 80:Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Defines + 81:Src/system_stm32f0xx.c **** * @{ + 82:Src/system_stm32f0xx.c **** */ + 83:Src/system_stm32f0xx.c **** #if !defined (HSE_VALUE) + 84:Src/system_stm32f0xx.c **** #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz. + 85:Src/system_stm32f0xx.c **** This value can be provided and adapted by the user + 86:Src/system_stm32f0xx.c **** #endif /* HSE_VALUE */ + 87:Src/system_stm32f0xx.c **** + 88:Src/system_stm32f0xx.c **** #if !defined (HSI_VALUE) + 89:Src/system_stm32f0xx.c **** #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz. + 90:Src/system_stm32f0xx.c **** This value can be provided and adapted by the user + ARM GAS /tmp/ccfT8vne.s page 3 + + + 91:Src/system_stm32f0xx.c **** #endif /* HSI_VALUE */ + 92:Src/system_stm32f0xx.c **** + 93:Src/system_stm32f0xx.c **** #if !defined (HSI48_VALUE) + 94:Src/system_stm32f0xx.c **** #define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in + 95:Src/system_stm32f0xx.c **** This value can be provided and adapted by the user + 96:Src/system_stm32f0xx.c **** #endif /* HSI48_VALUE */ + 97:Src/system_stm32f0xx.c **** /** + 98:Src/system_stm32f0xx.c **** * @} + 99:Src/system_stm32f0xx.c **** */ + 100:Src/system_stm32f0xx.c **** + 101:Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Macros + 102:Src/system_stm32f0xx.c **** * @{ + 103:Src/system_stm32f0xx.c **** */ + 104:Src/system_stm32f0xx.c **** + 105:Src/system_stm32f0xx.c **** /** + 106:Src/system_stm32f0xx.c **** * @} + 107:Src/system_stm32f0xx.c **** */ + 108:Src/system_stm32f0xx.c **** + 109:Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Variables + 110:Src/system_stm32f0xx.c **** * @{ + 111:Src/system_stm32f0xx.c **** */ + 112:Src/system_stm32f0xx.c **** /* This variable is updated in three ways: + 113:Src/system_stm32f0xx.c **** 1) by calling CMSIS function SystemCoreClockUpdate() + 114:Src/system_stm32f0xx.c **** 2) by calling HAL API function HAL_RCC_GetHCLKFreq() + 115:Src/system_stm32f0xx.c **** 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency + 116:Src/system_stm32f0xx.c **** Note: If you use this function to configure the system clock there is no need to + 117:Src/system_stm32f0xx.c **** call the 2 first functions listed above, since SystemCoreClock variable is + 118:Src/system_stm32f0xx.c **** updated automatically. + 119:Src/system_stm32f0xx.c **** */ + 120:Src/system_stm32f0xx.c **** uint32_t SystemCoreClock = 8000000; + 121:Src/system_stm32f0xx.c **** + 122:Src/system_stm32f0xx.c **** const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + 123:Src/system_stm32f0xx.c **** const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4}; + 124:Src/system_stm32f0xx.c **** + 125:Src/system_stm32f0xx.c **** /** + 126:Src/system_stm32f0xx.c **** * @} + 127:Src/system_stm32f0xx.c **** */ + 128:Src/system_stm32f0xx.c **** + 129:Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_FunctionPrototypes + 130:Src/system_stm32f0xx.c **** * @{ + 131:Src/system_stm32f0xx.c **** */ + 132:Src/system_stm32f0xx.c **** + 133:Src/system_stm32f0xx.c **** /** + 134:Src/system_stm32f0xx.c **** * @} + 135:Src/system_stm32f0xx.c **** */ + 136:Src/system_stm32f0xx.c **** + 137:Src/system_stm32f0xx.c **** /** @addtogroup STM32F0xx_System_Private_Functions + 138:Src/system_stm32f0xx.c **** * @{ + 139:Src/system_stm32f0xx.c **** */ + 140:Src/system_stm32f0xx.c **** + 141:Src/system_stm32f0xx.c **** /** + 142:Src/system_stm32f0xx.c **** * @brief Setup the microcontroller system. + 143:Src/system_stm32f0xx.c **** * @param None + 144:Src/system_stm32f0xx.c **** * @retval None + 145:Src/system_stm32f0xx.c **** */ + 146:Src/system_stm32f0xx.c **** void SystemInit(void) + 147:Src/system_stm32f0xx.c **** { + ARM GAS /tmp/ccfT8vne.s page 4 + + + 26 .loc 1 147 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 148:Src/system_stm32f0xx.c **** /* NOTE :SystemInit(): This function is called at startup just after reset and + 149:Src/system_stm32f0xx.c **** before branch to main program. This call is made inside + 150:Src/system_stm32f0xx.c **** the "startup_stm32f0xx.s" file. + 151:Src/system_stm32f0xx.c **** User can setups the default system clock (System clock source, PLL Multipl + 152:Src/system_stm32f0xx.c **** and Divider factors, AHB/APBx prescalers and Flash settings). + 153:Src/system_stm32f0xx.c **** */ + 154:Src/system_stm32f0xx.c **** } + 31 .loc 1 154 0 + 32 @ sp needed + 33 0000 7047 bx lr + 34 .cfi_endproc + 35 .LFE40: + 37 .global __aeabi_uidiv + 38 .section .text.SystemCoreClockUpdate,"ax",%progbits + 39 .align 1 + 40 .global SystemCoreClockUpdate + 41 .syntax unified + 42 .code 16 + 43 .thumb_func + 44 .fpu softvfp + 46 SystemCoreClockUpdate: + 47 .LFB41: + 155:Src/system_stm32f0xx.c **** + 156:Src/system_stm32f0xx.c **** /** + 157:Src/system_stm32f0xx.c **** * @brief Update SystemCoreClock variable according to Clock Register Values. + 158:Src/system_stm32f0xx.c **** * The SystemCoreClock variable contains the core clock (HCLK), it can + 159:Src/system_stm32f0xx.c **** * be used by the user application to setup the SysTick timer or configure + 160:Src/system_stm32f0xx.c **** * other parameters. + 161:Src/system_stm32f0xx.c **** * + 162:Src/system_stm32f0xx.c **** * @note Each time the core clock (HCLK) changes, this function must be called + 163:Src/system_stm32f0xx.c **** * to update SystemCoreClock variable value. Otherwise, any configuration + 164:Src/system_stm32f0xx.c **** * based on this variable will be incorrect. + 165:Src/system_stm32f0xx.c **** * + 166:Src/system_stm32f0xx.c **** * @note - The system frequency computed by this function is not the real + 167:Src/system_stm32f0xx.c **** * frequency in the chip. It is calculated based on the predefined + 168:Src/system_stm32f0xx.c **** * constant and the selected clock source: + 169:Src/system_stm32f0xx.c **** * + 170:Src/system_stm32f0xx.c **** * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + 171:Src/system_stm32f0xx.c **** * + 172:Src/system_stm32f0xx.c **** * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + 173:Src/system_stm32f0xx.c **** * + 174:Src/system_stm32f0xx.c **** * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + 175:Src/system_stm32f0xx.c **** * or HSI_VALUE(*) multiplied/divided by the PLL factors. + 176:Src/system_stm32f0xx.c **** * + 177:Src/system_stm32f0xx.c **** * (*) HSI_VALUE is a constant defined in stm32f0xx_hal.h file (default value + 178:Src/system_stm32f0xx.c **** * 8 MHz) but the real value may vary depending on the variations + 179:Src/system_stm32f0xx.c **** * in voltage and temperature. + 180:Src/system_stm32f0xx.c **** * + 181:Src/system_stm32f0xx.c **** * (**) HSE_VALUE is a constant defined in stm32f0xx_hal.h file (default value + 182:Src/system_stm32f0xx.c **** * 8 MHz), user has to ensure that HSE_VALUE is same as the real + 183:Src/system_stm32f0xx.c **** * frequency of the crystal used. Otherwise, this function may + 184:Src/system_stm32f0xx.c **** * have wrong result. + ARM GAS /tmp/ccfT8vne.s page 5 + + + 185:Src/system_stm32f0xx.c **** * + 186:Src/system_stm32f0xx.c **** * - The result of this function could be not correct when using fractional + 187:Src/system_stm32f0xx.c **** * value for HSE crystal. + 188:Src/system_stm32f0xx.c **** * + 189:Src/system_stm32f0xx.c **** * @param None + 190:Src/system_stm32f0xx.c **** * @retval None + 191:Src/system_stm32f0xx.c **** */ + 192:Src/system_stm32f0xx.c **** void SystemCoreClockUpdate (void) + 193:Src/system_stm32f0xx.c **** { + 48 .loc 1 193 0 + 49 .cfi_startproc + 50 @ args = 0, pretend = 0, frame = 0 + 51 @ frame_needed = 0, uses_anonymous_args = 0 + 52 0000 10B5 push {r4, lr} + 53 .LCFI0: + 54 .cfi_def_cfa_offset 8 + 55 .cfi_offset 4, -8 + 56 .cfi_offset 14, -4 + 57 .LVL0: + 194:Src/system_stm32f0xx.c **** uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0; + 195:Src/system_stm32f0xx.c **** + 196:Src/system_stm32f0xx.c **** /* Get SYSCLK source -------------------------------------------------------*/ + 197:Src/system_stm32f0xx.c **** tmp = RCC->CFGR & RCC_CFGR_SWS; + 58 .loc 1 197 0 + 59 0002 254B ldr r3, .L14 + 60 0004 5A68 ldr r2, [r3, #4] + 61 0006 0C23 movs r3, #12 + 62 0008 1340 ands r3, r2 + 63 .LVL1: + 198:Src/system_stm32f0xx.c **** + 199:Src/system_stm32f0xx.c **** switch (tmp) + 64 .loc 1 199 0 + 65 000a 042B cmp r3, #4 + 66 000c 16D0 beq .L4 + 67 000e 082B cmp r3, #8 + 68 0010 18D0 beq .L5 + 69 0012 002B cmp r3, #0 + 70 0014 03D0 beq .L11 + 200:Src/system_stm32f0xx.c **** { + 201:Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_HSI: /* HSI used as system clock */ + 202:Src/system_stm32f0xx.c **** SystemCoreClock = HSI_VALUE; + 203:Src/system_stm32f0xx.c **** break; + 204:Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_HSE: /* HSE used as system clock */ + 205:Src/system_stm32f0xx.c **** SystemCoreClock = HSE_VALUE; + 206:Src/system_stm32f0xx.c **** break; + 207:Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 208:Src/system_stm32f0xx.c **** /* Get PLL clock source and multiplication factor ----------------------*/ + 209:Src/system_stm32f0xx.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL; + 210:Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 211:Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 212:Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 213:Src/system_stm32f0xx.c **** + 214:Src/system_stm32f0xx.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV) + 215:Src/system_stm32f0xx.c **** { + 216:Src/system_stm32f0xx.c **** /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */ + 217:Src/system_stm32f0xx.c **** SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull; + 218:Src/system_stm32f0xx.c **** } + ARM GAS /tmp/ccfT8vne.s page 6 + + + 219:Src/system_stm32f0xx.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || + 220:Src/system_stm32f0xx.c **** else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV) + 221:Src/system_stm32f0xx.c **** { + 222:Src/system_stm32f0xx.c **** /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */ + 223:Src/system_stm32f0xx.c **** SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull; + 224:Src/system_stm32f0xx.c **** } + 225:Src/system_stm32f0xx.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */ + 226:Src/system_stm32f0xx.c **** else + 227:Src/system_stm32f0xx.c **** { + 228:Src/system_stm32f0xx.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \ + 229:Src/system_stm32f0xx.c **** || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \ + 230:Src/system_stm32f0xx.c **** || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) + 231:Src/system_stm32f0xx.c **** /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */ + 232:Src/system_stm32f0xx.c **** SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull; + 233:Src/system_stm32f0xx.c **** #else + 234:Src/system_stm32f0xx.c **** /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */ + 235:Src/system_stm32f0xx.c **** SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + 236:Src/system_stm32f0xx.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F070x6 || + 237:Src/system_stm32f0xx.c **** STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB || + 238:Src/system_stm32f0xx.c **** STM32F091xC || STM32F098xx || STM32F030xC */ + 239:Src/system_stm32f0xx.c **** } + 240:Src/system_stm32f0xx.c **** break; + 241:Src/system_stm32f0xx.c **** default: /* HSI used as system clock */ + 242:Src/system_stm32f0xx.c **** SystemCoreClock = HSI_VALUE; + 71 .loc 1 242 0 + 72 0016 214B ldr r3, .L14+4 + 73 .LVL2: + 74 0018 214A ldr r2, .L14+8 + 75 .LVL3: + 76 001a 1A60 str r2, [r3] + 243:Src/system_stm32f0xx.c **** break; + 77 .loc 1 243 0 + 78 001c 02E0 b .L7 + 79 .LVL4: + 80 .L11: + 202:Src/system_stm32f0xx.c **** break; + 81 .loc 1 202 0 + 82 001e 1F4B ldr r3, .L14+4 + 83 .LVL5: + 84 0020 1F4A ldr r2, .L14+8 + 85 .LVL6: + 86 0022 1A60 str r2, [r3] + 87 .LVL7: + 88 .L7: + 244:Src/system_stm32f0xx.c **** } + 245:Src/system_stm32f0xx.c **** /* Compute HCLK clock frequency ----------------*/ + 246:Src/system_stm32f0xx.c **** /* Get HCLK prescaler */ + 247:Src/system_stm32f0xx.c **** tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + 89 .loc 1 247 0 + 90 0024 1C4B ldr r3, .L14 + 91 0026 5A68 ldr r2, [r3, #4] + 92 0028 1209 lsrs r2, r2, #4 + 93 002a 0F23 movs r3, #15 + 94 002c 1340 ands r3, r2 + 95 002e 1D4A ldr r2, .L14+12 + 96 0030 D35C ldrb r3, [r2, r3] + 97 .LVL8: + ARM GAS /tmp/ccfT8vne.s page 7 + + + 248:Src/system_stm32f0xx.c **** /* HCLK clock frequency */ + 249:Src/system_stm32f0xx.c **** SystemCoreClock >>= tmp; + 98 .loc 1 249 0 + 99 0032 1A4A ldr r2, .L14+4 + 100 0034 1168 ldr r1, [r2] + 101 0036 D940 lsrs r1, r1, r3 + 102 0038 1160 str r1, [r2] + 250:Src/system_stm32f0xx.c **** } + 103 .loc 1 250 0 + 104 @ sp needed + 105 003a 10BD pop {r4, pc} + 106 .LVL9: + 107 .L4: + 205:Src/system_stm32f0xx.c **** break; + 108 .loc 1 205 0 + 109 003c 174B ldr r3, .L14+4 + 110 .LVL10: + 111 003e 184A ldr r2, .L14+8 + 112 .LVL11: + 113 0040 1A60 str r2, [r3] + 206:Src/system_stm32f0xx.c **** case RCC_CFGR_SWS_PLL: /* PLL used as system clock */ + 114 .loc 1 206 0 + 115 0042 EFE7 b .L7 + 116 .LVL12: + 117 .L5: + 209:Src/system_stm32f0xx.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + 118 .loc 1 209 0 + 119 0044 144A ldr r2, .L14 + 120 0046 5068 ldr r0, [r2, #4] + 121 .LVL13: + 210:Src/system_stm32f0xx.c **** pllmull = ( pllmull >> 18) + 2; + 122 .loc 1 210 0 + 123 0048 5368 ldr r3, [r2, #4] + 124 .LVL14: + 125 004a C021 movs r1, #192 + 126 004c 4902 lsls r1, r1, #9 + 127 004e 0B40 ands r3, r1 + 128 .LVL15: + 211:Src/system_stm32f0xx.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1; + 129 .loc 1 211 0 + 130 0050 800C lsrs r0, r0, #18 + 131 .LVL16: + 132 0052 0F21 movs r1, #15 + 133 0054 0840 ands r0, r1 + 134 0056 841C adds r4, r0, #2 + 135 .LVL17: + 212:Src/system_stm32f0xx.c **** + 136 .loc 1 212 0 + 137 0058 D26A ldr r2, [r2, #44] + 138 005a 1140 ands r1, r2 + 139 005c 0131 adds r1, r1, #1 + 140 .LVL18: + 214:Src/system_stm32f0xx.c **** { + 141 .loc 1 214 0 + 142 005e 8022 movs r2, #128 + 143 0060 5202 lsls r2, r2, #9 + 144 0062 9342 cmp r3, r2 + ARM GAS /tmp/ccfT8vne.s page 8 + + + 145 0064 0AD0 beq .L12 + 220:Src/system_stm32f0xx.c **** { + 146 .loc 1 220 0 + 147 0066 C022 movs r2, #192 + 148 0068 5202 lsls r2, r2, #9 + 149 006a 9342 cmp r3, r2 + 150 006c 0DD0 beq .L13 + 232:Src/system_stm32f0xx.c **** #else + 151 .loc 1 232 0 + 152 006e 0C48 ldr r0, .L14+8 + 153 0070 FFF7FEFF bl __aeabi_uidiv + 154 .LVL19: + 155 0074 6043 muls r0, r4 + 156 0076 094B ldr r3, .L14+4 + 157 0078 1860 str r0, [r3] + 158 007a D3E7 b .L7 + 159 .LVL20: + 160 .L12: + 217:Src/system_stm32f0xx.c **** } + 161 .loc 1 217 0 + 162 007c 0848 ldr r0, .L14+8 + 163 007e FFF7FEFF bl __aeabi_uidiv + 164 .LVL21: + 165 0082 6043 muls r0, r4 + 166 0084 054B ldr r3, .L14+4 + 167 0086 1860 str r0, [r3] + 168 0088 CCE7 b .L7 + 169 .LVL22: + 170 .L13: + 223:Src/system_stm32f0xx.c **** } + 171 .loc 1 223 0 + 172 008a 0748 ldr r0, .L14+16 + 173 008c FFF7FEFF bl __aeabi_uidiv + 174 .LVL23: + 175 0090 6043 muls r0, r4 + 176 0092 024B ldr r3, .L14+4 + 177 0094 1860 str r0, [r3] + 178 0096 C5E7 b .L7 + 179 .L15: + 180 .align 2 + 181 .L14: + 182 0098 00100240 .word 1073876992 + 183 009c 00000000 .word .LANCHOR0 + 184 00a0 00127A00 .word 8000000 + 185 00a4 00000000 .word .LANCHOR1 + 186 00a8 006CDC02 .word 48000000 + 187 .cfi_endproc + 188 .LFE41: + 190 .global APBPrescTable + 191 .global AHBPrescTable + 192 .global SystemCoreClock + 193 .section .data.SystemCoreClock,"aw",%progbits + 194 .align 2 + 195 .set .LANCHOR0,. + 0 + 198 SystemCoreClock: + 199 0000 00127A00 .word 8000000 + 200 .section .rodata.AHBPrescTable,"a",%progbits + ARM GAS /tmp/ccfT8vne.s page 9 + + + 201 .align 2 + 202 .set .LANCHOR1,. + 0 + 205 AHBPrescTable: + 206 0000 00 .byte 0 + 207 0001 00 .byte 0 + 208 0002 00 .byte 0 + 209 0003 00 .byte 0 + 210 0004 00 .byte 0 + 211 0005 00 .byte 0 + 212 0006 00 .byte 0 + 213 0007 00 .byte 0 + 214 0008 01 .byte 1 + 215 0009 02 .byte 2 + 216 000a 03 .byte 3 + 217 000b 04 .byte 4 + 218 000c 06 .byte 6 + 219 000d 07 .byte 7 + 220 000e 08 .byte 8 + 221 000f 09 .byte 9 + 222 .section .rodata.APBPrescTable,"a",%progbits + 223 .align 2 + 226 APBPrescTable: + 227 0000 00 .byte 0 + 228 0001 00 .byte 0 + 229 0002 00 .byte 0 + 230 0003 00 .byte 0 + 231 0004 01 .byte 1 + 232 0005 02 .byte 2 + 233 0006 03 .byte 3 + 234 0007 04 .byte 4 + 235 .text + 236 .Letext0: + 237 .file 2 "/usr/include/newlib/machine/_default_types.h" + 238 .file 3 "/usr/include/newlib/sys/_stdint.h" + 239 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 240 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 241 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccfT8vne.s page 10 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 system_stm32f0xx.c + /tmp/ccfT8vne.s:16 .text.SystemInit:0000000000000000 $t + /tmp/ccfT8vne.s:23 .text.SystemInit:0000000000000000 SystemInit + /tmp/ccfT8vne.s:39 .text.SystemCoreClockUpdate:0000000000000000 $t + /tmp/ccfT8vne.s:46 .text.SystemCoreClockUpdate:0000000000000000 SystemCoreClockUpdate + /tmp/ccfT8vne.s:182 .text.SystemCoreClockUpdate:0000000000000098 $d + /tmp/ccfT8vne.s:226 .rodata.APBPrescTable:0000000000000000 APBPrescTable + /tmp/ccfT8vne.s:205 .rodata.AHBPrescTable:0000000000000000 AHBPrescTable + /tmp/ccfT8vne.s:198 .data.SystemCoreClock:0000000000000000 SystemCoreClock + /tmp/ccfT8vne.s:194 .data.SystemCoreClock:0000000000000000 $d + /tmp/ccfT8vne.s:201 .rodata.AHBPrescTable:0000000000000000 $d + /tmp/ccfT8vne.s:223 .rodata.APBPrescTable:0000000000000000 $d + +UNDEFINED SYMBOLS +__aeabi_uidiv diff --git a/fw/midi-dials/build/system_stm32f0xx.o b/fw/midi-dials/build/system_stm32f0xx.o Binary files differnew file mode 100644 index 0000000..ceb6ee1 --- /dev/null +++ b/fw/midi-dials/build/system_stm32f0xx.o diff --git a/fw/midi-dials/build/usb_device.d b/fw/midi-dials/build/usb_device.d new file mode 100644 index 0000000..d56bea0 --- /dev/null +++ b/fw/midi-dials/build/usb_device.d @@ -0,0 +1,127 @@ +build/usb_device.o: Src/usb_device.c Inc/usb_device.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Inc/usbd_conf.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ + Inc/usbd_desc.h Middlewares/USBMIDI/Inc/usbd_midi.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Inc/usbd_midi_if.h Inc/usbd_desc.h Inc/curelib_inc/curemisc.h \ + Inc/curelib_inc/curebuffer.h + +Inc/usb_device.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Inc/usbd_conf.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: + +Inc/usbd_desc.h: + +Middlewares/USBMIDI/Inc/usbd_midi.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Inc/usbd_midi_if.h: + +Inc/usbd_desc.h: + +Inc/curelib_inc/curemisc.h: + +Inc/curelib_inc/curebuffer.h: diff --git a/fw/midi-dials/build/usb_device.lst b/fw/midi-dials/build/usb_device.lst new file mode 100644 index 0000000..6ad058f --- /dev/null +++ b/fw/midi-dials/build/usb_device.lst @@ -0,0 +1,257 @@ +ARM GAS /tmp/cctPhfTd.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "usb_device.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.MX_USB_MIDI_INIT,"ax",%progbits + 16 .align 1 + 17 .global MX_USB_MIDI_INIT + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 MX_USB_MIDI_INIT: + 24 .LFB43: + 25 .file 1 "Src/usb_device.c" + 1:Src/usb_device.c **** /** + 2:Src/usb_device.c **** ****************************************************************************** + 3:Src/usb_device.c **** * @file : usb_device.c + 4:Src/usb_device.c **** * @version : v2.0_Cube + 5:Src/usb_device.c **** * @brief : This file implements the USB Device + 6:Src/usb_device.c **** ****************************************************************************** + 7:Src/usb_device.c **** * This notice applies to any and all portions of this file + 8:Src/usb_device.c **** * that are not between comment pairs USER CODE BEGIN and + 9:Src/usb_device.c **** * USER CODE END. Other portions of this file, whether + 10:Src/usb_device.c **** * inserted by the user or by software development tools + 11:Src/usb_device.c **** * are owned by their respective copyright owners. + 12:Src/usb_device.c **** * + 13:Src/usb_device.c **** * Copyright (c) 2018 STMicroelectronics International N.V. + 14:Src/usb_device.c **** * All rights reserved. + 15:Src/usb_device.c **** * + 16:Src/usb_device.c **** * Redistribution and use in source and binary forms, with or without + 17:Src/usb_device.c **** * modification, are permitted, provided that the following conditions are met: + 18:Src/usb_device.c **** * + 19:Src/usb_device.c **** * 1. Redistribution of source code must retain the above copyright notice, + 20:Src/usb_device.c **** * this list of conditions and the following disclaimer. + 21:Src/usb_device.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, + 22:Src/usb_device.c **** * this list of conditions and the following disclaimer in the documentation + 23:Src/usb_device.c **** * and/or other materials provided with the distribution. + 24:Src/usb_device.c **** * 3. Neither the name of STMicroelectronics nor the names of other + 25:Src/usb_device.c **** * contributors to this software may be used to endorse or promote products + 26:Src/usb_device.c **** * derived from this software without specific written permission. + 27:Src/usb_device.c **** * 4. This software, including modifications and/or derivative works of this + 28:Src/usb_device.c **** * software, must execute solely and exclusively on microcontroller or + 29:Src/usb_device.c **** * microprocessor devices manufactured by or for STMicroelectronics. + 30:Src/usb_device.c **** * 5. Redistribution and use of this software other than as permitted under + 31:Src/usb_device.c **** * this license is void and will automatically terminate your rights under + 32:Src/usb_device.c **** * this license. + 33:Src/usb_device.c **** * + ARM GAS /tmp/cctPhfTd.s page 2 + + + 34:Src/usb_device.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" + 35:Src/usb_device.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT + 36:Src/usb_device.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A + 37:Src/usb_device.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY + 38:Src/usb_device.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT + 39:Src/usb_device.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + 40:Src/usb_device.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + 41:Src/usb_device.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + 42:Src/usb_device.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + 43:Src/usb_device.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + 44:Src/usb_device.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + 45:Src/usb_device.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + 46:Src/usb_device.c **** * + 47:Src/usb_device.c **** ****************************************************************************** + 48:Src/usb_device.c **** */ + 49:Src/usb_device.c **** + 50:Src/usb_device.c **** /* Includes ------------------------------------------------------------------*/ + 51:Src/usb_device.c **** + 52:Src/usb_device.c **** #include "usb_device.h" + 53:Src/usb_device.c **** #include "usbd_core.h" + 54:Src/usb_device.c **** #include "usbd_desc.h" + 55:Src/usb_device.c **** + 56:Src/usb_device.c **** /* USER CODE BEGIN Includes */ + 57:Src/usb_device.c **** #include "usbd_midi.h" + 58:Src/usb_device.c **** #include "usbd_midi_if.h" + 59:Src/usb_device.c **** + 60:Src/usb_device.c **** /* USER CODE END Includes */ + 61:Src/usb_device.c **** + 62:Src/usb_device.c **** /* USER CODE BEGIN PV */ + 63:Src/usb_device.c **** /* Private variables ---------------------------------------------------------*/ + 64:Src/usb_device.c **** + 65:Src/usb_device.c **** /* USER CODE END PV */ + 66:Src/usb_device.c **** + 67:Src/usb_device.c **** /* USER CODE BEGIN PFP */ + 68:Src/usb_device.c **** /* Private function prototypes -----------------------------------------------*/ + 69:Src/usb_device.c **** + 70:Src/usb_device.c **** /* USER CODE END PFP */ + 71:Src/usb_device.c **** + 72:Src/usb_device.c **** /* USB Device Core handle declaration. */ + 73:Src/usb_device.c **** USBD_HandleTypeDef hUsbDeviceFS; + 74:Src/usb_device.c **** + 75:Src/usb_device.c **** /* + 76:Src/usb_device.c **** * -- Insert your variables declaration here -- + 77:Src/usb_device.c **** */ + 78:Src/usb_device.c **** /* USER CODE BEGIN 0 */ + 79:Src/usb_device.c **** + 80:Src/usb_device.c **** /* USER CODE END 0 */ + 81:Src/usb_device.c **** + 82:Src/usb_device.c **** /* + 83:Src/usb_device.c **** * -- Insert your external function declaration here -- + 84:Src/usb_device.c **** */ + 85:Src/usb_device.c **** /* USER CODE BEGIN 1 */ + 86:Src/usb_device.c **** + 87:Src/usb_device.c **** void MX_USB_MIDI_INIT(void) + 88:Src/usb_device.c **** { + 26 .loc 1 88 0 + 27 .cfi_startproc + ARM GAS /tmp/cctPhfTd.s page 3 + + + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 0000 10B5 push {r4, lr} + 31 .LCFI0: + 32 .cfi_def_cfa_offset 8 + 33 .cfi_offset 4, -8 + 34 .cfi_offset 14, -4 + 89:Src/usb_device.c **** USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS); + 35 .loc 1 89 0 + 36 0002 094C ldr r4, .L2 + 37 0004 0022 movs r2, #0 + 38 0006 0949 ldr r1, .L2+4 + 39 0008 2000 movs r0, r4 + 40 000a FFF7FEFF bl USBD_Init + 41 .LVL0: + 90:Src/usb_device.c **** + 91:Src/usb_device.c **** USBD_RegisterClass(&hUsbDeviceFS, &USBD_MIDI); + 42 .loc 1 91 0 + 43 000e 0849 ldr r1, .L2+8 + 44 0010 2000 movs r0, r4 + 45 0012 FFF7FEFF bl USBD_RegisterClass + 46 .LVL1: + 92:Src/usb_device.c **** + 93:Src/usb_device.c **** USBD_MIDI_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS); + 47 .loc 1 93 0 + 48 0016 0749 ldr r1, .L2+12 + 49 0018 2000 movs r0, r4 + 50 001a FFF7FEFF bl USBD_MIDI_RegisterInterface + 51 .LVL2: + 94:Src/usb_device.c **** + 95:Src/usb_device.c **** USBD_Start(&hUsbDeviceFS); + 52 .loc 1 95 0 + 53 001e 2000 movs r0, r4 + 54 0020 FFF7FEFF bl USBD_Start + 55 .LVL3: + 96:Src/usb_device.c **** } + 56 .loc 1 96 0 + 57 @ sp needed + 58 0024 10BD pop {r4, pc} + 59 .L3: + 60 0026 C046 .align 2 + 61 .L2: + 62 0028 00000000 .word hUsbDeviceFS + 63 002c 00000000 .word FS_Desc + 64 0030 00000000 .word USBD_MIDI + 65 0034 00000000 .word USBD_Interface_fops_FS + 66 .cfi_endproc + 67 .LFE43: + 69 .section .text.MX_USB_DEVICE_Init,"ax",%progbits + 70 .align 1 + 71 .global MX_USB_DEVICE_Init + 72 .syntax unified + 73 .code 16 + 74 .thumb_func + 75 .fpu softvfp + 77 MX_USB_DEVICE_Init: + 78 .LFB44: + ARM GAS /tmp/cctPhfTd.s page 4 + + + 97:Src/usb_device.c **** + 98:Src/usb_device.c **** /* USER CODE END 1 */ + 99:Src/usb_device.c **** + 100:Src/usb_device.c **** /** + 101:Src/usb_device.c **** * Init USB device Library, add supported class and start the library + 102:Src/usb_device.c **** * @retval None + 103:Src/usb_device.c **** */ + 104:Src/usb_device.c **** void MX_USB_DEVICE_Init(void) + 105:Src/usb_device.c **** { + 79 .loc 1 105 0 + 80 .cfi_startproc + 81 @ args = 0, pretend = 0, frame = 0 + 82 @ frame_needed = 0, uses_anonymous_args = 0 + 83 @ link register save eliminated. + 106:Src/usb_device.c **** /* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */ + 107:Src/usb_device.c **** #ifdef USBMIDI + 108:Src/usb_device.c **** /* USER CODE END USB_DEVICE_Init_PreTreatment */ + 109:Src/usb_device.c **** + 110:Src/usb_device.c **** /* Init Device Library, add supported class and start the library. */ + 111:Src/usb_device.c **** USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS); + 112:Src/usb_device.c **** + 113:Src/usb_device.c **** USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC); + 114:Src/usb_device.c **** + 115:Src/usb_device.c **** USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS); + 116:Src/usb_device.c **** + 117:Src/usb_device.c **** USBD_Start(&hUsbDeviceFS); + 118:Src/usb_device.c **** + 119:Src/usb_device.c **** /* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */ + 120:Src/usb_device.c **** #endif + 121:Src/usb_device.c **** /* USER CODE END USB_DEVICE_Init_PostTreatment */ + 122:Src/usb_device.c **** } + 84 .loc 1 122 0 + 85 @ sp needed + 86 0000 7047 bx lr + 87 .cfi_endproc + 88 .LFE44: + 90 .comm hUsbDeviceFS,548,4 + 91 .text + 92 .Letext0: + 93 .file 2 "/usr/include/newlib/machine/_default_types.h" + 94 .file 3 "/usr/include/newlib/sys/_stdint.h" + 95 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 96 .file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 97 .file 6 "/usr/include/newlib/sys/lock.h" + 98 .file 7 "/usr/include/newlib/sys/_types.h" + 99 .file 8 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 100 .file 9 "/usr/include/newlib/sys/reent.h" + 101 .file 10 "/usr/include/newlib/stdlib.h" + 102 .file 11 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h" + 103 .file 12 "Inc/usb_device.h" + 104 .file 13 "Inc/usbd_desc.h" + 105 .file 14 "Middlewares/USBMIDI/Inc/usbd_midi.h" + 106 .file 15 "Inc/usbd_midi_if.h" + 107 .file 16 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h" + ARM GAS /tmp/cctPhfTd.s page 5 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 usb_device.c + /tmp/cctPhfTd.s:16 .text.MX_USB_MIDI_INIT:0000000000000000 $t + /tmp/cctPhfTd.s:23 .text.MX_USB_MIDI_INIT:0000000000000000 MX_USB_MIDI_INIT + /tmp/cctPhfTd.s:62 .text.MX_USB_MIDI_INIT:0000000000000028 $d + *COM*:0000000000000224 hUsbDeviceFS + /tmp/cctPhfTd.s:70 .text.MX_USB_DEVICE_Init:0000000000000000 $t + /tmp/cctPhfTd.s:77 .text.MX_USB_DEVICE_Init:0000000000000000 MX_USB_DEVICE_Init + +UNDEFINED SYMBOLS +USBD_Init +USBD_RegisterClass +USBD_MIDI_RegisterInterface +USBD_Start +FS_Desc +USBD_MIDI +USBD_Interface_fops_FS diff --git a/fw/midi-dials/build/usb_device.o b/fw/midi-dials/build/usb_device.o Binary files differnew file mode 100644 index 0000000..68bb036 --- /dev/null +++ b/fw/midi-dials/build/usb_device.o diff --git a/fw/midi-dials/build/usbd_conf.d b/fw/midi-dials/build/usbd_conf.d new file mode 100644 index 0000000..0942e35 --- /dev/null +++ b/fw/midi-dials/build/usbd_conf.d @@ -0,0 +1,107 @@ +build/usbd_conf.o: Src/usbd_conf.c \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Inc/usbd_conf.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Inc/usbd_conf.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/fw/midi-dials/build/usbd_conf.lst b/fw/midi-dials/build/usbd_conf.lst new file mode 100644 index 0000000..1d03ddb --- /dev/null +++ b/fw/midi-dials/build/usbd_conf.lst @@ -0,0 +1,2429 @@ +ARM GAS /tmp/ccvOfDqw.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "usbd_conf.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_PCD_MspInit,"ax",%progbits + 16 .align 1 + 17 .global HAL_PCD_MspInit + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_PCD_MspInit: + 24 .LFB43: + 25 .file 1 "Src/usbd_conf.c" + 1:Src/usbd_conf.c **** /** + 2:Src/usbd_conf.c **** ****************************************************************************** + 3:Src/usbd_conf.c **** * @file : usbd_conf.c + 4:Src/usbd_conf.c **** * @version : v2.0_Cube + 5:Src/usbd_conf.c **** * @brief : This file implements the board support package for the USB device library + 6:Src/usbd_conf.c **** ****************************************************************************** + 7:Src/usbd_conf.c **** * This notice applies to any and all portions of this file + 8:Src/usbd_conf.c **** * that are not between comment pairs USER CODE BEGIN and + 9:Src/usbd_conf.c **** * USER CODE END. Other portions of this file, whether + 10:Src/usbd_conf.c **** * inserted by the user or by software development tools + 11:Src/usbd_conf.c **** * are owned by their respective copyright owners. + 12:Src/usbd_conf.c **** * + 13:Src/usbd_conf.c **** * Copyright (c) 2018 STMicroelectronics International N.V. + 14:Src/usbd_conf.c **** * All rights reserved. + 15:Src/usbd_conf.c **** * + 16:Src/usbd_conf.c **** * Redistribution and use in source and binary forms, with or without + 17:Src/usbd_conf.c **** * modification, are permitted, provided that the following conditions are met: + 18:Src/usbd_conf.c **** * + 19:Src/usbd_conf.c **** * 1. Redistribution of source code must retain the above copyright notice, + 20:Src/usbd_conf.c **** * this list of conditions and the following disclaimer. + 21:Src/usbd_conf.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, + 22:Src/usbd_conf.c **** * this list of conditions and the following disclaimer in the documentation + 23:Src/usbd_conf.c **** * and/or other materials provided with the distribution. + 24:Src/usbd_conf.c **** * 3. Neither the name of STMicroelectronics nor the names of other + 25:Src/usbd_conf.c **** * contributors to this software may be used to endorse or promote products + 26:Src/usbd_conf.c **** * derived from this software without specific written permission. + 27:Src/usbd_conf.c **** * 4. This software, including modifications and/or derivative works of this + 28:Src/usbd_conf.c **** * software, must execute solely and exclusively on microcontroller or + 29:Src/usbd_conf.c **** * microprocessor devices manufactured by or for STMicroelectronics. + 30:Src/usbd_conf.c **** * 5. Redistribution and use of this software other than as permitted under + 31:Src/usbd_conf.c **** * this license is void and will automatically terminate your rights under + 32:Src/usbd_conf.c **** * this license. + 33:Src/usbd_conf.c **** * + ARM GAS /tmp/ccvOfDqw.s page 2 + + + 34:Src/usbd_conf.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" + 35:Src/usbd_conf.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT + 36:Src/usbd_conf.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A + 37:Src/usbd_conf.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY + 38:Src/usbd_conf.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT + 39:Src/usbd_conf.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + 40:Src/usbd_conf.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + 41:Src/usbd_conf.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + 42:Src/usbd_conf.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + 43:Src/usbd_conf.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + 44:Src/usbd_conf.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + 45:Src/usbd_conf.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + 46:Src/usbd_conf.c **** * + 47:Src/usbd_conf.c **** ****************************************************************************** + 48:Src/usbd_conf.c **** */ + 49:Src/usbd_conf.c **** + 50:Src/usbd_conf.c **** /* Includes ------------------------------------------------------------------*/ + 51:Src/usbd_conf.c **** #include "stm32f0xx.h" + 52:Src/usbd_conf.c **** #include "stm32f0xx_hal.h" + 53:Src/usbd_conf.c **** #include "usbd_def.h" + 54:Src/usbd_conf.c **** #include "usbd_core.h" + 55:Src/usbd_conf.c **** + 56:Src/usbd_conf.c **** /* USER CODE BEGIN Includes */ + 57:Src/usbd_conf.c **** + 58:Src/usbd_conf.c **** /* USER CODE END Includes */ + 59:Src/usbd_conf.c **** + 60:Src/usbd_conf.c **** /* Private typedef -----------------------------------------------------------*/ + 61:Src/usbd_conf.c **** /* Private define ------------------------------------------------------------*/ + 62:Src/usbd_conf.c **** /* Private macro -------------------------------------------------------------*/ + 63:Src/usbd_conf.c **** + 64:Src/usbd_conf.c **** /* USER CODE BEGIN PV */ + 65:Src/usbd_conf.c **** /* Private variables ---------------------------------------------------------*/ + 66:Src/usbd_conf.c **** + 67:Src/usbd_conf.c **** /* USER CODE END PV */ + 68:Src/usbd_conf.c **** + 69:Src/usbd_conf.c **** PCD_HandleTypeDef hpcd_USB_FS; + 70:Src/usbd_conf.c **** //void _Error_Handler(char * file, int line); + 71:Src/usbd_conf.c **** + 72:Src/usbd_conf.c **** /* USER CODE BEGIN 0 */ + 73:Src/usbd_conf.c **** + 74:Src/usbd_conf.c **** /* USER CODE END 0 */ + 75:Src/usbd_conf.c **** + 76:Src/usbd_conf.c **** /* USER CODE BEGIN PFP */ + 77:Src/usbd_conf.c **** /* Private function prototypes -----------------------------------------------*/ + 78:Src/usbd_conf.c **** + 79:Src/usbd_conf.c **** /* USER CODE END PFP */ + 80:Src/usbd_conf.c **** + 81:Src/usbd_conf.c **** /* Private functions ---------------------------------------------------------*/ + 82:Src/usbd_conf.c **** + 83:Src/usbd_conf.c **** /* USER CODE BEGIN 1 */ + 84:Src/usbd_conf.c **** + 85:Src/usbd_conf.c **** /* USER CODE END 1 */ + 86:Src/usbd_conf.c **** void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state); + 87:Src/usbd_conf.c **** //extern void SystemClock_Config(void); + 88:Src/usbd_conf.c **** + 89:Src/usbd_conf.c **** /******************************************************************************* + 90:Src/usbd_conf.c **** LL Driver Callbacks (PCD -> USB Device Library) + ARM GAS /tmp/ccvOfDqw.s page 3 + + + 91:Src/usbd_conf.c **** *******************************************************************************/ + 92:Src/usbd_conf.c **** /* MSP Init */ + 93:Src/usbd_conf.c **** + 94:Src/usbd_conf.c **** void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle) + 95:Src/usbd_conf.c **** { + 26 .loc 1 95 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 8 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 00B5 push {lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 4 + 34 .cfi_offset 14, -4 + 35 0002 83B0 sub sp, sp, #12 + 36 .LCFI1: + 37 .cfi_def_cfa_offset 16 + 96:Src/usbd_conf.c **** if(pcdHandle->Instance==USB) + 38 .loc 1 96 0 + 39 0004 0268 ldr r2, [r0] + 40 0006 0C4B ldr r3, .L4 + 41 0008 9A42 cmp r2, r3 + 42 000a 01D0 beq .L3 + 43 .LVL1: + 44 .L1: + 97:Src/usbd_conf.c **** { + 98:Src/usbd_conf.c **** /* USER CODE BEGIN USB_MspInit 0 */ + 99:Src/usbd_conf.c **** + 100:Src/usbd_conf.c **** /* USER CODE END USB_MspInit 0 */ + 101:Src/usbd_conf.c **** /* Peripheral clock enable */ + 102:Src/usbd_conf.c **** __HAL_RCC_USB_CLK_ENABLE(); + 103:Src/usbd_conf.c **** + 104:Src/usbd_conf.c **** /* Peripheral interrupt init */ + 105:Src/usbd_conf.c **** HAL_NVIC_SetPriority(USB_IRQn, 1, 0); + 106:Src/usbd_conf.c **** HAL_NVIC_EnableIRQ(USB_IRQn); + 107:Src/usbd_conf.c **** /* USER CODE BEGIN USB_MspInit 1 */ + 108:Src/usbd_conf.c **** + 109:Src/usbd_conf.c **** /* USER CODE END USB_MspInit 1 */ + 110:Src/usbd_conf.c **** } + 111:Src/usbd_conf.c **** } + 45 .loc 1 111 0 + 46 000c 03B0 add sp, sp, #12 + 47 @ sp needed + 48 000e 00BD pop {pc} + 49 .LVL2: + 50 .L3: + 51 .LBB2: + 102:Src/usbd_conf.c **** + 52 .loc 1 102 0 + 53 0010 0A4A ldr r2, .L4+4 + 54 0012 D169 ldr r1, [r2, #28] + 55 0014 8020 movs r0, #128 + 56 .LVL3: + 57 0016 0004 lsls r0, r0, #16 + 58 0018 0143 orrs r1, r0 + 59 001a D161 str r1, [r2, #28] + 60 001c D369 ldr r3, [r2, #28] + ARM GAS /tmp/ccvOfDqw.s page 4 + + + 61 001e 0340 ands r3, r0 + 62 0020 0193 str r3, [sp, #4] + 63 0022 019B ldr r3, [sp, #4] + 64 .LBE2: + 105:Src/usbd_conf.c **** HAL_NVIC_EnableIRQ(USB_IRQn); + 65 .loc 1 105 0 + 66 0024 0022 movs r2, #0 + 67 0026 0121 movs r1, #1 + 68 0028 1F20 movs r0, #31 + 69 002a FFF7FEFF bl HAL_NVIC_SetPriority + 70 .LVL4: + 106:Src/usbd_conf.c **** /* USER CODE BEGIN USB_MspInit 1 */ + 71 .loc 1 106 0 + 72 002e 1F20 movs r0, #31 + 73 0030 FFF7FEFF bl HAL_NVIC_EnableIRQ + 74 .LVL5: + 75 .loc 1 111 0 + 76 0034 EAE7 b .L1 + 77 .L5: + 78 0036 C046 .align 2 + 79 .L4: + 80 0038 005C0040 .word 1073765376 + 81 003c 00100240 .word 1073876992 + 82 .cfi_endproc + 83 .LFE43: + 85 .section .text.HAL_PCD_MspDeInit,"ax",%progbits + 86 .align 1 + 87 .global HAL_PCD_MspDeInit + 88 .syntax unified + 89 .code 16 + 90 .thumb_func + 91 .fpu softvfp + 93 HAL_PCD_MspDeInit: + 94 .LFB44: + 112:Src/usbd_conf.c **** + 113:Src/usbd_conf.c **** void HAL_PCD_MspDeInit(PCD_HandleTypeDef* pcdHandle) + 114:Src/usbd_conf.c **** { + 95 .loc 1 114 0 + 96 .cfi_startproc + 97 @ args = 0, pretend = 0, frame = 0 + 98 @ frame_needed = 0, uses_anonymous_args = 0 + 99 .LVL6: + 100 0000 10B5 push {r4, lr} + 101 .LCFI2: + 102 .cfi_def_cfa_offset 8 + 103 .cfi_offset 4, -8 + 104 .cfi_offset 14, -4 + 115:Src/usbd_conf.c **** if(pcdHandle->Instance==USB) + 105 .loc 1 115 0 + 106 0002 0268 ldr r2, [r0] + 107 0004 064B ldr r3, .L9 + 108 0006 9A42 cmp r2, r3 + 109 0008 00D0 beq .L8 + 110 .LVL7: + 111 .L6: + 116:Src/usbd_conf.c **** { + 117:Src/usbd_conf.c **** /* USER CODE BEGIN USB_MspDeInit 0 */ + ARM GAS /tmp/ccvOfDqw.s page 5 + + + 118:Src/usbd_conf.c **** + 119:Src/usbd_conf.c **** /* USER CODE END USB_MspDeInit 0 */ + 120:Src/usbd_conf.c **** /* Peripheral clock disable */ + 121:Src/usbd_conf.c **** __HAL_RCC_USB_CLK_DISABLE(); + 122:Src/usbd_conf.c **** + 123:Src/usbd_conf.c **** /* Peripheral interrupt Deinit*/ + 124:Src/usbd_conf.c **** HAL_NVIC_DisableIRQ(USB_IRQn); + 125:Src/usbd_conf.c **** + 126:Src/usbd_conf.c **** /* USER CODE BEGIN USB_MspDeInit 1 */ + 127:Src/usbd_conf.c **** + 128:Src/usbd_conf.c **** /* USER CODE END USB_MspDeInit 1 */ + 129:Src/usbd_conf.c **** } + 130:Src/usbd_conf.c **** } + 112 .loc 1 130 0 + 113 @ sp needed + 114 000a 10BD pop {r4, pc} + 115 .LVL8: + 116 .L8: + 121:Src/usbd_conf.c **** + 117 .loc 1 121 0 + 118 000c 054A ldr r2, .L9+4 + 119 000e D369 ldr r3, [r2, #28] + 120 0010 0549 ldr r1, .L9+8 + 121 0012 0B40 ands r3, r1 + 122 0014 D361 str r3, [r2, #28] + 124:Src/usbd_conf.c **** + 123 .loc 1 124 0 + 124 0016 1F20 movs r0, #31 + 125 .LVL9: + 126 0018 FFF7FEFF bl HAL_NVIC_DisableIRQ + 127 .LVL10: + 128 .loc 1 130 0 + 129 001c F5E7 b .L6 + 130 .L10: + 131 001e C046 .align 2 + 132 .L9: + 133 0020 005C0040 .word 1073765376 + 134 0024 00100240 .word 1073876992 + 135 0028 FFFF7FFF .word -8388609 + 136 .cfi_endproc + 137 .LFE44: + 139 .section .text.HAL_PCD_SetupStageCallback,"ax",%progbits + 140 .align 1 + 141 .global HAL_PCD_SetupStageCallback + 142 .syntax unified + 143 .code 16 + 144 .thumb_func + 145 .fpu softvfp + 147 HAL_PCD_SetupStageCallback: + 148 .LFB45: + 131:Src/usbd_conf.c **** + 132:Src/usbd_conf.c **** /** + 133:Src/usbd_conf.c **** * @brief Setup stage callback + 134:Src/usbd_conf.c **** * @param hpcd: PCD handle + 135:Src/usbd_conf.c **** * @retval None + 136:Src/usbd_conf.c **** */ + 137:Src/usbd_conf.c **** void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) + ARM GAS /tmp/ccvOfDqw.s page 6 + + + 138:Src/usbd_conf.c **** { + 149 .loc 1 138 0 + 150 .cfi_startproc + 151 @ args = 0, pretend = 0, frame = 0 + 152 @ frame_needed = 0, uses_anonymous_args = 0 + 153 .LVL11: + 154 0000 10B5 push {r4, lr} + 155 .LCFI3: + 156 .cfi_def_cfa_offset 8 + 157 .cfi_offset 4, -8 + 158 .cfi_offset 14, -4 + 159 0002 0100 movs r1, r0 + 139:Src/usbd_conf.c **** USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup); + 160 .loc 1 139 0 + 161 0004 9C23 movs r3, #156 + 162 0006 9B00 lsls r3, r3, #2 + 163 0008 C058 ldr r0, [r0, r3] + 164 .LVL12: + 165 000a 403B subs r3, r3, #64 + 166 000c 9C46 mov ip, r3 + 167 000e 6144 add r1, r1, ip + 168 .LVL13: + 169 0010 FFF7FEFF bl USBD_LL_SetupStage + 170 .LVL14: + 140:Src/usbd_conf.c **** } + 171 .loc 1 140 0 + 172 @ sp needed + 173 0014 10BD pop {r4, pc} + 174 .cfi_endproc + 175 .LFE45: + 177 .section .text.HAL_PCD_DataOutStageCallback,"ax",%progbits + 178 .align 1 + 179 .global HAL_PCD_DataOutStageCallback + 180 .syntax unified + 181 .code 16 + 182 .thumb_func + 183 .fpu softvfp + 185 HAL_PCD_DataOutStageCallback: + 186 .LFB46: + 141:Src/usbd_conf.c **** + 142:Src/usbd_conf.c **** /** + 143:Src/usbd_conf.c **** * @brief Data Out stage callback. + 144:Src/usbd_conf.c **** * @param hpcd: PCD handle + 145:Src/usbd_conf.c **** * @param epnum: Endpoint number + 146:Src/usbd_conf.c **** * @retval None + 147:Src/usbd_conf.c **** */ + 148:Src/usbd_conf.c **** void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) + 149:Src/usbd_conf.c **** { + 187 .loc 1 149 0 + 188 .cfi_startproc + 189 @ args = 0, pretend = 0, frame = 0 + 190 @ frame_needed = 0, uses_anonymous_args = 0 + 191 .LVL15: + 192 0000 10B5 push {r4, lr} + 193 .LCFI4: + 194 .cfi_def_cfa_offset 8 + 195 .cfi_offset 4, -8 + ARM GAS /tmp/ccvOfDqw.s page 7 + + + 196 .cfi_offset 14, -4 + 197 0002 0300 movs r3, r0 + 150:Src/usbd_conf.c **** USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff); + 198 .loc 1 150 0 + 199 0004 9C22 movs r2, #156 + 200 0006 9200 lsls r2, r2, #2 + 201 0008 8058 ldr r0, [r0, r2] + 202 .LVL16: + 203 000a 4A01 lsls r2, r1, #5 + 204 000c 9B18 adds r3, r3, r2 + 205 .LVL17: + 206 000e 3D33 adds r3, r3, #61 + 207 0010 FF33 adds r3, r3, #255 + 208 0012 1A68 ldr r2, [r3] + 209 0014 FFF7FEFF bl USBD_LL_DataOutStage + 210 .LVL18: + 151:Src/usbd_conf.c **** } + 211 .loc 1 151 0 + 212 @ sp needed + 213 0018 10BD pop {r4, pc} + 214 .cfi_endproc + 215 .LFE46: + 217 .section .text.HAL_PCD_DataInStageCallback,"ax",%progbits + 218 .align 1 + 219 .global HAL_PCD_DataInStageCallback + 220 .syntax unified + 221 .code 16 + 222 .thumb_func + 223 .fpu softvfp + 225 HAL_PCD_DataInStageCallback: + 226 .LFB47: + 152:Src/usbd_conf.c **** + 153:Src/usbd_conf.c **** /** + 154:Src/usbd_conf.c **** * @brief Data In stage callback. + 155:Src/usbd_conf.c **** * @param hpcd: PCD handle + 156:Src/usbd_conf.c **** * @param epnum: Endpoint number + 157:Src/usbd_conf.c **** * @retval None + 158:Src/usbd_conf.c **** */ + 159:Src/usbd_conf.c **** void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) + 160:Src/usbd_conf.c **** { + 227 .loc 1 160 0 + 228 .cfi_startproc + 229 @ args = 0, pretend = 0, frame = 0 + 230 @ frame_needed = 0, uses_anonymous_args = 0 + 231 .LVL19: + 232 0000 10B5 push {r4, lr} + 233 .LCFI5: + 234 .cfi_def_cfa_offset 8 + 235 .cfi_offset 4, -8 + 236 .cfi_offset 14, -4 + 237 0002 0300 movs r3, r0 + 161:Src/usbd_conf.c **** USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff); + 238 .loc 1 161 0 + 239 0004 9C22 movs r2, #156 + 240 0006 9200 lsls r2, r2, #2 + 241 0008 8058 ldr r0, [r0, r2] + 242 .LVL20: + ARM GAS /tmp/ccvOfDqw.s page 8 + + + 243 000a 4A01 lsls r2, r1, #5 + 244 000c 9B18 adds r3, r3, r2 + 245 .LVL21: + 246 000e DA6B ldr r2, [r3, #60] + 247 0010 FFF7FEFF bl USBD_LL_DataInStage + 248 .LVL22: + 162:Src/usbd_conf.c **** } + 249 .loc 1 162 0 + 250 @ sp needed + 251 0014 10BD pop {r4, pc} + 252 .cfi_endproc + 253 .LFE47: + 255 .section .text.HAL_PCD_SOFCallback,"ax",%progbits + 256 .align 1 + 257 .global HAL_PCD_SOFCallback + 258 .syntax unified + 259 .code 16 + 260 .thumb_func + 261 .fpu softvfp + 263 HAL_PCD_SOFCallback: + 264 .LFB48: + 163:Src/usbd_conf.c **** + 164:Src/usbd_conf.c **** /** + 165:Src/usbd_conf.c **** * @brief SOF callback. + 166:Src/usbd_conf.c **** * @param hpcd: PCD handle + 167:Src/usbd_conf.c **** * @retval None + 168:Src/usbd_conf.c **** */ + 169:Src/usbd_conf.c **** void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) + 170:Src/usbd_conf.c **** { + 265 .loc 1 170 0 + 266 .cfi_startproc + 267 @ args = 0, pretend = 0, frame = 0 + 268 @ frame_needed = 0, uses_anonymous_args = 0 + 269 .LVL23: + 270 0000 10B5 push {r4, lr} + 271 .LCFI6: + 272 .cfi_def_cfa_offset 8 + 273 .cfi_offset 4, -8 + 274 .cfi_offset 14, -4 + 171:Src/usbd_conf.c **** USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData); + 275 .loc 1 171 0 + 276 0002 9C23 movs r3, #156 + 277 0004 9B00 lsls r3, r3, #2 + 278 0006 C058 ldr r0, [r0, r3] + 279 .LVL24: + 280 0008 FFF7FEFF bl USBD_LL_SOF + 281 .LVL25: + 172:Src/usbd_conf.c **** } + 282 .loc 1 172 0 + 283 @ sp needed + 284 000c 10BD pop {r4, pc} + 285 .cfi_endproc + 286 .LFE48: + 288 .section .text.HAL_PCD_ResetCallback,"ax",%progbits + 289 .align 1 + 290 .global HAL_PCD_ResetCallback + 291 .syntax unified + ARM GAS /tmp/ccvOfDqw.s page 9 + + + 292 .code 16 + 293 .thumb_func + 294 .fpu softvfp + 296 HAL_PCD_ResetCallback: + 297 .LFB49: + 173:Src/usbd_conf.c **** + 174:Src/usbd_conf.c **** /** + 175:Src/usbd_conf.c **** * @brief Reset callback. + 176:Src/usbd_conf.c **** * @param hpcd: PCD handle + 177:Src/usbd_conf.c **** * @retval None + 178:Src/usbd_conf.c **** */ + 179:Src/usbd_conf.c **** void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) + 180:Src/usbd_conf.c **** { + 298 .loc 1 180 0 + 299 .cfi_startproc + 300 @ args = 0, pretend = 0, frame = 0 + 301 @ frame_needed = 0, uses_anonymous_args = 0 + 302 .LVL26: + 303 0000 70B5 push {r4, r5, r6, lr} + 304 .LCFI7: + 305 .cfi_def_cfa_offset 16 + 306 .cfi_offset 4, -16 + 307 .cfi_offset 5, -12 + 308 .cfi_offset 6, -8 + 309 .cfi_offset 14, -4 + 310 0002 0500 movs r5, r0 + 311 .LVL27: + 181:Src/usbd_conf.c **** USBD_SpeedTypeDef speed = USBD_SPEED_FULL; + 182:Src/usbd_conf.c **** + 183:Src/usbd_conf.c **** /* Set USB current speed. */ + 184:Src/usbd_conf.c **** switch (hpcd->Init.speed) + 185:Src/usbd_conf.c **** { + 186:Src/usbd_conf.c **** case PCD_SPEED_FULL: + 187:Src/usbd_conf.c **** speed = USBD_SPEED_FULL; + 188:Src/usbd_conf.c **** break; + 189:Src/usbd_conf.c **** + 190:Src/usbd_conf.c **** default: + 191:Src/usbd_conf.c **** speed = USBD_SPEED_FULL; + 192:Src/usbd_conf.c **** break; + 193:Src/usbd_conf.c **** } + 194:Src/usbd_conf.c **** USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed); + 312 .loc 1 194 0 + 313 0004 9C24 movs r4, #156 + 314 0006 A400 lsls r4, r4, #2 + 315 0008 0121 movs r1, #1 + 316 000a 0059 ldr r0, [r0, r4] + 317 .LVL28: + 318 000c FFF7FEFF bl USBD_LL_SetSpeed + 319 .LVL29: + 195:Src/usbd_conf.c **** + 196:Src/usbd_conf.c **** /* Reset Device. */ + 197:Src/usbd_conf.c **** USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData); + 320 .loc 1 197 0 + 321 0010 2859 ldr r0, [r5, r4] + 322 0012 FFF7FEFF bl USBD_LL_Reset + 323 .LVL30: + 198:Src/usbd_conf.c **** } + ARM GAS /tmp/ccvOfDqw.s page 10 + + + 324 .loc 1 198 0 + 325 @ sp needed + 326 .LVL31: + 327 0016 70BD pop {r4, r5, r6, pc} + 328 .cfi_endproc + 329 .LFE49: + 331 .section .text.HAL_PCD_SuspendCallback,"ax",%progbits + 332 .align 1 + 333 .global HAL_PCD_SuspendCallback + 334 .syntax unified + 335 .code 16 + 336 .thumb_func + 337 .fpu softvfp + 339 HAL_PCD_SuspendCallback: + 340 .LFB50: + 199:Src/usbd_conf.c **** + 200:Src/usbd_conf.c **** /** + 201:Src/usbd_conf.c **** * @brief Suspend callback. + 202:Src/usbd_conf.c **** * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it) + 203:Src/usbd_conf.c **** * @param hpcd: PCD handle + 204:Src/usbd_conf.c **** * @retval None + 205:Src/usbd_conf.c **** */ + 206:Src/usbd_conf.c **** void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) + 207:Src/usbd_conf.c **** { + 341 .loc 1 207 0 + 342 .cfi_startproc + 343 @ args = 0, pretend = 0, frame = 0 + 344 @ frame_needed = 0, uses_anonymous_args = 0 + 345 .LVL32: + 346 0000 10B5 push {r4, lr} + 347 .LCFI8: + 348 .cfi_def_cfa_offset 8 + 349 .cfi_offset 4, -8 + 350 .cfi_offset 14, -4 + 351 0002 0400 movs r4, r0 + 208:Src/usbd_conf.c **** /* Inform USB library that core enters in suspend Mode. */ + 209:Src/usbd_conf.c **** USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData); + 352 .loc 1 209 0 + 353 0004 9C23 movs r3, #156 + 354 0006 9B00 lsls r3, r3, #2 + 355 0008 C058 ldr r0, [r0, r3] + 356 .LVL33: + 357 000a FFF7FEFF bl USBD_LL_Suspend + 358 .LVL34: + 210:Src/usbd_conf.c **** /* Enter in STOP mode. */ + 211:Src/usbd_conf.c **** /* USER CODE BEGIN 2 */ + 212:Src/usbd_conf.c **** if (hpcd->Init.low_power_enable) + 359 .loc 1 212 0 + 360 000e A369 ldr r3, [r4, #24] + 361 0010 002B cmp r3, #0 + 362 0012 04D0 beq .L16 + 213:Src/usbd_conf.c **** { + 214:Src/usbd_conf.c **** /* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */ + 215:Src/usbd_conf.c **** SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); + 363 .loc 1 215 0 + 364 0014 024A ldr r2, .L18 + 365 0016 1369 ldr r3, [r2, #16] + ARM GAS /tmp/ccvOfDqw.s page 11 + + + 366 0018 0621 movs r1, #6 + 367 001a 0B43 orrs r3, r1 + 368 001c 1361 str r3, [r2, #16] + 369 .L16: + 216:Src/usbd_conf.c **** } + 217:Src/usbd_conf.c **** /* USER CODE END 2 */ + 218:Src/usbd_conf.c **** } + 370 .loc 1 218 0 + 371 @ sp needed + 372 .LVL35: + 373 001e 10BD pop {r4, pc} + 374 .L19: + 375 .align 2 + 376 .L18: + 377 0020 00ED00E0 .word -536810240 + 378 .cfi_endproc + 379 .LFE50: + 381 .section .text.HAL_PCD_ResumeCallback,"ax",%progbits + 382 .align 1 + 383 .global HAL_PCD_ResumeCallback + 384 .syntax unified + 385 .code 16 + 386 .thumb_func + 387 .fpu softvfp + 389 HAL_PCD_ResumeCallback: + 390 .LFB51: + 219:Src/usbd_conf.c **** + 220:Src/usbd_conf.c **** /** + 221:Src/usbd_conf.c **** * @brief Resume callback. + 222:Src/usbd_conf.c **** * When Low power mode is enabled the debug cannot be used (IAR, Keil doesn't support it) + 223:Src/usbd_conf.c **** * @param hpcd: PCD handle + 224:Src/usbd_conf.c **** * @retval None + 225:Src/usbd_conf.c **** */ + 226:Src/usbd_conf.c **** void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) + 227:Src/usbd_conf.c **** { + 391 .loc 1 227 0 + 392 .cfi_startproc + 393 @ args = 0, pretend = 0, frame = 0 + 394 @ frame_needed = 0, uses_anonymous_args = 0 + 395 .LVL36: + 396 0000 10B5 push {r4, lr} + 397 .LCFI9: + 398 .cfi_def_cfa_offset 8 + 399 .cfi_offset 4, -8 + 400 .cfi_offset 14, -4 + 228:Src/usbd_conf.c **** /* USER CODE BEGIN 3 */ + 229:Src/usbd_conf.c **** + 230:Src/usbd_conf.c **** /* USER CODE END 3 */ + 231:Src/usbd_conf.c **** USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData); + 401 .loc 1 231 0 + 402 0002 9C23 movs r3, #156 + 403 0004 9B00 lsls r3, r3, #2 + 404 0006 C058 ldr r0, [r0, r3] + 405 .LVL37: + 406 0008 FFF7FEFF bl USBD_LL_Resume + 407 .LVL38: + 232:Src/usbd_conf.c **** } + ARM GAS /tmp/ccvOfDqw.s page 12 + + + 408 .loc 1 232 0 + 409 @ sp needed + 410 000c 10BD pop {r4, pc} + 411 .cfi_endproc + 412 .LFE51: + 414 .section .text.HAL_PCD_ISOOUTIncompleteCallback,"ax",%progbits + 415 .align 1 + 416 .global HAL_PCD_ISOOUTIncompleteCallback + 417 .syntax unified + 418 .code 16 + 419 .thumb_func + 420 .fpu softvfp + 422 HAL_PCD_ISOOUTIncompleteCallback: + 423 .LFB52: + 233:Src/usbd_conf.c **** + 234:Src/usbd_conf.c **** /** + 235:Src/usbd_conf.c **** * @brief ISOOUTIncomplete callback. + 236:Src/usbd_conf.c **** * @param hpcd: PCD handle + 237:Src/usbd_conf.c **** * @param epnum: Endpoint number + 238:Src/usbd_conf.c **** * @retval None + 239:Src/usbd_conf.c **** */ + 240:Src/usbd_conf.c **** void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) + 241:Src/usbd_conf.c **** { + 424 .loc 1 241 0 + 425 .cfi_startproc + 426 @ args = 0, pretend = 0, frame = 0 + 427 @ frame_needed = 0, uses_anonymous_args = 0 + 428 .LVL39: + 429 0000 10B5 push {r4, lr} + 430 .LCFI10: + 431 .cfi_def_cfa_offset 8 + 432 .cfi_offset 4, -8 + 433 .cfi_offset 14, -4 + 242:Src/usbd_conf.c **** USBD_LL_IsoOUTIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); + 434 .loc 1 242 0 + 435 0002 9C23 movs r3, #156 + 436 0004 9B00 lsls r3, r3, #2 + 437 0006 C058 ldr r0, [r0, r3] + 438 .LVL40: + 439 0008 FFF7FEFF bl USBD_LL_IsoOUTIncomplete + 440 .LVL41: + 243:Src/usbd_conf.c **** } + 441 .loc 1 243 0 + 442 @ sp needed + 443 000c 10BD pop {r4, pc} + 444 .cfi_endproc + 445 .LFE52: + 447 .section .text.HAL_PCD_ISOINIncompleteCallback,"ax",%progbits + 448 .align 1 + 449 .global HAL_PCD_ISOINIncompleteCallback + 450 .syntax unified + 451 .code 16 + 452 .thumb_func + 453 .fpu softvfp + 455 HAL_PCD_ISOINIncompleteCallback: + 456 .LFB53: + 244:Src/usbd_conf.c **** + ARM GAS /tmp/ccvOfDqw.s page 13 + + + 245:Src/usbd_conf.c **** /** + 246:Src/usbd_conf.c **** * @brief ISOINIncomplete callback. + 247:Src/usbd_conf.c **** * @param hpcd: PCD handle + 248:Src/usbd_conf.c **** * @param epnum: Endpoint number + 249:Src/usbd_conf.c **** * @retval None + 250:Src/usbd_conf.c **** */ + 251:Src/usbd_conf.c **** void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) + 252:Src/usbd_conf.c **** { + 457 .loc 1 252 0 + 458 .cfi_startproc + 459 @ args = 0, pretend = 0, frame = 0 + 460 @ frame_needed = 0, uses_anonymous_args = 0 + 461 .LVL42: + 462 0000 10B5 push {r4, lr} + 463 .LCFI11: + 464 .cfi_def_cfa_offset 8 + 465 .cfi_offset 4, -8 + 466 .cfi_offset 14, -4 + 253:Src/usbd_conf.c **** USBD_LL_IsoINIncomplete((USBD_HandleTypeDef*)hpcd->pData, epnum); + 467 .loc 1 253 0 + 468 0002 9C23 movs r3, #156 + 469 0004 9B00 lsls r3, r3, #2 + 470 0006 C058 ldr r0, [r0, r3] + 471 .LVL43: + 472 0008 FFF7FEFF bl USBD_LL_IsoINIncomplete + 473 .LVL44: + 254:Src/usbd_conf.c **** } + 474 .loc 1 254 0 + 475 @ sp needed + 476 000c 10BD pop {r4, pc} + 477 .cfi_endproc + 478 .LFE53: + 480 .section .text.HAL_PCD_ConnectCallback,"ax",%progbits + 481 .align 1 + 482 .global HAL_PCD_ConnectCallback + 483 .syntax unified + 484 .code 16 + 485 .thumb_func + 486 .fpu softvfp + 488 HAL_PCD_ConnectCallback: + 489 .LFB54: + 255:Src/usbd_conf.c **** + 256:Src/usbd_conf.c **** /** + 257:Src/usbd_conf.c **** * @brief Connect callback. + 258:Src/usbd_conf.c **** * @param hpcd: PCD handle + 259:Src/usbd_conf.c **** * @retval None + 260:Src/usbd_conf.c **** */ + 261:Src/usbd_conf.c **** void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) + 262:Src/usbd_conf.c **** { + 490 .loc 1 262 0 + 491 .cfi_startproc + 492 @ args = 0, pretend = 0, frame = 0 + 493 @ frame_needed = 0, uses_anonymous_args = 0 + 494 .LVL45: + 495 0000 10B5 push {r4, lr} + 496 .LCFI12: + 497 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccvOfDqw.s page 14 + + + 498 .cfi_offset 4, -8 + 499 .cfi_offset 14, -4 + 263:Src/usbd_conf.c **** USBD_LL_DevConnected((USBD_HandleTypeDef*)hpcd->pData); + 500 .loc 1 263 0 + 501 0002 9C23 movs r3, #156 + 502 0004 9B00 lsls r3, r3, #2 + 503 0006 C058 ldr r0, [r0, r3] + 504 .LVL46: + 505 0008 FFF7FEFF bl USBD_LL_DevConnected + 506 .LVL47: + 264:Src/usbd_conf.c **** } + 507 .loc 1 264 0 + 508 @ sp needed + 509 000c 10BD pop {r4, pc} + 510 .cfi_endproc + 511 .LFE54: + 513 .section .text.HAL_PCD_DisconnectCallback,"ax",%progbits + 514 .align 1 + 515 .global HAL_PCD_DisconnectCallback + 516 .syntax unified + 517 .code 16 + 518 .thumb_func + 519 .fpu softvfp + 521 HAL_PCD_DisconnectCallback: + 522 .LFB55: + 265:Src/usbd_conf.c **** + 266:Src/usbd_conf.c **** /** + 267:Src/usbd_conf.c **** * @brief Disconnect callback. + 268:Src/usbd_conf.c **** * @param hpcd: PCD handle + 269:Src/usbd_conf.c **** * @retval None + 270:Src/usbd_conf.c **** */ + 271:Src/usbd_conf.c **** void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) + 272:Src/usbd_conf.c **** { + 523 .loc 1 272 0 + 524 .cfi_startproc + 525 @ args = 0, pretend = 0, frame = 0 + 526 @ frame_needed = 0, uses_anonymous_args = 0 + 527 .LVL48: + 528 0000 10B5 push {r4, lr} + 529 .LCFI13: + 530 .cfi_def_cfa_offset 8 + 531 .cfi_offset 4, -8 + 532 .cfi_offset 14, -4 + 273:Src/usbd_conf.c **** USBD_LL_DevDisconnected((USBD_HandleTypeDef*)hpcd->pData); + 533 .loc 1 273 0 + 534 0002 9C23 movs r3, #156 + 535 0004 9B00 lsls r3, r3, #2 + 536 0006 C058 ldr r0, [r0, r3] + 537 .LVL49: + 538 0008 FFF7FEFF bl USBD_LL_DevDisconnected + 539 .LVL50: + 274:Src/usbd_conf.c **** } + 540 .loc 1 274 0 + 541 @ sp needed + 542 000c 10BD pop {r4, pc} + 543 .cfi_endproc + 544 .LFE55: + ARM GAS /tmp/ccvOfDqw.s page 15 + + + 546 .section .text.USBD_LL_Init,"ax",%progbits + 547 .align 1 + 548 .global USBD_LL_Init + 549 .syntax unified + 550 .code 16 + 551 .thumb_func + 552 .fpu softvfp + 554 USBD_LL_Init: + 555 .LFB56: + 275:Src/usbd_conf.c **** + 276:Src/usbd_conf.c **** /******************************************************************************* + 277:Src/usbd_conf.c **** LL Driver Interface (USB Device Library --> PCD) + 278:Src/usbd_conf.c **** *******************************************************************************/ + 279:Src/usbd_conf.c **** + 280:Src/usbd_conf.c **** /** + 281:Src/usbd_conf.c **** * @brief Initializes the low level portion of the device driver. + 282:Src/usbd_conf.c **** * @param pdev: Device handle + 283:Src/usbd_conf.c **** * @retval USBD status + 284:Src/usbd_conf.c **** */ + 285:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev) + 286:Src/usbd_conf.c **** { + 556 .loc 1 286 0 + 557 .cfi_startproc + 558 @ args = 0, pretend = 0, frame = 0 + 559 @ frame_needed = 0, uses_anonymous_args = 0 + 560 .LVL51: + 561 0000 70B5 push {r4, r5, r6, lr} + 562 .LCFI14: + 563 .cfi_def_cfa_offset 16 + 564 .cfi_offset 4, -16 + 565 .cfi_offset 5, -12 + 566 .cfi_offset 6, -8 + 567 .cfi_offset 14, -4 + 568 0002 0400 movs r4, r0 + 287:Src/usbd_conf.c **** /* Init USB Ip. */ + 288:Src/usbd_conf.c **** /* Link the driver to the stack. */ + 289:Src/usbd_conf.c **** hpcd_USB_FS.pData = pdev; + 569 .loc 1 289 0 + 570 0004 1B48 ldr r0, .L26 + 571 .LVL52: + 572 0006 9C23 movs r3, #156 + 573 0008 9B00 lsls r3, r3, #2 + 574 000a C450 str r4, [r0, r3] + 290:Src/usbd_conf.c **** pdev->pData = &hpcd_USB_FS; + 575 .loc 1 290 0 + 576 000c 8825 movs r5, #136 + 577 000e AD00 lsls r5, r5, #2 + 578 0010 6051 str r0, [r4, r5] + 291:Src/usbd_conf.c **** + 292:Src/usbd_conf.c **** hpcd_USB_FS.Instance = USB; + 579 .loc 1 292 0 + 580 0012 194B ldr r3, .L26+4 + 581 0014 0360 str r3, [r0] + 293:Src/usbd_conf.c **** hpcd_USB_FS.Init.dev_endpoints = 8; + 582 .loc 1 293 0 + 583 0016 0823 movs r3, #8 + 584 0018 4360 str r3, [r0, #4] + ARM GAS /tmp/ccvOfDqw.s page 16 + + + 294:Src/usbd_conf.c **** hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; + 585 .loc 1 294 0 + 586 001a 0222 movs r2, #2 + 587 001c 8260 str r2, [r0, #8] + 295:Src/usbd_conf.c **** hpcd_USB_FS.Init.ep0_mps = DEP0CTL_MPS_64; + 588 .loc 1 295 0 + 589 001e 0023 movs r3, #0 + 590 0020 C360 str r3, [r0, #12] + 296:Src/usbd_conf.c **** hpcd_USB_FS.Init.phy_itface = PCD_PHY_EMBEDDED; + 591 .loc 1 296 0 + 592 0022 0261 str r2, [r0, #16] + 297:Src/usbd_conf.c **** hpcd_USB_FS.Init.low_power_enable = DISABLE; + 593 .loc 1 297 0 + 594 0024 8361 str r3, [r0, #24] + 298:Src/usbd_conf.c **** hpcd_USB_FS.Init.lpm_enable = DISABLE; + 595 .loc 1 298 0 + 596 0026 C361 str r3, [r0, #28] + 299:Src/usbd_conf.c **** hpcd_USB_FS.Init.battery_charging_enable = DISABLE; + 597 .loc 1 299 0 + 598 0028 0362 str r3, [r0, #32] + 300:Src/usbd_conf.c **** if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) + 599 .loc 1 300 0 + 600 002a FFF7FEFF bl HAL_PCD_Init + 601 .LVL53: + 301:Src/usbd_conf.c **** { + 302:Src/usbd_conf.c **** //_Error_Handler(__FILE__, __LINE__); + 303:Src/usbd_conf.c **** } + 304:Src/usbd_conf.c **** + 305:Src/usbd_conf.c **** HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18); + 602 .loc 1 305 0 + 603 002e 1823 movs r3, #24 + 604 0030 0022 movs r2, #0 + 605 0032 0021 movs r1, #0 + 606 0034 6059 ldr r0, [r4, r5] + 607 0036 FFF7FEFF bl HAL_PCDEx_PMAConfig + 608 .LVL54: + 306:Src/usbd_conf.c **** HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58); + 609 .loc 1 306 0 + 610 003a 5823 movs r3, #88 + 611 003c 0022 movs r2, #0 + 612 003e 8021 movs r1, #128 + 613 0040 6059 ldr r0, [r4, r5] + 614 0042 FFF7FEFF bl HAL_PCDEx_PMAConfig + 615 .LVL55: + 307:Src/usbd_conf.c **** HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0); + 616 .loc 1 307 0 + 617 0046 C023 movs r3, #192 + 618 0048 0022 movs r2, #0 + 619 004a 8121 movs r1, #129 + 620 004c 6059 ldr r0, [r4, r5] + 621 004e FFF7FEFF bl HAL_PCDEx_PMAConfig + 622 .LVL56: + 308:Src/usbd_conf.c **** HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110); + 623 .loc 1 308 0 + 624 0052 8823 movs r3, #136 + 625 0054 5B00 lsls r3, r3, #1 + 626 0056 0022 movs r2, #0 + ARM GAS /tmp/ccvOfDqw.s page 17 + + + 627 0058 0121 movs r1, #1 + 628 005a 6059 ldr r0, [r4, r5] + 629 005c FFF7FEFF bl HAL_PCDEx_PMAConfig + 630 .LVL57: + 309:Src/usbd_conf.c **** HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100); + 631 .loc 1 309 0 + 632 0060 6059 ldr r0, [r4, r5] + 633 0062 8023 movs r3, #128 + 634 0064 5B00 lsls r3, r3, #1 + 635 0066 0022 movs r2, #0 + 636 0068 8221 movs r1, #130 + 637 006a FFF7FEFF bl HAL_PCDEx_PMAConfig + 638 .LVL58: + 310:Src/usbd_conf.c **** return USBD_OK; + 311:Src/usbd_conf.c **** } + 639 .loc 1 311 0 + 640 006e 0020 movs r0, #0 + 641 @ sp needed + 642 .LVL59: + 643 0070 70BD pop {r4, r5, r6, pc} + 644 .L27: + 645 0072 C046 .align 2 + 646 .L26: + 647 0074 00000000 .word hpcd_USB_FS + 648 0078 005C0040 .word 1073765376 + 649 .cfi_endproc + 650 .LFE56: + 652 .section .text.USBD_LL_DeInit,"ax",%progbits + 653 .align 1 + 654 .global USBD_LL_DeInit + 655 .syntax unified + 656 .code 16 + 657 .thumb_func + 658 .fpu softvfp + 660 USBD_LL_DeInit: + 661 .LFB57: + 312:Src/usbd_conf.c **** + 313:Src/usbd_conf.c **** /** + 314:Src/usbd_conf.c **** * @brief De-Initializes the low level portion of the device driver. + 315:Src/usbd_conf.c **** * @param pdev: Device handle + 316:Src/usbd_conf.c **** * @retval USBD status + 317:Src/usbd_conf.c **** */ + 318:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_DeInit(USBD_HandleTypeDef *pdev) + 319:Src/usbd_conf.c **** { + 662 .loc 1 319 0 + 663 .cfi_startproc + 664 @ args = 0, pretend = 0, frame = 0 + 665 @ frame_needed = 0, uses_anonymous_args = 0 + 666 .LVL60: + 667 0000 10B5 push {r4, lr} + 668 .LCFI15: + 669 .cfi_def_cfa_offset 8 + 670 .cfi_offset 4, -8 + 671 .cfi_offset 14, -4 + 672 .LVL61: + 320:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 321:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + ARM GAS /tmp/ccvOfDqw.s page 18 + + + 322:Src/usbd_conf.c **** + 323:Src/usbd_conf.c **** hal_status = HAL_PCD_DeInit(pdev->pData); + 673 .loc 1 323 0 + 674 0002 8823 movs r3, #136 + 675 0004 9B00 lsls r3, r3, #2 + 676 0006 C058 ldr r0, [r0, r3] + 677 .LVL62: + 678 0008 FFF7FEFF bl HAL_PCD_DeInit + 679 .LVL63: + 324:Src/usbd_conf.c **** + 325:Src/usbd_conf.c **** switch (hal_status) { + 680 .loc 1 325 0 + 681 000c 0028 cmp r0, #0 + 682 000e 03D0 beq .L30 + 683 0010 0228 cmp r0, #2 + 684 0012 03D0 beq .L31 + 326:Src/usbd_conf.c **** case HAL_OK : + 327:Src/usbd_conf.c **** usb_status = USBD_OK; + 328:Src/usbd_conf.c **** break; + 329:Src/usbd_conf.c **** case HAL_ERROR : + 330:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 685 .loc 1 330 0 + 686 0014 0220 movs r0, #2 + 687 .LVL64: + 688 .L29: + 331:Src/usbd_conf.c **** break; + 332:Src/usbd_conf.c **** case HAL_BUSY : + 333:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 334:Src/usbd_conf.c **** break; + 335:Src/usbd_conf.c **** case HAL_TIMEOUT : + 336:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 337:Src/usbd_conf.c **** break; + 338:Src/usbd_conf.c **** default : + 339:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 340:Src/usbd_conf.c **** break; + 341:Src/usbd_conf.c **** } + 342:Src/usbd_conf.c **** return usb_status; + 343:Src/usbd_conf.c **** } + 689 .loc 1 343 0 + 690 @ sp needed + 691 0016 10BD pop {r4, pc} + 692 .LVL65: + 693 .L30: + 327:Src/usbd_conf.c **** break; + 694 .loc 1 327 0 + 695 0018 0020 movs r0, #0 + 696 .LVL66: + 697 001a FCE7 b .L29 + 698 .LVL67: + 699 .L31: + 333:Src/usbd_conf.c **** break; + 700 .loc 1 333 0 + 701 001c 0120 movs r0, #1 + 702 .LVL68: + 334:Src/usbd_conf.c **** case HAL_TIMEOUT : + 703 .loc 1 334 0 + 704 001e FAE7 b .L29 + ARM GAS /tmp/ccvOfDqw.s page 19 + + + 705 .cfi_endproc + 706 .LFE57: + 708 .section .text.USBD_LL_Start,"ax",%progbits + 709 .align 1 + 710 .global USBD_LL_Start + 711 .syntax unified + 712 .code 16 + 713 .thumb_func + 714 .fpu softvfp + 716 USBD_LL_Start: + 717 .LFB58: + 344:Src/usbd_conf.c **** + 345:Src/usbd_conf.c **** /** + 346:Src/usbd_conf.c **** * @brief Starts the low level portion of the device driver. + 347:Src/usbd_conf.c **** * @param pdev: Device handle + 348:Src/usbd_conf.c **** * @retval USBD status + 349:Src/usbd_conf.c **** */ + 350:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev) + 351:Src/usbd_conf.c **** { + 718 .loc 1 351 0 + 719 .cfi_startproc + 720 @ args = 0, pretend = 0, frame = 0 + 721 @ frame_needed = 0, uses_anonymous_args = 0 + 722 .LVL69: + 723 0000 10B5 push {r4, lr} + 724 .LCFI16: + 725 .cfi_def_cfa_offset 8 + 726 .cfi_offset 4, -8 + 727 .cfi_offset 14, -4 + 728 .LVL70: + 352:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 353:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 354:Src/usbd_conf.c **** + 355:Src/usbd_conf.c **** hal_status = HAL_PCD_Start(pdev->pData); + 729 .loc 1 355 0 + 730 0002 8823 movs r3, #136 + 731 0004 9B00 lsls r3, r3, #2 + 732 0006 C058 ldr r0, [r0, r3] + 733 .LVL71: + 734 0008 FFF7FEFF bl HAL_PCD_Start + 735 .LVL72: + 356:Src/usbd_conf.c **** + 357:Src/usbd_conf.c **** switch (hal_status) { + 736 .loc 1 357 0 + 737 000c 0028 cmp r0, #0 + 738 000e 03D0 beq .L36 + 739 0010 0228 cmp r0, #2 + 740 0012 03D0 beq .L37 + 358:Src/usbd_conf.c **** case HAL_OK : + 359:Src/usbd_conf.c **** usb_status = USBD_OK; + 360:Src/usbd_conf.c **** break; + 361:Src/usbd_conf.c **** case HAL_ERROR : + 362:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 741 .loc 1 362 0 + 742 0014 0220 movs r0, #2 + 743 .LVL73: + 744 .L35: + ARM GAS /tmp/ccvOfDqw.s page 20 + + + 363:Src/usbd_conf.c **** break; + 364:Src/usbd_conf.c **** case HAL_BUSY : + 365:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 366:Src/usbd_conf.c **** break; + 367:Src/usbd_conf.c **** case HAL_TIMEOUT : + 368:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 369:Src/usbd_conf.c **** break; + 370:Src/usbd_conf.c **** default : + 371:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 372:Src/usbd_conf.c **** break; + 373:Src/usbd_conf.c **** } + 374:Src/usbd_conf.c **** return usb_status; + 375:Src/usbd_conf.c **** } + 745 .loc 1 375 0 + 746 @ sp needed + 747 0016 10BD pop {r4, pc} + 748 .LVL74: + 749 .L36: + 359:Src/usbd_conf.c **** break; + 750 .loc 1 359 0 + 751 0018 0020 movs r0, #0 + 752 .LVL75: + 753 001a FCE7 b .L35 + 754 .LVL76: + 755 .L37: + 365:Src/usbd_conf.c **** break; + 756 .loc 1 365 0 + 757 001c 0120 movs r0, #1 + 758 .LVL77: + 366:Src/usbd_conf.c **** case HAL_TIMEOUT : + 759 .loc 1 366 0 + 760 001e FAE7 b .L35 + 761 .cfi_endproc + 762 .LFE58: + 764 .section .text.USBD_LL_Stop,"ax",%progbits + 765 .align 1 + 766 .global USBD_LL_Stop + 767 .syntax unified + 768 .code 16 + 769 .thumb_func + 770 .fpu softvfp + 772 USBD_LL_Stop: + 773 .LFB59: + 376:Src/usbd_conf.c **** + 377:Src/usbd_conf.c **** /** + 378:Src/usbd_conf.c **** * @brief Stops the low level portion of the device driver. + 379:Src/usbd_conf.c **** * @param pdev: Device handle + 380:Src/usbd_conf.c **** * @retval USBD status + 381:Src/usbd_conf.c **** */ + 382:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_Stop(USBD_HandleTypeDef *pdev) + 383:Src/usbd_conf.c **** { + 774 .loc 1 383 0 + 775 .cfi_startproc + 776 @ args = 0, pretend = 0, frame = 0 + 777 @ frame_needed = 0, uses_anonymous_args = 0 + 778 .LVL78: + 779 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccvOfDqw.s page 21 + + + 780 .LCFI17: + 781 .cfi_def_cfa_offset 8 + 782 .cfi_offset 4, -8 + 783 .cfi_offset 14, -4 + 784 .LVL79: + 384:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 385:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 386:Src/usbd_conf.c **** + 387:Src/usbd_conf.c **** hal_status = HAL_PCD_Stop(pdev->pData); + 785 .loc 1 387 0 + 786 0002 8823 movs r3, #136 + 787 0004 9B00 lsls r3, r3, #2 + 788 0006 C058 ldr r0, [r0, r3] + 789 .LVL80: + 790 0008 FFF7FEFF bl HAL_PCD_Stop + 791 .LVL81: + 388:Src/usbd_conf.c **** + 389:Src/usbd_conf.c **** switch (hal_status) { + 792 .loc 1 389 0 + 793 000c 0028 cmp r0, #0 + 794 000e 03D0 beq .L42 + 795 0010 0228 cmp r0, #2 + 796 0012 03D0 beq .L43 + 390:Src/usbd_conf.c **** case HAL_OK : + 391:Src/usbd_conf.c **** usb_status = USBD_OK; + 392:Src/usbd_conf.c **** break; + 393:Src/usbd_conf.c **** case HAL_ERROR : + 394:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 797 .loc 1 394 0 + 798 0014 0220 movs r0, #2 + 799 .LVL82: + 800 .L41: + 395:Src/usbd_conf.c **** break; + 396:Src/usbd_conf.c **** case HAL_BUSY : + 397:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 398:Src/usbd_conf.c **** break; + 399:Src/usbd_conf.c **** case HAL_TIMEOUT : + 400:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 401:Src/usbd_conf.c **** break; + 402:Src/usbd_conf.c **** default : + 403:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 404:Src/usbd_conf.c **** break; + 405:Src/usbd_conf.c **** } + 406:Src/usbd_conf.c **** return usb_status; + 407:Src/usbd_conf.c **** } + 801 .loc 1 407 0 + 802 @ sp needed + 803 0016 10BD pop {r4, pc} + 804 .LVL83: + 805 .L42: + 391:Src/usbd_conf.c **** break; + 806 .loc 1 391 0 + 807 0018 0020 movs r0, #0 + 808 .LVL84: + 809 001a FCE7 b .L41 + 810 .LVL85: + 811 .L43: + ARM GAS /tmp/ccvOfDqw.s page 22 + + + 397:Src/usbd_conf.c **** break; + 812 .loc 1 397 0 + 813 001c 0120 movs r0, #1 + 814 .LVL86: + 398:Src/usbd_conf.c **** case HAL_TIMEOUT : + 815 .loc 1 398 0 + 816 001e FAE7 b .L41 + 817 .cfi_endproc + 818 .LFE59: + 820 .section .text.USBD_LL_OpenEP,"ax",%progbits + 821 .align 1 + 822 .global USBD_LL_OpenEP + 823 .syntax unified + 824 .code 16 + 825 .thumb_func + 826 .fpu softvfp + 828 USBD_LL_OpenEP: + 829 .LFB60: + 408:Src/usbd_conf.c **** + 409:Src/usbd_conf.c **** /** + 410:Src/usbd_conf.c **** * @brief Opens an endpoint of the low level driver. + 411:Src/usbd_conf.c **** * @param pdev: Device handle + 412:Src/usbd_conf.c **** * @param ep_addr: Endpoint number + 413:Src/usbd_conf.c **** * @param ep_type: Endpoint type + 414:Src/usbd_conf.c **** * @param ep_mps: Endpoint max packet size + 415:Src/usbd_conf.c **** * @retval USBD status + 416:Src/usbd_conf.c **** */ + 417:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint1 + 418:Src/usbd_conf.c **** { + 830 .loc 1 418 0 + 831 .cfi_startproc + 832 @ args = 0, pretend = 0, frame = 0 + 833 @ frame_needed = 0, uses_anonymous_args = 0 + 834 .LVL87: + 835 0000 10B5 push {r4, lr} + 836 .LCFI18: + 837 .cfi_def_cfa_offset 8 + 838 .cfi_offset 4, -8 + 839 .cfi_offset 14, -4 + 840 0002 1400 movs r4, r2 + 841 0004 1A00 movs r2, r3 + 842 .LVL88: + 419:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 420:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 421:Src/usbd_conf.c **** + 422:Src/usbd_conf.c **** hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type); + 843 .loc 1 422 0 + 844 0006 8823 movs r3, #136 + 845 .LVL89: + 846 0008 9B00 lsls r3, r3, #2 + 847 000a C058 ldr r0, [r0, r3] + 848 .LVL90: + 849 000c 2300 movs r3, r4 + 850 000e FFF7FEFF bl HAL_PCD_EP_Open + 851 .LVL91: + 423:Src/usbd_conf.c **** + 424:Src/usbd_conf.c **** switch (hal_status) { + ARM GAS /tmp/ccvOfDqw.s page 23 + + + 852 .loc 1 424 0 + 853 0012 0028 cmp r0, #0 + 854 0014 03D0 beq .L48 + 855 0016 0228 cmp r0, #2 + 856 0018 03D0 beq .L49 + 425:Src/usbd_conf.c **** case HAL_OK : + 426:Src/usbd_conf.c **** usb_status = USBD_OK; + 427:Src/usbd_conf.c **** break; + 428:Src/usbd_conf.c **** case HAL_ERROR : + 429:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 857 .loc 1 429 0 + 858 001a 0220 movs r0, #2 + 859 .LVL92: + 860 .L47: + 430:Src/usbd_conf.c **** break; + 431:Src/usbd_conf.c **** case HAL_BUSY : + 432:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 433:Src/usbd_conf.c **** break; + 434:Src/usbd_conf.c **** case HAL_TIMEOUT : + 435:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 436:Src/usbd_conf.c **** break; + 437:Src/usbd_conf.c **** default : + 438:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 439:Src/usbd_conf.c **** break; + 440:Src/usbd_conf.c **** } + 441:Src/usbd_conf.c **** return usb_status; + 442:Src/usbd_conf.c **** } + 861 .loc 1 442 0 + 862 @ sp needed + 863 001c 10BD pop {r4, pc} + 864 .LVL93: + 865 .L48: + 426:Src/usbd_conf.c **** break; + 866 .loc 1 426 0 + 867 001e 0020 movs r0, #0 + 868 .LVL94: + 869 0020 FCE7 b .L47 + 870 .LVL95: + 871 .L49: + 432:Src/usbd_conf.c **** break; + 872 .loc 1 432 0 + 873 0022 0120 movs r0, #1 + 874 .LVL96: + 433:Src/usbd_conf.c **** case HAL_TIMEOUT : + 875 .loc 1 433 0 + 876 0024 FAE7 b .L47 + 877 .cfi_endproc + 878 .LFE60: + 880 .section .text.USBD_LL_CloseEP,"ax",%progbits + 881 .align 1 + 882 .global USBD_LL_CloseEP + 883 .syntax unified + 884 .code 16 + 885 .thumb_func + 886 .fpu softvfp + 888 USBD_LL_CloseEP: + 889 .LFB61: + ARM GAS /tmp/ccvOfDqw.s page 24 + + + 443:Src/usbd_conf.c **** + 444:Src/usbd_conf.c **** /** + 445:Src/usbd_conf.c **** * @brief Closes an endpoint of the low level driver. + 446:Src/usbd_conf.c **** * @param pdev: Device handle + 447:Src/usbd_conf.c **** * @param ep_addr: Endpoint number + 448:Src/usbd_conf.c **** * @retval USBD status + 449:Src/usbd_conf.c **** */ + 450:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) + 451:Src/usbd_conf.c **** { + 890 .loc 1 451 0 + 891 .cfi_startproc + 892 @ args = 0, pretend = 0, frame = 0 + 893 @ frame_needed = 0, uses_anonymous_args = 0 + 894 .LVL97: + 895 0000 10B5 push {r4, lr} + 896 .LCFI19: + 897 .cfi_def_cfa_offset 8 + 898 .cfi_offset 4, -8 + 899 .cfi_offset 14, -4 + 900 .LVL98: + 452:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 453:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 454:Src/usbd_conf.c **** + 455:Src/usbd_conf.c **** hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr); + 901 .loc 1 455 0 + 902 0002 8823 movs r3, #136 + 903 0004 9B00 lsls r3, r3, #2 + 904 0006 C058 ldr r0, [r0, r3] + 905 .LVL99: + 906 0008 FFF7FEFF bl HAL_PCD_EP_Close + 907 .LVL100: + 456:Src/usbd_conf.c **** + 457:Src/usbd_conf.c **** switch (hal_status) { + 908 .loc 1 457 0 + 909 000c 0028 cmp r0, #0 + 910 000e 03D0 beq .L54 + 911 0010 0228 cmp r0, #2 + 912 0012 03D0 beq .L55 + 458:Src/usbd_conf.c **** case HAL_OK : + 459:Src/usbd_conf.c **** usb_status = USBD_OK; + 460:Src/usbd_conf.c **** break; + 461:Src/usbd_conf.c **** case HAL_ERROR : + 462:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 913 .loc 1 462 0 + 914 0014 0220 movs r0, #2 + 915 .LVL101: + 916 .L53: + 463:Src/usbd_conf.c **** break; + 464:Src/usbd_conf.c **** case HAL_BUSY : + 465:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 466:Src/usbd_conf.c **** break; + 467:Src/usbd_conf.c **** case HAL_TIMEOUT : + 468:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 469:Src/usbd_conf.c **** break; + 470:Src/usbd_conf.c **** default : + 471:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 472:Src/usbd_conf.c **** break; + ARM GAS /tmp/ccvOfDqw.s page 25 + + + 473:Src/usbd_conf.c **** } + 474:Src/usbd_conf.c **** return usb_status; + 475:Src/usbd_conf.c **** } + 917 .loc 1 475 0 + 918 @ sp needed + 919 0016 10BD pop {r4, pc} + 920 .LVL102: + 921 .L54: + 459:Src/usbd_conf.c **** break; + 922 .loc 1 459 0 + 923 0018 0020 movs r0, #0 + 924 .LVL103: + 925 001a FCE7 b .L53 + 926 .LVL104: + 927 .L55: + 465:Src/usbd_conf.c **** break; + 928 .loc 1 465 0 + 929 001c 0120 movs r0, #1 + 930 .LVL105: + 466:Src/usbd_conf.c **** case HAL_TIMEOUT : + 931 .loc 1 466 0 + 932 001e FAE7 b .L53 + 933 .cfi_endproc + 934 .LFE61: + 936 .section .text.USBD_LL_FlushEP,"ax",%progbits + 937 .align 1 + 938 .global USBD_LL_FlushEP + 939 .syntax unified + 940 .code 16 + 941 .thumb_func + 942 .fpu softvfp + 944 USBD_LL_FlushEP: + 945 .LFB62: + 476:Src/usbd_conf.c **** + 477:Src/usbd_conf.c **** /** + 478:Src/usbd_conf.c **** * @brief Flushes an endpoint of the Low Level Driver. + 479:Src/usbd_conf.c **** * @param pdev: Device handle + 480:Src/usbd_conf.c **** * @param ep_addr: Endpoint number + 481:Src/usbd_conf.c **** * @retval USBD status + 482:Src/usbd_conf.c **** */ + 483:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_FlushEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) + 484:Src/usbd_conf.c **** { + 946 .loc 1 484 0 + 947 .cfi_startproc + 948 @ args = 0, pretend = 0, frame = 0 + 949 @ frame_needed = 0, uses_anonymous_args = 0 + 950 .LVL106: + 951 0000 10B5 push {r4, lr} + 952 .LCFI20: + 953 .cfi_def_cfa_offset 8 + 954 .cfi_offset 4, -8 + 955 .cfi_offset 14, -4 + 956 .LVL107: + 485:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 486:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 487:Src/usbd_conf.c **** + 488:Src/usbd_conf.c **** hal_status = HAL_PCD_EP_Flush(pdev->pData, ep_addr); + ARM GAS /tmp/ccvOfDqw.s page 26 + + + 957 .loc 1 488 0 + 958 0002 8823 movs r3, #136 + 959 0004 9B00 lsls r3, r3, #2 + 960 0006 C058 ldr r0, [r0, r3] + 961 .LVL108: + 962 0008 FFF7FEFF bl HAL_PCD_EP_Flush + 963 .LVL109: + 489:Src/usbd_conf.c **** + 490:Src/usbd_conf.c **** switch (hal_status) { + 964 .loc 1 490 0 + 965 000c 0028 cmp r0, #0 + 966 000e 03D0 beq .L60 + 967 0010 0228 cmp r0, #2 + 968 0012 03D0 beq .L61 + 491:Src/usbd_conf.c **** case HAL_OK : + 492:Src/usbd_conf.c **** usb_status = USBD_OK; + 493:Src/usbd_conf.c **** break; + 494:Src/usbd_conf.c **** case HAL_ERROR : + 495:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 969 .loc 1 495 0 + 970 0014 0220 movs r0, #2 + 971 .LVL110: + 972 .L59: + 496:Src/usbd_conf.c **** break; + 497:Src/usbd_conf.c **** case HAL_BUSY : + 498:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 499:Src/usbd_conf.c **** break; + 500:Src/usbd_conf.c **** case HAL_TIMEOUT : + 501:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 502:Src/usbd_conf.c **** break; + 503:Src/usbd_conf.c **** default : + 504:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 505:Src/usbd_conf.c **** break; + 506:Src/usbd_conf.c **** } + 507:Src/usbd_conf.c **** return usb_status; + 508:Src/usbd_conf.c **** } + 973 .loc 1 508 0 + 974 @ sp needed + 975 0016 10BD pop {r4, pc} + 976 .LVL111: + 977 .L60: + 492:Src/usbd_conf.c **** break; + 978 .loc 1 492 0 + 979 0018 0020 movs r0, #0 + 980 .LVL112: + 981 001a FCE7 b .L59 + 982 .LVL113: + 983 .L61: + 498:Src/usbd_conf.c **** break; + 984 .loc 1 498 0 + 985 001c 0120 movs r0, #1 + 986 .LVL114: + 499:Src/usbd_conf.c **** case HAL_TIMEOUT : + 987 .loc 1 499 0 + 988 001e FAE7 b .L59 + 989 .cfi_endproc + 990 .LFE62: + ARM GAS /tmp/ccvOfDqw.s page 27 + + + 992 .section .text.USBD_LL_StallEP,"ax",%progbits + 993 .align 1 + 994 .global USBD_LL_StallEP + 995 .syntax unified + 996 .code 16 + 997 .thumb_func + 998 .fpu softvfp + 1000 USBD_LL_StallEP: + 1001 .LFB63: + 509:Src/usbd_conf.c **** + 510:Src/usbd_conf.c **** /** + 511:Src/usbd_conf.c **** * @brief Sets a Stall condition on an endpoint of the Low Level Driver. + 512:Src/usbd_conf.c **** * @param pdev: Device handle + 513:Src/usbd_conf.c **** * @param ep_addr: Endpoint number + 514:Src/usbd_conf.c **** * @retval USBD status + 515:Src/usbd_conf.c **** */ + 516:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) + 517:Src/usbd_conf.c **** { + 1002 .loc 1 517 0 + 1003 .cfi_startproc + 1004 @ args = 0, pretend = 0, frame = 0 + 1005 @ frame_needed = 0, uses_anonymous_args = 0 + 1006 .LVL115: + 1007 0000 10B5 push {r4, lr} + 1008 .LCFI21: + 1009 .cfi_def_cfa_offset 8 + 1010 .cfi_offset 4, -8 + 1011 .cfi_offset 14, -4 + 1012 .LVL116: + 518:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 519:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 520:Src/usbd_conf.c **** + 521:Src/usbd_conf.c **** hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr); + 1013 .loc 1 521 0 + 1014 0002 8823 movs r3, #136 + 1015 0004 9B00 lsls r3, r3, #2 + 1016 0006 C058 ldr r0, [r0, r3] + 1017 .LVL117: + 1018 0008 FFF7FEFF bl HAL_PCD_EP_SetStall + 1019 .LVL118: + 522:Src/usbd_conf.c **** + 523:Src/usbd_conf.c **** switch (hal_status) { + 1020 .loc 1 523 0 + 1021 000c 0028 cmp r0, #0 + 1022 000e 03D0 beq .L66 + 1023 0010 0228 cmp r0, #2 + 1024 0012 03D0 beq .L67 + 524:Src/usbd_conf.c **** case HAL_OK : + 525:Src/usbd_conf.c **** usb_status = USBD_OK; + 526:Src/usbd_conf.c **** break; + 527:Src/usbd_conf.c **** case HAL_ERROR : + 528:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 1025 .loc 1 528 0 + 1026 0014 0220 movs r0, #2 + 1027 .LVL119: + 1028 .L65: + 529:Src/usbd_conf.c **** break; + ARM GAS /tmp/ccvOfDqw.s page 28 + + + 530:Src/usbd_conf.c **** case HAL_BUSY : + 531:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 532:Src/usbd_conf.c **** break; + 533:Src/usbd_conf.c **** case HAL_TIMEOUT : + 534:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 535:Src/usbd_conf.c **** break; + 536:Src/usbd_conf.c **** default : + 537:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 538:Src/usbd_conf.c **** break; + 539:Src/usbd_conf.c **** } + 540:Src/usbd_conf.c **** return usb_status; + 541:Src/usbd_conf.c **** } + 1029 .loc 1 541 0 + 1030 @ sp needed + 1031 0016 10BD pop {r4, pc} + 1032 .LVL120: + 1033 .L66: + 525:Src/usbd_conf.c **** break; + 1034 .loc 1 525 0 + 1035 0018 0020 movs r0, #0 + 1036 .LVL121: + 1037 001a FCE7 b .L65 + 1038 .LVL122: + 1039 .L67: + 531:Src/usbd_conf.c **** break; + 1040 .loc 1 531 0 + 1041 001c 0120 movs r0, #1 + 1042 .LVL123: + 532:Src/usbd_conf.c **** case HAL_TIMEOUT : + 1043 .loc 1 532 0 + 1044 001e FAE7 b .L65 + 1045 .cfi_endproc + 1046 .LFE63: + 1048 .section .text.USBD_LL_ClearStallEP,"ax",%progbits + 1049 .align 1 + 1050 .global USBD_LL_ClearStallEP + 1051 .syntax unified + 1052 .code 16 + 1053 .thumb_func + 1054 .fpu softvfp + 1056 USBD_LL_ClearStallEP: + 1057 .LFB64: + 542:Src/usbd_conf.c **** + 543:Src/usbd_conf.c **** /** + 544:Src/usbd_conf.c **** * @brief Clears a Stall condition on an endpoint of the Low Level Driver. + 545:Src/usbd_conf.c **** * @param pdev: Device handle + 546:Src/usbd_conf.c **** * @param ep_addr: Endpoint number + 547:Src/usbd_conf.c **** * @retval USBD status + 548:Src/usbd_conf.c **** */ + 549:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) + 550:Src/usbd_conf.c **** { + 1058 .loc 1 550 0 + 1059 .cfi_startproc + 1060 @ args = 0, pretend = 0, frame = 0 + 1061 @ frame_needed = 0, uses_anonymous_args = 0 + 1062 .LVL124: + 1063 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccvOfDqw.s page 29 + + + 1064 .LCFI22: + 1065 .cfi_def_cfa_offset 8 + 1066 .cfi_offset 4, -8 + 1067 .cfi_offset 14, -4 + 1068 .LVL125: + 551:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 552:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 553:Src/usbd_conf.c **** + 554:Src/usbd_conf.c **** hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr); + 1069 .loc 1 554 0 + 1070 0002 8823 movs r3, #136 + 1071 0004 9B00 lsls r3, r3, #2 + 1072 0006 C058 ldr r0, [r0, r3] + 1073 .LVL126: + 1074 0008 FFF7FEFF bl HAL_PCD_EP_ClrStall + 1075 .LVL127: + 555:Src/usbd_conf.c **** + 556:Src/usbd_conf.c **** switch (hal_status) { + 1076 .loc 1 556 0 + 1077 000c 0028 cmp r0, #0 + 1078 000e 03D0 beq .L72 + 1079 0010 0228 cmp r0, #2 + 1080 0012 03D0 beq .L73 + 557:Src/usbd_conf.c **** case HAL_OK : + 558:Src/usbd_conf.c **** usb_status = USBD_OK; + 559:Src/usbd_conf.c **** break; + 560:Src/usbd_conf.c **** case HAL_ERROR : + 561:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 1081 .loc 1 561 0 + 1082 0014 0220 movs r0, #2 + 1083 .LVL128: + 1084 .L71: + 562:Src/usbd_conf.c **** break; + 563:Src/usbd_conf.c **** case HAL_BUSY : + 564:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 565:Src/usbd_conf.c **** break; + 566:Src/usbd_conf.c **** case HAL_TIMEOUT : + 567:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 568:Src/usbd_conf.c **** break; + 569:Src/usbd_conf.c **** default : + 570:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 571:Src/usbd_conf.c **** break; + 572:Src/usbd_conf.c **** } + 573:Src/usbd_conf.c **** return usb_status; + 574:Src/usbd_conf.c **** } + 1085 .loc 1 574 0 + 1086 @ sp needed + 1087 0016 10BD pop {r4, pc} + 1088 .LVL129: + 1089 .L72: + 558:Src/usbd_conf.c **** break; + 1090 .loc 1 558 0 + 1091 0018 0020 movs r0, #0 + 1092 .LVL130: + 1093 001a FCE7 b .L71 + 1094 .LVL131: + 1095 .L73: + ARM GAS /tmp/ccvOfDqw.s page 30 + + + 564:Src/usbd_conf.c **** break; + 1096 .loc 1 564 0 + 1097 001c 0120 movs r0, #1 + 1098 .LVL132: + 565:Src/usbd_conf.c **** case HAL_TIMEOUT : + 1099 .loc 1 565 0 + 1100 001e FAE7 b .L71 + 1101 .cfi_endproc + 1102 .LFE64: + 1104 .section .text.USBD_LL_IsStallEP,"ax",%progbits + 1105 .align 1 + 1106 .global USBD_LL_IsStallEP + 1107 .syntax unified + 1108 .code 16 + 1109 .thumb_func + 1110 .fpu softvfp + 1112 USBD_LL_IsStallEP: + 1113 .LFB65: + 575:Src/usbd_conf.c **** + 576:Src/usbd_conf.c **** /** + 577:Src/usbd_conf.c **** * @brief Returns Stall condition. + 578:Src/usbd_conf.c **** * @param pdev: Device handle + 579:Src/usbd_conf.c **** * @param ep_addr: Endpoint number + 580:Src/usbd_conf.c **** * @retval Stall (1: Yes, 0: No) + 581:Src/usbd_conf.c **** */ + 582:Src/usbd_conf.c **** uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr) + 583:Src/usbd_conf.c **** { + 1114 .loc 1 583 0 + 1115 .cfi_startproc + 1116 @ args = 0, pretend = 0, frame = 0 + 1117 @ frame_needed = 0, uses_anonymous_args = 0 + 1118 @ link register save eliminated. + 1119 .LVL133: + 1120 0000 0A00 movs r2, r1 + 584:Src/usbd_conf.c **** PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData; + 1121 .loc 1 584 0 + 1122 0002 8823 movs r3, #136 + 1123 0004 9B00 lsls r3, r3, #2 + 1124 0006 C358 ldr r3, [r0, r3] + 1125 .LVL134: + 585:Src/usbd_conf.c **** + 586:Src/usbd_conf.c **** if((ep_addr & 0x80) == 0x80) + 1126 .loc 1 586 0 + 1127 0008 49B2 sxtb r1, r1 + 1128 000a 0029 cmp r1, #0 + 1129 000c 07DB blt .L79 + 587:Src/usbd_conf.c **** { + 588:Src/usbd_conf.c **** return hpcd->IN_ep[ep_addr & 0x7F].is_stall; + 589:Src/usbd_conf.c **** } + 590:Src/usbd_conf.c **** else + 591:Src/usbd_conf.c **** { + 592:Src/usbd_conf.c **** return hpcd->OUT_ep[ep_addr & 0x7F].is_stall; + 1130 .loc 1 592 0 + 1131 000e 7F21 movs r1, #127 + 1132 .LVL135: + 1133 0010 1140 ands r1, r2 + 1134 0012 4901 lsls r1, r1, #5 + ARM GAS /tmp/ccvOfDqw.s page 31 + + + 1135 0014 5B18 adds r3, r3, r1 + 1136 .LVL136: + 1137 0016 2B33 adds r3, r3, #43 + 1138 0018 FF33 adds r3, r3, #255 + 1139 001a 1878 ldrb r0, [r3] + 1140 .LVL137: + 1141 .L78: + 593:Src/usbd_conf.c **** } + 594:Src/usbd_conf.c **** } + 1142 .loc 1 594 0 + 1143 @ sp needed + 1144 001c 7047 bx lr + 1145 .LVL138: + 1146 .L79: + 588:Src/usbd_conf.c **** } + 1147 .loc 1 588 0 + 1148 001e 7F21 movs r1, #127 + 1149 0020 1140 ands r1, r2 + 1150 0022 4901 lsls r1, r1, #5 + 1151 0024 5B18 adds r3, r3, r1 + 1152 .LVL139: + 1153 0026 2A33 adds r3, r3, #42 + 1154 0028 1878 ldrb r0, [r3] + 1155 .LVL140: + 1156 002a F7E7 b .L78 + 1157 .cfi_endproc + 1158 .LFE65: + 1160 .section .text.USBD_LL_SetUSBAddress,"ax",%progbits + 1161 .align 1 + 1162 .global USBD_LL_SetUSBAddress + 1163 .syntax unified + 1164 .code 16 + 1165 .thumb_func + 1166 .fpu softvfp + 1168 USBD_LL_SetUSBAddress: + 1169 .LFB66: + 595:Src/usbd_conf.c **** + 596:Src/usbd_conf.c **** /** + 597:Src/usbd_conf.c **** * @brief Assigns a USB address to the device. + 598:Src/usbd_conf.c **** * @param pdev: Device handle + 599:Src/usbd_conf.c **** * @param dev_addr: Device address + 600:Src/usbd_conf.c **** * @retval USBD status + 601:Src/usbd_conf.c **** */ + 602:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr) + 603:Src/usbd_conf.c **** { + 1170 .loc 1 603 0 + 1171 .cfi_startproc + 1172 @ args = 0, pretend = 0, frame = 0 + 1173 @ frame_needed = 0, uses_anonymous_args = 0 + 1174 .LVL141: + 1175 0000 10B5 push {r4, lr} + 1176 .LCFI23: + 1177 .cfi_def_cfa_offset 8 + 1178 .cfi_offset 4, -8 + 1179 .cfi_offset 14, -4 + 1180 .LVL142: + 604:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + ARM GAS /tmp/ccvOfDqw.s page 32 + + + 605:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 606:Src/usbd_conf.c **** + 607:Src/usbd_conf.c **** hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr); + 1181 .loc 1 607 0 + 1182 0002 8823 movs r3, #136 + 1183 0004 9B00 lsls r3, r3, #2 + 1184 0006 C058 ldr r0, [r0, r3] + 1185 .LVL143: + 1186 0008 FFF7FEFF bl HAL_PCD_SetAddress + 1187 .LVL144: + 608:Src/usbd_conf.c **** + 609:Src/usbd_conf.c **** switch (hal_status) { + 1188 .loc 1 609 0 + 1189 000c 0028 cmp r0, #0 + 1190 000e 03D0 beq .L82 + 1191 0010 0228 cmp r0, #2 + 1192 0012 03D0 beq .L83 + 610:Src/usbd_conf.c **** case HAL_OK : + 611:Src/usbd_conf.c **** usb_status = USBD_OK; + 612:Src/usbd_conf.c **** break; + 613:Src/usbd_conf.c **** case HAL_ERROR : + 614:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 1193 .loc 1 614 0 + 1194 0014 0220 movs r0, #2 + 1195 .LVL145: + 1196 .L81: + 615:Src/usbd_conf.c **** break; + 616:Src/usbd_conf.c **** case HAL_BUSY : + 617:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 618:Src/usbd_conf.c **** break; + 619:Src/usbd_conf.c **** case HAL_TIMEOUT : + 620:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 621:Src/usbd_conf.c **** break; + 622:Src/usbd_conf.c **** default : + 623:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 624:Src/usbd_conf.c **** break; + 625:Src/usbd_conf.c **** } + 626:Src/usbd_conf.c **** return usb_status; + 627:Src/usbd_conf.c **** } + 1197 .loc 1 627 0 + 1198 @ sp needed + 1199 0016 10BD pop {r4, pc} + 1200 .LVL146: + 1201 .L82: + 611:Src/usbd_conf.c **** break; + 1202 .loc 1 611 0 + 1203 0018 0020 movs r0, #0 + 1204 .LVL147: + 1205 001a FCE7 b .L81 + 1206 .LVL148: + 1207 .L83: + 617:Src/usbd_conf.c **** break; + 1208 .loc 1 617 0 + 1209 001c 0120 movs r0, #1 + 1210 .LVL149: + 618:Src/usbd_conf.c **** case HAL_TIMEOUT : + 1211 .loc 1 618 0 + ARM GAS /tmp/ccvOfDqw.s page 33 + + + 1212 001e FAE7 b .L81 + 1213 .cfi_endproc + 1214 .LFE66: + 1216 .section .text.USBD_LL_Transmit,"ax",%progbits + 1217 .align 1 + 1218 .global USBD_LL_Transmit + 1219 .syntax unified + 1220 .code 16 + 1221 .thumb_func + 1222 .fpu softvfp + 1224 USBD_LL_Transmit: + 1225 .LFB67: + 628:Src/usbd_conf.c **** + 629:Src/usbd_conf.c **** /** + 630:Src/usbd_conf.c **** * @brief Transmits data over an endpoint. + 631:Src/usbd_conf.c **** * @param pdev: Device handle + 632:Src/usbd_conf.c **** * @param ep_addr: Endpoint number + 633:Src/usbd_conf.c **** * @param pbuf: Pointer to data to be sent + 634:Src/usbd_conf.c **** * @param size: Data size + 635:Src/usbd_conf.c **** * @retval USBD status + 636:Src/usbd_conf.c **** */ + 637:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint1 + 638:Src/usbd_conf.c **** { + 1226 .loc 1 638 0 + 1227 .cfi_startproc + 1228 @ args = 0, pretend = 0, frame = 0 + 1229 @ frame_needed = 0, uses_anonymous_args = 0 + 1230 .LVL150: + 1231 0000 10B5 push {r4, lr} + 1232 .LCFI24: + 1233 .cfi_def_cfa_offset 8 + 1234 .cfi_offset 4, -8 + 1235 .cfi_offset 14, -4 + 1236 .LVL151: + 639:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 640:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 641:Src/usbd_conf.c **** + 642:Src/usbd_conf.c **** hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size); + 1237 .loc 1 642 0 + 1238 0002 8824 movs r4, #136 + 1239 0004 A400 lsls r4, r4, #2 + 1240 0006 0059 ldr r0, [r0, r4] + 1241 .LVL152: + 1242 0008 FFF7FEFF bl HAL_PCD_EP_Transmit + 1243 .LVL153: + 643:Src/usbd_conf.c **** + 644:Src/usbd_conf.c **** switch (hal_status) { + 1244 .loc 1 644 0 + 1245 000c 0028 cmp r0, #0 + 1246 000e 03D0 beq .L88 + 1247 0010 0228 cmp r0, #2 + 1248 0012 03D0 beq .L89 + 645:Src/usbd_conf.c **** case HAL_OK : + 646:Src/usbd_conf.c **** usb_status = USBD_OK; + 647:Src/usbd_conf.c **** break; + 648:Src/usbd_conf.c **** case HAL_ERROR : + 649:Src/usbd_conf.c **** usb_status = USBD_FAIL; + ARM GAS /tmp/ccvOfDqw.s page 34 + + + 1249 .loc 1 649 0 + 1250 0014 0220 movs r0, #2 + 1251 .LVL154: + 1252 .L87: + 650:Src/usbd_conf.c **** break; + 651:Src/usbd_conf.c **** case HAL_BUSY : + 652:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 653:Src/usbd_conf.c **** break; + 654:Src/usbd_conf.c **** case HAL_TIMEOUT : + 655:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 656:Src/usbd_conf.c **** break; + 657:Src/usbd_conf.c **** default : + 658:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 659:Src/usbd_conf.c **** break; + 660:Src/usbd_conf.c **** } + 661:Src/usbd_conf.c **** return usb_status; + 662:Src/usbd_conf.c **** } + 1253 .loc 1 662 0 + 1254 @ sp needed + 1255 0016 10BD pop {r4, pc} + 1256 .LVL155: + 1257 .L88: + 646:Src/usbd_conf.c **** break; + 1258 .loc 1 646 0 + 1259 0018 0020 movs r0, #0 + 1260 .LVL156: + 1261 001a FCE7 b .L87 + 1262 .LVL157: + 1263 .L89: + 652:Src/usbd_conf.c **** break; + 1264 .loc 1 652 0 + 1265 001c 0120 movs r0, #1 + 1266 .LVL158: + 653:Src/usbd_conf.c **** case HAL_TIMEOUT : + 1267 .loc 1 653 0 + 1268 001e FAE7 b .L87 + 1269 .cfi_endproc + 1270 .LFE67: + 1272 .section .text.USBD_LL_PrepareReceive,"ax",%progbits + 1273 .align 1 + 1274 .global USBD_LL_PrepareReceive + 1275 .syntax unified + 1276 .code 16 + 1277 .thumb_func + 1278 .fpu softvfp + 1280 USBD_LL_PrepareReceive: + 1281 .LFB68: + 663:Src/usbd_conf.c **** + 664:Src/usbd_conf.c **** /** + 665:Src/usbd_conf.c **** * @brief Prepares an endpoint for reception. + 666:Src/usbd_conf.c **** * @param pdev: Device handle + 667:Src/usbd_conf.c **** * @param ep_addr: Endpoint number + 668:Src/usbd_conf.c **** * @param pbuf: Pointer to data to be received + 669:Src/usbd_conf.c **** * @param size: Data size + 670:Src/usbd_conf.c **** * @retval USBD status + 671:Src/usbd_conf.c **** */ + 672:Src/usbd_conf.c **** USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, + ARM GAS /tmp/ccvOfDqw.s page 35 + + + 673:Src/usbd_conf.c **** { + 1282 .loc 1 673 0 + 1283 .cfi_startproc + 1284 @ args = 0, pretend = 0, frame = 0 + 1285 @ frame_needed = 0, uses_anonymous_args = 0 + 1286 .LVL159: + 1287 0000 10B5 push {r4, lr} + 1288 .LCFI25: + 1289 .cfi_def_cfa_offset 8 + 1290 .cfi_offset 4, -8 + 1291 .cfi_offset 14, -4 + 1292 .LVL160: + 674:Src/usbd_conf.c **** HAL_StatusTypeDef hal_status = HAL_OK; + 675:Src/usbd_conf.c **** USBD_StatusTypeDef usb_status = USBD_OK; + 676:Src/usbd_conf.c **** + 677:Src/usbd_conf.c **** hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size); + 1293 .loc 1 677 0 + 1294 0002 8824 movs r4, #136 + 1295 0004 A400 lsls r4, r4, #2 + 1296 0006 0059 ldr r0, [r0, r4] + 1297 .LVL161: + 1298 0008 FFF7FEFF bl HAL_PCD_EP_Receive + 1299 .LVL162: + 678:Src/usbd_conf.c **** + 679:Src/usbd_conf.c **** switch (hal_status) { + 1300 .loc 1 679 0 + 1301 000c 0028 cmp r0, #0 + 1302 000e 03D0 beq .L94 + 1303 0010 0228 cmp r0, #2 + 1304 0012 03D0 beq .L95 + 680:Src/usbd_conf.c **** case HAL_OK : + 681:Src/usbd_conf.c **** usb_status = USBD_OK; + 682:Src/usbd_conf.c **** break; + 683:Src/usbd_conf.c **** case HAL_ERROR : + 684:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 1305 .loc 1 684 0 + 1306 0014 0220 movs r0, #2 + 1307 .LVL163: + 1308 .L93: + 685:Src/usbd_conf.c **** break; + 686:Src/usbd_conf.c **** case HAL_BUSY : + 687:Src/usbd_conf.c **** usb_status = USBD_BUSY; + 688:Src/usbd_conf.c **** break; + 689:Src/usbd_conf.c **** case HAL_TIMEOUT : + 690:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 691:Src/usbd_conf.c **** break; + 692:Src/usbd_conf.c **** default : + 693:Src/usbd_conf.c **** usb_status = USBD_FAIL; + 694:Src/usbd_conf.c **** break; + 695:Src/usbd_conf.c **** } + 696:Src/usbd_conf.c **** return usb_status; + 697:Src/usbd_conf.c **** } + 1309 .loc 1 697 0 + 1310 @ sp needed + 1311 0016 10BD pop {r4, pc} + 1312 .LVL164: + 1313 .L94: + ARM GAS /tmp/ccvOfDqw.s page 36 + + + 681:Src/usbd_conf.c **** break; + 1314 .loc 1 681 0 + 1315 0018 0020 movs r0, #0 + 1316 .LVL165: + 1317 001a FCE7 b .L93 + 1318 .LVL166: + 1319 .L95: + 687:Src/usbd_conf.c **** break; + 1320 .loc 1 687 0 + 1321 001c 0120 movs r0, #1 + 1322 .LVL167: + 688:Src/usbd_conf.c **** case HAL_TIMEOUT : + 1323 .loc 1 688 0 + 1324 001e FAE7 b .L93 + 1325 .cfi_endproc + 1326 .LFE68: + 1328 .section .text.USBD_LL_GetRxDataSize,"ax",%progbits + 1329 .align 1 + 1330 .global USBD_LL_GetRxDataSize + 1331 .syntax unified + 1332 .code 16 + 1333 .thumb_func + 1334 .fpu softvfp + 1336 USBD_LL_GetRxDataSize: + 1337 .LFB69: + 698:Src/usbd_conf.c **** + 699:Src/usbd_conf.c **** /** + 700:Src/usbd_conf.c **** * @brief Returns the last transfered packet size. + 701:Src/usbd_conf.c **** * @param pdev: Device handle + 702:Src/usbd_conf.c **** * @param ep_addr: Endpoint number + 703:Src/usbd_conf.c **** * @retval Recived Data Size + 704:Src/usbd_conf.c **** */ + 705:Src/usbd_conf.c **** uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr) + 706:Src/usbd_conf.c **** { + 1338 .loc 1 706 0 + 1339 .cfi_startproc + 1340 @ args = 0, pretend = 0, frame = 0 + 1341 @ frame_needed = 0, uses_anonymous_args = 0 + 1342 .LVL168: + 1343 0000 10B5 push {r4, lr} + 1344 .LCFI26: + 1345 .cfi_def_cfa_offset 8 + 1346 .cfi_offset 4, -8 + 1347 .cfi_offset 14, -4 + 707:Src/usbd_conf.c **** return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr); + 1348 .loc 1 707 0 + 1349 0002 8823 movs r3, #136 + 1350 0004 9B00 lsls r3, r3, #2 + 1351 0006 C058 ldr r0, [r0, r3] + 1352 .LVL169: + 1353 0008 FFF7FEFF bl HAL_PCD_EP_GetRxCount + 1354 .LVL170: + 708:Src/usbd_conf.c **** } + 1355 .loc 1 708 0 + 1356 @ sp needed + 1357 000c 10BD pop {r4, pc} + 1358 .cfi_endproc + ARM GAS /tmp/ccvOfDqw.s page 37 + + + 1359 .LFE69: + 1361 .section .text.USBD_LL_Delay,"ax",%progbits + 1362 .align 1 + 1363 .global USBD_LL_Delay + 1364 .syntax unified + 1365 .code 16 + 1366 .thumb_func + 1367 .fpu softvfp + 1369 USBD_LL_Delay: + 1370 .LFB70: + 709:Src/usbd_conf.c **** + 710:Src/usbd_conf.c **** /** + 711:Src/usbd_conf.c **** * @brief Delays routine for the USB device library. + 712:Src/usbd_conf.c **** * @param Delay: Delay in ms + 713:Src/usbd_conf.c **** * @retval None + 714:Src/usbd_conf.c **** */ + 715:Src/usbd_conf.c **** void USBD_LL_Delay(uint32_t Delay) + 716:Src/usbd_conf.c **** { + 1371 .loc 1 716 0 + 1372 .cfi_startproc + 1373 @ args = 0, pretend = 0, frame = 0 + 1374 @ frame_needed = 0, uses_anonymous_args = 0 + 1375 .LVL171: + 1376 0000 10B5 push {r4, lr} + 1377 .LCFI27: + 1378 .cfi_def_cfa_offset 8 + 1379 .cfi_offset 4, -8 + 1380 .cfi_offset 14, -4 + 717:Src/usbd_conf.c **** HAL_Delay(Delay); + 1381 .loc 1 717 0 + 1382 0002 FFF7FEFF bl HAL_Delay + 1383 .LVL172: + 718:Src/usbd_conf.c **** } + 1384 .loc 1 718 0 + 1385 @ sp needed + 1386 0006 10BD pop {r4, pc} + 1387 .cfi_endproc + 1388 .LFE70: + 1390 .section .text.USBD_static_free,"ax",%progbits + 1391 .align 1 + 1392 .global USBD_static_free + 1393 .syntax unified + 1394 .code 16 + 1395 .thumb_func + 1396 .fpu softvfp + 1398 USBD_static_free: + 1399 .LFB71: + 719:Src/usbd_conf.c **** + 720:Src/usbd_conf.c **** /** + 721:Src/usbd_conf.c **** * @brief Static single allocation. + 722:Src/usbd_conf.c **** * @param size: Size of allocated memory + 723:Src/usbd_conf.c **** * @retval None + 724:Src/usbd_conf.c **** */ + 725:Src/usbd_conf.c **** //void *USBD_static_malloc(uint32_t size) + 726:Src/usbd_conf.c **** //{ + 727:Src/usbd_conf.c **** // static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */ + 728:Src/usbd_conf.c **** // return mem; + ARM GAS /tmp/ccvOfDqw.s page 38 + + + 729:Src/usbd_conf.c **** //} + 730:Src/usbd_conf.c **** + 731:Src/usbd_conf.c **** /** + 732:Src/usbd_conf.c **** * @brief Dummy memory free + 733:Src/usbd_conf.c **** * @param p: Pointer to allocated memory address + 734:Src/usbd_conf.c **** * @retval None + 735:Src/usbd_conf.c **** */ + 736:Src/usbd_conf.c **** void USBD_static_free(void *p) + 737:Src/usbd_conf.c **** { + 1400 .loc 1 737 0 + 1401 .cfi_startproc + 1402 @ args = 0, pretend = 0, frame = 0 + 1403 @ frame_needed = 0, uses_anonymous_args = 0 + 1404 @ link register save eliminated. + 1405 .LVL173: + 738:Src/usbd_conf.c **** + 739:Src/usbd_conf.c **** } + 1406 .loc 1 739 0 + 1407 @ sp needed + 1408 0000 7047 bx lr + 1409 .cfi_endproc + 1410 .LFE71: + 1412 .section .text.HAL_PCDEx_SetConnectionState,"ax",%progbits + 1413 .align 1 + 1414 .global HAL_PCDEx_SetConnectionState + 1415 .syntax unified + 1416 .code 16 + 1417 .thumb_func + 1418 .fpu softvfp + 1420 HAL_PCDEx_SetConnectionState: + 1421 .LFB72: + 740:Src/usbd_conf.c **** + 741:Src/usbd_conf.c **** /* USER CODE BEGIN 5 */ + 742:Src/usbd_conf.c **** /** + 743:Src/usbd_conf.c **** * @brief Configures system clock after wake-up from USB Resume CallBack: + 744:Src/usbd_conf.c **** * enable HSI, PLL and select PLL as system clock source. + 745:Src/usbd_conf.c **** * @retval None + 746:Src/usbd_conf.c **** */ + 747:Src/usbd_conf.c **** //static void SystemClockConfig_Resume(void) + 748:Src/usbd_conf.c **** //{ + 749:Src/usbd_conf.c **** // SystemClock_Config(); + 750:Src/usbd_conf.c **** //} + 751:Src/usbd_conf.c **** /* USER CODE END 5 */ + 752:Src/usbd_conf.c **** + 753:Src/usbd_conf.c **** /** + 754:Src/usbd_conf.c **** * @brief Software device connection + 755:Src/usbd_conf.c **** * @param hpcd: PCD handle + 756:Src/usbd_conf.c **** * @param state: Connection state (0: disconnected / 1: connected) + 757:Src/usbd_conf.c **** * @retval None + 758:Src/usbd_conf.c **** */ + 759:Src/usbd_conf.c **** void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state) + 760:Src/usbd_conf.c **** { + 1422 .loc 1 760 0 + 1423 .cfi_startproc + 1424 @ args = 0, pretend = 0, frame = 0 + 1425 @ frame_needed = 0, uses_anonymous_args = 0 + 1426 @ link register save eliminated. + ARM GAS /tmp/ccvOfDqw.s page 39 + + + 1427 .LVL174: + 761:Src/usbd_conf.c **** /* USER CODE BEGIN 6 */ + 762:Src/usbd_conf.c **** if (state == 1) + 763:Src/usbd_conf.c **** { + 764:Src/usbd_conf.c **** /* Configure Low connection state. */ + 765:Src/usbd_conf.c **** + 766:Src/usbd_conf.c **** } + 767:Src/usbd_conf.c **** else + 768:Src/usbd_conf.c **** { + 769:Src/usbd_conf.c **** /* Configure High connection state */ + 770:Src/usbd_conf.c **** + 771:Src/usbd_conf.c **** } + 772:Src/usbd_conf.c **** /* USER CODE END 6 */ + 773:Src/usbd_conf.c **** } + 1428 .loc 1 773 0 + 1429 @ sp needed + 1430 0000 7047 bx lr + 1431 .cfi_endproc + 1432 .LFE72: + 1434 .comm hpcd_USB_FS,628,4 + 1435 .text + 1436 .Letext0: + 1437 .file 2 "/usr/include/newlib/machine/_default_types.h" + 1438 .file 3 "/usr/include/newlib/sys/_stdint.h" + 1439 .file 4 "Drivers/CMSIS/Include/core_cm0.h" + 1440 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 1441 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 1442 .file 7 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h" + 1443 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 1444 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h" + 1445 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h" + 1446 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 1447 .file 12 "/usr/include/newlib/sys/lock.h" + 1448 .file 13 "/usr/include/newlib/sys/_types.h" + 1449 .file 14 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 1450 .file 15 "/usr/include/newlib/sys/reent.h" + 1451 .file 16 "/usr/include/newlib/stdlib.h" + 1452 .file 17 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h" + 1453 .file 18 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h" + 1454 .file 19 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h" + 1455 .file 20 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h" + ARM GAS /tmp/ccvOfDqw.s page 40 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 usbd_conf.c + /tmp/ccvOfDqw.s:16 .text.HAL_PCD_MspInit:0000000000000000 $t + /tmp/ccvOfDqw.s:23 .text.HAL_PCD_MspInit:0000000000000000 HAL_PCD_MspInit + /tmp/ccvOfDqw.s:80 .text.HAL_PCD_MspInit:0000000000000038 $d + /tmp/ccvOfDqw.s:86 .text.HAL_PCD_MspDeInit:0000000000000000 $t + /tmp/ccvOfDqw.s:93 .text.HAL_PCD_MspDeInit:0000000000000000 HAL_PCD_MspDeInit + /tmp/ccvOfDqw.s:133 .text.HAL_PCD_MspDeInit:0000000000000020 $d + /tmp/ccvOfDqw.s:140 .text.HAL_PCD_SetupStageCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:147 .text.HAL_PCD_SetupStageCallback:0000000000000000 HAL_PCD_SetupStageCallback + /tmp/ccvOfDqw.s:178 .text.HAL_PCD_DataOutStageCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:185 .text.HAL_PCD_DataOutStageCallback:0000000000000000 HAL_PCD_DataOutStageCallback + /tmp/ccvOfDqw.s:218 .text.HAL_PCD_DataInStageCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:225 .text.HAL_PCD_DataInStageCallback:0000000000000000 HAL_PCD_DataInStageCallback + /tmp/ccvOfDqw.s:256 .text.HAL_PCD_SOFCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:263 .text.HAL_PCD_SOFCallback:0000000000000000 HAL_PCD_SOFCallback + /tmp/ccvOfDqw.s:289 .text.HAL_PCD_ResetCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:296 .text.HAL_PCD_ResetCallback:0000000000000000 HAL_PCD_ResetCallback + /tmp/ccvOfDqw.s:332 .text.HAL_PCD_SuspendCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:339 .text.HAL_PCD_SuspendCallback:0000000000000000 HAL_PCD_SuspendCallback + /tmp/ccvOfDqw.s:377 .text.HAL_PCD_SuspendCallback:0000000000000020 $d + /tmp/ccvOfDqw.s:382 .text.HAL_PCD_ResumeCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:389 .text.HAL_PCD_ResumeCallback:0000000000000000 HAL_PCD_ResumeCallback + /tmp/ccvOfDqw.s:415 .text.HAL_PCD_ISOOUTIncompleteCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:422 .text.HAL_PCD_ISOOUTIncompleteCallback:0000000000000000 HAL_PCD_ISOOUTIncompleteCallback + /tmp/ccvOfDqw.s:448 .text.HAL_PCD_ISOINIncompleteCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:455 .text.HAL_PCD_ISOINIncompleteCallback:0000000000000000 HAL_PCD_ISOINIncompleteCallback + /tmp/ccvOfDqw.s:481 .text.HAL_PCD_ConnectCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:488 .text.HAL_PCD_ConnectCallback:0000000000000000 HAL_PCD_ConnectCallback + /tmp/ccvOfDqw.s:514 .text.HAL_PCD_DisconnectCallback:0000000000000000 $t + /tmp/ccvOfDqw.s:521 .text.HAL_PCD_DisconnectCallback:0000000000000000 HAL_PCD_DisconnectCallback + /tmp/ccvOfDqw.s:547 .text.USBD_LL_Init:0000000000000000 $t + /tmp/ccvOfDqw.s:554 .text.USBD_LL_Init:0000000000000000 USBD_LL_Init + /tmp/ccvOfDqw.s:647 .text.USBD_LL_Init:0000000000000074 $d + *COM*:0000000000000274 hpcd_USB_FS + /tmp/ccvOfDqw.s:653 .text.USBD_LL_DeInit:0000000000000000 $t + /tmp/ccvOfDqw.s:660 .text.USBD_LL_DeInit:0000000000000000 USBD_LL_DeInit + /tmp/ccvOfDqw.s:709 .text.USBD_LL_Start:0000000000000000 $t + /tmp/ccvOfDqw.s:716 .text.USBD_LL_Start:0000000000000000 USBD_LL_Start + /tmp/ccvOfDqw.s:765 .text.USBD_LL_Stop:0000000000000000 $t + /tmp/ccvOfDqw.s:772 .text.USBD_LL_Stop:0000000000000000 USBD_LL_Stop + /tmp/ccvOfDqw.s:821 .text.USBD_LL_OpenEP:0000000000000000 $t + /tmp/ccvOfDqw.s:828 .text.USBD_LL_OpenEP:0000000000000000 USBD_LL_OpenEP + /tmp/ccvOfDqw.s:881 .text.USBD_LL_CloseEP:0000000000000000 $t + /tmp/ccvOfDqw.s:888 .text.USBD_LL_CloseEP:0000000000000000 USBD_LL_CloseEP + /tmp/ccvOfDqw.s:937 .text.USBD_LL_FlushEP:0000000000000000 $t + /tmp/ccvOfDqw.s:944 .text.USBD_LL_FlushEP:0000000000000000 USBD_LL_FlushEP + /tmp/ccvOfDqw.s:993 .text.USBD_LL_StallEP:0000000000000000 $t + /tmp/ccvOfDqw.s:1000 .text.USBD_LL_StallEP:0000000000000000 USBD_LL_StallEP + /tmp/ccvOfDqw.s:1049 .text.USBD_LL_ClearStallEP:0000000000000000 $t + /tmp/ccvOfDqw.s:1056 .text.USBD_LL_ClearStallEP:0000000000000000 USBD_LL_ClearStallEP + /tmp/ccvOfDqw.s:1105 .text.USBD_LL_IsStallEP:0000000000000000 $t + /tmp/ccvOfDqw.s:1112 .text.USBD_LL_IsStallEP:0000000000000000 USBD_LL_IsStallEP + /tmp/ccvOfDqw.s:1161 .text.USBD_LL_SetUSBAddress:0000000000000000 $t + /tmp/ccvOfDqw.s:1168 .text.USBD_LL_SetUSBAddress:0000000000000000 USBD_LL_SetUSBAddress + /tmp/ccvOfDqw.s:1217 .text.USBD_LL_Transmit:0000000000000000 $t + /tmp/ccvOfDqw.s:1224 .text.USBD_LL_Transmit:0000000000000000 USBD_LL_Transmit + ARM GAS /tmp/ccvOfDqw.s page 41 + + + /tmp/ccvOfDqw.s:1273 .text.USBD_LL_PrepareReceive:0000000000000000 $t + /tmp/ccvOfDqw.s:1280 .text.USBD_LL_PrepareReceive:0000000000000000 USBD_LL_PrepareReceive + /tmp/ccvOfDqw.s:1329 .text.USBD_LL_GetRxDataSize:0000000000000000 $t + /tmp/ccvOfDqw.s:1336 .text.USBD_LL_GetRxDataSize:0000000000000000 USBD_LL_GetRxDataSize + /tmp/ccvOfDqw.s:1362 .text.USBD_LL_Delay:0000000000000000 $t + /tmp/ccvOfDqw.s:1369 .text.USBD_LL_Delay:0000000000000000 USBD_LL_Delay + /tmp/ccvOfDqw.s:1391 .text.USBD_static_free:0000000000000000 $t + /tmp/ccvOfDqw.s:1398 .text.USBD_static_free:0000000000000000 USBD_static_free + /tmp/ccvOfDqw.s:1413 .text.HAL_PCDEx_SetConnectionState:0000000000000000 $t + /tmp/ccvOfDqw.s:1420 .text.HAL_PCDEx_SetConnectionState:0000000000000000 HAL_PCDEx_SetConnectionState + +UNDEFINED SYMBOLS +HAL_NVIC_SetPriority +HAL_NVIC_EnableIRQ +HAL_NVIC_DisableIRQ +USBD_LL_SetupStage +USBD_LL_DataOutStage +USBD_LL_DataInStage +USBD_LL_SOF +USBD_LL_SetSpeed +USBD_LL_Reset +USBD_LL_Suspend +USBD_LL_Resume +USBD_LL_IsoOUTIncomplete +USBD_LL_IsoINIncomplete +USBD_LL_DevConnected +USBD_LL_DevDisconnected +HAL_PCD_Init +HAL_PCDEx_PMAConfig +HAL_PCD_DeInit +HAL_PCD_Start +HAL_PCD_Stop +HAL_PCD_EP_Open +HAL_PCD_EP_Close +HAL_PCD_EP_Flush +HAL_PCD_EP_SetStall +HAL_PCD_EP_ClrStall +HAL_PCD_SetAddress +HAL_PCD_EP_Transmit +HAL_PCD_EP_Receive +HAL_PCD_EP_GetRxCount +HAL_Delay diff --git a/fw/midi-dials/build/usbd_conf.o b/fw/midi-dials/build/usbd_conf.o Binary files differnew file mode 100644 index 0000000..dfbb9de --- /dev/null +++ b/fw/midi-dials/build/usbd_conf.o diff --git a/fw/midi-dials/build/usbd_core.d b/fw/midi-dials/build/usbd_core.d new file mode 100644 index 0000000..db2a063 --- /dev/null +++ b/fw/midi-dials/build/usbd_core.d @@ -0,0 +1,107 @@ +build/usbd_core.o: \ + Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Inc/usbd_conf.h Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Inc/usbd_conf.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/fw/midi-dials/build/usbd_core.lst b/fw/midi-dials/build/usbd_core.lst new file mode 100644 index 0000000..c7d2ce7 --- /dev/null +++ b/fw/midi-dials/build/usbd_core.lst @@ -0,0 +1,1784 @@ +ARM GAS /tmp/ccHZmh3B.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "usbd_core.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.USBD_Init,"ax",%progbits + 16 .align 1 + 17 .global USBD_Init + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 USBD_Init: + 24 .LFB43: + 25 .file 1 "Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c" + 1:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 2:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** ****************************************************************************** + 3:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @file usbd_core.c + 4:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @author MCD Application Team + 5:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @version V2.4.2 + 6:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @date 11-December-2015 + 7:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief This file provides all the USBD core functions. + 8:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** ****************************************************************************** + 9:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @attention + 10:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * + 11:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2> + 12:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * + 13:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + 14:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * You may not use this file except in compliance with the License. + 15:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * You may obtain a copy of the License at: + 16:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * + 17:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * http://www.st.com/software_license_agreement_liberty_v2 + 18:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * + 19:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Unless required by applicable law or agreed to in writing, software + 20:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * distributed under the License is distributed on an "AS IS" BASIS, + 21:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 22:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * See the License for the specific language governing permissions and + 23:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * limitations under the License. + 24:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * + 25:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** ****************************************************************************** + 26:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 27:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 28:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Includes ------------------------------------------------------------------*/ + 29:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** #include "usbd_core.h" + 30:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 31:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** @addtogroup STM32_USBD_DEVICE_LIBRARY + 32:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @{ + 33:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + ARM GAS /tmp/ccHZmh3B.s page 2 + + + 34:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 35:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 36:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** @defgroup USBD_CORE + 37:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief usbd core module + 38:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @{ + 39:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 40:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 41:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** @defgroup USBD_CORE_Private_TypesDefinitions + 42:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @{ + 43:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 44:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 45:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @} + 46:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 47:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 48:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 49:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** @defgroup USBD_CORE_Private_Defines + 50:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @{ + 51:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 52:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 53:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 54:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @} + 55:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 56:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 57:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 58:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** @defgroup USBD_CORE_Private_Macros + 59:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @{ + 60:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 61:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 62:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @} + 63:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 64:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 65:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 66:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 67:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 68:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** @defgroup USBD_CORE_Private_FunctionPrototypes + 69:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @{ + 70:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 71:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 72:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 73:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @} + 74:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 75:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 76:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** @defgroup USBD_CORE_Private_Variables + 77:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @{ + 78:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 79:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 80:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 81:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @} + 82:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 83:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 84:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** @defgroup USBD_CORE_Private_Functions + 85:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @{ + 86:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 87:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 88:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 89:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_Init + 90:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Initializes the device stack and load the class driver + ARM GAS /tmp/ccHZmh3B.s page 3 + + + 91:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 92:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdesc: Descriptor structure address + 93:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param id: Low level core index + 94:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval None + 95:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 96:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev, USBD_DescriptorsTypeDef *pdesc, uint8_t id) + 97:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 26 .loc 1 97 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 10B5 push {r4, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 8 + 34 .cfi_offset 4, -8 + 35 .cfi_offset 14, -4 + 98:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Check whether the USB Host handle is valid */ + 99:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pdev == NULL) + 36 .loc 1 99 0 + 37 0002 0028 cmp r0, #0 + 38 0004 16D0 beq .L5 + 100:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 101:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_ErrLog("Invalid Device handle"); + 102:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_FAIL; + 103:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 104:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 105:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Unlink previous class*/ + 106:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pdev->pClass != NULL) + 39 .loc 1 106 0 + 40 0006 8523 movs r3, #133 + 41 0008 9B00 lsls r3, r3, #2 + 42 000a C358 ldr r3, [r0, r3] + 43 000c 002B cmp r3, #0 + 44 000e 03D0 beq .L3 + 107:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 108:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass = NULL; + 45 .loc 1 108 0 + 46 0010 8523 movs r3, #133 + 47 0012 9B00 lsls r3, r3, #2 + 48 0014 0024 movs r4, #0 + 49 0016 C450 str r4, [r0, r3] + 50 .L3: + 109:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 110:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 111:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Assign USBD Descriptors */ + 112:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pdesc != NULL) + 51 .loc 1 112 0 + 52 0018 0029 cmp r1, #0 + 53 001a 02D0 beq .L4 + 113:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 114:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pDesc = pdesc; + 54 .loc 1 114 0 + 55 001c 8423 movs r3, #132 + 56 001e 9B00 lsls r3, r3, #2 + 57 0020 C150 str r1, [r0, r3] + 58 .L4: + ARM GAS /tmp/ccHZmh3B.s page 4 + + + 115:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 116:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 117:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Set Device initial State */ + 118:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->dev_state = USBD_STATE_DEFAULT; + 59 .loc 1 118 0 + 60 0022 FE23 movs r3, #254 + 61 0024 5B00 lsls r3, r3, #1 + 62 0026 0121 movs r1, #1 + 63 .LVL1: + 64 0028 C154 strb r1, [r0, r3] + 119:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->id = id; + 65 .loc 1 119 0 + 66 002a 0270 strb r2, [r0] + 120:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Initialize low level driver */ + 121:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_Init(pdev); + 67 .loc 1 121 0 + 68 002c FFF7FEFF bl USBD_LL_Init + 69 .LVL2: + 122:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 123:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 70 .loc 1 123 0 + 71 0030 0020 movs r0, #0 + 72 .L2: + 124:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 73 .loc 1 124 0 + 74 @ sp needed + 75 0032 10BD pop {r4, pc} + 76 .LVL3: + 77 .L5: + 102:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 78 .loc 1 102 0 + 79 0034 0220 movs r0, #2 + 80 .LVL4: + 81 0036 FCE7 b .L2 + 82 .cfi_endproc + 83 .LFE43: + 85 .section .text.USBD_DeInit,"ax",%progbits + 86 .align 1 + 87 .global USBD_DeInit + 88 .syntax unified + 89 .code 16 + 90 .thumb_func + 91 .fpu softvfp + 93 USBD_DeInit: + 94 .LFB44: + 125:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 126:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 127:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_DeInit + 128:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Re-Initialize th device library + 129:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 130:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status: status + 131:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 132:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_DeInit(USBD_HandleTypeDef *pdev) + 133:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 95 .loc 1 133 0 + 96 .cfi_startproc + 97 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccHZmh3B.s page 5 + + + 98 @ frame_needed = 0, uses_anonymous_args = 0 + 99 .LVL5: + 100 0000 10B5 push {r4, lr} + 101 .LCFI1: + 102 .cfi_def_cfa_offset 8 + 103 .cfi_offset 4, -8 + 104 .cfi_offset 14, -4 + 105 0002 0400 movs r4, r0 + 134:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Set Default State */ + 135:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->dev_state = USBD_STATE_DEFAULT; + 106 .loc 1 135 0 + 107 0004 FE23 movs r3, #254 + 108 0006 5B00 lsls r3, r3, #1 + 109 0008 0122 movs r2, #1 + 110 000a C254 strb r2, [r0, r3] + 136:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 137:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Free Class Resources */ + 138:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->DeInit(pdev, pdev->dev_config); + 111 .loc 1 138 0 + 112 000c 1833 adds r3, r3, #24 + 113 000e C358 ldr r3, [r0, r3] + 114 0010 5B68 ldr r3, [r3, #4] + 115 0012 0179 ldrb r1, [r0, #4] + 116 0014 9847 blx r3 + 117 .LVL6: + 139:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 140:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Stop the low level driver */ + 141:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_Stop(pdev); + 118 .loc 1 141 0 + 119 0016 2000 movs r0, r4 + 120 0018 FFF7FEFF bl USBD_LL_Stop + 121 .LVL7: + 142:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 143:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Initialize low level driver */ + 144:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_DeInit(pdev); + 122 .loc 1 144 0 + 123 001c 2000 movs r0, r4 + 124 001e FFF7FEFF bl USBD_LL_DeInit + 125 .LVL8: + 145:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 146:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 147:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 126 .loc 1 147 0 + 127 0022 0020 movs r0, #0 + 128 @ sp needed + 129 .LVL9: + 130 0024 10BD pop {r4, pc} + 131 .cfi_endproc + 132 .LFE44: + 134 .section .text.USBD_RegisterClass,"ax",%progbits + 135 .align 1 + 136 .global USBD_RegisterClass + 137 .syntax unified + 138 .code 16 + 139 .thumb_func + 140 .fpu softvfp + 142 USBD_RegisterClass: + ARM GAS /tmp/ccHZmh3B.s page 6 + + + 143 .LFB45: + 148:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 149:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 150:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 151:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_RegisterClass + 152:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Link class driver to Device Core. + 153:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pDevice : Device Handle + 154:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pclass: Class handle + 155:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval USBD Status + 156:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 157:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass) + 158:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 144 .loc 1 158 0 + 145 .cfi_startproc + 146 @ args = 0, pretend = 0, frame = 0 + 147 @ frame_needed = 0, uses_anonymous_args = 0 + 148 @ link register save eliminated. + 149 .LVL10: + 159:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef status = USBD_OK; + 160:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pclass != 0) + 150 .loc 1 160 0 + 151 0000 0029 cmp r1, #0 + 152 0002 04D0 beq .L9 + 161:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 162:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* link the class to the USB Device handle */ + 163:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass = pclass; + 153 .loc 1 163 0 + 154 0004 8523 movs r3, #133 + 155 0006 9B00 lsls r3, r3, #2 + 156 0008 C150 str r1, [r0, r3] + 164:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** status = USBD_OK; + 157 .loc 1 164 0 + 158 000a 0020 movs r0, #0 + 159 .LVL11: + 160 .L8: + 165:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 166:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** else + 167:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 168:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_ErrLog("Invalid Class handle"); + 169:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** status = USBD_FAIL; + 170:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 171:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 172:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return status; + 173:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 161 .loc 1 173 0 + 162 @ sp needed + 163 000c 7047 bx lr + 164 .LVL12: + 165 .L9: + 169:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 166 .loc 1 169 0 + 167 000e 0220 movs r0, #2 + 168 .LVL13: + 169 0010 FCE7 b .L8 + 170 .cfi_endproc + 171 .LFE45: + 173 .section .text.USBD_Start,"ax",%progbits + ARM GAS /tmp/ccHZmh3B.s page 7 + + + 174 .align 1 + 175 .global USBD_Start + 176 .syntax unified + 177 .code 16 + 178 .thumb_func + 179 .fpu softvfp + 181 USBD_Start: + 182 .LFB46: + 174:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 175:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 176:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_Start + 177:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Start the USB Device Core. + 178:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: Device Handle + 179:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval USBD Status + 180:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 181:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_Start (USBD_HandleTypeDef *pdev) + 182:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 183 .loc 1 182 0 + 184 .cfi_startproc + 185 @ args = 0, pretend = 0, frame = 0 + 186 @ frame_needed = 0, uses_anonymous_args = 0 + 187 .LVL14: + 188 0000 10B5 push {r4, lr} + 189 .LCFI2: + 190 .cfi_def_cfa_offset 8 + 191 .cfi_offset 4, -8 + 192 .cfi_offset 14, -4 + 183:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 184:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Start the low level driver */ + 185:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_Start(pdev); + 193 .loc 1 185 0 + 194 0002 FFF7FEFF bl USBD_LL_Start + 195 .LVL15: + 186:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 187:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 188:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 196 .loc 1 188 0 + 197 0006 0020 movs r0, #0 + 198 @ sp needed + 199 0008 10BD pop {r4, pc} + 200 .cfi_endproc + 201 .LFE46: + 203 .section .text.USBD_Stop,"ax",%progbits + 204 .align 1 + 205 .global USBD_Stop + 206 .syntax unified + 207 .code 16 + 208 .thumb_func + 209 .fpu softvfp + 211 USBD_Stop: + 212 .LFB47: + 189:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 190:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 191:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_Stop + 192:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Stop the USB Device Core. + 193:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: Device Handle + 194:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval USBD Status + ARM GAS /tmp/ccHZmh3B.s page 8 + + + 195:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 196:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_Stop (USBD_HandleTypeDef *pdev) + 197:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 213 .loc 1 197 0 + 214 .cfi_startproc + 215 @ args = 0, pretend = 0, frame = 0 + 216 @ frame_needed = 0, uses_anonymous_args = 0 + 217 .LVL16: + 218 0000 10B5 push {r4, lr} + 219 .LCFI3: + 220 .cfi_def_cfa_offset 8 + 221 .cfi_offset 4, -8 + 222 .cfi_offset 14, -4 + 223 0002 0400 movs r4, r0 + 198:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Free Class Resources */ + 199:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->DeInit(pdev, pdev->dev_config); + 224 .loc 1 199 0 + 225 0004 8523 movs r3, #133 + 226 0006 9B00 lsls r3, r3, #2 + 227 0008 C358 ldr r3, [r0, r3] + 228 000a 5B68 ldr r3, [r3, #4] + 229 000c 0179 ldrb r1, [r0, #4] + 230 000e 9847 blx r3 + 231 .LVL17: + 200:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 201:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Stop the low level driver */ + 202:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_Stop(pdev); + 232 .loc 1 202 0 + 233 0010 2000 movs r0, r4 + 234 0012 FFF7FEFF bl USBD_LL_Stop + 235 .LVL18: + 203:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 204:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 205:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 236 .loc 1 205 0 + 237 0016 0020 movs r0, #0 + 238 @ sp needed + 239 .LVL19: + 240 0018 10BD pop {r4, pc} + 241 .cfi_endproc + 242 .LFE47: + 244 .section .text.USBD_RunTestMode,"ax",%progbits + 245 .align 1 + 246 .global USBD_RunTestMode + 247 .syntax unified + 248 .code 16 + 249 .thumb_func + 250 .fpu softvfp + 252 USBD_RunTestMode: + 253 .LFB48: + 206:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 207:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 208:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_RunTestMode + 209:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Launch test mode process + 210:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 211:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 212:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + ARM GAS /tmp/ccHZmh3B.s page 9 + + + 213:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_RunTestMode (USBD_HandleTypeDef *pdev) + 214:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 254 .loc 1 214 0 + 255 .cfi_startproc + 256 @ args = 0, pretend = 0, frame = 0 + 257 @ frame_needed = 0, uses_anonymous_args = 0 + 258 @ link register save eliminated. + 259 .LVL20: + 215:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 216:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 260 .loc 1 216 0 + 261 0000 0020 movs r0, #0 + 262 .LVL21: + 263 @ sp needed + 264 0002 7047 bx lr + 265 .cfi_endproc + 266 .LFE48: + 268 .section .text.USBD_SetClassConfig,"ax",%progbits + 269 .align 1 + 270 .global USBD_SetClassConfig + 271 .syntax unified + 272 .code 16 + 273 .thumb_func + 274 .fpu softvfp + 276 USBD_SetClassConfig: + 277 .LFB49: + 217:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 218:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 219:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 220:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_SetClassConfig + 221:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Configure device and start the interface + 222:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 223:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param cfgidx: configuration index + 224:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 225:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 226:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 227:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) + 228:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 278 .loc 1 228 0 + 279 .cfi_startproc + 280 @ args = 0, pretend = 0, frame = 0 + 281 @ frame_needed = 0, uses_anonymous_args = 0 + 282 .LVL22: + 283 0000 10B5 push {r4, lr} + 284 .LCFI4: + 285 .cfi_def_cfa_offset 8 + 286 .cfi_offset 4, -8 + 287 .cfi_offset 14, -4 + 288 .LVL23: + 229:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef ret = USBD_FAIL; + 230:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 231:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pdev->pClass != NULL) + 289 .loc 1 231 0 + 290 0002 8523 movs r3, #133 + 291 0004 9B00 lsls r3, r3, #2 + 292 0006 C358 ldr r3, [r0, r3] + 293 0008 002B cmp r3, #0 + ARM GAS /tmp/ccHZmh3B.s page 10 + + + 294 000a 07D0 beq .L15 + 232:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 233:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Set configuration and Start the Class*/ + 234:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pdev->pClass->Init(pdev, cfgidx) == 0) + 295 .loc 1 234 0 + 296 000c 1B68 ldr r3, [r3] + 297 000e 9847 blx r3 + 298 .LVL24: + 299 0010 0028 cmp r0, #0 + 300 0012 01D1 bne .L17 + 235:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 236:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** ret = USBD_OK; + 301 .loc 1 236 0 + 302 0014 0020 movs r0, #0 + 303 .L14: + 304 .LVL25: + 237:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 238:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 239:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return ret; + 240:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 305 .loc 1 240 0 + 306 @ sp needed + 307 0016 10BD pop {r4, pc} + 308 .LVL26: + 309 .L17: + 229:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 310 .loc 1 229 0 + 311 0018 0220 movs r0, #2 + 312 001a FCE7 b .L14 + 313 .LVL27: + 314 .L15: + 315 001c 0220 movs r0, #2 + 316 .LVL28: + 317 001e FAE7 b .L14 + 318 .cfi_endproc + 319 .LFE49: + 321 .section .text.USBD_ClrClassConfig,"ax",%progbits + 322 .align 1 + 323 .global USBD_ClrClassConfig + 324 .syntax unified + 325 .code 16 + 326 .thumb_func + 327 .fpu softvfp + 329 USBD_ClrClassConfig: + 330 .LFB50: + 241:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 242:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 243:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_ClrClassConfig + 244:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Clear current configuration + 245:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 246:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param cfgidx: configuration index + 247:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status: USBD_StatusTypeDef + 248:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 249:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx) + 250:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 331 .loc 1 250 0 + 332 .cfi_startproc + ARM GAS /tmp/ccHZmh3B.s page 11 + + + 333 @ args = 0, pretend = 0, frame = 0 + 334 @ frame_needed = 0, uses_anonymous_args = 0 + 335 .LVL29: + 336 0000 10B5 push {r4, lr} + 337 .LCFI5: + 338 .cfi_def_cfa_offset 8 + 339 .cfi_offset 4, -8 + 340 .cfi_offset 14, -4 + 251:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Clear configuration and De-initialize the Class process*/ + 252:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->DeInit(pdev, cfgidx); + 341 .loc 1 252 0 + 342 0002 8523 movs r3, #133 + 343 0004 9B00 lsls r3, r3, #2 + 344 0006 C358 ldr r3, [r0, r3] + 345 0008 5B68 ldr r3, [r3, #4] + 346 000a 9847 blx r3 + 347 .LVL30: + 253:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 254:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 348 .loc 1 254 0 + 349 000c 0020 movs r0, #0 + 350 @ sp needed + 351 000e 10BD pop {r4, pc} + 352 .cfi_endproc + 353 .LFE50: + 355 .section .text.USBD_LL_SetupStage,"ax",%progbits + 356 .align 1 + 357 .global USBD_LL_SetupStage + 358 .syntax unified + 359 .code 16 + 360 .thumb_func + 361 .fpu softvfp + 363 USBD_LL_SetupStage: + 364 .LFB51: + 255:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 256:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 257:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 258:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_SetupStage + 259:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle the setup stage + 260:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 261:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 262:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 263:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup) + 264:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 365 .loc 1 264 0 + 366 .cfi_startproc + 367 @ args = 0, pretend = 0, frame = 0 + 368 @ frame_needed = 0, uses_anonymous_args = 0 + 369 .LVL31: + 370 0000 70B5 push {r4, r5, r6, lr} + 371 .LCFI6: + 372 .cfi_def_cfa_offset 16 + 373 .cfi_offset 4, -16 + 374 .cfi_offset 5, -12 + 375 .cfi_offset 6, -8 + 376 .cfi_offset 14, -4 + 377 0002 0400 movs r4, r0 + ARM GAS /tmp/ccHZmh3B.s page 12 + + + 265:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 266:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_ParseSetupRequest(&pdev->request, psetup); + 378 .loc 1 266 0 + 379 0004 8223 movs r3, #130 + 380 0006 9B00 lsls r3, r3, #2 + 381 0008 C518 adds r5, r0, r3 + 382 000a 2800 movs r0, r5 + 383 .LVL32: + 384 000c FFF7FEFF bl USBD_ParseSetupRequest + 385 .LVL33: + 267:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 268:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->ep0_state = USBD_EP0_SETUP; + 386 .loc 1 268 0 + 387 0010 FA23 movs r3, #250 + 388 0012 5B00 lsls r3, r3, #1 + 389 0014 0122 movs r2, #1 + 390 0016 E250 str r2, [r4, r3] + 269:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->ep0_data_len = pdev->request.wLength; + 391 .loc 1 269 0 + 392 0018 124B ldr r3, .L26 + 393 001a E25A ldrh r2, [r4, r3] + 394 001c 163B subs r3, r3, #22 + 395 001e E250 str r2, [r4, r3] + 270:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 271:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** switch (pdev->request.bmRequest & 0x1F) + 396 .loc 1 271 0 + 397 0020 1033 adds r3, r3, #16 + 398 0022 E15C ldrb r1, [r4, r3] + 399 0024 EA3B subs r3, r3, #234 + 400 0026 FF3B subs r3, r3, #255 + 401 0028 0B40 ands r3, r1 + 402 002a 012B cmp r3, #1 + 403 002c 0FD0 beq .L21 + 404 002e 002B cmp r3, #0 + 405 0030 07D0 beq .L22 + 406 0032 022B cmp r3, #2 + 407 0034 10D0 beq .L23 + 272:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 273:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** case USB_REQ_RECIPIENT_DEVICE: + 274:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StdDevReq (pdev, &pdev->request); + 275:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** break; + 276:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 277:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** case USB_REQ_RECIPIENT_INTERFACE: + 278:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StdItfReq(pdev, &pdev->request); + 279:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** break; + 280:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 281:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** case USB_REQ_RECIPIENT_ENDPOINT: + 282:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StdEPReq(pdev, &pdev->request); + 283:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** break; + 284:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 285:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** default: + 286:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_StallEP(pdev , pdev->request.bmRequest & 0x80); + 408 .loc 1 286 0 + 409 0036 7F23 movs r3, #127 + 410 0038 9943 bics r1, r3 + 411 003a 2000 movs r0, r4 + 412 003c FFF7FEFF bl USBD_LL_StallEP + ARM GAS /tmp/ccHZmh3B.s page 13 + + + 413 .LVL34: + 287:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** break; + 414 .loc 1 287 0 + 415 0040 03E0 b .L24 + 416 .L22: + 274:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** break; + 417 .loc 1 274 0 + 418 0042 2900 movs r1, r5 + 419 0044 2000 movs r0, r4 + 420 0046 FFF7FEFF bl USBD_StdDevReq + 421 .LVL35: + 422 .L24: + 288:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 289:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 290:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 423 .loc 1 290 0 + 424 004a 0020 movs r0, #0 + 425 @ sp needed + 426 .LVL36: + 427 .LVL37: + 428 004c 70BD pop {r4, r5, r6, pc} + 429 .LVL38: + 430 .L21: + 278:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** break; + 431 .loc 1 278 0 + 432 004e 2900 movs r1, r5 + 433 0050 2000 movs r0, r4 + 434 0052 FFF7FEFF bl USBD_StdItfReq + 435 .LVL39: + 279:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 436 .loc 1 279 0 + 437 0056 F8E7 b .L24 + 438 .L23: + 282:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** break; + 439 .loc 1 282 0 + 440 0058 2900 movs r1, r5 + 441 005a 2000 movs r0, r4 + 442 005c FFF7FEFF bl USBD_StdEPReq + 443 .LVL40: + 283:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 444 .loc 1 283 0 + 445 0060 F3E7 b .L24 + 446 .L27: + 447 0062 C046 .align 2 + 448 .L26: + 449 0064 0E020000 .word 526 + 450 .cfi_endproc + 451 .LFE51: + 453 .section .text.USBD_LL_DataOutStage,"ax",%progbits + 454 .align 1 + 455 .global USBD_LL_DataOutStage + 456 .syntax unified + 457 .code 16 + 458 .thumb_func + 459 .fpu softvfp + 461 USBD_LL_DataOutStage: + 462 .LFB52: + ARM GAS /tmp/ccHZmh3B.s page 14 + + + 291:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 292:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 293:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_DataOutStage + 294:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle data OUT stage + 295:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 296:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param epnum: endpoint index + 297:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 298:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 299:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev , uint8_t epnum, uint8_t *pdata) + 300:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 463 .loc 1 300 0 + 464 .cfi_startproc + 465 @ args = 0, pretend = 0, frame = 0 + 466 @ frame_needed = 0, uses_anonymous_args = 0 + 467 .LVL41: + 468 0000 10B5 push {r4, lr} + 469 .LCFI7: + 470 .cfi_def_cfa_offset 8 + 471 .cfi_offset 4, -8 + 472 .cfi_offset 14, -4 + 473 0002 0400 movs r4, r0 + 474 0004 1300 movs r3, r2 + 301:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_EndpointTypeDef *pep; + 302:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 303:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(epnum == 0) + 475 .loc 1 303 0 + 476 0006 0029 cmp r1, #0 + 477 0008 29D1 bne .L29 + 478 .LVL42: + 304:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 305:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pep = &pdev->ep_out[0]; + 306:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 307:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if ( pdev->ep0_state == USBD_EP0_DATA_OUT) + 479 .loc 1 307 0 + 480 000a FA22 movs r2, #250 + 481 .LVL43: + 482 000c 5200 lsls r2, r2, #1 + 483 000e 8258 ldr r2, [r0, r2] + 484 0010 032A cmp r2, #3 + 485 0012 01D0 beq .L34 + 486 .LVL44: + 487 .L30: + 308:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 309:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pep->rem_length > pep->maxpacket) + 310:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 311:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pep->rem_length -= pep->maxpacket; + 312:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 313:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_CtlContinueRx (pdev, + 314:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdata, + 315:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** MIN(pep->rem_length ,pep->maxpacket)); + 316:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 317:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** else + 318:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 319:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if((pdev->pClass->EP0_RxReady != NULL)&& + 320:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 321:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 322:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->EP0_RxReady(pdev); + ARM GAS /tmp/ccHZmh3B.s page 15 + + + 323:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 324:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_CtlSendStatus(pdev); + 325:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 326:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 327:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 328:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** else if((pdev->pClass->DataOut != NULL)&& + 329:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 330:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 331:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->DataOut(pdev, epnum); + 332:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 333:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 334:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 488 .loc 1 334 0 + 489 0014 0020 movs r0, #0 + 490 @ sp needed + 491 .LVL45: + 492 0016 10BD pop {r4, pc} + 493 .LVL46: + 494 .L34: + 309:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 495 .loc 1 309 0 + 496 0018 421D adds r2, r0, #5 + 497 001a FF32 adds r2, r2, #255 + 498 001c 9168 ldr r1, [r2, #8] + 499 .LVL47: + 500 001e D268 ldr r2, [r2, #12] + 501 0020 9142 cmp r1, r2 + 502 0022 0FD8 bhi .L35 + 319:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 503 .loc 1 319 0 + 504 0024 8523 movs r3, #133 + 505 .LVL48: + 506 0026 9B00 lsls r3, r3, #2 + 507 0028 C358 ldr r3, [r0, r3] + 508 002a 1B69 ldr r3, [r3, #16] + 509 002c 002B cmp r3, #0 + 510 002e 05D0 beq .L33 + 320:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 511 .loc 1 320 0 discriminator 1 + 512 0030 FE22 movs r2, #254 + 513 0032 5200 lsls r2, r2, #1 + 514 0034 825C ldrb r2, [r0, r2] + 319:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 515 .loc 1 319 0 discriminator 1 + 516 0036 032A cmp r2, #3 + 517 0038 00D1 bne .L33 + 322:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 518 .loc 1 322 0 + 519 003a 9847 blx r3 + 520 .LVL49: + 521 .L33: + 324:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 522 .loc 1 324 0 + 523 003c 2000 movs r0, r4 + 524 003e FFF7FEFF bl USBD_CtlSendStatus + 525 .LVL50: + 526 0042 E7E7 b .L30 + ARM GAS /tmp/ccHZmh3B.s page 16 + + + 527 .LVL51: + 528 .L35: + 311:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 529 .loc 1 311 0 + 530 0044 891A subs r1, r1, r2 + 531 0046 0530 adds r0, r0, #5 + 532 .LVL52: + 533 0048 FF30 adds r0, r0, #255 + 534 004a 8160 str r1, [r0, #8] + 315:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 535 .loc 1 315 0 + 536 004c 8A42 cmp r2, r1 + 537 004e 00D9 bls .L32 + 538 0050 0A00 movs r2, r1 + 539 .L32: + 313:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdata, + 540 .loc 1 313 0 + 541 0052 92B2 uxth r2, r2 + 542 0054 1900 movs r1, r3 + 543 0056 2000 movs r0, r4 + 544 0058 FFF7FEFF bl USBD_CtlContinueRx + 545 .LVL53: + 546 005c DAE7 b .L30 + 547 .LVL54: + 548 .L29: + 328:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 549 .loc 1 328 0 + 550 005e 8523 movs r3, #133 + 551 0060 9B00 lsls r3, r3, #2 + 552 0062 C358 ldr r3, [r0, r3] + 553 0064 9B69 ldr r3, [r3, #24] + 554 0066 002B cmp r3, #0 + 555 0068 D4D0 beq .L30 + 329:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 556 .loc 1 329 0 discriminator 1 + 557 006a FE22 movs r2, #254 + 558 .LVL55: + 559 006c 5200 lsls r2, r2, #1 + 560 006e 825C ldrb r2, [r0, r2] + 328:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 561 .loc 1 328 0 discriminator 1 + 562 0070 032A cmp r2, #3 + 563 0072 CFD1 bne .L30 + 331:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 564 .loc 1 331 0 + 565 0074 9847 blx r3 + 566 .LVL56: + 567 0076 CDE7 b .L30 + 568 .cfi_endproc + 569 .LFE52: + 571 .global __aeabi_uidivmod + 572 .section .text.USBD_LL_DataInStage,"ax",%progbits + 573 .align 1 + 574 .global USBD_LL_DataInStage + 575 .syntax unified + 576 .code 16 + 577 .thumb_func + ARM GAS /tmp/ccHZmh3B.s page 17 + + + 578 .fpu softvfp + 580 USBD_LL_DataInStage: + 581 .LFB53: + 335:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 336:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 337:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_DataInStage + 338:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle data in stage + 339:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 340:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param epnum: endpoint index + 341:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 342:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 343:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev ,uint8_t epnum, uint8_t *pdata) + 344:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 582 .loc 1 344 0 + 583 .cfi_startproc + 584 @ args = 0, pretend = 0, frame = 0 + 585 @ frame_needed = 0, uses_anonymous_args = 0 + 586 .LVL57: + 587 0000 70B5 push {r4, r5, r6, lr} + 588 .LCFI8: + 589 .cfi_def_cfa_offset 16 + 590 .cfi_offset 4, -16 + 591 .cfi_offset 5, -12 + 592 .cfi_offset 6, -8 + 593 .cfi_offset 14, -4 + 594 0002 0400 movs r4, r0 + 595 0004 1300 movs r3, r2 + 345:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_EndpointTypeDef *pep; + 346:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 347:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(epnum == 0) + 596 .loc 1 347 0 + 597 0006 0029 cmp r1, #0 + 598 0008 4ED1 bne .L37 + 599 .LVL58: + 348:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 349:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pep = &pdev->ep_in[0]; + 350:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 351:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if ( pdev->ep0_state == USBD_EP0_DATA_IN) + 600 .loc 1 351 0 + 601 000a FA22 movs r2, #250 + 602 .LVL59: + 603 000c 5200 lsls r2, r2, #1 + 604 000e 8258 ldr r2, [r0, r2] + 605 0010 022A cmp r2, #2 + 606 0012 06D0 beq .L43 + 607 .LVL60: + 608 .L38: + 352:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 353:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pep->rem_length > pep->maxpacket) + 354:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 355:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pep->rem_length -= pep->maxpacket; + 356:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 357:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_CtlContinueSendData (pdev, + 358:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdata, + 359:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pep->rem_length); + 360:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 361:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Prepare endpoint for premature end of transfer */ + ARM GAS /tmp/ccHZmh3B.s page 18 + + + 362:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_PrepareReceive (pdev, + 363:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** 0, + 364:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** NULL, + 365:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** 0); + 366:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 367:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** else + 368:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { /* last packet is MPS multiple, so send ZLP packet */ + 369:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if((pep->total_length % pep->maxpacket == 0) && + 370:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pep->total_length >= pep->maxpacket) && + 371:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pep->total_length < pdev->ep0_data_len )) + 372:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 373:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 374:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_CtlContinueSendData(pdev , NULL, 0); + 375:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->ep0_data_len = 0; + 376:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 377:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Prepare endpoint for premature end of transfer */ + 378:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_PrepareReceive (pdev, + 379:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** 0, + 380:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** NULL, + 381:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** 0); + 382:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 383:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** else + 384:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 385:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if((pdev->pClass->EP0_TxSent != NULL)&& + 386:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 387:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 388:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->EP0_TxSent(pdev); + 389:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 390:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_CtlReceiveStatus(pdev); + 391:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 392:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 393:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 394:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if (pdev->dev_test_mode == 1) + 609 .loc 1 394 0 + 610 0014 8023 movs r3, #128 + 611 0016 9B00 lsls r3, r3, #2 + 612 0018 E35C ldrb r3, [r4, r3] + 613 001a 012B cmp r3, #1 + 614 001c 3FD0 beq .L44 + 615 .LVL61: + 616 .L42: + 395:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 396:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_RunTestMode(pdev); + 397:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->dev_test_mode = 0; + 398:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 399:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 400:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** else if((pdev->pClass->DataIn != NULL)&& + 401:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 402:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 403:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->DataIn(pdev, epnum); + 404:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 405:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 406:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 617 .loc 1 406 0 + 618 001e 0020 movs r0, #0 + 619 @ sp needed + 620 .LVL62: + ARM GAS /tmp/ccHZmh3B.s page 19 + + + 621 0020 70BD pop {r4, r5, r6, pc} + 622 .LVL63: + 623 .L43: + 353:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 624 .loc 1 353 0 + 625 0022 C269 ldr r2, [r0, #28] + 626 0024 056A ldr r5, [r0, #32] + 627 0026 AA42 cmp r2, r5 + 628 0028 1ED8 bhi .L45 + 369:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pep->total_length >= pep->maxpacket) && + 629 .loc 1 369 0 + 630 002a 8669 ldr r6, [r0, #24] + 631 002c 2900 movs r1, r5 + 632 .LVL64: + 633 002e 3000 movs r0, r6 + 634 .LVL65: + 635 0030 FFF7FEFF bl __aeabi_uidivmod + 636 .LVL66: + 637 0034 0029 cmp r1, #0 + 638 0036 06D1 bne .L40 + 369:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pep->total_length >= pep->maxpacket) && + 639 .loc 1 369 0 is_stmt 0 discriminator 1 + 640 0038 B542 cmp r5, r6 + 641 003a 04D8 bhi .L40 + 371:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 642 .loc 1 371 0 is_stmt 1 + 643 003c FC23 movs r3, #252 + 644 003e 5B00 lsls r3, r3, #1 + 645 0040 E358 ldr r3, [r4, r3] + 370:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pep->total_length < pdev->ep0_data_len )) + 646 .loc 1 370 0 + 647 0042 9E42 cmp r6, r3 + 648 0044 1DD3 bcc .L46 + 649 .L40: + 385:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 650 .loc 1 385 0 + 651 0046 8523 movs r3, #133 + 652 0048 9B00 lsls r3, r3, #2 + 653 004a E358 ldr r3, [r4, r3] + 654 004c DB68 ldr r3, [r3, #12] + 655 004e 002B cmp r3, #0 + 656 0050 06D0 beq .L41 + 386:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 657 .loc 1 386 0 discriminator 1 + 658 0052 FE22 movs r2, #254 + 659 0054 5200 lsls r2, r2, #1 + 660 0056 A25C ldrb r2, [r4, r2] + 385:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 661 .loc 1 385 0 discriminator 1 + 662 0058 032A cmp r2, #3 + 663 005a 01D1 bne .L41 + 388:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 664 .loc 1 388 0 + 665 005c 2000 movs r0, r4 + 666 005e 9847 blx r3 + 667 .LVL67: + 668 .L41: + ARM GAS /tmp/ccHZmh3B.s page 20 + + + 390:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 669 .loc 1 390 0 + 670 0060 2000 movs r0, r4 + 671 0062 FFF7FEFF bl USBD_CtlReceiveStatus + 672 .LVL68: + 673 0066 D5E7 b .L38 + 674 .LVL69: + 675 .L45: + 355:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 676 .loc 1 355 0 + 677 0068 521B subs r2, r2, r5 + 678 006a C261 str r2, [r0, #28] + 357:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdata, + 679 .loc 1 357 0 + 680 006c 92B2 uxth r2, r2 + 681 006e 1900 movs r1, r3 + 682 .LVL70: + 683 0070 FFF7FEFF bl USBD_CtlContinueSendData + 684 .LVL71: + 362:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** 0, + 685 .loc 1 362 0 + 686 0074 0023 movs r3, #0 + 687 0076 0022 movs r2, #0 + 688 0078 0021 movs r1, #0 + 689 007a 2000 movs r0, r4 + 690 007c FFF7FEFF bl USBD_LL_PrepareReceive + 691 .LVL72: + 692 0080 C8E7 b .L38 + 693 .L46: + 374:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->ep0_data_len = 0; + 694 .loc 1 374 0 + 695 0082 0022 movs r2, #0 + 696 0084 2000 movs r0, r4 + 697 0086 FFF7FEFF bl USBD_CtlContinueSendData + 698 .LVL73: + 375:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 699 .loc 1 375 0 + 700 008a FC23 movs r3, #252 + 701 008c 5B00 lsls r3, r3, #1 + 702 008e 0022 movs r2, #0 + 703 0090 E250 str r2, [r4, r3] + 378:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** 0, + 704 .loc 1 378 0 + 705 0092 0023 movs r3, #0 + 706 0094 0021 movs r1, #0 + 707 0096 2000 movs r0, r4 + 708 0098 FFF7FEFF bl USBD_LL_PrepareReceive + 709 .LVL74: + 710 009c BAE7 b .L38 + 711 .L44: + 397:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 712 .loc 1 397 0 + 713 009e 8023 movs r3, #128 + 714 00a0 9B00 lsls r3, r3, #2 + 715 00a2 0022 movs r2, #0 + 716 00a4 E254 strb r2, [r4, r3] + 717 00a6 BAE7 b .L42 + ARM GAS /tmp/ccHZmh3B.s page 21 + + + 718 .LVL75: + 719 .L37: + 400:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 720 .loc 1 400 0 + 721 00a8 8523 movs r3, #133 + 722 00aa 9B00 lsls r3, r3, #2 + 723 00ac C358 ldr r3, [r0, r3] + 724 00ae 5B69 ldr r3, [r3, #20] + 725 00b0 002B cmp r3, #0 + 726 00b2 B4D0 beq .L42 + 401:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 727 .loc 1 401 0 discriminator 1 + 728 00b4 FE22 movs r2, #254 + 729 .LVL76: + 730 00b6 5200 lsls r2, r2, #1 + 731 00b8 825C ldrb r2, [r0, r2] + 400:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** (pdev->dev_state == USBD_STATE_CONFIGURED)) + 732 .loc 1 400 0 discriminator 1 + 733 00ba 032A cmp r2, #3 + 734 00bc AFD1 bne .L42 + 403:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 735 .loc 1 403 0 + 736 00be 9847 blx r3 + 737 .LVL77: + 738 00c0 ADE7 b .L42 + 739 .cfi_endproc + 740 .LFE53: + 742 .section .text.USBD_LL_Reset,"ax",%progbits + 743 .align 1 + 744 .global USBD_LL_Reset + 745 .syntax unified + 746 .code 16 + 747 .thumb_func + 748 .fpu softvfp + 750 USBD_LL_Reset: + 751 .LFB54: + 407:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 408:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 409:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_LL_Reset + 410:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle Reset event + 411:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 412:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 413:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 414:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 415:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev) + 416:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 752 .loc 1 416 0 + 753 .cfi_startproc + 754 @ args = 0, pretend = 0, frame = 0 + 755 @ frame_needed = 0, uses_anonymous_args = 0 + 756 .LVL78: + 757 0000 70B5 push {r4, r5, r6, lr} + 758 .LCFI9: + 759 .cfi_def_cfa_offset 16 + 760 .cfi_offset 4, -16 + 761 .cfi_offset 5, -12 + 762 .cfi_offset 6, -8 + ARM GAS /tmp/ccHZmh3B.s page 22 + + + 763 .cfi_offset 14, -4 + 764 0002 0400 movs r4, r0 + 417:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Open EP0 OUT */ + 418:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_OpenEP(pdev, + 765 .loc 1 418 0 + 766 0004 4023 movs r3, #64 + 767 0006 0022 movs r2, #0 + 768 0008 0021 movs r1, #0 + 769 000a FFF7FEFF bl USBD_LL_OpenEP + 770 .LVL79: + 419:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** 0x00, + 420:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_EP_TYPE_CTRL, + 421:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USB_MAX_EP0_SIZE); + 422:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 423:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE; + 771 .loc 1 423 0 + 772 000e 4025 movs r5, #64 + 773 0010 8823 movs r3, #136 + 774 0012 5B00 lsls r3, r3, #1 + 775 0014 E550 str r5, [r4, r3] + 424:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 425:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Open EP0 IN */ + 426:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_LL_OpenEP(pdev, + 776 .loc 1 426 0 + 777 0016 D03B subs r3, r3, #208 + 778 0018 0022 movs r2, #0 + 779 001a 8021 movs r1, #128 + 780 001c 2000 movs r0, r4 + 781 001e FFF7FEFF bl USBD_LL_OpenEP + 782 .LVL80: + 427:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** 0x80, + 428:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_EP_TYPE_CTRL, + 429:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USB_MAX_EP0_SIZE); + 430:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 431:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE; + 783 .loc 1 431 0 + 784 0022 2562 str r5, [r4, #32] + 432:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Upon Reset call user call back */ + 433:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->dev_state = USBD_STATE_DEFAULT; + 785 .loc 1 433 0 + 786 0024 FE23 movs r3, #254 + 787 0026 5B00 lsls r3, r3, #1 + 788 0028 0122 movs r2, #1 + 789 002a E254 strb r2, [r4, r3] + 434:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 435:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if (pdev->pClassData) + 790 .loc 1 435 0 + 791 002c 1C33 adds r3, r3, #28 + 792 002e E358 ldr r3, [r4, r3] + 793 0030 002B cmp r3, #0 + 794 0032 06D0 beq .L48 + 436:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->DeInit(pdev, pdev->dev_config); + 795 .loc 1 436 0 + 796 0034 8523 movs r3, #133 + 797 0036 9B00 lsls r3, r3, #2 + 798 0038 E358 ldr r3, [r4, r3] + 799 003a 5B68 ldr r3, [r3, #4] + ARM GAS /tmp/ccHZmh3B.s page 23 + + + 800 003c 2179 ldrb r1, [r4, #4] + 801 003e 2000 movs r0, r4 + 802 0040 9847 blx r3 + 803 .LVL81: + 804 .L48: + 437:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 438:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 439:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 440:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 805 .loc 1 440 0 + 806 0042 0020 movs r0, #0 + 807 @ sp needed + 808 .LVL82: + 809 0044 70BD pop {r4, r5, r6, pc} + 810 .cfi_endproc + 811 .LFE54: + 813 .section .text.USBD_LL_SetSpeed,"ax",%progbits + 814 .align 1 + 815 .global USBD_LL_SetSpeed + 816 .syntax unified + 817 .code 16 + 818 .thumb_func + 819 .fpu softvfp + 821 USBD_LL_SetSpeed: + 822 .LFB55: + 441:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 442:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 443:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 444:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 445:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 446:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_LL_Reset + 447:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle Reset event + 448:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 449:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 450:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 451:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev, USBD_SpeedTypeDef speed) + 452:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 823 .loc 1 452 0 + 824 .cfi_startproc + 825 @ args = 0, pretend = 0, frame = 0 + 826 @ frame_needed = 0, uses_anonymous_args = 0 + 827 @ link register save eliminated. + 828 .LVL83: + 453:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->dev_speed = speed; + 829 .loc 1 453 0 + 830 0000 0174 strb r1, [r0, #16] + 454:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 455:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 831 .loc 1 455 0 + 832 0002 0020 movs r0, #0 + 833 .LVL84: + 834 @ sp needed + 835 0004 7047 bx lr + 836 .cfi_endproc + 837 .LFE55: + 839 .section .text.USBD_LL_Suspend,"ax",%progbits + 840 .align 1 + ARM GAS /tmp/ccHZmh3B.s page 24 + + + 841 .global USBD_LL_Suspend + 842 .syntax unified + 843 .code 16 + 844 .thumb_func + 845 .fpu softvfp + 847 USBD_LL_Suspend: + 848 .LFB56: + 456:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 457:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 458:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_Suspend + 459:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle Suspend event + 460:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 461:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 462:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 463:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 464:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev) + 465:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 849 .loc 1 465 0 + 850 .cfi_startproc + 851 @ args = 0, pretend = 0, frame = 0 + 852 @ frame_needed = 0, uses_anonymous_args = 0 + 853 @ link register save eliminated. + 854 .LVL85: + 466:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->dev_old_state = pdev->dev_state; + 855 .loc 1 466 0 + 856 0000 FE23 movs r3, #254 + 857 0002 5B00 lsls r3, r3, #1 + 858 0004 C15C ldrb r1, [r0, r3] + 859 0006 FE22 movs r2, #254 + 860 0008 FF32 adds r2, r2, #255 + 861 000a 8154 strb r1, [r0, r2] + 467:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->dev_state = USBD_STATE_SUSPENDED; + 862 .loc 1 467 0 + 863 000c FA3A subs r2, r2, #250 + 864 000e FF3A subs r2, r2, #255 + 865 0010 C254 strb r2, [r0, r3] + 468:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 469:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 866 .loc 1 469 0 + 867 0012 0020 movs r0, #0 + 868 .LVL86: + 869 @ sp needed + 870 0014 7047 bx lr + 871 .cfi_endproc + 872 .LFE56: + 874 .section .text.USBD_LL_Resume,"ax",%progbits + 875 .align 1 + 876 .global USBD_LL_Resume + 877 .syntax unified + 878 .code 16 + 879 .thumb_func + 880 .fpu softvfp + 882 USBD_LL_Resume: + 883 .LFB57: + 470:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 471:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 472:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_Resume + ARM GAS /tmp/ccHZmh3B.s page 25 + + + 473:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle Resume event + 474:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 475:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 476:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 477:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 478:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev) + 479:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 884 .loc 1 479 0 + 885 .cfi_startproc + 886 @ args = 0, pretend = 0, frame = 0 + 887 @ frame_needed = 0, uses_anonymous_args = 0 + 888 @ link register save eliminated. + 889 .LVL87: + 480:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->dev_state = pdev->dev_old_state; + 890 .loc 1 480 0 + 891 0000 FE23 movs r3, #254 + 892 0002 FF33 adds r3, r3, #255 + 893 0004 C25C ldrb r2, [r0, r3] + 894 0006 013B subs r3, r3, #1 + 895 0008 C254 strb r2, [r0, r3] + 481:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 482:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 896 .loc 1 482 0 + 897 000a 0020 movs r0, #0 + 898 .LVL88: + 899 @ sp needed + 900 000c 7047 bx lr + 901 .cfi_endproc + 902 .LFE57: + 904 .section .text.USBD_LL_SOF,"ax",%progbits + 905 .align 1 + 906 .global USBD_LL_SOF + 907 .syntax unified + 908 .code 16 + 909 .thumb_func + 910 .fpu softvfp + 912 USBD_LL_SOF: + 913 .LFB58: + 483:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 484:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 485:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_SOF + 486:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle SOF event + 487:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 488:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 489:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 490:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 491:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev) + 492:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 914 .loc 1 492 0 + 915 .cfi_startproc + 916 @ args = 0, pretend = 0, frame = 0 + 917 @ frame_needed = 0, uses_anonymous_args = 0 + 918 .LVL89: + 919 0000 10B5 push {r4, lr} + 920 .LCFI10: + 921 .cfi_def_cfa_offset 8 + 922 .cfi_offset 4, -8 + ARM GAS /tmp/ccHZmh3B.s page 26 + + + 923 .cfi_offset 14, -4 + 493:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pdev->dev_state == USBD_STATE_CONFIGURED) + 924 .loc 1 493 0 + 925 0002 FE23 movs r3, #254 + 926 0004 5B00 lsls r3, r3, #1 + 927 0006 C35C ldrb r3, [r0, r3] + 928 0008 032B cmp r3, #3 + 929 000a 01D0 beq .L54 + 930 .LVL90: + 931 .L53: + 494:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 495:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** if(pdev->pClass->SOF != NULL) + 496:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 497:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->SOF(pdev); + 498:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 499:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 500:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 501:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 932 .loc 1 501 0 + 933 000c 0020 movs r0, #0 + 934 @ sp needed + 935 000e 10BD pop {r4, pc} + 936 .LVL91: + 937 .L54: + 495:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 938 .loc 1 495 0 + 939 0010 8523 movs r3, #133 + 940 0012 9B00 lsls r3, r3, #2 + 941 0014 C358 ldr r3, [r0, r3] + 942 0016 DB69 ldr r3, [r3, #28] + 943 0018 002B cmp r3, #0 + 944 001a F7D0 beq .L53 + 497:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 945 .loc 1 497 0 + 946 001c 9847 blx r3 + 947 .LVL92: + 948 001e F5E7 b .L53 + 949 .cfi_endproc + 950 .LFE58: + 952 .section .text.USBD_LL_IsoINIncomplete,"ax",%progbits + 953 .align 1 + 954 .global USBD_LL_IsoINIncomplete + 955 .syntax unified + 956 .code 16 + 957 .thumb_func + 958 .fpu softvfp + 960 USBD_LL_IsoINIncomplete: + 961 .LFB59: + 502:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 503:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 504:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_IsoINIncomplete + 505:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle iso in incomplete event + 506:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 507:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 508:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 509:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_IsoINIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) + 510:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + ARM GAS /tmp/ccHZmh3B.s page 27 + + + 962 .loc 1 510 0 + 963 .cfi_startproc + 964 @ args = 0, pretend = 0, frame = 0 + 965 @ frame_needed = 0, uses_anonymous_args = 0 + 966 @ link register save eliminated. + 967 .LVL93: + 511:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 512:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 968 .loc 1 512 0 + 969 0000 0020 movs r0, #0 + 970 .LVL94: + 971 @ sp needed + 972 0002 7047 bx lr + 973 .cfi_endproc + 974 .LFE59: + 976 .section .text.USBD_LL_IsoOUTIncomplete,"ax",%progbits + 977 .align 1 + 978 .global USBD_LL_IsoOUTIncomplete + 979 .syntax unified + 980 .code 16 + 981 .thumb_func + 982 .fpu softvfp + 984 USBD_LL_IsoOUTIncomplete: + 985 .LFB60: + 513:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 514:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 515:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_IsoOUTIncomplete + 516:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle iso out incomplete event + 517:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 518:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 519:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 520:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_IsoOUTIncomplete(USBD_HandleTypeDef *pdev, uint8_t epnum) + 521:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 986 .loc 1 521 0 + 987 .cfi_startproc + 988 @ args = 0, pretend = 0, frame = 0 + 989 @ frame_needed = 0, uses_anonymous_args = 0 + 990 @ link register save eliminated. + 991 .LVL95: + 522:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 523:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 992 .loc 1 523 0 + 993 0000 0020 movs r0, #0 + 994 .LVL96: + 995 @ sp needed + 996 0002 7047 bx lr + 997 .cfi_endproc + 998 .LFE60: + 1000 .section .text.USBD_LL_DevConnected,"ax",%progbits + 1001 .align 1 + 1002 .global USBD_LL_DevConnected + 1003 .syntax unified + 1004 .code 16 + 1005 .thumb_func + 1006 .fpu softvfp + 1008 USBD_LL_DevConnected: + 1009 .LFB61: + ARM GAS /tmp/ccHZmh3B.s page 28 + + + 524:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 525:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 526:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_DevConnected + 527:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle device connection event + 528:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 529:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 530:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 531:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_DevConnected(USBD_HandleTypeDef *pdev) + 532:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 1010 .loc 1 532 0 + 1011 .cfi_startproc + 1012 @ args = 0, pretend = 0, frame = 0 + 1013 @ frame_needed = 0, uses_anonymous_args = 0 + 1014 @ link register save eliminated. + 1015 .LVL97: + 533:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 534:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 1016 .loc 1 534 0 + 1017 0000 0020 movs r0, #0 + 1018 .LVL98: + 1019 @ sp needed + 1020 0002 7047 bx lr + 1021 .cfi_endproc + 1022 .LFE61: + 1024 .section .text.USBD_LL_DevDisconnected,"ax",%progbits + 1025 .align 1 + 1026 .global USBD_LL_DevDisconnected + 1027 .syntax unified + 1028 .code 16 + 1029 .thumb_func + 1030 .fpu softvfp + 1032 USBD_LL_DevDisconnected: + 1033 .LFB62: + 535:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 536:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /** + 537:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @brief USBD_DevDisconnected + 538:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * Handle device disconnection event + 539:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @param pdev: device instance + 540:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** * @retval status + 541:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** */ + 542:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** USBD_StatusTypeDef USBD_LL_DevDisconnected(USBD_HandleTypeDef *pdev) + 543:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** { + 1034 .loc 1 543 0 + 1035 .cfi_startproc + 1036 @ args = 0, pretend = 0, frame = 0 + 1037 @ frame_needed = 0, uses_anonymous_args = 0 + 1038 .LVL99: + 1039 0000 10B5 push {r4, lr} + 1040 .LCFI11: + 1041 .cfi_def_cfa_offset 8 + 1042 .cfi_offset 4, -8 + 1043 .cfi_offset 14, -4 + 544:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** /* Free Class Resources */ + 545:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->dev_state = USBD_STATE_DEFAULT; + 1044 .loc 1 545 0 + 1045 0002 FE23 movs r3, #254 + 1046 0004 5B00 lsls r3, r3, #1 + ARM GAS /tmp/ccHZmh3B.s page 29 + + + 1047 0006 0122 movs r2, #1 + 1048 0008 C254 strb r2, [r0, r3] + 546:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** pdev->pClass->DeInit(pdev, pdev->dev_config); + 1049 .loc 1 546 0 + 1050 000a 1833 adds r3, r3, #24 + 1051 000c C358 ldr r3, [r0, r3] + 1052 000e 5B68 ldr r3, [r3, #4] + 1053 0010 0179 ldrb r1, [r0, #4] + 1054 0012 9847 blx r3 + 1055 .LVL100: + 547:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** + 548:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** return USBD_OK; + 549:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c **** } + 1056 .loc 1 549 0 + 1057 0014 0020 movs r0, #0 + 1058 @ sp needed + 1059 0016 10BD pop {r4, pc} + 1060 .cfi_endproc + 1061 .LFE62: + 1063 .text + 1064 .Letext0: + 1065 .file 2 "/usr/include/newlib/machine/_default_types.h" + 1066 .file 3 "/usr/include/newlib/sys/lock.h" + 1067 .file 4 "/usr/include/newlib/sys/_types.h" + 1068 .file 5 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 1069 .file 6 "/usr/include/newlib/sys/reent.h" + 1070 .file 7 "/usr/include/newlib/sys/_stdint.h" + 1071 .file 8 "/usr/include/newlib/stdlib.h" + 1072 .file 9 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 1073 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 1074 .file 11 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h" + 1075 .file 12 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h" + 1076 .file 13 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h" + 1077 .file 14 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h" + ARM GAS /tmp/ccHZmh3B.s page 30 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 usbd_core.c + /tmp/ccHZmh3B.s:16 .text.USBD_Init:0000000000000000 $t + /tmp/ccHZmh3B.s:23 .text.USBD_Init:0000000000000000 USBD_Init + /tmp/ccHZmh3B.s:86 .text.USBD_DeInit:0000000000000000 $t + /tmp/ccHZmh3B.s:93 .text.USBD_DeInit:0000000000000000 USBD_DeInit + /tmp/ccHZmh3B.s:135 .text.USBD_RegisterClass:0000000000000000 $t + /tmp/ccHZmh3B.s:142 .text.USBD_RegisterClass:0000000000000000 USBD_RegisterClass + /tmp/ccHZmh3B.s:174 .text.USBD_Start:0000000000000000 $t + /tmp/ccHZmh3B.s:181 .text.USBD_Start:0000000000000000 USBD_Start + /tmp/ccHZmh3B.s:204 .text.USBD_Stop:0000000000000000 $t + /tmp/ccHZmh3B.s:211 .text.USBD_Stop:0000000000000000 USBD_Stop + /tmp/ccHZmh3B.s:245 .text.USBD_RunTestMode:0000000000000000 $t + /tmp/ccHZmh3B.s:252 .text.USBD_RunTestMode:0000000000000000 USBD_RunTestMode + /tmp/ccHZmh3B.s:269 .text.USBD_SetClassConfig:0000000000000000 $t + /tmp/ccHZmh3B.s:276 .text.USBD_SetClassConfig:0000000000000000 USBD_SetClassConfig + /tmp/ccHZmh3B.s:322 .text.USBD_ClrClassConfig:0000000000000000 $t + /tmp/ccHZmh3B.s:329 .text.USBD_ClrClassConfig:0000000000000000 USBD_ClrClassConfig + /tmp/ccHZmh3B.s:356 .text.USBD_LL_SetupStage:0000000000000000 $t + /tmp/ccHZmh3B.s:363 .text.USBD_LL_SetupStage:0000000000000000 USBD_LL_SetupStage + /tmp/ccHZmh3B.s:449 .text.USBD_LL_SetupStage:0000000000000064 $d + /tmp/ccHZmh3B.s:454 .text.USBD_LL_DataOutStage:0000000000000000 $t + /tmp/ccHZmh3B.s:461 .text.USBD_LL_DataOutStage:0000000000000000 USBD_LL_DataOutStage + /tmp/ccHZmh3B.s:573 .text.USBD_LL_DataInStage:0000000000000000 $t + /tmp/ccHZmh3B.s:580 .text.USBD_LL_DataInStage:0000000000000000 USBD_LL_DataInStage + /tmp/ccHZmh3B.s:743 .text.USBD_LL_Reset:0000000000000000 $t + /tmp/ccHZmh3B.s:750 .text.USBD_LL_Reset:0000000000000000 USBD_LL_Reset + /tmp/ccHZmh3B.s:814 .text.USBD_LL_SetSpeed:0000000000000000 $t + /tmp/ccHZmh3B.s:821 .text.USBD_LL_SetSpeed:0000000000000000 USBD_LL_SetSpeed + /tmp/ccHZmh3B.s:840 .text.USBD_LL_Suspend:0000000000000000 $t + /tmp/ccHZmh3B.s:847 .text.USBD_LL_Suspend:0000000000000000 USBD_LL_Suspend + /tmp/ccHZmh3B.s:875 .text.USBD_LL_Resume:0000000000000000 $t + /tmp/ccHZmh3B.s:882 .text.USBD_LL_Resume:0000000000000000 USBD_LL_Resume + /tmp/ccHZmh3B.s:905 .text.USBD_LL_SOF:0000000000000000 $t + /tmp/ccHZmh3B.s:912 .text.USBD_LL_SOF:0000000000000000 USBD_LL_SOF + /tmp/ccHZmh3B.s:953 .text.USBD_LL_IsoINIncomplete:0000000000000000 $t + /tmp/ccHZmh3B.s:960 .text.USBD_LL_IsoINIncomplete:0000000000000000 USBD_LL_IsoINIncomplete + /tmp/ccHZmh3B.s:977 .text.USBD_LL_IsoOUTIncomplete:0000000000000000 $t + /tmp/ccHZmh3B.s:984 .text.USBD_LL_IsoOUTIncomplete:0000000000000000 USBD_LL_IsoOUTIncomplete + /tmp/ccHZmh3B.s:1001 .text.USBD_LL_DevConnected:0000000000000000 $t + /tmp/ccHZmh3B.s:1008 .text.USBD_LL_DevConnected:0000000000000000 USBD_LL_DevConnected + /tmp/ccHZmh3B.s:1025 .text.USBD_LL_DevDisconnected:0000000000000000 $t + /tmp/ccHZmh3B.s:1032 .text.USBD_LL_DevDisconnected:0000000000000000 USBD_LL_DevDisconnected + +UNDEFINED SYMBOLS +USBD_LL_Init +USBD_LL_Stop +USBD_LL_DeInit +USBD_LL_Start +USBD_ParseSetupRequest +USBD_LL_StallEP +USBD_StdDevReq +USBD_StdItfReq +USBD_StdEPReq +USBD_CtlSendStatus +USBD_CtlContinueRx +__aeabi_uidivmod + ARM GAS /tmp/ccHZmh3B.s page 31 + + +USBD_CtlReceiveStatus +USBD_CtlContinueSendData +USBD_LL_PrepareReceive +USBD_LL_OpenEP diff --git a/fw/midi-dials/build/usbd_core.o b/fw/midi-dials/build/usbd_core.o Binary files differnew file mode 100644 index 0000000..7c64aa7 --- /dev/null +++ b/fw/midi-dials/build/usbd_core.o diff --git a/fw/midi-dials/build/usbd_ctlreq.d b/fw/midi-dials/build/usbd_ctlreq.d new file mode 100644 index 0000000..eea9f02 --- /dev/null +++ b/fw/midi-dials/build/usbd_ctlreq.d @@ -0,0 +1,110 @@ +build/usbd_ctlreq.o: \ + Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Inc/usbd_conf.h Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Inc/usbd_conf.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/fw/midi-dials/build/usbd_ctlreq.lst b/fw/midi-dials/build/usbd_ctlreq.lst new file mode 100644 index 0000000..4b58f09 --- /dev/null +++ b/fw/midi-dials/build/usbd_ctlreq.lst @@ -0,0 +1,2650 @@ +ARM GAS /tmp/cc7AGXQS.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "usbd_ctlreq.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.USBD_GetLen,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 USBD_GetLen: + 23 .LFB56: + 24 .file 1 "Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c" + 1:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 2:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** ****************************************************************************** + 3:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @file usbd_req.c + 4:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @author MCD Application Team + 5:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @version V2.4.2 + 6:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @date 11-December-2015 + 7:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief This file provides the standard USB requests following chapter 9. + 8:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** ****************************************************************************** + 9:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @attention + 10:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * + 11:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2> + 12:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * + 13:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + 14:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * You may not use this file except in compliance with the License. + 15:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * You may obtain a copy of the License at: + 16:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * + 17:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * http://www.st.com/software_license_agreement_liberty_v2 + 18:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * + 19:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Unless required by applicable law or agreed to in writing, software + 20:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * distributed under the License is distributed on an "AS IS" BASIS, + 21:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 22:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * See the License for the specific language governing permissions and + 23:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * limitations under the License. + 24:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * + 25:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** ****************************************************************************** + 26:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 27:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 28:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /* Includes ------------------------------------------------------------------*/ + 29:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #include "usbd_ctlreq.h" + 30:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #include "usbd_ioreq.h" + 31:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 32:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 33:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** @addtogroup STM32_USBD_STATE_DEVICE_LIBRARY + 34:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @{ + ARM GAS /tmp/cc7AGXQS.s page 2 + + + 35:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 36:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 37:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 38:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** @defgroup USBD_REQ + 39:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USB standard requests module + 40:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @{ + 41:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 42:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 43:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** @defgroup USBD_REQ_Private_TypesDefinitions + 44:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @{ + 45:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 46:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 47:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @} + 48:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 49:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 50:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 51:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** @defgroup USBD_REQ_Private_Defines + 52:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @{ + 53:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 54:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 55:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 56:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @} + 57:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 58:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 59:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 60:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** @defgroup USBD_REQ_Private_Macros + 61:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @{ + 62:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 63:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 64:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @} + 65:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 66:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 67:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 68:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** @defgroup USBD_REQ_Private_Variables + 69:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @{ + 70:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 71:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 72:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @} + 73:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 74:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 75:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 76:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** @defgroup USBD_REQ_Private_FunctionPrototypes + 77:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @{ + 78:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 79:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , + 80:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req); + 81:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 82:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_SetAddress(USBD_HandleTypeDef *pdev , + 83:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req); + 84:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 85:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_SetConfig(USBD_HandleTypeDef *pdev , + 86:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req); + 87:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 88:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_GetConfig(USBD_HandleTypeDef *pdev , + 89:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req); + 90:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 91:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_GetStatus(USBD_HandleTypeDef *pdev , + ARM GAS /tmp/cc7AGXQS.s page 3 + + + 92:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req); + 93:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 94:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_SetFeature(USBD_HandleTypeDef *pdev , + 95:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req); + 96:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 97:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , + 98:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req); + 99:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 100:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static uint8_t USBD_GetLen(uint8_t *buf); + 101:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 102:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 103:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @} + 104:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 105:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 106:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 107:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** @defgroup USBD_REQ_Private_Functions + 108:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @{ + 109:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 110:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 111:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 112:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 113:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_StdDevReq + 114:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle standard usb device requests + 115:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 116:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 117:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + 118:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 119:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_StatusTypeDef USBD_StdDevReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) + 120:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 121:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_StatusTypeDef ret = USBD_OK; + 122:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 123:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (req->bRequest) + 124:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 125:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_GET_DESCRIPTOR: + 126:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 127:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_GetDescriptor (pdev, req) ; + 128:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 129:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 130:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_SET_ADDRESS: + 131:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetAddress(pdev, req); + 132:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 133:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 134:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_SET_CONFIGURATION: + 135:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetConfig (pdev , req); + 136:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 137:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 138:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_GET_CONFIGURATION: + 139:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_GetConfig (pdev , req); + 140:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 141:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 142:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_GET_STATUS: + 143:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_GetStatus (pdev , req); + 144:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 145:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 146:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 147:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_SET_FEATURE: + 148:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetFeature (pdev , req); + ARM GAS /tmp/cc7AGXQS.s page 4 + + + 149:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 150:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 151:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_CLEAR_FEATURE: + 152:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_ClrFeature (pdev , req); + 153:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 154:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 155:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + 156:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 157:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 158:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 159:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 160:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return ret; + 161:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 162:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 163:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 164:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_StdItfReq + 165:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle standard usb interface requests + 166:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 167:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 168:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + 169:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 170:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_StatusTypeDef USBD_StdItfReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) + 171:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 172:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_StatusTypeDef ret = USBD_OK; + 173:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 174:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (pdev->dev_state) + 175:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 176:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_CONFIGURED: + 177:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 178:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES) + 179:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 180:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->pClass->Setup (pdev, req); + 181:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 182:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if((req->wLength == 0)&& (ret == USBD_OK)) + 183:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 184:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 185:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 186:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 187:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 188:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 189:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 190:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 191:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 192:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 193:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + 194:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 195:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 196:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 197:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return USBD_OK; + 198:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 199:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 200:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 201:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_StdEPReq + 202:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle standard usb endpoint requests + 203:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 204:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 205:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + ARM GAS /tmp/cc7AGXQS.s page 5 + + + 206:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 207:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_StatusTypeDef USBD_StdEPReq (USBD_HandleTypeDef *pdev , USBD_SetupReqTypedef *req) + 208:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 209:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 210:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** uint8_t ep_addr; + 211:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_StatusTypeDef ret = USBD_OK; + 212:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_EndpointTypeDef *pep; + 213:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** ep_addr = LOBYTE(req->wIndex); + 214:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 215:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /* Check if it is a class request */ + 216:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if ((req->bmRequest & 0x60) == 0x20) + 217:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 218:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->pClass->Setup (pdev, req); + 219:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 220:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return USBD_OK; + 221:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 222:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 223:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (req->bRequest) + 224:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 225:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 226:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_SET_FEATURE : + 227:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 228:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (pdev->dev_state) + 229:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 230:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_ADDRESSED: + 231:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if ((ep_addr != 0x00) && (ep_addr != 0x80)) + 232:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 233:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_StallEP(pdev , ep_addr); + 234:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 235:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 236:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 237:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_CONFIGURED: + 238:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (req->wValue == USB_FEATURE_EP_HALT) + 239:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 240:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if ((ep_addr != 0x00) && (ep_addr != 0x80)) + 241:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 242:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_StallEP(pdev , ep_addr); + 243:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 244:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 245:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 246:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->pClass->Setup (pdev, req); + 247:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 248:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 249:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 250:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 251:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + 252:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 253:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 254:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 255:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 256:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 257:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_CLEAR_FEATURE : + 258:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 259:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (pdev->dev_state) + 260:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 261:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_ADDRESSED: + 262:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if ((ep_addr != 0x00) && (ep_addr != 0x80)) + ARM GAS /tmp/cc7AGXQS.s page 6 + + + 263:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 264:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_StallEP(pdev , ep_addr); + 265:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 266:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 267:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 268:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_CONFIGURED: + 269:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (req->wValue == USB_FEATURE_EP_HALT) + 270:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 271:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if ((ep_addr & 0x7F) != 0x00) + 272:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 273:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_ClearStallEP(pdev , ep_addr); + 274:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->pClass->Setup (pdev, req); + 275:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 276:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 277:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 278:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 279:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 280:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + 281:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 282:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 283:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 284:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 285:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 286:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_REQ_GET_STATUS: + 287:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (pdev->dev_state) + 288:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 289:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_ADDRESSED: + 290:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if ((ep_addr & 0x7F) != 0x00) + 291:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 292:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_StallEP(pdev , ep_addr); + 293:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 294:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 295:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 296:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_CONFIGURED: + 297:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pep = ((ep_addr & 0x80) == 0x80) ? &pdev->ep_in[ep_addr & 0x7F]:\ + 298:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** &pdev->ep_out[ep_addr & 0x7F]; + 299:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if(USBD_LL_IsStallEP(pdev, ep_addr)) + 300:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 301:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pep->status = 0x0001; + 302:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 303:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 304:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 305:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pep->status = 0x0000; + 306:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 307:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 308:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendData (pdev, + 309:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** (uint8_t *)&pep->status, + 310:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** 2); + 311:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 312:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 313:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + 314:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 315:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 316:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 317:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 318:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 319:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + ARM GAS /tmp/cc7AGXQS.s page 7 + + + 320:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 321:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 322:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return ret; + 323:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 324:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 325:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_GetDescriptor + 326:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle Get Descriptor requests + 327:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 328:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 329:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + 330:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 331:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev , + 332:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req) + 333:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 334:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** uint16_t len; + 335:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** uint8_t *pbuf; + 336:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 337:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 338:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (req->wValue >> 8) + 339:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 340:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #if (USBD_LPM_ENABLED == 1) + 341:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_DESC_TYPE_BOS: + 342:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = pdev->pDesc->GetBOSDescriptor(pdev->dev_speed, &len); + 343:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 344:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #endif + 345:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_DESC_TYPE_DEVICE: + 346:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len); + 347:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 348:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 349:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_DESC_TYPE_CONFIGURATION: + 350:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if(pdev->dev_speed == USBD_SPEED_HIGH ) + 351:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 352:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = (uint8_t *)pdev->pClass->GetHSConfigDescriptor(&len); + 353:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf[1] = USB_DESC_TYPE_CONFIGURATION; + 354:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 355:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 356:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 357:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = (uint8_t *)pdev->pClass->GetFSConfigDescriptor(&len); + 358:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf[1] = USB_DESC_TYPE_CONFIGURATION; + 359:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 360:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 361:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 362:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_DESC_TYPE_STRING: + 363:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch ((uint8_t)(req->wValue)) + 364:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 365:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_IDX_LANGID_STR: + 366:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len); + 367:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 368:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 369:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_IDX_MFC_STR: + 370:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len); + 371:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 372:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 373:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_IDX_PRODUCT_STR: + 374:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len); + 375:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 376:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + ARM GAS /tmp/cc7AGXQS.s page 8 + + + 377:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_IDX_SERIAL_STR: + 378:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len); + 379:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 380:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 381:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_IDX_CONFIG_STR: + 382:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len); + 383:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 384:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 385:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_IDX_INTERFACE_STR: + 386:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len); + 387:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 388:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 389:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + 390:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #if (USBD_SUPPORT_USER_STRING == 1) + 391:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = pdev->pClass->GetUsrStrDescriptor(pdev, (req->wValue) , &len); + 392:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 393:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #else + 394:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 395:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 396:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #endif + 397:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 398:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 399:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_DESC_TYPE_DEVICE_QUALIFIER: + 400:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 401:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if(pdev->dev_speed == USBD_SPEED_HIGH ) + 402:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 403:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = (uint8_t *)pdev->pClass->GetDeviceQualifierDescriptor(&len); + 404:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 405:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 406:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 407:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 408:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 409:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 410:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 411:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 412:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: + 413:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if(pdev->dev_speed == USBD_SPEED_HIGH ) + 414:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 415:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf = (uint8_t *)pdev->pClass->GetOtherSpeedConfigDescriptor(&len); + 416:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; + 417:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 418:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 419:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 420:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 421:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 422:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 423:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 424:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 425:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + 426:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 427:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 428:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 429:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 430:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if((len != 0)&& (req->wLength != 0)) + 431:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 432:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 433:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** len = MIN(len , req->wLength); + ARM GAS /tmp/cc7AGXQS.s page 9 + + + 434:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 435:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendData (pdev, + 436:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf, + 437:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** len); + 438:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 439:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 440:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 441:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 442:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 443:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_SetAddress + 444:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Set device address + 445:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 446:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 447:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + 448:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 449:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_SetAddress(USBD_HandleTypeDef *pdev , + 450:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req) + 451:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 452:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** uint8_t dev_addr; + 453:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 454:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if ((req->wIndex == 0) && (req->wLength == 0)) + 455:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 456:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** dev_addr = (uint8_t)(req->wValue) & 0x7F; + 457:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 458:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (pdev->dev_state == USBD_STATE_CONFIGURED) + 459:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 460:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 461:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 462:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 463:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 464:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_address = dev_addr; + 465:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_SetUSBAddress(pdev, dev_addr); + 466:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 467:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 468:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (dev_addr != 0) + 469:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 470:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_state = USBD_STATE_ADDRESSED; + 471:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 472:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 473:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 474:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_state = USBD_STATE_DEFAULT; + 475:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 476:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 477:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 478:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 479:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 480:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 481:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 482:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 483:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 484:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 485:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_SetConfig + 486:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle Set device configuration request + 487:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 488:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 489:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + 490:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + ARM GAS /tmp/cc7AGXQS.s page 10 + + + 491:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_SetConfig(USBD_HandleTypeDef *pdev , + 492:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req) + 493:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 494:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 495:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static uint8_t cfgidx; + 496:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 497:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** cfgidx = (uint8_t)(req->wValue); + 498:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 499:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (cfgidx > USBD_MAX_NUM_CONFIGURATION ) + 500:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 501:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 502:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 503:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 504:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 505:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (pdev->dev_state) + 506:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 507:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_ADDRESSED: + 508:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (cfgidx) + 509:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 510:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_config = cfgidx; + 511:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_state = USBD_STATE_CONFIGURED; + 512:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) + 513:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 514:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 515:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 516:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 517:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 518:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 519:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 520:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 521:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 522:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 523:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 524:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 525:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_CONFIGURED: + 526:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (cfgidx == 0) + 527:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 528:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_state = USBD_STATE_ADDRESSED; + 529:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_config = cfgidx; + 530:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_ClrClassConfig(pdev , cfgidx); + 531:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 532:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 533:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 534:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else if (cfgidx != pdev->dev_config) + 535:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 536:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /* Clear old configuration */ + 537:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_ClrClassConfig(pdev , pdev->dev_config); + 538:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 539:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /* set new configuration */ + 540:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_config = cfgidx; + 541:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) + 542:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 543:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 544:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 545:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 546:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 547:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + ARM GAS /tmp/cc7AGXQS.s page 11 + + + 548:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 549:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 550:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 551:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 552:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 553:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 554:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + 555:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 556:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 557:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 558:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 559:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 560:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 561:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 562:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_GetConfig + 563:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle Get device configuration request + 564:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 565:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 566:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + 567:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 568:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_GetConfig(USBD_HandleTypeDef *pdev , + 569:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req) + 570:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 571:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 572:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (req->wLength != 1) + 573:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 574:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 575:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 576:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** else + 577:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 578:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (pdev->dev_state ) + 579:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 580:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_ADDRESSED: + 581:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_default_config = 0; + 582:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendData (pdev, + 583:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** (uint8_t *)&pdev->dev_default_config, + 584:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** 1); + 585:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 586:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 587:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_CONFIGURED: + 588:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 589:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendData (pdev, + 590:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** (uint8_t *)&pdev->dev_config, + 591:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** 1); + 592:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 593:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 594:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default: + 595:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 596:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 597:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 598:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 599:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 600:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 601:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 602:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_GetStatus + 603:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle Get Status request + 604:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + ARM GAS /tmp/cc7AGXQS.s page 12 + + + 605:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 606:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + 607:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 608:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_GetStatus(USBD_HandleTypeDef *pdev , + 609:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req) + 610:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 611:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 612:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 613:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (pdev->dev_state) + 614:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 615:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_ADDRESSED: + 616:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_CONFIGURED: + 617:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 618:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #if ( USBD_SELF_POWERED == 1) + 619:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_config_status = USB_CONFIG_SELF_POWERED; + 620:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #else + 621:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_config_status = 0; + 622:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #endif + 623:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 624:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (pdev->dev_remote_wakeup) + 625:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 626:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP; + 627:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 628:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 629:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendData (pdev, + 630:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** (uint8_t *)& pdev->dev_config_status, + 631:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** 2); + 632:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 633:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 634:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default : + 635:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 636:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 637:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 638:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 639:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 640:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 641:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 642:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_SetFeature + 643:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle Set device feature request + 644:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 645:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 646:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + 647:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 648:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_SetFeature(USBD_HandleTypeDef *pdev , + 649:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req) + 650:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 651:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 652:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) + 653:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 654:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_remote_wakeup = 1; + 655:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->pClass->Setup (pdev, req); + 656:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 657:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 658:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 659:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 660:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 661:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + ARM GAS /tmp/cc7AGXQS.s page 13 + + + 662:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 663:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_ClrFeature + 664:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle clear device feature request + 665:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 666:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 667:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval status + 668:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 669:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static void USBD_ClrFeature(USBD_HandleTypeDef *pdev , + 670:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req) + 671:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 672:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (pdev->dev_state) + 673:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 674:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_ADDRESSED: + 675:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** case USBD_STATE_CONFIGURED: + 676:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (req->wValue == USB_FEATURE_REMOTE_WAKEUP) + 677:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 678:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_remote_wakeup = 0; + 679:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->pClass->Setup (pdev, req); + 680:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 681:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 682:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 683:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 684:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** default : + 685:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlError(pdev , req); + 686:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 687:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 688:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 689:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 690:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 691:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_ParseSetupRequest + 692:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Copy buffer into setup structure + 693:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 694:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 695:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval None + 696:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 697:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 698:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata) + 699:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 700:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->bmRequest = *(uint8_t *) (pdata); + 701:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->bRequest = *(uint8_t *) (pdata + 1); + 702:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->wValue = SWAPBYTE (pdata + 2); + 703:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->wIndex = SWAPBYTE (pdata + 4); + 704:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->wLength = SWAPBYTE (pdata + 6); + 705:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 706:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 707:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 708:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 709:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_CtlError + 710:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Handle USB low level Error + 711:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param pdev: device instance + 712:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param req: usb request + 713:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval None + 714:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 715:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 716:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** void USBD_CtlError( USBD_HandleTypeDef *pdev , + 717:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_SetupReqTypedef *req) + 718:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + ARM GAS /tmp/cc7AGXQS.s page 14 + + + 719:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_StallEP(pdev , 0x80); + 720:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_StallEP(pdev , 0); + 721:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 722:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 723:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 724:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 725:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_GetString + 726:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * Convert Ascii string into unicode one + 727:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param desc : descriptor buffer + 728:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param unicode : Formatted string buffer (unicode) + 729:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param len : descriptor length + 730:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval None + 731:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 732:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len) + 733:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 734:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** uint8_t idx = 0; + 735:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 736:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if (desc != NULL) + 737:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 738:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** *len = USBD_GetLen(desc) * 2 + 2; + 739:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** unicode[idx++] = *len; + 740:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** unicode[idx++] = USB_DESC_TYPE_STRING; + 741:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 742:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** while (*desc != '\0') + 743:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 744:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** unicode[idx++] = *desc++; + 745:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** unicode[idx++] = 0x00; + 746:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 747:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 748:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 749:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 750:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 751:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @brief USBD_GetLen + 752:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * return the string length + 753:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @param buf : pointer to the ascii string buffer + 754:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** * @retval string length + 755:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** */ + 756:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** static uint8_t USBD_GetLen(uint8_t *buf) + 757:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 25 .loc 1 757 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 0 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 @ link register save eliminated. + 30 .LVL0: + 31 0000 0300 movs r3, r0 + 32 .LVL1: + 758:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** uint8_t len = 0; + 33 .loc 1 758 0 + 34 0002 0020 movs r0, #0 + 35 .LVL2: + 759:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 760:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** while (*buf != '\0') + 36 .loc 1 760 0 + 37 0004 02E0 b .L2 + 38 .LVL3: + 39 .L3: + ARM GAS /tmp/cc7AGXQS.s page 15 + + + 761:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 762:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** len++; + 40 .loc 1 762 0 + 41 0006 0130 adds r0, r0, #1 + 42 .LVL4: + 43 0008 C0B2 uxtb r0, r0 + 44 .LVL5: + 763:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** buf++; + 45 .loc 1 763 0 + 46 000a 0133 adds r3, r3, #1 + 47 .LVL6: + 48 .L2: + 760:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 49 .loc 1 760 0 + 50 000c 1A78 ldrb r2, [r3] + 51 000e 002A cmp r2, #0 + 52 0010 F9D1 bne .L3 + 764:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 765:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 766:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return len; + 767:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 53 .loc 1 767 0 + 54 @ sp needed + 55 0012 7047 bx lr + 56 .cfi_endproc + 57 .LFE56: + 59 .section .text.USBD_SetFeature,"ax",%progbits + 60 .align 1 + 61 .syntax unified + 62 .code 16 + 63 .thumb_func + 64 .fpu softvfp + 66 USBD_SetFeature: + 67 .LFB51: + 650:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 68 .loc 1 650 0 + 69 .cfi_startproc + 70 @ args = 0, pretend = 0, frame = 0 + 71 @ frame_needed = 0, uses_anonymous_args = 0 + 72 .LVL7: + 73 0000 10B5 push {r4, lr} + 74 .LCFI0: + 75 .cfi_def_cfa_offset 8 + 76 .cfi_offset 4, -8 + 77 .cfi_offset 14, -4 + 78 0002 0400 movs r4, r0 + 652:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 79 .loc 1 652 0 + 80 0004 4B88 ldrh r3, [r1, #2] + 81 0006 012B cmp r3, #1 + 82 0008 0AD1 bne .L4 + 654:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->pClass->Setup (pdev, req); + 83 .loc 1 654 0 + 84 000a 8123 movs r3, #129 + 85 000c 9B00 lsls r3, r3, #2 + 86 000e 0122 movs r2, #1 + 87 0010 C250 str r2, [r0, r3] + ARM GAS /tmp/cc7AGXQS.s page 16 + + + 655:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 88 .loc 1 655 0 + 89 0012 1033 adds r3, r3, #16 + 90 0014 C358 ldr r3, [r0, r3] + 91 0016 9B68 ldr r3, [r3, #8] + 92 0018 9847 blx r3 + 93 .LVL8: + 656:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 94 .loc 1 656 0 + 95 001a 2000 movs r0, r4 + 96 001c FFF7FEFF bl USBD_CtlSendStatus + 97 .LVL9: + 98 .L4: + 659:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 99 .loc 1 659 0 + 100 @ sp needed + 101 .LVL10: + 102 0020 10BD pop {r4, pc} + 103 .cfi_endproc + 104 .LFE51: + 106 .section .text.USBD_ParseSetupRequest,"ax",%progbits + 107 .align 1 + 108 .global USBD_ParseSetupRequest + 109 .syntax unified + 110 .code 16 + 111 .thumb_func + 112 .fpu softvfp + 114 USBD_ParseSetupRequest: + 115 .LFB53: + 699:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->bmRequest = *(uint8_t *) (pdata); + 116 .loc 1 699 0 + 117 .cfi_startproc + 118 @ args = 0, pretend = 0, frame = 0 + 119 @ frame_needed = 0, uses_anonymous_args = 0 + 120 @ link register save eliminated. + 121 .LVL11: + 700:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->bRequest = *(uint8_t *) (pdata + 1); + 122 .loc 1 700 0 + 123 0000 0B78 ldrb r3, [r1] + 124 0002 0370 strb r3, [r0] + 701:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->wValue = SWAPBYTE (pdata + 2); + 125 .loc 1 701 0 + 126 0004 4B78 ldrb r3, [r1, #1] + 127 0006 4370 strb r3, [r0, #1] + 702:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->wIndex = SWAPBYTE (pdata + 4); + 128 .loc 1 702 0 + 129 0008 8B78 ldrb r3, [r1, #2] + 130 000a CA78 ldrb r2, [r1, #3] + 131 000c 1202 lsls r2, r2, #8 + 132 000e 9B18 adds r3, r3, r2 + 133 0010 4380 strh r3, [r0, #2] + 703:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** req->wLength = SWAPBYTE (pdata + 6); + 134 .loc 1 703 0 + 135 0012 0B79 ldrb r3, [r1, #4] + 136 0014 4A79 ldrb r2, [r1, #5] + 137 0016 1202 lsls r2, r2, #8 + 138 0018 9B18 adds r3, r3, r2 + ARM GAS /tmp/cc7AGXQS.s page 17 + + + 139 001a 8380 strh r3, [r0, #4] + 704:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 140 .loc 1 704 0 + 141 001c 8B79 ldrb r3, [r1, #6] + 142 001e CA79 ldrb r2, [r1, #7] + 143 0020 1202 lsls r2, r2, #8 + 144 0022 9B18 adds r3, r3, r2 + 145 0024 C380 strh r3, [r0, #6] + 706:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 146 .loc 1 706 0 + 147 @ sp needed + 148 0026 7047 bx lr + 149 .cfi_endproc + 150 .LFE53: + 152 .section .text.USBD_CtlError,"ax",%progbits + 153 .align 1 + 154 .global USBD_CtlError + 155 .syntax unified + 156 .code 16 + 157 .thumb_func + 158 .fpu softvfp + 160 USBD_CtlError: + 161 .LFB54: + 718:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_StallEP(pdev , 0x80); + 162 .loc 1 718 0 + 163 .cfi_startproc + 164 @ args = 0, pretend = 0, frame = 0 + 165 @ frame_needed = 0, uses_anonymous_args = 0 + 166 .LVL12: + 167 0000 10B5 push {r4, lr} + 168 .LCFI1: + 169 .cfi_def_cfa_offset 8 + 170 .cfi_offset 4, -8 + 171 .cfi_offset 14, -4 + 172 0002 0400 movs r4, r0 + 719:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_StallEP(pdev , 0); + 173 .loc 1 719 0 + 174 0004 8021 movs r1, #128 + 175 .LVL13: + 176 0006 FFF7FEFF bl USBD_LL_StallEP + 177 .LVL14: + 720:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 178 .loc 1 720 0 + 179 000a 0021 movs r1, #0 + 180 000c 2000 movs r0, r4 + 181 000e FFF7FEFF bl USBD_LL_StallEP + 182 .LVL15: + 721:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 183 .loc 1 721 0 + 184 @ sp needed + 185 .LVL16: + 186 0012 10BD pop {r4, pc} + 187 .cfi_endproc + 188 .LFE54: + 190 .section .text.USBD_GetDescriptor,"ax",%progbits + 191 .align 1 + 192 .syntax unified + ARM GAS /tmp/cc7AGXQS.s page 18 + + + 193 .code 16 + 194 .thumb_func + 195 .fpu softvfp + 197 USBD_GetDescriptor: + 198 .LFB46: + 333:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** uint16_t len; + 199 .loc 1 333 0 + 200 .cfi_startproc + 201 @ args = 0, pretend = 0, frame = 8 + 202 @ frame_needed = 0, uses_anonymous_args = 0 + 203 .LVL17: + 204 0000 30B5 push {r4, r5, lr} + 205 .LCFI2: + 206 .cfi_def_cfa_offset 12 + 207 .cfi_offset 4, -12 + 208 .cfi_offset 5, -8 + 209 .cfi_offset 14, -4 + 210 0002 83B0 sub sp, sp, #12 + 211 .LCFI3: + 212 .cfi_def_cfa_offset 24 + 213 0004 0400 movs r4, r0 + 214 0006 0D00 movs r5, r1 + 338:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 215 .loc 1 338 0 + 216 0008 4A88 ldrh r2, [r1, #2] + 217 000a 130A lsrs r3, r2, #8 + 218 000c 072B cmp r3, #7 + 219 000e 00D9 bls .LCB168 + 220 0010 8EE0 b .L9 @long jump + 221 .LCB168: + 222 0012 9B00 lsls r3, r3, #2 + 223 0014 4F49 ldr r1, .L33 + 224 .LVL18: + 225 0016 CB58 ldr r3, [r1, r3] + 226 0018 9F46 mov pc, r3 + 227 .section .rodata.USBD_GetDescriptor,"a",%progbits + 228 .align 2 + 229 .L11: + 230 0000 30010000 .word .L9 + 231 0004 1A000000 .word .L10 + 232 0008 40000000 .word .L12 + 233 000c 6E000000 .word .L13 + 234 0010 30010000 .word .L9 + 235 0014 30010000 .word .L9 + 236 0018 F0000000 .word .L14 + 237 001c 0E010000 .word .L15 + 238 .section .text.USBD_GetDescriptor + 239 .L10: + 346:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 240 .loc 1 346 0 + 241 001a 8423 movs r3, #132 + 242 001c 9B00 lsls r3, r3, #2 + 243 001e C358 ldr r3, [r0, r3] + 244 0020 1B68 ldr r3, [r3] + 245 0022 007C ldrb r0, [r0, #16] + 246 .LVL19: + 247 0024 6A46 mov r2, sp + ARM GAS /tmp/cc7AGXQS.s page 19 + + + 248 0026 911D adds r1, r2, #6 + 249 0028 9847 blx r3 + 250 .LVL20: + 251 .L16: + 430:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 252 .loc 1 430 0 + 253 002a 6B46 mov r3, sp + 254 002c 0633 adds r3, r3, #6 + 255 002e 1B88 ldrh r3, [r3] + 256 0030 002B cmp r3, #0 + 257 0032 03D0 beq .L8 + 430:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 258 .loc 1 430 0 is_stmt 0 discriminator 1 + 259 0034 EA88 ldrh r2, [r5, #6] + 260 0036 002A cmp r2, #0 + 261 0038 00D0 beq .LCB205 + 262 003a 7EE0 b .L32 @long jump + 263 .LCB205: + 264 .LVL21: + 265 .L8: + 440:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 266 .loc 1 440 0 is_stmt 1 + 267 003c 03B0 add sp, sp, #12 + 268 @ sp needed + 269 .LVL22: + 270 .LVL23: + 271 003e 30BD pop {r4, r5, pc} + 272 .LVL24: + 273 .L12: + 350:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 274 .loc 1 350 0 + 275 0040 037C ldrb r3, [r0, #16] + 276 0042 002B cmp r3, #0 + 277 0044 09D1 bne .L17 + 352:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf[1] = USB_DESC_TYPE_CONFIGURATION; + 278 .loc 1 352 0 + 279 0046 8523 movs r3, #133 + 280 0048 9B00 lsls r3, r3, #2 + 281 004a C358 ldr r3, [r0, r3] + 282 004c 9B6A ldr r3, [r3, #40] + 283 004e 6A46 mov r2, sp + 284 0050 901D adds r0, r2, #6 + 285 .LVL25: + 286 0052 9847 blx r3 + 287 .LVL26: + 353:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 288 .loc 1 353 0 + 289 0054 0223 movs r3, #2 + 290 0056 4370 strb r3, [r0, #1] + 291 0058 E7E7 b .L16 + 292 .LVL27: + 293 .L17: + 357:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf[1] = USB_DESC_TYPE_CONFIGURATION; + 294 .loc 1 357 0 + 295 005a 8523 movs r3, #133 + 296 005c 9B00 lsls r3, r3, #2 + 297 005e C358 ldr r3, [r0, r3] + ARM GAS /tmp/cc7AGXQS.s page 20 + + + 298 0060 DB6A ldr r3, [r3, #44] + 299 0062 6A46 mov r2, sp + 300 0064 901D adds r0, r2, #6 + 301 .LVL28: + 302 0066 9847 blx r3 + 303 .LVL29: + 358:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 304 .loc 1 358 0 + 305 0068 0223 movs r3, #2 + 306 006a 4370 strb r3, [r0, #1] + 307 006c DDE7 b .L16 + 308 .LVL30: + 309 .L13: + 363:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 310 .loc 1 363 0 + 311 006e D2B2 uxtb r2, r2 + 312 0070 052A cmp r2, #5 + 313 0072 39D8 bhi .L18 + 314 0074 9200 lsls r2, r2, #2 + 315 0076 384B ldr r3, .L33+4 + 316 0078 9B58 ldr r3, [r3, r2] + 317 007a 9F46 mov pc, r3 + 318 .section .rodata.USBD_GetDescriptor + 319 .align 2 + 320 .L20: + 321 0020 7C000000 .word .L19 + 322 0024 8E000000 .word .L21 + 323 0028 A0000000 .word .L22 + 324 002c B2000000 .word .L23 + 325 0030 C4000000 .word .L24 + 326 0034 D6000000 .word .L25 + 327 .section .text.USBD_GetDescriptor + 328 .L19: + 366:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 329 .loc 1 366 0 + 330 007c 8423 movs r3, #132 + 331 007e 9B00 lsls r3, r3, #2 + 332 0080 C358 ldr r3, [r0, r3] + 333 0082 5B68 ldr r3, [r3, #4] + 334 0084 007C ldrb r0, [r0, #16] + 335 .LVL31: + 336 0086 6A46 mov r2, sp + 337 0088 911D adds r1, r2, #6 + 338 008a 9847 blx r3 + 339 .LVL32: + 367:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 340 .loc 1 367 0 + 341 008c CDE7 b .L16 + 342 .LVL33: + 343 .L21: + 370:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 344 .loc 1 370 0 + 345 008e 8423 movs r3, #132 + 346 0090 9B00 lsls r3, r3, #2 + 347 0092 C358 ldr r3, [r0, r3] + 348 0094 9B68 ldr r3, [r3, #8] + 349 0096 007C ldrb r0, [r0, #16] + ARM GAS /tmp/cc7AGXQS.s page 21 + + + 350 .LVL34: + 351 0098 6A46 mov r2, sp + 352 009a 911D adds r1, r2, #6 + 353 009c 9847 blx r3 + 354 .LVL35: + 371:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 355 .loc 1 371 0 + 356 009e C4E7 b .L16 + 357 .LVL36: + 358 .L22: + 374:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 359 .loc 1 374 0 + 360 00a0 8423 movs r3, #132 + 361 00a2 9B00 lsls r3, r3, #2 + 362 00a4 C358 ldr r3, [r0, r3] + 363 00a6 DB68 ldr r3, [r3, #12] + 364 00a8 007C ldrb r0, [r0, #16] + 365 .LVL37: + 366 00aa 6A46 mov r2, sp + 367 00ac 911D adds r1, r2, #6 + 368 00ae 9847 blx r3 + 369 .LVL38: + 375:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 370 .loc 1 375 0 + 371 00b0 BBE7 b .L16 + 372 .LVL39: + 373 .L23: + 378:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 374 .loc 1 378 0 + 375 00b2 8423 movs r3, #132 + 376 00b4 9B00 lsls r3, r3, #2 + 377 00b6 C358 ldr r3, [r0, r3] + 378 00b8 1B69 ldr r3, [r3, #16] + 379 00ba 007C ldrb r0, [r0, #16] + 380 .LVL40: + 381 00bc 6A46 mov r2, sp + 382 00be 911D adds r1, r2, #6 + 383 00c0 9847 blx r3 + 384 .LVL41: + 379:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 385 .loc 1 379 0 + 386 00c2 B2E7 b .L16 + 387 .LVL42: + 388 .L24: + 382:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 389 .loc 1 382 0 + 390 00c4 8423 movs r3, #132 + 391 00c6 9B00 lsls r3, r3, #2 + 392 00c8 C358 ldr r3, [r0, r3] + 393 00ca 5B69 ldr r3, [r3, #20] + 394 00cc 007C ldrb r0, [r0, #16] + 395 .LVL43: + 396 00ce 6A46 mov r2, sp + 397 00d0 911D adds r1, r2, #6 + 398 00d2 9847 blx r3 + 399 .LVL44: + 383:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + ARM GAS /tmp/cc7AGXQS.s page 22 + + + 400 .loc 1 383 0 + 401 00d4 A9E7 b .L16 + 402 .LVL45: + 403 .L25: + 386:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 404 .loc 1 386 0 + 405 00d6 8423 movs r3, #132 + 406 00d8 9B00 lsls r3, r3, #2 + 407 00da C358 ldr r3, [r0, r3] + 408 00dc 9B69 ldr r3, [r3, #24] + 409 00de 007C ldrb r0, [r0, #16] + 410 .LVL46: + 411 00e0 6A46 mov r2, sp + 412 00e2 911D adds r1, r2, #6 + 413 00e4 9847 blx r3 + 414 .LVL47: + 387:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 415 .loc 1 387 0 + 416 00e6 A0E7 b .L16 + 417 .LVL48: + 418 .L18: + 394:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 419 .loc 1 394 0 + 420 00e8 2900 movs r1, r5 + 421 00ea FFF7FEFF bl USBD_CtlError + 422 .LVL49: + 395:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #endif + 423 .loc 1 395 0 + 424 00ee A5E7 b .L8 + 425 .LVL50: + 426 .L14: + 401:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 427 .loc 1 401 0 + 428 00f0 037C ldrb r3, [r0, #16] + 429 00f2 002B cmp r3, #0 + 430 00f4 07D1 bne .L27 + 403:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 431 .loc 1 403 0 + 432 00f6 8523 movs r3, #133 + 433 00f8 9B00 lsls r3, r3, #2 + 434 00fa C358 ldr r3, [r0, r3] + 435 00fc 5B6B ldr r3, [r3, #52] + 436 00fe 6A46 mov r2, sp + 437 0100 901D adds r0, r2, #6 + 438 .LVL51: + 439 0102 9847 blx r3 + 440 .LVL52: + 404:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 441 .loc 1 404 0 + 442 0104 91E7 b .L16 + 443 .LVL53: + 444 .L27: + 408:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 445 .loc 1 408 0 + 446 0106 2900 movs r1, r5 + 447 0108 FFF7FEFF bl USBD_CtlError + 448 .LVL54: + ARM GAS /tmp/cc7AGXQS.s page 23 + + + 409:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 449 .loc 1 409 0 + 450 010c 96E7 b .L8 + 451 .LVL55: + 452 .L15: + 413:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 453 .loc 1 413 0 + 454 010e 037C ldrb r3, [r0, #16] + 455 0110 002B cmp r3, #0 + 456 0112 09D1 bne .L28 + 415:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION; + 457 .loc 1 415 0 + 458 0114 8523 movs r3, #133 + 459 0116 9B00 lsls r3, r3, #2 + 460 0118 C358 ldr r3, [r0, r3] + 461 011a 1B6B ldr r3, [r3, #48] + 462 011c 6A46 mov r2, sp + 463 011e 901D adds r0, r2, #6 + 464 .LVL56: + 465 0120 9847 blx r3 + 466 .LVL57: + 416:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 467 .loc 1 416 0 + 468 0122 0723 movs r3, #7 + 469 0124 4370 strb r3, [r0, #1] + 417:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 470 .loc 1 417 0 + 471 0126 80E7 b .L16 + 472 .LVL58: + 473 .L28: + 421:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 474 .loc 1 421 0 + 475 0128 2900 movs r1, r5 + 476 012a FFF7FEFF bl USBD_CtlError + 477 .LVL59: + 422:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 478 .loc 1 422 0 + 479 012e 85E7 b .L8 + 480 .LVL60: + 481 .L9: + 426:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 482 .loc 1 426 0 + 483 0130 2900 movs r1, r5 + 484 0132 2000 movs r0, r4 + 485 .LVL61: + 486 0134 FFF7FEFF bl USBD_CtlError + 487 .LVL62: + 427:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 488 .loc 1 427 0 + 489 0138 80E7 b .L8 + 490 .LVL63: + 491 .L32: + 433:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 492 .loc 1 433 0 + 493 013a 191C adds r1, r3, #0 + 494 013c 9342 cmp r3, r2 + 495 013e 00D9 bls .L30 + ARM GAS /tmp/cc7AGXQS.s page 24 + + + 496 0140 111C adds r1, r2, #0 + 497 .L30: + 498 0142 8AB2 uxth r2, r1 + 499 0144 6B46 mov r3, sp + 500 0146 D980 strh r1, [r3, #6] + 435:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pbuf, + 501 .loc 1 435 0 + 502 0148 0100 movs r1, r0 + 503 014a 2000 movs r0, r4 + 504 .LVL64: + 505 014c FFF7FEFF bl USBD_CtlSendData + 506 .LVL65: + 507 0150 74E7 b .L8 + 508 .L34: + 509 0152 C046 .align 2 + 510 .L33: + 511 0154 00000000 .word .L11 + 512 0158 20000000 .word .L20 + 513 .cfi_endproc + 514 .LFE46: + 516 .section .text.USBD_SetAddress,"ax",%progbits + 517 .align 1 + 518 .syntax unified + 519 .code 16 + 520 .thumb_func + 521 .fpu softvfp + 523 USBD_SetAddress: + 524 .LFB47: + 451:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** uint8_t dev_addr; + 525 .loc 1 451 0 + 526 .cfi_startproc + 527 @ args = 0, pretend = 0, frame = 0 + 528 @ frame_needed = 0, uses_anonymous_args = 0 + 529 .LVL66: + 530 0000 70B5 push {r4, r5, r6, lr} + 531 .LCFI4: + 532 .cfi_def_cfa_offset 16 + 533 .cfi_offset 4, -16 + 534 .cfi_offset 5, -12 + 535 .cfi_offset 6, -8 + 536 .cfi_offset 14, -4 + 537 0002 0400 movs r4, r0 + 454:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 538 .loc 1 454 0 + 539 0004 8B88 ldrh r3, [r1, #4] + 540 0006 002B cmp r3, #0 + 541 0008 22D1 bne .L36 + 454:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 542 .loc 1 454 0 is_stmt 0 discriminator 1 + 543 000a CB88 ldrh r3, [r1, #6] + 544 000c 002B cmp r3, #0 + 545 000e 1FD1 bne .L36 + 456:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 546 .loc 1 456 0 is_stmt 1 + 547 0010 8B78 ldrb r3, [r1, #2] + 548 0012 7F25 movs r5, #127 + 549 0014 1D40 ands r5, r3 + ARM GAS /tmp/cc7AGXQS.s page 25 + + + 550 .LVL67: + 458:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 551 .loc 1 458 0 + 552 0016 FE23 movs r3, #254 + 553 0018 5B00 lsls r3, r3, #1 + 554 001a C35C ldrb r3, [r0, r3] + 555 001c 032B cmp r3, #3 + 556 001e 0FD0 beq .L40 + 464:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_LL_SetUSBAddress(pdev, dev_addr); + 557 .loc 1 464 0 + 558 0020 FF23 movs r3, #255 + 559 0022 5B00 lsls r3, r3, #1 + 560 0024 C554 strb r5, [r0, r3] + 465:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 561 .loc 1 465 0 + 562 0026 2900 movs r1, r5 + 563 .LVL68: + 564 0028 FFF7FEFF bl USBD_LL_SetUSBAddress + 565 .LVL69: + 466:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 566 .loc 1 466 0 + 567 002c 2000 movs r0, r4 + 568 002e FFF7FEFF bl USBD_CtlSendStatus + 569 .LVL70: + 468:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 570 .loc 1 468 0 + 571 0032 002D cmp r5, #0 + 572 0034 07D0 beq .L39 + 470:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 573 .loc 1 470 0 + 574 0036 FE23 movs r3, #254 + 575 0038 5B00 lsls r3, r3, #1 + 576 003a 0222 movs r2, #2 + 577 003c E254 strb r2, [r4, r3] + 578 003e 0AE0 b .L35 + 579 .LVL71: + 580 .L40: + 460:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 581 .loc 1 460 0 + 582 0040 FFF7FEFF bl USBD_CtlError + 583 .LVL72: + 584 0044 07E0 b .L35 + 585 .L39: + 474:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 586 .loc 1 474 0 + 587 0046 FE23 movs r3, #254 + 588 0048 5B00 lsls r3, r3, #1 + 589 004a 0122 movs r2, #1 + 590 004c E254 strb r2, [r4, r3] + 591 004e 02E0 b .L35 + 592 .LVL73: + 593 .L36: + 480:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 594 .loc 1 480 0 + 595 0050 2000 movs r0, r4 + 596 .LVL74: + 597 0052 FFF7FEFF bl USBD_CtlError + ARM GAS /tmp/cc7AGXQS.s page 26 + + + 598 .LVL75: + 599 .L35: + 482:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 600 .loc 1 482 0 + 601 @ sp needed + 602 .LVL76: + 603 0056 70BD pop {r4, r5, r6, pc} + 604 .cfi_endproc + 605 .LFE47: + 607 .section .text.USBD_SetConfig,"ax",%progbits + 608 .align 1 + 609 .syntax unified + 610 .code 16 + 611 .thumb_func + 612 .fpu softvfp + 614 USBD_SetConfig: + 615 .LFB48: + 493:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 616 .loc 1 493 0 + 617 .cfi_startproc + 618 @ args = 0, pretend = 0, frame = 0 + 619 @ frame_needed = 0, uses_anonymous_args = 0 + 620 .LVL77: + 621 0000 70B5 push {r4, r5, r6, lr} + 622 .LCFI5: + 623 .cfi_def_cfa_offset 16 + 624 .cfi_offset 4, -16 + 625 .cfi_offset 5, -12 + 626 .cfi_offset 6, -8 + 627 .cfi_offset 14, -4 + 628 0002 0400 movs r4, r0 + 629 0004 0D00 movs r5, r1 + 497:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 630 .loc 1 497 0 + 631 0006 8978 ldrb r1, [r1, #2] + 632 .LVL78: + 633 0008 284B ldr r3, .L57 + 634 000a 1970 strb r1, [r3] + 499:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 635 .loc 1 499 0 + 636 000c 0129 cmp r1, #1 + 637 000e 0AD8 bhi .L53 + 505:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 638 .loc 1 505 0 + 639 0010 FE23 movs r3, #254 + 640 0012 5B00 lsls r3, r3, #1 + 641 0014 C35C ldrb r3, [r0, r3] + 642 0016 022B cmp r3, #2 + 643 0018 09D0 beq .L45 + 644 001a 032B cmp r3, #3 + 645 001c 1ED0 beq .L46 + 555:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 646 .loc 1 555 0 + 647 001e 2900 movs r1, r5 + 648 0020 FFF7FEFF bl USBD_CtlError + 649 .LVL79: + 556:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + ARM GAS /tmp/cc7AGXQS.s page 27 + + + 650 .loc 1 556 0 + 651 0024 02E0 b .L41 + 652 .LVL80: + 653 .L53: + 501:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 654 .loc 1 501 0 + 655 0026 2900 movs r1, r5 + 656 0028 FFF7FEFF bl USBD_CtlError + 657 .LVL81: + 658 .L41: + 559:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 659 .loc 1 559 0 + 660 @ sp needed + 661 .LVL82: + 662 .LVL83: + 663 002c 70BD pop {r4, r5, r6, pc} + 664 .LVL84: + 665 .L45: + 508:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 666 .loc 1 508 0 + 667 002e 0029 cmp r1, #0 + 668 0030 11D0 beq .L47 + 510:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_state = USBD_STATE_CONFIGURED; + 669 .loc 1 510 0 + 670 0032 4160 str r1, [r0, #4] + 511:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) + 671 .loc 1 511 0 + 672 0034 FE23 movs r3, #254 + 673 0036 5B00 lsls r3, r3, #1 + 674 0038 0322 movs r2, #3 + 675 003a C254 strb r2, [r0, r3] + 512:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 676 .loc 1 512 0 + 677 003c FFF7FEFF bl USBD_SetClassConfig + 678 .LVL85: + 679 0040 0228 cmp r0, #2 + 680 0042 03D0 beq .L54 + 517:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 681 .loc 1 517 0 + 682 0044 2000 movs r0, r4 + 683 0046 FFF7FEFF bl USBD_CtlSendStatus + 684 .LVL86: + 685 004a EFE7 b .L41 + 686 .L54: + 514:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 687 .loc 1 514 0 + 688 004c 2900 movs r1, r5 + 689 004e 2000 movs r0, r4 + 690 0050 FFF7FEFF bl USBD_CtlError + 691 .LVL87: + 515:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 692 .loc 1 515 0 + 693 0054 EAE7 b .L41 + 694 .LVL88: + 695 .L47: + 521:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 696 .loc 1 521 0 + ARM GAS /tmp/cc7AGXQS.s page 28 + + + 697 0056 FFF7FEFF bl USBD_CtlSendStatus + 698 .LVL89: + 699 005a E7E7 b .L41 + 700 .LVL90: + 701 .L46: + 526:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 702 .loc 1 526 0 + 703 005c 0029 cmp r1, #0 + 704 005e 11D0 beq .L55 + 534:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 705 .loc 1 534 0 + 706 0060 4368 ldr r3, [r0, #4] + 707 0062 9942 cmp r1, r3 + 708 0064 1ED0 beq .L50 + 537:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 709 .loc 1 537 0 + 710 0066 D9B2 uxtb r1, r3 + 711 0068 FFF7FEFF bl USBD_ClrClassConfig + 712 .LVL91: + 540:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if(USBD_SetClassConfig(pdev , cfgidx) == USBD_FAIL) + 713 .loc 1 540 0 + 714 006c 0F4B ldr r3, .L57 + 715 006e 1978 ldrb r1, [r3] + 716 0070 6160 str r1, [r4, #4] + 541:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 717 .loc 1 541 0 + 718 0072 2000 movs r0, r4 + 719 0074 FFF7FEFF bl USBD_SetClassConfig + 720 .LVL92: + 721 0078 0228 cmp r0, #2 + 722 007a 0ED0 beq .L56 + 546:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 723 .loc 1 546 0 + 724 007c 2000 movs r0, r4 + 725 007e FFF7FEFF bl USBD_CtlSendStatus + 726 .LVL93: + 727 0082 D3E7 b .L41 + 728 .LVL94: + 729 .L55: + 528:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->dev_config = cfgidx; + 730 .loc 1 528 0 + 731 0084 FE23 movs r3, #254 + 732 0086 5B00 lsls r3, r3, #1 + 733 0088 0222 movs r2, #2 + 734 008a C254 strb r2, [r0, r3] + 529:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_ClrClassConfig(pdev , cfgidx); + 735 .loc 1 529 0 + 736 008c 4160 str r1, [r0, #4] + 530:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 737 .loc 1 530 0 + 738 008e FFF7FEFF bl USBD_ClrClassConfig + 739 .LVL95: + 531:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 740 .loc 1 531 0 + 741 0092 2000 movs r0, r4 + 742 0094 FFF7FEFF bl USBD_CtlSendStatus + 743 .LVL96: + ARM GAS /tmp/cc7AGXQS.s page 29 + + + 744 0098 C8E7 b .L41 + 745 .L56: + 543:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** return; + 746 .loc 1 543 0 + 747 009a 2900 movs r1, r5 + 748 009c 2000 movs r0, r4 + 749 009e FFF7FEFF bl USBD_CtlError + 750 .LVL97: + 544:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 751 .loc 1 544 0 + 752 00a2 C3E7 b .L41 + 753 .LVL98: + 754 .L50: + 550:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 755 .loc 1 550 0 + 756 00a4 FFF7FEFF bl USBD_CtlSendStatus + 757 .LVL99: + 758 00a8 C0E7 b .L41 + 759 .L58: + 760 00aa C046 .align 2 + 761 .L57: + 762 00ac 00000000 .word .LANCHOR0 + 763 .cfi_endproc + 764 .LFE48: + 766 .section .text.USBD_GetConfig,"ax",%progbits + 767 .align 1 + 768 .syntax unified + 769 .code 16 + 770 .thumb_func + 771 .fpu softvfp + 773 USBD_GetConfig: + 774 .LFB49: + 570:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 775 .loc 1 570 0 + 776 .cfi_startproc + 777 @ args = 0, pretend = 0, frame = 0 + 778 @ frame_needed = 0, uses_anonymous_args = 0 + 779 .LVL100: + 780 0000 10B5 push {r4, lr} + 781 .LCFI6: + 782 .cfi_def_cfa_offset 8 + 783 .cfi_offset 4, -8 + 784 .cfi_offset 14, -4 + 572:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 785 .loc 1 572 0 + 786 0002 CB88 ldrh r3, [r1, #6] + 787 0004 012B cmp r3, #1 + 788 0006 09D1 bne .L66 + 578:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 789 .loc 1 578 0 + 790 0008 FE23 movs r3, #254 + 791 000a 5B00 lsls r3, r3, #1 + 792 000c C35C ldrb r3, [r0, r3] + 793 000e 022B cmp r3, #2 + 794 0010 07D0 beq .L63 + 795 0012 032B cmp r3, #3 + 796 0014 0DD0 beq .L64 + ARM GAS /tmp/cc7AGXQS.s page 30 + + + 595:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 797 .loc 1 595 0 + 798 0016 FFF7FEFF bl USBD_CtlError + 799 .LVL101: + 599:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 800 .loc 1 599 0 + 801 001a 01E0 b .L59 + 802 .LVL102: + 803 .L66: + 574:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 804 .loc 1 574 0 + 805 001c FFF7FEFF bl USBD_CtlError + 806 .LVL103: + 807 .L59: + 599:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 808 .loc 1 599 0 + 809 @ sp needed + 810 0020 10BD pop {r4, pc} + 811 .LVL104: + 812 .L63: + 581:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendData (pdev, + 813 .loc 1 581 0 + 814 0022 0023 movs r3, #0 + 815 0024 8360 str r3, [r0, #8] + 583:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** 1); + 816 .loc 1 583 0 + 817 0026 0100 movs r1, r0 + 818 .LVL105: + 819 0028 0831 adds r1, r1, #8 + 582:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** (uint8_t *)&pdev->dev_default_config, + 820 .loc 1 582 0 + 821 002a 0122 movs r2, #1 + 822 002c FFF7FEFF bl USBD_CtlSendData + 823 .LVL106: + 585:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 824 .loc 1 585 0 + 825 0030 F6E7 b .L59 + 826 .LVL107: + 827 .L64: + 590:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** 1); + 828 .loc 1 590 0 + 829 0032 011D adds r1, r0, #4 + 830 .LVL108: + 589:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** (uint8_t *)&pdev->dev_config, + 831 .loc 1 589 0 + 832 0034 0122 movs r2, #1 + 833 0036 FFF7FEFF bl USBD_CtlSendData + 834 .LVL109: + 592:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 835 .loc 1 592 0 + 836 003a F1E7 b .L59 + 837 .cfi_endproc + 838 .LFE49: + 840 .section .text.USBD_GetStatus,"ax",%progbits + 841 .align 1 + 842 .syntax unified + 843 .code 16 + ARM GAS /tmp/cc7AGXQS.s page 31 + + + 844 .thumb_func + 845 .fpu softvfp + 847 USBD_GetStatus: + 848 .LFB50: + 610:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 849 .loc 1 610 0 + 850 .cfi_startproc + 851 @ args = 0, pretend = 0, frame = 0 + 852 @ frame_needed = 0, uses_anonymous_args = 0 + 853 .LVL110: + 854 0000 10B5 push {r4, lr} + 855 .LCFI7: + 856 .cfi_def_cfa_offset 8 + 857 .cfi_offset 4, -8 + 858 .cfi_offset 14, -4 + 613:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 859 .loc 1 613 0 + 860 0002 FE23 movs r3, #254 + 861 0004 5B00 lsls r3, r3, #1 + 862 0006 C35C ldrb r3, [r0, r3] + 863 0008 023B subs r3, r3, #2 + 864 000a DBB2 uxtb r3, r3 + 865 000c 012B cmp r3, #1 + 866 000e 0ED8 bhi .L68 + 619:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** #else + 867 .loc 1 619 0 + 868 0010 0123 movs r3, #1 + 869 0012 C360 str r3, [r0, #12] + 624:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 870 .loc 1 624 0 + 871 0014 8123 movs r3, #129 + 872 0016 9B00 lsls r3, r3, #2 + 873 0018 C358 ldr r3, [r0, r3] + 874 001a 002B cmp r3, #0 + 875 001c 01D0 beq .L70 + 626:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 876 .loc 1 626 0 + 877 001e 0323 movs r3, #3 + 878 0020 C360 str r3, [r0, #12] + 879 .L70: + 630:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** 2); + 880 .loc 1 630 0 + 881 0022 0100 movs r1, r0 + 882 .LVL111: + 883 0024 0C31 adds r1, r1, #12 + 629:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** (uint8_t *)& pdev->dev_config_status, + 884 .loc 1 629 0 + 885 0026 0222 movs r2, #2 + 886 0028 FFF7FEFF bl USBD_CtlSendData + 887 .LVL112: + 888 .L67: + 638:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 889 .loc 1 638 0 + 890 @ sp needed + 891 002c 10BD pop {r4, pc} + 892 .LVL113: + 893 .L68: + ARM GAS /tmp/cc7AGXQS.s page 32 + + + 635:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 894 .loc 1 635 0 + 895 002e FFF7FEFF bl USBD_CtlError + 896 .LVL114: + 638:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 897 .loc 1 638 0 + 898 0032 FBE7 b .L67 + 899 .cfi_endproc + 900 .LFE50: + 902 .section .text.USBD_ClrFeature,"ax",%progbits + 903 .align 1 + 904 .syntax unified + 905 .code 16 + 906 .thumb_func + 907 .fpu softvfp + 909 USBD_ClrFeature: + 910 .LFB52: + 671:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** switch (pdev->dev_state) + 911 .loc 1 671 0 + 912 .cfi_startproc + 913 @ args = 0, pretend = 0, frame = 0 + 914 @ frame_needed = 0, uses_anonymous_args = 0 + 915 .LVL115: + 916 0000 10B5 push {r4, lr} + 917 .LCFI8: + 918 .cfi_def_cfa_offset 8 + 919 .cfi_offset 4, -8 + 920 .cfi_offset 14, -4 + 921 0002 0400 movs r4, r0 + 672:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 922 .loc 1 672 0 + 923 0004 FE23 movs r3, #254 + 924 0006 5B00 lsls r3, r3, #1 + 925 0008 C35C ldrb r3, [r0, r3] + 926 000a 023B subs r3, r3, #2 + 927 000c DBB2 uxtb r3, r3 + 928 000e 012B cmp r3, #1 + 929 0010 0ED8 bhi .L73 + 676:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 930 .loc 1 676 0 + 931 0012 4B88 ldrh r3, [r1, #2] + 932 0014 012B cmp r3, #1 + 933 0016 0AD1 bne .L72 + 678:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->pClass->Setup (pdev, req); + 934 .loc 1 678 0 + 935 0018 8123 movs r3, #129 + 936 001a 9B00 lsls r3, r3, #2 + 937 001c 0022 movs r2, #0 + 938 001e C250 str r2, [r0, r3] + 679:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 939 .loc 1 679 0 + 940 0020 1033 adds r3, r3, #16 + 941 0022 C358 ldr r3, [r0, r3] + 942 0024 9B68 ldr r3, [r3, #8] + 943 0026 9847 blx r3 + 944 .LVL116: + 680:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + ARM GAS /tmp/cc7AGXQS.s page 33 + + + 945 .loc 1 680 0 + 946 0028 2000 movs r0, r4 + 947 002a FFF7FEFF bl USBD_CtlSendStatus + 948 .LVL117: + 949 .L72: + 688:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 950 .loc 1 688 0 + 951 @ sp needed + 952 .LVL118: + 953 002e 10BD pop {r4, pc} + 954 .LVL119: + 955 .L73: + 685:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 956 .loc 1 685 0 + 957 0030 FFF7FEFF bl USBD_CtlError + 958 .LVL120: + 688:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 959 .loc 1 688 0 + 960 0034 FBE7 b .L72 + 961 .cfi_endproc + 962 .LFE52: + 964 .section .text.USBD_StdDevReq,"ax",%progbits + 965 .align 1 + 966 .global USBD_StdDevReq + 967 .syntax unified + 968 .code 16 + 969 .thumb_func + 970 .fpu softvfp + 972 USBD_StdDevReq: + 973 .LFB43: + 120:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_StatusTypeDef ret = USBD_OK; + 974 .loc 1 120 0 + 975 .cfi_startproc + 976 @ args = 0, pretend = 0, frame = 0 + 977 @ frame_needed = 0, uses_anonymous_args = 0 + 978 .LVL121: + 979 0000 10B5 push {r4, lr} + 980 .LCFI9: + 981 .cfi_def_cfa_offset 8 + 982 .cfi_offset 4, -8 + 983 .cfi_offset 14, -4 + 984 .LVL122: + 123:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 985 .loc 1 123 0 + 986 0002 4B78 ldrb r3, [r1, #1] + 987 0004 092B cmp r3, #9 + 988 0006 19D8 bhi .L77 + 989 0008 9B00 lsls r3, r3, #2 + 990 000a 0E4A ldr r2, .L87 + 991 000c D358 ldr r3, [r2, r3] + 992 000e 9F46 mov pc, r3 + 993 .section .rodata.USBD_StdDevReq,"a",%progbits + 994 .align 2 + 995 .L79: + 996 0000 2A000000 .word .L78 + 997 0004 36000000 .word .L80 + 998 0008 3C000000 .word .L77 + ARM GAS /tmp/cc7AGXQS.s page 34 + + + 999 000c 30000000 .word .L81 + 1000 0010 3C000000 .word .L77 + 1001 0014 18000000 .word .L82 + 1002 0018 10000000 .word .L83 + 1003 001c 3C000000 .word .L77 + 1004 0020 24000000 .word .L84 + 1005 0024 1E000000 .word .L85 + 1006 .section .text.USBD_StdDevReq + 1007 .L83: + 127:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1008 .loc 1 127 0 + 1009 0010 FFF7FEFF bl USBD_GetDescriptor + 1010 .LVL123: + 1011 .L86: + 161:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1012 .loc 1 161 0 + 1013 0014 0020 movs r0, #0 + 1014 @ sp needed + 1015 0016 10BD pop {r4, pc} + 1016 .LVL124: + 1017 .L82: + 131:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1018 .loc 1 131 0 + 1019 0018 FFF7FEFF bl USBD_SetAddress + 1020 .LVL125: + 132:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1021 .loc 1 132 0 + 1022 001c FAE7 b .L86 + 1023 .LVL126: + 1024 .L85: + 135:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1025 .loc 1 135 0 + 1026 001e FFF7FEFF bl USBD_SetConfig + 1027 .LVL127: + 136:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1028 .loc 1 136 0 + 1029 0022 F7E7 b .L86 + 1030 .LVL128: + 1031 .L84: + 139:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1032 .loc 1 139 0 + 1033 0024 FFF7FEFF bl USBD_GetConfig + 1034 .LVL129: + 140:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1035 .loc 1 140 0 + 1036 0028 F4E7 b .L86 + 1037 .LVL130: + 1038 .L78: + 143:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1039 .loc 1 143 0 + 1040 002a FFF7FEFF bl USBD_GetStatus + 1041 .LVL131: + 144:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1042 .loc 1 144 0 + 1043 002e F1E7 b .L86 + 1044 .LVL132: + 1045 .L81: + ARM GAS /tmp/cc7AGXQS.s page 35 + + + 148:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1046 .loc 1 148 0 + 1047 0030 FFF7FEFF bl USBD_SetFeature + 1048 .LVL133: + 149:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1049 .loc 1 149 0 + 1050 0034 EEE7 b .L86 + 1051 .LVL134: + 1052 .L80: + 152:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1053 .loc 1 152 0 + 1054 0036 FFF7FEFF bl USBD_ClrFeature + 1055 .LVL135: + 153:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1056 .loc 1 153 0 + 1057 003a EBE7 b .L86 + 1058 .LVL136: + 1059 .L77: + 156:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1060 .loc 1 156 0 + 1061 003c FFF7FEFF bl USBD_CtlError + 1062 .LVL137: + 157:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1063 .loc 1 157 0 + 1064 0040 E8E7 b .L86 + 1065 .L88: + 1066 0042 C046 .align 2 + 1067 .L87: + 1068 0044 00000000 .word .L79 + 1069 .cfi_endproc + 1070 .LFE43: + 1072 .section .text.USBD_StdItfReq,"ax",%progbits + 1073 .align 1 + 1074 .global USBD_StdItfReq + 1075 .syntax unified + 1076 .code 16 + 1077 .thumb_func + 1078 .fpu softvfp + 1080 USBD_StdItfReq: + 1081 .LFB44: + 171:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_StatusTypeDef ret = USBD_OK; + 1082 .loc 1 171 0 + 1083 .cfi_startproc + 1084 @ args = 0, pretend = 0, frame = 0 + 1085 @ frame_needed = 0, uses_anonymous_args = 0 + 1086 .LVL138: + 1087 0000 70B5 push {r4, r5, r6, lr} + 1088 .LCFI10: + 1089 .cfi_def_cfa_offset 16 + 1090 .cfi_offset 4, -16 + 1091 .cfi_offset 5, -12 + 1092 .cfi_offset 6, -8 + 1093 .cfi_offset 14, -4 + 1094 0002 0400 movs r4, r0 + 1095 0004 0D00 movs r5, r1 + 1096 .LVL139: + 174:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + ARM GAS /tmp/cc7AGXQS.s page 36 + + + 1097 .loc 1 174 0 + 1098 0006 FE23 movs r3, #254 + 1099 0008 5B00 lsls r3, r3, #1 + 1100 000a C35C ldrb r3, [r0, r3] + 1101 000c 032B cmp r3, #3 + 1102 000e 13D1 bne .L94 + 178:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1103 .loc 1 178 0 + 1104 0010 0B79 ldrb r3, [r1, #4] + 1105 0012 012B cmp r3, #1 + 1106 0014 0DD8 bhi .L92 + 180:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1107 .loc 1 180 0 + 1108 0016 8523 movs r3, #133 + 1109 0018 9B00 lsls r3, r3, #2 + 1110 001a C358 ldr r3, [r0, r3] + 1111 001c 9B68 ldr r3, [r3, #8] + 1112 001e 9847 blx r3 + 1113 .LVL140: + 182:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1114 .loc 1 182 0 + 1115 0020 EB88 ldrh r3, [r5, #6] + 1116 0022 002B cmp r3, #0 + 1117 0024 01D0 beq .L95 + 1118 .L93: + 198:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1119 .loc 1 198 0 + 1120 0026 0020 movs r0, #0 + 1121 @ sp needed + 1122 .LVL141: + 1123 .LVL142: + 1124 0028 70BD pop {r4, r5, r6, pc} + 1125 .LVL143: + 1126 .L95: + 184:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1127 .loc 1 184 0 + 1128 002a 2000 movs r0, r4 + 1129 002c FFF7FEFF bl USBD_CtlSendStatus + 1130 .LVL144: + 1131 0030 F9E7 b .L93 + 1132 .LVL145: + 1133 .L92: + 189:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1134 .loc 1 189 0 + 1135 0032 FFF7FEFF bl USBD_CtlError + 1136 .LVL146: + 1137 0036 F6E7 b .L93 + 1138 .LVL147: + 1139 .L94: + 194:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1140 .loc 1 194 0 + 1141 0038 FFF7FEFF bl USBD_CtlError + 1142 .LVL148: + 195:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1143 .loc 1 195 0 + 1144 003c F3E7 b .L93 + 1145 .cfi_endproc + ARM GAS /tmp/cc7AGXQS.s page 37 + + + 1146 .LFE44: + 1148 .section .text.USBD_StdEPReq,"ax",%progbits + 1149 .align 1 + 1150 .global USBD_StdEPReq + 1151 .syntax unified + 1152 .code 16 + 1153 .thumb_func + 1154 .fpu softvfp + 1156 USBD_StdEPReq: + 1157 .LFB45: + 208:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1158 .loc 1 208 0 + 1159 .cfi_startproc + 1160 @ args = 0, pretend = 0, frame = 0 + 1161 @ frame_needed = 0, uses_anonymous_args = 0 + 1162 .LVL149: + 1163 0000 70B5 push {r4, r5, r6, lr} + 1164 .LCFI11: + 1165 .cfi_def_cfa_offset 16 + 1166 .cfi_offset 4, -16 + 1167 .cfi_offset 5, -12 + 1168 .cfi_offset 6, -8 + 1169 .cfi_offset 14, -4 + 1170 0002 0500 movs r5, r0 + 1171 0004 0C00 movs r4, r1 + 1172 .LVL150: + 213:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1173 .loc 1 213 0 + 1174 0006 8A88 ldrh r2, [r1, #4] + 1175 0008 D1B2 uxtb r1, r2 + 1176 .LVL151: + 216:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1177 .loc 1 216 0 + 1178 000a 2078 ldrb r0, [r4] + 1179 .LVL152: + 1180 000c 6023 movs r3, #96 + 1181 000e 0340 ands r3, r0 + 1182 0010 202B cmp r3, #32 + 1183 0012 08D1 bne .L97 + 218:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1184 .loc 1 218 0 + 1185 0014 F533 adds r3, r3, #245 + 1186 0016 FF33 adds r3, r3, #255 + 1187 0018 EB58 ldr r3, [r5, r3] + 1188 001a 9B68 ldr r3, [r3, #8] + 1189 001c 2100 movs r1, r4 + 1190 .LVL153: + 1191 001e 2800 movs r0, r5 + 1192 0020 9847 blx r3 + 1193 .LVL154: + 1194 .L98: + 323:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** /** + 1195 .loc 1 323 0 + 1196 0022 0020 movs r0, #0 + 1197 @ sp needed + 1198 .LVL155: + 1199 0024 70BD pop {r4, r5, r6, pc} + ARM GAS /tmp/cc7AGXQS.s page 38 + + + 1200 .LVL156: + 1201 .L97: + 223:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1202 .loc 1 223 0 + 1203 0026 6378 ldrb r3, [r4, #1] + 1204 0028 012B cmp r3, #1 + 1205 002a 2CD0 beq .L99 + 1206 002c 002B cmp r3, #0 + 1207 002e 52D0 beq .L100 + 1208 0030 032B cmp r3, #3 + 1209 0032 F6D1 bne .L98 + 228:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1210 .loc 1 228 0 + 1211 0034 FA33 adds r3, r3, #250 + 1212 0036 FF33 adds r3, r3, #255 + 1213 0038 EB5C ldrb r3, [r5, r3] + 1214 003a 022B cmp r3, #2 + 1215 003c 06D0 beq .L103 + 1216 003e 032B cmp r3, #3 + 1217 0040 0CD0 beq .L104 + 252:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1218 .loc 1 252 0 + 1219 0042 2100 movs r1, r4 + 1220 .LVL157: + 1221 0044 2800 movs r0, r5 + 1222 0046 FFF7FEFF bl USBD_CtlError + 1223 .LVL158: + 253:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1224 .loc 1 253 0 + 1225 004a EAE7 b .L98 + 1226 .LVL159: + 1227 .L103: + 231:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1228 .loc 1 231 0 + 1229 004c 0029 cmp r1, #0 + 1230 004e E8D0 beq .L98 + 231:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1231 .loc 1 231 0 is_stmt 0 discriminator 1 + 1232 0050 8029 cmp r1, #128 + 1233 0052 E6D0 beq .L98 + 233:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1234 .loc 1 233 0 is_stmt 1 + 1235 0054 2800 movs r0, r5 + 1236 0056 FFF7FEFF bl USBD_LL_StallEP + 1237 .LVL160: + 1238 005a E2E7 b .L98 + 1239 .LVL161: + 1240 .L104: + 238:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1241 .loc 1 238 0 + 1242 005c 6388 ldrh r3, [r4, #2] + 1243 005e 002B cmp r3, #0 + 1244 0060 06D1 bne .L105 + 240:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1245 .loc 1 240 0 + 1246 0062 0029 cmp r1, #0 + 1247 0064 04D0 beq .L105 + ARM GAS /tmp/cc7AGXQS.s page 39 + + + 240:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1248 .loc 1 240 0 is_stmt 0 discriminator 1 + 1249 0066 8029 cmp r1, #128 + 1250 0068 02D0 beq .L105 + 242:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1251 .loc 1 242 0 is_stmt 1 + 1252 006a 2800 movs r0, r5 + 1253 006c FFF7FEFF bl USBD_LL_StallEP + 1254 .LVL162: + 1255 .L105: + 246:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** USBD_CtlSendStatus(pdev); + 1256 .loc 1 246 0 + 1257 0070 8523 movs r3, #133 + 1258 0072 9B00 lsls r3, r3, #2 + 1259 0074 EB58 ldr r3, [r5, r3] + 1260 0076 9B68 ldr r3, [r3, #8] + 1261 0078 2100 movs r1, r4 + 1262 007a 2800 movs r0, r5 + 1263 007c 9847 blx r3 + 1264 .LVL163: + 247:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1265 .loc 1 247 0 + 1266 007e 2800 movs r0, r5 + 1267 0080 FFF7FEFF bl USBD_CtlSendStatus + 1268 .LVL164: + 249:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1269 .loc 1 249 0 + 1270 0084 CDE7 b .L98 + 1271 .LVL165: + 1272 .L99: + 259:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1273 .loc 1 259 0 + 1274 0086 FE23 movs r3, #254 + 1275 0088 5B00 lsls r3, r3, #1 + 1276 008a EB5C ldrb r3, [r5, r3] + 1277 008c 022B cmp r3, #2 + 1278 008e 06D0 beq .L107 + 1279 0090 032B cmp r3, #3 + 1280 0092 0CD0 beq .L108 + 281:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + 1281 .loc 1 281 0 + 1282 0094 2100 movs r1, r4 + 1283 .LVL166: + 1284 0096 2800 movs r0, r5 + 1285 0098 FFF7FEFF bl USBD_CtlError + 1286 .LVL167: + 282:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1287 .loc 1 282 0 + 1288 009c C1E7 b .L98 + 1289 .LVL168: + 1290 .L107: + 262:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1291 .loc 1 262 0 + 1292 009e 0029 cmp r1, #0 + 1293 00a0 BFD0 beq .L98 + 262:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1294 .loc 1 262 0 is_stmt 0 discriminator 1 + ARM GAS /tmp/cc7AGXQS.s page 40 + + + 1295 00a2 8029 cmp r1, #128 + 1296 00a4 BDD0 beq .L98 + 264:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1297 .loc 1 264 0 is_stmt 1 + 1298 00a6 2800 movs r0, r5 + 1299 00a8 FFF7FEFF bl USBD_LL_StallEP + 1300 .LVL169: + 1301 00ac B9E7 b .L98 + 1302 .LVL170: + 1303 .L108: + 269:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1304 .loc 1 269 0 + 1305 00ae 6388 ldrh r3, [r4, #2] + 1306 00b0 002B cmp r3, #0 + 1307 00b2 B6D1 bne .L98 + 271:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1308 .loc 1 271 0 + 1309 00b4 4B06 lsls r3, r1, #25 + 1310 00b6 03D1 bne .L120 + 1311 .LVL171: + 1312 .L109: + 276:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1313 .loc 1 276 0 + 1314 00b8 2800 movs r0, r5 + 1315 00ba FFF7FEFF bl USBD_CtlSendStatus + 1316 .LVL172: + 1317 00be B0E7 b .L98 + 1318 .LVL173: + 1319 .L120: + 273:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** pdev->pClass->Setup (pdev, req); + 1320 .loc 1 273 0 + 1321 00c0 2800 movs r0, r5 + 1322 00c2 FFF7FEFF bl USBD_LL_ClearStallEP + 1323 .LVL174: + 274:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1324 .loc 1 274 0 + 1325 00c6 8523 movs r3, #133 + 1326 00c8 9B00 lsls r3, r3, #2 + 1327 00ca EB58 ldr r3, [r5, r3] + 1328 00cc 9B68 ldr r3, [r3, #8] + 1329 00ce 2100 movs r1, r4 + 1330 00d0 2800 movs r0, r5 + 1331 00d2 9847 blx r3 + 1332 .LVL175: + 1333 00d4 F0E7 b .L109 + 1334 .LVL176: + 1335 .L100: + 287:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1336 .loc 1 287 0 + 1337 00d6 FE23 movs r3, #254 + 1338 00d8 5B00 lsls r3, r3, #1 + 1339 00da EB5C ldrb r3, [r5, r3] + 1340 00dc 022B cmp r3, #2 + 1341 00de 06D0 beq .L111 + 1342 00e0 032B cmp r3, #3 + 1343 00e2 0AD0 beq .L112 + 314:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** break; + ARM GAS /tmp/cc7AGXQS.s page 41 + + + 1344 .loc 1 314 0 + 1345 00e4 2100 movs r1, r4 + 1346 .LVL177: + 1347 00e6 2800 movs r0, r5 + 1348 00e8 FFF7FEFF bl USBD_CtlError + 1349 .LVL178: + 315:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1350 .loc 1 315 0 + 1351 00ec 99E7 b .L98 + 1352 .LVL179: + 1353 .L111: + 290:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1354 .loc 1 290 0 + 1355 00ee 4B06 lsls r3, r1, #25 + 1356 00f0 97D0 beq .L98 + 292:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1357 .loc 1 292 0 + 1358 00f2 2800 movs r0, r5 + 1359 00f4 FFF7FEFF bl USBD_LL_StallEP + 1360 .LVL180: + 1361 00f8 93E7 b .L98 + 1362 .LVL181: + 1363 .L112: + 297:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** &pdev->ep_out[ep_addr & 0x7F]; + 1364 .loc 1 297 0 + 1365 00fa 1306 lsls r3, r2, #24 + 1366 00fc 12D4 bmi .L121 + 298:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** if(USBD_LL_IsStallEP(pdev, ep_addr)) + 1367 .loc 1 298 0 discriminator 2 + 1368 00fe 7F24 movs r4, #127 + 1369 .LVL182: + 1370 0100 0C40 ands r4, r1 + 297:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** &pdev->ep_out[ep_addr & 0x7F]; + 1371 .loc 1 297 0 discriminator 2 + 1372 0102 1034 adds r4, r4, #16 + 1373 0104 2401 lsls r4, r4, #4 + 1374 0106 2C19 adds r4, r5, r4 + 1375 0108 0434 adds r4, r4, #4 + 1376 .L114: + 1377 .LVL183: + 299:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1378 .loc 1 299 0 discriminator 4 + 1379 010a 2800 movs r0, r5 + 1380 010c FFF7FEFF bl USBD_LL_IsStallEP + 1381 .LVL184: + 1382 0110 0028 cmp r0, #0 + 1383 0112 0ED0 beq .L115 + 301:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1384 .loc 1 301 0 + 1385 0114 0123 movs r3, #1 + 1386 0116 2360 str r3, [r4] + 1387 .L116: + 308:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** (uint8_t *)&pep->status, + 1388 .loc 1 308 0 + 1389 0118 0222 movs r2, #2 + 1390 011a 2100 movs r1, r4 + 1391 011c 2800 movs r0, r5 + ARM GAS /tmp/cc7AGXQS.s page 42 + + + 1392 011e FFF7FEFF bl USBD_CtlSendData + 1393 .LVL185: + 311:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1394 .loc 1 311 0 + 1395 0122 7EE7 b .L98 + 1396 .LVL186: + 1397 .L121: + 297:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** &pdev->ep_out[ep_addr & 0x7F]; + 1398 .loc 1 297 0 discriminator 1 + 1399 0124 7F24 movs r4, #127 + 1400 .LVL187: + 1401 0126 0C40 ands r4, r1 + 1402 0128 0134 adds r4, r4, #1 + 1403 012a 2401 lsls r4, r4, #4 + 1404 012c 2C19 adds r4, r5, r4 + 1405 012e 0434 adds r4, r4, #4 + 1406 0130 EBE7 b .L114 + 1407 .LVL188: + 1408 .L115: + 305:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1409 .loc 1 305 0 + 1410 0132 0023 movs r3, #0 + 1411 0134 2360 str r3, [r4] + 1412 0136 EFE7 b .L116 + 1413 .cfi_endproc + 1414 .LFE45: + 1416 .section .text.USBD_GetString,"ax",%progbits + 1417 .align 1 + 1418 .global USBD_GetString + 1419 .syntax unified + 1420 .code 16 + 1421 .thumb_func + 1422 .fpu softvfp + 1424 USBD_GetString: + 1425 .LFB55: + 733:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** uint8_t idx = 0; + 1426 .loc 1 733 0 + 1427 .cfi_startproc + 1428 @ args = 0, pretend = 0, frame = 0 + 1429 @ frame_needed = 0, uses_anonymous_args = 0 + 1430 .LVL189: + 1431 0000 70B5 push {r4, r5, r6, lr} + 1432 .LCFI12: + 1433 .cfi_def_cfa_offset 16 + 1434 .cfi_offset 4, -16 + 1435 .cfi_offset 5, -12 + 1436 .cfi_offset 6, -8 + 1437 .cfi_offset 14, -4 + 1438 0002 0400 movs r4, r0 + 1439 0004 0D00 movs r5, r1 + 1440 0006 1600 movs r6, r2 + 1441 .LVL190: + 736:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1442 .loc 1 736 0 + 1443 0008 0028 cmp r0, #0 + 1444 000a 16D0 beq .L122 + 738:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** unicode[idx++] = *len; + ARM GAS /tmp/cc7AGXQS.s page 43 + + + 1445 .loc 1 738 0 + 1446 000c FFF7FEFF bl USBD_GetLen + 1447 .LVL191: + 1448 0010 0130 adds r0, r0, #1 + 1449 0012 4000 lsls r0, r0, #1 + 1450 0014 80B2 uxth r0, r0 + 1451 0016 3080 strh r0, [r6] + 1452 .LVL192: + 739:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** unicode[idx++] = USB_DESC_TYPE_STRING; + 1453 .loc 1 739 0 + 1454 0018 2870 strb r0, [r5] + 1455 .LVL193: + 740:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1456 .loc 1 740 0 + 1457 001a 0323 movs r3, #3 + 1458 001c 6B70 strb r3, [r5, #1] + 1459 001e 013B subs r3, r3, #1 + 742:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1460 .loc 1 742 0 + 1461 0020 08E0 b .L124 + 1462 .LVL194: + 1463 .L125: + 744:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** unicode[idx++] = 0x00; + 1464 .loc 1 744 0 + 1465 0022 0134 adds r4, r4, #1 + 1466 .LVL195: + 1467 0024 5A1C adds r2, r3, #1 + 1468 0026 D2B2 uxtb r2, r2 + 1469 .LVL196: + 1470 0028 E954 strb r1, [r5, r3] + 745:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** } + 1471 .loc 1 745 0 + 1472 002a 0233 adds r3, r3, #2 + 1473 002c DBB2 uxtb r3, r3 + 1474 .LVL197: + 1475 002e AA18 adds r2, r5, r2 + 1476 0030 0021 movs r1, #0 + 1477 0032 1170 strb r1, [r2] + 1478 .LVL198: + 1479 .L124: + 742:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** { + 1480 .loc 1 742 0 + 1481 0034 2178 ldrb r1, [r4] + 1482 0036 0029 cmp r1, #0 + 1483 0038 F3D1 bne .L125 + 1484 .LVL199: + 1485 .L122: + 748:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c **** + 1486 .loc 1 748 0 + 1487 @ sp needed + 1488 .LVL200: + 1489 .LVL201: + 1490 .LVL202: + 1491 003a 70BD pop {r4, r5, r6, pc} + 1492 .cfi_endproc + 1493 .LFE55: + 1495 .section .bss.cfgidx.7827,"aw",%nobits + ARM GAS /tmp/cc7AGXQS.s page 44 + + + 1496 .set .LANCHOR0,. + 0 + 1499 cfgidx.7827: + 1500 0000 00 .space 1 + 1501 .text + 1502 .Letext0: + 1503 .file 2 "/usr/include/newlib/machine/_default_types.h" + 1504 .file 3 "/usr/include/newlib/sys/lock.h" + 1505 .file 4 "/usr/include/newlib/sys/_types.h" + 1506 .file 5 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 1507 .file 6 "/usr/include/newlib/sys/reent.h" + 1508 .file 7 "/usr/include/newlib/sys/_stdint.h" + 1509 .file 8 "/usr/include/newlib/stdlib.h" + 1510 .file 9 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 1511 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 1512 .file 11 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h" + 1513 .file 12 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h" + 1514 .file 13 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h" + ARM GAS /tmp/cc7AGXQS.s page 45 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 usbd_ctlreq.c + /tmp/cc7AGXQS.s:16 .text.USBD_GetLen:0000000000000000 $t + /tmp/cc7AGXQS.s:22 .text.USBD_GetLen:0000000000000000 USBD_GetLen + /tmp/cc7AGXQS.s:60 .text.USBD_SetFeature:0000000000000000 $t + /tmp/cc7AGXQS.s:66 .text.USBD_SetFeature:0000000000000000 USBD_SetFeature + /tmp/cc7AGXQS.s:107 .text.USBD_ParseSetupRequest:0000000000000000 $t + /tmp/cc7AGXQS.s:114 .text.USBD_ParseSetupRequest:0000000000000000 USBD_ParseSetupRequest + /tmp/cc7AGXQS.s:153 .text.USBD_CtlError:0000000000000000 $t + /tmp/cc7AGXQS.s:160 .text.USBD_CtlError:0000000000000000 USBD_CtlError + /tmp/cc7AGXQS.s:191 .text.USBD_GetDescriptor:0000000000000000 $t + /tmp/cc7AGXQS.s:197 .text.USBD_GetDescriptor:0000000000000000 USBD_GetDescriptor + /tmp/cc7AGXQS.s:228 .rodata.USBD_GetDescriptor:0000000000000000 $d + /tmp/cc7AGXQS.s:511 .text.USBD_GetDescriptor:0000000000000154 $d + /tmp/cc7AGXQS.s:517 .text.USBD_SetAddress:0000000000000000 $t + /tmp/cc7AGXQS.s:523 .text.USBD_SetAddress:0000000000000000 USBD_SetAddress + /tmp/cc7AGXQS.s:608 .text.USBD_SetConfig:0000000000000000 $t + /tmp/cc7AGXQS.s:614 .text.USBD_SetConfig:0000000000000000 USBD_SetConfig + /tmp/cc7AGXQS.s:762 .text.USBD_SetConfig:00000000000000ac $d + /tmp/cc7AGXQS.s:767 .text.USBD_GetConfig:0000000000000000 $t + /tmp/cc7AGXQS.s:773 .text.USBD_GetConfig:0000000000000000 USBD_GetConfig + /tmp/cc7AGXQS.s:841 .text.USBD_GetStatus:0000000000000000 $t + /tmp/cc7AGXQS.s:847 .text.USBD_GetStatus:0000000000000000 USBD_GetStatus + /tmp/cc7AGXQS.s:903 .text.USBD_ClrFeature:0000000000000000 $t + /tmp/cc7AGXQS.s:909 .text.USBD_ClrFeature:0000000000000000 USBD_ClrFeature + /tmp/cc7AGXQS.s:965 .text.USBD_StdDevReq:0000000000000000 $t + /tmp/cc7AGXQS.s:972 .text.USBD_StdDevReq:0000000000000000 USBD_StdDevReq + /tmp/cc7AGXQS.s:994 .rodata.USBD_StdDevReq:0000000000000000 $d + /tmp/cc7AGXQS.s:1068 .text.USBD_StdDevReq:0000000000000044 $d + /tmp/cc7AGXQS.s:1073 .text.USBD_StdItfReq:0000000000000000 $t + /tmp/cc7AGXQS.s:1080 .text.USBD_StdItfReq:0000000000000000 USBD_StdItfReq + /tmp/cc7AGXQS.s:1149 .text.USBD_StdEPReq:0000000000000000 $t + /tmp/cc7AGXQS.s:1156 .text.USBD_StdEPReq:0000000000000000 USBD_StdEPReq + /tmp/cc7AGXQS.s:1417 .text.USBD_GetString:0000000000000000 $t + /tmp/cc7AGXQS.s:1424 .text.USBD_GetString:0000000000000000 USBD_GetString + /tmp/cc7AGXQS.s:1499 .bss.cfgidx.7827:0000000000000000 cfgidx.7827 + /tmp/cc7AGXQS.s:1500 .bss.cfgidx.7827:0000000000000000 $d + +UNDEFINED SYMBOLS +USBD_CtlSendStatus +USBD_LL_StallEP +USBD_CtlSendData +USBD_LL_SetUSBAddress +USBD_SetClassConfig +USBD_ClrClassConfig +USBD_LL_ClearStallEP +USBD_LL_IsStallEP diff --git a/fw/midi-dials/build/usbd_ctlreq.o b/fw/midi-dials/build/usbd_ctlreq.o Binary files differnew file mode 100644 index 0000000..5257e19 --- /dev/null +++ b/fw/midi-dials/build/usbd_ctlreq.o diff --git a/fw/midi-dials/build/usbd_desc.d b/fw/midi-dials/build/usbd_desc.d new file mode 100644 index 0000000..b2fddbc --- /dev/null +++ b/fw/midi-dials/build/usbd_desc.d @@ -0,0 +1,109 @@ +build/usbd_desc.o: Src/usbd_desc.c \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Inc/usbd_conf.h Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ + Inc/usbd_desc.h + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Inc/usbd_conf.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: + +Inc/usbd_desc.h: diff --git a/fw/midi-dials/build/usbd_desc.lst b/fw/midi-dials/build/usbd_desc.lst new file mode 100644 index 0000000..ffcbda4 --- /dev/null +++ b/fw/midi-dials/build/usbd_desc.lst @@ -0,0 +1,850 @@ +ARM GAS /tmp/cc69mfuT.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "usbd_desc.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.USBD_FS_DeviceDescriptor,"ax",%progbits + 16 .align 1 + 17 .global USBD_FS_DeviceDescriptor + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 USBD_FS_DeviceDescriptor: + 24 .LFB43: + 25 .file 1 "Src/usbd_desc.c" + 1:Src/usbd_desc.c **** /** + 2:Src/usbd_desc.c **** ****************************************************************************** + 3:Src/usbd_desc.c **** * @file : usbd_desc.c + 4:Src/usbd_desc.c **** * @version : v2.0_Cube + 5:Src/usbd_desc.c **** * @brief : This file implements the USB device descriptors. + 6:Src/usbd_desc.c **** ****************************************************************************** + 7:Src/usbd_desc.c **** * This notice applies to any and all portions of this file + 8:Src/usbd_desc.c **** * that are not between comment pairs USER CODE BEGIN and + 9:Src/usbd_desc.c **** * USER CODE END. Other portions of this file, whether + 10:Src/usbd_desc.c **** * inserted by the user or by software development tools + 11:Src/usbd_desc.c **** * are owned by their respective copyright owners. + 12:Src/usbd_desc.c **** * + 13:Src/usbd_desc.c **** * Copyright (c) 2018 STMicroelectronics International N.V. + 14:Src/usbd_desc.c **** * All rights reserved. + 15:Src/usbd_desc.c **** * + 16:Src/usbd_desc.c **** * Redistribution and use in source and binary forms, with or without + 17:Src/usbd_desc.c **** * modification, are permitted, provided that the following conditions are met: + 18:Src/usbd_desc.c **** * + 19:Src/usbd_desc.c **** * 1. Redistribution of source code must retain the above copyright notice, + 20:Src/usbd_desc.c **** * this list of conditions and the following disclaimer. + 21:Src/usbd_desc.c **** * 2. Redistributions in binary form must reproduce the above copyright notice, + 22:Src/usbd_desc.c **** * this list of conditions and the following disclaimer in the documentation + 23:Src/usbd_desc.c **** * and/or other materials provided with the distribution. + 24:Src/usbd_desc.c **** * 3. Neither the name of STMicroelectronics nor the names of other + 25:Src/usbd_desc.c **** * contributors to this software may be used to endorse or promote products + 26:Src/usbd_desc.c **** * derived from this software without specific written permission. + 27:Src/usbd_desc.c **** * 4. This software, including modifications and/or derivative works of this + 28:Src/usbd_desc.c **** * software, must execute solely and exclusively on microcontroller or + 29:Src/usbd_desc.c **** * microprocessor devices manufactured by or for STMicroelectronics. + 30:Src/usbd_desc.c **** * 5. Redistribution and use of this software other than as permitted under + 31:Src/usbd_desc.c **** * this license is void and will automatically terminate your rights under + 32:Src/usbd_desc.c **** * this license. + 33:Src/usbd_desc.c **** * + ARM GAS /tmp/cc69mfuT.s page 2 + + + 34:Src/usbd_desc.c **** * THIS SOFTWARE IS PROVIDED BY STMICROELECTRONICS AND CONTRIBUTORS "AS IS" + 35:Src/usbd_desc.c **** * AND ANY EXPRESS, IMPLIED OR STATUTORY WARRANTIES, INCLUDING, BUT NOT + 36:Src/usbd_desc.c **** * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A + 37:Src/usbd_desc.c **** * PARTICULAR PURPOSE AND NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY + 38:Src/usbd_desc.c **** * RIGHTS ARE DISCLAIMED TO THE FULLEST EXTENT PERMITTED BY LAW. IN NO EVENT + 39:Src/usbd_desc.c **** * SHALL STMICROELECTRONICS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + 40:Src/usbd_desc.c **** * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + 41:Src/usbd_desc.c **** * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + 42:Src/usbd_desc.c **** * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + 43:Src/usbd_desc.c **** * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + 44:Src/usbd_desc.c **** * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + 45:Src/usbd_desc.c **** * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + 46:Src/usbd_desc.c **** * + 47:Src/usbd_desc.c **** ****************************************************************************** + 48:Src/usbd_desc.c **** */ + 49:Src/usbd_desc.c **** + 50:Src/usbd_desc.c **** /* Includes ------------------------------------------------------------------*/ + 51:Src/usbd_desc.c **** #include "usbd_core.h" + 52:Src/usbd_desc.c **** #include "usbd_desc.h" + 53:Src/usbd_desc.c **** #include "usbd_conf.h" + 54:Src/usbd_desc.c **** + 55:Src/usbd_desc.c **** /* USER CODE BEGIN INCLUDE */ + 56:Src/usbd_desc.c **** + 57:Src/usbd_desc.c **** /* USER CODE END INCLUDE */ + 58:Src/usbd_desc.c **** + 59:Src/usbd_desc.c **** /* Private typedef -----------------------------------------------------------*/ + 60:Src/usbd_desc.c **** /* Private define ------------------------------------------------------------*/ + 61:Src/usbd_desc.c **** /* Private macro -------------------------------------------------------------*/ + 62:Src/usbd_desc.c **** + 63:Src/usbd_desc.c **** /* USER CODE BEGIN PV */ + 64:Src/usbd_desc.c **** /* Private variables ---------------------------------------------------------*/ + 65:Src/usbd_desc.c **** + 66:Src/usbd_desc.c **** /* USER CODE END PV */ + 67:Src/usbd_desc.c **** + 68:Src/usbd_desc.c **** /** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY + 69:Src/usbd_desc.c **** * @{ + 70:Src/usbd_desc.c **** */ + 71:Src/usbd_desc.c **** + 72:Src/usbd_desc.c **** /** @addtogroup USBD_DESC + 73:Src/usbd_desc.c **** * @{ + 74:Src/usbd_desc.c **** */ + 75:Src/usbd_desc.c **** + 76:Src/usbd_desc.c **** /** @defgroup USBD_DESC_Private_TypesDefinitions USBD_DESC_Private_TypesDefinitions + 77:Src/usbd_desc.c **** * @brief Private types. + 78:Src/usbd_desc.c **** * @{ + 79:Src/usbd_desc.c **** */ + 80:Src/usbd_desc.c **** + 81:Src/usbd_desc.c **** /* USER CODE BEGIN PRIVATE_TYPES */ + 82:Src/usbd_desc.c **** + 83:Src/usbd_desc.c **** /* USER CODE END PRIVATE_TYPES */ + 84:Src/usbd_desc.c **** + 85:Src/usbd_desc.c **** /** + 86:Src/usbd_desc.c **** * @} + 87:Src/usbd_desc.c **** */ + 88:Src/usbd_desc.c **** + 89:Src/usbd_desc.c **** /** @defgroup USBD_DESC_Private_Defines USBD_DESC_Private_Defines + 90:Src/usbd_desc.c **** * @brief Private defines. + ARM GAS /tmp/cc69mfuT.s page 3 + + + 91:Src/usbd_desc.c **** * @{ + 92:Src/usbd_desc.c **** */ + 93:Src/usbd_desc.c **** + 94:Src/usbd_desc.c **** /* + 95:Src/usbd_desc.c **** *************************************************[ATTENTION]************************************** + 96:Src/usbd_desc.c **** * + 97:Src/usbd_desc.c **** * VID 0x1209 and PID 0x0001 is experimental IDs from http://pid.codes . + 98:Src/usbd_desc.c **** * You must get your own IDs, and change to your own IDs in order to avoid conflicting to other USB + 99:Src/usbd_desc.c **** * + 100:Src/usbd_desc.c **** ************************************************************************************************** + 101:Src/usbd_desc.c **** */ + 102:Src/usbd_desc.c **** + 103:Src/usbd_desc.c **** #define USBD_VID 0x1209 //MUST BE CHANGED. + 104:Src/usbd_desc.c **** #define USBD_LANGID_STRING 1041 + 105:Src/usbd_desc.c **** #define USBD_MANUFACTURER_STRING "Otter Scientific" + 106:Src/usbd_desc.c **** #define USBD_PID_FS 0x0001 //MUST BE CHANGED. + 107:Src/usbd_desc.c **** #define USBD_PRODUCT_STRING_FS "MIDI Dials" + 108:Src/usbd_desc.c **** #define USBD_SERIALNUMBER_STRING_FS "00000000001A" + 109:Src/usbd_desc.c **** #define USBD_CONFIGURATION_STRING_FS "MIDI Config" + 110:Src/usbd_desc.c **** #define USBD_INTERFACE_STRING_FS "MIDI Interface" + 111:Src/usbd_desc.c **** + 112:Src/usbd_desc.c **** + 113:Src/usbd_desc.c **** + 114:Src/usbd_desc.c **** /* USER CODE BEGIN PRIVATE_DEFINES */ + 115:Src/usbd_desc.c **** + 116:Src/usbd_desc.c **** /* USER CODE END PRIVATE_DEFINES */ + 117:Src/usbd_desc.c **** + 118:Src/usbd_desc.c **** /** + 119:Src/usbd_desc.c **** * @} + 120:Src/usbd_desc.c **** */ + 121:Src/usbd_desc.c **** + 122:Src/usbd_desc.c **** /* USER CODE BEGIN 0 */ + 123:Src/usbd_desc.c **** + 124:Src/usbd_desc.c **** /* USER CODE END 0 */ + 125:Src/usbd_desc.c **** + 126:Src/usbd_desc.c **** /** @defgroup USBD_DESC_Private_Macros USBD_DESC_Private_Macros + 127:Src/usbd_desc.c **** * @brief Private macros. + 128:Src/usbd_desc.c **** * @{ + 129:Src/usbd_desc.c **** */ + 130:Src/usbd_desc.c **** + 131:Src/usbd_desc.c **** /* USER CODE BEGIN PRIVATE_MACRO */ + 132:Src/usbd_desc.c **** + 133:Src/usbd_desc.c **** /* USER CODE END PRIVATE_MACRO */ + 134:Src/usbd_desc.c **** + 135:Src/usbd_desc.c **** /** + 136:Src/usbd_desc.c **** * @} + 137:Src/usbd_desc.c **** */ + 138:Src/usbd_desc.c **** + 139:Src/usbd_desc.c **** /** @defgroup USBD_DESC_Private_FunctionPrototypes USBD_DESC_Private_FunctionPrototypes + 140:Src/usbd_desc.c **** * @brief Private functions declaration. + 141:Src/usbd_desc.c **** * @{ + 142:Src/usbd_desc.c **** */ + 143:Src/usbd_desc.c **** + 144:Src/usbd_desc.c **** uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); + 145:Src/usbd_desc.c **** uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); + 146:Src/usbd_desc.c **** uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); + 147:Src/usbd_desc.c **** uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); + ARM GAS /tmp/cc69mfuT.s page 4 + + + 148:Src/usbd_desc.c **** uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); + 149:Src/usbd_desc.c **** uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); + 150:Src/usbd_desc.c **** uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length); + 151:Src/usbd_desc.c **** + 152:Src/usbd_desc.c **** #ifdef USB_SUPPORT_USER_STRING_DESC + 153:Src/usbd_desc.c **** uint8_t * USBD_FS_USRStringDesc(USBD_SpeedTypeDef speed, uint8_t idx, uint16_t *length); + 154:Src/usbd_desc.c **** #endif /* USB_SUPPORT_USER_STRING_DESC */ + 155:Src/usbd_desc.c **** + 156:Src/usbd_desc.c **** /** + 157:Src/usbd_desc.c **** * @} + 158:Src/usbd_desc.c **** */ + 159:Src/usbd_desc.c **** + 160:Src/usbd_desc.c **** /** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables + 161:Src/usbd_desc.c **** * @brief Private variables. + 162:Src/usbd_desc.c **** * @{ + 163:Src/usbd_desc.c **** */ + 164:Src/usbd_desc.c **** + 165:Src/usbd_desc.c **** USBD_DescriptorsTypeDef FS_Desc = + 166:Src/usbd_desc.c **** { + 167:Src/usbd_desc.c **** USBD_FS_DeviceDescriptor + 168:Src/usbd_desc.c **** , USBD_FS_LangIDStrDescriptor + 169:Src/usbd_desc.c **** , USBD_FS_ManufacturerStrDescriptor + 170:Src/usbd_desc.c **** , USBD_FS_ProductStrDescriptor + 171:Src/usbd_desc.c **** , USBD_FS_SerialStrDescriptor + 172:Src/usbd_desc.c **** , USBD_FS_ConfigStrDescriptor + 173:Src/usbd_desc.c **** , USBD_FS_InterfaceStrDescriptor + 174:Src/usbd_desc.c **** }; + 175:Src/usbd_desc.c **** + 176:Src/usbd_desc.c **** #if defined ( __ICCARM__ ) /* IAR Compiler */ + 177:Src/usbd_desc.c **** #pragma data_alignment=4 + 178:Src/usbd_desc.c **** #endif /* defined ( __ICCARM__ ) */ + 179:Src/usbd_desc.c **** /** USB standard device descriptor. */ + 180:Src/usbd_desc.c **** __ALIGN_BEGIN uint8_t USBD_FS_DeviceDesc[USB_LEN_DEV_DESC] __ALIGN_END = + 181:Src/usbd_desc.c **** { + 182:Src/usbd_desc.c **** 0x12, /*bLength */ + 183:Src/usbd_desc.c **** USB_DESC_TYPE_DEVICE, /*bDescriptorType*/ + 184:Src/usbd_desc.c **** 0x00, /*bcdUSB */ + 185:Src/usbd_desc.c **** 0x02, + 186:Src/usbd_desc.c **** 0x02, /*bDeviceClass*/ + 187:Src/usbd_desc.c **** 0x02, /*bDeviceSubClass*/ + 188:Src/usbd_desc.c **** 0x00, /*bDeviceProtocol*/ + 189:Src/usbd_desc.c **** USB_MAX_EP0_SIZE, /*bMaxPacketSize*/ + 190:Src/usbd_desc.c **** LOBYTE(USBD_VID), /*idVendor*/ + 191:Src/usbd_desc.c **** HIBYTE(USBD_VID), /*idVendor*/ + 192:Src/usbd_desc.c **** LOBYTE(USBD_PID_FS), /*idProduct*/ + 193:Src/usbd_desc.c **** HIBYTE(USBD_PID_FS), /*idProduct*/ + 194:Src/usbd_desc.c **** 0x00, /*bcdDevice rel. 2.00*/ + 195:Src/usbd_desc.c **** 0x02, + 196:Src/usbd_desc.c **** USBD_IDX_MFC_STR, /*Index of manufacturer string*/ + 197:Src/usbd_desc.c **** USBD_IDX_PRODUCT_STR, /*Index of product string*/ + 198:Src/usbd_desc.c **** USBD_IDX_SERIAL_STR, /*Index of serial number string*/ + 199:Src/usbd_desc.c **** USBD_MAX_NUM_CONFIGURATION /*bNumConfigurations*/ + 200:Src/usbd_desc.c **** }; + 201:Src/usbd_desc.c **** + 202:Src/usbd_desc.c **** /* USB_DeviceDescriptor */ + 203:Src/usbd_desc.c **** + 204:Src/usbd_desc.c **** /** + ARM GAS /tmp/cc69mfuT.s page 5 + + + 205:Src/usbd_desc.c **** * @} + 206:Src/usbd_desc.c **** */ + 207:Src/usbd_desc.c **** + 208:Src/usbd_desc.c **** /** @defgroup USBD_DESC_Private_Variables USBD_DESC_Private_Variables + 209:Src/usbd_desc.c **** * @brief Private variables. + 210:Src/usbd_desc.c **** * @{ + 211:Src/usbd_desc.c **** */ + 212:Src/usbd_desc.c **** + 213:Src/usbd_desc.c **** #if defined ( __ICCARM__ ) /* IAR Compiler */ + 214:Src/usbd_desc.c **** #pragma data_alignment=4 + 215:Src/usbd_desc.c **** #endif /* defined ( __ICCARM__ ) */ + 216:Src/usbd_desc.c **** + 217:Src/usbd_desc.c **** /** USB lang indentifier descriptor. */ + 218:Src/usbd_desc.c **** __ALIGN_BEGIN uint8_t USBD_LangIDDesc[USB_LEN_LANGID_STR_DESC] __ALIGN_END = + 219:Src/usbd_desc.c **** { + 220:Src/usbd_desc.c **** USB_LEN_LANGID_STR_DESC, + 221:Src/usbd_desc.c **** USB_DESC_TYPE_STRING, + 222:Src/usbd_desc.c **** LOBYTE(USBD_LANGID_STRING), + 223:Src/usbd_desc.c **** HIBYTE(USBD_LANGID_STRING) + 224:Src/usbd_desc.c **** }; + 225:Src/usbd_desc.c **** + 226:Src/usbd_desc.c **** #if defined ( __ICCARM__ ) /* IAR Compiler */ + 227:Src/usbd_desc.c **** #pragma data_alignment=4 + 228:Src/usbd_desc.c **** #endif /* defined ( __ICCARM__ ) */ + 229:Src/usbd_desc.c **** /* Internal string descriptor. */ + 230:Src/usbd_desc.c **** __ALIGN_BEGIN uint8_t USBD_StrDesc[USBD_MAX_STR_DESC_SIZ] __ALIGN_END; + 231:Src/usbd_desc.c **** + 232:Src/usbd_desc.c **** /** + 233:Src/usbd_desc.c **** * @} + 234:Src/usbd_desc.c **** */ + 235:Src/usbd_desc.c **** + 236:Src/usbd_desc.c **** /** @defgroup USBD_DESC_Private_Functions USBD_DESC_Private_Functions + 237:Src/usbd_desc.c **** * @brief Private functions. + 238:Src/usbd_desc.c **** * @{ + 239:Src/usbd_desc.c **** */ + 240:Src/usbd_desc.c **** + 241:Src/usbd_desc.c **** /** + 242:Src/usbd_desc.c **** * @brief Return the device descriptor + 243:Src/usbd_desc.c **** * @param speed : Current device speed + 244:Src/usbd_desc.c **** * @param length : Pointer to data length variable + 245:Src/usbd_desc.c **** * @retval Pointer to descriptor buffer + 246:Src/usbd_desc.c **** */ + 247:Src/usbd_desc.c **** uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) + 248:Src/usbd_desc.c **** { + 26 .loc 1 248 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 31 .LVL0: + 249:Src/usbd_desc.c **** *length = sizeof(USBD_FS_DeviceDesc); + 32 .loc 1 249 0 + 33 0000 1223 movs r3, #18 + 34 0002 0B80 strh r3, [r1] + 250:Src/usbd_desc.c **** return USBD_FS_DeviceDesc; + 251:Src/usbd_desc.c **** } + 35 .loc 1 251 0 + ARM GAS /tmp/cc69mfuT.s page 6 + + + 36 0004 0048 ldr r0, .L2 + 37 .LVL1: + 38 @ sp needed + 39 0006 7047 bx lr + 40 .L3: + 41 .align 2 + 42 .L2: + 43 0008 00000000 .word .LANCHOR0 + 44 .cfi_endproc + 45 .LFE43: + 47 .section .text.USBD_FS_LangIDStrDescriptor,"ax",%progbits + 48 .align 1 + 49 .global USBD_FS_LangIDStrDescriptor + 50 .syntax unified + 51 .code 16 + 52 .thumb_func + 53 .fpu softvfp + 55 USBD_FS_LangIDStrDescriptor: + 56 .LFB44: + 252:Src/usbd_desc.c **** + 253:Src/usbd_desc.c **** /** + 254:Src/usbd_desc.c **** * @brief Return the LangID string descriptor + 255:Src/usbd_desc.c **** * @param speed : Current device speed + 256:Src/usbd_desc.c **** * @param length : Pointer to data length variable + 257:Src/usbd_desc.c **** * @retval Pointer to descriptor buffer + 258:Src/usbd_desc.c **** */ + 259:Src/usbd_desc.c **** uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) + 260:Src/usbd_desc.c **** { + 57 .loc 1 260 0 + 58 .cfi_startproc + 59 @ args = 0, pretend = 0, frame = 0 + 60 @ frame_needed = 0, uses_anonymous_args = 0 + 61 @ link register save eliminated. + 62 .LVL2: + 261:Src/usbd_desc.c **** *length = sizeof(USBD_LangIDDesc); + 63 .loc 1 261 0 + 64 0000 0423 movs r3, #4 + 65 0002 0B80 strh r3, [r1] + 262:Src/usbd_desc.c **** return USBD_LangIDDesc; + 263:Src/usbd_desc.c **** } + 66 .loc 1 263 0 + 67 0004 0048 ldr r0, .L5 + 68 .LVL3: + 69 @ sp needed + 70 0006 7047 bx lr + 71 .L6: + 72 .align 2 + 73 .L5: + 74 0008 00000000 .word .LANCHOR1 + 75 .cfi_endproc + 76 .LFE44: + 78 .section .text.USBD_FS_ProductStrDescriptor,"ax",%progbits + 79 .align 1 + 80 .global USBD_FS_ProductStrDescriptor + 81 .syntax unified + 82 .code 16 + 83 .thumb_func + ARM GAS /tmp/cc69mfuT.s page 7 + + + 84 .fpu softvfp + 86 USBD_FS_ProductStrDescriptor: + 87 .LFB45: + 264:Src/usbd_desc.c **** + 265:Src/usbd_desc.c **** /** + 266:Src/usbd_desc.c **** * @brief Return the product string descriptor + 267:Src/usbd_desc.c **** * @param speed : Current device speed + 268:Src/usbd_desc.c **** * @param length : Pointer to data length variable + 269:Src/usbd_desc.c **** * @retval Pointer to descriptor buffer + 270:Src/usbd_desc.c **** */ + 271:Src/usbd_desc.c **** uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) + 272:Src/usbd_desc.c **** { + 88 .loc 1 272 0 + 89 .cfi_startproc + 90 @ args = 0, pretend = 0, frame = 0 + 91 @ frame_needed = 0, uses_anonymous_args = 0 + 92 .LVL4: + 93 0000 10B5 push {r4, lr} + 94 .LCFI0: + 95 .cfi_def_cfa_offset 8 + 96 .cfi_offset 4, -8 + 97 .cfi_offset 14, -4 + 98 0002 0A00 movs r2, r1 + 273:Src/usbd_desc.c **** if(speed == 0) + 99 .loc 1 273 0 + 100 0004 0028 cmp r0, #0 + 101 0006 05D0 beq .L10 + 274:Src/usbd_desc.c **** { + 275:Src/usbd_desc.c **** USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); + 276:Src/usbd_desc.c **** } + 277:Src/usbd_desc.c **** else + 278:Src/usbd_desc.c **** { + 279:Src/usbd_desc.c **** USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length); + 102 .loc 1 279 0 + 103 0008 0549 ldr r1, .L11 + 104 .LVL5: + 105 000a 0648 ldr r0, .L11+4 + 106 .LVL6: + 107 000c FFF7FEFF bl USBD_GetString + 108 .LVL7: + 109 .L9: + 280:Src/usbd_desc.c **** } + 281:Src/usbd_desc.c **** return USBD_StrDesc; + 282:Src/usbd_desc.c **** } + 110 .loc 1 282 0 + 111 0010 0348 ldr r0, .L11 + 112 @ sp needed + 113 0012 10BD pop {r4, pc} + 114 .LVL8: + 115 .L10: + 275:Src/usbd_desc.c **** } + 116 .loc 1 275 0 + 117 0014 0249 ldr r1, .L11 + 118 .LVL9: + 119 0016 0348 ldr r0, .L11+4 + 120 .LVL10: + 121 0018 FFF7FEFF bl USBD_GetString + ARM GAS /tmp/cc69mfuT.s page 8 + + + 122 .LVL11: + 123 001c F8E7 b .L9 + 124 .L12: + 125 001e C046 .align 2 + 126 .L11: + 127 0020 00000000 .word USBD_StrDesc + 128 0024 00000000 .word .LC3 + 129 .cfi_endproc + 130 .LFE45: + 132 .section .text.USBD_FS_ManufacturerStrDescriptor,"ax",%progbits + 133 .align 1 + 134 .global USBD_FS_ManufacturerStrDescriptor + 135 .syntax unified + 136 .code 16 + 137 .thumb_func + 138 .fpu softvfp + 140 USBD_FS_ManufacturerStrDescriptor: + 141 .LFB46: + 283:Src/usbd_desc.c **** + 284:Src/usbd_desc.c **** /** + 285:Src/usbd_desc.c **** * @brief Return the manufacturer string descriptor + 286:Src/usbd_desc.c **** * @param speed : Current device speed + 287:Src/usbd_desc.c **** * @param length : Pointer to data length variable + 288:Src/usbd_desc.c **** * @retval Pointer to descriptor buffer + 289:Src/usbd_desc.c **** */ + 290:Src/usbd_desc.c **** uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) + 291:Src/usbd_desc.c **** { + 142 .loc 1 291 0 + 143 .cfi_startproc + 144 @ args = 0, pretend = 0, frame = 0 + 145 @ frame_needed = 0, uses_anonymous_args = 0 + 146 .LVL12: + 147 0000 10B5 push {r4, lr} + 148 .LCFI1: + 149 .cfi_def_cfa_offset 8 + 150 .cfi_offset 4, -8 + 151 .cfi_offset 14, -4 + 152 0002 0A00 movs r2, r1 + 292:Src/usbd_desc.c **** USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length); + 153 .loc 1 292 0 + 154 0004 034C ldr r4, .L14 + 155 0006 2100 movs r1, r4 + 156 .LVL13: + 157 0008 0348 ldr r0, .L14+4 + 158 .LVL14: + 159 000a FFF7FEFF bl USBD_GetString + 160 .LVL15: + 293:Src/usbd_desc.c **** return USBD_StrDesc; + 294:Src/usbd_desc.c **** } + 161 .loc 1 294 0 + 162 000e 2000 movs r0, r4 + 163 @ sp needed + 164 0010 10BD pop {r4, pc} + 165 .L15: + 166 0012 C046 .align 2 + 167 .L14: + 168 0014 00000000 .word USBD_StrDesc + ARM GAS /tmp/cc69mfuT.s page 9 + + + 169 0018 00000000 .word .LC6 + 170 .cfi_endproc + 171 .LFE46: + 173 .section .text.USBD_FS_SerialStrDescriptor,"ax",%progbits + 174 .align 1 + 175 .global USBD_FS_SerialStrDescriptor + 176 .syntax unified + 177 .code 16 + 178 .thumb_func + 179 .fpu softvfp + 181 USBD_FS_SerialStrDescriptor: + 182 .LFB47: + 295:Src/usbd_desc.c **** + 296:Src/usbd_desc.c **** /** + 297:Src/usbd_desc.c **** * @brief Return the serial number string descriptor + 298:Src/usbd_desc.c **** * @param speed : Current device speed + 299:Src/usbd_desc.c **** * @param length : Pointer to data length variable + 300:Src/usbd_desc.c **** * @retval Pointer to descriptor buffer + 301:Src/usbd_desc.c **** */ + 302:Src/usbd_desc.c **** uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) + 303:Src/usbd_desc.c **** { + 183 .loc 1 303 0 + 184 .cfi_startproc + 185 @ args = 0, pretend = 0, frame = 0 + 186 @ frame_needed = 0, uses_anonymous_args = 0 + 187 .LVL16: + 188 0000 10B5 push {r4, lr} + 189 .LCFI2: + 190 .cfi_def_cfa_offset 8 + 191 .cfi_offset 4, -8 + 192 .cfi_offset 14, -4 + 193 0002 0A00 movs r2, r1 + 304:Src/usbd_desc.c **** if(speed == USBD_SPEED_HIGH) + 194 .loc 1 304 0 + 195 0004 0028 cmp r0, #0 + 196 0006 05D0 beq .L19 + 305:Src/usbd_desc.c **** { + 306:Src/usbd_desc.c **** USBD_GetString((uint8_t *)USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length); + 307:Src/usbd_desc.c **** } + 308:Src/usbd_desc.c **** else + 309:Src/usbd_desc.c **** { + 310:Src/usbd_desc.c **** USBD_GetString((uint8_t *)USBD_SERIALNUMBER_STRING_FS, USBD_StrDesc, length); + 197 .loc 1 310 0 + 198 0008 0549 ldr r1, .L20 + 199 .LVL17: + 200 000a 0648 ldr r0, .L20+4 + 201 .LVL18: + 202 000c FFF7FEFF bl USBD_GetString + 203 .LVL19: + 204 .L18: + 311:Src/usbd_desc.c **** } + 312:Src/usbd_desc.c **** return USBD_StrDesc; + 313:Src/usbd_desc.c **** } + 205 .loc 1 313 0 + 206 0010 0348 ldr r0, .L20 + 207 @ sp needed + 208 0012 10BD pop {r4, pc} + ARM GAS /tmp/cc69mfuT.s page 10 + + + 209 .LVL20: + 210 .L19: + 306:Src/usbd_desc.c **** } + 211 .loc 1 306 0 + 212 0014 0249 ldr r1, .L20 + 213 .LVL21: + 214 0016 0348 ldr r0, .L20+4 + 215 .LVL22: + 216 0018 FFF7FEFF bl USBD_GetString + 217 .LVL23: + 218 001c F8E7 b .L18 + 219 .L21: + 220 001e C046 .align 2 + 221 .L20: + 222 0020 00000000 .word USBD_StrDesc + 223 0024 00000000 .word .LC9 + 224 .cfi_endproc + 225 .LFE47: + 227 .section .text.USBD_FS_ConfigStrDescriptor,"ax",%progbits + 228 .align 1 + 229 .global USBD_FS_ConfigStrDescriptor + 230 .syntax unified + 231 .code 16 + 232 .thumb_func + 233 .fpu softvfp + 235 USBD_FS_ConfigStrDescriptor: + 236 .LFB48: + 314:Src/usbd_desc.c **** + 315:Src/usbd_desc.c **** /** + 316:Src/usbd_desc.c **** * @brief Return the configuration string descriptor + 317:Src/usbd_desc.c **** * @param speed : Current device speed + 318:Src/usbd_desc.c **** * @param length : Pointer to data length variable + 319:Src/usbd_desc.c **** * @retval Pointer to descriptor buffer + 320:Src/usbd_desc.c **** */ + 321:Src/usbd_desc.c **** uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) + 322:Src/usbd_desc.c **** { + 237 .loc 1 322 0 + 238 .cfi_startproc + 239 @ args = 0, pretend = 0, frame = 0 + 240 @ frame_needed = 0, uses_anonymous_args = 0 + 241 .LVL24: + 242 0000 10B5 push {r4, lr} + 243 .LCFI3: + 244 .cfi_def_cfa_offset 8 + 245 .cfi_offset 4, -8 + 246 .cfi_offset 14, -4 + 247 0002 0A00 movs r2, r1 + 323:Src/usbd_desc.c **** if(speed == USBD_SPEED_HIGH) + 248 .loc 1 323 0 + 249 0004 0028 cmp r0, #0 + 250 0006 05D0 beq .L25 + 324:Src/usbd_desc.c **** { + 325:Src/usbd_desc.c **** USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); + 326:Src/usbd_desc.c **** } + 327:Src/usbd_desc.c **** else + 328:Src/usbd_desc.c **** { + 329:Src/usbd_desc.c **** USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length); + ARM GAS /tmp/cc69mfuT.s page 11 + + + 251 .loc 1 329 0 + 252 0008 0549 ldr r1, .L26 + 253 .LVL25: + 254 000a 0648 ldr r0, .L26+4 + 255 .LVL26: + 256 000c FFF7FEFF bl USBD_GetString + 257 .LVL27: + 258 .L24: + 330:Src/usbd_desc.c **** } + 331:Src/usbd_desc.c **** return USBD_StrDesc; + 332:Src/usbd_desc.c **** } + 259 .loc 1 332 0 + 260 0010 0348 ldr r0, .L26 + 261 @ sp needed + 262 0012 10BD pop {r4, pc} + 263 .LVL28: + 264 .L25: + 325:Src/usbd_desc.c **** } + 265 .loc 1 325 0 + 266 0014 0249 ldr r1, .L26 + 267 .LVL29: + 268 0016 0348 ldr r0, .L26+4 + 269 .LVL30: + 270 0018 FFF7FEFF bl USBD_GetString + 271 .LVL31: + 272 001c F8E7 b .L24 + 273 .L27: + 274 001e C046 .align 2 + 275 .L26: + 276 0020 00000000 .word USBD_StrDesc + 277 0024 00000000 .word .LC12 + 278 .cfi_endproc + 279 .LFE48: + 281 .section .text.USBD_FS_InterfaceStrDescriptor,"ax",%progbits + 282 .align 1 + 283 .global USBD_FS_InterfaceStrDescriptor + 284 .syntax unified + 285 .code 16 + 286 .thumb_func + 287 .fpu softvfp + 289 USBD_FS_InterfaceStrDescriptor: + 290 .LFB49: + 333:Src/usbd_desc.c **** + 334:Src/usbd_desc.c **** /** + 335:Src/usbd_desc.c **** * @brief Return the interface string descriptor + 336:Src/usbd_desc.c **** * @param speed : Current device speed + 337:Src/usbd_desc.c **** * @param length : Pointer to data length variable + 338:Src/usbd_desc.c **** * @retval Pointer to descriptor buffer + 339:Src/usbd_desc.c **** */ + 340:Src/usbd_desc.c **** uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length) + 341:Src/usbd_desc.c **** { + 291 .loc 1 341 0 + 292 .cfi_startproc + 293 @ args = 0, pretend = 0, frame = 0 + 294 @ frame_needed = 0, uses_anonymous_args = 0 + 295 .LVL32: + 296 0000 10B5 push {r4, lr} + ARM GAS /tmp/cc69mfuT.s page 12 + + + 297 .LCFI4: + 298 .cfi_def_cfa_offset 8 + 299 .cfi_offset 4, -8 + 300 .cfi_offset 14, -4 + 301 0002 0A00 movs r2, r1 + 342:Src/usbd_desc.c **** if(speed == 0) + 302 .loc 1 342 0 + 303 0004 0028 cmp r0, #0 + 304 0006 05D0 beq .L31 + 343:Src/usbd_desc.c **** { + 344:Src/usbd_desc.c **** USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); + 345:Src/usbd_desc.c **** } + 346:Src/usbd_desc.c **** else + 347:Src/usbd_desc.c **** { + 348:Src/usbd_desc.c **** USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length); + 305 .loc 1 348 0 + 306 0008 0549 ldr r1, .L32 + 307 .LVL33: + 308 000a 0648 ldr r0, .L32+4 + 309 .LVL34: + 310 000c FFF7FEFF bl USBD_GetString + 311 .LVL35: + 312 .L30: + 349:Src/usbd_desc.c **** } + 350:Src/usbd_desc.c **** return USBD_StrDesc; + 351:Src/usbd_desc.c **** } + 313 .loc 1 351 0 + 314 0010 0348 ldr r0, .L32 + 315 @ sp needed + 316 0012 10BD pop {r4, pc} + 317 .LVL36: + 318 .L31: + 344:Src/usbd_desc.c **** } + 319 .loc 1 344 0 + 320 0014 0249 ldr r1, .L32 + 321 .LVL37: + 322 0016 0348 ldr r0, .L32+4 + 323 .LVL38: + 324 0018 FFF7FEFF bl USBD_GetString + 325 .LVL39: + 326 001c F8E7 b .L30 + 327 .L33: + 328 001e C046 .align 2 + 329 .L32: + 330 0020 00000000 .word USBD_StrDesc + 331 0024 00000000 .word .LC15 + 332 .cfi_endproc + 333 .LFE49: + 335 .comm USBD_StrDesc,512,4 + 336 .global USBD_LangIDDesc + 337 .global USBD_FS_DeviceDesc + 338 .global FS_Desc + 339 .section .data.FS_Desc,"aw",%progbits + 340 .align 2 + 343 FS_Desc: + 344 0000 00000000 .word USBD_FS_DeviceDescriptor + 345 0004 00000000 .word USBD_FS_LangIDStrDescriptor + ARM GAS /tmp/cc69mfuT.s page 13 + + + 346 0008 00000000 .word USBD_FS_ManufacturerStrDescriptor + 347 000c 00000000 .word USBD_FS_ProductStrDescriptor + 348 0010 00000000 .word USBD_FS_SerialStrDescriptor + 349 0014 00000000 .word USBD_FS_ConfigStrDescriptor + 350 0018 00000000 .word USBD_FS_InterfaceStrDescriptor + 351 .section .data.USBD_FS_DeviceDesc,"aw",%progbits + 352 .align 2 + 353 .set .LANCHOR0,. + 0 + 356 USBD_FS_DeviceDesc: + 357 0000 12 .byte 18 + 358 0001 01 .byte 1 + 359 0002 00 .byte 0 + 360 0003 02 .byte 2 + 361 0004 02 .byte 2 + 362 0005 02 .byte 2 + 363 0006 00 .byte 0 + 364 0007 40 .byte 64 + 365 0008 09 .byte 9 + 366 0009 12 .byte 18 + 367 000a 01 .byte 1 + 368 000b 00 .byte 0 + 369 000c 00 .byte 0 + 370 000d 02 .byte 2 + 371 000e 01 .byte 1 + 372 000f 02 .byte 2 + 373 0010 03 .byte 3 + 374 0011 01 .byte 1 + 375 .section .data.USBD_LangIDDesc,"aw",%progbits + 376 .align 2 + 377 .set .LANCHOR1,. + 0 + 380 USBD_LangIDDesc: + 381 0000 04 .byte 4 + 382 0001 03 .byte 3 + 383 0002 11 .byte 17 + 384 0003 04 .byte 4 + 385 .section .rodata.USBD_FS_ConfigStrDescriptor.str1.4,"aMS",%progbits,1 + 386 .align 2 + 387 .LC12: + 388 0000 4D494449 .ascii "MIDI Config\000" + 388 20436F6E + 388 66696700 + 389 .section .rodata.USBD_FS_InterfaceStrDescriptor.str1.4,"aMS",%progbits,1 + 390 .align 2 + 391 .LC15: + 392 0000 4D494449 .ascii "MIDI Interface\000" + 392 20496E74 + 392 65726661 + 392 636500 + 393 .section .rodata.USBD_FS_ManufacturerStrDescriptor.str1.4,"aMS",%progbits,1 + 394 .align 2 + 395 .LC6: + 396 0000 4F747465 .ascii "Otter Scientific\000" + 396 72205363 + 396 69656E74 + 396 69666963 + 396 00 + 397 .section .rodata.USBD_FS_ProductStrDescriptor.str1.4,"aMS",%progbits,1 + ARM GAS /tmp/cc69mfuT.s page 14 + + + 398 .align 2 + 399 .LC3: + 400 0000 4D494449 .ascii "MIDI Dials\000" + 400 20446961 + 400 6C7300 + 401 .section .rodata.USBD_FS_SerialStrDescriptor.str1.4,"aMS",%progbits,1 + 402 .align 2 + 403 .LC9: + 404 0000 30303030 .ascii "00000000001A\000" + 404 30303030 + 404 30303141 + 404 00 + 405 .text + 406 .Letext0: + 407 .file 2 "/usr/include/newlib/machine/_default_types.h" + 408 .file 3 "/usr/include/newlib/sys/lock.h" + 409 .file 4 "/usr/include/newlib/sys/_types.h" + 410 .file 5 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 411 .file 6 "/usr/include/newlib/sys/reent.h" + 412 .file 7 "/usr/include/newlib/sys/_stdint.h" + 413 .file 8 "/usr/include/newlib/stdlib.h" + 414 .file 9 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 415 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 416 .file 11 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h" + 417 .file 12 "Inc/usbd_desc.h" + 418 .file 13 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h" + ARM GAS /tmp/cc69mfuT.s page 15 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 usbd_desc.c + /tmp/cc69mfuT.s:16 .text.USBD_FS_DeviceDescriptor:0000000000000000 $t + /tmp/cc69mfuT.s:23 .text.USBD_FS_DeviceDescriptor:0000000000000000 USBD_FS_DeviceDescriptor + /tmp/cc69mfuT.s:43 .text.USBD_FS_DeviceDescriptor:0000000000000008 $d + /tmp/cc69mfuT.s:48 .text.USBD_FS_LangIDStrDescriptor:0000000000000000 $t + /tmp/cc69mfuT.s:55 .text.USBD_FS_LangIDStrDescriptor:0000000000000000 USBD_FS_LangIDStrDescriptor + /tmp/cc69mfuT.s:74 .text.USBD_FS_LangIDStrDescriptor:0000000000000008 $d + /tmp/cc69mfuT.s:79 .text.USBD_FS_ProductStrDescriptor:0000000000000000 $t + /tmp/cc69mfuT.s:86 .text.USBD_FS_ProductStrDescriptor:0000000000000000 USBD_FS_ProductStrDescriptor + /tmp/cc69mfuT.s:127 .text.USBD_FS_ProductStrDescriptor:0000000000000020 $d + *COM*:0000000000000200 USBD_StrDesc + /tmp/cc69mfuT.s:133 .text.USBD_FS_ManufacturerStrDescriptor:0000000000000000 $t + /tmp/cc69mfuT.s:140 .text.USBD_FS_ManufacturerStrDescriptor:0000000000000000 USBD_FS_ManufacturerStrDescriptor + /tmp/cc69mfuT.s:168 .text.USBD_FS_ManufacturerStrDescriptor:0000000000000014 $d + /tmp/cc69mfuT.s:174 .text.USBD_FS_SerialStrDescriptor:0000000000000000 $t + /tmp/cc69mfuT.s:181 .text.USBD_FS_SerialStrDescriptor:0000000000000000 USBD_FS_SerialStrDescriptor + /tmp/cc69mfuT.s:222 .text.USBD_FS_SerialStrDescriptor:0000000000000020 $d + /tmp/cc69mfuT.s:228 .text.USBD_FS_ConfigStrDescriptor:0000000000000000 $t + /tmp/cc69mfuT.s:235 .text.USBD_FS_ConfigStrDescriptor:0000000000000000 USBD_FS_ConfigStrDescriptor + /tmp/cc69mfuT.s:276 .text.USBD_FS_ConfigStrDescriptor:0000000000000020 $d + /tmp/cc69mfuT.s:282 .text.USBD_FS_InterfaceStrDescriptor:0000000000000000 $t + /tmp/cc69mfuT.s:289 .text.USBD_FS_InterfaceStrDescriptor:0000000000000000 USBD_FS_InterfaceStrDescriptor + /tmp/cc69mfuT.s:330 .text.USBD_FS_InterfaceStrDescriptor:0000000000000020 $d + /tmp/cc69mfuT.s:380 .data.USBD_LangIDDesc:0000000000000000 USBD_LangIDDesc + /tmp/cc69mfuT.s:356 .data.USBD_FS_DeviceDesc:0000000000000000 USBD_FS_DeviceDesc + /tmp/cc69mfuT.s:343 .data.FS_Desc:0000000000000000 FS_Desc + /tmp/cc69mfuT.s:340 .data.FS_Desc:0000000000000000 $d + /tmp/cc69mfuT.s:352 .data.USBD_FS_DeviceDesc:0000000000000000 $d + /tmp/cc69mfuT.s:376 .data.USBD_LangIDDesc:0000000000000000 $d + /tmp/cc69mfuT.s:386 .rodata.USBD_FS_ConfigStrDescriptor.str1.4:0000000000000000 $d + /tmp/cc69mfuT.s:390 .rodata.USBD_FS_InterfaceStrDescriptor.str1.4:0000000000000000 $d + /tmp/cc69mfuT.s:394 .rodata.USBD_FS_ManufacturerStrDescriptor.str1.4:0000000000000000 $d + /tmp/cc69mfuT.s:398 .rodata.USBD_FS_ProductStrDescriptor.str1.4:0000000000000000 $d + /tmp/cc69mfuT.s:402 .rodata.USBD_FS_SerialStrDescriptor.str1.4:0000000000000000 $d + +UNDEFINED SYMBOLS +USBD_GetString diff --git a/fw/midi-dials/build/usbd_desc.o b/fw/midi-dials/build/usbd_desc.o Binary files differnew file mode 100644 index 0000000..1a1dddc --- /dev/null +++ b/fw/midi-dials/build/usbd_desc.o diff --git a/fw/midi-dials/build/usbd_ioreq.d b/fw/midi-dials/build/usbd_ioreq.d new file mode 100644 index 0000000..1dee1cb --- /dev/null +++ b/fw/midi-dials/build/usbd_ioreq.d @@ -0,0 +1,107 @@ +build/usbd_ioreq.o: \ + Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Inc/usbd_conf.h Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Inc/usbd_conf.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/fw/midi-dials/build/usbd_ioreq.lst b/fw/midi-dials/build/usbd_ioreq.lst new file mode 100644 index 0000000..f5f97d9 --- /dev/null +++ b/fw/midi-dials/build/usbd_ioreq.lst @@ -0,0 +1,551 @@ +ARM GAS /tmp/ccDGEx0g.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "usbd_ioreq.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.USBD_CtlSendData,"ax",%progbits + 16 .align 1 + 17 .global USBD_CtlSendData + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 USBD_CtlSendData: + 24 .LFB43: + 25 .file 1 "Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c" + 1:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 2:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** ****************************************************************************** + 3:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @file usbd_ioreq.c + 4:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @author MCD Application Team + 5:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @version V2.4.2 + 6:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @date 11-December-2015 + 7:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @brief This file provides the IO requests APIs for control endpoints. + 8:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** ****************************************************************************** + 9:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @attention + 10:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * + 11:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * <h2><center>© COPYRIGHT 2015 STMicroelectronics</center></h2> + 12:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * + 13:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + 14:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * You may not use this file except in compliance with the License. + 15:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * You may obtain a copy of the License at: + 16:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * + 17:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * http://www.st.com/software_license_agreement_liberty_v2 + 18:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * + 19:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * Unless required by applicable law or agreed to in writing, software + 20:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * distributed under the License is distributed on an "AS IS" BASIS, + 21:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + 22:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * See the License for the specific language governing permissions and + 23:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * limitations under the License. + 24:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * + 25:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** ****************************************************************************** + 26:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 27:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 28:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Includes ------------------------------------------------------------------*/ + 29:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** #include "usbd_ioreq.h" + 30:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 31:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** @addtogroup STM32_USB_DEVICE_LIBRARY + 32:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @{ + 33:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + ARM GAS /tmp/ccDGEx0g.s page 2 + + + 34:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 35:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 36:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** @defgroup USBD_IOREQ + 37:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @brief control I/O requests module + 38:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @{ + 39:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 40:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 41:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** @defgroup USBD_IOREQ_Private_TypesDefinitions + 42:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @{ + 43:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 44:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 45:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @} + 46:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 47:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 48:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 49:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** @defgroup USBD_IOREQ_Private_Defines + 50:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @{ + 51:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 52:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 53:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 54:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @} + 55:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 56:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 57:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 58:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** @defgroup USBD_IOREQ_Private_Macros + 59:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @{ + 60:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 61:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 62:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @} + 63:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 64:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 65:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 66:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** @defgroup USBD_IOREQ_Private_Variables + 67:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @{ + 68:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 69:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 70:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 71:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @} + 72:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 73:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 74:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 75:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** @defgroup USBD_IOREQ_Private_FunctionPrototypes + 76:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @{ + 77:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 78:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 79:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @} + 80:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 81:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 82:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 83:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** @defgroup USBD_IOREQ_Private_Functions + 84:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @{ + 85:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 86:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 87:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 88:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @brief USBD_CtlSendData + 89:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * send data on the ctl pipe + 90:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param pdev: device instance + ARM GAS /tmp/ccDGEx0g.s page 3 + + + 91:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param buff: pointer to data buffer + 92:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param len: length of data to be sent + 93:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @retval status + 94:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 95:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_StatusTypeDef USBD_CtlSendData (USBD_HandleTypeDef *pdev, + 96:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** uint8_t *pbuf, + 97:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** uint16_t len) + 98:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** { + 26 .loc 1 98 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 10B5 push {r4, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 8 + 34 .cfi_offset 4, -8 + 35 .cfi_offset 14, -4 + 36 0002 1300 movs r3, r2 + 99:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Set EP0 State */ + 100:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pdev->ep0_state = USBD_EP0_DATA_IN; + 37 .loc 1 100 0 + 38 0004 FA22 movs r2, #250 + 39 .LVL1: + 40 0006 5200 lsls r2, r2, #1 + 41 0008 0224 movs r4, #2 + 42 000a 8450 str r4, [r0, r2] + 101:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pdev->ep_in[0].total_length = len; + 43 .loc 1 101 0 + 44 000c 8361 str r3, [r0, #24] + 102:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pdev->ep_in[0].rem_length = len; + 45 .loc 1 102 0 + 46 000e C361 str r3, [r0, #28] + 103:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Start the transfer */ + 104:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_LL_Transmit (pdev, 0x00, pbuf, len); + 47 .loc 1 104 0 + 48 0010 0A00 movs r2, r1 + 49 0012 0021 movs r1, #0 + 50 .LVL2: + 51 0014 FFF7FEFF bl USBD_LL_Transmit + 52 .LVL3: + 105:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 106:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** return USBD_OK; + 107:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** } + 53 .loc 1 107 0 + 54 0018 0020 movs r0, #0 + 55 @ sp needed + 56 001a 10BD pop {r4, pc} + 57 .cfi_endproc + 58 .LFE43: + 60 .section .text.USBD_CtlContinueSendData,"ax",%progbits + 61 .align 1 + 62 .global USBD_CtlContinueSendData + 63 .syntax unified + 64 .code 16 + 65 .thumb_func + 66 .fpu softvfp + ARM GAS /tmp/ccDGEx0g.s page 4 + + + 68 USBD_CtlContinueSendData: + 69 .LFB44: + 108:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 109:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 110:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @brief USBD_CtlContinueSendData + 111:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * continue sending data on the ctl pipe + 112:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param pdev: device instance + 113:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param buff: pointer to data buffer + 114:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param len: length of data to be sent + 115:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @retval status + 116:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 117:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_StatusTypeDef USBD_CtlContinueSendData (USBD_HandleTypeDef *pdev, + 118:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** uint8_t *pbuf, + 119:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** uint16_t len) + 120:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** { + 70 .loc 1 120 0 + 71 .cfi_startproc + 72 @ args = 0, pretend = 0, frame = 0 + 73 @ frame_needed = 0, uses_anonymous_args = 0 + 74 .LVL4: + 75 0000 10B5 push {r4, lr} + 76 .LCFI1: + 77 .cfi_def_cfa_offset 8 + 78 .cfi_offset 4, -8 + 79 .cfi_offset 14, -4 + 80 0002 1300 movs r3, r2 + 121:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Start the next transfer */ + 122:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_LL_Transmit (pdev, 0x00, pbuf, len); + 81 .loc 1 122 0 + 82 0004 0A00 movs r2, r1 + 83 .LVL5: + 84 0006 0021 movs r1, #0 + 85 .LVL6: + 86 0008 FFF7FEFF bl USBD_LL_Transmit + 87 .LVL7: + 123:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 124:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** return USBD_OK; + 125:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** } + 88 .loc 1 125 0 + 89 000c 0020 movs r0, #0 + 90 @ sp needed + 91 000e 10BD pop {r4, pc} + 92 .cfi_endproc + 93 .LFE44: + 95 .section .text.USBD_CtlPrepareRx,"ax",%progbits + 96 .align 1 + 97 .global USBD_CtlPrepareRx + 98 .syntax unified + 99 .code 16 + 100 .thumb_func + 101 .fpu softvfp + 103 USBD_CtlPrepareRx: + 104 .LFB45: + 126:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 127:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 128:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @brief USBD_CtlPrepareRx + 129:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * receive data on the ctl pipe + ARM GAS /tmp/ccDGEx0g.s page 5 + + + 130:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param pdev: device instance + 131:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param buff: pointer to data buffer + 132:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param len: length of data to be received + 133:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @retval status + 134:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 135:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_StatusTypeDef USBD_CtlPrepareRx (USBD_HandleTypeDef *pdev, + 136:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** uint8_t *pbuf, + 137:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** uint16_t len) + 138:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** { + 105 .loc 1 138 0 + 106 .cfi_startproc + 107 @ args = 0, pretend = 0, frame = 0 + 108 @ frame_needed = 0, uses_anonymous_args = 0 + 109 .LVL8: + 110 0000 10B5 push {r4, lr} + 111 .LCFI2: + 112 .cfi_def_cfa_offset 8 + 113 .cfi_offset 4, -8 + 114 .cfi_offset 14, -4 + 115 0002 1300 movs r3, r2 + 139:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Set EP0 State */ + 140:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pdev->ep0_state = USBD_EP0_DATA_OUT; + 116 .loc 1 140 0 + 117 0004 FA22 movs r2, #250 + 118 .LVL9: + 119 0006 5200 lsls r2, r2, #1 + 120 0008 0324 movs r4, #3 + 121 000a 8450 str r4, [r0, r2] + 141:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pdev->ep_out[0].total_length = len; + 122 .loc 1 141 0 + 123 000c EC3A subs r2, r2, #236 + 124 000e 8350 str r3, [r0, r2] + 142:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pdev->ep_out[0].rem_length = len; + 125 .loc 1 142 0 + 126 0010 0432 adds r2, r2, #4 + 127 0012 8350 str r3, [r0, r2] + 143:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Start the transfer */ + 144:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_LL_PrepareReceive (pdev, + 128 .loc 1 144 0 + 129 0014 0A00 movs r2, r1 + 130 0016 0021 movs r1, #0 + 131 .LVL10: + 132 0018 FFF7FEFF bl USBD_LL_PrepareReceive + 133 .LVL11: + 145:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** 0, + 146:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pbuf, + 147:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** len); + 148:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 149:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** return USBD_OK; + 150:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** } + 134 .loc 1 150 0 + 135 001c 0020 movs r0, #0 + 136 @ sp needed + 137 001e 10BD pop {r4, pc} + 138 .cfi_endproc + 139 .LFE45: + 141 .section .text.USBD_CtlContinueRx,"ax",%progbits + ARM GAS /tmp/ccDGEx0g.s page 6 + + + 142 .align 1 + 143 .global USBD_CtlContinueRx + 144 .syntax unified + 145 .code 16 + 146 .thumb_func + 147 .fpu softvfp + 149 USBD_CtlContinueRx: + 150 .LFB46: + 151:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 152:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 153:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @brief USBD_CtlContinueRx + 154:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * continue receive data on the ctl pipe + 155:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param pdev: device instance + 156:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param buff: pointer to data buffer + 157:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param len: length of data to be received + 158:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @retval status + 159:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 160:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_StatusTypeDef USBD_CtlContinueRx (USBD_HandleTypeDef *pdev, + 161:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** uint8_t *pbuf, + 162:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** uint16_t len) + 163:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** { + 151 .loc 1 163 0 + 152 .cfi_startproc + 153 @ args = 0, pretend = 0, frame = 0 + 154 @ frame_needed = 0, uses_anonymous_args = 0 + 155 .LVL12: + 156 0000 10B5 push {r4, lr} + 157 .LCFI3: + 158 .cfi_def_cfa_offset 8 + 159 .cfi_offset 4, -8 + 160 .cfi_offset 14, -4 + 161 0002 1300 movs r3, r2 + 164:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 165:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_LL_PrepareReceive (pdev, + 162 .loc 1 165 0 + 163 0004 0A00 movs r2, r1 + 164 .LVL13: + 165 0006 0021 movs r1, #0 + 166 .LVL14: + 167 0008 FFF7FEFF bl USBD_LL_PrepareReceive + 168 .LVL15: + 166:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** 0, + 167:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pbuf, + 168:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** len); + 169:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** return USBD_OK; + 170:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** } + 169 .loc 1 170 0 + 170 000c 0020 movs r0, #0 + 171 @ sp needed + 172 000e 10BD pop {r4, pc} + 173 .cfi_endproc + 174 .LFE46: + 176 .section .text.USBD_CtlSendStatus,"ax",%progbits + 177 .align 1 + 178 .global USBD_CtlSendStatus + 179 .syntax unified + 180 .code 16 + ARM GAS /tmp/ccDGEx0g.s page 7 + + + 181 .thumb_func + 182 .fpu softvfp + 184 USBD_CtlSendStatus: + 185 .LFB47: + 171:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 172:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @brief USBD_CtlSendStatus + 173:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * send zero lzngth packet on the ctl pipe + 174:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param pdev: device instance + 175:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @retval status + 176:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 177:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_StatusTypeDef USBD_CtlSendStatus (USBD_HandleTypeDef *pdev) + 178:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** { + 186 .loc 1 178 0 + 187 .cfi_startproc + 188 @ args = 0, pretend = 0, frame = 0 + 189 @ frame_needed = 0, uses_anonymous_args = 0 + 190 .LVL16: + 191 0000 10B5 push {r4, lr} + 192 .LCFI4: + 193 .cfi_def_cfa_offset 8 + 194 .cfi_offset 4, -8 + 195 .cfi_offset 14, -4 + 179:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 180:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Set EP0 State */ + 181:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pdev->ep0_state = USBD_EP0_STATUS_IN; + 196 .loc 1 181 0 + 197 0002 FA23 movs r3, #250 + 198 0004 5B00 lsls r3, r3, #1 + 199 0006 0422 movs r2, #4 + 200 0008 C250 str r2, [r0, r3] + 182:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 183:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Start the transfer */ + 184:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_LL_Transmit (pdev, 0x00, NULL, 0); + 201 .loc 1 184 0 + 202 000a 0023 movs r3, #0 + 203 000c 0022 movs r2, #0 + 204 000e 0021 movs r1, #0 + 205 0010 FFF7FEFF bl USBD_LL_Transmit + 206 .LVL17: + 185:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 186:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** return USBD_OK; + 187:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** } + 207 .loc 1 187 0 + 208 0014 0020 movs r0, #0 + 209 @ sp needed + 210 0016 10BD pop {r4, pc} + 211 .cfi_endproc + 212 .LFE47: + 214 .section .text.USBD_CtlReceiveStatus,"ax",%progbits + 215 .align 1 + 216 .global USBD_CtlReceiveStatus + 217 .syntax unified + 218 .code 16 + 219 .thumb_func + 220 .fpu softvfp + 222 USBD_CtlReceiveStatus: + 223 .LFB48: + ARM GAS /tmp/ccDGEx0g.s page 8 + + + 188:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 189:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 190:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @brief USBD_CtlReceiveStatus + 191:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * receive zero lzngth packet on the ctl pipe + 192:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param pdev: device instance + 193:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @retval status + 194:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 195:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_StatusTypeDef USBD_CtlReceiveStatus (USBD_HandleTypeDef *pdev) + 196:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** { + 224 .loc 1 196 0 + 225 .cfi_startproc + 226 @ args = 0, pretend = 0, frame = 0 + 227 @ frame_needed = 0, uses_anonymous_args = 0 + 228 .LVL18: + 229 0000 10B5 push {r4, lr} + 230 .LCFI5: + 231 .cfi_def_cfa_offset 8 + 232 .cfi_offset 4, -8 + 233 .cfi_offset 14, -4 + 197:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Set EP0 State */ + 198:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** pdev->ep0_state = USBD_EP0_STATUS_OUT; + 234 .loc 1 198 0 + 235 0002 FA23 movs r3, #250 + 236 0004 5B00 lsls r3, r3, #1 + 237 0006 0522 movs r2, #5 + 238 0008 C250 str r2, [r0, r3] + 199:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 200:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /* Start the transfer */ + 201:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** USBD_LL_PrepareReceive ( pdev, + 239 .loc 1 201 0 + 240 000a 0023 movs r3, #0 + 241 000c 0022 movs r2, #0 + 242 000e 0021 movs r1, #0 + 243 0010 FFF7FEFF bl USBD_LL_PrepareReceive + 244 .LVL19: + 202:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** 0, + 203:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** NULL, + 204:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** 0); + 205:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 206:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** return USBD_OK; + 207:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** } + 245 .loc 1 207 0 + 246 0014 0020 movs r0, #0 + 247 @ sp needed + 248 0016 10BD pop {r4, pc} + 249 .cfi_endproc + 250 .LFE48: + 252 .section .text.USBD_GetRxCount,"ax",%progbits + 253 .align 1 + 254 .global USBD_GetRxCount + 255 .syntax unified + 256 .code 16 + 257 .thumb_func + 258 .fpu softvfp + 260 USBD_GetRxCount: + 261 .LFB49: + 208:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + ARM GAS /tmp/ccDGEx0g.s page 9 + + + 209:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** + 210:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** /** + 211:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @brief USBD_GetRxCount + 212:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * returns the received data length + 213:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param pdev: device instance + 214:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @param ep_addr: endpoint address + 215:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** * @retval Rx Data blength + 216:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** */ + 217:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** uint16_t USBD_GetRxCount (USBD_HandleTypeDef *pdev , uint8_t ep_addr) + 218:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** { + 262 .loc 1 218 0 + 263 .cfi_startproc + 264 @ args = 0, pretend = 0, frame = 0 + 265 @ frame_needed = 0, uses_anonymous_args = 0 + 266 .LVL20: + 267 0000 10B5 push {r4, lr} + 268 .LCFI6: + 269 .cfi_def_cfa_offset 8 + 270 .cfi_offset 4, -8 + 271 .cfi_offset 14, -4 + 219:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** return USBD_LL_GetRxDataSize(pdev, ep_addr); + 272 .loc 1 219 0 + 273 0002 FFF7FEFF bl USBD_LL_GetRxDataSize + 274 .LVL21: + 275 0006 80B2 uxth r0, r0 + 220:Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c **** } + 276 .loc 1 220 0 + 277 @ sp needed + 278 0008 10BD pop {r4, pc} + 279 .cfi_endproc + 280 .LFE49: + 282 .text + 283 .Letext0: + 284 .file 2 "/usr/include/newlib/machine/_default_types.h" + 285 .file 3 "/usr/include/newlib/sys/lock.h" + 286 .file 4 "/usr/include/newlib/sys/_types.h" + 287 .file 5 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 288 .file 6 "/usr/include/newlib/sys/reent.h" + 289 .file 7 "/usr/include/newlib/sys/_stdint.h" + 290 .file 8 "/usr/include/newlib/stdlib.h" + 291 .file 9 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 292 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 293 .file 11 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h" + 294 .file 12 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h" + ARM GAS /tmp/ccDGEx0g.s page 10 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 usbd_ioreq.c + /tmp/ccDGEx0g.s:16 .text.USBD_CtlSendData:0000000000000000 $t + /tmp/ccDGEx0g.s:23 .text.USBD_CtlSendData:0000000000000000 USBD_CtlSendData + /tmp/ccDGEx0g.s:61 .text.USBD_CtlContinueSendData:0000000000000000 $t + /tmp/ccDGEx0g.s:68 .text.USBD_CtlContinueSendData:0000000000000000 USBD_CtlContinueSendData + /tmp/ccDGEx0g.s:96 .text.USBD_CtlPrepareRx:0000000000000000 $t + /tmp/ccDGEx0g.s:103 .text.USBD_CtlPrepareRx:0000000000000000 USBD_CtlPrepareRx + /tmp/ccDGEx0g.s:142 .text.USBD_CtlContinueRx:0000000000000000 $t + /tmp/ccDGEx0g.s:149 .text.USBD_CtlContinueRx:0000000000000000 USBD_CtlContinueRx + /tmp/ccDGEx0g.s:177 .text.USBD_CtlSendStatus:0000000000000000 $t + /tmp/ccDGEx0g.s:184 .text.USBD_CtlSendStatus:0000000000000000 USBD_CtlSendStatus + /tmp/ccDGEx0g.s:215 .text.USBD_CtlReceiveStatus:0000000000000000 $t + /tmp/ccDGEx0g.s:222 .text.USBD_CtlReceiveStatus:0000000000000000 USBD_CtlReceiveStatus + /tmp/ccDGEx0g.s:253 .text.USBD_GetRxCount:0000000000000000 $t + /tmp/ccDGEx0g.s:260 .text.USBD_GetRxCount:0000000000000000 USBD_GetRxCount + +UNDEFINED SYMBOLS +USBD_LL_Transmit +USBD_LL_PrepareReceive +USBD_LL_GetRxDataSize diff --git a/fw/midi-dials/build/usbd_ioreq.o b/fw/midi-dials/build/usbd_ioreq.o Binary files differnew file mode 100644 index 0000000..6990ea8 --- /dev/null +++ b/fw/midi-dials/build/usbd_ioreq.o diff --git a/fw/midi-dials/build/usbd_midi.d b/fw/midi-dials/build/usbd_midi.d new file mode 100644 index 0000000..b3da2b4 --- /dev/null +++ b/fw/midi-dials/build/usbd_midi.d @@ -0,0 +1,115 @@ +build/usbd_midi.o: Middlewares/USBMIDI/Src/usbd_midi.c \ + Middlewares/USBMIDI/Inc/usbd_midi.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Inc/usbd_conf.h Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ + Inc/usbd_desc.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h + +Middlewares/USBMIDI/Inc/usbd_midi.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Inc/usbd_conf.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: + +Inc/usbd_desc.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: diff --git a/fw/midi-dials/build/usbd_midi.lst b/fw/midi-dials/build/usbd_midi.lst new file mode 100644 index 0000000..96e7aef --- /dev/null +++ b/fw/midi-dials/build/usbd_midi.lst @@ -0,0 +1,946 @@ +ARM GAS /tmp/ccDAqcJz.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "usbd_midi.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.USBD_MIDI_DataIn,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 USBD_MIDI_DataIn: + 23 .LFB45: + 24 .file 1 "Middlewares/USBMIDI/Src/usbd_midi.c" + 1:Middlewares/USBMIDI/Src/usbd_midi.c **** /** + 2:Middlewares/USBMIDI/Src/usbd_midi.c **** ****************************************************************************** + 3:Middlewares/USBMIDI/Src/usbd_midi.c **** * @file usbd_midi.c + 4:Middlewares/USBMIDI/Src/usbd_midi.c **** ****************************************************************************** + 5:Middlewares/USBMIDI/Src/usbd_midi.c **** + 6:Middlewares/USBMIDI/Src/usbd_midi.c **** (CC at)2016 by D.F.Mac. @TripArts Music + 7:Middlewares/USBMIDI/Src/usbd_midi.c **** + 8:Middlewares/USBMIDI/Src/usbd_midi.c **** */ + 9:Middlewares/USBMIDI/Src/usbd_midi.c **** + 10:Middlewares/USBMIDI/Src/usbd_midi.c **** /* Includes ------------------------------------------------------------------*/ + 11:Middlewares/USBMIDI/Src/usbd_midi.c **** #include "usbd_midi.h" + 12:Middlewares/USBMIDI/Src/usbd_midi.c **** #include "usbd_desc.h" + 13:Middlewares/USBMIDI/Src/usbd_midi.c **** #include "stm32f0xx_hal_conf.h" + 14:Middlewares/USBMIDI/Src/usbd_midi.c **** #include "usbd_ctlreq.h" + 15:Middlewares/USBMIDI/Src/usbd_midi.c **** #include "stm32f0xx_hal.h" + 16:Middlewares/USBMIDI/Src/usbd_midi.c **** + 17:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t USBD_MIDI_Init (USBD_HandleTypeDef *pdev, uint8_t cfgidx); + 18:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t USBD_MIDI_DeInit (USBD_HandleTypeDef *pdev, uint8_t cfgidx); + 19:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t USBD_MIDI_DataIn (USBD_HandleTypeDef *pdev, uint8_t epnum); + 20:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t USBD_MIDI_DataOut (USBD_HandleTypeDef *pdev, uint8_t epnum); + 21:Middlewares/USBMIDI/Src/usbd_midi.c **** + 22:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t *USBD_MIDI_GetCfgDesc (uint16_t *length); + 23:Middlewares/USBMIDI/Src/usbd_midi.c **** //uint8_t *USBD_MIDI_GetDeviceQualifierDescriptor (uint16_t *length); + 24:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_HandleTypeDef *pInstance = NULL; + 25:Middlewares/USBMIDI/Src/usbd_midi.c **** + 26:Middlewares/USBMIDI/Src/usbd_midi.c **** uint32_t APP_Rx_ptr_in = 0; + 27:Middlewares/USBMIDI/Src/usbd_midi.c **** uint32_t APP_Rx_ptr_out = 0; + 28:Middlewares/USBMIDI/Src/usbd_midi.c **** uint32_t APP_Rx_length = 0; + 29:Middlewares/USBMIDI/Src/usbd_midi.c **** uint8_t USB_Tx_State = 0; + 30:Middlewares/USBMIDI/Src/usbd_midi.c **** + 31:Middlewares/USBMIDI/Src/usbd_midi.c **** __ALIGN_BEGIN uint8_t USB_Rx_Buffer[MIDI_DATA_OUT_PACKET_SIZE] __ALIGN_END ; + 32:Middlewares/USBMIDI/Src/usbd_midi.c **** __ALIGN_BEGIN uint8_t APP_Rx_Buffer[APP_RX_DATA_SIZE] __ALIGN_END ; + 33:Middlewares/USBMIDI/Src/usbd_midi.c **** + 34:Middlewares/USBMIDI/Src/usbd_midi.c **** /* USB Standard Device Descriptor */ + ARM GAS /tmp/ccDAqcJz.s page 2 + + + 35:Middlewares/USBMIDI/Src/usbd_midi.c **** /* + 36:Middlewares/USBMIDI/Src/usbd_midi.c **** __ALIGN_BEGIN static uint8_t USBD_MIDI_DeviceQualifierDesc[USB_LEN_DEV_QUALIFIER_DESC] __ALIGN_END + 37:Middlewares/USBMIDI/Src/usbd_midi.c **** { + 38:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_LEN_DEV_QUALIFIER_DESC, + 39:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_DESC_TYPE_DEVICE_QUALIFIER, + 40:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x00, + 41:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x02, + 42:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x00, + 43:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x00, + 44:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x00, + 45:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x40, + 46:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x01, + 47:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x00, + 48:Middlewares/USBMIDI/Src/usbd_midi.c **** }; + 49:Middlewares/USBMIDI/Src/usbd_midi.c **** */ + 50:Middlewares/USBMIDI/Src/usbd_midi.c **** + 51:Middlewares/USBMIDI/Src/usbd_midi.c **** /* USB MIDI interface class callbacks structure */ + 52:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_ClassTypeDef USBD_MIDI = + 53:Middlewares/USBMIDI/Src/usbd_midi.c **** { + 54:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_MIDI_Init, + 55:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_MIDI_DeInit, + 56:Middlewares/USBMIDI/Src/usbd_midi.c **** NULL, + 57:Middlewares/USBMIDI/Src/usbd_midi.c **** NULL, + 58:Middlewares/USBMIDI/Src/usbd_midi.c **** NULL, + 59:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_MIDI_DataIn, + 60:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_MIDI_DataOut, + 61:Middlewares/USBMIDI/Src/usbd_midi.c **** NULL, + 62:Middlewares/USBMIDI/Src/usbd_midi.c **** NULL, + 63:Middlewares/USBMIDI/Src/usbd_midi.c **** NULL, + 64:Middlewares/USBMIDI/Src/usbd_midi.c **** NULL,// HS + 65:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_MIDI_GetCfgDesc,// FS + 66:Middlewares/USBMIDI/Src/usbd_midi.c **** NULL,// OTHER SPEED + 67:Middlewares/USBMIDI/Src/usbd_midi.c **** NULL,// DEVICE_QUALIFIER + 68:Middlewares/USBMIDI/Src/usbd_midi.c **** }; + 69:Middlewares/USBMIDI/Src/usbd_midi.c **** + 70:Middlewares/USBMIDI/Src/usbd_midi.c **** /* USB MIDI device Configuration Descriptor */ + 71:Middlewares/USBMIDI/Src/usbd_midi.c **** __ALIGN_BEGIN uint8_t USBD_MIDI_CfgDesc[USB_MIDI_CONFIG_DESC_SIZ] __ALIGN_END = + 72:Middlewares/USBMIDI/Src/usbd_midi.c **** { + 73:Middlewares/USBMIDI/Src/usbd_midi.c **** // configuration descriptor + 74:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x02, 0x65 + 6+6+9+9+1+1, 0x00, 0x02, 0x01, 0x00, 0x80, 0x0A, + 75:Middlewares/USBMIDI/Src/usbd_midi.c **** + 76:Middlewares/USBMIDI/Src/usbd_midi.c **** // The Audio Interface Collection + 77:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x04, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, // Standard AC Interface Descriptor + 78:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x24, 0x01, 0x00, 0x01, 0x09, 0x00, 0x01, 0x01, // Class-specific AC Interface Descriptor + 79:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x04, 0x01, 0x00, 0x02, 0x01, 0x03, 0x00, 0x00, // MIDIStreaming Interface Descriptors + 80:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x07, 0x24, 0x01, 0x00, 0x01, 0x25 + 6+6+9+9, 0x00, // Class-Specific MS Interface Header Descr + 81:Middlewares/USBMIDI/Src/usbd_midi.c **** + 82:Middlewares/USBMIDI/Src/usbd_midi.c **** // MIDI IN JACKS + 83:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x06, 0x24, 0x02, 0x01, 0x01, 0x00,//MIDI-IN 1 (embedded) + 84:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x06, 0x24, 0x02, 0x02, 0x02, 0x00,//MIDI-IN 1 (external) + 85:Middlewares/USBMIDI/Src/usbd_midi.c **** + 86:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x06, 0x24, 0x02, 0x01, 0x11, 0x00,//MIDI-IN 2 (embedded) + 87:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x06, 0x24, 0x02, 0x02, 0x12, 0x00,//MIDI-IN 2 (external) + 88:Middlewares/USBMIDI/Src/usbd_midi.c **** + 89:Middlewares/USBMIDI/Src/usbd_midi.c **** // MIDI OUT JACKS + 90:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x24, 0x03, 0x01, 0x03, 0x01, 0x02, 0x01, 0x00,//MIDI-OUT 1 (embedded) + 91:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x24, 0x03, 0x02, 0x04, 0x01, 0x01, 0x01, 0x00,//MIDI-OUT 1 (external) + ARM GAS /tmp/ccDAqcJz.s page 3 + + + 92:Middlewares/USBMIDI/Src/usbd_midi.c **** + 93:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x24, 0x03, 0x01, 0x13, 0x01, 0x12, 0x01, 0x00,//MIDI-OUT 2 (embedded) + 94:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x24, 0x03, 0x02, 0x14, 0x01, 0x11, 0x01, 0x00,//MIDI-OUT 2 (external) + 95:Middlewares/USBMIDI/Src/usbd_midi.c **** + 96:Middlewares/USBMIDI/Src/usbd_midi.c **** // OUT endpoint descriptor + 97:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x05, MIDI_OUT_EP, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, + 98:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x06, 0x25, 0x01, 0x02, 0x01, 0x11, + 99:Middlewares/USBMIDI/Src/usbd_midi.c **** + 100:Middlewares/USBMIDI/Src/usbd_midi.c **** // IN endpoint descriptor + 101:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x09, 0x05, MIDI_IN_EP, 0x02, 0x40, 0x00, 0x00, 0x00, 0x00, + 102:Middlewares/USBMIDI/Src/usbd_midi.c **** 0x06, 0x25, 0x01, 0x02, 0x03, 0x13, + 103:Middlewares/USBMIDI/Src/usbd_midi.c **** }; + 104:Middlewares/USBMIDI/Src/usbd_midi.c **** + 105:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t USBD_MIDI_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx){ + 106:Middlewares/USBMIDI/Src/usbd_midi.c **** pInstance = pdev; + 107:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_OpenEP(pdev,MIDI_IN_EP,USBD_EP_TYPE_BULK,MIDI_DATA_IN_PACKET_SIZE); + 108:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_OpenEP(pdev,MIDI_OUT_EP,USBD_EP_TYPE_BULK,MIDI_DATA_OUT_PACKET_SIZE); + 109:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_PrepareReceive(pdev,MIDI_OUT_EP,(uint8_t*)(USB_Rx_Buffer),MIDI_DATA_OUT_PACKET_SIZE); + 110:Middlewares/USBMIDI/Src/usbd_midi.c **** return 0; + 111:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 112:Middlewares/USBMIDI/Src/usbd_midi.c **** + 113:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t USBD_MIDI_DeInit (USBD_HandleTypeDef *pdev, uint8_t cfgidx){ + 114:Middlewares/USBMIDI/Src/usbd_midi.c **** pInstance = NULL; + 115:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_CloseEP(pdev,MIDI_IN_EP); + 116:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_CloseEP(pdev,MIDI_OUT_EP); + 117:Middlewares/USBMIDI/Src/usbd_midi.c **** return 0; + 118:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 119:Middlewares/USBMIDI/Src/usbd_midi.c **** + 120:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t USBD_MIDI_DataIn (USBD_HandleTypeDef *pdev, uint8_t epnum){ + 25 .loc 1 120 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 0 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 @ link register save eliminated. + 30 .LVL0: + 121:Middlewares/USBMIDI/Src/usbd_midi.c **** + 122:Middlewares/USBMIDI/Src/usbd_midi.c **** if (USB_Tx_State == 1){ + 31 .loc 1 122 0 + 32 0000 044B ldr r3, .L4 + 33 0002 1B78 ldrb r3, [r3] + 34 0004 012B cmp r3, #1 + 35 0006 01D0 beq .L3 + 36 .L2: + 123:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_State = 0; + 124:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 125:Middlewares/USBMIDI/Src/usbd_midi.c **** return USBD_OK; + 126:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 37 .loc 1 126 0 + 38 0008 0020 movs r0, #0 + 39 .LVL1: + 40 @ sp needed + 41 000a 7047 bx lr + 42 .LVL2: + 43 .L3: + 123:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_State = 0; + 44 .loc 1 123 0 + 45 000c 014B ldr r3, .L4 + ARM GAS /tmp/ccDAqcJz.s page 4 + + + 46 000e 0022 movs r2, #0 + 47 0010 1A70 strb r2, [r3] + 48 0012 F9E7 b .L2 + 49 .L5: + 50 .align 2 + 51 .L4: + 52 0014 00000000 .word .LANCHOR0 + 53 .cfi_endproc + 54 .LFE45: + 56 .section .text.USBD_MIDI_GetCfgDesc,"ax",%progbits + 57 .align 1 + 58 .syntax unified + 59 .code 16 + 60 .thumb_func + 61 .fpu softvfp + 63 USBD_MIDI_GetCfgDesc: + 64 .LFB48: + 127:Middlewares/USBMIDI/Src/usbd_midi.c **** + 128:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t USBD_MIDI_DataOut (USBD_HandleTypeDef *pdev, uint8_t epnum) + 129:Middlewares/USBMIDI/Src/usbd_midi.c **** { + 130:Middlewares/USBMIDI/Src/usbd_midi.c **** uint16_t USB_Rx_Cnt; + 131:Middlewares/USBMIDI/Src/usbd_midi.c **** + 132:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_MIDI_ItfTypeDef *pmidi; + 133:Middlewares/USBMIDI/Src/usbd_midi.c **** pmidi = (USBD_MIDI_ItfTypeDef *)(pdev->pUserData); + 134:Middlewares/USBMIDI/Src/usbd_midi.c **** + 135:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Rx_Cnt = ((PCD_HandleTypeDef*)pdev->pData)->OUT_ep[epnum].xfer_count; + 136:Middlewares/USBMIDI/Src/usbd_midi.c **** + 137:Middlewares/USBMIDI/Src/usbd_midi.c **** pmidi->pIf_MidiRx((uint8_t *)&USB_Rx_Buffer, USB_Rx_Cnt); + 138:Middlewares/USBMIDI/Src/usbd_midi.c **** + 139:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_PrepareReceive(pdev,MIDI_OUT_EP,(uint8_t*)(USB_Rx_Buffer),MIDI_DATA_OUT_PACKET_SIZE); + 140:Middlewares/USBMIDI/Src/usbd_midi.c **** return USBD_OK; + 141:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 142:Middlewares/USBMIDI/Src/usbd_midi.c **** + 143:Middlewares/USBMIDI/Src/usbd_midi.c **** void USBD_MIDI_SendPacket (){ + 144:Middlewares/USBMIDI/Src/usbd_midi.c **** uint16_t USB_Tx_ptr; + 145:Middlewares/USBMIDI/Src/usbd_midi.c **** uint16_t USB_Tx_length; + 146:Middlewares/USBMIDI/Src/usbd_midi.c **** + 147:Middlewares/USBMIDI/Src/usbd_midi.c **** if(USB_Tx_State != 1){ + 148:Middlewares/USBMIDI/Src/usbd_midi.c **** if (APP_Rx_ptr_out == APP_RX_DATA_SIZE){ + 149:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_ptr_out = 0; + 150:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 151:Middlewares/USBMIDI/Src/usbd_midi.c **** + 152:Middlewares/USBMIDI/Src/usbd_midi.c **** if(APP_Rx_ptr_out == APP_Rx_ptr_in){ + 153:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_State = 0; + 154:Middlewares/USBMIDI/Src/usbd_midi.c **** return; + 155:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 156:Middlewares/USBMIDI/Src/usbd_midi.c **** + 157:Middlewares/USBMIDI/Src/usbd_midi.c **** if(APP_Rx_ptr_out > APP_Rx_ptr_in){ + 158:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_length = APP_RX_DATA_SIZE - APP_Rx_ptr_out; + 159:Middlewares/USBMIDI/Src/usbd_midi.c **** }else{ + 160:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_length = APP_Rx_ptr_in - APP_Rx_ptr_out; + 161:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 162:Middlewares/USBMIDI/Src/usbd_midi.c **** + 163:Middlewares/USBMIDI/Src/usbd_midi.c **** if (APP_Rx_length > MIDI_DATA_IN_PACKET_SIZE){ + 164:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_ptr = APP_Rx_ptr_out; + 165:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_length = MIDI_DATA_IN_PACKET_SIZE; + 166:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_ptr_out += MIDI_DATA_IN_PACKET_SIZE; + ARM GAS /tmp/ccDAqcJz.s page 5 + + + 167:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_length -= MIDI_DATA_IN_PACKET_SIZE; + 168:Middlewares/USBMIDI/Src/usbd_midi.c **** }else{ + 169:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_ptr = APP_Rx_ptr_out; + 170:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_length = APP_Rx_length; + 171:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_ptr_out += APP_Rx_length; + 172:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_length = 0; + 173:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 174:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_State = 1; + 175:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_Transmit (pInstance, MIDI_IN_EP,(uint8_t*)&APP_Rx_Buffer[USB_Tx_ptr],USB_Tx_length); + 176:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 177:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 178:Middlewares/USBMIDI/Src/usbd_midi.c **** + 179:Middlewares/USBMIDI/Src/usbd_midi.c **** static uint8_t *USBD_MIDI_GetCfgDesc (uint16_t *length){ + 65 .loc 1 179 0 + 66 .cfi_startproc + 67 @ args = 0, pretend = 0, frame = 0 + 68 @ frame_needed = 0, uses_anonymous_args = 0 + 69 @ link register save eliminated. + 70 .LVL3: + 180:Middlewares/USBMIDI/Src/usbd_midi.c **** *length = sizeof (USBD_MIDI_CfgDesc); + 71 .loc 1 180 0 + 72 0000 8523 movs r3, #133 + 73 0002 0380 strh r3, [r0] + 181:Middlewares/USBMIDI/Src/usbd_midi.c **** return USBD_MIDI_CfgDesc; + 182:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 74 .loc 1 182 0 + 75 0004 0048 ldr r0, .L7 + 76 .LVL4: + 77 @ sp needed + 78 0006 7047 bx lr + 79 .L8: + 80 .align 2 + 81 .L7: + 82 0008 00000000 .word USBD_MIDI_CfgDesc + 83 .cfi_endproc + 84 .LFE48: + 86 .section .text.USBD_MIDI_DataOut,"ax",%progbits + 87 .align 1 + 88 .syntax unified + 89 .code 16 + 90 .thumb_func + 91 .fpu softvfp + 93 USBD_MIDI_DataOut: + 94 .LFB46: + 129:Middlewares/USBMIDI/Src/usbd_midi.c **** uint16_t USB_Rx_Cnt; + 95 .loc 1 129 0 + 96 .cfi_startproc + 97 @ args = 0, pretend = 0, frame = 0 + 98 @ frame_needed = 0, uses_anonymous_args = 0 + 99 .LVL5: + 100 0000 70B5 push {r4, r5, r6, lr} + 101 .LCFI0: + 102 .cfi_def_cfa_offset 16 + 103 .cfi_offset 4, -16 + 104 .cfi_offset 5, -12 + 105 .cfi_offset 6, -8 + 106 .cfi_offset 14, -4 + ARM GAS /tmp/ccDAqcJz.s page 6 + + + 107 0002 0400 movs r4, r0 + 133:Middlewares/USBMIDI/Src/usbd_midi.c **** + 108 .loc 1 133 0 + 109 0004 8723 movs r3, #135 + 110 0006 9B00 lsls r3, r3, #2 + 111 0008 C258 ldr r2, [r0, r3] + 112 .LVL6: + 135:Middlewares/USBMIDI/Src/usbd_midi.c **** + 113 .loc 1 135 0 + 114 000a 0433 adds r3, r3, #4 + 115 000c C358 ldr r3, [r0, r3] + 116 000e 0A31 adds r1, r1, #10 + 117 .LVL7: + 118 0010 4901 lsls r1, r1, #5 + 119 0012 5918 adds r1, r3, r1 + 120 0014 8988 ldrh r1, [r1, #4] + 121 .LVL8: + 137:Middlewares/USBMIDI/Src/usbd_midi.c **** + 122 .loc 1 137 0 + 123 0016 1368 ldr r3, [r2] + 124 0018 054D ldr r5, .L10 + 125 001a 2800 movs r0, r5 + 126 .LVL9: + 127 001c 9847 blx r3 + 128 .LVL10: + 139:Middlewares/USBMIDI/Src/usbd_midi.c **** return USBD_OK; + 129 .loc 1 139 0 + 130 001e 4023 movs r3, #64 + 131 0020 2A00 movs r2, r5 + 132 0022 0121 movs r1, #1 + 133 0024 2000 movs r0, r4 + 134 0026 FFF7FEFF bl USBD_LL_PrepareReceive + 135 .LVL11: + 141:Middlewares/USBMIDI/Src/usbd_midi.c **** + 136 .loc 1 141 0 + 137 002a 0020 movs r0, #0 + 138 @ sp needed + 139 .LVL12: + 140 002c 70BD pop {r4, r5, r6, pc} + 141 .L11: + 142 002e C046 .align 2 + 143 .L10: + 144 0030 00000000 .word USB_Rx_Buffer + 145 .cfi_endproc + 146 .LFE46: + 148 .section .text.USBD_MIDI_DeInit,"ax",%progbits + 149 .align 1 + 150 .syntax unified + 151 .code 16 + 152 .thumb_func + 153 .fpu softvfp + 155 USBD_MIDI_DeInit: + 156 .LFB44: + 113:Middlewares/USBMIDI/Src/usbd_midi.c **** pInstance = NULL; + 157 .loc 1 113 0 + 158 .cfi_startproc + 159 @ args = 0, pretend = 0, frame = 0 + ARM GAS /tmp/ccDAqcJz.s page 7 + + + 160 @ frame_needed = 0, uses_anonymous_args = 0 + 161 .LVL13: + 162 0000 10B5 push {r4, lr} + 163 .LCFI1: + 164 .cfi_def_cfa_offset 8 + 165 .cfi_offset 4, -8 + 166 .cfi_offset 14, -4 + 167 0002 0400 movs r4, r0 + 114:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_CloseEP(pdev,MIDI_IN_EP); + 168 .loc 1 114 0 + 169 0004 054B ldr r3, .L13 + 170 0006 0022 movs r2, #0 + 171 0008 1A60 str r2, [r3] + 115:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_CloseEP(pdev,MIDI_OUT_EP); + 172 .loc 1 115 0 + 173 000a 8121 movs r1, #129 + 174 .LVL14: + 175 000c FFF7FEFF bl USBD_LL_CloseEP + 176 .LVL15: + 116:Middlewares/USBMIDI/Src/usbd_midi.c **** return 0; + 177 .loc 1 116 0 + 178 0010 0121 movs r1, #1 + 179 0012 2000 movs r0, r4 + 180 0014 FFF7FEFF bl USBD_LL_CloseEP + 181 .LVL16: + 118:Middlewares/USBMIDI/Src/usbd_midi.c **** + 182 .loc 1 118 0 + 183 0018 0020 movs r0, #0 + 184 @ sp needed + 185 .LVL17: + 186 001a 10BD pop {r4, pc} + 187 .L14: + 188 .align 2 + 189 .L13: + 190 001c 00000000 .word .LANCHOR1 + 191 .cfi_endproc + 192 .LFE44: + 194 .section .text.USBD_MIDI_Init,"ax",%progbits + 195 .align 1 + 196 .syntax unified + 197 .code 16 + 198 .thumb_func + 199 .fpu softvfp + 201 USBD_MIDI_Init: + 202 .LFB43: + 105:Middlewares/USBMIDI/Src/usbd_midi.c **** pInstance = pdev; + 203 .loc 1 105 0 + 204 .cfi_startproc + 205 @ args = 0, pretend = 0, frame = 0 + 206 @ frame_needed = 0, uses_anonymous_args = 0 + 207 .LVL18: + 208 0000 10B5 push {r4, lr} + 209 .LCFI2: + 210 .cfi_def_cfa_offset 8 + 211 .cfi_offset 4, -8 + 212 .cfi_offset 14, -4 + 213 0002 0400 movs r4, r0 + ARM GAS /tmp/ccDAqcJz.s page 8 + + + 106:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_OpenEP(pdev,MIDI_IN_EP,USBD_EP_TYPE_BULK,MIDI_DATA_IN_PACKET_SIZE); + 214 .loc 1 106 0 + 215 0004 0A4B ldr r3, .L16 + 216 0006 1860 str r0, [r3] + 107:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_OpenEP(pdev,MIDI_OUT_EP,USBD_EP_TYPE_BULK,MIDI_DATA_OUT_PACKET_SIZE); + 217 .loc 1 107 0 + 218 0008 4023 movs r3, #64 + 219 000a 0222 movs r2, #2 + 220 000c 8121 movs r1, #129 + 221 .LVL19: + 222 000e FFF7FEFF bl USBD_LL_OpenEP + 223 .LVL20: + 108:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_PrepareReceive(pdev,MIDI_OUT_EP,(uint8_t*)(USB_Rx_Buffer),MIDI_DATA_OUT_PACKET_SIZE); + 224 .loc 1 108 0 + 225 0012 4023 movs r3, #64 + 226 0014 0222 movs r2, #2 + 227 0016 0121 movs r1, #1 + 228 0018 2000 movs r0, r4 + 229 001a FFF7FEFF bl USBD_LL_OpenEP + 230 .LVL21: + 109:Middlewares/USBMIDI/Src/usbd_midi.c **** return 0; + 231 .loc 1 109 0 + 232 001e 4023 movs r3, #64 + 233 0020 044A ldr r2, .L16+4 + 234 0022 0121 movs r1, #1 + 235 0024 2000 movs r0, r4 + 236 0026 FFF7FEFF bl USBD_LL_PrepareReceive + 237 .LVL22: + 111:Middlewares/USBMIDI/Src/usbd_midi.c **** + 238 .loc 1 111 0 + 239 002a 0020 movs r0, #0 + 240 @ sp needed + 241 .LVL23: + 242 002c 10BD pop {r4, pc} + 243 .L17: + 244 002e C046 .align 2 + 245 .L16: + 246 0030 00000000 .word .LANCHOR1 + 247 0034 00000000 .word USB_Rx_Buffer + 248 .cfi_endproc + 249 .LFE43: + 251 .section .text.USBD_MIDI_SendPacket,"ax",%progbits + 252 .align 1 + 253 .global USBD_MIDI_SendPacket + 254 .syntax unified + 255 .code 16 + 256 .thumb_func + 257 .fpu softvfp + 259 USBD_MIDI_SendPacket: + 260 .LFB47: + 143:Middlewares/USBMIDI/Src/usbd_midi.c **** uint16_t USB_Tx_ptr; + 261 .loc 1 143 0 + 262 .cfi_startproc + 263 @ args = 0, pretend = 0, frame = 0 + 264 @ frame_needed = 0, uses_anonymous_args = 0 + 265 0000 10B5 push {r4, lr} + 266 .LCFI3: + ARM GAS /tmp/ccDAqcJz.s page 9 + + + 267 .cfi_def_cfa_offset 8 + 268 .cfi_offset 4, -8 + 269 .cfi_offset 14, -4 + 147:Middlewares/USBMIDI/Src/usbd_midi.c **** if (APP_Rx_ptr_out == APP_RX_DATA_SIZE){ + 270 .loc 1 147 0 + 271 0002 214B ldr r3, .L28 + 272 0004 1B78 ldrb r3, [r3] + 273 0006 012B cmp r3, #1 + 274 0008 28D0 beq .L18 + 148:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_ptr_out = 0; + 275 .loc 1 148 0 + 276 000a 204B ldr r3, .L28+4 + 277 000c 1A68 ldr r2, [r3] + 278 000e 8023 movs r3, #128 + 279 0010 5B00 lsls r3, r3, #1 + 280 0012 9A42 cmp r2, r3 + 281 0014 23D0 beq .L26 + 282 .L20: + 152:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_State = 0; + 283 .loc 1 152 0 + 284 0016 1D4B ldr r3, .L28+4 + 285 0018 1968 ldr r1, [r3] + 286 001a 1D4B ldr r3, .L28+8 + 287 001c 1B68 ldr r3, [r3] + 288 001e 9942 cmp r1, r3 + 289 0020 21D0 beq .L27 + 157:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_length = APP_RX_DATA_SIZE - APP_Rx_ptr_out; + 290 .loc 1 157 0 + 291 0022 24D9 bls .L22 + 158:Middlewares/USBMIDI/Src/usbd_midi.c **** }else{ + 292 .loc 1 158 0 + 293 0024 8023 movs r3, #128 + 294 0026 5B00 lsls r3, r3, #1 + 295 0028 5B1A subs r3, r3, r1 + 296 002a 1A4A ldr r2, .L28+12 + 297 002c 1360 str r3, [r2] + 298 .L23: + 163:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_ptr = APP_Rx_ptr_out; + 299 .loc 1 163 0 + 300 002e 194B ldr r3, .L28+12 + 301 0030 1868 ldr r0, [r3] + 302 0032 4028 cmp r0, #64 + 303 0034 1FD9 bls .L24 + 164:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_length = MIDI_DATA_IN_PACKET_SIZE; + 304 .loc 1 164 0 + 305 0036 8AB2 uxth r2, r1 + 306 .LVL24: + 166:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_length -= MIDI_DATA_IN_PACKET_SIZE; + 307 .loc 1 166 0 + 308 0038 0B00 movs r3, r1 + 309 003a 4033 adds r3, r3, #64 + 310 003c 1349 ldr r1, .L28+4 + 311 003e 0B60 str r3, [r1] + 167:Middlewares/USBMIDI/Src/usbd_midi.c **** }else{ + 312 .loc 1 167 0 + 313 0040 4038 subs r0, r0, #64 + 314 0042 144B ldr r3, .L28+12 + ARM GAS /tmp/ccDAqcJz.s page 10 + + + 315 0044 1860 str r0, [r3] + 165:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_ptr_out += MIDI_DATA_IN_PACKET_SIZE; + 316 .loc 1 165 0 + 317 0046 4023 movs r3, #64 + 318 .LVL25: + 319 .L25: + 174:Middlewares/USBMIDI/Src/usbd_midi.c **** USBD_LL_Transmit (pInstance, MIDI_IN_EP,(uint8_t*)&APP_Rx_Buffer[USB_Tx_ptr],USB_Tx_length); + 320 .loc 1 174 0 + 321 0048 0F49 ldr r1, .L28 + 322 004a 0120 movs r0, #1 + 323 004c 0870 strb r0, [r1] + 175:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 324 .loc 1 175 0 + 325 004e 1249 ldr r1, .L28+16 + 326 0050 5218 adds r2, r2, r1 + 327 .LVL26: + 328 0052 1249 ldr r1, .L28+20 + 329 0054 0868 ldr r0, [r1] + 330 0056 8121 movs r1, #129 + 331 0058 FFF7FEFF bl USBD_LL_Transmit + 332 .LVL27: + 333 .L18: + 177:Middlewares/USBMIDI/Src/usbd_midi.c **** + 334 .loc 1 177 0 + 335 @ sp needed + 336 005c 10BD pop {r4, pc} + 337 .L26: + 149:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 338 .loc 1 149 0 + 339 005e 0B4B ldr r3, .L28+4 + 340 0060 0022 movs r2, #0 + 341 0062 1A60 str r2, [r3] + 342 0064 D7E7 b .L20 + 343 .L27: + 153:Middlewares/USBMIDI/Src/usbd_midi.c **** return; + 344 .loc 1 153 0 + 345 0066 084B ldr r3, .L28 + 346 0068 0022 movs r2, #0 + 347 006a 1A70 strb r2, [r3] + 154:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 348 .loc 1 154 0 + 349 006c F6E7 b .L18 + 350 .L22: + 160:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 351 .loc 1 160 0 + 352 006e 5B1A subs r3, r3, r1 + 353 0070 084A ldr r2, .L28+12 + 354 0072 1360 str r3, [r2] + 355 0074 DBE7 b .L23 + 356 .L24: + 169:Middlewares/USBMIDI/Src/usbd_midi.c **** USB_Tx_length = APP_Rx_length; + 357 .loc 1 169 0 + 358 0076 8AB2 uxth r2, r1 + 359 .LVL28: + 170:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_ptr_out += APP_Rx_length; + 360 .loc 1 170 0 + 361 0078 83B2 uxth r3, r0 + ARM GAS /tmp/ccDAqcJz.s page 11 + + + 362 .LVL29: + 171:Middlewares/USBMIDI/Src/usbd_midi.c **** APP_Rx_length = 0; + 363 .loc 1 171 0 + 364 007a 0918 adds r1, r1, r0 + 365 007c 0348 ldr r0, .L28+4 + 366 007e 0160 str r1, [r0] + 172:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 367 .loc 1 172 0 + 368 0080 0449 ldr r1, .L28+12 + 369 0082 0020 movs r0, #0 + 370 0084 0860 str r0, [r1] + 371 0086 DFE7 b .L25 + 372 .L29: + 373 .align 2 + 374 .L28: + 375 0088 00000000 .word .LANCHOR0 + 376 008c 00000000 .word .LANCHOR2 + 377 0090 00000000 .word .LANCHOR3 + 378 0094 00000000 .word .LANCHOR4 + 379 0098 00000000 .word APP_Rx_Buffer + 380 009c 00000000 .word .LANCHOR1 + 381 .cfi_endproc + 382 .LFE47: + 384 .section .text.USBD_MIDI_RegisterInterface,"ax",%progbits + 385 .align 1 + 386 .global USBD_MIDI_RegisterInterface + 387 .syntax unified + 388 .code 16 + 389 .thumb_func + 390 .fpu softvfp + 392 USBD_MIDI_RegisterInterface: + 393 .LFB49: + 183:Middlewares/USBMIDI/Src/usbd_midi.c **** + 184:Middlewares/USBMIDI/Src/usbd_midi.c **** //uint8_t *USBD_MIDI_GetDeviceQualifierDescriptor (uint16_t *length){ + 185:Middlewares/USBMIDI/Src/usbd_midi.c **** // *length = sizeof (USBD_MIDI_DeviceQualifierDesc); + 186:Middlewares/USBMIDI/Src/usbd_midi.c **** // return USBD_MIDI_DeviceQualifierDesc; + 187:Middlewares/USBMIDI/Src/usbd_midi.c **** //} + 188:Middlewares/USBMIDI/Src/usbd_midi.c **** + 189:Middlewares/USBMIDI/Src/usbd_midi.c **** uint8_t USBD_MIDI_RegisterInterface(USBD_HandleTypeDef *pdev, USBD_MIDI_ItfTypeDef *fops) + 190:Middlewares/USBMIDI/Src/usbd_midi.c **** { + 394 .loc 1 190 0 + 395 .cfi_startproc + 396 @ args = 0, pretend = 0, frame = 0 + 397 @ frame_needed = 0, uses_anonymous_args = 0 + 398 @ link register save eliminated. + 399 .LVL30: + 191:Middlewares/USBMIDI/Src/usbd_midi.c **** uint8_t ret = USBD_FAIL; + 192:Middlewares/USBMIDI/Src/usbd_midi.c **** + 193:Middlewares/USBMIDI/Src/usbd_midi.c **** if(fops != NULL){ + 400 .loc 1 193 0 + 401 0000 0029 cmp r1, #0 + 402 0002 04D0 beq .L32 + 194:Middlewares/USBMIDI/Src/usbd_midi.c **** pdev->pUserData= fops; + 403 .loc 1 194 0 + 404 0004 8723 movs r3, #135 + 405 0006 9B00 lsls r3, r3, #2 + 406 0008 C150 str r1, [r0, r3] + ARM GAS /tmp/ccDAqcJz.s page 12 + + + 407 .LVL31: + 195:Middlewares/USBMIDI/Src/usbd_midi.c **** ret = USBD_OK; + 408 .loc 1 195 0 + 409 000a 0020 movs r0, #0 + 410 .LVL32: + 411 .L31: + 196:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 197:Middlewares/USBMIDI/Src/usbd_midi.c **** + 198:Middlewares/USBMIDI/Src/usbd_midi.c **** return ret; + 199:Middlewares/USBMIDI/Src/usbd_midi.c **** } + 412 .loc 1 199 0 + 413 @ sp needed + 414 000c 7047 bx lr + 415 .LVL33: + 416 .L32: + 191:Middlewares/USBMIDI/Src/usbd_midi.c **** + 417 .loc 1 191 0 + 418 000e 0220 movs r0, #2 + 419 .LVL34: + 420 0010 FCE7 b .L31 + 421 .cfi_endproc + 422 .LFE49: + 424 .global USBD_MIDI_CfgDesc + 425 .global USBD_MIDI + 426 .comm APP_Rx_Buffer,256,4 + 427 .comm USB_Rx_Buffer,64,4 + 428 .global USB_Tx_State + 429 .global APP_Rx_length + 430 .global APP_Rx_ptr_out + 431 .global APP_Rx_ptr_in + 432 .global pInstance + 433 .section .bss.APP_Rx_length,"aw",%nobits + 434 .align 2 + 435 .set .LANCHOR4,. + 0 + 438 APP_Rx_length: + 439 0000 00000000 .space 4 + 440 .section .bss.APP_Rx_ptr_in,"aw",%nobits + 441 .align 2 + 442 .set .LANCHOR3,. + 0 + 445 APP_Rx_ptr_in: + 446 0000 00000000 .space 4 + 447 .section .bss.APP_Rx_ptr_out,"aw",%nobits + 448 .align 2 + 449 .set .LANCHOR2,. + 0 + 452 APP_Rx_ptr_out: + 453 0000 00000000 .space 4 + 454 .section .bss.USB_Tx_State,"aw",%nobits + 455 .set .LANCHOR0,. + 0 + 458 USB_Tx_State: + 459 0000 00 .space 1 + 460 .section .bss.pInstance,"aw",%nobits + 461 .align 2 + 462 .set .LANCHOR1,. + 0 + 465 pInstance: + 466 0000 00000000 .space 4 + 467 .section .data.USBD_MIDI,"aw",%progbits + 468 .align 2 + ARM GAS /tmp/ccDAqcJz.s page 13 + + + 471 USBD_MIDI: + 472 0000 00000000 .word USBD_MIDI_Init + 473 0004 00000000 .word USBD_MIDI_DeInit + 474 0008 00000000 .word 0 + 475 000c 00000000 .word 0 + 476 0010 00000000 .word 0 + 477 0014 00000000 .word USBD_MIDI_DataIn + 478 0018 00000000 .word USBD_MIDI_DataOut + 479 001c 00000000 .word 0 + 480 0020 00000000 .word 0 + 481 0024 00000000 .word 0 + 482 0028 00000000 .word 0 + 483 002c 00000000 .word USBD_MIDI_GetCfgDesc + 484 0030 00000000 .word 0 + 485 0034 00000000 .word 0 + 486 .section .data.USBD_MIDI_CfgDesc,"aw",%progbits + 487 .align 2 + 490 USBD_MIDI_CfgDesc: + 491 0000 09 .byte 9 + 492 0001 02 .byte 2 + 493 0002 85 .byte -123 + 494 0003 00 .byte 0 + 495 0004 02 .byte 2 + 496 0005 01 .byte 1 + 497 0006 00 .byte 0 + 498 0007 80 .byte -128 + 499 0008 0A .byte 10 + 500 0009 09 .byte 9 + 501 000a 04 .byte 4 + 502 000b 00 .byte 0 + 503 000c 00 .byte 0 + 504 000d 00 .byte 0 + 505 000e 01 .byte 1 + 506 000f 01 .byte 1 + 507 0010 00 .byte 0 + 508 0011 00 .byte 0 + 509 0012 09 .byte 9 + 510 0013 24 .byte 36 + 511 0014 01 .byte 1 + 512 0015 00 .byte 0 + 513 0016 01 .byte 1 + 514 0017 09 .byte 9 + 515 0018 00 .byte 0 + 516 0019 01 .byte 1 + 517 001a 01 .byte 1 + 518 001b 09 .byte 9 + 519 001c 04 .byte 4 + 520 001d 01 .byte 1 + 521 001e 00 .byte 0 + 522 001f 02 .byte 2 + 523 0020 01 .byte 1 + 524 0021 03 .byte 3 + 525 0022 00 .byte 0 + 526 0023 00 .byte 0 + 527 0024 07 .byte 7 + 528 0025 24 .byte 36 + 529 0026 01 .byte 1 + ARM GAS /tmp/ccDAqcJz.s page 14 + + + 530 0027 00 .byte 0 + 531 0028 01 .byte 1 + 532 0029 43 .byte 67 + 533 002a 00 .byte 0 + 534 002b 06 .byte 6 + 535 002c 24 .byte 36 + 536 002d 02 .byte 2 + 537 002e 01 .byte 1 + 538 002f 01 .byte 1 + 539 0030 00 .byte 0 + 540 0031 06 .byte 6 + 541 0032 24 .byte 36 + 542 0033 02 .byte 2 + 543 0034 02 .byte 2 + 544 0035 02 .byte 2 + 545 0036 00 .byte 0 + 546 0037 06 .byte 6 + 547 0038 24 .byte 36 + 548 0039 02 .byte 2 + 549 003a 01 .byte 1 + 550 003b 11 .byte 17 + 551 003c 00 .byte 0 + 552 003d 06 .byte 6 + 553 003e 24 .byte 36 + 554 003f 02 .byte 2 + 555 0040 02 .byte 2 + 556 0041 12 .byte 18 + 557 0042 00 .byte 0 + 558 0043 09 .byte 9 + 559 0044 24 .byte 36 + 560 0045 03 .byte 3 + 561 0046 01 .byte 1 + 562 0047 03 .byte 3 + 563 0048 01 .byte 1 + 564 0049 02 .byte 2 + 565 004a 01 .byte 1 + 566 004b 00 .byte 0 + 567 004c 09 .byte 9 + 568 004d 24 .byte 36 + 569 004e 03 .byte 3 + 570 004f 02 .byte 2 + 571 0050 04 .byte 4 + 572 0051 01 .byte 1 + 573 0052 01 .byte 1 + 574 0053 01 .byte 1 + 575 0054 00 .byte 0 + 576 0055 09 .byte 9 + 577 0056 24 .byte 36 + 578 0057 03 .byte 3 + 579 0058 01 .byte 1 + 580 0059 13 .byte 19 + 581 005a 01 .byte 1 + 582 005b 12 .byte 18 + 583 005c 01 .byte 1 + 584 005d 00 .byte 0 + 585 005e 09 .byte 9 + 586 005f 24 .byte 36 + ARM GAS /tmp/ccDAqcJz.s page 15 + + + 587 0060 03 .byte 3 + 588 0061 02 .byte 2 + 589 0062 14 .byte 20 + 590 0063 01 .byte 1 + 591 0064 11 .byte 17 + 592 0065 01 .byte 1 + 593 0066 00 .byte 0 + 594 0067 09 .byte 9 + 595 0068 05 .byte 5 + 596 0069 01 .byte 1 + 597 006a 02 .byte 2 + 598 006b 40 .byte 64 + 599 006c 00 .byte 0 + 600 006d 00 .byte 0 + 601 006e 00 .byte 0 + 602 006f 00 .byte 0 + 603 0070 06 .byte 6 + 604 0071 25 .byte 37 + 605 0072 01 .byte 1 + 606 0073 02 .byte 2 + 607 0074 01 .byte 1 + 608 0075 11 .byte 17 + 609 0076 09 .byte 9 + 610 0077 05 .byte 5 + 611 0078 81 .byte -127 + 612 0079 02 .byte 2 + 613 007a 40 .byte 64 + 614 007b 00 .byte 0 + 615 007c 00 .byte 0 + 616 007d 00 .byte 0 + 617 007e 00 .byte 0 + 618 007f 06 .byte 6 + 619 0080 25 .byte 37 + 620 0081 01 .byte 1 + 621 0082 02 .byte 2 + 622 0083 03 .byte 3 + 623 0084 13 .byte 19 + 624 .text + 625 .Letext0: + 626 .file 2 "/usr/include/newlib/machine/_default_types.h" + 627 .file 3 "/usr/include/newlib/sys/lock.h" + 628 .file 4 "/usr/include/newlib/sys/_types.h" + 629 .file 5 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 630 .file 6 "/usr/include/newlib/sys/reent.h" + 631 .file 7 "/usr/include/newlib/sys/_stdint.h" + 632 .file 8 "/usr/include/newlib/stdlib.h" + 633 .file 9 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 634 .file 10 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 635 .file 11 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 636 .file 12 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h" + 637 .file 13 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h" + 638 .file 14 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 639 .file 15 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h" + 640 .file 16 "Middlewares/USBMIDI/Inc/usbd_midi.h" + 641 .file 17 "Inc/usbd_desc.h" + 642 .file 18 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h" + ARM GAS /tmp/ccDAqcJz.s page 16 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 usbd_midi.c + /tmp/ccDAqcJz.s:16 .text.USBD_MIDI_DataIn:0000000000000000 $t + /tmp/ccDAqcJz.s:22 .text.USBD_MIDI_DataIn:0000000000000000 USBD_MIDI_DataIn + /tmp/ccDAqcJz.s:52 .text.USBD_MIDI_DataIn:0000000000000014 $d + /tmp/ccDAqcJz.s:57 .text.USBD_MIDI_GetCfgDesc:0000000000000000 $t + /tmp/ccDAqcJz.s:63 .text.USBD_MIDI_GetCfgDesc:0000000000000000 USBD_MIDI_GetCfgDesc + /tmp/ccDAqcJz.s:82 .text.USBD_MIDI_GetCfgDesc:0000000000000008 $d + /tmp/ccDAqcJz.s:490 .data.USBD_MIDI_CfgDesc:0000000000000000 USBD_MIDI_CfgDesc + /tmp/ccDAqcJz.s:87 .text.USBD_MIDI_DataOut:0000000000000000 $t + /tmp/ccDAqcJz.s:93 .text.USBD_MIDI_DataOut:0000000000000000 USBD_MIDI_DataOut + /tmp/ccDAqcJz.s:144 .text.USBD_MIDI_DataOut:0000000000000030 $d + *COM*:0000000000000040 USB_Rx_Buffer + /tmp/ccDAqcJz.s:149 .text.USBD_MIDI_DeInit:0000000000000000 $t + /tmp/ccDAqcJz.s:155 .text.USBD_MIDI_DeInit:0000000000000000 USBD_MIDI_DeInit + /tmp/ccDAqcJz.s:190 .text.USBD_MIDI_DeInit:000000000000001c $d + /tmp/ccDAqcJz.s:195 .text.USBD_MIDI_Init:0000000000000000 $t + /tmp/ccDAqcJz.s:201 .text.USBD_MIDI_Init:0000000000000000 USBD_MIDI_Init + /tmp/ccDAqcJz.s:246 .text.USBD_MIDI_Init:0000000000000030 $d + /tmp/ccDAqcJz.s:252 .text.USBD_MIDI_SendPacket:0000000000000000 $t + /tmp/ccDAqcJz.s:259 .text.USBD_MIDI_SendPacket:0000000000000000 USBD_MIDI_SendPacket + /tmp/ccDAqcJz.s:375 .text.USBD_MIDI_SendPacket:0000000000000088 $d + *COM*:0000000000000100 APP_Rx_Buffer + /tmp/ccDAqcJz.s:385 .text.USBD_MIDI_RegisterInterface:0000000000000000 $t + /tmp/ccDAqcJz.s:392 .text.USBD_MIDI_RegisterInterface:0000000000000000 USBD_MIDI_RegisterInterface + /tmp/ccDAqcJz.s:471 .data.USBD_MIDI:0000000000000000 USBD_MIDI + /tmp/ccDAqcJz.s:458 .bss.USB_Tx_State:0000000000000000 USB_Tx_State + /tmp/ccDAqcJz.s:438 .bss.APP_Rx_length:0000000000000000 APP_Rx_length + /tmp/ccDAqcJz.s:452 .bss.APP_Rx_ptr_out:0000000000000000 APP_Rx_ptr_out + /tmp/ccDAqcJz.s:445 .bss.APP_Rx_ptr_in:0000000000000000 APP_Rx_ptr_in + /tmp/ccDAqcJz.s:465 .bss.pInstance:0000000000000000 pInstance + /tmp/ccDAqcJz.s:434 .bss.APP_Rx_length:0000000000000000 $d + /tmp/ccDAqcJz.s:441 .bss.APP_Rx_ptr_in:0000000000000000 $d + /tmp/ccDAqcJz.s:448 .bss.APP_Rx_ptr_out:0000000000000000 $d + /tmp/ccDAqcJz.s:459 .bss.USB_Tx_State:0000000000000000 $d + /tmp/ccDAqcJz.s:461 .bss.pInstance:0000000000000000 $d + /tmp/ccDAqcJz.s:468 .data.USBD_MIDI:0000000000000000 $d + /tmp/ccDAqcJz.s:487 .data.USBD_MIDI_CfgDesc:0000000000000000 $d + +UNDEFINED SYMBOLS +USBD_LL_PrepareReceive +USBD_LL_CloseEP +USBD_LL_OpenEP +USBD_LL_Transmit diff --git a/fw/midi-dials/build/usbd_midi.o b/fw/midi-dials/build/usbd_midi.o Binary files differnew file mode 100644 index 0000000..67ebd65 --- /dev/null +++ b/fw/midi-dials/build/usbd_midi.o diff --git a/fw/midi-dials/build/usbd_midi_if.d b/fw/midi-dials/build/usbd_midi_if.d new file mode 100644 index 0000000..c1c6b16 --- /dev/null +++ b/fw/midi-dials/build/usbd_midi_if.d @@ -0,0 +1,118 @@ +build/usbd_midi_if.o: Src/usbd_midi_if.c Inc/usbd_midi_if.h \ + Middlewares/USBMIDI/Inc/usbd_midi.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Inc/usbd_conf.h Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h \ + Drivers/CMSIS/Include/core_cm0.h Drivers/CMSIS/Include/cmsis_version.h \ + Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \ + Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h \ + Inc/stm32f0xx_hal_conf.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h \ + Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h \ + Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h \ + Inc/usbd_desc.h Inc/curelib_inc/curemisc.h Inc/curelib_inc/curebuffer.h + +Inc/usbd_midi_if.h: + +Middlewares/USBMIDI/Inc/usbd_midi.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Inc/usbd_conf.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h: + +Drivers/CMSIS/Include/core_cm0.h: + +Drivers/CMSIS/Include/cmsis_version.h: + +Drivers/CMSIS/Include/cmsis_compiler.h: + +Drivers/CMSIS/Include/cmsis_gcc.h: + +Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h: + +Inc/stm32f0xx_hal_conf.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_exti.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_cortex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_flash_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_i2c_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd_ex.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr.h: + +Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_core.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ioreq.h: + +Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_ctlreq.h: + +Inc/usbd_desc.h: + +Inc/curelib_inc/curemisc.h: + +Inc/curelib_inc/curebuffer.h: diff --git a/fw/midi-dials/build/usbd_midi_if.lst b/fw/midi-dials/build/usbd_midi_if.lst new file mode 100644 index 0000000..1fe0750 --- /dev/null +++ b/fw/midi-dials/build/usbd_midi_if.lst @@ -0,0 +1,2430 @@ +ARM GAS /tmp/ccjHqQBe.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "usbd_midi_if.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.MIDI_DataTx,"ax",%progbits + 16 .align 1 + 17 .syntax unified + 18 .code 16 + 19 .thumb_func + 20 .fpu softvfp + 22 MIDI_DataTx: + 23 .LFB52: + 24 .file 1 "Src/usbd_midi_if.c" + 1:Src/usbd_midi_if.c **** /** + 2:Src/usbd_midi_if.c **** ****************************************************************************** + 3:Src/usbd_midi_if.c **** * @file : usbd_midi_if.c + 4:Src/usbd_midi_if.c **** * @brief : + 5:Src/usbd_midi_if.c **** ****************************************************************************** + 6:Src/usbd_midi_if.c **** + 7:Src/usbd_midi_if.c **** (CC at)2016 by D.F.Mac. @TripArts Music + 8:Src/usbd_midi_if.c **** + 9:Src/usbd_midi_if.c **** ****************************************************************************** + 10:Src/usbd_midi_if.c **** + 11:Src/usbd_midi_if.c **** Modified by keshikan (www.keshikan.net) 2018 + 12:Src/usbd_midi_if.c **** The license is (CC BY 4.0), and takes over from original usbd_midi_if.h/c. + 13:Src/usbd_midi_if.c **** + 14:Src/usbd_midi_if.c **** See also original source code page. + 15:Src/usbd_midi_if.c **** https://github.com/mimuz/mimuz-tuch/blob/master/STM32/ + 16:Src/usbd_midi_if.c **** + 17:Src/usbd_midi_if.c **** ****************************************************************************** + 18:Src/usbd_midi_if.c **** */ + 19:Src/usbd_midi_if.c **** + 20:Src/usbd_midi_if.c **** /* Includes ------------------------------------------------------------------*/ + 21:Src/usbd_midi_if.c **** #include "usbd_midi_if.h" + 22:Src/usbd_midi_if.c **** #include "stm32f0xx_hal.h" + 23:Src/usbd_midi_if.c **** + 24:Src/usbd_midi_if.c **** + 25:Src/usbd_midi_if.c **** // basic midi rx/tx functions + 26:Src/usbd_midi_if.c **** static uint16_t MIDI_DataRx(uint8_t *msg, uint16_t length); + 27:Src/usbd_midi_if.c **** static uint16_t MIDI_DataTx(uint8_t *msg, uint16_t length); + 28:Src/usbd_midi_if.c **** + 29:Src/usbd_midi_if.c **** // for Cure Series + 30:Src/usbd_midi_if.c **** #define MIDI_BUFFER_SIZ (512)//FIFO buffer byte size for midi message buffer + 31:Src/usbd_midi_if.c **** + 32:Src/usbd_midi_if.c **** RingBufferU8 rbuf_usb_rx[MIDI_OUT_JACK_NUM]; //for input from USB + 33:Src/usbd_midi_if.c **** RingBufferU8 rbuf_jack_rx[MIDI_IN_JACK_NUM]; //for input from MIDI-IN jack + 34:Src/usbd_midi_if.c **** + ARM GAS /tmp/ccjHqQBe.s page 2 + + + 35:Src/usbd_midi_if.c **** //for receiving midi data from jack + 36:Src/usbd_midi_if.c **** MidiAnalysisStatus analyzed_status[MIDI_IN_JACK_NUM]; + 37:Src/usbd_midi_if.c **** MIDIEvent midi_event[MIDI_IN_JACK_NUM]; //received midi data + 38:Src/usbd_midi_if.c **** + 39:Src/usbd_midi_if.c **** uint8_t rx_midi_msg[MIDI_IN_JACK_NUM]; + 40:Src/usbd_midi_if.c **** + 41:Src/usbd_midi_if.c **** + 42:Src/usbd_midi_if.c **** FUNC_STATUS midiInit() + 43:Src/usbd_midi_if.c **** { + 44:Src/usbd_midi_if.c **** uint32_t i,j; + 45:Src/usbd_midi_if.c **** + 46:Src/usbd_midi_if.c **** for(i=0; i<MIDI_OUT_JACK_NUM; i++){ + 47:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Init(&rbuf_usb_rx[i], MIDI_BUFFER_SIZ)) + 48:Src/usbd_midi_if.c **** { + 49:Src/usbd_midi_if.c **** return FUNC_ERROR; + 50:Src/usbd_midi_if.c **** } + 51:Src/usbd_midi_if.c **** } + 52:Src/usbd_midi_if.c **** + 53:Src/usbd_midi_if.c **** for(i=0; i<MIDI_IN_JACK_NUM; i++){ + 54:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Init(&rbuf_jack_rx[i], MIDI_BUFFER_SIZ)) + 55:Src/usbd_midi_if.c **** { + 56:Src/usbd_midi_if.c **** return FUNC_ERROR; + 57:Src/usbd_midi_if.c **** } + 58:Src/usbd_midi_if.c **** } + 59:Src/usbd_midi_if.c **** + 60:Src/usbd_midi_if.c **** //Init RX + 61:Src/usbd_midi_if.c **** for(i=0; i<MIDI_IN_JACK_NUM; i++){ + 62:Src/usbd_midi_if.c **** + 63:Src/usbd_midi_if.c **** rx_midi_msg[i] = 0x00; + 64:Src/usbd_midi_if.c **** analyzed_status[i].data_idx = 0; + 65:Src/usbd_midi_if.c **** midi_event[i].length = 0; + 66:Src/usbd_midi_if.c **** + 67:Src/usbd_midi_if.c **** for(j=0; j<MIDI_SENDDATA_MAX; j++){ + 68:Src/usbd_midi_if.c **** midi_event[i].midi_byte[j] = 0x00; + 69:Src/usbd_midi_if.c **** } + 70:Src/usbd_midi_if.c **** } + 71:Src/usbd_midi_if.c **** + 72:Src/usbd_midi_if.c **** return FUNC_SUCCESS; + 73:Src/usbd_midi_if.c **** } + 74:Src/usbd_midi_if.c **** + 75:Src/usbd_midi_if.c **** FUNC_STATUS midiGetFromUsbRx(uint8_t cable_num, uint8_t* dat) + 76:Src/usbd_midi_if.c **** { + 77:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Dequeue(&rbuf_usb_rx[cable_num], dat)) + 78:Src/usbd_midi_if.c **** { + 79:Src/usbd_midi_if.c **** return FUNC_ERROR; + 80:Src/usbd_midi_if.c **** } + 81:Src/usbd_midi_if.c **** + 82:Src/usbd_midi_if.c **** return FUNC_SUCCESS; + 83:Src/usbd_midi_if.c **** } + 84:Src/usbd_midi_if.c **** + 85:Src/usbd_midi_if.c **** FUNC_STATUS midiGetFromJackRx(uint8_t cable_num) + 86:Src/usbd_midi_if.c **** { + 87:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Dequeue(&rbuf_jack_rx[cable_num], &rx_midi_msg[cable_num])) + 88:Src/usbd_midi_if.c **** { + 89:Src/usbd_midi_if.c **** return FUNC_ERROR; + 90:Src/usbd_midi_if.c **** } + 91:Src/usbd_midi_if.c **** + ARM GAS /tmp/ccjHqQBe.s page 3 + + + 92:Src/usbd_midi_if.c **** return FUNC_SUCCESS; + 93:Src/usbd_midi_if.c **** } + 94:Src/usbd_midi_if.c **** + 95:Src/usbd_midi_if.c **** FUNC_STATUS midiSetFromJackRx(uint8_t cable_num, uint8_t* dat) + 96:Src/usbd_midi_if.c **** { + 97:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Enqueue(&rbuf_jack_rx[cable_num], dat)) + 98:Src/usbd_midi_if.c **** { + 99:Src/usbd_midi_if.c **** return FUNC_ERROR; + 100:Src/usbd_midi_if.c **** } + 101:Src/usbd_midi_if.c **** + 102:Src/usbd_midi_if.c **** return FUNC_SUCCESS; + 103:Src/usbd_midi_if.c **** } + 104:Src/usbd_midi_if.c **** + 105:Src/usbd_midi_if.c **** + 106:Src/usbd_midi_if.c **** bool isUsbRxBufEmpty(uint8_t cable_num) + 107:Src/usbd_midi_if.c **** { + 108:Src/usbd_midi_if.c **** if( 0 != _cureRingBufferU8GetUsedSize(&rbuf_usb_rx[cable_num]) ){ + 109:Src/usbd_midi_if.c **** return false; + 110:Src/usbd_midi_if.c **** } + 111:Src/usbd_midi_if.c **** + 112:Src/usbd_midi_if.c **** return true; + 113:Src/usbd_midi_if.c **** } + 114:Src/usbd_midi_if.c **** + 115:Src/usbd_midi_if.c **** bool isJackRxBufEmpty(uint8_t cable_num) + 116:Src/usbd_midi_if.c **** { + 117:Src/usbd_midi_if.c **** if( 0 != _cureRingBufferU8GetUsedSize(&rbuf_jack_rx[cable_num]) ){ + 118:Src/usbd_midi_if.c **** return false; + 119:Src/usbd_midi_if.c **** } + 120:Src/usbd_midi_if.c **** + 121:Src/usbd_midi_if.c **** return true; + 122:Src/usbd_midi_if.c **** } + 123:Src/usbd_midi_if.c **** + 124:Src/usbd_midi_if.c **** bool isRxBufEmpty() + 125:Src/usbd_midi_if.c **** { + 126:Src/usbd_midi_if.c **** uint32_t i; + 127:Src/usbd_midi_if.c **** + 128:Src/usbd_midi_if.c **** for(i=0; i<MIDI_OUT_JACK_NUM; i++){ + 129:Src/usbd_midi_if.c **** if(0 != _cureRingBufferU8GetUsedSize(&rbuf_usb_rx[i])) + 130:Src/usbd_midi_if.c **** { + 131:Src/usbd_midi_if.c **** return false; + 132:Src/usbd_midi_if.c **** } + 133:Src/usbd_midi_if.c **** } + 134:Src/usbd_midi_if.c **** + 135:Src/usbd_midi_if.c **** for(i=0; i<MIDI_IN_JACK_NUM; i++){ + 136:Src/usbd_midi_if.c **** if(0 != _cureRingBufferU8GetUsedSize(&rbuf_jack_rx[i])) + 137:Src/usbd_midi_if.c **** { + 138:Src/usbd_midi_if.c **** return false; + 139:Src/usbd_midi_if.c **** } + 140:Src/usbd_midi_if.c **** } + 141:Src/usbd_midi_if.c **** return true; + 142:Src/usbd_midi_if.c **** } + 143:Src/usbd_midi_if.c **** + 144:Src/usbd_midi_if.c **** + 145:Src/usbd_midi_if.c **** USBD_MIDI_ItfTypeDef USBD_Interface_fops_FS = + 146:Src/usbd_midi_if.c **** { + 147:Src/usbd_midi_if.c **** MIDI_DataRx, + 148:Src/usbd_midi_if.c **** MIDI_DataTx + ARM GAS /tmp/ccjHqQBe.s page 4 + + + 149:Src/usbd_midi_if.c **** }; + 150:Src/usbd_midi_if.c **** + 151:Src/usbd_midi_if.c **** + 152:Src/usbd_midi_if.c **** static uint16_t MIDI_DataRx(uint8_t *msg, uint16_t length){ + 153:Src/usbd_midi_if.c **** uint16_t cnt; + 154:Src/usbd_midi_if.c **** uint16_t msgs = length / 4; + 155:Src/usbd_midi_if.c **** uint16_t chk = length % 4; + 156:Src/usbd_midi_if.c **** uint8_t u8b; + 157:Src/usbd_midi_if.c **** uint8_t midi_size; + 158:Src/usbd_midi_if.c **** + 159:Src/usbd_midi_if.c **** if(0 != chk) + 160:Src/usbd_midi_if.c **** { + 161:Src/usbd_midi_if.c **** return 0; + 162:Src/usbd_midi_if.c **** } + 163:Src/usbd_midi_if.c **** + 164:Src/usbd_midi_if.c **** for(uint32_t cnt_msgs = 0; cnt_msgs < msgs; cnt_msgs++){ + 165:Src/usbd_midi_if.c **** + 166:Src/usbd_midi_if.c **** uint8_t cable_num = (msg[0 + 4*cnt_msgs] & 0xF0) >> 4; + 167:Src/usbd_midi_if.c **** uint8_t code_idx_num = msg[0 + 4*cnt_msgs] & 0x0F; + 168:Src/usbd_midi_if.c **** + 169:Src/usbd_midi_if.c **** switch (code_idx_num) { + 170:Src/usbd_midi_if.c **** + 171:Src/usbd_midi_if.c **** //not defined + 172:Src/usbd_midi_if.c **** case 0x0: + 173:Src/usbd_midi_if.c **** case 0x1: + 174:Src/usbd_midi_if.c **** midi_size = 0; + 175:Src/usbd_midi_if.c **** break; + 176:Src/usbd_midi_if.c **** + 177:Src/usbd_midi_if.c **** //1byte message + 178:Src/usbd_midi_if.c **** case 0x5: + 179:Src/usbd_midi_if.c **** case 0xF: + 180:Src/usbd_midi_if.c **** midi_size = 1; + 181:Src/usbd_midi_if.c **** break; + 182:Src/usbd_midi_if.c **** + 183:Src/usbd_midi_if.c **** //2byte message + 184:Src/usbd_midi_if.c **** case 0x2: + 185:Src/usbd_midi_if.c **** case 0x6: + 186:Src/usbd_midi_if.c **** case 0xC: + 187:Src/usbd_midi_if.c **** case 0xD: + 188:Src/usbd_midi_if.c **** midi_size = 2; + 189:Src/usbd_midi_if.c **** break; + 190:Src/usbd_midi_if.c **** + 191:Src/usbd_midi_if.c **** //3byte message + 192:Src/usbd_midi_if.c **** case 0x3: + 193:Src/usbd_midi_if.c **** case 0x4: + 194:Src/usbd_midi_if.c **** case 0x7: + 195:Src/usbd_midi_if.c **** case 0x8: + 196:Src/usbd_midi_if.c **** case 0x9: + 197:Src/usbd_midi_if.c **** case 0xA: + 198:Src/usbd_midi_if.c **** case 0xB: + 199:Src/usbd_midi_if.c **** case 0xE: + 200:Src/usbd_midi_if.c **** midi_size = 3; + 201:Src/usbd_midi_if.c **** break; + 202:Src/usbd_midi_if.c **** + 203:Src/usbd_midi_if.c **** default: + 204:Src/usbd_midi_if.c **** midi_size = 0; + 205:Src/usbd_midi_if.c **** break; + ARM GAS /tmp/ccjHqQBe.s page 5 + + + 206:Src/usbd_midi_if.c **** } + 207:Src/usbd_midi_if.c **** + 208:Src/usbd_midi_if.c **** for(cnt = 0;cnt < midi_size;cnt ++){ + 209:Src/usbd_midi_if.c **** u8b = *(msg + 4*cnt_msgs + cnt + 1); + 210:Src/usbd_midi_if.c **** cureRingBufferU8Enqueue(&rbuf_usb_rx[cable_num], &u8b); + 211:Src/usbd_midi_if.c **** } + 212:Src/usbd_midi_if.c **** } + 213:Src/usbd_midi_if.c **** + 214:Src/usbd_midi_if.c **** return 0; + 215:Src/usbd_midi_if.c **** } + 216:Src/usbd_midi_if.c **** + 217:Src/usbd_midi_if.c **** void sendMidiMessage(uint8_t *msg, uint16_t size){ + 218:Src/usbd_midi_if.c **** if(size == 4){ + 219:Src/usbd_midi_if.c **** // APP_Rx_Buffer[0] = msg[0]; + 220:Src/usbd_midi_if.c **** // APP_Rx_Buffer[1] = msg[1]; + 221:Src/usbd_midi_if.c **** // APP_Rx_Buffer[2] = msg[2]; + 222:Src/usbd_midi_if.c **** // APP_Rx_Buffer[3] = msg[3]; + 223:Src/usbd_midi_if.c **** // USBD_MIDI_SendData(&hUsbDeviceFS, APP_Rx_Buffer, size); + 224:Src/usbd_midi_if.c **** MIDI_DataTx(msg, size); + 225:Src/usbd_midi_if.c **** } + 226:Src/usbd_midi_if.c **** } + 227:Src/usbd_midi_if.c **** + 228:Src/usbd_midi_if.c **** static uint16_t MIDI_DataTx(uint8_t *msg, uint16_t length){ + 25 .loc 1 228 0 + 26 .cfi_startproc + 27 @ args = 0, pretend = 0, frame = 0 + 28 @ frame_needed = 0, uses_anonymous_args = 0 + 29 .LVL0: + 30 0000 70B5 push {r4, r5, r6, lr} + 31 .LCFI0: + 32 .cfi_def_cfa_offset 16 + 33 .cfi_offset 4, -16 + 34 .cfi_offset 5, -12 + 35 .cfi_offset 6, -8 + 36 .cfi_offset 14, -4 + 37 .LVL1: + 229:Src/usbd_midi_if.c **** uint32_t i = 0; + 38 .loc 1 229 0 + 39 0002 0022 movs r2, #0 + 40 .LVL2: + 41 .L2: + 230:Src/usbd_midi_if.c **** while (i < length) { + 42 .loc 1 230 0 + 43 0004 9142 cmp r1, r2 + 44 0006 0FD9 bls .L5 + 231:Src/usbd_midi_if.c **** APP_Rx_Buffer[APP_Rx_ptr_in] = *(msg + i); + 45 .loc 1 231 0 + 46 0008 084C ldr r4, .L6 + 47 000a 2368 ldr r3, [r4] + 48 000c 865C ldrb r6, [r0, r2] + 49 000e 084D ldr r5, .L6+4 + 50 0010 EE54 strb r6, [r5, r3] + 232:Src/usbd_midi_if.c **** APP_Rx_ptr_in++; + 51 .loc 1 232 0 + 52 0012 0133 adds r3, r3, #1 + 53 0014 2360 str r3, [r4] + 233:Src/usbd_midi_if.c **** i++; + ARM GAS /tmp/ccjHqQBe.s page 6 + + + 54 .loc 1 233 0 + 55 0016 0132 adds r2, r2, #1 + 56 .LVL3: + 234:Src/usbd_midi_if.c **** if (APP_Rx_ptr_in == APP_RX_DATA_SIZE) { + 57 .loc 1 234 0 + 58 0018 8024 movs r4, #128 + 59 001a 6400 lsls r4, r4, #1 + 60 001c A342 cmp r3, r4 + 61 001e F1D1 bne .L2 + 235:Src/usbd_midi_if.c **** APP_Rx_ptr_in = 0; + 62 .loc 1 235 0 + 63 0020 024B ldr r3, .L6 + 64 0022 0024 movs r4, #0 + 65 0024 1C60 str r4, [r3] + 66 0026 EDE7 b .L2 + 67 .L5: + 236:Src/usbd_midi_if.c **** } + 237:Src/usbd_midi_if.c **** } + 238:Src/usbd_midi_if.c **** return USBD_OK; + 239:Src/usbd_midi_if.c **** } + 68 .loc 1 239 0 + 69 0028 0020 movs r0, #0 + 70 .LVL4: + 71 @ sp needed + 72 002a 70BD pop {r4, r5, r6, pc} + 73 .L7: + 74 .align 2 + 75 .L6: + 76 002c 00000000 .word APP_Rx_ptr_in + 77 0030 00000000 .word APP_Rx_Buffer + 78 .cfi_endproc + 79 .LFE52: + 81 .section .text.MIDI_DataRx,"ax",%progbits + 82 .align 1 + 83 .syntax unified + 84 .code 16 + 85 .thumb_func + 86 .fpu softvfp + 88 MIDI_DataRx: + 89 .LFB50: + 152:Src/usbd_midi_if.c **** uint16_t cnt; + 90 .loc 1 152 0 + 91 .cfi_startproc + 92 @ args = 0, pretend = 0, frame = 16 + 93 @ frame_needed = 0, uses_anonymous_args = 0 + 94 .LVL5: + 95 0000 F0B5 push {r4, r5, r6, r7, lr} + 96 .LCFI1: + 97 .cfi_def_cfa_offset 20 + 98 .cfi_offset 4, -20 + 99 .cfi_offset 5, -16 + 100 .cfi_offset 6, -12 + 101 .cfi_offset 7, -8 + 102 .cfi_offset 14, -4 + 103 0002 DE46 mov lr, fp + 104 0004 4746 mov r7, r8 + 105 0006 80B5 push {r7, lr} + ARM GAS /tmp/ccjHqQBe.s page 7 + + + 106 .LCFI2: + 107 .cfi_def_cfa_offset 28 + 108 .cfi_offset 8, -28 + 109 .cfi_offset 11, -24 + 110 0008 85B0 sub sp, sp, #20 + 111 .LCFI3: + 112 .cfi_def_cfa_offset 48 + 113 000a 0600 movs r6, r0 + 154:Src/usbd_midi_if.c **** uint16_t chk = length % 4; + 114 .loc 1 154 0 + 115 000c 8B08 lsrs r3, r1, #2 + 116 000e 9B46 mov fp, r3 + 117 .LVL6: + 155:Src/usbd_midi_if.c **** uint8_t u8b; + 118 .loc 1 155 0 + 119 0010 0327 movs r7, #3 + 120 0012 0F40 ands r7, r1 + 121 0014 0197 str r7, [sp, #4] + 122 .LVL7: + 159:Src/usbd_midi_if.c **** { + 123 .loc 1 159 0 + 124 0016 27D0 beq .L10 + 125 .LVL8: + 126 .L9: + 215:Src/usbd_midi_if.c **** + 127 .loc 1 215 0 + 128 0018 0020 movs r0, #0 + 129 001a 05B0 add sp, sp, #20 + 130 @ sp needed + 131 .LVL9: + 132 .LVL10: + 133 001c 0CBC pop {r2, r3} + 134 001e 9046 mov r8, r2 + 135 0020 9B46 mov fp, r3 + 136 0022 F0BD pop {r4, r5, r6, r7, pc} + 137 .LVL11: + 138 .L11: + 139 .LBB2: + 140 .LBB3: + 174:Src/usbd_midi_if.c **** break; + 141 .loc 1 174 0 + 142 0024 0023 movs r3, #0 + 143 0026 0093 str r3, [sp] + 144 .L15: + 145 .LVL12: + 208:Src/usbd_midi_if.c **** u8b = *(msg + 4*cnt_msgs + cnt + 1); + 146 .loc 1 208 0 + 147 0028 019C ldr r4, [sp, #4] + 148 002a 18E0 b .L16 + 149 .LVL13: + 150 .L12: + 188:Src/usbd_midi_if.c **** break; + 151 .loc 1 188 0 + 152 002c 0223 movs r3, #2 + 153 002e 0093 str r3, [sp] + 189:Src/usbd_midi_if.c **** + 154 .loc 1 189 0 + ARM GAS /tmp/ccjHqQBe.s page 8 + + + 155 0030 FAE7 b .L15 + 156 .LVL14: + 157 .L14: + 200:Src/usbd_midi_if.c **** break; + 158 .loc 1 200 0 + 159 0032 0323 movs r3, #3 + 160 0034 0093 str r3, [sp] + 201:Src/usbd_midi_if.c **** + 161 .loc 1 201 0 + 162 0036 F7E7 b .L15 + 163 .LVL15: + 164 .L19: + 180:Src/usbd_midi_if.c **** break; + 165 .loc 1 180 0 + 166 0038 0123 movs r3, #1 + 167 003a 0093 str r3, [sp] + 168 003c F4E7 b .L15 + 169 .LVL16: + 170 .L17: + 209:Src/usbd_midi_if.c **** cureRingBufferU8Enqueue(&rbuf_usb_rx[cable_num], &u8b); + 171 .loc 1 209 0 discriminator 3 + 172 003e 4346 mov r3, r8 + 173 0040 E318 adds r3, r4, r3 + 174 0042 0133 adds r3, r3, #1 + 175 0044 F35C ldrb r3, [r6, r3] + 176 0046 02AA add r2, sp, #8 + 177 0048 D11D adds r1, r2, #7 + 178 004a 0B70 strb r3, [r1] + 210:Src/usbd_midi_if.c **** } + 179 .loc 1 210 0 discriminator 3 + 180 004c 6B00 lsls r3, r5, #1 + 181 004e 5B19 adds r3, r3, r5 + 182 0050 9800 lsls r0, r3, #2 + 183 0052 0B4B ldr r3, .L20 + 184 0054 C018 adds r0, r0, r3 + 185 0056 FFF7FEFF bl cureRingBufferU8Enqueue + 186 .LVL17: + 208:Src/usbd_midi_if.c **** u8b = *(msg + 4*cnt_msgs + cnt + 1); + 187 .loc 1 208 0 discriminator 3 + 188 005a 0134 adds r4, r4, #1 + 189 .LVL18: + 190 005c A4B2 uxth r4, r4 + 191 .LVL19: + 192 .L16: + 208:Src/usbd_midi_if.c **** u8b = *(msg + 4*cnt_msgs + cnt + 1); + 193 .loc 1 208 0 is_stmt 0 discriminator 1 + 194 005e 6B46 mov r3, sp + 195 0060 1B88 ldrh r3, [r3] + 196 0062 A342 cmp r3, r4 + 197 0064 EBD8 bhi .L17 + 198 .LBE3: + 164:Src/usbd_midi_if.c **** + 199 .loc 1 164 0 is_stmt 1 discriminator 2 + 200 0066 0137 adds r7, r7, #1 + 201 .LVL20: + 202 .L10: + 164:Src/usbd_midi_if.c **** + ARM GAS /tmp/ccjHqQBe.s page 9 + + + 203 .loc 1 164 0 is_stmt 0 discriminator 1 + 204 0068 BB45 cmp fp, r7 + 205 006a D5D9 bls .L9 + 206 .LBB4: + 166:Src/usbd_midi_if.c **** uint8_t code_idx_num = msg[0 + 4*cnt_msgs] & 0x0F; + 207 .loc 1 166 0 is_stmt 1 + 208 006c BB00 lsls r3, r7, #2 + 209 006e 9846 mov r8, r3 + 210 0070 F25C ldrb r2, [r6, r3] + 211 0072 1509 lsrs r5, r2, #4 + 212 .LVL21: + 167:Src/usbd_midi_if.c **** + 213 .loc 1 167 0 + 214 0074 0F23 movs r3, #15 + 215 0076 1340 ands r3, r2 + 216 .LVL22: + 169:Src/usbd_midi_if.c **** + 217 .loc 1 169 0 + 218 0078 9B00 lsls r3, r3, #2 + 219 .LVL23: + 220 007a 024A ldr r2, .L20+4 + 221 .LVL24: + 222 007c D358 ldr r3, [r2, r3] + 223 007e 9F46 mov pc, r3 + 224 .section .rodata.MIDI_DataRx,"a",%progbits + 225 .align 2 + 226 .L13: + 227 0000 24000000 .word .L11 + 228 0004 24000000 .word .L11 + 229 0008 2C000000 .word .L12 + 230 000c 32000000 .word .L14 + 231 0010 32000000 .word .L14 + 232 0014 38000000 .word .L19 + 233 0018 2C000000 .word .L12 + 234 001c 32000000 .word .L14 + 235 0020 32000000 .word .L14 + 236 0024 32000000 .word .L14 + 237 0028 32000000 .word .L14 + 238 002c 32000000 .word .L14 + 239 0030 2C000000 .word .L12 + 240 0034 2C000000 .word .L12 + 241 0038 32000000 .word .L14 + 242 003c 38000000 .word .L19 + 243 .section .text.MIDI_DataRx + 244 .L21: + 245 .align 2 + 246 .L20: + 247 0080 00000000 .word rbuf_usb_rx + 248 0084 00000000 .word .L13 + 249 .LBE4: + 250 .LBE2: + 251 .cfi_endproc + 252 .LFE50: + 254 .section .text.midiInit,"ax",%progbits + 255 .align 1 + 256 .global midiInit + 257 .syntax unified + ARM GAS /tmp/ccjHqQBe.s page 10 + + + 258 .code 16 + 259 .thumb_func + 260 .fpu softvfp + 262 midiInit: + 263 .LFB43: + 43:Src/usbd_midi_if.c **** uint32_t i,j; + 264 .loc 1 43 0 + 265 .cfi_startproc + 266 @ args = 0, pretend = 0, frame = 0 + 267 @ frame_needed = 0, uses_anonymous_args = 0 + 268 0000 10B5 push {r4, lr} + 269 .LCFI4: + 270 .cfi_def_cfa_offset 8 + 271 .cfi_offset 4, -8 + 272 .cfi_offset 14, -4 + 273 .LVL25: + 46:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Init(&rbuf_usb_rx[i], MIDI_BUFFER_SIZ)) + 274 .loc 1 46 0 + 275 0002 0024 movs r4, #0 + 276 .LVL26: + 277 .L23: + 46:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Init(&rbuf_usb_rx[i], MIDI_BUFFER_SIZ)) + 278 .loc 1 46 0 is_stmt 0 discriminator 1 + 279 0004 002C cmp r4, #0 + 280 0006 07D0 beq .L25 + 53:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Init(&rbuf_jack_rx[i], MIDI_BUFFER_SIZ)) + 281 .loc 1 53 0 is_stmt 1 + 282 0008 0024 movs r4, #0 + 283 .LVL27: + 284 .L26: + 53:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Init(&rbuf_jack_rx[i], MIDI_BUFFER_SIZ)) + 285 .loc 1 53 0 is_stmt 0 discriminator 1 + 286 000a 002C cmp r4, #0 + 287 000c 11D0 beq .L27 + 61:Src/usbd_midi_if.c **** + 288 .loc 1 61 0 is_stmt 1 + 289 000e 0020 movs r0, #0 + 290 .LVL28: + 291 .L28: + 61:Src/usbd_midi_if.c **** + 292 .loc 1 61 0 is_stmt 0 discriminator 1 + 293 0010 0028 cmp r0, #0 + 294 0012 1BD0 beq .L31 + 72:Src/usbd_midi_if.c **** } + 295 .loc 1 72 0 is_stmt 1 + 296 0014 0120 movs r0, #1 + 297 .LVL29: + 298 .L24: + 73:Src/usbd_midi_if.c **** + 299 .loc 1 73 0 + 300 @ sp needed + 301 0016 10BD pop {r4, pc} + 302 .LVL30: + 303 .L25: + 47:Src/usbd_midi_if.c **** { + 304 .loc 1 47 0 + 305 0018 8021 movs r1, #128 + ARM GAS /tmp/ccjHqQBe.s page 11 + + + 306 001a 6300 lsls r3, r4, #1 + 307 001c 1B19 adds r3, r3, r4 + 308 001e 9800 lsls r0, r3, #2 + 309 0020 194B ldr r3, .L34 + 310 0022 C018 adds r0, r0, r3 + 311 0024 8900 lsls r1, r1, #2 + 312 0026 FFF7FEFF bl cureRingBufferU8Init + 313 .LVL31: + 314 002a 0128 cmp r0, #1 + 315 002c 27D1 bne .L32 + 46:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Init(&rbuf_usb_rx[i], MIDI_BUFFER_SIZ)) + 316 .loc 1 46 0 discriminator 2 + 317 002e 0134 adds r4, r4, #1 + 318 .LVL32: + 319 0030 E8E7 b .L23 + 320 .L27: + 54:Src/usbd_midi_if.c **** { + 321 .loc 1 54 0 + 322 0032 8021 movs r1, #128 + 323 0034 6300 lsls r3, r4, #1 + 324 0036 1B19 adds r3, r3, r4 + 325 0038 9800 lsls r0, r3, #2 + 326 003a 144B ldr r3, .L34+4 + 327 003c C018 adds r0, r0, r3 + 328 003e 8900 lsls r1, r1, #2 + 329 0040 FFF7FEFF bl cureRingBufferU8Init + 330 .LVL33: + 331 0044 0128 cmp r0, #1 + 332 0046 1CD1 bne .L33 + 53:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Init(&rbuf_jack_rx[i], MIDI_BUFFER_SIZ)) + 333 .loc 1 53 0 discriminator 2 + 334 0048 0134 adds r4, r4, #1 + 335 .LVL34: + 336 004a DEE7 b .L26 + 337 .LVL35: + 338 .L31: + 63:Src/usbd_midi_if.c **** analyzed_status[i].data_idx = 0; + 339 .loc 1 63 0 + 340 004c 0022 movs r2, #0 + 341 004e 104B ldr r3, .L34+8 + 342 0050 1A54 strb r2, [r3, r0] + 64:Src/usbd_midi_if.c **** midi_event[i].length = 0; + 343 .loc 1 64 0 + 344 0052 8100 lsls r1, r0, #2 + 345 0054 0F4B ldr r3, .L34+12 + 346 0056 5B18 adds r3, r3, r1 + 347 0058 DA70 strb r2, [r3, #3] + 65:Src/usbd_midi_if.c **** + 348 .loc 1 65 0 + 349 005a 8301 lsls r3, r0, #6 + 350 005c 1B18 adds r3, r3, r0 + 351 005e 0E49 ldr r1, .L34+16 + 352 0060 5A54 strb r2, [r3, r1] + 353 .LVL36: + 67:Src/usbd_midi_if.c **** midi_event[i].midi_byte[j] = 0x00; + 354 .loc 1 67 0 + 355 0062 0200 movs r2, r0 + ARM GAS /tmp/ccjHqQBe.s page 12 + + + 356 0064 07E0 b .L29 + 357 .LVL37: + 358 .L30: + 68:Src/usbd_midi_if.c **** } + 359 .loc 1 68 0 discriminator 3 + 360 0066 8101 lsls r1, r0, #6 + 361 0068 0918 adds r1, r1, r0 + 362 006a 0B4B ldr r3, .L34+16 + 363 006c 5B18 adds r3, r3, r1 + 364 006e 9B18 adds r3, r3, r2 + 365 0070 0021 movs r1, #0 + 366 0072 5970 strb r1, [r3, #1] + 67:Src/usbd_midi_if.c **** midi_event[i].midi_byte[j] = 0x00; + 367 .loc 1 67 0 discriminator 3 + 368 0074 0132 adds r2, r2, #1 + 369 .LVL38: + 370 .L29: + 67:Src/usbd_midi_if.c **** midi_event[i].midi_byte[j] = 0x00; + 371 .loc 1 67 0 is_stmt 0 discriminator 1 + 372 0076 3F2A cmp r2, #63 + 373 0078 F5D9 bls .L30 + 61:Src/usbd_midi_if.c **** + 374 .loc 1 61 0 is_stmt 1 discriminator 2 + 375 007a 0130 adds r0, r0, #1 + 376 .LVL39: + 377 007c C8E7 b .L28 + 378 .LVL40: + 379 .L32: + 49:Src/usbd_midi_if.c **** } + 380 .loc 1 49 0 + 381 007e 0020 movs r0, #0 + 382 0080 C9E7 b .L24 + 383 .L33: + 56:Src/usbd_midi_if.c **** } + 384 .loc 1 56 0 + 385 0082 0020 movs r0, #0 + 386 0084 C7E7 b .L24 + 387 .L35: + 388 0086 C046 .align 2 + 389 .L34: + 390 0088 00000000 .word rbuf_usb_rx + 391 008c 00000000 .word rbuf_jack_rx + 392 0090 00000000 .word rx_midi_msg + 393 0094 00000000 .word analyzed_status + 394 0098 00000000 .word midi_event + 395 .cfi_endproc + 396 .LFE43: + 398 .section .text.midiGetFromUsbRx,"ax",%progbits + 399 .align 1 + 400 .global midiGetFromUsbRx + 401 .syntax unified + 402 .code 16 + 403 .thumb_func + 404 .fpu softvfp + 406 midiGetFromUsbRx: + 407 .LFB44: + 76:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Dequeue(&rbuf_usb_rx[cable_num], dat)) + ARM GAS /tmp/ccjHqQBe.s page 13 + + + 408 .loc 1 76 0 + 409 .cfi_startproc + 410 @ args = 0, pretend = 0, frame = 0 + 411 @ frame_needed = 0, uses_anonymous_args = 0 + 412 .LVL41: + 413 0000 10B5 push {r4, lr} + 414 .LCFI5: + 415 .cfi_def_cfa_offset 8 + 416 .cfi_offset 4, -8 + 417 .cfi_offset 14, -4 + 77:Src/usbd_midi_if.c **** { + 418 .loc 1 77 0 + 419 0002 4300 lsls r3, r0, #1 + 420 0004 1818 adds r0, r3, r0 + 421 .LVL42: + 422 0006 8300 lsls r3, r0, #2 + 423 0008 0448 ldr r0, .L39 + 424 000a 1818 adds r0, r3, r0 + 425 000c FFF7FEFF bl cureRingBufferU8Dequeue + 426 .LVL43: + 427 0010 0128 cmp r0, #1 + 428 0012 01D0 beq .L38 + 79:Src/usbd_midi_if.c **** } + 429 .loc 1 79 0 + 430 0014 0020 movs r0, #0 + 431 .L37: + 83:Src/usbd_midi_if.c **** + 432 .loc 1 83 0 + 433 @ sp needed + 434 0016 10BD pop {r4, pc} + 435 .L38: + 82:Src/usbd_midi_if.c **** } + 436 .loc 1 82 0 + 437 0018 0120 movs r0, #1 + 438 001a FCE7 b .L37 + 439 .L40: + 440 .align 2 + 441 .L39: + 442 001c 00000000 .word rbuf_usb_rx + 443 .cfi_endproc + 444 .LFE44: + 446 .section .text.midiGetFromJackRx,"ax",%progbits + 447 .align 1 + 448 .global midiGetFromJackRx + 449 .syntax unified + 450 .code 16 + 451 .thumb_func + 452 .fpu softvfp + 454 midiGetFromJackRx: + 455 .LFB45: + 86:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Dequeue(&rbuf_jack_rx[cable_num], &rx_midi_msg[cable_num])) + 456 .loc 1 86 0 + 457 .cfi_startproc + 458 @ args = 0, pretend = 0, frame = 0 + 459 @ frame_needed = 0, uses_anonymous_args = 0 + 460 .LVL44: + 461 0000 10B5 push {r4, lr} + ARM GAS /tmp/ccjHqQBe.s page 14 + + + 462 .LCFI6: + 463 .cfi_def_cfa_offset 8 + 464 .cfi_offset 4, -8 + 465 .cfi_offset 14, -4 + 87:Src/usbd_midi_if.c **** { + 466 .loc 1 87 0 + 467 0002 0749 ldr r1, .L44 + 468 0004 4118 adds r1, r0, r1 + 469 0006 4300 lsls r3, r0, #1 + 470 0008 1818 adds r0, r3, r0 + 471 .LVL45: + 472 000a 8300 lsls r3, r0, #2 + 473 000c 0548 ldr r0, .L44+4 + 474 000e 1818 adds r0, r3, r0 + 475 0010 FFF7FEFF bl cureRingBufferU8Dequeue + 476 .LVL46: + 477 0014 0128 cmp r0, #1 + 478 0016 01D0 beq .L43 + 89:Src/usbd_midi_if.c **** } + 479 .loc 1 89 0 + 480 0018 0020 movs r0, #0 + 481 .L42: + 93:Src/usbd_midi_if.c **** + 482 .loc 1 93 0 + 483 @ sp needed + 484 001a 10BD pop {r4, pc} + 485 .L43: + 92:Src/usbd_midi_if.c **** } + 486 .loc 1 92 0 + 487 001c 0120 movs r0, #1 + 488 001e FCE7 b .L42 + 489 .L45: + 490 .align 2 + 491 .L44: + 492 0020 00000000 .word rx_midi_msg + 493 0024 00000000 .word rbuf_jack_rx + 494 .cfi_endproc + 495 .LFE45: + 497 .section .text.midiSetFromJackRx,"ax",%progbits + 498 .align 1 + 499 .global midiSetFromJackRx + 500 .syntax unified + 501 .code 16 + 502 .thumb_func + 503 .fpu softvfp + 505 midiSetFromJackRx: + 506 .LFB46: + 96:Src/usbd_midi_if.c **** if(BUFFER_SUCCESS != cureRingBufferU8Enqueue(&rbuf_jack_rx[cable_num], dat)) + 507 .loc 1 96 0 + 508 .cfi_startproc + 509 @ args = 0, pretend = 0, frame = 0 + 510 @ frame_needed = 0, uses_anonymous_args = 0 + 511 .LVL47: + 512 0000 10B5 push {r4, lr} + 513 .LCFI7: + 514 .cfi_def_cfa_offset 8 + 515 .cfi_offset 4, -8 + ARM GAS /tmp/ccjHqQBe.s page 15 + + + 516 .cfi_offset 14, -4 + 97:Src/usbd_midi_if.c **** { + 517 .loc 1 97 0 + 518 0002 4300 lsls r3, r0, #1 + 519 0004 1818 adds r0, r3, r0 + 520 .LVL48: + 521 0006 8300 lsls r3, r0, #2 + 522 0008 0448 ldr r0, .L49 + 523 000a 1818 adds r0, r3, r0 + 524 000c FFF7FEFF bl cureRingBufferU8Enqueue + 525 .LVL49: + 526 0010 0128 cmp r0, #1 + 527 0012 01D0 beq .L48 + 99:Src/usbd_midi_if.c **** } + 528 .loc 1 99 0 + 529 0014 0020 movs r0, #0 + 530 .L47: + 103:Src/usbd_midi_if.c **** + 531 .loc 1 103 0 + 532 @ sp needed + 533 0016 10BD pop {r4, pc} + 534 .L48: + 102:Src/usbd_midi_if.c **** } + 535 .loc 1 102 0 + 536 0018 0120 movs r0, #1 + 537 001a FCE7 b .L47 + 538 .L50: + 539 .align 2 + 540 .L49: + 541 001c 00000000 .word rbuf_jack_rx + 542 .cfi_endproc + 543 .LFE46: + 545 .section .text.isUsbRxBufEmpty,"ax",%progbits + 546 .align 1 + 547 .global isUsbRxBufEmpty + 548 .syntax unified + 549 .code 16 + 550 .thumb_func + 551 .fpu softvfp + 553 isUsbRxBufEmpty: + 554 .LFB47: + 107:Src/usbd_midi_if.c **** if( 0 != _cureRingBufferU8GetUsedSize(&rbuf_usb_rx[cable_num]) ){ + 555 .loc 1 107 0 + 556 .cfi_startproc + 557 @ args = 0, pretend = 0, frame = 0 + 558 @ frame_needed = 0, uses_anonymous_args = 0 + 559 .LVL50: + 560 0000 10B5 push {r4, lr} + 561 .LCFI8: + 562 .cfi_def_cfa_offset 8 + 563 .cfi_offset 4, -8 + 564 .cfi_offset 14, -4 + 108:Src/usbd_midi_if.c **** return false; + 565 .loc 1 108 0 + 566 0002 4300 lsls r3, r0, #1 + 567 0004 1818 adds r0, r3, r0 + 568 .LVL51: + ARM GAS /tmp/ccjHqQBe.s page 16 + + + 569 0006 8300 lsls r3, r0, #2 + 570 0008 0448 ldr r0, .L55 + 571 000a 1818 adds r0, r3, r0 + 572 000c FFF7FEFF bl _cureRingBufferU8GetUsedSize + 573 .LVL52: + 574 0010 0028 cmp r0, #0 + 575 0012 01D1 bne .L54 + 112:Src/usbd_midi_if.c **** } + 576 .loc 1 112 0 + 577 0014 0120 movs r0, #1 + 578 .L52: + 113:Src/usbd_midi_if.c **** + 579 .loc 1 113 0 + 580 @ sp needed + 581 0016 10BD pop {r4, pc} + 582 .L54: + 109:Src/usbd_midi_if.c **** } + 583 .loc 1 109 0 + 584 0018 0020 movs r0, #0 + 585 001a FCE7 b .L52 + 586 .L56: + 587 .align 2 + 588 .L55: + 589 001c 00000000 .word rbuf_usb_rx + 590 .cfi_endproc + 591 .LFE47: + 593 .section .text.isJackRxBufEmpty,"ax",%progbits + 594 .align 1 + 595 .global isJackRxBufEmpty + 596 .syntax unified + 597 .code 16 + 598 .thumb_func + 599 .fpu softvfp + 601 isJackRxBufEmpty: + 602 .LFB48: + 116:Src/usbd_midi_if.c **** if( 0 != _cureRingBufferU8GetUsedSize(&rbuf_jack_rx[cable_num]) ){ + 603 .loc 1 116 0 + 604 .cfi_startproc + 605 @ args = 0, pretend = 0, frame = 0 + 606 @ frame_needed = 0, uses_anonymous_args = 0 + 607 .LVL53: + 608 0000 10B5 push {r4, lr} + 609 .LCFI9: + 610 .cfi_def_cfa_offset 8 + 611 .cfi_offset 4, -8 + 612 .cfi_offset 14, -4 + 117:Src/usbd_midi_if.c **** return false; + 613 .loc 1 117 0 + 614 0002 4300 lsls r3, r0, #1 + 615 0004 1818 adds r0, r3, r0 + 616 .LVL54: + 617 0006 8300 lsls r3, r0, #2 + 618 0008 0448 ldr r0, .L61 + 619 000a 1818 adds r0, r3, r0 + 620 000c FFF7FEFF bl _cureRingBufferU8GetUsedSize + 621 .LVL55: + 622 0010 0028 cmp r0, #0 + ARM GAS /tmp/ccjHqQBe.s page 17 + + + 623 0012 01D1 bne .L60 + 121:Src/usbd_midi_if.c **** } + 624 .loc 1 121 0 + 625 0014 0120 movs r0, #1 + 626 .L58: + 122:Src/usbd_midi_if.c **** + 627 .loc 1 122 0 + 628 @ sp needed + 629 0016 10BD pop {r4, pc} + 630 .L60: + 118:Src/usbd_midi_if.c **** } + 631 .loc 1 118 0 + 632 0018 0020 movs r0, #0 + 633 001a FCE7 b .L58 + 634 .L62: + 635 .align 2 + 636 .L61: + 637 001c 00000000 .word rbuf_jack_rx + 638 .cfi_endproc + 639 .LFE48: + 641 .section .text.isRxBufEmpty,"ax",%progbits + 642 .align 1 + 643 .global isRxBufEmpty + 644 .syntax unified + 645 .code 16 + 646 .thumb_func + 647 .fpu softvfp + 649 isRxBufEmpty: + 650 .LFB49: + 125:Src/usbd_midi_if.c **** uint32_t i; + 651 .loc 1 125 0 + 652 .cfi_startproc + 653 @ args = 0, pretend = 0, frame = 0 + 654 @ frame_needed = 0, uses_anonymous_args = 0 + 655 0000 10B5 push {r4, lr} + 656 .LCFI10: + 657 .cfi_def_cfa_offset 8 + 658 .cfi_offset 4, -8 + 659 .cfi_offset 14, -4 + 660 .LVL56: + 128:Src/usbd_midi_if.c **** if(0 != _cureRingBufferU8GetUsedSize(&rbuf_usb_rx[i])) + 661 .loc 1 128 0 + 662 0002 0024 movs r4, #0 + 663 .LVL57: + 664 .L64: + 128:Src/usbd_midi_if.c **** if(0 != _cureRingBufferU8GetUsedSize(&rbuf_usb_rx[i])) + 665 .loc 1 128 0 is_stmt 0 discriminator 1 + 666 0004 002C cmp r4, #0 + 667 0006 04D0 beq .L66 + 135:Src/usbd_midi_if.c **** if(0 != _cureRingBufferU8GetUsedSize(&rbuf_jack_rx[i])) + 668 .loc 1 135 0 is_stmt 1 + 669 0008 0024 movs r4, #0 + 670 .LVL58: + 671 .L67: + 135:Src/usbd_midi_if.c **** if(0 != _cureRingBufferU8GetUsedSize(&rbuf_jack_rx[i])) + 672 .loc 1 135 0 is_stmt 0 discriminator 1 + 673 000a 002C cmp r4, #0 + ARM GAS /tmp/ccjHqQBe.s page 18 + + + 674 000c 0CD0 beq .L68 + 141:Src/usbd_midi_if.c **** } + 675 .loc 1 141 0 is_stmt 1 + 676 000e 0120 movs r0, #1 + 677 .L65: + 142:Src/usbd_midi_if.c **** + 678 .loc 1 142 0 + 679 @ sp needed + 680 .LVL59: + 681 0010 10BD pop {r4, pc} + 682 .LVL60: + 683 .L66: + 129:Src/usbd_midi_if.c **** { + 684 .loc 1 129 0 + 685 0012 6300 lsls r3, r4, #1 + 686 0014 1B19 adds r3, r3, r4 + 687 0016 9800 lsls r0, r3, #2 + 688 0018 0B4B ldr r3, .L71 + 689 001a C018 adds r0, r0, r3 + 690 001c FFF7FEFF bl _cureRingBufferU8GetUsedSize + 691 .LVL61: + 692 0020 0028 cmp r0, #0 + 693 0022 0CD1 bne .L69 + 128:Src/usbd_midi_if.c **** if(0 != _cureRingBufferU8GetUsedSize(&rbuf_usb_rx[i])) + 694 .loc 1 128 0 discriminator 2 + 695 0024 0134 adds r4, r4, #1 + 696 .LVL62: + 697 0026 EDE7 b .L64 + 698 .L68: + 136:Src/usbd_midi_if.c **** { + 699 .loc 1 136 0 + 700 0028 6300 lsls r3, r4, #1 + 701 002a 1B19 adds r3, r3, r4 + 702 002c 9800 lsls r0, r3, #2 + 703 002e 074B ldr r3, .L71+4 + 704 0030 C018 adds r0, r0, r3 + 705 0032 FFF7FEFF bl _cureRingBufferU8GetUsedSize + 706 .LVL63: + 707 0036 0028 cmp r0, #0 + 708 0038 03D1 bne .L70 + 135:Src/usbd_midi_if.c **** if(0 != _cureRingBufferU8GetUsedSize(&rbuf_jack_rx[i])) + 709 .loc 1 135 0 discriminator 2 + 710 003a 0134 adds r4, r4, #1 + 711 .LVL64: + 712 003c E5E7 b .L67 + 713 .L69: + 131:Src/usbd_midi_if.c **** } + 714 .loc 1 131 0 + 715 003e 0020 movs r0, #0 + 716 0040 E6E7 b .L65 + 717 .L70: + 138:Src/usbd_midi_if.c **** } + 718 .loc 1 138 0 + 719 0042 0020 movs r0, #0 + 720 0044 E4E7 b .L65 + 721 .L72: + 722 0046 C046 .align 2 + ARM GAS /tmp/ccjHqQBe.s page 19 + + + 723 .L71: + 724 0048 00000000 .word rbuf_usb_rx + 725 004c 00000000 .word rbuf_jack_rx + 726 .cfi_endproc + 727 .LFE49: + 729 .section .text.sendMidiMessage,"ax",%progbits + 730 .align 1 + 731 .global sendMidiMessage + 732 .syntax unified + 733 .code 16 + 734 .thumb_func + 735 .fpu softvfp + 737 sendMidiMessage: + 738 .LFB51: + 217:Src/usbd_midi_if.c **** if(size == 4){ + 739 .loc 1 217 0 + 740 .cfi_startproc + 741 @ args = 0, pretend = 0, frame = 0 + 742 @ frame_needed = 0, uses_anonymous_args = 0 + 743 .LVL65: + 744 0000 10B5 push {r4, lr} + 745 .LCFI11: + 746 .cfi_def_cfa_offset 8 + 747 .cfi_offset 4, -8 + 748 .cfi_offset 14, -4 + 218:Src/usbd_midi_if.c **** // APP_Rx_Buffer[0] = msg[0]; + 749 .loc 1 218 0 + 750 0002 0429 cmp r1, #4 + 751 0004 00D0 beq .L75 + 752 .LVL66: + 753 .L73: + 226:Src/usbd_midi_if.c **** + 754 .loc 1 226 0 + 755 @ sp needed + 756 0006 10BD pop {r4, pc} + 757 .LVL67: + 758 .L75: + 224:Src/usbd_midi_if.c **** } + 759 .loc 1 224 0 + 760 0008 FFF7FEFF bl MIDI_DataTx + 761 .LVL68: + 226:Src/usbd_midi_if.c **** + 762 .loc 1 226 0 + 763 000c FBE7 b .L73 + 764 .cfi_endproc + 765 .LFE51: + 767 .section .text.midiEventIsGenerated,"ax",%progbits + 768 .align 1 + 769 .global midiEventIsGenerated + 770 .syntax unified + 771 .code 16 + 772 .thumb_func + 773 .fpu softvfp + 775 midiEventIsGenerated: + 776 .LFB53: + 240:Src/usbd_midi_if.c **** + 241:Src/usbd_midi_if.c **** bool midiEventIsGenerated(uint8_t cable_num) + ARM GAS /tmp/ccjHqQBe.s page 20 + + + 242:Src/usbd_midi_if.c **** { + 777 .loc 1 242 0 + 778 .cfi_startproc + 779 @ args = 0, pretend = 0, frame = 0 + 780 @ frame_needed = 0, uses_anonymous_args = 0 + 781 .LVL69: + 782 0000 F0B5 push {r4, r5, r6, r7, lr} + 783 .LCFI12: + 784 .cfi_def_cfa_offset 20 + 785 .cfi_offset 4, -20 + 786 .cfi_offset 5, -16 + 787 .cfi_offset 6, -12 + 788 .cfi_offset 7, -8 + 789 .cfi_offset 14, -4 + 243:Src/usbd_midi_if.c **** uint8_t upper_half_byte= (rx_midi_msg[cable_num]) & 0xF0; + 790 .loc 1 243 0 + 791 0002 8F4B ldr r3, .L112 + 792 0004 1A5C ldrb r2, [r3, r0] + 793 0006 0F23 movs r3, #15 + 794 0008 1100 movs r1, r2 + 795 000a 9943 bics r1, r3 + 796 000c 0B00 movs r3, r1 + 797 .LVL70: + 244:Src/usbd_midi_if.c **** + 245:Src/usbd_midi_if.c **** if( upper_half_byte & 0x80 ){//0x80-0xFF:status byte + 798 .loc 1 245 0 + 799 000e 49B2 sxtb r1, r1 + 800 0010 0029 cmp r1, #0 + 801 0012 24DB blt .L103 + 246:Src/usbd_midi_if.c **** + 247:Src/usbd_midi_if.c **** switch(upper_half_byte){ + 248:Src/usbd_midi_if.c **** + 249:Src/usbd_midi_if.c **** case 0xF0://0xF0-0xFF:system message + 250:Src/usbd_midi_if.c **** switch(rx_midi_msg[cable_num]){ + 251:Src/usbd_midi_if.c **** + 252:Src/usbd_midi_if.c **** case 0xF0://SysEx Start + 253:Src/usbd_midi_if.c **** analyzed_status[cable_num].data_idx = 0; + 254:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[ analyzed_status[cable_num].data_idx++ ] = rx_midi_msg[cable_ + 255:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_SYSEX; + 256:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_SYSTEM_DATA; + 257:Src/usbd_midi_if.c **** break; + 258:Src/usbd_midi_if.c **** + 259:Src/usbd_midi_if.c **** case 0xF7://SysEx End + 260:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[ analyzed_status[cable_num].data_idx++ ] = rx_midi_msg[cable_ + 261:Src/usbd_midi_if.c **** midi_event[cable_num].length = analyzed_status[cable_num].data_idx; + 262:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 263:Src/usbd_midi_if.c **** break; + 264:Src/usbd_midi_if.c **** + 265:Src/usbd_midi_if.c **** case 0xF2://Song Position + 266:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[0] = rx_midi_msg[cable_num]; + 267:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_THREE_BYTE; + 268:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA1; + 269:Src/usbd_midi_if.c **** break; + 270:Src/usbd_midi_if.c **** + 271:Src/usbd_midi_if.c **** case 0xF1://Time Code + 272:Src/usbd_midi_if.c **** case 0xF3://Song Select + 273:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[0] = rx_midi_msg[cable_num]; + ARM GAS /tmp/ccjHqQBe.s page 21 + + + 274:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_TWO_BYTE; + 275:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA1; + 276:Src/usbd_midi_if.c **** break; + 277:Src/usbd_midi_if.c **** + 278:Src/usbd_midi_if.c **** case 0xF4://Undefined + 279:Src/usbd_midi_if.c **** case 0xF5://Undefined + 280:Src/usbd_midi_if.c **** case 0xF6://Tune request + 281:Src/usbd_midi_if.c **** case 0xF8://Timing clock + 282:Src/usbd_midi_if.c **** case 0xF9://Undefined + 283:Src/usbd_midi_if.c **** case 0xFA://Start + 284:Src/usbd_midi_if.c **** case 0xFB://Continue + 285:Src/usbd_midi_if.c **** case 0xFC://Stop + 286:Src/usbd_midi_if.c **** case 0xFD://Undefined + 287:Src/usbd_midi_if.c **** case 0xFE://Active Sensing + 288:Src/usbd_midi_if.c **** case 0xFF://Reset + 289:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[0] = rx_midi_msg[cable_num]; + 290:Src/usbd_midi_if.c **** midi_event[cable_num].length = 1; + 291:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_ONE_BYTE; + 292:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 293:Src/usbd_midi_if.c **** break; + 294:Src/usbd_midi_if.c **** } + 295:Src/usbd_midi_if.c **** analyzed_status[cable_num].is_system_common = true; + 296:Src/usbd_midi_if.c **** break; + 297:Src/usbd_midi_if.c **** + 298:Src/usbd_midi_if.c **** case 0x80://Note Off + 299:Src/usbd_midi_if.c **** case 0x90://Note On + 300:Src/usbd_midi_if.c **** case 0xA0://Polyphonic key-pressure + 301:Src/usbd_midi_if.c **** case 0xB0://ControlChange + 302:Src/usbd_midi_if.c **** case 0xE0://PitchBend + 303:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[0] = rx_midi_msg[cable_num]; + 304:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_THREE_BYTE; + 305:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA1; + 306:Src/usbd_midi_if.c **** analyzed_status[cable_num].is_system_common = false; + 307:Src/usbd_midi_if.c **** break; + 308:Src/usbd_midi_if.c **** + 309:Src/usbd_midi_if.c **** case 0xC0://Program Change + 310:Src/usbd_midi_if.c **** case 0xD0://Channel pressure + 311:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[0] = rx_midi_msg[cable_num]; + 312:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_TWO_BYTE; + 313:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA1; + 314:Src/usbd_midi_if.c **** analyzed_status[cable_num].is_system_common = false; + 315:Src/usbd_midi_if.c **** break; + 316:Src/usbd_midi_if.c **** + 317:Src/usbd_midi_if.c **** default: + 318:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_NOTHING; + 319:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = START_ANALYSIS; + 320:Src/usbd_midi_if.c **** analyzed_status[cable_num].is_system_common = false; + 321:Src/usbd_midi_if.c **** break; + 322:Src/usbd_midi_if.c **** } + 323:Src/usbd_midi_if.c **** + 324:Src/usbd_midi_if.c **** }else{//0x00-0x7F:data byte + 325:Src/usbd_midi_if.c **** + 326:Src/usbd_midi_if.c **** switch(analyzed_status[cable_num].stat){ + 802 .loc 1 326 0 + 803 0014 8300 lsls r3, r0, #2 + 804 0016 8B49 ldr r1, .L112+4 + 805 .LVL71: + ARM GAS /tmp/ccjHqQBe.s page 22 + + + 806 0018 5B5C ldrb r3, [r3, r1] + 807 001a 022B cmp r3, #2 + 808 001c 00D1 bne .LCB748 + 809 001e DCE0 b .L92 @long jump + 810 .LCB748: + 811 0020 00D8 bhi .LCB750 + 812 0022 B7E0 b .L104 @long jump + 813 .LCB750: + 814 0024 032B cmp r3, #3 + 815 0026 00D1 bne .LCB752 + 816 0028 EEE0 b .L95 @long jump + 817 .LCB752: + 818 002a 042B cmp r3, #4 + 819 002c 60D1 bne .L91 + 327:Src/usbd_midi_if.c **** + 328:Src/usbd_midi_if.c **** case WAIT_DATA1: + 329:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[1] = rx_midi_msg[cable_num]; + 330:Src/usbd_midi_if.c **** + 331:Src/usbd_midi_if.c **** if(MSG_THREE_BYTE == analyzed_status[cable_num].type ){ + 332:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA2; + 333:Src/usbd_midi_if.c **** }else if( MSG_TWO_BYTE == analyzed_status[cable_num].type ){ + 334:Src/usbd_midi_if.c **** midi_event[cable_num].length = 2; + 335:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 336:Src/usbd_midi_if.c **** }else{ + 337:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = START_ANALYSIS; + 338:Src/usbd_midi_if.c **** } + 339:Src/usbd_midi_if.c **** break; + 340:Src/usbd_midi_if.c **** + 341:Src/usbd_midi_if.c **** case WAIT_DATA2: + 342:Src/usbd_midi_if.c **** if(MSG_THREE_BYTE == analyzed_status[cable_num].type ){ + 343:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[2] = rx_midi_msg[cable_num]; + 344:Src/usbd_midi_if.c **** midi_event[cable_num].length = 3; + 345:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 346:Src/usbd_midi_if.c **** }else{ + 347:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = START_ANALYSIS; + 348:Src/usbd_midi_if.c **** } + 349:Src/usbd_midi_if.c **** break; + 350:Src/usbd_midi_if.c **** + 351:Src/usbd_midi_if.c **** case WAIT_SYSTEM_DATA: + 352:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[ analyzed_status[cable_num].data_idx++ ] = rx_midi_msg[cable_nu + 353:Src/usbd_midi_if.c **** + 354:Src/usbd_midi_if.c **** if(analyzed_status[cable_num].data_idx > (MIDI_SENDDATA_MAX - 1) ){ + 355:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 356:Src/usbd_midi_if.c **** } + 357:Src/usbd_midi_if.c **** break; + 358:Src/usbd_midi_if.c **** + 359:Src/usbd_midi_if.c **** case END_ANALYSIS://running status:When status byte is omitted. + 360:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[1] = rx_midi_msg[cable_num]; + 820 .loc 1 360 0 + 821 002e 8101 lsls r1, r0, #6 + 822 0030 0918 adds r1, r1, r0 + 823 0032 854B ldr r3, .L112+8 + 824 0034 5B18 adds r3, r3, r1 + 825 0036 9A70 strb r2, [r3, #2] + 361:Src/usbd_midi_if.c **** if(MSG_THREE_BYTE == analyzed_status[cable_num].type){ + 826 .loc 1 361 0 + 827 0038 8200 lsls r2, r0, #2 + ARM GAS /tmp/ccjHqQBe.s page 23 + + + 828 .LVL72: + 829 003a 824B ldr r3, .L112+4 + 830 003c 9B18 adds r3, r3, r2 + 831 003e 5B78 ldrb r3, [r3, #1] + 832 0040 042B cmp r3, #4 + 833 0042 00D1 bne .LCB766 + 834 0044 F5E0 b .L105 @long jump + 835 .LCB766: + 362:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA2; + 363:Src/usbd_midi_if.c **** }else if(MSG_TWO_BYTE == analyzed_status[cable_num].type){ + 836 .loc 1 363 0 + 837 0046 032B cmp r3, #3 + 838 0048 52D1 bne .L91 + 364:Src/usbd_midi_if.c **** midi_event[cable_num].length = 2; + 839 .loc 1 364 0 + 840 004a 8301 lsls r3, r0, #6 + 841 004c 1B18 adds r3, r3, r0 + 842 004e 7E4A ldr r2, .L112+8 + 843 0050 0221 movs r1, #2 + 844 0052 9954 strb r1, [r3, r2] + 365:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 845 .loc 1 365 0 + 846 0054 8300 lsls r3, r0, #2 + 847 0056 7B4A ldr r2, .L112+4 + 848 0058 0231 adds r1, r1, #2 + 849 005a 9954 strb r1, [r3, r2] + 850 005c 48E0 b .L91 + 851 .LVL73: + 852 .L103: + 247:Src/usbd_midi_if.c **** + 853 .loc 1 247 0 + 854 005e B02B cmp r3, #176 + 855 0060 00D1 bne .LCB784 + 856 0062 88E0 b .L79 @long jump + 857 .LCB784: + 858 0064 10D9 bls .L106 + 859 0066 D02B cmp r3, #208 + 860 0068 21D0 beq .L81 + 861 006a 1ED9 bls .L107 + 862 006c E02B cmp r3, #224 + 863 006e 00D1 bne .LCB792 + 864 0070 81E0 b .L79 @long jump + 865 .LCB792: + 866 0072 F02B cmp r3, #240 + 867 0074 11D1 bne .L78 + 250:Src/usbd_midi_if.c **** + 868 .loc 1 250 0 + 869 0076 1300 movs r3, r2 + 870 0078 1033 adds r3, r3, #16 + 871 007a D9B2 uxtb r1, r3 + 872 .LVL74: + 873 007c 0F29 cmp r1, #15 + 874 007e 32D8 bhi .L84 + 875 0080 8B00 lsls r3, r1, #2 + 876 0082 7249 ldr r1, .L112+12 + 877 0084 CB58 ldr r3, [r1, r3] + 878 0086 9F46 mov pc, r3 + ARM GAS /tmp/ccjHqQBe.s page 24 + + + 879 .section .rodata.midiEventIsGenerated,"a",%progbits + 880 .align 2 + 881 .L86: + 882 0000 CC000000 .word .L85 + 883 0004 3E010000 .word .L87 + 884 0008 24010000 .word .L88 + 885 000c 3E010000 .word .L87 + 886 0010 58010000 .word .L89 + 887 0014 58010000 .word .L89 + 888 0018 58010000 .word .L89 + 889 001c 00010000 .word .L90 + 890 0020 58010000 .word .L89 + 891 0024 58010000 .word .L89 + 892 0028 58010000 .word .L89 + 893 002c 58010000 .word .L89 + 894 0030 58010000 .word .L89 + 895 0034 58010000 .word .L89 + 896 0038 58010000 .word .L89 + 897 003c 58010000 .word .L89 + 898 .section .text.midiEventIsGenerated + 899 .LVL75: + 900 .L106: + 247:Src/usbd_midi_if.c **** + 901 .loc 1 247 0 + 902 0088 902B cmp r3, #144 + 903 008a 00D1 bne .LCB814 + 904 008c 73E0 b .L79 @long jump + 905 .LCB814: + 906 008e A02B cmp r3, #160 + 907 0090 00D1 bne .LCB816 + 908 0092 70E0 b .L79 @long jump + 909 .LCB816: + 910 0094 802B cmp r3, #128 + 911 0096 00D1 bne .LCB818 + 912 0098 6DE0 b .L79 @long jump + 913 .LCB818: + 914 .L78: + 318:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = START_ANALYSIS; + 915 .loc 1 318 0 + 916 009a 6A49 ldr r1, .L112+4 + 917 .LVL76: + 918 009c 8400 lsls r4, r0, #2 + 919 009e 0A19 adds r2, r1, r4 + 920 00a0 0023 movs r3, #0 + 921 .LVL77: + 922 00a2 5370 strb r3, [r2, #1] + 319:Src/usbd_midi_if.c **** analyzed_status[cable_num].is_system_common = false; + 923 .loc 1 319 0 + 924 00a4 6354 strb r3, [r4, r1] + 320:Src/usbd_midi_if.c **** break; + 925 .loc 1 320 0 + 926 00a6 9370 strb r3, [r2, #2] + 321:Src/usbd_midi_if.c **** } + 927 .loc 1 321 0 + 928 00a8 22E0 b .L91 + 929 .LVL78: + 930 .L107: + ARM GAS /tmp/ccjHqQBe.s page 25 + + + 247:Src/usbd_midi_if.c **** + 931 .loc 1 247 0 + 932 00aa C02B cmp r3, #192 + 933 00ac F5D1 bne .L78 + 934 .L81: + 311:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_TWO_BYTE; + 935 .loc 1 311 0 + 936 00ae 8101 lsls r1, r0, #6 + 937 .LVL79: + 938 00b0 0918 adds r1, r1, r0 + 939 00b2 654B ldr r3, .L112+8 + 940 .LVL80: + 941 00b4 5B18 adds r3, r3, r1 + 942 00b6 5A70 strb r2, [r3, #1] + 312:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA1; + 943 .loc 1 312 0 + 944 00b8 624A ldr r2, .L112+4 + 945 .LVL81: + 946 00ba 8100 lsls r1, r0, #2 + 947 00bc 5318 adds r3, r2, r1 + 948 00be 0324 movs r4, #3 + 949 00c0 5C70 strb r4, [r3, #1] + 313:Src/usbd_midi_if.c **** analyzed_status[cable_num].is_system_common = false; + 950 .loc 1 313 0 + 951 00c2 023C subs r4, r4, #2 + 952 00c4 8C54 strb r4, [r1, r2] + 314:Src/usbd_midi_if.c **** break; + 953 .loc 1 314 0 + 954 00c6 0022 movs r2, #0 + 955 00c8 9A70 strb r2, [r3, #2] + 315:Src/usbd_midi_if.c **** + 956 .loc 1 315 0 + 957 00ca 11E0 b .L91 + 958 .LVL82: + 959 .L85: + 254:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_SYSEX; + 960 .loc 1 254 0 + 961 00cc 5D4C ldr r4, .L112+4 + 962 00ce 8500 lsls r5, r0, #2 + 963 00d0 6619 adds r6, r4, r5 + 964 00d2 0127 movs r7, #1 + 965 00d4 F770 strb r7, [r6, #3] + 966 00d6 8101 lsls r1, r0, #6 + 967 00d8 0918 adds r1, r1, r0 + 968 00da 5B4B ldr r3, .L112+8 + 969 00dc 5B18 adds r3, r3, r1 + 970 00de 5A70 strb r2, [r3, #1] + 255:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_SYSTEM_DATA; + 971 .loc 1 255 0 + 972 00e0 7770 strb r7, [r6, #1] + 256:Src/usbd_midi_if.c **** break; + 973 .loc 1 256 0 + 974 00e2 0323 movs r3, #3 + 975 00e4 2B55 strb r3, [r5, r4] + 976 .LVL83: + 977 .L84: + 295:Src/usbd_midi_if.c **** break; + ARM GAS /tmp/ccjHqQBe.s page 26 + + + 978 .loc 1 295 0 + 979 00e6 8200 lsls r2, r0, #2 + 980 00e8 564B ldr r3, .L112+4 + 981 00ea 9B18 adds r3, r3, r2 + 982 00ec 0122 movs r2, #1 + 983 00ee 9A70 strb r2, [r3, #2] + 984 .L91: + 366:Src/usbd_midi_if.c **** } + 367:Src/usbd_midi_if.c **** break; + 368:Src/usbd_midi_if.c **** + 369:Src/usbd_midi_if.c **** case START_ANALYSIS: + 370:Src/usbd_midi_if.c **** break; + 371:Src/usbd_midi_if.c **** + 372:Src/usbd_midi_if.c **** default: + 373:Src/usbd_midi_if.c **** break; + 374:Src/usbd_midi_if.c **** } + 375:Src/usbd_midi_if.c **** } + 376:Src/usbd_midi_if.c **** + 377:Src/usbd_midi_if.c **** if(END_ANALYSIS == analyzed_status[cable_num].stat){ + 985 .loc 1 377 0 + 986 00f0 8000 lsls r0, r0, #2 + 987 .LVL84: + 988 00f2 544B ldr r3, .L112+4 + 989 00f4 C35C ldrb r3, [r0, r3] + 990 00f6 042B cmp r3, #4 + 991 00f8 00D1 bne .LCB889 + 992 00fa 9FE0 b .L108 @long jump + 993 .LCB889: + 378:Src/usbd_midi_if.c **** return true; + 379:Src/usbd_midi_if.c **** }else{ + 380:Src/usbd_midi_if.c **** return false; + 994 .loc 1 380 0 + 995 00fc 0020 movs r0, #0 + 996 .L101: + 381:Src/usbd_midi_if.c **** } + 382:Src/usbd_midi_if.c **** + 383:Src/usbd_midi_if.c **** } + 997 .loc 1 383 0 + 998 @ sp needed + 999 00fe F0BD pop {r4, r5, r6, r7, pc} + 1000 .LVL85: + 1001 .L90: + 260:Src/usbd_midi_if.c **** midi_event[cable_num].length = analyzed_status[cable_num].data_idx; + 1002 .loc 1 260 0 + 1003 0100 504D ldr r5, .L112+4 + 1004 0102 8600 lsls r6, r0, #2 + 1005 0104 AB19 adds r3, r5, r6 + 1006 0106 D978 ldrb r1, [r3, #3] + 1007 0108 8C46 mov ip, r1 + 1008 010a 0131 adds r1, r1, #1 + 1009 010c C9B2 uxtb r1, r1 + 1010 010e D970 strb r1, [r3, #3] + 1011 0110 4D4F ldr r7, .L112+8 + 1012 0112 8301 lsls r3, r0, #6 + 1013 0114 1B18 adds r3, r3, r0 + 1014 0116 FC18 adds r4, r7, r3 + 1015 0118 6444 add r4, r4, ip + ARM GAS /tmp/ccjHqQBe.s page 27 + + + 1016 011a 6270 strb r2, [r4, #1] + 261:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 1017 .loc 1 261 0 + 1018 011c D955 strb r1, [r3, r7] + 262:Src/usbd_midi_if.c **** break; + 1019 .loc 1 262 0 + 1020 011e 0423 movs r3, #4 + 1021 0120 7355 strb r3, [r6, r5] + 263:Src/usbd_midi_if.c **** + 1022 .loc 1 263 0 + 1023 0122 E0E7 b .L84 + 1024 .L88: + 266:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_THREE_BYTE; + 1025 .loc 1 266 0 + 1026 0124 8101 lsls r1, r0, #6 + 1027 0126 0918 adds r1, r1, r0 + 1028 0128 474B ldr r3, .L112+8 + 1029 012a 5B18 adds r3, r3, r1 + 1030 012c 5A70 strb r2, [r3, #1] + 267:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA1; + 1031 .loc 1 267 0 + 1032 012e 454B ldr r3, .L112+4 + 1033 0130 8200 lsls r2, r0, #2 + 1034 .LVL86: + 1035 0132 9918 adds r1, r3, r2 + 1036 0134 0424 movs r4, #4 + 1037 0136 4C70 strb r4, [r1, #1] + 268:Src/usbd_midi_if.c **** break; + 1038 .loc 1 268 0 + 1039 0138 0121 movs r1, #1 + 1040 013a D154 strb r1, [r2, r3] + 269:Src/usbd_midi_if.c **** + 1041 .loc 1 269 0 + 1042 013c D3E7 b .L84 + 1043 .LVL87: + 1044 .L87: + 273:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_TWO_BYTE; + 1045 .loc 1 273 0 + 1046 013e 8101 lsls r1, r0, #6 + 1047 0140 0918 adds r1, r1, r0 + 1048 0142 414B ldr r3, .L112+8 + 1049 0144 5B18 adds r3, r3, r1 + 1050 0146 5A70 strb r2, [r3, #1] + 274:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA1; + 1051 .loc 1 274 0 + 1052 0148 3E4B ldr r3, .L112+4 + 1053 014a 8200 lsls r2, r0, #2 + 1054 .LVL88: + 1055 014c 9918 adds r1, r3, r2 + 1056 014e 0324 movs r4, #3 + 1057 0150 4C70 strb r4, [r1, #1] + 275:Src/usbd_midi_if.c **** break; + 1058 .loc 1 275 0 + 1059 0152 0121 movs r1, #1 + 1060 0154 D154 strb r1, [r2, r3] + 276:Src/usbd_midi_if.c **** + 1061 .loc 1 276 0 + ARM GAS /tmp/ccjHqQBe.s page 28 + + + 1062 0156 C6E7 b .L84 + 1063 .LVL89: + 1064 .L89: + 289:Src/usbd_midi_if.c **** midi_event[cable_num].length = 1; + 1065 .loc 1 289 0 + 1066 0158 3B49 ldr r1, .L112+8 + 1067 015a 8301 lsls r3, r0, #6 + 1068 015c 1B18 adds r3, r3, r0 + 1069 015e CC18 adds r4, r1, r3 + 1070 0160 6270 strb r2, [r4, #1] + 290:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_ONE_BYTE; + 1071 .loc 1 290 0 + 1072 0162 0122 movs r2, #1 + 1073 .LVL90: + 1074 0164 5A54 strb r2, [r3, r1] + 291:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 1075 .loc 1 291 0 + 1076 0166 374B ldr r3, .L112+4 + 1077 0168 8200 lsls r2, r0, #2 + 1078 016a 9918 adds r1, r3, r2 + 1079 016c 0224 movs r4, #2 + 1080 016e 4C70 strb r4, [r1, #1] + 292:Src/usbd_midi_if.c **** break; + 1081 .loc 1 292 0 + 1082 0170 0421 movs r1, #4 + 1083 0172 D154 strb r1, [r2, r3] + 293:Src/usbd_midi_if.c **** } + 1084 .loc 1 293 0 + 1085 0174 B7E7 b .L84 + 1086 .LVL91: + 1087 .L79: + 303:Src/usbd_midi_if.c **** analyzed_status[cable_num].type = MSG_THREE_BYTE; + 1088 .loc 1 303 0 + 1089 0176 8101 lsls r1, r0, #6 + 1090 .LVL92: + 1091 0178 0918 adds r1, r1, r0 + 1092 017a 334B ldr r3, .L112+8 + 1093 .LVL93: + 1094 017c 5B18 adds r3, r3, r1 + 1095 017e 5A70 strb r2, [r3, #1] + 304:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA1; + 1096 .loc 1 304 0 + 1097 0180 304A ldr r2, .L112+4 + 1098 .LVL94: + 1099 0182 8100 lsls r1, r0, #2 + 1100 0184 5318 adds r3, r2, r1 + 1101 0186 0424 movs r4, #4 + 1102 0188 5C70 strb r4, [r3, #1] + 305:Src/usbd_midi_if.c **** analyzed_status[cable_num].is_system_common = false; + 1103 .loc 1 305 0 + 1104 018a 033C subs r4, r4, #3 + 1105 018c 8C54 strb r4, [r1, r2] + 306:Src/usbd_midi_if.c **** break; + 1106 .loc 1 306 0 + 1107 018e 0022 movs r2, #0 + 1108 0190 9A70 strb r2, [r3, #2] + 307:Src/usbd_midi_if.c **** + ARM GAS /tmp/ccjHqQBe.s page 29 + + + 1109 .loc 1 307 0 + 1110 0192 ADE7 b .L91 + 1111 .LVL95: + 1112 .L104: + 326:Src/usbd_midi_if.c **** + 1113 .loc 1 326 0 + 1114 0194 012B cmp r3, #1 + 1115 0196 ABD1 bne .L91 + 329:Src/usbd_midi_if.c **** + 1116 .loc 1 329 0 + 1117 0198 8101 lsls r1, r0, #6 + 1118 019a 0918 adds r1, r1, r0 + 1119 019c 2A4B ldr r3, .L112+8 + 1120 019e 5B18 adds r3, r3, r1 + 1121 01a0 9A70 strb r2, [r3, #2] + 331:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = WAIT_DATA2; + 1122 .loc 1 331 0 + 1123 01a2 8200 lsls r2, r0, #2 + 1124 .LVL96: + 1125 01a4 274B ldr r3, .L112+4 + 1126 01a6 9B18 adds r3, r3, r2 + 1127 01a8 5B78 ldrb r3, [r3, #1] + 1128 01aa 042B cmp r3, #4 + 1129 01ac 06D0 beq .L109 + 333:Src/usbd_midi_if.c **** midi_event[cable_num].length = 2; + 1130 .loc 1 333 0 + 1131 01ae 032B cmp r3, #3 + 1132 01b0 09D0 beq .L110 + 337:Src/usbd_midi_if.c **** } + 1133 .loc 1 337 0 + 1134 01b2 8300 lsls r3, r0, #2 + 1135 01b4 234A ldr r2, .L112+4 + 1136 01b6 0021 movs r1, #0 + 1137 01b8 9954 strb r1, [r3, r2] + 1138 01ba 99E7 b .L91 + 1139 .L109: + 332:Src/usbd_midi_if.c **** }else if( MSG_TWO_BYTE == analyzed_status[cable_num].type ){ + 1140 .loc 1 332 0 + 1141 01bc 1300 movs r3, r2 + 1142 01be 214A ldr r2, .L112+4 + 1143 01c0 0221 movs r1, #2 + 1144 01c2 9954 strb r1, [r3, r2] + 1145 01c4 94E7 b .L91 + 1146 .L110: + 334:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 1147 .loc 1 334 0 + 1148 01c6 8301 lsls r3, r0, #6 + 1149 01c8 1B18 adds r3, r3, r0 + 1150 01ca 1F4A ldr r2, .L112+8 + 1151 01cc 0221 movs r1, #2 + 1152 01ce 9954 strb r1, [r3, r2] + 335:Src/usbd_midi_if.c **** }else{ + 1153 .loc 1 335 0 + 1154 01d0 8300 lsls r3, r0, #2 + 1155 01d2 1C4A ldr r2, .L112+4 + 1156 01d4 0231 adds r1, r1, #2 + 1157 01d6 9954 strb r1, [r3, r2] + ARM GAS /tmp/ccjHqQBe.s page 30 + + + 1158 01d8 8AE7 b .L91 + 1159 .LVL97: + 1160 .L92: + 342:Src/usbd_midi_if.c **** midi_event[cable_num].midi_byte[2] = rx_midi_msg[cable_num]; + 1161 .loc 1 342 0 + 1162 01da 8100 lsls r1, r0, #2 + 1163 01dc 194B ldr r3, .L112+4 + 1164 01de 5B18 adds r3, r3, r1 + 1165 01e0 5B78 ldrb r3, [r3, #1] + 1166 01e2 042B cmp r3, #4 + 1167 01e4 04D0 beq .L111 + 347:Src/usbd_midi_if.c **** } + 1168 .loc 1 347 0 + 1169 01e6 8300 lsls r3, r0, #2 + 1170 01e8 164A ldr r2, .L112+4 + 1171 .LVL98: + 1172 01ea 0021 movs r1, #0 + 1173 01ec 9954 strb r1, [r3, r2] + 1174 01ee 7FE7 b .L91 + 1175 .LVL99: + 1176 .L111: + 343:Src/usbd_midi_if.c **** midi_event[cable_num].length = 3; + 1177 .loc 1 343 0 + 1178 01f0 1549 ldr r1, .L112+8 + 1179 01f2 8301 lsls r3, r0, #6 + 1180 01f4 1B18 adds r3, r3, r0 + 1181 01f6 CC18 adds r4, r1, r3 + 1182 01f8 E270 strb r2, [r4, #3] + 344:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 1183 .loc 1 344 0 + 1184 01fa 0322 movs r2, #3 + 1185 .LVL100: + 1186 01fc 5A54 strb r2, [r3, r1] + 345:Src/usbd_midi_if.c **** }else{ + 1187 .loc 1 345 0 + 1188 01fe 8300 lsls r3, r0, #2 + 1189 0200 104A ldr r2, .L112+4 + 1190 0202 0421 movs r1, #4 + 1191 0204 9954 strb r1, [r3, r2] + 1192 0206 73E7 b .L91 + 1193 .LVL101: + 1194 .L95: + 352:Src/usbd_midi_if.c **** + 1195 .loc 1 352 0 + 1196 0208 8300 lsls r3, r0, #2 + 1197 020a 0E4C ldr r4, .L112+4 + 1198 020c E418 adds r4, r4, r3 + 1199 020e E578 ldrb r5, [r4, #3] + 1200 0210 691C adds r1, r5, #1 + 1201 0212 C9B2 uxtb r1, r1 + 1202 0214 E170 strb r1, [r4, #3] + 1203 0216 8401 lsls r4, r0, #6 + 1204 0218 2418 adds r4, r4, r0 + 1205 021a 0B4B ldr r3, .L112+8 + 1206 021c 1B19 adds r3, r3, r4 + 1207 021e 5B19 adds r3, r3, r5 + 1208 0220 5A70 strb r2, [r3, #1] + ARM GAS /tmp/ccjHqQBe.s page 31 + + + 354:Src/usbd_midi_if.c **** analyzed_status[cable_num].stat = END_ANALYSIS; + 1209 .loc 1 354 0 + 1210 0222 3F29 cmp r1, #63 + 1211 0224 00D8 bhi .LCB1099 + 1212 0226 63E7 b .L91 @long jump + 1213 .LCB1099: + 355:Src/usbd_midi_if.c **** } + 1214 .loc 1 355 0 + 1215 0228 8300 lsls r3, r0, #2 + 1216 022a 064A ldr r2, .L112+4 + 1217 .LVL102: + 1218 022c 0421 movs r1, #4 + 1219 022e 9954 strb r1, [r3, r2] + 1220 0230 5EE7 b .L91 + 1221 .L105: + 362:Src/usbd_midi_if.c **** }else if(MSG_TWO_BYTE == analyzed_status[cable_num].type){ + 1222 .loc 1 362 0 + 1223 0232 1300 movs r3, r2 + 1224 0234 034A ldr r2, .L112+4 + 1225 0236 0221 movs r1, #2 + 1226 0238 9954 strb r1, [r3, r2] + 1227 023a 59E7 b .L91 + 1228 .LVL103: + 1229 .L108: + 378:Src/usbd_midi_if.c **** }else{ + 1230 .loc 1 378 0 + 1231 023c 0120 movs r0, #1 + 1232 023e 5EE7 b .L101 + 1233 .L113: + 1234 .align 2 + 1235 .L112: + 1236 0240 00000000 .word rx_midi_msg + 1237 0244 00000000 .word analyzed_status + 1238 0248 00000000 .word midi_event + 1239 024c 00000000 .word .L86 + 1240 .cfi_endproc + 1241 .LFE53: + 1243 .section .text.midiGenerateUsbPacket,"ax",%progbits + 1244 .align 1 + 1245 .global midiGenerateUsbPacket + 1246 .syntax unified + 1247 .code 16 + 1248 .thumb_func + 1249 .fpu softvfp + 1251 midiGenerateUsbPacket: + 1252 .LFB54: + 384:Src/usbd_midi_if.c **** + 385:Src/usbd_midi_if.c **** + 386:Src/usbd_midi_if.c **** void midiGenerateUsbPacket(uint8_t cable_num) + 387:Src/usbd_midi_if.c **** { + 1253 .loc 1 387 0 + 1254 .cfi_startproc + 1255 @ args = 0, pretend = 0, frame = 8 + 1256 @ frame_needed = 0, uses_anonymous_args = 0 + 1257 .LVL104: + 1258 0000 F0B5 push {r4, r5, r6, r7, lr} + 1259 .LCFI13: + ARM GAS /tmp/ccjHqQBe.s page 32 + + + 1260 .cfi_def_cfa_offset 20 + 1261 .cfi_offset 4, -20 + 1262 .cfi_offset 5, -16 + 1263 .cfi_offset 6, -12 + 1264 .cfi_offset 7, -8 + 1265 .cfi_offset 14, -4 + 1266 0002 83B0 sub sp, sp, #12 + 1267 .LCFI14: + 1268 .cfi_def_cfa_offset 32 + 1269 0004 0700 movs r7, r0 + 388:Src/usbd_midi_if.c **** uint8_t msg_buf[4] = {0x00,0x00,0x00,0x00}; + 1270 .loc 1 388 0 + 1271 0006 0023 movs r3, #0 + 1272 0008 0193 str r3, [sp, #4] + 1273 .LVL105: + 389:Src/usbd_midi_if.c **** uint32_t cnt_remain=0, cnt_length; + 390:Src/usbd_midi_if.c **** + 391:Src/usbd_midi_if.c **** switch(analyzed_status[cable_num].type){ + 1274 .loc 1 391 0 + 1275 000a 0400 movs r4, r0 + 1276 000c 8200 lsls r2, r0, #2 + 1277 000e 504B ldr r3, .L136 + 1278 0010 9B18 adds r3, r3, r2 + 1279 0012 5B78 ldrb r3, [r3, #1] + 1280 0014 022B cmp r3, #2 + 1281 0016 18D0 beq .L116 + 1282 0018 04D8 bhi .L117 + 1283 001a 012B cmp r3, #1 + 1284 001c 23D1 bne .L115 + 392:Src/usbd_midi_if.c **** + 393:Src/usbd_midi_if.c **** case MSG_ONE_BYTE: + 394:Src/usbd_midi_if.c **** //byte 0: cable number + code index number + 395:Src/usbd_midi_if.c **** msg_buf[0] = (cable_num << 4) + ((midi_event[cable_num].midi_byte[0] & 0xF0) >> 4); + 396:Src/usbd_midi_if.c **** + 397:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 398:Src/usbd_midi_if.c **** break; + 399:Src/usbd_midi_if.c **** + 400:Src/usbd_midi_if.c **** case MSG_TWO_BYTE: + 401:Src/usbd_midi_if.c **** case MSG_THREE_BYTE: + 402:Src/usbd_midi_if.c **** //byte 0: cable number + code index number + 403:Src/usbd_midi_if.c **** if(analyzed_status[cable_num].is_system_common){ + 404:Src/usbd_midi_if.c **** msg_buf[0] = (cable_num << 4) + midi_event[cable_num].length; + 405:Src/usbd_midi_if.c **** }else{ + 406:Src/usbd_midi_if.c **** msg_buf[0] = (cable_num << 4) + ((midi_event[cable_num].midi_byte[0] & 0xF0) >> 4); + 407:Src/usbd_midi_if.c **** } + 408:Src/usbd_midi_if.c **** + 409:Src/usbd_midi_if.c **** //byte 1-3 + 410:Src/usbd_midi_if.c **** for(uint32_t i=0; i<midi_event[cable_num].length; i++){ + 411:Src/usbd_midi_if.c **** msg_buf[i+1] = midi_event[cable_num].midi_byte[i]; + 412:Src/usbd_midi_if.c **** } + 413:Src/usbd_midi_if.c **** + 414:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 415:Src/usbd_midi_if.c **** break; + 416:Src/usbd_midi_if.c **** + 417:Src/usbd_midi_if.c **** case MSG_SYSEX: + 418:Src/usbd_midi_if.c **** for(cnt_length = 0; cnt_length < midi_event[cable_num].length; cnt_length++){ + 1285 .loc 1 418 0 + ARM GAS /tmp/ccjHqQBe.s page 33 + + + 1286 001e 0026 movs r6, #0 + 389:Src/usbd_midi_if.c **** uint32_t cnt_remain=0, cnt_length; + 1287 .loc 1 389 0 + 1288 0020 0025 movs r5, #0 + 1289 0022 7CE0 b .L118 + 1290 .L117: + 391:Src/usbd_midi_if.c **** + 1291 .loc 1 391 0 + 1292 0024 042B cmp r3, #4 + 1293 0026 1ED8 bhi .L115 + 403:Src/usbd_midi_if.c **** msg_buf[0] = (cable_num << 4) + midi_event[cable_num].length; + 1294 .loc 1 403 0 + 1295 0028 8200 lsls r2, r0, #2 + 1296 002a 494B ldr r3, .L136 + 1297 002c 9B18 adds r3, r3, r2 + 1298 002e 9B78 ldrb r3, [r3, #2] + 1299 0030 002B cmp r3, #0 + 1300 0032 1CD0 beq .L120 + 404:Src/usbd_midi_if.c **** }else{ + 1301 .loc 1 404 0 + 1302 0034 0301 lsls r3, r0, #4 + 1303 0036 DBB2 uxtb r3, r3 + 1304 0038 8201 lsls r2, r0, #6 + 1305 003a 1718 adds r7, r2, r0 + 1306 003c 454A ldr r2, .L136+4 + 1307 003e BA5C ldrb r2, [r7, r2] + 1308 0040 9B18 adds r3, r3, r2 + 1309 0042 01AA add r2, sp, #4 + 1310 0044 1370 strb r3, [r2] + 1311 .L121: + 387:Src/usbd_midi_if.c **** uint8_t msg_buf[4] = {0x00,0x00,0x00,0x00}; + 1312 .loc 1 387 0 discriminator 1 + 1313 0046 0021 movs r1, #0 + 1314 0048 27E0 b .L122 + 1315 .L116: + 395:Src/usbd_midi_if.c **** + 1316 .loc 1 395 0 + 1317 004a 0301 lsls r3, r0, #4 + 1318 004c DBB2 uxtb r3, r3 + 1319 004e 8201 lsls r2, r0, #6 + 1320 0050 1218 adds r2, r2, r0 + 1321 0052 404F ldr r7, .L136+4 + 1322 0054 BF18 adds r7, r7, r2 + 1323 0056 7A78 ldrb r2, [r7, #1] + 1324 0058 1209 lsrs r2, r2, #4 + 1325 005a 9B18 adds r3, r3, r2 + 1326 005c 01A8 add r0, sp, #4 + 1327 .LVL106: + 1328 005e 0370 strb r3, [r0] + 397:Src/usbd_midi_if.c **** break; + 1329 .loc 1 397 0 + 1330 0060 0421 movs r1, #4 + 1331 0062 FFF7FEFF bl sendMidiMessage + 1332 .LVL107: + 1333 .L115: + 419:Src/usbd_midi_if.c **** if( 0xF7 !=midi_event[cable_num].midi_byte[cnt_length] ){ + 420:Src/usbd_midi_if.c **** if(2 == cnt_remain){ + ARM GAS /tmp/ccjHqQBe.s page 34 + + + 421:Src/usbd_midi_if.c **** msg_buf[3] = midi_event[cable_num].midi_byte[cnt_length]; + 422:Src/usbd_midi_if.c **** msg_buf[0] = (cable_num << 4) + 0x4; //SysEx starts or continues + 423:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 424:Src/usbd_midi_if.c **** }else{ + 425:Src/usbd_midi_if.c **** msg_buf[1 + cnt_remain] = midi_event[cable_num].midi_byte[cnt_length]; + 426:Src/usbd_midi_if.c **** } + 427:Src/usbd_midi_if.c **** + 428:Src/usbd_midi_if.c **** + 429:Src/usbd_midi_if.c **** }else{ + 430:Src/usbd_midi_if.c **** + 431:Src/usbd_midi_if.c **** switch (cnt_remain) { + 432:Src/usbd_midi_if.c **** case 0: + 433:Src/usbd_midi_if.c **** msg_buf[0] = (cable_num << 4) + 0x5; //SysEx ends with following single byte + 434:Src/usbd_midi_if.c **** msg_buf[1] = 0xF7; + 435:Src/usbd_midi_if.c **** msg_buf[2] = msg_buf[3] = 0x00; + 436:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 437:Src/usbd_midi_if.c **** break; + 438:Src/usbd_midi_if.c **** + 439:Src/usbd_midi_if.c **** case 1: + 440:Src/usbd_midi_if.c **** msg_buf[0] = (cable_num << 4) + 0x6; //SysEx ends with following two bytes. + 441:Src/usbd_midi_if.c **** msg_buf[2] = 0xF7; + 442:Src/usbd_midi_if.c **** msg_buf[3] = 0x00; + 443:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 444:Src/usbd_midi_if.c **** break; + 445:Src/usbd_midi_if.c **** + 446:Src/usbd_midi_if.c **** case 2: + 447:Src/usbd_midi_if.c **** msg_buf[0] = (cable_num << 4) + 0x7; //SysEx ends with following three bytes. + 448:Src/usbd_midi_if.c **** msg_buf[3] = 0xF7; + 449:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 450:Src/usbd_midi_if.c **** break; + 451:Src/usbd_midi_if.c **** default: + 452:Src/usbd_midi_if.c **** break; + 453:Src/usbd_midi_if.c **** } + 454:Src/usbd_midi_if.c **** } + 455:Src/usbd_midi_if.c **** + 456:Src/usbd_midi_if.c **** cnt_remain++; + 457:Src/usbd_midi_if.c **** if(cnt_remain >=3){ + 458:Src/usbd_midi_if.c **** cnt_remain = 0; + 459:Src/usbd_midi_if.c **** } + 460:Src/usbd_midi_if.c **** } + 461:Src/usbd_midi_if.c **** break; + 462:Src/usbd_midi_if.c **** + 463:Src/usbd_midi_if.c **** default: + 464:Src/usbd_midi_if.c **** break; + 465:Src/usbd_midi_if.c **** } + 466:Src/usbd_midi_if.c **** USBD_MIDI_SendPacket(); + 1334 .loc 1 466 0 + 1335 0066 FFF7FEFF bl USBD_MIDI_SendPacket + 1336 .LVL108: + 467:Src/usbd_midi_if.c **** } + 1337 .loc 1 467 0 + 1338 006a 03B0 add sp, sp, #12 + 1339 @ sp needed + 1340 006c F0BD pop {r4, r5, r6, r7, pc} + 1341 .LVL109: + 1342 .L120: + 406:Src/usbd_midi_if.c **** } + ARM GAS /tmp/ccjHqQBe.s page 35 + + + 1343 .loc 1 406 0 + 1344 006e 0301 lsls r3, r0, #4 + 1345 0070 DBB2 uxtb r3, r3 + 1346 0072 8201 lsls r2, r0, #6 + 1347 0074 1218 adds r2, r2, r0 + 1348 0076 374F ldr r7, .L136+4 + 1349 0078 BF18 adds r7, r7, r2 + 1350 007a 7A78 ldrb r2, [r7, #1] + 1351 007c 1209 lsrs r2, r2, #4 + 1352 007e 9B18 adds r3, r3, r2 + 1353 0080 01AA add r2, sp, #4 + 1354 0082 1370 strb r3, [r2] + 1355 0084 DFE7 b .L121 + 1356 .LVL110: + 1357 .L123: + 1358 .LBB5: + 411:Src/usbd_midi_if.c **** } + 1359 .loc 1 411 0 discriminator 3 + 1360 0086 481C adds r0, r1, #1 + 1361 0088 A201 lsls r2, r4, #6 + 1362 008a 1219 adds r2, r2, r4 + 1363 008c 314B ldr r3, .L136+4 + 1364 008e 9B18 adds r3, r3, r2 + 1365 0090 5B18 adds r3, r3, r1 + 1366 0092 5A78 ldrb r2, [r3, #1] + 1367 0094 01AB add r3, sp, #4 + 1368 0096 1A54 strb r2, [r3, r0] + 1369 .LVL111: + 410:Src/usbd_midi_if.c **** msg_buf[i+1] = midi_event[cable_num].midi_byte[i]; + 1370 .loc 1 410 0 discriminator 3 + 1371 0098 0100 movs r1, r0 + 1372 .LVL112: + 1373 .L122: + 410:Src/usbd_midi_if.c **** msg_buf[i+1] = midi_event[cable_num].midi_byte[i]; + 1374 .loc 1 410 0 is_stmt 0 discriminator 1 + 1375 009a A201 lsls r2, r4, #6 + 1376 009c 1219 adds r2, r2, r4 + 1377 009e 2D4B ldr r3, .L136+4 + 1378 00a0 D35C ldrb r3, [r2, r3] + 1379 00a2 8B42 cmp r3, r1 + 1380 00a4 EFD8 bhi .L123 + 1381 .LBE5: + 414:Src/usbd_midi_if.c **** break; + 1382 .loc 1 414 0 is_stmt 1 + 1383 00a6 0421 movs r1, #4 + 1384 .LVL113: + 1385 00a8 01A8 add r0, sp, #4 + 1386 00aa FFF7FEFF bl sendMidiMessage + 1387 .LVL114: + 415:Src/usbd_midi_if.c **** + 1388 .loc 1 415 0 + 1389 00ae DAE7 b .L115 + 1390 .LVL115: + 1391 .L135: + 421:Src/usbd_midi_if.c **** msg_buf[0] = (cable_num << 4) + 0x4; //SysEx starts or continues + 1392 .loc 1 421 0 + 1393 00b0 01A8 add r0, sp, #4 + ARM GAS /tmp/ccjHqQBe.s page 36 + + + 1394 00b2 C370 strb r3, [r0, #3] + 422:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 1395 .loc 1 422 0 + 1396 00b4 3B01 lsls r3, r7, #4 + 1397 00b6 DBB2 uxtb r3, r3 + 1398 00b8 0433 adds r3, r3, #4 + 1399 00ba 0370 strb r3, [r0] + 423:Src/usbd_midi_if.c **** }else{ + 1400 .loc 1 423 0 + 1401 00bc 0421 movs r1, #4 + 1402 00be FFF7FEFF bl sendMidiMessage + 1403 .LVL116: + 1404 00c2 3FE0 b .L126 + 1405 .L124: + 431:Src/usbd_midi_if.c **** case 0: + 1406 .loc 1 431 0 + 1407 00c4 012D cmp r5, #1 + 1408 00c6 1CD0 beq .L127 + 1409 00c8 002D cmp r5, #0 + 1410 00ca 0CD0 beq .L128 + 1411 00cc 022D cmp r5, #2 + 1412 00ce 39D1 bne .L126 + 447:Src/usbd_midi_if.c **** msg_buf[3] = 0xF7; + 1413 .loc 1 447 0 + 1414 00d0 3B01 lsls r3, r7, #4 + 1415 00d2 DBB2 uxtb r3, r3 + 1416 00d4 0733 adds r3, r3, #7 + 1417 00d6 01A8 add r0, sp, #4 + 1418 00d8 0370 strb r3, [r0] + 448:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 1419 .loc 1 448 0 + 1420 00da F723 movs r3, #247 + 1421 00dc C370 strb r3, [r0, #3] + 449:Src/usbd_midi_if.c **** break; + 1422 .loc 1 449 0 + 1423 00de 0421 movs r1, #4 + 1424 00e0 FFF7FEFF bl sendMidiMessage + 1425 .LVL117: + 450:Src/usbd_midi_if.c **** default: + 1426 .loc 1 450 0 + 1427 00e4 2EE0 b .L126 + 1428 .L128: + 433:Src/usbd_midi_if.c **** msg_buf[1] = 0xF7; + 1429 .loc 1 433 0 + 1430 00e6 3B01 lsls r3, r7, #4 + 1431 00e8 DBB2 uxtb r3, r3 + 1432 00ea 0533 adds r3, r3, #5 + 1433 00ec 01A8 add r0, sp, #4 + 1434 00ee 0370 strb r3, [r0] + 434:Src/usbd_midi_if.c **** msg_buf[2] = msg_buf[3] = 0x00; + 1435 .loc 1 434 0 + 1436 00f0 F723 movs r3, #247 + 1437 00f2 4370 strb r3, [r0, #1] + 435:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 1438 .loc 1 435 0 + 1439 00f4 0023 movs r3, #0 + 1440 00f6 C370 strb r3, [r0, #3] + ARM GAS /tmp/ccjHqQBe.s page 37 + + + 1441 00f8 8370 strb r3, [r0, #2] + 436:Src/usbd_midi_if.c **** break; + 1442 .loc 1 436 0 + 1443 00fa 0421 movs r1, #4 + 1444 00fc FFF7FEFF bl sendMidiMessage + 1445 .LVL118: + 437:Src/usbd_midi_if.c **** + 1446 .loc 1 437 0 + 1447 0100 20E0 b .L126 + 1448 .L127: + 440:Src/usbd_midi_if.c **** msg_buf[2] = 0xF7; + 1449 .loc 1 440 0 + 1450 0102 3B01 lsls r3, r7, #4 + 1451 0104 DBB2 uxtb r3, r3 + 1452 0106 0633 adds r3, r3, #6 + 1453 0108 01A8 add r0, sp, #4 + 1454 010a 0370 strb r3, [r0] + 441:Src/usbd_midi_if.c **** msg_buf[3] = 0x00; + 1455 .loc 1 441 0 + 1456 010c F723 movs r3, #247 + 1457 010e 8370 strb r3, [r0, #2] + 442:Src/usbd_midi_if.c **** sendMidiMessage(msg_buf,4); + 1458 .loc 1 442 0 + 1459 0110 0023 movs r3, #0 + 1460 0112 C370 strb r3, [r0, #3] + 443:Src/usbd_midi_if.c **** break; + 1461 .loc 1 443 0 + 1462 0114 0421 movs r1, #4 + 1463 0116 FFF7FEFF bl sendMidiMessage + 1464 .LVL119: + 444:Src/usbd_midi_if.c **** + 1465 .loc 1 444 0 + 1466 011a 13E0 b .L126 + 1467 .LVL120: + 1468 .L130: + 418:Src/usbd_midi_if.c **** if( 0xF7 !=midi_event[cable_num].midi_byte[cnt_length] ){ + 1469 .loc 1 418 0 discriminator 2 + 1470 011c 0136 adds r6, r6, #1 + 1471 .LVL121: + 1472 .L118: + 418:Src/usbd_midi_if.c **** if( 0xF7 !=midi_event[cable_num].midi_byte[cnt_length] ){ + 1473 .loc 1 418 0 is_stmt 0 discriminator 1 + 1474 011e A301 lsls r3, r4, #6 + 1475 0120 1B19 adds r3, r3, r4 + 1476 0122 0C4A ldr r2, .L136+4 + 1477 0124 9B5C ldrb r3, [r3, r2] + 1478 0126 B342 cmp r3, r6 + 1479 0128 9DD9 bls .L115 + 419:Src/usbd_midi_if.c **** if(2 == cnt_remain){ + 1480 .loc 1 419 0 is_stmt 1 + 1481 012a A201 lsls r2, r4, #6 + 1482 012c 1219 adds r2, r2, r4 + 1483 012e 094B ldr r3, .L136+4 + 1484 0130 9B18 adds r3, r3, r2 + 1485 0132 9B19 adds r3, r3, r6 + 1486 0134 5B78 ldrb r3, [r3, #1] + 1487 0136 F72B cmp r3, #247 + ARM GAS /tmp/ccjHqQBe.s page 38 + + + 1488 0138 C4D0 beq .L124 + 420:Src/usbd_midi_if.c **** msg_buf[3] = midi_event[cable_num].midi_byte[cnt_length]; + 1489 .loc 1 420 0 + 1490 013a 022D cmp r5, #2 + 1491 013c B8D0 beq .L135 + 425:Src/usbd_midi_if.c **** } + 1492 .loc 1 425 0 + 1493 013e 6A1C adds r2, r5, #1 + 1494 0140 01A9 add r1, sp, #4 + 1495 0142 8B54 strb r3, [r1, r2] + 1496 .L126: + 456:Src/usbd_midi_if.c **** if(cnt_remain >=3){ + 1497 .loc 1 456 0 + 1498 0144 0135 adds r5, r5, #1 + 1499 .LVL122: + 457:Src/usbd_midi_if.c **** cnt_remain = 0; + 1500 .loc 1 457 0 + 1501 0146 022D cmp r5, #2 + 1502 0148 E8D9 bls .L130 + 458:Src/usbd_midi_if.c **** } + 1503 .loc 1 458 0 + 1504 014a 0025 movs r5, #0 + 1505 .LVL123: + 1506 014c E6E7 b .L130 + 1507 .L137: + 1508 014e C046 .align 2 + 1509 .L136: + 1510 0150 00000000 .word analyzed_status + 1511 0154 00000000 .word midi_event + 1512 .cfi_endproc + 1513 .LFE54: + 1515 .section .text.midiProcess,"ax",%progbits + 1516 .align 1 + 1517 .global midiProcess + 1518 .syntax unified + 1519 .code 16 + 1520 .thumb_func + 1521 .fpu softvfp + 1523 midiProcess: + 1524 .LFB55: + 468:Src/usbd_midi_if.c **** + 469:Src/usbd_midi_if.c **** void midiProcess(){ + 1525 .loc 1 469 0 + 1526 .cfi_startproc + 1527 @ args = 0, pretend = 0, frame = 0 + 1528 @ frame_needed = 0, uses_anonymous_args = 0 + 1529 0000 70B5 push {r4, r5, r6, lr} + 1530 .LCFI15: + 1531 .cfi_def_cfa_offset 16 + 1532 .cfi_offset 4, -16 + 1533 .cfi_offset 5, -12 + 1534 .cfi_offset 6, -8 + 1535 .cfi_offset 14, -4 + 1536 .LVL124: + 1537 .LBB6: + 470:Src/usbd_midi_if.c **** + 471:Src/usbd_midi_if.c **** for(uint32_t cable_num=0; cable_num<MIDI_IN_JACK_NUM; cable_num++){ + ARM GAS /tmp/ccjHqQBe.s page 39 + + + 1538 .loc 1 471 0 + 1539 0002 0025 movs r5, #0 + 1540 .LVL125: + 1541 .L139: + 1542 .loc 1 471 0 is_stmt 0 discriminator 1 + 1543 0004 002D cmp r5, #0 + 1544 0006 00D0 beq .L140 + 1545 .LBE6: + 472:Src/usbd_midi_if.c **** while( FUNC_SUCCESS == midiGetFromJackRx(cable_num) ){ + 473:Src/usbd_midi_if.c **** if( midiEventIsGenerated(cable_num) ){// Generate MIDI event from UART buffer. + 474:Src/usbd_midi_if.c **** //Analyze MIDI Message. + 475:Src/usbd_midi_if.c **** midiGenerateUsbPacket(cable_num); + 476:Src/usbd_midi_if.c **** } + 477:Src/usbd_midi_if.c **** } + 478:Src/usbd_midi_if.c **** } + 479:Src/usbd_midi_if.c **** } + 1546 .loc 1 479 0 is_stmt 1 + 1547 @ sp needed + 1548 .LVL126: + 1549 0008 70BD pop {r4, r5, r6, pc} + 1550 .LVL127: + 1551 .L140: + 1552 .LBB7: + 472:Src/usbd_midi_if.c **** while( FUNC_SUCCESS == midiGetFromJackRx(cable_num) ){ + 1553 .loc 1 472 0 + 1554 000a ECB2 uxtb r4, r5 + 1555 000c 2000 movs r0, r4 + 1556 000e FFF7FEFF bl midiGetFromJackRx + 1557 .LVL128: + 1558 0012 0128 cmp r0, #1 + 1559 0014 08D1 bne .L143 + 473:Src/usbd_midi_if.c **** //Analyze MIDI Message. + 1560 .loc 1 473 0 + 1561 0016 2000 movs r0, r4 + 1562 0018 FFF7FEFF bl midiEventIsGenerated + 1563 .LVL129: + 1564 001c 0028 cmp r0, #0 + 1565 001e F4D0 beq .L140 + 475:Src/usbd_midi_if.c **** } + 1566 .loc 1 475 0 + 1567 0020 2000 movs r0, r4 + 1568 0022 FFF7FEFF bl midiGenerateUsbPacket + 1569 .LVL130: + 1570 0026 F0E7 b .L140 + 1571 .L143: + 471:Src/usbd_midi_if.c **** while( FUNC_SUCCESS == midiGetFromJackRx(cable_num) ){ + 1572 .loc 1 471 0 discriminator 2 + 1573 0028 0135 adds r5, r5, #1 + 1574 .LVL131: + 1575 002a EBE7 b .L139 + 1576 .LBE7: + 1577 .cfi_endproc + 1578 .LFE55: + 1580 .global USBD_Interface_fops_FS + 1581 .comm rx_midi_msg,1,4 + 1582 .comm midi_event,65,4 + 1583 .comm analyzed_status,4,4 + ARM GAS /tmp/ccjHqQBe.s page 40 + + + 1584 .comm rbuf_jack_rx,12,4 + 1585 .comm rbuf_usb_rx,12,4 + 1586 .section .data.USBD_Interface_fops_FS,"aw",%progbits + 1587 .align 2 + 1590 USBD_Interface_fops_FS: + 1591 0000 00000000 .word MIDI_DataRx + 1592 0004 00000000 .word MIDI_DataTx + 1593 .text + 1594 .Letext0: + 1595 .file 2 "/usr/include/newlib/machine/_default_types.h" + 1596 .file 3 "/usr/include/newlib/sys/lock.h" + 1597 .file 4 "/usr/include/newlib/sys/_types.h" + 1598 .file 5 "/usr/lib/gcc/arm-none-eabi/7.3.1/include/stddef.h" + 1599 .file 6 "/usr/include/newlib/sys/reent.h" + 1600 .file 7 "/usr/include/newlib/sys/_stdint.h" + 1601 .file 8 "/usr/include/newlib/stdlib.h" + 1602 .file 9 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 1603 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + 1604 .file 11 "Middlewares/ST/STM32_USB_Device_Library/Core/Inc/usbd_def.h" + 1605 .file 12 "Middlewares/USBMIDI/Inc/usbd_midi.h" + 1606 .file 13 "Inc/usbd_desc.h" + 1607 .file 14 "Inc/curelib_inc/curemisc.h" + 1608 .file 15 "Inc/curelib_inc/curebuffer.h" + 1609 .file 16 "Inc/usbd_midi_if.h" + ARM GAS /tmp/ccjHqQBe.s page 41 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 usbd_midi_if.c + /tmp/ccjHqQBe.s:16 .text.MIDI_DataTx:0000000000000000 $t + /tmp/ccjHqQBe.s:22 .text.MIDI_DataTx:0000000000000000 MIDI_DataTx + /tmp/ccjHqQBe.s:76 .text.MIDI_DataTx:000000000000002c $d + /tmp/ccjHqQBe.s:82 .text.MIDI_DataRx:0000000000000000 $t + /tmp/ccjHqQBe.s:88 .text.MIDI_DataRx:0000000000000000 MIDI_DataRx + /tmp/ccjHqQBe.s:225 .rodata.MIDI_DataRx:0000000000000000 $d + /tmp/ccjHqQBe.s:247 .text.MIDI_DataRx:0000000000000080 $d + *COM*:000000000000000c rbuf_usb_rx + /tmp/ccjHqQBe.s:255 .text.midiInit:0000000000000000 $t + /tmp/ccjHqQBe.s:262 .text.midiInit:0000000000000000 midiInit + /tmp/ccjHqQBe.s:390 .text.midiInit:0000000000000088 $d + *COM*:000000000000000c rbuf_jack_rx + *COM*:0000000000000001 rx_midi_msg + *COM*:0000000000000004 analyzed_status + *COM*:0000000000000041 midi_event + /tmp/ccjHqQBe.s:399 .text.midiGetFromUsbRx:0000000000000000 $t + /tmp/ccjHqQBe.s:406 .text.midiGetFromUsbRx:0000000000000000 midiGetFromUsbRx + /tmp/ccjHqQBe.s:442 .text.midiGetFromUsbRx:000000000000001c $d + /tmp/ccjHqQBe.s:447 .text.midiGetFromJackRx:0000000000000000 $t + /tmp/ccjHqQBe.s:454 .text.midiGetFromJackRx:0000000000000000 midiGetFromJackRx + /tmp/ccjHqQBe.s:492 .text.midiGetFromJackRx:0000000000000020 $d + /tmp/ccjHqQBe.s:498 .text.midiSetFromJackRx:0000000000000000 $t + /tmp/ccjHqQBe.s:505 .text.midiSetFromJackRx:0000000000000000 midiSetFromJackRx + /tmp/ccjHqQBe.s:541 .text.midiSetFromJackRx:000000000000001c $d + /tmp/ccjHqQBe.s:546 .text.isUsbRxBufEmpty:0000000000000000 $t + /tmp/ccjHqQBe.s:553 .text.isUsbRxBufEmpty:0000000000000000 isUsbRxBufEmpty + /tmp/ccjHqQBe.s:589 .text.isUsbRxBufEmpty:000000000000001c $d + /tmp/ccjHqQBe.s:594 .text.isJackRxBufEmpty:0000000000000000 $t + /tmp/ccjHqQBe.s:601 .text.isJackRxBufEmpty:0000000000000000 isJackRxBufEmpty + /tmp/ccjHqQBe.s:637 .text.isJackRxBufEmpty:000000000000001c $d + /tmp/ccjHqQBe.s:642 .text.isRxBufEmpty:0000000000000000 $t + /tmp/ccjHqQBe.s:649 .text.isRxBufEmpty:0000000000000000 isRxBufEmpty + /tmp/ccjHqQBe.s:724 .text.isRxBufEmpty:0000000000000048 $d + /tmp/ccjHqQBe.s:730 .text.sendMidiMessage:0000000000000000 $t + /tmp/ccjHqQBe.s:737 .text.sendMidiMessage:0000000000000000 sendMidiMessage + /tmp/ccjHqQBe.s:768 .text.midiEventIsGenerated:0000000000000000 $t + /tmp/ccjHqQBe.s:775 .text.midiEventIsGenerated:0000000000000000 midiEventIsGenerated + /tmp/ccjHqQBe.s:880 .rodata.midiEventIsGenerated:0000000000000000 $d + /tmp/ccjHqQBe.s:1236 .text.midiEventIsGenerated:0000000000000240 $d + /tmp/ccjHqQBe.s:1244 .text.midiGenerateUsbPacket:0000000000000000 $t + /tmp/ccjHqQBe.s:1251 .text.midiGenerateUsbPacket:0000000000000000 midiGenerateUsbPacket + /tmp/ccjHqQBe.s:1510 .text.midiGenerateUsbPacket:0000000000000150 $d + /tmp/ccjHqQBe.s:1516 .text.midiProcess:0000000000000000 $t + /tmp/ccjHqQBe.s:1523 .text.midiProcess:0000000000000000 midiProcess + /tmp/ccjHqQBe.s:1590 .data.USBD_Interface_fops_FS:0000000000000000 USBD_Interface_fops_FS + /tmp/ccjHqQBe.s:1587 .data.USBD_Interface_fops_FS:0000000000000000 $d + +UNDEFINED SYMBOLS +APP_Rx_ptr_in +APP_Rx_Buffer +cureRingBufferU8Enqueue +cureRingBufferU8Init +cureRingBufferU8Dequeue +_cureRingBufferU8GetUsedSize +USBD_MIDI_SendPacket + ARM GAS /tmp/ccjHqQBe.s page 42 + + diff --git a/fw/midi-dials/build/usbd_midi_if.o b/fw/midi-dials/build/usbd_midi_if.o Binary files differnew file mode 100644 index 0000000..bf7ad76 --- /dev/null +++ b/fw/midi-dials/build/usbd_midi_if.o |