diff options
Diffstat (limited to 'fw/midi-dials/build/stm32f0xx_hal_gpio.lst')
| -rw-r--r-- | fw/midi-dials/build/stm32f0xx_hal_gpio.lst | 1501 |
1 files changed, 1501 insertions, 0 deletions
diff --git a/fw/midi-dials/build/stm32f0xx_hal_gpio.lst b/fw/midi-dials/build/stm32f0xx_hal_gpio.lst new file mode 100644 index 0000000..764228d --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_hal_gpio.lst @@ -0,0 +1,1501 @@ +ARM GAS /tmp/cclHgak8.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_hal_gpio.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.HAL_GPIO_Init,"ax",%progbits + 16 .align 1 + 17 .global HAL_GPIO_Init + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 HAL_GPIO_Init: + 24 .LFB40: + 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c" + 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @file stm32f0xx_hal_gpio.c + 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @author MCD Application Team + 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO HAL module driver. + 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This file provides firmware functions to manage the following + 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * functionalities of the General Purpose Input/Output (GPIO) peripheral: + 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + Initialization and de-initialization functions + 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + IO operation functions + 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### GPIO Peripheral features ##### + 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** [..] + 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually + 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** configured by software in several modes: + 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Input mode + 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Analog mode + 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Output mode + 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Alternate function mode + 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) External interrupt/event lines + 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) During and just after reset, the alternate functions and external interrupt + 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** lines are not active and the I/O ports are configured in input floating mode. + 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be + 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** activated or not. + 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull + 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** type and the IO speed can be selected depending on the VDD value. + 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) The microcontroller IO pins are connected to onboard peripherals/modules through a + ARM GAS /tmp/cclHgak8.s page 2 + + + 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** multiplexer that allows only one peripheral alternate function (AF) connected + 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** to an IO pin at a time. In this way, there can be no conflict between peripherals + 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** sharing the same IO pin. + 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) All ports have external interrupt/event capability. To use external interrupt + 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** lines, the port must be configured in input mode. All available GPIO pins are + 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** connected to the 16 external interrupt/event lines from EXTI0 to EXTI15. + 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (+) The external interrupt/event controller consists of up to 28 edge detectors + 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (16 lines are connected to GPIO) for generating event/interrupt requests (each + 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** input line can be independently configured to select the type (interrupt or event) + 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** and the corresponding trigger event (rising or falling or both). Each line can + 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** also be masked independently. + 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### How to use this driver ##### + 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ============================================================================== + 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** [..] + 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) Enable the GPIO AHB clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE(). + 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) Configure the GPIO pin(s) using HAL_GPIO_Init(). + 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure + 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef + 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** structure. + 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In case of Output or alternate function mode selection: the speed is + 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** configured through "Speed" member from GPIO_InitTypeDef structure. + 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In alternate mode is selection, the alternate function connected to the IO + 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** is configured through "Alternate" member from GPIO_InitTypeDef structure. + 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) Analog mode is required when a pin is to be used as ADC channel + 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** or DAC output. + 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (++) In case of external interrupt/event selection the "Mode" member from + 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_InitTypeDef structure select the type (interrupt or event) and + 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both). + 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority + 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using + 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_NVIC_EnableIRQ(). + 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also + 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** recommended to use it to unconfigure pin which was used as an external interrupt + 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG + 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** registers. + 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin(). + 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use + 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin(). + 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin(). + 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) During and just after reset, the alternate functions are not + 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** active and the GPIO pins are configured in input floating mode (except JTAG + 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** pins). + 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose + 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has + 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** priority over the GPIO function. + 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + ARM GAS /tmp/cclHgak8.s page 3 + + + 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as + 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** general purpose PF0 and PF1, respectively, when the HSE oscillator is off. + 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** The HSE has priority over the GPIO function. + 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @attention + 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics. + 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * All rights reserved.</center></h2> + 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This software component is licensed by ST under BSD 3-Clause license, + 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the "License"; You may not use this file except in compliance with the + 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * License. You may obtain a copy of the License at: + 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * opensource.org/licenses/BSD-3-Clause + 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ****************************************************************************** + 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Includes ------------------------------------------------------------------*/ + 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #include "stm32f0xx_hal.h" + 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @addtogroup STM32F0xx_HAL_Driver + 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO GPIO + 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO HAL module driver + 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** MISRA C:2012 deviation rule has been granted for following rules: + 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * Rule-18.1_d - Medium: Array pointer `GPIOx' is accessed with index [..,..] + 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * which may be out of array bounds [..,UNKNOWN] in following APIs: + 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * HAL_GPIO_Init + 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * HAL_GPIO_DeInit + 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #ifdef HAL_GPIO_MODULE_ENABLED + 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private typedef -----------------------------------------------------------*/ + 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private defines -----------------------------------------------------------*/ + 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Private_Defines GPIO Private Defines + 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_MODE (0x00000003U) + 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define EXTI_MODE (0x10000000U) + 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_MODE_IT (0x00010000U) + 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_MODE_EVT (0x00020000U) + 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define RISING_EDGE (0x00100000U) + 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define FALLING_EDGE (0x00200000U) + 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_OUTPUT_TYPE (0x00000010U) + 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** #define GPIO_NUMBER (16U) + 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @} + 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + ARM GAS /tmp/cclHgak8.s page 4 + + + 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private macros ------------------------------------------------------------*/ + 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private variables ---------------------------------------------------------*/ + 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Private function prototypes -----------------------------------------------*/ + 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Exported functions --------------------------------------------------------*/ + 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions GPIO Exported Functions + 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions + 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Initialization and Configuration functions + 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### Initialization and de-initialization functions ##### + 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init. + 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains + 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the configuration information for the specified GPIO peripheral. + 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) + 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 26 .loc 1 178 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 8 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 .LVL0: + 31 0000 F0B5 push {r4, r5, r6, r7, lr} + 32 .LCFI0: + 33 .cfi_def_cfa_offset 20 + 34 .cfi_offset 4, -20 + 35 .cfi_offset 5, -16 + 36 .cfi_offset 6, -12 + 37 .cfi_offset 7, -8 + 38 .cfi_offset 14, -4 + 39 0002 C646 mov lr, r8 + 40 0004 00B5 push {lr} + 41 .LCFI1: + 42 .cfi_def_cfa_offset 24 + 43 .cfi_offset 8, -24 + 44 0006 82B0 sub sp, sp, #8 + 45 .LCFI2: + 46 .cfi_def_cfa_offset 32 + 47 .LVL1: + 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t position = 0x00u; + 48 .loc 1 179 0 + 49 0008 0023 movs r3, #0 + 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + ARM GAS /tmp/cclHgak8.s page 5 + + + 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t temp; + 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); + 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); + 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); + 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the port pins */ + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** while (((GPIO_Init->Pin) >> position) != 0x00u) + 50 .loc 1 190 0 + 51 000a 38E0 b .L2 + 52 .LVL2: + 53 .L20: + 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Get current io position */ + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** iocurrent = (GPIO_Init->Pin) & (1uL << position); + 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (iocurrent != 0x00u) + 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*--------------------- GPIO Mode Configuration ------------------------*/ + 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* In case of Alternate function mode selection */ + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Alternate function parameters */ + 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure Alternate function mapped with the current IO */ + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->AFR[position >> 3u]; + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] = temp; + 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->MODER; + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* In case of Output or Alternate function mode selection */ + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the Speed parameter */ + 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); + 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the IO Speed */ + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->OSPEEDR; + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2u)); + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; + 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the IO Output Type */ + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->OTYPER; + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4u) << position); + ARM GAS /tmp/cclHgak8.s page 6 + + + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER = temp; + 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Activate the Pull-up or Pull down resistor for the current IO */ + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = GPIOx->PUPDR; + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*--------------------- EXTI Mode Configuration ------------------------*/ + 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) + 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Enable SYSCFG Clock */ + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __HAL_RCC_SYSCFG_CLK_ENABLE(); + 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = SYSCFG->EXTICR[position >> 2u]; + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 54 .loc 1 252 0 + 55 000c 0426 movs r6, #4 + 56 000e 00E0 b .L8 + 57 .L14: + 58 0010 0026 movs r6, #0 + 59 .L8: + 60 .loc 1 252 0 is_stmt 0 discriminator 20 + 61 0012 AE40 lsls r6, r6, r5 + 62 0014 3500 movs r5, r6 + 63 0016 3D43 orrs r5, r7 + 64 .LVL3: + 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 65 .loc 1 253 0 is_stmt 1 discriminator 20 + 66 0018 0234 adds r4, r4, #2 + 67 001a A400 lsls r4, r4, #2 + 68 001c 574E ldr r6, .L21 + 69 001e A551 str r5, [r4, r6] + 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->IMR; + 70 .loc 1 256 0 discriminator 20 + 71 0020 574C ldr r4, .L21+4 + 72 0022 2568 ldr r5, [r4] + 73 .LVL4: + 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 74 .loc 1 257 0 discriminator 20 + 75 0024 4246 mov r2, r8 + 76 0026 D443 mvns r4, r2 + 77 0028 2E00 movs r6, r5 + 78 002a 2640 ands r6, r4 + 79 .LVL5: + 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT) + 80 .loc 1 258 0 discriminator 20 + 81 002c 4A68 ldr r2, [r1, #4] + 82 002e D203 lsls r2, r2, #15 + 83 0030 02D5 bpl .L9 + 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + ARM GAS /tmp/cclHgak8.s page 7 + + + 84 .loc 1 260 0 + 85 0032 4246 mov r2, r8 + 86 0034 1543 orrs r5, r2 + 87 0036 2E00 movs r6, r5 + 88 .LVL6: + 89 .L9: + 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->IMR = temp; + 90 .loc 1 262 0 + 91 0038 514D ldr r5, .L21+4 + 92 003a 2E60 str r6, [r5] + 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->EMR; + 93 .loc 1 264 0 + 94 003c 6D68 ldr r5, [r5, #4] + 95 .LVL7: + 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 96 .loc 1 265 0 + 97 003e 2E00 movs r6, r5 + 98 0040 2640 ands r6, r4 + 99 .LVL8: + 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT) + 100 .loc 1 266 0 + 101 0042 4A68 ldr r2, [r1, #4] + 102 0044 9203 lsls r2, r2, #14 + 103 0046 02D5 bpl .L10 + 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 104 .loc 1 268 0 + 105 0048 4246 mov r2, r8 + 106 004a 1543 orrs r5, r2 + 107 004c 2E00 movs r6, r5 + 108 .LVL9: + 109 .L10: + 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR = temp; + 110 .loc 1 270 0 + 111 004e 4C4D ldr r5, .L21+4 + 112 0050 6E60 str r6, [r5, #4] + 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->RTSR; + 113 .loc 1 273 0 + 114 0052 AD68 ldr r5, [r5, #8] + 115 .LVL10: + 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 116 .loc 1 274 0 + 117 0054 2E00 movs r6, r5 + 118 0056 2640 ands r6, r4 + 119 .LVL11: + 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE) + 120 .loc 1 275 0 + 121 0058 4A68 ldr r2, [r1, #4] + 122 005a D202 lsls r2, r2, #11 + 123 005c 02D5 bpl .L11 + 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + ARM GAS /tmp/cclHgak8.s page 8 + + + 124 .loc 1 277 0 + 125 005e 4246 mov r2, r8 + 126 0060 1543 orrs r5, r2 + 127 0062 2E00 movs r6, r5 + 128 .LVL12: + 129 .L11: + 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR = temp; + 130 .loc 1 279 0 + 131 0064 464D ldr r5, .L21+4 + 132 0066 AE60 str r6, [r5, #8] + 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp = EXTI->FTSR; + 133 .loc 1 281 0 + 134 0068 ED68 ldr r5, [r5, #12] + 135 .LVL13: + 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(iocurrent); + 136 .loc 1 282 0 + 137 006a 2C40 ands r4, r5 + 138 .LVL14: + 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE) + 139 .loc 1 283 0 + 140 006c 4A68 ldr r2, [r1, #4] + 141 006e 9202 lsls r2, r2, #10 + 142 0070 02D5 bpl .L12 + 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= iocurrent; + 143 .loc 1 285 0 + 144 0072 4246 mov r2, r8 + 145 0074 2A43 orrs r2, r5 + 146 0076 1400 movs r4, r2 + 147 .LVL15: + 148 .L12: + 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR = temp; + 149 .loc 1 287 0 + 150 0078 414A ldr r2, .L21+4 + 151 007a D460 str r4, [r2, #12] + 152 .LVL16: + 153 .L3: + 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** position++; + 154 .loc 1 291 0 + 155 007c 0133 adds r3, r3, #1 + 156 .LVL17: + 157 .L2: + 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 158 .loc 1 190 0 + 159 007e 0A68 ldr r2, [r1] + 160 0080 1400 movs r4, r2 + 161 0082 DC40 lsrs r4, r4, r3 + 162 0084 76D0 beq .L19 + 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 163 .loc 1 193 0 + 164 0086 0125 movs r5, #1 + ARM GAS /tmp/cclHgak8.s page 9 + + + 165 0088 9D40 lsls r5, r5, r3 + 166 008a 2A40 ands r2, r5 + 167 008c 9046 mov r8, r2 + 168 .LVL18: + 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 169 .loc 1 195 0 + 170 008e F5D0 beq .L3 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 171 .loc 1 199 0 + 172 0090 4C68 ldr r4, [r1, #4] + 173 0092 022C cmp r4, #2 + 174 0094 01D0 beq .L4 + 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 175 .loc 1 199 0 is_stmt 0 discriminator 1 + 176 0096 122C cmp r4, #18 + 177 0098 0ED1 bne .L5 + 178 .L4: + 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0xFu << ((position & 0x07u) * 4u)); + 179 .loc 1 206 0 is_stmt 1 + 180 009a DC08 lsrs r4, r3, #3 + 181 009c 0834 adds r4, r4, #8 + 182 009e A400 lsls r4, r4, #2 + 183 00a0 2758 ldr r7, [r4, r0] + 184 .LVL19: + 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + 185 .loc 1 207 0 + 186 00a2 0726 movs r6, #7 + 187 00a4 1E40 ands r6, r3 + 188 00a6 B600 lsls r6, r6, #2 + 189 00a8 0F22 movs r2, #15 + 190 .LVL20: + 191 00aa B240 lsls r2, r2, r6 + 192 00ac 9743 bics r7, r2 + 193 .LVL21: + 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] = temp; + 194 .loc 1 208 0 + 195 00ae 0A69 ldr r2, [r1, #16] + 196 00b0 B240 lsls r2, r2, r6 + 197 00b2 1600 movs r6, r2 + 198 00b4 3E43 orrs r6, r7 + 199 .LVL22: + 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 200 .loc 1 209 0 + 201 00b6 2650 str r6, [r4, r0] + 202 .LVL23: + 203 .L5: + 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 204 .loc 1 213 0 + 205 00b8 0268 ldr r2, [r0] + 206 .LVL24: + 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + 207 .loc 1 214 0 + 208 00ba 5F00 lsls r7, r3, #1 + 209 00bc 0324 movs r4, #3 + 210 00be 2600 movs r6, r4 + 211 00c0 BE40 lsls r6, r6, r7 + 212 00c2 F643 mvns r6, r6 + ARM GAS /tmp/cclHgak8.s page 10 + + + 213 00c4 3240 ands r2, r6 + 214 .LVL25: + 215 00c6 9446 mov ip, r2 + 216 .LVL26: + 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER = temp; + 217 .loc 1 215 0 + 218 00c8 4A68 ldr r2, [r1, #4] + 219 .LVL27: + 220 00ca 1440 ands r4, r2 + 221 00cc BC40 lsls r4, r4, r7 + 222 00ce 6246 mov r2, ip + 223 00d0 1443 orrs r4, r2 + 224 .LVL28: + 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 225 .loc 1 216 0 + 226 00d2 0460 str r4, [r0] + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 227 .loc 1 219 0 + 228 00d4 4C68 ldr r4, [r1, #4] + 229 .LVL29: + 230 00d6 621E subs r2, r4, #1 + 231 00d8 012A cmp r2, #1 + 232 00da 03D9 bls .L6 + 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + 233 .loc 1 219 0 is_stmt 0 discriminator 1 + 234 00dc 112C cmp r4, #17 + 235 00de 01D0 beq .L6 + 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 236 .loc 1 220 0 is_stmt 1 + 237 00e0 122C cmp r4, #18 + 238 00e2 10D1 bne .L7 + 239 .L6: + 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 240 .loc 1 225 0 + 241 00e4 8468 ldr r4, [r0, #8] + 242 .LVL30: + 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_Init->Speed << (position * 2u)); + 243 .loc 1 226 0 + 244 00e6 3440 ands r4, r6 + 245 .LVL31: + 246 00e8 A446 mov ip, r4 + 247 .LVL32: + 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR = temp; + 248 .loc 1 227 0 + 249 00ea CC68 ldr r4, [r1, #12] + 250 .LVL33: + 251 00ec BC40 lsls r4, r4, r7 + 252 00ee 6246 mov r2, ip + 253 00f0 1443 orrs r4, r2 + 254 .LVL34: + 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 255 .loc 1 228 0 + 256 00f2 8460 str r4, [r0, #8] + 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_OTYPER_OT_0 << position) ; + 257 .loc 1 231 0 + 258 00f4 4468 ldr r4, [r0, #4] + 259 .LVL35: + ARM GAS /tmp/cclHgak8.s page 11 + + + 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4u) << position); + 260 .loc 1 232 0 + 261 00f6 AC43 bics r4, r5 + 262 .LVL36: + 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER = temp; + 263 .loc 1 233 0 + 264 00f8 4A68 ldr r2, [r1, #4] + 265 00fa 1209 lsrs r2, r2, #4 + 266 00fc 0125 movs r5, #1 + 267 00fe 1540 ands r5, r2 + 268 0100 9D40 lsls r5, r5, r3 + 269 0102 2543 orrs r5, r4 + 270 .LVL37: + 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 271 .loc 1 234 0 + 272 0104 4560 str r5, [r0, #4] + 273 .LVL38: + 274 .L7: + 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2u)); + 275 .loc 1 238 0 + 276 0106 C468 ldr r4, [r0, #12] + 277 .LVL39: + 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= ((GPIO_Init->Pull) << (position * 2u)); + 278 .loc 1 239 0 + 279 0108 2640 ands r6, r4 + 280 .LVL40: + 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR = temp; + 281 .loc 1 240 0 + 282 010a 8C68 ldr r4, [r1, #8] + 283 010c BC40 lsls r4, r4, r7 + 284 010e 3443 orrs r4, r6 + 285 .LVL41: + 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 286 .loc 1 241 0 + 287 0110 C460 str r4, [r0, #12] + 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 288 .loc 1 245 0 + 289 0112 4A68 ldr r2, [r1, #4] + 290 0114 D200 lsls r2, r2, #3 + 291 0116 B1D5 bpl .L3 + 292 .LBB2: + 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 293 .loc 1 248 0 + 294 0118 1A4D ldr r5, .L21+8 + 295 011a AE69 ldr r6, [r5, #24] + 296 011c 0124 movs r4, #1 + 297 .LVL42: + 298 011e 2643 orrs r6, r4 + 299 0120 AE61 str r6, [r5, #24] + 300 .LVL43: + 301 0122 AD69 ldr r5, [r5, #24] + 302 0124 2C40 ands r4, r5 + 303 0126 0194 str r4, [sp, #4] + 304 0128 019C ldr r4, [sp, #4] + 305 .LBE2: + 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp &= ~(0x0FuL << (4u * (position & 0x03u))); + 306 .loc 1 250 0 + ARM GAS /tmp/cclHgak8.s page 12 + + + 307 012a 9C08 lsrs r4, r3, #2 + 308 012c A51C adds r5, r4, #2 + 309 012e AD00 lsls r5, r5, #2 + 310 0130 124E ldr r6, .L21 + 311 0132 AF59 ldr r7, [r5, r6] + 312 .LVL44: + 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** temp |= (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))); + 313 .loc 1 251 0 + 314 0134 0326 movs r6, #3 + 315 0136 1E40 ands r6, r3 + 316 0138 B500 lsls r5, r6, #2 + 317 013a 0F26 movs r6, #15 + 318 013c AE40 lsls r6, r6, r5 + 319 013e B743 bics r7, r6 + 320 .LVL45: + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 321 .loc 1 252 0 + 322 0140 9026 movs r6, #144 + 323 0142 F605 lsls r6, r6, #23 + 324 0144 B042 cmp r0, r6 + 325 0146 00D1 bne .LCB325 + 326 0148 62E7 b .L14 @long jump + 327 .LCB325: + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 328 .loc 1 252 0 is_stmt 0 discriminator 1 + 329 014a 0F4E ldr r6, .L21+12 + 330 014c B042 cmp r0, r6 + 331 014e 0BD0 beq .L15 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 332 .loc 1 252 0 discriminator 3 + 333 0150 0E4E ldr r6, .L21+16 + 334 0152 B042 cmp r0, r6 + 335 0154 0AD0 beq .L16 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 336 .loc 1 252 0 discriminator 5 + 337 0156 0E4E ldr r6, .L21+20 + 338 0158 B042 cmp r0, r6 + 339 015a 09D0 beq .L17 + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 340 .loc 1 252 0 discriminator 7 + 341 015c 0D4E ldr r6, .L21+24 + 342 015e B042 cmp r0, r6 + 343 0160 00D1 bne .LCB337 + 344 0162 53E7 b .L20 @long jump + 345 .LCB337: + 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] = temp; + 346 .loc 1 252 0 + 347 0164 0526 movs r6, #5 + 348 0166 54E7 b .L8 + 349 .L15: + 350 0168 0126 movs r6, #1 + 351 016a 52E7 b .L8 + 352 .L16: + 353 016c 0226 movs r6, #2 + 354 016e 50E7 b .L8 + 355 .L17: + 356 0170 0326 movs r6, #3 + ARM GAS /tmp/cclHgak8.s page 13 + + + 357 0172 4EE7 b .L8 + 358 .LVL46: + 359 .L19: + 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 360 .loc 1 293 0 is_stmt 1 + 361 0174 02B0 add sp, sp, #8 + 362 @ sp needed + 363 0176 04BC pop {r2} + 364 0178 9046 mov r8, r2 + 365 017a F0BD pop {r4, r5, r6, r7, pc} + 366 .L22: + 367 .align 2 + 368 .L21: + 369 017c 00000140 .word 1073807360 + 370 0180 00040140 .word 1073808384 + 371 0184 00100240 .word 1073876992 + 372 0188 00040048 .word 1207960576 + 373 018c 00080048 .word 1207961600 + 374 0190 000C0048 .word 1207962624 + 375 0194 00100048 .word 1207963648 + 376 .cfi_endproc + 377 .LFE40: + 379 .section .text.HAL_GPIO_DeInit,"ax",%progbits + 380 .align 1 + 381 .global HAL_GPIO_DeInit + 382 .syntax unified + 383 .code 16 + 384 .thumb_func + 385 .fpu softvfp + 387 HAL_GPIO_DeInit: + 388 .LFB41: + 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief De-initialize the GPIOx peripheral registers to their default reset values. + 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin) + 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 389 .loc 1 303 0 + 390 .cfi_startproc + 391 @ args = 0, pretend = 0, frame = 0 + 392 @ frame_needed = 0, uses_anonymous_args = 0 + 393 .LVL47: + 394 0000 F0B5 push {r4, r5, r6, r7, lr} + 395 .LCFI3: + 396 .cfi_def_cfa_offset 20 + 397 .cfi_offset 4, -20 + 398 .cfi_offset 5, -16 + 399 .cfi_offset 6, -12 + 400 .cfi_offset 7, -8 + 401 .cfi_offset 14, -4 + 402 0002 CE46 mov lr, r9 + 403 0004 4746 mov r7, r8 + ARM GAS /tmp/cclHgak8.s page 14 + + + 404 0006 80B5 push {r7, lr} + 405 .LCFI4: + 406 .cfi_def_cfa_offset 28 + 407 .cfi_offset 8, -28 + 408 .cfi_offset 9, -24 + 409 0008 8946 mov r9, r1 + 410 .LVL48: + 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t position = 0x00u; + 411 .loc 1 304 0 + 412 000a 0023 movs r3, #0 + 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t iocurrent; + 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** uint32_t tmp; + 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); + 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the port pins */ + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** while ((GPIO_Pin >> position) != 0x00u) + 413 .loc 1 313 0 + 414 000c 24E0 b .L24 + 415 .LVL49: + 416 .L36: + 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Get current io position */ + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** iocurrent = (GPIO_Pin) & (1uL << position); + 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (iocurrent != 0x00u) + 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*------------------------- EXTI Mode Configuration --------------------*/ + 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear the External Interrupt or Event for the current IO */ + 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = SYSCFG->EXTICR[position >> 2u]; + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 417 .loc 1 325 0 + 418 000e 0421 movs r1, #4 + 419 0010 8846 mov r8, r1 + 420 0012 01E0 b .L26 + 421 .L29: + 422 0014 0021 movs r1, #0 + 423 0016 8846 mov r8, r1 + 424 .L26: + 425 .loc 1 325 0 is_stmt 0 discriminator 20 + 426 0018 4146 mov r1, r8 + 427 001a A140 lsls r1, r1, r4 + 428 001c A942 cmp r1, r5 + 429 001e 4BD0 beq .L34 + 430 .LVL50: + 431 .L27: + 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear EXTI line configuration */ + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->IMR &= ~((uint32_t)iocurrent); + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */ + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent); + ARM GAS /tmp/cclHgak8.s page 15 + + + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); + 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */ + 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = 0x0FuL << (4u * (position & 0x03u)); + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2u] &= ~tmp; + 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /*------------------------- GPIO Mode Configuration --------------------*/ + 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure IO Direction in Input Floating Mode */ + 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2u)); + 432 .loc 1 342 0 is_stmt 1 + 433 0020 0568 ldr r5, [r0] + 434 0022 5E00 lsls r6, r3, #1 + 435 0024 0324 movs r4, #3 + 436 0026 B440 lsls r4, r4, r6 + 437 0028 E443 mvns r4, r4 + 438 002a 2540 ands r5, r4 + 439 002c 0560 str r5, [r0] + 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default Alternate Function in current IO */ + 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)) ; + 440 .loc 1 345 0 + 441 002e DD08 lsrs r5, r3, #3 + 442 0030 0835 adds r5, r5, #8 + 443 0032 AD00 lsls r5, r5, #2 + 444 0034 2F58 ldr r7, [r5, r0] + 445 0036 0726 movs r6, #7 + 446 0038 1E40 ands r6, r3 + 447 003a B600 lsls r6, r6, #2 + 448 003c 0F21 movs r1, #15 + 449 003e B140 lsls r1, r1, r6 + 450 0040 8F43 bics r7, r1 + 451 0042 2F50 str r7, [r5, r0] + 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default value for IO Speed */ + 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); + 452 .loc 1 348 0 + 453 0044 8568 ldr r5, [r0, #8] + 454 0046 2540 ands r5, r4 + 455 0048 8560 str r5, [r0, #8] + 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Configure the default value IO Output Type */ + 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; + 456 .loc 1 351 0 + 457 004a 4568 ldr r5, [r0, #4] + 458 004c 9543 bics r5, r2 + 459 004e 4560 str r5, [r0, #4] + 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Deactivate the Pull-up and Pull-down resistor for the current IO */ + 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); + 460 .loc 1 354 0 + 461 0050 C268 ldr r2, [r0, #12] + 462 .LVL51: + 463 0052 1440 ands r4, r2 + 464 0054 C460 str r4, [r0, #12] + 465 .L25: + 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + ARM GAS /tmp/cclHgak8.s page 16 + + + 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** position++; + 466 .loc 1 357 0 + 467 0056 0133 adds r3, r3, #1 + 468 .LVL52: + 469 .L24: + 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 470 .loc 1 313 0 + 471 0058 4A46 mov r2, r9 + 472 005a DA40 lsrs r2, r2, r3 + 473 005c 42D0 beq .L35 + 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 474 .loc 1 316 0 + 475 005e 0122 movs r2, #1 + 476 0060 9A40 lsls r2, r2, r3 + 477 0062 4E46 mov r6, r9 + 478 0064 1640 ands r6, r2 + 479 .LVL53: + 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 480 .loc 1 318 0 + 481 0066 F6D0 beq .L25 + 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp &= (0x0FuL << (4u * (position & 0x03u))); + 482 .loc 1 323 0 + 483 0068 9908 lsrs r1, r3, #2 + 484 006a 8C46 mov ip, r1 + 485 006c 8C1C adds r4, r1, #2 + 486 006e A400 lsls r4, r4, #2 + 487 0070 1E4D ldr r5, .L37 + 488 0072 6559 ldr r5, [r4, r5] + 489 .LVL54: + 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u)))) + 490 .loc 1 324 0 + 491 0074 0324 movs r4, #3 + 492 0076 1C40 ands r4, r3 + 493 0078 A400 lsls r4, r4, #2 + 494 007a 0F27 movs r7, #15 + 495 007c A740 lsls r7, r7, r4 + 496 007e 3D40 ands r5, r7 + 497 .LVL55: + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 498 .loc 1 325 0 + 499 0080 9021 movs r1, #144 + 500 0082 C905 lsls r1, r1, #23 + 501 0084 8842 cmp r0, r1 + 502 0086 C5D0 beq .L29 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 503 .loc 1 325 0 is_stmt 0 discriminator 1 + 504 0088 1949 ldr r1, .L37+4 + 505 008a 8842 cmp r0, r1 + 506 008c 0BD0 beq .L30 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 507 .loc 1 325 0 discriminator 3 + 508 008e 1949 ldr r1, .L37+8 + 509 0090 8842 cmp r0, r1 + 510 0092 0BD0 beq .L31 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 511 .loc 1 325 0 discriminator 5 + ARM GAS /tmp/cclHgak8.s page 17 + + + 512 0094 1849 ldr r1, .L37+12 + 513 0096 8842 cmp r0, r1 + 514 0098 0BD0 beq .L32 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 515 .loc 1 325 0 discriminator 7 + 516 009a 1849 ldr r1, .L37+16 + 517 009c 8842 cmp r0, r1 + 518 009e B6D0 beq .L36 + 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 519 .loc 1 325 0 + 520 00a0 0521 movs r1, #5 + 521 00a2 8846 mov r8, r1 + 522 00a4 B8E7 b .L26 + 523 .L30: + 524 00a6 0121 movs r1, #1 + 525 00a8 8846 mov r8, r1 + 526 00aa B5E7 b .L26 + 527 .L31: + 528 00ac 0221 movs r1, #2 + 529 00ae 8846 mov r8, r1 + 530 00b0 B2E7 b .L26 + 531 .L32: + 532 00b2 0321 movs r1, #3 + 533 00b4 8846 mov r8, r1 + 534 00b6 AFE7 b .L26 + 535 .L34: + 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent); + 536 .loc 1 328 0 is_stmt 1 + 537 00b8 114C ldr r4, .L37+20 + 538 00ba 2568 ldr r5, [r4] + 539 .LVL56: + 540 00bc F643 mvns r6, r6 + 541 .LVL57: + 542 00be 3540 ands r5, r6 + 543 00c0 2560 str r5, [r4] + 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 544 .loc 1 329 0 + 545 00c2 6568 ldr r5, [r4, #4] + 546 00c4 3540 ands r5, r6 + 547 00c6 6560 str r5, [r4, #4] + 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent); + 548 .loc 1 332 0 + 549 00c8 A568 ldr r5, [r4, #8] + 550 00ca 3540 ands r5, r6 + 551 00cc A560 str r5, [r4, #8] + 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 552 .loc 1 333 0 + 553 00ce E568 ldr r5, [r4, #12] + 554 00d0 2E40 ands r6, r5 + 555 .LVL58: + 556 00d2 E660 str r6, [r4, #12] + 557 .LVL59: + 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 558 .loc 1 337 0 + 559 00d4 054E ldr r6, .L37 + 560 00d6 6446 mov r4, ip + 561 00d8 0234 adds r4, r4, #2 + ARM GAS /tmp/cclHgak8.s page 18 + + + 562 00da A400 lsls r4, r4, #2 + 563 00dc A559 ldr r5, [r4, r6] + 564 00de BD43 bics r5, r7 + 565 00e0 A551 str r5, [r4, r6] + 566 00e2 9DE7 b .L27 + 567 .LVL60: + 568 .L35: + 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 569 .loc 1 359 0 + 570 @ sp needed + 571 .LVL61: + 572 00e4 0CBC pop {r2, r3} + 573 00e6 9046 mov r8, r2 + 574 00e8 9946 mov r9, r3 + 575 00ea F0BD pop {r4, r5, r6, r7, pc} + 576 .L38: + 577 .align 2 + 578 .L37: + 579 00ec 00000140 .word 1073807360 + 580 00f0 00040048 .word 1207960576 + 581 00f4 00080048 .word 1207961600 + 582 00f8 000C0048 .word 1207962624 + 583 00fc 00100048 .word 1207963648 + 584 0100 00040140 .word 1073808384 + 585 .cfi_endproc + 586 .LFE41: + 588 .section .text.HAL_GPIO_ReadPin,"ax",%progbits + 589 .align 1 + 590 .global HAL_GPIO_ReadPin + 591 .syntax unified + 592 .code 16 + 593 .thumb_func + 594 .fpu softvfp + 596 HAL_GPIO_ReadPin: + 597 .LFB42: + 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @} + 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions + 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions. + 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @verbatim + 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** ##### IO operation functions ##### + 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** =============================================================================== + 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** @endverbatim + 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @{ + 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Read the specified input port pin. + 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to read. + ARM GAS /tmp/cclHgak8.s page 19 + + + 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be GPIO_PIN_x where x can be (0..15). + 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval The input port pin value. + 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 598 .loc 1 385 0 + 599 .cfi_startproc + 600 @ args = 0, pretend = 0, frame = 0 + 601 @ frame_needed = 0, uses_anonymous_args = 0 + 602 @ link register save eliminated. + 603 .LVL62: + 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIO_PinState bitstatus; + 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET) + 604 .loc 1 391 0 + 605 0000 0369 ldr r3, [r0, #16] + 606 0002 0B42 tst r3, r1 + 607 0004 01D1 bne .L42 + 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** bitstatus = GPIO_PIN_SET; + 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** bitstatus = GPIO_PIN_RESET; + 608 .loc 1 397 0 + 609 0006 0020 movs r0, #0 + 610 .LVL63: + 611 .L40: + 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return bitstatus; + 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 612 .loc 1 400 0 + 613 @ sp needed + 614 0008 7047 bx lr + 615 .LVL64: + 616 .L42: + 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 617 .loc 1 393 0 + 618 000a 0120 movs r0, #1 + 619 .LVL65: + 620 000c FCE7 b .L40 + 621 .cfi_endproc + 622 .LFE42: + 624 .section .text.HAL_GPIO_WritePin,"ax",%progbits + 625 .align 1 + 626 .global HAL_GPIO_WritePin + 627 .syntax unified + 628 .code 16 + 629 .thumb_func + 630 .fpu softvfp + 632 HAL_GPIO_WritePin: + 633 .LFB43: + 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + ARM GAS /tmp/cclHgak8.s page 20 + + + 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Set or clear the selected data port bit. + 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify + 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between + 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * the read and the modify access. + 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * + 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..H) to select the GPIO peripheral for STM32F0 family + 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bit to be written. + 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15). + 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param PinState specifies the value to be written to the selected bit. + 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be one of the GPIO_PinState enum values: + 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @arg GPIO_PIN_RESET: to clear the port pin + 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @arg GPIO_PIN_SET: to set the port pin + 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) + 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 634 .loc 1 418 0 + 635 .cfi_startproc + 636 @ args = 0, pretend = 0, frame = 0 + 637 @ frame_needed = 0, uses_anonymous_args = 0 + 638 @ link register save eliminated. + 639 .LVL66: + 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_ACTION(PinState)); + 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if (PinState != GPIO_PIN_RESET) + 640 .loc 1 423 0 + 641 0000 002A cmp r2, #0 + 642 0002 01D1 bne .L46 + 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin; + 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BRR = (uint32_t)GPIO_Pin; + 643 .loc 1 429 0 + 644 0004 8162 str r1, [r0, #40] + 645 .L43: + 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 646 .loc 1 431 0 + 647 @ sp needed + 648 0006 7047 bx lr + 649 .L46: + 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 650 .loc 1 425 0 + 651 0008 8161 str r1, [r0, #24] + 652 000a FCE7 b .L43 + 653 .cfi_endproc + 654 .LFE43: + 656 .section .text.HAL_GPIO_TogglePin,"ax",%progbits + 657 .align 1 + 658 .global HAL_GPIO_TogglePin + 659 .syntax unified + 660 .code 16 + 661 .thumb_func + ARM GAS /tmp/cclHgak8.s page 21 + + + 662 .fpu softvfp + 664 HAL_GPIO_TogglePin: + 665 .LFB44: + 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Toggle the specified GPIO pin. + 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the pin to be toggled. + 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 666 .loc 1 440 0 + 667 .cfi_startproc + 668 @ args = 0, pretend = 0, frame = 0 + 669 @ frame_needed = 0, uses_anonymous_args = 0 + 670 @ link register save eliminated. + 671 .LVL67: + 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if ((GPIOx->ODR & GPIO_Pin) != 0X00u) + 672 .loc 1 444 0 + 673 0000 4369 ldr r3, [r0, #20] + 674 0002 1942 tst r1, r3 + 675 0004 01D1 bne .L50 + 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin << GPIO_NUMBER; + 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin; + 676 .loc 1 450 0 + 677 0006 8161 str r1, [r0, #24] + 678 .LVL68: + 679 .L47: + 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 680 .loc 1 452 0 + 681 @ sp needed + 682 0008 7047 bx lr + 683 .LVL69: + 684 .L50: + 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 685 .loc 1 446 0 + 686 000a 0904 lsls r1, r1, #16 + 687 .LVL70: + 688 000c 8161 str r1, [r0, #24] + 689 000e FBE7 b .L47 + 690 .cfi_endproc + 691 .LFE44: + 693 .section .text.HAL_GPIO_LockPin,"ax",%progbits + 694 .align 1 + 695 .global HAL_GPIO_LockPin + 696 .syntax unified + 697 .code 16 + 698 .thumb_func + ARM GAS /tmp/cclHgak8.s page 22 + + + 699 .fpu softvfp + 701 HAL_GPIO_LockPin: + 702 .LFB45: + 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Locks GPIO Pins configuration registers. + 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR, + 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH. + 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @note The configuration of the locked GPIO pins can no longer be modified + 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * until the next reset. + 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIOx where x can be (A..F) to select the GPIO peripheral for STM32F0 family + 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin specifies the port bits to be locked. + 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * This parameter can be any combination of GPIO_Pin_x where x can be (0..15). + 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin) + 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 703 .loc 1 466 0 + 704 .cfi_startproc + 705 @ args = 0, pretend = 0, frame = 8 + 706 @ frame_needed = 0, uses_anonymous_args = 0 + 707 @ link register save eliminated. + 708 .LVL71: + 709 0000 82B0 sub sp, sp, #8 + 710 .LCFI5: + 711 .cfi_def_cfa_offset 8 + 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __IO uint32_t tmp = GPIO_LCKR_LCKK; + 712 .loc 1 467 0 + 713 0002 8022 movs r2, #128 + 714 0004 5202 lsls r2, r2, #9 + 715 0006 0192 str r2, [sp, #4] + 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Check the parameters */ + 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx)); + 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin)); + 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Apply lock key write sequence */ + 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** SET_BIT(tmp, GPIO_Pin); + 716 .loc 1 474 0 + 717 0008 019B ldr r3, [sp, #4] + 718 000a 0B43 orrs r3, r1 + 719 000c 0193 str r3, [sp, #4] + 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ + 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 720 .loc 1 476 0 + 721 000e 019B ldr r3, [sp, #4] + 722 0010 C361 str r3, [r0, #28] + 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */ + 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = GPIO_Pin; + 723 .loc 1 478 0 + 724 0012 C161 str r1, [r0, #28] + 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */ + 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** GPIOx->LCKR = tmp; + 725 .loc 1 480 0 + 726 0014 019B ldr r3, [sp, #4] + 727 0016 C361 str r3, [r0, #28] + 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Read LCKK register. This read is mandatory to complete key lock sequence */ + ARM GAS /tmp/cclHgak8.s page 23 + + + 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** tmp = GPIOx->LCKR; + 728 .loc 1 482 0 + 729 0018 C369 ldr r3, [r0, #28] + 730 001a 0193 str r3, [sp, #4] + 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* read again in order to confirm lock is active */ + 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if((GPIOx->LCKR & GPIO_LCKR_LCKK) != 0x00u) + 731 .loc 1 485 0 + 732 001c C369 ldr r3, [r0, #28] + 733 001e 1342 tst r3, r2 + 734 0020 02D1 bne .L54 + 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return HAL_OK; + 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** else + 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** return HAL_ERROR; + 735 .loc 1 491 0 + 736 0022 0120 movs r0, #1 + 737 .LVL72: + 738 .L52: + 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 739 .loc 1 493 0 + 740 0024 02B0 add sp, sp, #8 + 741 @ sp needed + 742 0026 7047 bx lr + 743 .LVL73: + 744 .L54: + 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 745 .loc 1 487 0 + 746 0028 0020 movs r0, #0 + 747 .LVL74: + 748 002a FBE7 b .L52 + 749 .cfi_endproc + 750 .LFE45: + 752 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits + 753 .align 1 + 754 .weak HAL_GPIO_EXTI_Callback + 755 .syntax unified + 756 .code 16 + 757 .thumb_func + 758 .fpu softvfp + 760 HAL_GPIO_EXTI_Callback: + 761 .LFB47: + 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief Handle EXTI interrupt request. + 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin) + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u) + 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin); + ARM GAS /tmp/cclHgak8.s page 24 + + + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /** + 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @brief EXTI line detection callback. + 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @param GPIO_Pin Specifies the port pin connected to corresponding EXTI line. + 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** * @retval None + 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin) + 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 762 .loc 1 516 0 + 763 .cfi_startproc + 764 @ args = 0, pretend = 0, frame = 0 + 765 @ frame_needed = 0, uses_anonymous_args = 0 + 766 @ link register save eliminated. + 767 .LVL75: + 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* Prevent unused argument(s) compilation warning */ + 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** UNUSED(GPIO_Pin); + 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* NOTE: This function should not be modified, when the callback is needed, + 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** the HAL_GPIO_EXTI_Callback could be implemented in the user file + 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** */ + 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 768 .loc 1 523 0 + 769 @ sp needed + 770 0000 7047 bx lr + 771 .cfi_endproc + 772 .LFE47: + 774 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits + 775 .align 1 + 776 .global HAL_GPIO_EXTI_IRQHandler + 777 .syntax unified + 778 .code 16 + 779 .thumb_func + 780 .fpu softvfp + 782 HAL_GPIO_EXTI_IRQHandler: + 783 .LFB46: + 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** /* EXTI line interrupt detected */ + 784 .loc 1 501 0 + 785 .cfi_startproc + 786 @ args = 0, pretend = 0, frame = 0 + 787 @ frame_needed = 0, uses_anonymous_args = 0 + 788 .LVL76: + 789 0000 10B5 push {r4, lr} + 790 .LCFI6: + 791 .cfi_def_cfa_offset 8 + 792 .cfi_offset 4, -8 + 793 .cfi_offset 14, -4 + 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** { + 794 .loc 1 503 0 + 795 0002 054B ldr r3, .L59 + 796 0004 5B69 ldr r3, [r3, #20] + 797 0006 1842 tst r0, r3 + 798 0008 00D1 bne .L58 + 799 .LVL77: + 800 .L56: + ARM GAS /tmp/cclHgak8.s page 25 + + + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 801 .loc 1 508 0 + 802 @ sp needed + 803 000a 10BD pop {r4, pc} + 804 .LVL78: + 805 .L58: + 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin); + 806 .loc 1 505 0 + 807 000c 024B ldr r3, .L59 + 808 000e 5861 str r0, [r3, #20] + 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** } + 809 .loc 1 506 0 + 810 0010 FFF7FEFF bl HAL_GPIO_EXTI_Callback + 811 .LVL79: + 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_gpio.c **** + 812 .loc 1 508 0 + 813 0014 F9E7 b .L56 + 814 .L60: + 815 0016 C046 .align 2 + 816 .L59: + 817 0018 00040140 .word 1073808384 + 818 .cfi_endproc + 819 .LFE46: + 821 .text + 822 .Letext0: + 823 .file 2 "/usr/include/newlib/machine/_default_types.h" + 824 .file 3 "/usr/include/newlib/sys/_stdint.h" + 825 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 826 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 827 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 828 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h" + 829 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/cclHgak8.s page 26 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_hal_gpio.c + /tmp/cclHgak8.s:16 .text.HAL_GPIO_Init:0000000000000000 $t + /tmp/cclHgak8.s:23 .text.HAL_GPIO_Init:0000000000000000 HAL_GPIO_Init + /tmp/cclHgak8.s:369 .text.HAL_GPIO_Init:000000000000017c $d + /tmp/cclHgak8.s:380 .text.HAL_GPIO_DeInit:0000000000000000 $t + /tmp/cclHgak8.s:387 .text.HAL_GPIO_DeInit:0000000000000000 HAL_GPIO_DeInit + /tmp/cclHgak8.s:579 .text.HAL_GPIO_DeInit:00000000000000ec $d + /tmp/cclHgak8.s:589 .text.HAL_GPIO_ReadPin:0000000000000000 $t + /tmp/cclHgak8.s:596 .text.HAL_GPIO_ReadPin:0000000000000000 HAL_GPIO_ReadPin + /tmp/cclHgak8.s:625 .text.HAL_GPIO_WritePin:0000000000000000 $t + /tmp/cclHgak8.s:632 .text.HAL_GPIO_WritePin:0000000000000000 HAL_GPIO_WritePin + /tmp/cclHgak8.s:657 .text.HAL_GPIO_TogglePin:0000000000000000 $t + /tmp/cclHgak8.s:664 .text.HAL_GPIO_TogglePin:0000000000000000 HAL_GPIO_TogglePin + /tmp/cclHgak8.s:694 .text.HAL_GPIO_LockPin:0000000000000000 $t + /tmp/cclHgak8.s:701 .text.HAL_GPIO_LockPin:0000000000000000 HAL_GPIO_LockPin + /tmp/cclHgak8.s:753 .text.HAL_GPIO_EXTI_Callback:0000000000000000 $t + /tmp/cclHgak8.s:760 .text.HAL_GPIO_EXTI_Callback:0000000000000000 HAL_GPIO_EXTI_Callback + /tmp/cclHgak8.s:775 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 $t + /tmp/cclHgak8.s:782 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 HAL_GPIO_EXTI_IRQHandler + /tmp/cclHgak8.s:817 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000018 $d + +NO UNDEFINED SYMBOLS |