diff options
Diffstat (limited to 'fw/midi-dials/build/stm32f0xx_it.lst')
| -rw-r--r-- | fw/midi-dials/build/stm32f0xx_it.lst | 409 |
1 files changed, 409 insertions, 0 deletions
diff --git a/fw/midi-dials/build/stm32f0xx_it.lst b/fw/midi-dials/build/stm32f0xx_it.lst new file mode 100644 index 0000000..931f212 --- /dev/null +++ b/fw/midi-dials/build/stm32f0xx_it.lst @@ -0,0 +1,409 @@ +ARM GAS /tmp/ccxPgspp.s page 1 + + + 1 .cpu cortex-m0 + 2 .eabi_attribute 20, 1 + 3 .eabi_attribute 21, 1 + 4 .eabi_attribute 23, 3 + 5 .eabi_attribute 24, 1 + 6 .eabi_attribute 25, 1 + 7 .eabi_attribute 26, 1 + 8 .eabi_attribute 30, 1 + 9 .eabi_attribute 34, 0 + 10 .eabi_attribute 18, 4 + 11 .file "stm32f0xx_it.c" + 12 .text + 13 .Ltext0: + 14 .cfi_sections .debug_frame + 15 .section .text.NMI_Handler,"ax",%progbits + 16 .align 1 + 17 .global NMI_Handler + 18 .syntax unified + 19 .code 16 + 20 .thumb_func + 21 .fpu softvfp + 23 NMI_Handler: + 24 .LFB40: + 25 .file 1 "Src/stm32f0xx_it.c" + 1:Src/stm32f0xx_it.c **** /* USER CODE BEGIN Header */ + 2:Src/stm32f0xx_it.c **** /** + 3:Src/stm32f0xx_it.c **** ****************************************************************************** + 4:Src/stm32f0xx_it.c **** * @file stm32f0xx_it.c + 5:Src/stm32f0xx_it.c **** * @brief Interrupt Service Routines. + 6:Src/stm32f0xx_it.c **** ****************************************************************************** + 7:Src/stm32f0xx_it.c **** * @attention + 8:Src/stm32f0xx_it.c **** * + 9:Src/stm32f0xx_it.c **** * <h2><center>© Copyright (c) 2020 STMicroelectronics. + 10:Src/stm32f0xx_it.c **** * All rights reserved.</center></h2> + 11:Src/stm32f0xx_it.c **** * + 12:Src/stm32f0xx_it.c **** * This software component is licensed by ST under BSD 3-Clause license, + 13:Src/stm32f0xx_it.c **** * the "License"; You may not use this file except in compliance with the + 14:Src/stm32f0xx_it.c **** * License. You may obtain a copy of the License at: + 15:Src/stm32f0xx_it.c **** * opensource.org/licenses/BSD-3-Clause + 16:Src/stm32f0xx_it.c **** * + 17:Src/stm32f0xx_it.c **** ****************************************************************************** + 18:Src/stm32f0xx_it.c **** */ + 19:Src/stm32f0xx_it.c **** /* USER CODE END Header */ + 20:Src/stm32f0xx_it.c **** + 21:Src/stm32f0xx_it.c **** /* Includes ------------------------------------------------------------------*/ + 22:Src/stm32f0xx_it.c **** #include "main.h" + 23:Src/stm32f0xx_it.c **** #include "stm32f0xx_it.h" + 24:Src/stm32f0xx_it.c **** /* Private includes ----------------------------------------------------------*/ + 25:Src/stm32f0xx_it.c **** /* USER CODE BEGIN Includes */ + 26:Src/stm32f0xx_it.c **** /* USER CODE END Includes */ + 27:Src/stm32f0xx_it.c **** + 28:Src/stm32f0xx_it.c **** /* Private typedef -----------------------------------------------------------*/ + 29:Src/stm32f0xx_it.c **** /* USER CODE BEGIN TD */ + 30:Src/stm32f0xx_it.c **** + 31:Src/stm32f0xx_it.c **** /* USER CODE END TD */ + 32:Src/stm32f0xx_it.c **** + 33:Src/stm32f0xx_it.c **** /* Private define ------------------------------------------------------------*/ + ARM GAS /tmp/ccxPgspp.s page 2 + + + 34:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PD */ + 35:Src/stm32f0xx_it.c **** + 36:Src/stm32f0xx_it.c **** /* USER CODE END PD */ + 37:Src/stm32f0xx_it.c **** + 38:Src/stm32f0xx_it.c **** /* Private macro -------------------------------------------------------------*/ + 39:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PM */ + 40:Src/stm32f0xx_it.c **** + 41:Src/stm32f0xx_it.c **** /* USER CODE END PM */ + 42:Src/stm32f0xx_it.c **** + 43:Src/stm32f0xx_it.c **** /* Private variables ---------------------------------------------------------*/ + 44:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PV */ + 45:Src/stm32f0xx_it.c **** + 46:Src/stm32f0xx_it.c **** /* USER CODE END PV */ + 47:Src/stm32f0xx_it.c **** + 48:Src/stm32f0xx_it.c **** /* Private function prototypes -----------------------------------------------*/ + 49:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PFP */ + 50:Src/stm32f0xx_it.c **** + 51:Src/stm32f0xx_it.c **** /* USER CODE END PFP */ + 52:Src/stm32f0xx_it.c **** + 53:Src/stm32f0xx_it.c **** /* Private user code ---------------------------------------------------------*/ + 54:Src/stm32f0xx_it.c **** /* USER CODE BEGIN 0 */ + 55:Src/stm32f0xx_it.c **** + 56:Src/stm32f0xx_it.c **** /* USER CODE END 0 */ + 57:Src/stm32f0xx_it.c **** + 58:Src/stm32f0xx_it.c **** /* External variables --------------------------------------------------------*/ + 59:Src/stm32f0xx_it.c **** extern DMA_HandleTypeDef hdma_adc; + 60:Src/stm32f0xx_it.c **** extern PCD_HandleTypeDef hpcd_USB_FS; + 61:Src/stm32f0xx_it.c **** + 62:Src/stm32f0xx_it.c **** /* USER CODE BEGIN EV */ + 63:Src/stm32f0xx_it.c **** + 64:Src/stm32f0xx_it.c **** /* USER CODE END EV */ + 65:Src/stm32f0xx_it.c **** + 66:Src/stm32f0xx_it.c **** /******************************************************************************/ + 67:Src/stm32f0xx_it.c **** /* Cortex-M0 Processor Interruption and Exception Handlers */ + 68:Src/stm32f0xx_it.c **** /******************************************************************************/ + 69:Src/stm32f0xx_it.c **** /** + 70:Src/stm32f0xx_it.c **** * @brief This function handles Non maskable interrupt. + 71:Src/stm32f0xx_it.c **** */ + 72:Src/stm32f0xx_it.c **** void NMI_Handler(void) + 73:Src/stm32f0xx_it.c **** { + 26 .loc 1 73 0 + 27 .cfi_startproc + 28 @ args = 0, pretend = 0, frame = 0 + 29 @ frame_needed = 0, uses_anonymous_args = 0 + 30 @ link register save eliminated. + 74:Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + 75:Src/stm32f0xx_it.c **** + 76:Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */ + 77:Src/stm32f0xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + 78:Src/stm32f0xx_it.c **** + 79:Src/stm32f0xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */ + 80:Src/stm32f0xx_it.c **** } + 31 .loc 1 80 0 + 32 @ sp needed + 33 0000 7047 bx lr + 34 .cfi_endproc + 35 .LFE40: + ARM GAS /tmp/ccxPgspp.s page 3 + + + 37 .section .text.HardFault_Handler,"ax",%progbits + 38 .align 1 + 39 .global HardFault_Handler + 40 .syntax unified + 41 .code 16 + 42 .thumb_func + 43 .fpu softvfp + 45 HardFault_Handler: + 46 .LFB41: + 81:Src/stm32f0xx_it.c **** + 82:Src/stm32f0xx_it.c **** /** + 83:Src/stm32f0xx_it.c **** * @brief This function handles Hard fault interrupt. + 84:Src/stm32f0xx_it.c **** */ + 85:Src/stm32f0xx_it.c **** void HardFault_Handler(void) + 86:Src/stm32f0xx_it.c **** { + 47 .loc 1 86 0 + 48 .cfi_startproc + 49 @ Volatile: function does not return. + 50 @ args = 0, pretend = 0, frame = 0 + 51 @ frame_needed = 0, uses_anonymous_args = 0 + 52 @ link register save eliminated. + 53 .L3: + 54 0000 FEE7 b .L3 + 55 .cfi_endproc + 56 .LFE41: + 58 .section .text.SVC_Handler,"ax",%progbits + 59 .align 1 + 60 .global SVC_Handler + 61 .syntax unified + 62 .code 16 + 63 .thumb_func + 64 .fpu softvfp + 66 SVC_Handler: + 67 .LFB42: + 87:Src/stm32f0xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */ + 88:Src/stm32f0xx_it.c **** + 89:Src/stm32f0xx_it.c **** /* USER CODE END HardFault_IRQn 0 */ + 90:Src/stm32f0xx_it.c **** while (1) + 91:Src/stm32f0xx_it.c **** { + 92:Src/stm32f0xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + 93:Src/stm32f0xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */ + 94:Src/stm32f0xx_it.c **** } + 95:Src/stm32f0xx_it.c **** } + 96:Src/stm32f0xx_it.c **** + 97:Src/stm32f0xx_it.c **** /** + 98:Src/stm32f0xx_it.c **** * @brief This function handles System service call via SWI instruction. + 99:Src/stm32f0xx_it.c **** */ + 100:Src/stm32f0xx_it.c **** void SVC_Handler(void) + 101:Src/stm32f0xx_it.c **** { + 68 .loc 1 101 0 + 69 .cfi_startproc + 70 @ args = 0, pretend = 0, frame = 0 + 71 @ frame_needed = 0, uses_anonymous_args = 0 + 72 @ link register save eliminated. + 102:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 0 */ + 103:Src/stm32f0xx_it.c **** + 104:Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 0 */ + ARM GAS /tmp/ccxPgspp.s page 4 + + + 105:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SVC_IRQn 1 */ + 106:Src/stm32f0xx_it.c **** + 107:Src/stm32f0xx_it.c **** /* USER CODE END SVC_IRQn 1 */ + 108:Src/stm32f0xx_it.c **** } + 73 .loc 1 108 0 + 74 @ sp needed + 75 0000 7047 bx lr + 76 .cfi_endproc + 77 .LFE42: + 79 .section .text.PendSV_Handler,"ax",%progbits + 80 .align 1 + 81 .global PendSV_Handler + 82 .syntax unified + 83 .code 16 + 84 .thumb_func + 85 .fpu softvfp + 87 PendSV_Handler: + 88 .LFB43: + 109:Src/stm32f0xx_it.c **** + 110:Src/stm32f0xx_it.c **** /** + 111:Src/stm32f0xx_it.c **** * @brief This function handles Pendable request for system service. + 112:Src/stm32f0xx_it.c **** */ + 113:Src/stm32f0xx_it.c **** void PendSV_Handler(void) + 114:Src/stm32f0xx_it.c **** { + 89 .loc 1 114 0 + 90 .cfi_startproc + 91 @ args = 0, pretend = 0, frame = 0 + 92 @ frame_needed = 0, uses_anonymous_args = 0 + 93 @ link register save eliminated. + 115:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */ + 116:Src/stm32f0xx_it.c **** + 117:Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 0 */ + 118:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */ + 119:Src/stm32f0xx_it.c **** + 120:Src/stm32f0xx_it.c **** /* USER CODE END PendSV_IRQn 1 */ + 121:Src/stm32f0xx_it.c **** } + 94 .loc 1 121 0 + 95 @ sp needed + 96 0000 7047 bx lr + 97 .cfi_endproc + 98 .LFE43: + 100 .section .text.SysTick_Handler,"ax",%progbits + 101 .align 1 + 102 .global SysTick_Handler + 103 .syntax unified + 104 .code 16 + 105 .thumb_func + 106 .fpu softvfp + 108 SysTick_Handler: + 109 .LFB44: + 122:Src/stm32f0xx_it.c **** + 123:Src/stm32f0xx_it.c **** /** + 124:Src/stm32f0xx_it.c **** * @brief This function handles System tick timer. + 125:Src/stm32f0xx_it.c **** */ + 126:Src/stm32f0xx_it.c **** void SysTick_Handler(void) + 127:Src/stm32f0xx_it.c **** { + 110 .loc 1 127 0 + ARM GAS /tmp/ccxPgspp.s page 5 + + + 111 .cfi_startproc + 112 @ args = 0, pretend = 0, frame = 0 + 113 @ frame_needed = 0, uses_anonymous_args = 0 + 114 0000 10B5 push {r4, lr} + 115 .LCFI0: + 116 .cfi_def_cfa_offset 8 + 117 .cfi_offset 4, -8 + 118 .cfi_offset 14, -4 + 128:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */ + 129:Src/stm32f0xx_it.c **** + 130:Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 0 */ + 131:Src/stm32f0xx_it.c **** HAL_IncTick(); + 119 .loc 1 131 0 + 120 0002 FFF7FEFF bl HAL_IncTick + 121 .LVL0: + 132:Src/stm32f0xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */ + 133:Src/stm32f0xx_it.c **** + 134:Src/stm32f0xx_it.c **** /* USER CODE END SysTick_IRQn 1 */ + 135:Src/stm32f0xx_it.c **** } + 122 .loc 1 135 0 + 123 @ sp needed + 124 0006 10BD pop {r4, pc} + 125 .cfi_endproc + 126 .LFE44: + 128 .section .text.DMA1_Channel1_IRQHandler,"ax",%progbits + 129 .align 1 + 130 .global DMA1_Channel1_IRQHandler + 131 .syntax unified + 132 .code 16 + 133 .thumb_func + 134 .fpu softvfp + 136 DMA1_Channel1_IRQHandler: + 137 .LFB45: + 136:Src/stm32f0xx_it.c **** + 137:Src/stm32f0xx_it.c **** /******************************************************************************/ + 138:Src/stm32f0xx_it.c **** /* STM32F0xx Peripheral Interrupt Handlers */ + 139:Src/stm32f0xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */ + 140:Src/stm32f0xx_it.c **** /* For the available peripheral interrupt handler names, */ + 141:Src/stm32f0xx_it.c **** /* please refer to the startup file (startup_stm32f0xx.s). */ + 142:Src/stm32f0xx_it.c **** /******************************************************************************/ + 143:Src/stm32f0xx_it.c **** + 144:Src/stm32f0xx_it.c **** /** + 145:Src/stm32f0xx_it.c **** * @brief This function handles DMA1 channel 1 global interrupt. + 146:Src/stm32f0xx_it.c **** */ + 147:Src/stm32f0xx_it.c **** void DMA1_Channel1_IRQHandler(void) + 148:Src/stm32f0xx_it.c **** { + 138 .loc 1 148 0 + 139 .cfi_startproc + 140 @ args = 0, pretend = 0, frame = 0 + 141 @ frame_needed = 0, uses_anonymous_args = 0 + 142 0000 10B5 push {r4, lr} + 143 .LCFI1: + 144 .cfi_def_cfa_offset 8 + 145 .cfi_offset 4, -8 + 146 .cfi_offset 14, -4 + 149:Src/stm32f0xx_it.c **** /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */ + 150:Src/stm32f0xx_it.c **** + ARM GAS /tmp/ccxPgspp.s page 6 + + + 151:Src/stm32f0xx_it.c **** /* USER CODE END DMA1_Channel1_IRQn 0 */ + 152:Src/stm32f0xx_it.c **** HAL_DMA_IRQHandler(&hdma_adc); + 147 .loc 1 152 0 + 148 0002 0248 ldr r0, .L8 + 149 0004 FFF7FEFF bl HAL_DMA_IRQHandler + 150 .LVL1: + 153:Src/stm32f0xx_it.c **** /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */ + 154:Src/stm32f0xx_it.c **** + 155:Src/stm32f0xx_it.c **** /* USER CODE END DMA1_Channel1_IRQn 1 */ + 156:Src/stm32f0xx_it.c **** } + 151 .loc 1 156 0 + 152 @ sp needed + 153 0008 10BD pop {r4, pc} + 154 .L9: + 155 000a C046 .align 2 + 156 .L8: + 157 000c 00000000 .word hdma_adc + 158 .cfi_endproc + 159 .LFE45: + 161 .section .text.USB_IRQHandler,"ax",%progbits + 162 .align 1 + 163 .global USB_IRQHandler + 164 .syntax unified + 165 .code 16 + 166 .thumb_func + 167 .fpu softvfp + 169 USB_IRQHandler: + 170 .LFB46: + 157:Src/stm32f0xx_it.c **** + 158:Src/stm32f0xx_it.c **** /** + 159:Src/stm32f0xx_it.c **** * @brief This function handles USB global Interrupt / USB wake-up interrupt through EXTI line 18. + 160:Src/stm32f0xx_it.c **** */ + 161:Src/stm32f0xx_it.c **** void USB_IRQHandler(void) + 162:Src/stm32f0xx_it.c **** { + 171 .loc 1 162 0 + 172 .cfi_startproc + 173 @ args = 0, pretend = 0, frame = 0 + 174 @ frame_needed = 0, uses_anonymous_args = 0 + 175 0000 10B5 push {r4, lr} + 176 .LCFI2: + 177 .cfi_def_cfa_offset 8 + 178 .cfi_offset 4, -8 + 179 .cfi_offset 14, -4 + 163:Src/stm32f0xx_it.c **** /* USER CODE BEGIN USB_IRQn 0 */ + 164:Src/stm32f0xx_it.c **** + 165:Src/stm32f0xx_it.c **** /* USER CODE END USB_IRQn 0 */ + 166:Src/stm32f0xx_it.c **** HAL_PCD_IRQHandler(&hpcd_USB_FS); + 180 .loc 1 166 0 + 181 0002 0248 ldr r0, .L11 + 182 0004 FFF7FEFF bl HAL_PCD_IRQHandler + 183 .LVL2: + 167:Src/stm32f0xx_it.c **** /* USER CODE BEGIN USB_IRQn 1 */ + 168:Src/stm32f0xx_it.c **** + 169:Src/stm32f0xx_it.c **** /* USER CODE END USB_IRQn 1 */ + 170:Src/stm32f0xx_it.c **** } + 184 .loc 1 170 0 + 185 @ sp needed + ARM GAS /tmp/ccxPgspp.s page 7 + + + 186 0008 10BD pop {r4, pc} + 187 .L12: + 188 000a C046 .align 2 + 189 .L11: + 190 000c 00000000 .word hpcd_USB_FS + 191 .cfi_endproc + 192 .LFE46: + 194 .text + 195 .Letext0: + 196 .file 2 "/usr/include/newlib/machine/_default_types.h" + 197 .file 3 "/usr/include/newlib/sys/_stdint.h" + 198 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h" + 199 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h" + 200 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h" + 201 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h" + 202 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usb.h" + 203 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pcd.h" + 204 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h" + ARM GAS /tmp/ccxPgspp.s page 8 + + +DEFINED SYMBOLS + *ABS*:0000000000000000 stm32f0xx_it.c + /tmp/ccxPgspp.s:16 .text.NMI_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:23 .text.NMI_Handler:0000000000000000 NMI_Handler + /tmp/ccxPgspp.s:38 .text.HardFault_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:45 .text.HardFault_Handler:0000000000000000 HardFault_Handler + /tmp/ccxPgspp.s:59 .text.SVC_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:66 .text.SVC_Handler:0000000000000000 SVC_Handler + /tmp/ccxPgspp.s:80 .text.PendSV_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:87 .text.PendSV_Handler:0000000000000000 PendSV_Handler + /tmp/ccxPgspp.s:101 .text.SysTick_Handler:0000000000000000 $t + /tmp/ccxPgspp.s:108 .text.SysTick_Handler:0000000000000000 SysTick_Handler + /tmp/ccxPgspp.s:129 .text.DMA1_Channel1_IRQHandler:0000000000000000 $t + /tmp/ccxPgspp.s:136 .text.DMA1_Channel1_IRQHandler:0000000000000000 DMA1_Channel1_IRQHandler + /tmp/ccxPgspp.s:157 .text.DMA1_Channel1_IRQHandler:000000000000000c $d + /tmp/ccxPgspp.s:162 .text.USB_IRQHandler:0000000000000000 $t + /tmp/ccxPgspp.s:169 .text.USB_IRQHandler:0000000000000000 USB_IRQHandler + /tmp/ccxPgspp.s:190 .text.USB_IRQHandler:000000000000000c $d + +UNDEFINED SYMBOLS +HAL_IncTick +HAL_DMA_IRQHandler +hdma_adc +HAL_PCD_IRQHandler +hpcd_USB_FS |