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| author | rihab kouki <rihab.kouki@st.com> | 2020-07-28 11:24:49 +0100 |
|---|---|---|
| committer | rihab kouki <rihab.kouki@st.com> | 2020-07-28 11:24:49 +0100 |
| commit | 96d6da4e252b06dcfdc041e7df23e86161c33007 (patch) | |
| tree | a262f59bb1db7ec7819acae435f5049cbe5e2354 /docs/Core/html/device_h_pg.html | |
| parent | 9f95ff5b6ba01db09552b84a0ab79607060a2666 (diff) | |
| download | st-cmsis-core-lowfat-master.tar.gz st-cmsis-core-lowfat-master.tar.bz2 st-cmsis-core-lowfat-master.zip | |
Diffstat (limited to 'docs/Core/html/device_h_pg.html')
| -rw-r--r-- | docs/Core/html/device_h_pg.html | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/docs/Core/html/device_h_pg.html b/docs/Core/html/device_h_pg.html index d72aff3..6f3dc2e 100644 --- a/docs/Core/html/device_h_pg.html +++ b/docs/Core/html/device_h_pg.html @@ -32,7 +32,7 @@ <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td> <td style="padding-left: 0.5em;"> <div id="projectname">CMSIS-Core (Cortex-M) -  <span id="projectnumber">Version 5.1.2</span> +  <span id="projectnumber">Version 5.3.0</span> </div> <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div> </td> @@ -124,7 +124,7 @@ Interrupt Number Definition</h1> <p><a class="el" href="device_h_pg.html">Device Header File <device.h></a> contains the enumeration <a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> that defines all exceptions and interrupts of the device.</p> <ul> <li>Negative IRQn values represent processor core exceptions (internal interrupts).</li> -<li>Positive IRQn values represent device-specific exceptions (external interrupts). The first device-specific interrupt has the IRQn value 0. The IRQn values needs extension to reflect the device-specific interrupt vector table in the <a class="el" href="startup_s_pg.html">Startup File startup_<device>.s</a>.</li> +<li>Positive IRQn values represent device-specific exceptions (external interrupts). The first device-specific interrupt has the IRQn value 0. The IRQn values needs extension to reflect the device-specific interrupt vector table in the <a class="el" href="startup_s_pg.html">Startup File startup_<device>.s (deprecated)</a>.</li> </ul> <p><b>Example:</b> </p> <p>The following example shows the extension of the interrupt vector table for the LPC1100 device family.</p> @@ -277,7 +277,7 @@ Configuration of the Processor and Core Peripherals</h1> <tr> <td>__Vendor_SysTickConfig </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function. </td></tr> </table> -<p><b>core_CM33.h</b> or <b>core_ARMv8MML.h</b> </p> +<p><b>core_CM33.h</b> or <b>core_cm35p.h</b> or <b>core_ARMv8MML.h</b> </p> <table class="cmtable"> <tr> <th>#define </th><th>Value Range </th><th>Default </th><th>Description </th></tr> @@ -321,6 +321,12 @@ CMSIS Version and Processor Information</h1> <div class="line"><span class="preprocessor"> __CM0P_CMSIS_VERSION_SUB ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div> <div class="line"><span class="preprocessor"></span> </div> <div class="line"><span class="preprocessor">#define __CORTEX_M (0U) </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div> +</div><!-- fragment --><p><b>core_cm1.h</b> </p> +<div class="fragment"><div class="line"><span class="preprocessor">#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN) </span></div> +<div class="line"><span class="preprocessor">#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB) </span></div> +<div class="line"><span class="preprocessor">#define __CM1_CMSIS_VERSION ((__CM1_CMSIS_VERSION_MAIN << 16U) | \</span></div> +<div class="line"><span class="preprocessor"> __CM1_CMSIS_VERSION_SUB ) </span></div> +<div class="line"><span class="preprocessor">#define __CORTEX_M (1U) </span></div> </div><!-- fragment --><p><b>core_cm3.h</b> </p> <div class="fragment"><div class="line"><span class="preprocessor">#define __CM3_CMSIS_VERSION_MAIN (5U) </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div> <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM3_CMSIS_VERSION_SUB (0U) </span><span class="comment">/* [15:0] CMSIS HAL sub version */</span><span class="preprocessor"></span></div> @@ -347,14 +353,14 @@ CMSIS Version and Processor Information</h1> <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC000_CMSIS_VERSION_SUB (0U) </span><span class="comment">/* [15:0] CMSIS HAL sub version */</span><span class="preprocessor"></span></div> <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \</span></div> <div class="line"><span class="preprocessor"> __SC000_CMSIS_VERSION_SUB ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div> -<div class="line"><span class="preprocessor"></span> </div> +<div class="line"><span class="preprocessor"></span></div> <div class="line"><span class="preprocessor">#define __CORTEX_SC (0U) </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div> </div><!-- fragment --><p><b>core_sc300.h</b> </p> <div class="fragment"><div class="line"><span class="preprocessor">#define __SC300_CMSIS_VERSION_MAIN (5U) </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div> <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC300_CMSIS_VERSION_SUB (0U) </span><span class="comment">/* [15:0] CMSIS HAL sub version */</span><span class="preprocessor"></span></div> <div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16U) | \</span></div> <div class="line"><span class="preprocessor"> __SC300_CMSIS_VERSION_SUB ) </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div> -<div class="line"><span class="preprocessor"></span> </div> +<div class="line"><span class="preprocessor"></span></div> <div class="line"><span class="preprocessor">#define __CORTEX_SC (300U) </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div> </div><!-- fragment --><p><b>core_ARMv8MBL.h</b> </p> <div class="fragment"><div class="line"><span class="preprocessor">#define __ARMv8MBL_CMSIS_VERSION_MAIN (5U) </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div> @@ -643,7 +649,7 @@ typedef struct <div id="nav-path" class="navpath"><!-- id is needed for treeview function! --> <ul> <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li> - <li class="footer">Generated on Wed Aug 1 2018 17:12:08 for CMSIS-Core (Cortex-M) by Arm Ltd. All rights reserved. + <li class="footer">Generated on Wed Jul 10 2019 15:20:25 for CMSIS-Core (Cortex-M) Version 5.3.0 by Arm Ltd. All rights reserved. <!-- <a href="http://www.doxygen.org/index.html"> <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.8.6 |