From 96d6da4e252b06dcfdc041e7df23e86161c33007 Mon Sep 17 00:00:00 2001 From: rihab kouki Date: Tue, 28 Jul 2020 11:24:49 +0100 Subject: Official ARM version: v5.6.0 --- docs/Core/html/device_h_pg.html | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) (limited to 'docs/Core/html/device_h_pg.html') diff --git a/docs/Core/html/device_h_pg.html b/docs/Core/html/device_h_pg.html index d72aff3..6f3dc2e 100644 --- a/docs/Core/html/device_h_pg.html +++ b/docs/Core/html/device_h_pg.html @@ -32,7 +32,7 @@ Logo
CMSIS-Core (Cortex-M) -  Version 5.1.2 +  Version 5.3.0
CMSIS-Core support for Cortex-M processor-based devices
@@ -124,7 +124,7 @@ Interrupt Number Definition

Device Header File <device.h> contains the enumeration IRQn_Type that defines all exceptions and interrupts of the device.

Example:

The following example shows the extension of the interrupt vector table for the LPC1100 device family.

@@ -277,7 +277,7 @@ Configuration of the Processor and Core Peripherals __Vendor_SysTickConfig 0 .. 1 0 If this define is set to 1, then the default SysTick_Config function is excluded. In this case, the file device.h must contain a vendor specific implementation of this function. -

core_CM33.h or core_ARMv8MML.h

+

core_CM33.h or core_cm35p.h or core_ARMv8MML.h

@@ -321,6 +321,12 @@ CMSIS Version and Processor Information
__CM0P_CMSIS_VERSION_SUB ) /* CMSIS HAL version number */
#define __CORTEX_M (0U) /* Cortex-M Core */
+

core_cm1.h

+
#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN)
+
#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB)
+
#define __CM1_CMSIS_VERSION ((__CM1_CMSIS_VERSION_MAIN << 16U) | \
+
__CM1_CMSIS_VERSION_SUB )
+
#define __CORTEX_M (1U)

core_cm3.h

#define __CM3_CMSIS_VERSION_MAIN (5U) /* [31:16] CMSIS HAL main version */
#define __CM3_CMSIS_VERSION_SUB (0U) /* [15:0] CMSIS HAL sub version */
@@ -347,14 +353,14 @@ CMSIS Version and Processor Information
#define __SC000_CMSIS_VERSION_SUB (0U) /* [15:0] CMSIS HAL sub version */
#define __SC000_CMSIS_VERSION ((__SC000_CMSIS_VERSION_MAIN << 16U) | \
__SC000_CMSIS_VERSION_SUB ) /* CMSIS HAL version number */
-
+
#define __CORTEX_SC (0U) /* Cortex secure core */

core_sc300.h

#define __SC300_CMSIS_VERSION_MAIN (5U) /* [31:16] CMSIS HAL main version */
#define __SC300_CMSIS_VERSION_SUB (0U) /* [15:0] CMSIS HAL sub version */
#define __SC300_CMSIS_VERSION ((__SC300_CMSIS_VERSION_MAIN << 16U) | \
__SC300_CMSIS_VERSION_SUB ) /* CMSIS HAL version number */
-
+
#define __CORTEX_SC (300U) /* Cortex secure core */

core_ARMv8MBL.h

#define __ARMv8MBL_CMSIS_VERSION_MAIN (5U) /* [31:16] CMSIS HAL main version */
@@ -643,7 +649,7 @@ typedef struct
#define Value Range Default Description