ihsm.git - Research on Inertial Hardware Security Modules published at TCHES 2022/1

Age	Commit message (Expand)	Author	Files	Lines
2020-11-13	Fix title	jaseg	1	-1/+1
2020-11-06	techrepor: Update paper. I think this is as far as I'll go before the prototype.	jaseg	2	-131/+155
2020-11-05	techreport: WIP	jaseg	2	-198/+261
2020-10-30	Update mech bom	jaseg	1	-0/+0
2020-10-30	Add mech bom, export 3d parts	jaseg	12	-0/+123360
2020-10-29	Add makefile, update mech foo	jaseg	7	-20/+107
2020-10-27	tech-report: update bibliography	jaseg	1	-3/+27
2020-10-27	Update tech report	jaseg	3	-25/+414
2020-10-22	update tech report	jaseg	1	-131/+126
2020-10-14	Fix up freecad model and add gerber export	jaseg	2	-0/+0
2020-10-13	Fix up ALL the edge connectors	jaseg	35	-7395/+80281
2020-10-13	Export bearing mount gerbers	jaseg	10	-174/+228
2020-10-13	Export raspi holder vertical strut pcb	jaseg	5	-106/+78720
2020-10-13	Export stator top PCB	jaseg	5	-112/+75022
2020-10-13	Update footprint library tables	jaseg	8	-5/+21
2020-10-13	finish stator base pcb	jaseg	5	-1158/+6823
2020-10-13	Rotor base pcb: add debug connector	jaseg	4	-9254/+9233
2020-10-13	Push new edge connector board outline to rotor base	jaseg	4	-36/+129
2020-10-13	rotor base dbg connect WIP	jaseg	3	-2/+327
2020-10-13	Fix rotor_base NRST and testpoint situation	jaseg	4	-7393/+8607
2020-10-09	Add meshes to PCBs	jaseg	25	-76464/+139442
2020-10-09	Layout more board, add proto areas to rotor base	jaseg	28	-106406/+119750
2020-10-08	Merge remote-tracking branch 'wendelstein/master'	jaseg	67	-499/+3501
2020-10-08	Route rotor base PCB	jaseg	5	-946/+27487
2020-10-08	TCC scenario performance: WIP	jaseg	1	-0/+0
2020-10-07	Merge HW dev and orga repos	jaseg	68	-29/+4734
2020-10-07	Add missing docs	jaseg	7	-0/+2918
2020-10-02	base schematic done, PCB WIP	jaseg	4	-3098/+8540
2020-10-02	schematic WIP	jaseg	3	-19/+2636
2020-10-01	Add images, translate FC -> KiCAD	jaseg	17	-85/+83114
2020-09-30	Initial FC mech -> KiCAD PCB edge export	jaseg	11	-36/+216
2020-09-30	Initial commit	jaseg	47	-0/+2819
2020-09-18	Finish first rough draft	jaseg	2	-7/+191
2020-09-18	Add prior art and engineering constraints	jaseg	1	-7/+121
2020-09-17	Add contributions section	jaseg	1	-1/+15
2020-09-16	Initial commit	jaseg	4	-0/+268