Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-08-24 | Serial protocol now working including CRC | jaseg | 1 | -7/+30 |
2017-08-23 | Interrupt-driven SPI1 fundamentally working | jaseg | 1 | -44/+78 |
2017-08-23 | Comms working except for TIM3/SPI1 race | jaseg | 1 | -5/+15 |
2017-08-23 | Add transpose test | jaseg | 1 | -128/+85 |
2017-08-15 | Benchmark code | jaseg | 1 | -7/+7 |
2017-08-15 | working commit | jaseg | 1 | -17/+57 |
2017-08-15 | Temporary for bit shuffling | jaseg | 1 | -11/+5 |
2017-08-15 | Working on uart code | jaseg | 1 | -35/+146 |
2017-08-14 | Multiplexing is working | jaseg | 1 | -61/+152 |
2017-08-13 | Board rev 0.3 working | jaseg | 1 | -12/+45 |
2017-06-12 | Add resistor calculation script | jaseg | 1 | -22/+22 |
2017-06-11 | Test program working | jaseg | 1 | -30/+54 |
2017-06-10 | fw working commit | jaseg | 1 | -0/+98 |