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<title>CMSIS-Zone (Preview): /device element</title>
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<div id="projectname">CMSIS-Zone (Preview)
 <span id="projectnumber">Version 0.0.1</span>
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<div id="projectbrief">System Resource Management</div>
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<div class="title">/device element </div> </div>
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<div class="textblock"><p>The <b>device</b> element is used to define one integral System-on-Chip (SoC) device.</p>
<p><b>Example</b> </p>
<div class="fragment"><div class="line"><device Dname=<span class="stringliteral">"ARM32CM4128x"</span>></div>
<div class="line"> <<span class="keyword">package </span>name="ARM32CM4xxx_DFP" url="http:<span class="comment">//www.keil.com/pack" vendor="ARM" version="1.8.15"/></span></div>
<div class="line"></div>
<div class="line"> <processor Pname="Cortex-M4"></div>
<div class="line"> :</div>
<div class="line"> </processor></div>
<div class="line"> :</div>
<div class="line"> </div>
<div class="line"> <!-- Device uniform memory map --></div>
<div class="line"> <memory_map></div>
<div class="line"> <!-- Logical address to access integrated SRAM --></div>
<div class="line"> <memory name="SRAM" start="0x10000000"/></div>
<div class="line"> :</div>
<div class="line"> </memory_map></div>
<div class="line"> </div>
<div class="line"> <resources></div>
<div class="line"> <memory></div>
<div class="line"> <!-- 512KB SRAM integrated on the SoC --></div>
<div class="line"> <region name="SRAM" size="0x80000" access="rwx" info="Internal SRAM (512KB)"/></div>
<div class="line"> :</div>
<div class="line"> </memory></div>
<div class="line"> </resources></div>
<div class="line"></device></div>
</div><!-- fragment --><p><b>Schema Description</b></p>
<table class="cmtable" summary="Element: Device">
<tr>
<th>Parent Element </th><th colspan="3">Element Chain </th></tr>
<tr>
<td><a class="el" href="format_system.html">system</a> </td><td colspan="3"><a class="el" href="format_system.html">/system element</a> </td></tr>
<tr>
<th>Attributes </th><th>Description </th><th>Type </th><th>Use </th></tr>
<tr>
<td>Dfamily </td><td>The familiy name the device belongs to. </td><td>xs:string </td><td>optional </td></tr>
<tr>
<td>DsubFamily </td><td>The sub familiy name the device belongs to. </td><td>xs:string </td><td>optional </td></tr>
<tr>
<td>Dname </td><td>The device name. </td><td>xs:string </td><td>required </td></tr>
<tr>
<td>Dvendor </td><td>The devices vendor identifier. </td><td>xs:string </td><td>required </td></tr>
<tr>
<td>info </td><td>Brief description of the device. </td><td>xs:string </td><td>optional </td></tr>
<tr>
<th>Child Elements </th><th>Description </th><th>Type </th><th>Occurrence </th></tr>
<tr>
<td><a class="el" href="format_package.html">package</a> </td><td>Optional reference to the Software Pack this device is provided by. </td><td>complexType </td><td>0..1 </td></tr>
<tr>
<td><a class="el" href="format_processor.html">processor</a> </td><td>Processing elements and associated features embedded in the device. </td><td>complexType </td><td>1..* </td></tr>
<tr>
<td><a class="el" href="format_resources.html">resources</a> </td><td>Memory and peripheral resources embedded in the device. In contrast to resources defined on system level those at device level are only accessible from processors located on the same enclosing device. </td><td>complexType </td><td>0..1 </td></tr>
<tr>
<td><a class="el" href="format_memory_map.html">memory_map</a> </td><td>All <em>physical</em> resources are accessible using <em>logical</em> memory addresses, i.e. typically called memory map. Common logical addresses valid for all processing elements can be defined at device level memory map, i.e. devices with an uniform memory map. Refer to the individual processor memory map for devices with non-uniform memory maps. </td><td>complexType </td><td>0..1 </td></tr>
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