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<title>CMSIS-Core (Cortex-M): CMSIS-Core Device Templates</title>
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<div class="title">CMSIS-Core Device Templates </div> </div>
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<div class="textblock"><p>Arm supplies CMSIS-Core device template files for the all supported Cortex-M processors and various compiler vendors. Refer to the list of <a class="el" href="index.html#tested_tools_sec">Tested and Verified Toolchains</a> for compliance.</p>
<p>These CMSIS-Core device template files include the following:</p>
<ul>
<li>Register names of the Core Peripherals and names of the Core Exception Vectors.</li>
<li>Functions to access core peripherals, special CPU instructions and SIMD instructions (for Cortex-M4 and Cortex-M7)</li>
<li>Generic startup code and system configuration code.</li>
</ul>
<p>The detailed file structure of the CMSIS-Core device templates is shown in the following picture.</p>
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<img src="CMSIS_CORE_Files.png" alt="CMSIS_CORE_Files.png"/>
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CMSIS-Core File Structure</div></div>
<h1><a class="anchor" id="CMSIS_Processor_files"></a>
CMSIS-Core Processor Files</h1>
<p>The CMSIS-Core processor files provided by Arm are in the directory .\CMSIS\Core\Include. These header files define all processor specific attributes do not need any modifications. The <b>core_<cpu>.h</b> defines the core peripherals and provides helper functions that access the core registers. One file is available for each supported Cortex-M processor:</p>
<table class="doxtable">
<tr>
<th align="left">Header File </th><th align="left">Processor </th></tr>
<tr>
<td align="left">core_cm0.h </td><td align="left">for the Cortex-M0 processor </td></tr>
<tr>
<td align="left">core_cm0plus.h </td><td align="left">for the Cortex-M0+ processor </td></tr>
<tr>
<td align="left">core_cm3.h </td><td align="left">for the Cortex-M3 processor </td></tr>
<tr>
<td align="left">core_cm4.h </td><td align="left">for the Cortex-M4 processor </td></tr>
<tr>
<td align="left">core_cm7.h </td><td align="left">for the Cortex-M7 processor </td></tr>
<tr>
<td align="left">core_cm23.h </td><td align="left">for the Cortex-M23 processor </td></tr>
<tr>
<td align="left">core_cm33.h </td><td align="left">for the Cortex-M33 processor </td></tr>
<tr>
<td align="left">core_cm35p.h </td><td align="left">for the Cortex-M35P processor </td></tr>
<tr>
<td align="left">core_sc000.h </td><td align="left">for the SecurCore SC000 processor </td></tr>
<tr>
<td align="left">core_sc300.h </td><td align="left">for the SecurCore SC300 processor </td></tr>
<tr>
<td align="left">core_armv8mbl.h </td><td align="left">for the Armv8-M Baseline processor </td></tr>
<tr>
<td align="left">core_armv8mml.h </td><td align="left">for the Armv8-M Mainline processor </td></tr>
</table>
<h1><a class="anchor" id="device_examples"></a>
Device Examples</h1>
<p>The CMSIS Software Pack defines several devices that are based on the various processors. The device related CMSIS-Core files are in the directory .\Device\ARM and include CMSIS-Core processor file explained before. The following sample devices are defined in the CMSIS-Pack description file <b>ARM.CMSIS.pdsc</b>:</p>
<table class="doxtable">
<tr>
<th align="left">Family </th><th align="left">Device </th><th align="left">Description </th></tr>
<tr>
<td align="left">ARM Cortex-M0 </td><td align="left">ARMCM0 </td><td align="left">Cortex-M0 based device </td></tr>
<tr>
<td align="left">ARM Cortex-M0 plus </td><td align="left">ARMCM0P </td><td align="left">Cortex-M0+ based device </td></tr>
<tr>
<td align="left">ARM Cortex-M3 </td><td align="left">ARMCM3 </td><td align="left">Cortex-M3 based device </td></tr>
<tr>
<td align="left">ARM Cortex-M4 </td><td align="left">ARMCM4 </td><td align="left">Cortex-M4 based device without floating-point hardware </td></tr>
<tr>
<td align="left">ARM Cortex-M4 </td><td align="left">ARMCM4_FP </td><td align="left">Cortex-M4 based device with floating-point hardware </td></tr>
<tr>
<td align="left">ARM Cortex-M7 </td><td align="left">ARMCM7 </td><td align="left">Cortex-M4 based device without floating-point hardware </td></tr>
<tr>
<td align="left">ARM Cortex-M7 </td><td align="left">ARMCM7_FP </td><td align="left">Cortex-M7 based device with single precision floating-point unit (FPU) </td></tr>
<tr>
<td align="left">ARM Cortex-M7 </td><td align="left">ARMCM7_DP </td><td align="left">Cortex-M7 based device with double precision floating-point unit </td></tr>
<tr>
<td align="left">ARM Cortex-M7 </td><td align="left">ARMCM7 </td><td align="left">Cortex-M7 based device without floating-point hardware </td></tr>
<tr>
<td align="left">ARM Cortex-M23 </td><td align="left">ARMCM23 </td><td align="left">Cortex-M23 based device without TrustZone </td></tr>
<tr>
<td align="left">ARM Cortex-M23 </td><td align="left">ARMCM23_TZ </td><td align="left">Cortex-M23 based device with TrustZone </td></tr>
<tr>
<td align="left">ARM Cortex-M33 </td><td align="left">ARMCM33 </td><td align="left">Cortex-M33 based device without TrustZone, SIMD, FPU </td></tr>
<tr>
<td align="left">ARM Cortex-M33 </td><td align="left">ARMCM33_TZ </td><td align="left">Cortex-M33 based device with TrustZone, no SIMD, no FPU </td></tr>
<tr>
<td align="left">ARM Cortex-M33 </td><td align="left">ARMCM33_DSP_FP </td><td align="left">Cortex-M33 based device with SIMD, FPU, no TrustZone </td></tr>
<tr>
<td align="left">ARM Cortex-M33 </td><td align="left">ARMCM33_DSP_FP_TZ </td><td align="left">Cortex-M33 based device with TrustZone, SIMD, FPU </td></tr>
<tr>
<td align="left">ARM Cortex-M35P </td><td align="left">ARMCM35P </td><td align="left">Cortex-M35P based device without TrustZone, SIMD, FPU </td></tr>
<tr>
<td align="left">ARM Cortex-M35P </td><td align="left">ARMCM35P_TZ </td><td align="left">Cortex-M35P based device with TrustZone, no SIMD, no FPU </td></tr>
<tr>
<td align="left">ARM Cortex-M35P </td><td align="left">ARMCM35P_DSP_FP </td><td align="left">Cortex-M35P based device with SIMD, FPU, no TrustZone </td></tr>
<tr>
<td align="left">ARM Cortex-M35P </td><td align="left">ARMCM35P_DSP_FP_TZ </td><td align="left">Cortex-M35P based device with TrustZone, SIMD, FPU </td></tr>
<tr>
<td align="left">ARM SC000 </td><td align="left">ARM SC000 </td><td align="left">SC000 based device </td></tr>
<tr>
<td align="left">ARM SC300 </td><td align="left">ARM SC300 </td><td align="left">SC300 based device </td></tr>
<tr>
<td align="left">ARMv8-M Baseline </td><td align="left">ARMv8MBL </td><td align="left">Armv8-M Baseline based device with TrustZone </td></tr>
<tr>
<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML </td><td align="left">Armv8-M Mainline based device with TrustZone </td></tr>
<tr>
<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DP </td><td align="left">Armv8-M Mainline based device with TrustZone and double precision FPU </td></tr>
<tr>
<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_SP </td><td align="left">Armv8-M Mainline based device with TrustZone and single precision FPU </td></tr>
<tr>
<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DSP </td><td align="left">Armv8-M Mainline based device with TrustZone and SIMD </td></tr>
<tr>
<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DSP_DP </td><td align="left">Armv8-M Mainline based device with TrustZone, SIMD, and double precision FPU </td></tr>
<tr>
<td align="left">ARMv8-M Mainline </td><td align="left">ARMv8MML_DSP_SP </td><td align="left">Armv8-M Mainline based device with TrustZone, SIMD, and single precision FPU </td></tr>
</table>
<h1><a class="anchor" id="template_files_sec"></a>
Template Files</h1>
<p>To simplify the creation of CMSIS-Core device files, the following template files are provided that should be extended by the silicon vendor to reflect the actual device and device peripherals. Silicon vendors add to these template files the following information:</p>
<ul>
<li><b>Device Peripheral Access Layer</b> that provides definitions for device-specific peripherals.</li>
<li><b>Access Functions for Peripherals</b> (optional) that provides additional helper functions to access device-specific peripherals.</li>
<li><b>Interrupt vectors</b> in the startup file that are device specific.</li>
</ul>
<table class="cmtable">
<tr>
<th>Template File </th><th>Description </th></tr>
<tr>
<td>.\Device\_Template_Vendor\Vendor\Device\Source\ARM\startup_Device.s </td><td>Startup file template for Arm C/C++ Compiler. </td></tr>
<tr>
<td>.\Device\_Template_Vendor\Vendor\Device\Source\GCC\startup_Device.s </td><td>Startup file template for GNU GCC Arm Embedded Compiler. </td></tr>
<tr>
<td>.\Device\_Template_Vendor\Vendor\Device\Source\IAR\startup_Device.s </td><td>Startup file template for IAR C/C++ Compiler. </td></tr>
<tr>
<td>.\Device\_Template_Vendor\Vendor\Device\Source\system_Device.c </td><td>Generic system_Device.c file for system configuration (i.e. processor clock and memory bus system). </td></tr>
<tr>
<td>.\Device\_Template_Vendor\Vendor\Device\Include\Device.h </td><td>Generic device header file. Needs to be extended with the device-specific peripheral registers. Optionally functions that access the peripherals can be part of that file. </td></tr>
<tr>
<td>.\Device\_Template_Vendor\Vendor\Device\Include\system_Device.h </td><td>Generic system device configuration include file. </td></tr>
</table>
<p><b>Adapt Template Files to a Device</b></p>
<p>The following steps describe how to adopt the template files to a specific device or device family. Copy the complete all files in the template directory and replace:</p>
<ul>
<li>directory name 'Vendor' with the abbreviation for the device vendor e.g.: NXP.</li>
<li>directory name 'Device' with the specific device name e.g.: LPC17xx.</li>
<li>in the file names 'Device' with the specific device name e.g.: LPC17xx.</li>
</ul>
<p>Each template file contains comments that start with <b>ToDo:</b> that describe a required modification. The template files contain place holders:</p>
<table class="cmtable">
<tr>
<th>Placeholder </th><th>Replaced with </th></tr>
<tr>
<td><Device> </td><td>the specific device name or device family name; i.e. LPC17xx. </td></tr>
<tr>
<td><DeviceInterrupt> </td><td>a specific interrupt name of the device; i.e. TIM1 for Timer 1. </td></tr>
<tr>
<td><DeviceAbbreviation> </td><td>short name or abbreviation of the device family; i.e. LPC. </td></tr>
<tr>
<td>Cortex-M# </td><td>the specific Cortex-M processor name; i.e. Cortex-M3. </td></tr>
</table>
<p>The device configuration of the template files is described in detail on the following pages:</p>
<ul>
<li><a class="el" href="startup_c_pg.html">Startup File startup_<device>.c</a></li>
<li><a class="el" href="startup_s_pg.html">Startup File startup_<device>.s (deprecated)</a> (deprecated)</li>
<li><a class="el" href="system_c_pg.html">System Configuration Files system_<device>.c and system_<device>.h</a></li>
<li><a class="el" href="device_h_pg.html">Device Header File <device.h></a></li>
<li><a class="el" href="partition_h_pg.html">System Partition Header File partition_<device>.h</a> </li>
</ul>
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