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<a href="#define-members">Macros</a> </div>
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<div class="title">Peripheral Access</div> </div>
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<p>Naming conventions and optional features for accessing peripherals.
<a href="#details">More...</a></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga286e3b913dbd236c7f48ea70c8821f4e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">_VAL2FLD</a>(field, value)</td></tr>
<tr class="memdesc:ga286e3b913dbd236c7f48ea70c8821f4e"><td class="mdescLeft"> </td><td class="mdescRight">Mask and shift a bit field value for assigning the result to a peripheral register. <a href="#ga286e3b913dbd236c7f48ea70c8821f4e">More...</a><br/></td></tr>
<tr class="separator:ga286e3b913dbd236c7f48ea70c8821f4e"><td class="memSeparator" colspan="2"> </td></tr>
<tr class="memitem:ga139b6e261c981f014f386927ca4a8444"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444">_FLD2VAL</a>(field, value)</td></tr>
<tr class="memdesc:ga139b6e261c981f014f386927ca4a8444"><td class="mdescLeft"> </td><td class="mdescRight">Extract from a peripheral register value the a bit field value. <a href="#ga139b6e261c981f014f386927ca4a8444">More...</a><br/></td></tr>
<tr class="separator:ga139b6e261c981f014f386927ca4a8444"><td class="memSeparator" colspan="2"> </td></tr>
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<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
<p>The section below describes the naming conventions, requirements, and optional features for accessing device specific peripherals. Most of the rules also apply to the core peripherals. The <a class="el" href="device_h_pg.html">Device Header File <device.h></a> contains typically these definition and also includes the core specific header files.</p>
<p>The definitions for <a class="el" href="group__peripheral__gr.html">Peripheral Access</a> can be generated using the <a href="../../SVD/html/index.html"><b>CMSIS-SVD</b></a> System View Description for Peripherals. Refer to <a href="../../SVD/html/svd_SVDConv_pg.html"><b>SVDConv.exe</b></a> for more information.</p>
<p>Each peripheral provides a data type definition with a name that is composed of:</p>
<ul>
<li>an optional prefix <b><<em>device abbreviation></em>_</b></li>
<li><b><<em>peripheral name</em>></b></li>
<li>postfix <b>_Type</b> or <b>_TypeDef</b> to identify a type definition.</li>
</ul>
<p>Examples:</p>
<ul>
<li><b>UART_TypeDef</b> for the peripheral <b>UART</b>.</li>
<li><b>LPC_UART_TypeDef</b> for the device family <b>LPC</b> and the peripheral <b>UART</b>.</li>
</ul>
<p>The data type definition uses standard C data types defined by the ANSI C header file <stdint.h>.</p>
<ul>
<li>IO Type Qualifiers are used to specify the access to peripheral variables. <table class="doxtable">
<tr>
<th align="left">IO Type Qualifier </th><th align="left">Type </th><th align="left">Description </th></tr>
<tr>
<td align="left"><b>__IM</b> </td><td align="left">Struct member </td><td align="left">Defines 'read only' permissions </td></tr>
<tr>
<td align="left"><b>__OM</b> </td><td align="left">Struct member </td><td align="left">Defines 'write only' permissions </td></tr>
<tr>
<td align="left"><b>__IOM</b> </td><td align="left">Struct member </td><td align="left">Defines 'read / write' permissions </td></tr>
<tr>
<td align="left"><b>__I</b> </td><td align="left">Scalar variable </td><td align="left">Defines 'read only' permissions </td></tr>
<tr>
<td align="left"><b>__O</b> </td><td align="left">Scalar variable </td><td align="left">Defines 'write only' permissions </td></tr>
<tr>
<td align="left"><b>__IO</b> </td><td align="left">Scalar variable </td><td align="left">Defines 'read / write' permissions </td></tr>
</table>
<dl class="section note"><dt>Note</dt><dd><b>__IM</b>, <b>__OM</b>, <b>__IOM</b> are added in CMSIS-Core V4.20 to enhance support for C++. Prior version used <b>__I</b>, <b>__O</b>, <b>__IO</b> also for struct member definitions.</dd></dl>
The typedef <b><<em>device abbreviation</em>>_UART_TypeDef</b> shown below defines the generic register layout for all UART channels in a device.</li>
</ul>
<div class="fragment"><div class="line"><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line">{</div>
<div class="line"> <span class="keyword">union </span>{</div>
<div class="line"> __IM uint8_t RBR; <span class="comment">/* Offset: 0x000 (R/ ) Receiver Buffer Register */</span></div>
<div class="line"> __OM uint8_t THR; <span class="comment">/* Offset: 0x000 ( /W) Transmit Holding Register */</span></div>
<div class="line"> __IOM uint8_t DLL; <span class="comment">/* Offset: 0x000 (R/W) Divisor Latch LSB */</span></div>
<div class="line"> uint32_t RESERVED0;</div>
<div class="line"> };</div>
<div class="line"> <span class="keyword">union </span>{</div>
<div class="line"> __IOM uint8_t DLM; <span class="comment">/* Offset: 0x004 (R/W) Divisor Latch MSB */</span></div>
<div class="line"> __IOM uint32_t IER; <span class="comment">/* Offset: 0x004 (R/W) Interrupt Enable Register */</span></div>
<div class="line"> };</div>
<div class="line"> <span class="keyword">union </span>{</div>
<div class="line"> __IM uint32_t IIR; <span class="comment">/* Offset: 0x008 (R/ ) Interrupt ID Register */</span></div>
<div class="line"> __OM uint8_t FCR; <span class="comment">/* Offset: 0x008 ( /W) FIFO Control Register */</span></div>
<div class="line"> };</div>
<div class="line"> __IOM uint8_t LCR; <span class="comment">/* Offset: 0x00C (R/W) Line Control Register */</span></div>
<div class="line"> uint8_t RESERVED1[7];</div>
<div class="line"> __IM uint8_t LSR; <span class="comment">/* Offset: 0x014 (R/ ) Line Status Register */</span></div>
<div class="line"> uint8_t RESERVED2[7];</div>
<div class="line"> __IOM uint8_t SCR; <span class="comment">/* Offset: 0x01C (R/W) Scratch Pad Register */</span></div>
<div class="line"> uint8_t RESERVED3[3];</div>
<div class="line"> __IOM uint32_t ACR; <span class="comment">/* Offset: 0x020 (R/W) Autobaud Control Register */</span></div>
<div class="line"> __IOM uint8_t ICR; <span class="comment">/* Offset: 0x024 (R/W) IrDA Control Register */</span></div>
<div class="line"> uint8_t RESERVED4[3];</div>
<div class="line"> __IOM uint8_t FDR; <span class="comment">/* Offset: 0x028 (R/W) Fractional Divider Register */</span></div>
<div class="line"> uint8_t RESERVED5[7];</div>
<div class="line"> __IOM uint8_t TER; <span class="comment">/* Offset: 0x030 (R/W) Transmit Enable Register */</span></div>
<div class="line"> uint8_t RESERVED6[39];</div>
<div class="line"> __IM uint8_t FIFOLVL; <span class="comment">/* Offset: 0x058 (R/ ) FIFO Level Register */</span></div>
<div class="line">} LPC_UART_TypeDef;</div>
</div><!-- fragment --><p>To access the registers of the UART defined above, pointers to this register structure are defined. If more instances of a peripheral exist, the variables have a postfix (digit or letter) that identifies the peripheral.</p>
<p><b>Example:</b> In this example <b>LPC_UART2</b> and <b>LPC_UART3</b> are two pointers to UARTs defined with above register structure. <br/>
</p>
<div class="fragment"><div class="line"><span class="preprocessor">#define LPC_UART2 ((LPC_UART_TypeDef *) LPC_UART2_BASE )</span></div>
<div class="line"><span class="preprocessor">#define LPC_UART3 ((LPC_UART_TypeDef *) LPC_UART3_BASE )</span></div>
</div><!-- fragment --><dl class="section note"><dt>Note</dt><dd><ul>
<li>The prefix <b>LPC</b> is optional.</li>
</ul>
</dd></dl>
<p>The registers in the various UARTs can now be referred in the user code as shown below:<br/>
</p>
<div class="fragment"><div class="line">val = LPC_UART2->DR <span class="comment">// is the data register of UART1.</span></div>
</div><!-- fragment --><hr/>
<h1><a class="anchor" id="core_cmsis_pal_min_reqs"></a>
Minimal Requirements</h1>
<p>To access the peripheral registers and related function in a device, the files <b><em>device.h</em></b> and <b>core_cm<em>#</em>.h</b> define as a minimum: <br/>
<br/>
</p>
<ul>
<li>The <b>Register Layout Typedef</b> for each peripheral that defines all register names. RESERVED is used to introduce space into the structure for adjusting the addresses of the peripheral registers. <br/>
<br/>
<b>Example:</b> <div class="fragment"><div class="line"><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line">{</div>
<div class="line"> __IOM uint32_t CTRL; <span class="comment">/* Offset: 0x000 (R/W) SysTick Control and Status Register */</span></div>
<div class="line"> __IOM uint32_t LOAD; <span class="comment">/* Offset: 0x004 (R/W) SysTick Reload Value Register */</span></div>
<div class="line"> __IOM uint32_t VAL; <span class="comment">/* Offset: 0x008 (R/W) SysTick Current Value Register */</span></div>
<div class="line"> __IM uint32_t CALIB; <span class="comment">/* Offset: 0x00C (R/ ) SysTick Calibration Register */</span></div>
<div class="line">} <a class="code" href="structSysTick__Type.html">SysTick_Type</a>;</div>
</div><!-- fragment --></li>
<li><b>Base Address</b> for each peripheral (in case of multiple peripherals that use the same <b>register layout typedef</b> multiple base addresses are defined). <br/>
<br/>
<b>Example:</b> <div class="fragment"><div class="line"><span class="preprocessor">#define SysTick_BASE (SCS_BASE + 0x0010) </span><span class="comment">/* SysTick Base Address */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></li>
<li><b>Access Definitions</b> for each peripheral. In case of multiple peripherals that are using the same <b>register layout typdef</b>, multiple access definitions exist (LPC_UART0, LPC_UART2). <br/>
<br/>
<b>Example:</b> <div class="fragment"><div class="line"><span class="preprocessor">#define SysTick ((SysTick_Type *) Systick_BASE) </span><span class="comment">/* SysTick access definition */</span><span class="preprocessor"></span></div>
</div><!-- fragment --></li>
</ul>
<p>These definitions allow accessing peripheral registers with simple assignments.</p>
<ul>
<li><b>Example:</b> <br/>
<div class="fragment"><div class="line">SysTick->CTRL = 0;</div>
</div><!-- fragment --></li>
</ul>
<hr/>
<h1><a class="anchor" id="core_cmsis_pal_opts"></a>
Optional Features</h1>
<p>Optionally, the file <b><em>device</em>.h</b> may define:</p>
<ul>
<li><a class="el" href="group__peripheral__gr.html#core_cmsis_pal_bitfields">Register Bit Fields</a> and #define constants that simplify access to peripheral registers. These constants may define bit-positions or other specific patterns that are required for programming peripheral registers. The identifiers should start with <b><<em>device abbreviation</em>>_</b> and <b><<em>peripheral name</em>>_</b>. It is recommended to use CAPITAL letters for #define constants.</li>
<li>More complex functions (i.e. status query before a sending register is accessed). Again, these functions start with <b><<em>device abbreviation</em>>_</b> and <b><<em>peripheral name</em>>_</b>.</li>
</ul>
<hr/>
<h1><a class="anchor" id="core_cmsis_pal_bitfields"></a>
Register Bit Fields</h1>
<p>For Core Register, macros define the position and the mask value for a bit field. It is recommended to create such definitions also for other peripheral registers.</p>
<p><b>Example:</b></p>
<p>Bit field definitions for register CPUID in SCB (System Control Block).</p>
<div class="fragment"><div class="line"><span class="comment">/* SCB CPUID Register Definitions */</span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_IMPLEMENTER_Pos 24U </span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_IMPLEMENTER_Msk (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos) </span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_VARIANT_Pos 20U </span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_VARIANT_Msk (0xFUL << SCB_CPUID_VARIANT_Pos) </span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_ARCHITECTURE_Pos 16U </span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_ARCHITECTURE_Msk (0xFUL << SCB_CPUID_ARCHITECTURE_Pos) </span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_PARTNO_Pos 4U </span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_PARTNO_Msk (0xFFFUL << SCB_CPUID_PARTNO_Pos) </span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_REVISION_Pos 0U </span></div>
<div class="line"><span class="preprocessor">#define SCB_CPUID_REVISION_Msk (0xFUL </span><span class="comment">/*<< SCB_CPUID_REVISION_Pos*/</span><span class="preprocessor">) </span></div>
</div><!-- fragment --><p>The macros <b><a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e" title="Mask and shift a bit field value for assigning the result to a peripheral register. ">_VAL2FLD(field, value)</a></b> and <b><a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444" title="Extract from a peripheral register value the a bit field value. ">_FLD2VAL(field, value)</a></b> enable access to bit fields. </p>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga139b6e261c981f014f386927ca4a8444"></a>
<div class="memitem">
<div class="memproto">
<table class="memname">
<tr>
<td class="memname">#define _FLD2VAL</td>
<td>(</td>
<td class="paramtype"> </td>
<td class="paramname">field, </td>
</tr>
<tr>
<td class="paramkey"></td>
<td></td>
<td class="paramtype"> </td>
<td class="paramname">value </td>
</tr>
<tr>
<td></td>
<td>)</td>
<td></td><td></td>
</tr>
</table>
</div><div class="memdoc">
<dl class="params"><dt>Parameters</dt><dd>
<table class="params">
<tr><td class="paramname">field</td><td>name of bit field. </td></tr>
<tr><td class="paramname">value</td><td>value of the register. This parameter is interpreted as an uint32_t type.</td></tr>
</table>
</dd>
</dl>
<p>The macro <a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444">_FLD2VAL</a> uses the #define's <em>_Pos</em> and <em>_Msk</em> of the related bit field to extract the value of a bit field from a register.</p>
<p><b>Example:</b> </p>
<div class="fragment"><div class="line"><span class="keywordtype">id</span> = <a class="code" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444">_FLD2VAL</a>(SCB_CPUID_REVISION, SCB->CPUID);</div>
</div><!-- fragment -->
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<td class="memname">#define _VAL2FLD</td>
<td>(</td>
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<td class="paramname">field, </td>
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<td class="paramname">value </td>
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<dl class="params"><dt>Parameters</dt><dd>
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<tr><td class="paramname">field</td><td>name of bit field. </td></tr>
<tr><td class="paramname">value</td><td>value for the bit field. This parameter is interpreted as an uint32_t type.</td></tr>
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<p>The macro <a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">_VAL2FLD</a> uses the #define's <em>_Pos</em> and <em>_Msk</em> of the related bit field to shift bit-field values for assigning to a register.</p>
<p><b>Example:</b> </p>
<div class="fragment"><div class="line">SCB->CPUID = <a class="code" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">_VAL2FLD</a>(SCB_CPUID_REVISION, 0x3) | <a class="code" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">_VAL2FLD</a>(SCB_CPUID_VARIANT, 0x3);</div>
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