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| author | Ali Labbene <ali.labbene@st.com> | 2019-12-11 08:59:21 +0100 |
|---|---|---|
| committer | Ali Labbene <ali.labbene@st.com> | 2019-12-16 16:35:24 +0100 |
| commit | 9f95ff5b6ba01db09552b84a0ab79607060a2666 (patch) | |
| tree | 8a6e0dda832555c692307869aed49d07ee7facfe /docs/Driver/html/group__usart__execution__status.js | |
| parent | 76177aa280494bb36d7a0bcbda1078d4db717020 (diff) | |
| download | st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.tar.gz st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.tar.bz2 st-cmsis-core-lowfat-9f95ff5b6ba01db09552b84a0ab79607060a2666.zip | |
Official ARM version: v5.4.0
Add CMSIS V5.4.0, please refer to index.html available under \docs folder.
Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure
used in existing projects, and thus avoid projects mass update
Note: the following components have been removed from ARM original delivery (as not used in ST packages)
- CMSIS_EW2018.pdf
- .gitattributes
- .gitignore
- \Device
- \CMSIS
- \CoreValidation
- \DAP
- \Documentation
- \DoxyGen
- \Driver
- \Pack
- \RTOS\CMSIS_RTOS_Tutorial.pdf
- \RTOS\RTX
- \RTOS\Template
- \RTOS2\RTX
- \Utilities
- All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2
Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3
Diffstat (limited to 'docs/Driver/html/group__usart__execution__status.js')
| -rw-r--r-- | docs/Driver/html/group__usart__execution__status.js | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/docs/Driver/html/group__usart__execution__status.js b/docs/Driver/html/group__usart__execution__status.js new file mode 100644 index 0000000..25d8419 --- /dev/null +++ b/docs/Driver/html/group__usart__execution__status.js @@ -0,0 +1,11 @@ +var group__usart__execution__status = +[ + [ "ARM_USART_ERROR_MODE", "group__usart__execution__status.html#gaa98f35611ec5bd7034f21cb47199322b", null ], + [ "ARM_USART_ERROR_BAUDRATE", "group__usart__execution__status.html#gab57c4e8d4cb3a4b73751a002f5ec4586", null ], + [ "ARM_USART_ERROR_DATA_BITS", "group__usart__execution__status.html#gaade95ddec6882e96c086dfe8e0ba9a4c", null ], + [ "ARM_USART_ERROR_PARITY", "group__usart__execution__status.html#gaefabd886c586a45f4f7346c1f04392d0", null ], + [ "ARM_USART_ERROR_STOP_BITS", "group__usart__execution__status.html#ga1d699654fbbed3ca41c5ea10aac8f859", null ], + [ "ARM_USART_ERROR_FLOW_CONTROL", "group__usart__execution__status.html#gaf8fea8d43ff72c76434d8b5e9eebd890", null ], + [ "ARM_USART_ERROR_CPOL", "group__usart__execution__status.html#ga2a1cd0a1e1bce9b545b0d7854a6fd6d6", null ], + [ "ARM_USART_ERROR_CPHA", "group__usart__execution__status.html#gade1af23c4ed5409dacd99ab76dc2ff8b", null ] +];
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