Official ARM version: v5.4.0

    Add CMSIS V5.4.0, please refer to index.html available under \docs folder.

    Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure
         used in existing projects, and thus avoid projects mass update
    Note: the following components have been removed from ARM original delivery (as not used in ST packages)
        - CMSIS_EW2018.pdf
        - .gitattributes
        - .gitignore
        - \Device
        - \CMSIS
           - \CoreValidation
		   - \DAP
           - \Documentation
           - \DoxyGen
           - \Driver
           - \Pack
           - \RTOS\CMSIS_RTOS_Tutorial.pdf
           - \RTOS\RTX
           - \RTOS\Template
           - \RTOS2\RTX
           - \Utilities
           - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2

Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3

1 files changed, 22 insertions, 0 deletions

diff --git a/docs/Core/html/search/functions_3.js b/docs/Core/html/search/functions_3.js
new file mode 100644
index 0000000..f80554c
--- /dev/null
+++ b/docs/Core/html/search/functions_3.js
@@ -0,0 +1,22 @@
+var searchData=
+[
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+  ['nvic_5fcleartargetstate',['NVIC_ClearTargetState',['../group__NVIC__gr.html#ga44b31316872e91bda1af7e17173de24b',1,'Ref_NVIC.txt']]],
+  ['nvic_5fdecodepriority',['NVIC_DecodePriority',['../group__NVIC__gr.html#gad3cbca1be7a4726afa9448a9acd89377',1,'Ref_NVIC.txt']]],
+  ['nvic_5fdisableirq',['NVIC_DisableIRQ',['../group__NVIC__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c',1,'Ref_NVIC.txt']]],
+  ['nvic_5fenableirq',['NVIC_EnableIRQ',['../group__NVIC__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f',1,'Ref_NVIC.txt']]],
+  ['nvic_5fencodepriority',['NVIC_EncodePriority',['../group__NVIC__gr.html#ga0688c59605b119c53c71b2505ab23eb5',1,'Ref_NVIC.txt']]],
+  ['nvic_5fgetactive',['NVIC_GetActive',['../group__NVIC__gr.html#gadf4252e600661fd762cfc0d1a9f5b892',1,'Ref_NVIC.txt']]],
+  ['nvic_5fgetenableirq',['NVIC_GetEnableIRQ',['../group__NVIC__gr.html#ga72f102d31af0ee4aa7a6fb7a180840f3',1,'Ref_NVIC.txt']]],
+  ['nvic_5fgetpendingirq',['NVIC_GetPendingIRQ',['../group__NVIC__gr.html#ga95a8329a680b051ecf3ee8f516acc662',1,'Ref_NVIC.txt']]],
+  ['nvic_5fgetpriority',['NVIC_GetPriority',['../group__NVIC__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395',1,'Ref_NVIC.txt']]],
+  ['nvic_5fgetprioritygrouping',['NVIC_GetPriorityGrouping',['../group__NVIC__gr.html#gaa81b19849367d3cdb95ac108c500fa78',1,'Ref_NVIC.txt']]],
+  ['nvic_5fgettargetstate',['NVIC_GetTargetState',['../group__NVIC__gr.html#ga62b37611e1ccbac47d747c98ef302746',1,'Ref_NVIC.txt']]],
+  ['nvic_5fgetvector',['NVIC_GetVector',['../group__NVIC__gr.html#gaebee9cad6724a5bac1857f0f1fb6d6af',1,'Ref_NVIC.txt']]],
+  ['nvic_5fsetpendingirq',['NVIC_SetPendingIRQ',['../group__NVIC__gr.html#ga3b885147ef9965ecede49614de8df9d2',1,'Ref_NVIC.txt']]],
+  ['nvic_5fsetpriority',['NVIC_SetPriority',['../group__NVIC__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798',1,'Ref_NVIC.txt']]],
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+  ['nvic_5fsettargetstate',['NVIC_SetTargetState',['../group__NVIC__gr.html#gaf46218d01a6a3b70666ad0492a7f950a',1,'Ref_NVIC.txt']]],
+  ['nvic_5fsetvector',['NVIC_SetVector',['../group__NVIC__gr.html#gab43c1c59d5c081f1bc725237f4b1f916',1,'Ref_NVIC.txt']]],
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+];