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author | rihab kouki <rihab.kouki@st.com> | 2020-07-28 11:24:49 +0100 |
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committer | rihab kouki <rihab.kouki@st.com> | 2020-07-28 11:24:49 +0100 |
commit | 96d6da4e252b06dcfdc041e7df23e86161c33007 (patch) | |
tree | a262f59bb1db7ec7819acae435f5049cbe5e2354 /DSP/Source/BasicMathFunctions/arm_add_f32.c | |
parent | 9f95ff5b6ba01db09552b84a0ab79607060a2666 (diff) | |
download | st-cmsis-core-lowfat-master.tar.gz st-cmsis-core-lowfat-master.tar.bz2 st-cmsis-core-lowfat-master.zip |
Diffstat (limited to 'DSP/Source/BasicMathFunctions/arm_add_f32.c')
-rw-r--r-- | DSP/Source/BasicMathFunctions/arm_add_f32.c | 139 |
1 files changed, 73 insertions, 66 deletions
diff --git a/DSP/Source/BasicMathFunctions/arm_add_f32.c b/DSP/Source/BasicMathFunctions/arm_add_f32.c index 78feb64..1c66a24 100644 --- a/DSP/Source/BasicMathFunctions/arm_add_f32.c +++ b/DSP/Source/BasicMathFunctions/arm_add_f32.c @@ -3,13 +3,13 @@ * Title: arm_add_f32.c * Description: Floating-point vector addition * - * $Date: 27. January 2017 - * $Revision: V.1.5.1 + * $Date: 18. March 2019 + * $Revision: V1.6.0 * * Target Processor: Cortex-M cores * -------------------------------------------------------------------- */ /* - * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved. + * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -29,110 +29,117 @@ #include "arm_math.h" /** - * @ingroup groupMath + @ingroup groupMath */ /** - * @defgroup BasicAdd Vector Addition - * - * Element-by-element addition of two vectors. - * - * <pre> - * pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize. - * </pre> - * - * There are separate functions for floating-point, Q7, Q15, and Q31 data types. + @defgroup BasicAdd Vector Addition + + Element-by-element addition of two vectors. + + <pre> + pDst[n] = pSrcA[n] + pSrcB[n], 0 <= n < blockSize. + </pre> + + There are separate functions for floating-point, Q7, Q15, and Q31 data types. */ /** - * @addtogroup BasicAdd - * @{ + @addtogroup BasicAdd + @{ */ /** - * @brief Floating-point vector addition. - * @param[in] *pSrcA points to the first input vector - * @param[in] *pSrcB points to the second input vector - * @param[out] *pDst points to the output vector - * @param[in] blockSize number of samples in each vector - * @return none. + @brief Floating-point vector addition. + @param[in] pSrcA points to first input vector + @param[in] pSrcB points to second input vector + @param[out] pDst points to output vector + @param[in] blockSize number of samples in each vector + @return none */ void arm_add_f32( - float32_t * pSrcA, - float32_t * pSrcB, - float32_t * pDst, - uint32_t blockSize) + const float32_t * pSrcA, + const float32_t * pSrcB, + float32_t * pDst, + uint32_t blockSize) { - uint32_t blkCnt; /* loop counter */ - -#if defined (ARM_MATH_DSP) + uint32_t blkCnt; /* Loop counter */ + +#if defined(ARM_MATH_NEON) + float32x4_t vec1; + float32x4_t vec2; + float32x4_t res; + + /* Compute 4 outputs at a time */ + blkCnt = blockSize >> 2U; + + while (blkCnt > 0U) + { + /* C = A + B */ + + /* Add and then store the results in the destination buffer. */ + vec1 = vld1q_f32(pSrcA); + vec2 = vld1q_f32(pSrcB); + res = vaddq_f32(vec1, vec2); + vst1q_f32(pDst, res); + + /* Increment pointers */ + pSrcA += 4; + pSrcB += 4; + pDst += 4; + + /* Decrement the loop counter */ + blkCnt--; + } + + /* Tail */ + blkCnt = blockSize & 0x3; -/* Run the below code for Cortex-M4 and Cortex-M3 */ - float32_t inA1, inA2, inA3, inA4; /* temporary input variabels */ - float32_t inB1, inB2, inB3, inB4; /* temporary input variables */ +#else +#if defined (ARM_MATH_LOOPUNROLL) - /*loop Unrolling */ + /* Loop unrolling: Compute 4 outputs at a time */ blkCnt = blockSize >> 2U; - /* First part of the processing with loop unrolling. Compute 4 outputs at a time. - ** a second loop below computes the remaining 1 to 3 samples. */ while (blkCnt > 0U) { /* C = A + B */ - /* Add and then store the results in the destination buffer. */ - - /* read four inputs from sourceA and four inputs from sourceB */ - inA1 = *pSrcA; - inB1 = *pSrcB; - inA2 = *(pSrcA + 1); - inB2 = *(pSrcB + 1); - inA3 = *(pSrcA + 2); - inB3 = *(pSrcB + 2); - inA4 = *(pSrcA + 3); - inB4 = *(pSrcB + 3); - - /* C = A + B */ - /* add and store result to destination */ - *pDst = inA1 + inB1; - *(pDst + 1) = inA2 + inB2; - *(pDst + 2) = inA3 + inB3; - *(pDst + 3) = inA4 + inB4; - - /* update pointers to process next samples */ - pSrcA += 4U; - pSrcB += 4U; - pDst += 4U; + /* Add and store result in destination buffer. */ + *pDst++ = (*pSrcA++) + (*pSrcB++); + *pDst++ = (*pSrcA++) + (*pSrcB++); + *pDst++ = (*pSrcA++) + (*pSrcB++); + *pDst++ = (*pSrcA++) + (*pSrcB++); - /* Decrement the loop counter */ + /* Decrement loop counter */ blkCnt--; } - /* If the blockSize is not a multiple of 4, compute any remaining output samples here. - ** No loop unrolling is used. */ + /* Loop unrolling: Compute remaining outputs */ blkCnt = blockSize % 0x4U; #else - /* Run the below code for Cortex-M0 */ - /* Initialize blkCnt with number of samples */ blkCnt = blockSize; -#endif /* #if defined (ARM_MATH_DSP) */ +#endif /* #if defined (ARM_MATH_LOOPUNROLL) */ +#endif /* #if defined(ARM_MATH_NEON) */ while (blkCnt > 0U) { /* C = A + B */ - /* Add and then store the results in the destination buffer. */ + + /* Add and store result in destination buffer. */ *pDst++ = (*pSrcA++) + (*pSrcB++); - /* Decrement the loop counter */ + /* Decrement loop counter */ blkCnt--; } + } /** - * @} end of BasicAdd group + @} end of BasicAdd group */ |