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AgeCommit message (Expand)AuthorFilesLines
2018-05-19Add spice sims and spice plot prettifierjaseg19-0/+22221
2018-05-18Add one more RGB spectrum runjaseg3-3412/+148
2018-05-13Move to new run capture archjaseg5-276/+442
2018-05-05Added LED setpoint calculationjaseg4-3/+318
2018-05-05Add some docjaseg1-789/+18
2018-05-05Nice spectrum plot looking as it should, including photodiode response compen...jaseg5-21/+4945
2018-05-05Change firmware to fit Lyzajaseg1-12/+9
2018-05-05Add spectrum measurement stuffjaseg8-0/+2780
2018-04-27Remove unused TIM3 codejaseg1-48/+3
2018-04-27Make channel count configurablejaseg3-5/+7
2018-04-27firmware: Small comment updatejaseg1-1/+1
2018-04-24Small firmware code prettificationjaseg1-12/+9
2018-04-24Nice smooth results nowjaseg3-9/+37
2018-04-24Somewhat more linear slidejaseg4-44/+71
2018-04-24More pretty graphs, and initial correction calculationjaseg5-86/+273
2018-04-21Pretty graphs and stable resultsjaseg3-41/+78
2018-04-21Add bit error test scriptsjaseg2-0/+223
2018-04-21Add python driver for new comms protocoljaseg1-0/+126
2018-04-21Fix new packet-based comms protocoljaseg7-110/+113
2018-04-17Move to new serial protocol.jaseg9-117/+478
2018-04-17Fix flickering during UART communicationjaseg1-1/+1
2018-04-16removed tmp fileMatthias Hannig1-0/+0
2018-04-16updated initialization for 25 MHz xtalMatthias Hannig2-16/+32
2018-03-06fnord23Matthias Hannig6-4/+18
2017-10-05Fix-up repository structurejaseg106-2243/+3
2017-10-05Add .gitignorejaseg1-0/+13
2017-10-05Add source-in-firmware trickjaseg2-1/+15
2017-10-05Add more comments, add LICENSEjaseg2-147/+901
2017-09-26Serial protocol workingjaseg2-8/+144
2017-09-24Merge branch 'master' of github.com:jaseg/led_drvjaseg37-9712/+8194
2017-09-24fw: Add missing filesjaseg3-0/+313
2017-09-24Working rainbow codejaseg3-137/+122
2017-05-30hw: Add BOMjaseg1-0/+0
2017-05-30fw: Basic dimming workingjaseg1-10/+101
2017-05-17Re-export↑←↑↓→↓→←↑26-2496/+2674
2017-05-16Development release dev-01↑←↑↓→↓→←↑20-6105/+4409
2016-12-20Exponential timing working with slight inaccuracies in lower rangesjaseg1-40/+42
2016-12-19Clocking workingjaseg1-9/+18
2016-12-19All timings donejaseg1-15/+17
2016-12-19Basic PWM workingjaseg1-20/+39
2016-12-19fnordjaseg1-15/+15
2016-12-19Add first firmware foojaseg4-0/+628
2016-12-14Update .gitignore to include Altium Designer history↑←↑↓→↓→←↑1-0/+2
2016-12-14WIP, add export↑←↑↓→↓→←↑54-8/+50795
2016-11-23It has become quite a mess↑←↑↓→↓→←↑18-6/+86
2016-11-23Add connectors↑←↑↓→↓→←↑16-13/+199
2016-11-21layouting along↑←↑↓→↓→←↑31-0/+3100
2016-11-17:octocat: Added .gitattributes & .gitignore files↑←↑↓→↓→←↑2-0/+64
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