3 files changed, 0 insertions, 196 deletions
diff --git a/tests/rcc-legal-ranges/Makefile.stm32l1-generic b/tests/rcc-legal-ranges/Makefile.stm32l1-generic
deleted file mode 100644
index b9ecc71..0000000
--- a/tests/rcc-legal-ranges/Makefile.stm32l1-generic
+++ /dev/null
@@ -1,28 +0,0 @@
-
-BOARD = stm32l1-generic
-PROJECT = rcc-legal-ranges-$(BOARD)
-BUILD_DIR = bin-$(BOARD)
-OPT=-O0
-
-SHARED_DIR = ../../shared
-
-CFILES = main-$(BOARD).c
-#CFILES += trace.c trace_stdio.c
-
-VPATH += $(SHARED_DIR)
-
-INCLUDES += $(patsubst %,-I%, . $(SHARED_DIR))
-
-OPENCM3_DIR=../../libopencm3/
-
-### This section can go to an arch shared rules eventually...
-LDSCRIPT = $(OPENCM3_DIR)/lib/stm32/l1/stm32l15xx6.ld # pessimistic ;)
-OPENCM3_LIB = opencm3_stm32l1
-OPENCM3_DEFS = -DSTM32L1
-FP_FLAGS ?=
-ARCH_FLAGS = -mthumb -mcpu=cortex-m3 $(FP_FLAGS)
-# Use the base targets, as we're playing with clocking too much for swo
-OOCD_INTERFACE = stlink-v2
-OOCD_TARGET = stm32l1
-
-include ../../rules.mk
diff --git a/tests/rcc-legal-ranges/README.md b/tests/rcc-legal-ranges/README.md
deleted file mode 100644
index 2313ebd..0000000
--- a/tests/rcc-legal-ranges/README.md
+++ /dev/null
@@ -1,14 +0,0 @@
-
-Tests whether legal clock config structures can actually be used.
-This primarily is testing whether the order of steps taken for
-turning on and selecting different clocks, power ranges and flash
-wait state configuration are robust enough.
-
-## PASSING
-On boot you should get two slow blinks.
-After boot, you should get continuous 5/2 fast/slow blinks as it
-continuously shuffles and resets clock configurations.
-
-## FAILING
-The board stops blinking at any point in the sequence
-
diff --git a/tests/rcc-legal-ranges/main-stm32l1-generic.c b/tests/rcc-legal-ranges/main-stm32l1-generic.c
deleted file mode 100644
index 8c97bad..0000000
--- a/tests/rcc-legal-ranges/main-stm32l1-generic.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * Aug 2016 Karl Palsson <karlp@tweak.net.au>
- */
-
-#include <stdlib.h>
-#include <libopencm3/stm32/flash.h>
-#include <libopencm3/stm32/gpio.h>
-#include <libopencm3/stm32/pwr.h>
-#include <libopencm3/stm32/rcc.h>
-
-/* Disco board is b6 */
-#define LEDPORT GPIOB
-#define LEDPIN GPIO6
-
-#ifndef ARRAY_LENGTH
-#define ARRAY_LENGTH(array) (sizeof((array))/sizeof((array)[0]))
-#endif
-
-/*
- * A set of valid clock configurations with HSI as the source.
- * thankfully, L1 allows apb1/apb2 to reach full ahb speed in all cases.
- */
-struct rcc_clock_scale valid_hsi_clocks[] = {
-	{
-		/* 8Mhz, hsi/div2, max perf for range 2 with 0 ws */
-		.hpre = RCC_CFGR_HPRE_SYSCLK_DIV2,
-		.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.ppre2 = RCC_CFGR_PPRE2_HCLK_NODIV,
-		.voltage_scale = PWR_SCALE2,
-		.flash_config = FLASH_ACR_LATENCY_0WS,
-		.ahb_frequency = 8e6,
-		.apb1_frequency = 8e6,
-		.apb2_frequency = 8e6,
-	},
-	{
-		/* Slowest hsi possible */
-		.hpre = RCC_CFGR_HPRE_SYSCLK_DIV512,
-		.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.ppre2 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.voltage_scale = PWR_SCALE3,
-		.flash_config = FLASH_ACR_LATENCY_0WS,
-		.ahb_frequency = 31250,
-		.apb1_frequency = 31250,
-		.apb2_frequency = 31250,
-	},
-	{
-		/* Fastest HSI possible, range 1, 0ws */
-		.hpre = RCC_CFGR_HPRE_SYSCLK_NODIV,
-		.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.ppre2 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.voltage_scale = PWR_SCALE1,
-		.flash_config = FLASH_ACR_LATENCY_0WS,
-		.ahb_frequency = 16e6,
-		.apb1_frequency = 16e6,
-		.apb2_frequency = 16e6,
-	},
-	{
-		/* highest perf for range 3 with 0 wait states */
-		.hpre = RCC_CFGR_HPRE_SYSCLK_DIV8,
-		.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.ppre2 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.voltage_scale = PWR_SCALE3,
-		.flash_config = FLASH_ACR_LATENCY_0WS,
-		.ahb_frequency = 2e6,
-		.apb1_frequency = 2e6,
-		.apb2_frequency = 2e6,
-	},
-	{
-		/* Fastest HSI for range 2, 0ws */
-		.hpre = RCC_CFGR_HPRE_SYSCLK_NODIV,
-		.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.ppre2 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.voltage_scale = PWR_SCALE1,
-		.flash_config = FLASH_ACR_LATENCY_0WS,
-		.ahb_frequency = 16e6,
-		.apb1_frequency = 16e6,
-		.apb2_frequency = 16e6,
-	},
-	{
-		/* highest perf for range 3 */
-		.hpre = RCC_CFGR_HPRE_SYSCLK_DIV4,
-		.ppre1 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.ppre2 = RCC_CFGR_PPRE1_HCLK_NODIV,
-		.voltage_scale = PWR_SCALE3,
-		.flash_config = FLASH_ACR_LATENCY_1WS,
-		.ahb_frequency = 4e6,
-		.apb1_frequency = 4e6,
-		.apb2_frequency = 4e6,
-	},
-};
-
-int shuffled[ARRAY_LENGTH(valid_hsi_clocks)];
-
-/**
- * blink led count times, with vile hack * 1000 asm nops
- */
-static void hack_blink(int count, int hack)
-{
-	for (int i = 0; i < count; i++) {
-		gpio_toggle(LEDPORT, LEDPIN);
-		for (int k = 0; k < hack * 1000; k++) {
-			__asm__("nop");
-		}
-	}
-}
-
-/* Stack overflow, wiki, whathaveyou */
-/* FIXME oh yeah, did I mention that rand() is always zero? */
-static void shuffle_fisher_yates(int *array, size_t n)
-{
-	if (n > 1) {
-		size_t i;
-		for (i = 0; i < n - 1; i++) {
-			size_t j = i + rand() / (RAND_MAX / (n - i) + 1);
-			int t = array[j];
-			array[j] = array[i];
-			array[i] = t;
-		}
-	}
-}
-
-static void run_clock_set(void)
-{
-	shuffle_fisher_yates(shuffled, ARRAY_LENGTH(shuffled));
-
-	struct rcc_clock_scale *clock;
-	for (size_t i = 0; i < ARRAY_LENGTH(shuffled); i++) {
-		clock = &valid_hsi_clocks[i];
-		rcc_clock_setup_hsi(clock);
-		/** blink quickly/slowly as we run through these */
-		hack_blink(10, clock->ahb_frequency / (500 * 1000));
-		hack_blink(4, clock->ahb_frequency / (200 * 1000));
-	}
-}
-
-int main(void)
-{
-	/* Allow leds on any port */
-	RCC_AHBENR |= 0xff;
-	gpio_mode_setup(LEDPORT, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, LEDPIN);
-	/* blink twice with slow msi reset clock */
-	hack_blink(4, 60);
-	
-	/* ok, now, "randomly" sort the list of clocks to try them out */
-	for (size_t i = 0; i < ARRAY_LENGTH(shuffled); i++) {
-		shuffled[i] = i;
-	}
-
-	while (1) {
-		run_clock_set();
-	}
-
-	return 0;
-}