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author | Karl Palsson <karlp@etactica.com> | 2016-08-18 18:35:00 +0000 |
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committer | Karl Palsson <karlp@etactica.com> | 2016-08-19 11:31:57 +0000 |
commit | cb945fa6711e1fbe224e8a9d745c740f71dce279 (patch) | |
tree | f6dd14ff2ae6b05c49c79e0c4616c289ae899d29 /tests/rcc-legal-ranges/README.md | |
parent | 3d72709fdadb5a6521e534c21f2b74e35325a66e (diff) | |
download | olsndot-cb945fa6711e1fbe224e8a9d745c740f71dce279.tar.gz olsndot-cb945fa6711e1fbe224e8a9d745c740f71dce279.tar.bz2 olsndot-cb945fa6711e1fbe224e8a9d745c740f71dce279.zip |
rcc-legal-ranges: run through a range of clocks
blink fast/slow for each clock configuration tested, then finish by
blinking idly.
As of this commit, this test fails quickly on most L1 boards tested.
An update to libopencm3 is required to fix this.
Diffstat (limited to 'tests/rcc-legal-ranges/README.md')
-rw-r--r-- | tests/rcc-legal-ranges/README.md | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/tests/rcc-legal-ranges/README.md b/tests/rcc-legal-ranges/README.md index 2720e56..2313ebd 100644 --- a/tests/rcc-legal-ranges/README.md +++ b/tests/rcc-legal-ranges/README.md @@ -5,8 +5,9 @@ turning on and selecting different clocks, power ranges and flash wait state configuration are robust enough. ## PASSING -The board should issue a series of blinks at various rates before -settling on a steady rate +On boot you should get two slow blinks. +After boot, you should get continuous 5/2 fast/slow blinks as it +continuously shuffles and resets clock configurations. ## FAILING The board stops blinking at any point in the sequence |