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| author | Karl Palsson <karlp@tweak.net.au> | 2018-02-19 21:06:16 +0000 |
|---|---|---|
| committer | Karl Palsson <karlp@tweak.net.au> | 2018-02-19 21:06:16 +0000 |
| commit | 3b237a528804bc8f1e3304d2be76df17f809ac39 (patch) | |
| tree | 035f014d9bf33ea754b5f43894e47942724bca76 /tests/adc-power/Makefile | |
| parent | eb6139b4fa3930bccb4a7d659803968a732100b4 (diff) | |
| download | olsndot-3b237a528804bc8f1e3304d2be76df17f809ac39.tar.gz olsndot-3b237a528804bc8f1e3304d2be76df17f809ac39.tar.bz2 olsndot-3b237a528804bc8f1e3304d2be76df17f809ac39.zip | |
hw1: update to current
Not really sure, did I forget to checkin after shipping out? Something
got updated after a dot update of kicad? revision control of pcbs and
schematics still sucks hard.
Diffstat (limited to 'tests/adc-power/Makefile')
0 files changed, 0 insertions, 0 deletions