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authorjaseg <git@jaseg.net>2017-09-24 23:16:49 +0200
committerjaseg <git@jaseg.net>2017-09-24 23:16:49 +0200
commitbf19c278a6a74a18e00cd576852817400cd6fed9 (patch)
treec4d5d3e6a64516c0ed45fac731bf1188f4bf8ea0 /olsndot/firmware/Makefile
parente1daad1f2e977aeea8dd0f227e3e4ef6def1b68a (diff)
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Working rainbow code
Diffstat (limited to 'olsndot/firmware/Makefile')
-rw-r--r--olsndot/firmware/Makefile9
1 files changed, 6 insertions, 3 deletions
diff --git a/olsndot/firmware/Makefile b/olsndot/firmware/Makefile
index cf338eb..625865d 100644
--- a/olsndot/firmware/Makefile
+++ b/olsndot/firmware/Makefile
@@ -10,13 +10,13 @@ SIZE := arm-none-eabi-size
CFLAGS = -Wall -g -std=gnu11 -Os
CFLAGS += -mlittle-endian -mcpu=cortex-m0 -march=armv6-m -mthumb
-CFLAGS += -ffunction-sections -fdata-sections
-CFLAGS += -Wl,--gc-sections -Wl,-Map=main.map
+CFLAGS += -ffunction-sections -fdata-sections -Wl,--gc-sections
+CFLAGS += -Wl,-Map=main.map
# Technically we're using an STM32F030F4, but apart from the TSSOP20 package that one is largely identical to the
# STM32F030*6 and there is no separate device header provided for it, so we're faking a *6 device here. This is
# even documented in stm32f0xx.h. Thanks ST!
-CFLAGS += -DSTM32F030x6
+CFLAGS += -DSTM32F030x6 -DHSE_VALUE=16000000
CFLAGS += -Tstm32_flash.ld
CFLAGS += -I$(CMSIS_DEV_PATH)/Include -I$(CMSIS_PATH)/Include -I$(HAL_PATH)/Inc -Iconfig
@@ -28,6 +28,9 @@ CFLAGS += -L$(CMSIS_PATH)/Lib/GCC -larm_cortexM0l_math
all: main.elf
+cmsis_exports.c: $(CMSIS_DEV_PATH)/Include/stm32f030x6.h $(CMSIS_PATH)/Include/core_cm0.h
+ python3 gen_cmsis_exports.py $^ > $@
+
main.elf: main.c startup_stm32f030x6.s system_stm32f0xx.c $(HAL_PATH)/Src/stm32f0xx_ll_utils.c
$(CC) $(CFLAGS) -o $@ $^
$(OBJCOPY) -O ihex $@ $(@:.elf=.hex)