WIP: hardware test partner round 1

Not sure which kicad files are necessary and which are local yet!

Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st
board, giving access to test:
* DAC->ADC (both directions)
* I2C (both directions)
* SPI (both directions)
* Uart (both directions)

a socket for a cheap fx2 based logic analyser will be included, so that
sigrok can be used to capture tests of the actual line states.

1 files changed, 59 insertions, 0 deletions

diff --git a/hw1/hw1.cmp b/hw1/hw1.cmp
new file mode 100644
index 0000000..dbd4c40
--- /dev/null
+++ b/hw1/hw1.cmp
@@ -0,0 +1,59 @@
+Cmp-Mod V01 Created by Cvpcb (2015-03-25 BZR 5536)-product   date = mer. 08 avril 2015 09:59:14 UTC
+
+BeginCmp
+TimeStamp = /5517C2C1;
+Reference = P1;
+ValeurCmp = Power;
+IdModule  = Socket_Arduino_Uno:Socket_Strip_Arduino_1x08;
+EndCmp
+
+BeginCmp
+TimeStamp = /5517C323;
+Reference = P2;
+ValeurCmp = Analog;
+IdModule  = Socket_Arduino_Uno:Socket_Strip_Arduino_1x06;
+EndCmp
+
+BeginCmp
+TimeStamp = /5517C46C;
+Reference = P3;
+ValeurCmp = Digital;
+IdModule  = Socket_Arduino_Uno:Socket_Strip_Arduino_1x10;
+EndCmp
+
+BeginCmp
+TimeStamp = /5517C366;
+Reference = P4;
+ValeurCmp = Digital;
+IdModule  = Socket_Arduino_Uno:Socket_Strip_Arduino_1x08;
+EndCmp
+
+BeginCmp
+TimeStamp = /551BBC06;
+Reference = P5;
+ValeurCmp = CONN_1;
+IdModule  = Socket_Arduino_Uno:Arduino_1pin;
+EndCmp
+
+BeginCmp
+TimeStamp = /551BBD10;
+Reference = P6;
+ValeurCmp = CONN_1;
+IdModule  = Socket_Arduino_Uno:Arduino_1pin;
+EndCmp
+
+BeginCmp
+TimeStamp = /551BBD30;
+Reference = P7;
+ValeurCmp = CONN_1;
+IdModule  = Socket_Arduino_Uno:Arduino_1pin;
+EndCmp
+
+BeginCmp
+TimeStamp = /551BBD52;
+Reference = P8;
+ValeurCmp = CONN_1;
+IdModule  = Socket_Arduino_Uno:Arduino_1pin;
+EndCmp
+
+EndListe