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authorKarl Palsson <karlp@tweak.net.au>2017-10-07 15:20:00 +0000
committerKarl Palsson <karlp@tweak.net.au>2017-10-07 15:20:00 +0000
commitcb376f395911d6face5a107cd4c543d7a03249b8 (patch)
tree7f27aca4314b57527daf4cbb4f83ae7fcb6f4048 /hw1/Socket_Arduino_Uno.pretty/Socket_Strip_Arduino_1x06.kicad_mod
parentb3750541774c486fdabe504434fefe1de469dba4 (diff)
downloadolsndot-cb376f395911d6face5a107cd4c543d7a03249b8.tar.gz
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WIP: hardware test partner round 1
Not sure which kicad files are necessary and which are local yet! Goal: fixed "host" board (this board) with socket for _any_ Nucleo64 st board, giving access to test: * DAC->ADC (both directions) * I2C (both directions) * SPI (both directions) * Uart (both directions) a socket for a cheap fx2 based logic analyser will be included, so that sigrok can be used to capture tests of the actual line states.
Diffstat (limited to 'hw1/Socket_Arduino_Uno.pretty/Socket_Strip_Arduino_1x06.kicad_mod')
-rw-r--r--hw1/Socket_Arduino_Uno.pretty/Socket_Strip_Arduino_1x06.kicad_mod32
1 files changed, 32 insertions, 0 deletions
diff --git a/hw1/Socket_Arduino_Uno.pretty/Socket_Strip_Arduino_1x06.kicad_mod b/hw1/Socket_Arduino_Uno.pretty/Socket_Strip_Arduino_1x06.kicad_mod
new file mode 100644
index 0000000..43d1a19
--- /dev/null
+++ b/hw1/Socket_Arduino_Uno.pretty/Socket_Strip_Arduino_1x06.kicad_mod
@@ -0,0 +1,32 @@
+(module Socket_Strip_Arduino_1x06 (layer F.Cu) (tedit 551AF7D9)
+ (descr "Through hole socket strip")
+ (tags "socket strip")
+ (fp_text reference REF** (at 0 -5.1) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Socket_Strip_Arduino_1x06 (at 0 -3.1) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.75 -1.75) (end -1.75 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 14.45 -1.75) (end 14.45 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 -1.75) (end 14.45 -1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.75 1.75) (end 14.45 1.75) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.27 1.27) (end 13.97 1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start 13.97 1.27) (end 13.97 -1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start 13.97 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 1.55) (end 0 1.55) (layer F.SilkS) (width 0.15))
+ (fp_line (start 1.27 1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.15))
+ (fp_line (start 0 -1.55) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
+ (fp_line (start -1.55 -1.55) (end -1.55 1.55) (layer F.SilkS) (width 0.15))
+ (pad 1 thru_hole oval (at 0 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 2 thru_hole oval (at 2.54 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 3 thru_hole oval (at 5.08 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 4 thru_hole oval (at 7.62 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 5 thru_hole oval (at 10.16 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (pad 6 thru_hole oval (at 12.7 0) (size 1.7272 2.032) (drill 1.016) (layers *.Cu *.Mask F.SilkS))
+ (model ${KIPRJMOD}/Socket_Arduino_Uno.3dshapes/Socket_header_Arduino_1x06.wrl
+ (at (xyz 0.25 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+)