summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--main.c38
1 files changed, 22 insertions, 16 deletions
diff --git a/main.c b/main.c
index ffd4c22..6b10c73 100644
--- a/main.c
+++ b/main.c
@@ -23,6 +23,8 @@
#define DAY_SECONDS (24*3600)
+void RTC_IRQHandler(void);
+
uint32_t pcg32_random_r() {
// *Really* minimal PCG32 code / (c) 2014 M.E. O'Neill / pcg-random.org
// Licensed under Apache License 2.0 (NO WARRANTY, etc. see website)
@@ -109,30 +111,34 @@ int main(void){
GPIOC->CRH |=
(0<<GPIO_CRH_CNF13_Pos) | (2<<GPIO_CRH_MODE13_Pos); /* PC13 - LED */
- GPIOB->CRH |=
+ GPIOB->CRH =
(0<<GPIO_CRH_CNF8_Pos) | (2<<GPIO_CRH_MODE8_Pos); /* PB8 - MOSFET */
GPIOC->ODR |= 1<<13; /* LED */
GPIOB->ODR &= ~(1<<8); /* MOSFET */
rtc_init();
rtc_alarm_reset();
- //NVIC_ClearPendingIRQ(RTC_IRQn);
- NVIC_EnableIRQ(RTC_IRQn);
- NVIC_SetPriority(RTC_IRQn, 1);
+ NVIC_ClearPendingIRQ(RTC_IRQn);
+ //NVIC_EnableIRQ(RTC_IRQn);
+ //NVIC_SetPriority(RTC_IRQn, 1);
rtc_set_alarm_rel_sec(1);
- //if (!(PWR->CSR & PWR_CSR_WUF)) /* This reset wasn't caused by the RTC alarm */
- REBOOT_REGISTER++;
+ if (!(PWR->CSR & PWR_CSR_WUF)) /* This reset wasn't caused by the RTC alarm */
+ REBOOT_REGISTER++;
- //SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
+ SCB->SCR |= SCB_SCR_SEVONPEND_Msk;
//SCB->SCR &= (~SCB_SCR_SLEEPONEXIT_Msk) & (~SCB_SCR_SLEEPDEEP_Msk);
//PWR->CR &= (~PWR_CR_PDDS) & (~PWR_CR_LPDS);
- //PWR->CR |= PWR_CR_CWUF; /* This has 2 cycles latency, thus the NOPs */
- //asm volatile ("nop");
- //asm volatile ("nop");
- while (42)
- asm volatile ("wfi");
+ while (42) {
+ RTC_IRQHandler();
+ PWR->CR |= PWR_CR_CWUF; /* This has 2 cycles latency, thus the NOPs */
+ asm volatile ("nop");
+ asm volatile ("nop");
+ asm volatile ("wfe");
+ }
+ //while (42)
+ // asm volatile ("wfi");
}
void RTC_IRQHandler(void) {
@@ -160,15 +166,15 @@ void RTC_IRQHandler(void) {
GPIOB->ODR |= 1<<8;
/* Go to sleep mode to keep GPIO active */
- //PWR->CR &= ~PWR_CR_PDDS;
- //SCB->SCR &= ~(SCB_SCR_SLEEPDEEP_Msk); /* Use deep sleep mode */
+ PWR->CR &= ~PWR_CR_PDDS;
+ SCB->SCR &= ~(SCB_SCR_SLEEPDEEP_Msk); /* Use deep sleep mode */
} else {
GPIOB->ODR &= ~(1<<8);
/* Go to standby mode to reduce power consumption */
- //PWR->CR = PWR_CR_PDDS;
- //SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; /* Use deep sleep mode */
+ PWR->CR = PWR_CR_PDDS;
+ SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; /* Use deep sleep mode */
}
GPIOC->ODR &= ~(1<<13);