path: root/midi-dials/build/stm32f0xx_hal_rcc.lst

ARM GAS  /tmp/ccQfjpF5.s 			page 1


   1              		.cpu cortex-m0
   2              		.eabi_attribute 20, 1
   3              		.eabi_attribute 21, 1
   4              		.eabi_attribute 23, 3
   5              		.eabi_attribute 24, 1
   6              		.eabi_attribute 25, 1
   7              		.eabi_attribute 26, 1
   8              		.eabi_attribute 30, 1
   9              		.eabi_attribute 34, 0
  10              		.eabi_attribute 18, 4
  11              		.file	"stm32f0xx_hal_rcc.c"
  12              		.text
  13              	.Ltext0:
  14              		.cfi_sections	.debug_frame
  15              		.section	.text.HAL_RCC_DeInit,"ax",%progbits
  16              		.align	1
  17              		.global	HAL_RCC_DeInit
  18              		.syntax unified
  19              		.code	16
  20              		.thumb_func
  21              		.fpu softvfp
  23              	HAL_RCC_DeInit:
  24              	.LFB40:
  25              		.file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c"
   1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
   2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ******************************************************************************
   3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @file    stm32f0xx_hal_rcc.c
   4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @author  MCD Application Team
   5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief   RCC HAL module driver.
   6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *          This file provides firmware functions to manage the following 
   7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *          functionalities of the Reset and Clock Control (RCC) peripheral:
   8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *           + Initialization and de-initialization functions
   9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *           + Peripheral Control functions
  10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *       
  11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @verbatim                
  12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ==============================================================================
  13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                       ##### RCC specific features #####
  14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ==============================================================================
  15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     [..]  
  16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       After reset the device is running from Internal High Speed oscillator
  17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled, 
  18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       and all peripherals are off except internal SRAM, Flash and JTAG.
  19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (+) There is no prescaler on High speed (AHB) and Low speed (APB) buses;
  20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           all peripherals mapped on these buses are running at HSI speed.
  21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
  22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (+) All GPIOs are in input floating state, except the JTAG pins which
  23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           are assigned to be used for debug purpose.
  24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     [..] Once the device started from reset, the user application has to:
  25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (+) Configure the clock source to be used to drive the System clock
  26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           (if the application needs higher frequency/performance)
  27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (+) Configure the System clock frequency and Flash settings  
  28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (+) Configure the AHB and APB buses prescalers
  29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (+) Enable the clock for the peripheral(s) to be used
  30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (+) Configure the clock source(s) for peripherals whose clocks are not
  31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           derived from the System clock (RTC, ADC, I2C, USART, TIM, USB FS, etc..)
  32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                       ##### RCC Limitations #####
ARM GAS  /tmp/ccQfjpF5.s 			page 2


  34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ==============================================================================
  35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     [..]  
  36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       A delay between an RCC peripheral clock enable and the effective peripheral 
  37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       enabling should be taken into account in order to manage the peripheral read/write 
  38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       from/to registers.
  39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (+) This delay depends on the peripheral mapping.
  40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         (++) AHB & APB peripherals, 1 dummy read is necessary
  41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     [..]  
  43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       Workarounds:
  44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
  45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
  46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @endverbatim
  48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ******************************************************************************
  49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @attention
  50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *
  51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
  52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * All rights reserved.</center></h2>
  53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *
  54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * This software component is licensed by ST under BSD 3-Clause license,
  55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * the "License"; You may not use this file except in compliance with the
  56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * License. You may obtain a copy of the License at:
  57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *                        opensource.org/licenses/BSD-3-Clause
  58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *
  59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ******************************************************************************
  60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
  61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Includes ------------------------------------------------------------------*/
  63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #include "stm32f0xx_hal.h"
  64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @addtogroup STM32F0xx_HAL_Driver
  66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @{
  67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
  68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC RCC
  70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** * @brief RCC HAL module driver
  71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @{
  72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
  73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #ifdef HAL_RCC_MODULE_ENABLED
  75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private typedef -----------------------------------------------------------*/
  77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private define ------------------------------------------------------------*/
  78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Constants RCC Private Constants
  79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****  * @{
  80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****  */
  81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
  82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @}
  83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
  84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private macro -------------------------------------------------------------*/
  85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Macros RCC Private Macros
  86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @{
  87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
  88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_CLK_ENABLE()     __HAL_RCC_GPIOA_CLK_ENABLE()
  90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_GPIO_PORT        GPIOA
ARM GAS  /tmp/ccQfjpF5.s 			page 3


  91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #define MCO1_PIN              GPIO_PIN_8
  92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
  94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @}
  95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
  96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private variables ---------------------------------------------------------*/
  98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Private_Variables RCC Private Variables
  99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @{
 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @}
 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Private function prototypes -----------------------------------------------*/
 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /* Exported functions ---------------------------------------------------------*/
 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions RCC Exported Functions
 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @{
 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions 
 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *  @brief    Initialization and Configuration functions 
 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *
 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @verbatim    
 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ===============================================================================
 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****            ##### Initialization and de-initialization functions #####
 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ===============================================================================
 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     [..]
 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       This section provides functions allowing to configure the internal/external oscillators
 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (HSE, HSI, HSI14, HSI48, LSE, LSI, PLL, CSS and MCO) and the System buses clocks (SYSCLK, 
 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       AHB and APB1).
 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     [..] Internal/external clock and PLL configuration
 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through
 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           the PLL as System clock source.
 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           The HSI clock can be used also to clock the USART and I2C peripherals.
 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) HSI14 (high-speed internal), 14 MHz factory-trimmed RC used directly to clock 
 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           the ADC peripheral.
 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC
 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           clock source.
 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or
 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           through the PLL as System clock source. Can be used also as RTC clock source.
 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.   
 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) PLL (clocked by HSI, HSI48 or HSE), featuring different output clocks:
 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        (++) The first output is used to generate the high speed system clock (up to 48 MHz)
 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        (++) The second output is used to generate the clock for the USB FS (48 MHz)
 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        (++) The third output may be used to generate the clock for the TIM, I2C and USART 
 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             peripherals (up to 48 MHz)
 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           and if a HSE clock failure occurs(HSE used directly or through PLL as System 
ARM GAS  /tmp/ccQfjpF5.s 			page 4


 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           clock source), the System clocks automatically switched to HSI and an interrupt
 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           is generated if enabled. The interrupt is linked to the Cortex-M0 NMI 
 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           (Non-Maskable Interrupt) exception vector.   
 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL
 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           clock (divided by 2) output on pin (such as PA8 pin).
 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     [..] System, AHB and APB buses clocks configuration
 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           HSE and PLL.
 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           The AHB clock (HCLK) is derived from System clock through configurable
 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           prescaler and used to clock the CPU, memory and peripherals mapped
 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           on AHB bus (DMA, GPIO...). APB1 (PCLK1) clock is derived
 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           from AHB clock through configurable prescalers and used to clock
 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           the peripherals mapped on these buses. You can use
 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           "@ref HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) All the peripheral clocks are derived from the System clock (SYSCLK) except:
 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         (++) The FLASH program/erase clock  which is always HSI 8MHz clock.
 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         (++) The USB 48 MHz clock which is derived from the PLL VCO clock.
 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE.
 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         (++) The I2C clock which can be derived as well from HSI 8MHz clock.
 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         (++) The ADC clock which is derived from PLL output.
 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC
 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****              (HSE divided by a programmable prescaler). The System clock (SYSCLK)
 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****              frequency must be higher or equal to the RTC clock frequency.
 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         (++) IWDG clock which is always the LSI clock.
 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) For the STM32F0xx devices, the maximum frequency of the SYSCLK, HCLK and PCLK1 is 48 MHz,
 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           Depending on the SYSCLK frequency, the flash latency should be adapted accordingly.
 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and
 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           prefetch is disabled.
 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @endverbatim
 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @{
 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /*
 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   Additional consideration on the SYSCLK based on Latency settings:
 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           +-----------------------------------------------+
 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           | Latency       | SYSCLK clock frequency (MHz)  |
 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           |---------------|-------------------------------|
 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           |0WS(1CPU cycle)|       0 < SYSCLK <= 24        |
 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           |---------------|-------------------------------|
 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           |1WS(2CPU cycle)|      24 < SYSCLK <= 48        |
 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           +-----------------------------------------------+
 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Resets the RCC clock configuration to the default reset state.
 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   The default reset state of the clock configuration is given below:
 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            - HSI ON and used as system clock source
 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            - HSE and PLL OFF
 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            - AHB, APB1 prescaler set to 1.
 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            - CSS and MCO1 OFF
 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            - All interrupts disabled
 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            - All interrupt and reset flags cleared
ARM GAS  /tmp/ccQfjpF5.s 			page 5


 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   This function does not modify the configuration of the
 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            - Peripheral clocks
 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            - LSI, LSE and RTC clocks
 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval HAL status
 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_DeInit(void)
 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
  26              		.loc 1 211 0
  27              		.cfi_startproc
  28              		@ args = 0, pretend = 0, frame = 0
  29              		@ frame_needed = 0, uses_anonymous_args = 0
  30 0000 70B5     		push	{r4, r5, r6, lr}
  31              	.LCFI0:
  32              		.cfi_def_cfa_offset 16
  33              		.cfi_offset 4, -16
  34              		.cfi_offset 5, -12
  35              		.cfi_offset 6, -8
  36              		.cfi_offset 14, -4
 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   uint32_t tickstart;
 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get Start Tick*/
 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   tickstart = HAL_GetTick();
  37              		.loc 1 215 0
  38 0002 FFF7FEFF 		bl	HAL_GetTick
  39              	.LVL0:
  40 0006 0400     		movs	r4, r0
  41              	.LVL1:
 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Set HSION bit, HSITRIM[4:0] bits to the reset value*/
 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4); 
  42              		.loc 1 218 0
  43 0008 284A     		ldr	r2, .L17
  44 000a 1368     		ldr	r3, [r2]
  45 000c 8121     		movs	r1, #129
  46 000e 0B43     		orrs	r3, r1
  47 0010 1360     		str	r3, [r2]
  48              	.LVL2:
  49              	.L2:
 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Wait till HSI is ready */
 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   while (READ_BIT(RCC->CR, RCC_CR_HSIRDY) == RESET)
  50              		.loc 1 221 0
  51 0012 264B     		ldr	r3, .L17
  52 0014 1B68     		ldr	r3, [r3]
  53 0016 9B07     		lsls	r3, r3, #30
  54 0018 07D4     		bmi	.L13
 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
  55              		.loc 1 223 0
  56 001a FFF7FEFF 		bl	HAL_GetTick
  57              	.LVL3:
  58 001e 001B     		subs	r0, r0, r4
  59 0020 0228     		cmp	r0, #2
  60 0022 F6D9     		bls	.L2
 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       return HAL_TIMEOUT;
  61              		.loc 1 225 0
ARM GAS  /tmp/ccQfjpF5.s 			page 6


  62 0024 0324     		movs	r4, #3
  63              	.LVL4:
  64              	.L3:
 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Reset SW[1:0], HPRE[3:0], PPRE[2:0] and MCOSEL[2:0] bits */
 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCO);
 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Wait till HSI as SYSCLK status is enabled */
 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   while (READ_BIT(RCC->CFGR, RCC_CFGR_SWS) != RESET)
 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       return HAL_TIMEOUT;
 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Update the SystemCoreClock global variable for HSI as system clock source */
 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   SystemCoreClock = HSI_VALUE;
 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Adapt Systick interrupt period */
 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if (HAL_InitTick(uwTickPrio) != HAL_OK)
 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     return HAL_ERROR;
 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Reset HSEON, CSSON, PLLON bits */
 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON);
 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Reset HSEBYP bit */
 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get start tick */
 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   tickstart = HAL_GetTick();
 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Wait till PLLRDY is cleared */
 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   while(READ_BIT(RCC->CR, RCC_CR_PLLRDY) != RESET)
 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       return HAL_TIMEOUT;
 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Reset CFGR register */
 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   CLEAR_REG(RCC->CFGR);
 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Reset CFGR2 register */
 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   CLEAR_REG(RCC->CFGR2);
 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Reset CFGR3 register */
 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   CLEAR_REG(RCC->CFGR3);
 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Disable all interrupts */
 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   CLEAR_REG(RCC->CIR);
 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
ARM GAS  /tmp/ccQfjpF5.s 			page 7


 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Clear all reset flags */
 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   __HAL_RCC_CLEAR_RESET_FLAGS();
 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   return HAL_OK;
 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
  65              		.loc 1 284 0
  66 0026 2000     		movs	r0, r4
  67              		@ sp needed
  68 0028 70BD     		pop	{r4, r5, r6, pc}
  69              	.LVL5:
  70              	.L13:
 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  71              		.loc 1 230 0
  72 002a 204A     		ldr	r2, .L17
  73 002c 5368     		ldr	r3, [r2, #4]
  74 002e 2049     		ldr	r1, .L17+4
  75 0030 0B40     		ands	r3, r1
  76 0032 5360     		str	r3, [r2, #4]
  77              	.L5:
 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
  78              		.loc 1 233 0
  79 0034 1D4B     		ldr	r3, .L17
  80 0036 5B68     		ldr	r3, [r3, #4]
  81 0038 0C22     		movs	r2, #12
  82 003a 1A42     		tst	r2, r3
  83 003c 07D0     		beq	.L14
 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
  84              		.loc 1 235 0
  85 003e FFF7FEFF 		bl	HAL_GetTick
  86              	.LVL6:
  87 0042 001B     		subs	r0, r0, r4
  88 0044 1B4B     		ldr	r3, .L17+8
  89 0046 9842     		cmp	r0, r3
  90 0048 F4D9     		bls	.L5
 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
  91              		.loc 1 237 0
  92 004a 0324     		movs	r4, #3
  93              	.LVL7:
  94 004c EBE7     		b	.L3
  95              	.LVL8:
  96              	.L14:
 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
  97              		.loc 1 242 0
  98 004e 1A4B     		ldr	r3, .L17+12
  99 0050 1A4A     		ldr	r2, .L17+16
 100 0052 1A60     		str	r2, [r3]
 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 101              		.loc 1 245 0
 102 0054 1A4B     		ldr	r3, .L17+20
 103 0056 1868     		ldr	r0, [r3]
 104 0058 FFF7FEFF 		bl	HAL_InitTick
 105              	.LVL9:
 106 005c 041E     		subs	r4, r0, #0
 107              	.LVL10:
 108 005e 01D0     		beq	.L15
 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 109              		.loc 1 247 0
ARM GAS  /tmp/ccQfjpF5.s 			page 8


 110 0060 0124     		movs	r4, #1
 111 0062 E0E7     		b	.L3
 112              	.L15:
 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 113              		.loc 1 251 0
 114 0064 114B     		ldr	r3, .L17
 115 0066 1A68     		ldr	r2, [r3]
 116 0068 1649     		ldr	r1, .L17+24
 117 006a 0A40     		ands	r2, r1
 118 006c 1A60     		str	r2, [r3]
 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 119              		.loc 1 254 0
 120 006e 1A68     		ldr	r2, [r3]
 121 0070 1549     		ldr	r1, .L17+28
 122 0072 0A40     		ands	r2, r1
 123 0074 1A60     		str	r2, [r3]
 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 124              		.loc 1 257 0
 125 0076 FFF7FEFF 		bl	HAL_GetTick
 126              	.LVL11:
 127 007a 0500     		movs	r5, r0
 128              	.LVL12:
 129              	.L7:
 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 130              		.loc 1 260 0
 131 007c 0B4B     		ldr	r3, .L17
 132 007e 1B68     		ldr	r3, [r3]
 133 0080 9B01     		lsls	r3, r3, #6
 134 0082 06D5     		bpl	.L16
 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 135              		.loc 1 262 0
 136 0084 FFF7FEFF 		bl	HAL_GetTick
 137              	.LVL13:
 138 0088 401B     		subs	r0, r0, r5
 139 008a 0228     		cmp	r0, #2
 140 008c F6D9     		bls	.L7
 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 141              		.loc 1 264 0
 142 008e 0324     		movs	r4, #3
 143 0090 C9E7     		b	.L3
 144              	.L16:
 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 145              		.loc 1 269 0
 146 0092 064B     		ldr	r3, .L17
 147 0094 0022     		movs	r2, #0
 148 0096 5A60     		str	r2, [r3, #4]
 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 149              		.loc 1 272 0
 150 0098 DA62     		str	r2, [r3, #44]
 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 151              		.loc 1 275 0
 152 009a 1A63     		str	r2, [r3, #48]
 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 153              		.loc 1 278 0
 154 009c 9A60     		str	r2, [r3, #8]
 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 155              		.loc 1 281 0
ARM GAS  /tmp/ccQfjpF5.s 			page 9


 156 009e 596A     		ldr	r1, [r3, #36]
 157 00a0 8022     		movs	r2, #128
 158 00a2 5204     		lsls	r2, r2, #17
 159 00a4 0A43     		orrs	r2, r1
 160 00a6 5A62     		str	r2, [r3, #36]
 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 161              		.loc 1 283 0
 162 00a8 BDE7     		b	.L3
 163              	.L18:
 164 00aa C046     		.align	2
 165              	.L17:
 166 00ac 00100240 		.word	1073876992
 167 00b0 0CF8FFF0 		.word	-251660276
 168 00b4 88130000 		.word	5000
 169 00b8 00000000 		.word	SystemCoreClock
 170 00bc 00127A00 		.word	8000000
 171 00c0 00000000 		.word	uwTickPrio
 172 00c4 FFFFF6FE 		.word	-17367041
 173 00c8 FFFFFBFF 		.word	-262145
 174              		.cfi_endproc
 175              	.LFE40:
 177              		.section	.text.HAL_RCC_OscConfig,"ax",%progbits
 178              		.align	1
 179              		.global	HAL_RCC_OscConfig
 180              		.syntax unified
 181              		.code	16
 182              		.thumb_func
 183              		.fpu softvfp
 185              	HAL_RCC_OscConfig:
 186              	.LFB41:
 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Initializes the RCC Oscillators according to the specified parameters in the
 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         RCC_OscInitTypeDef.
 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that
 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         contains the configuration information for the RCC Oscillators.
 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   The PLL is not disabled when used as system clock.
 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   Transitions LSE Bypass to LSE On and LSE On to LSE Bypass are not
 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         supported by this macro. User should request a transition to LSE Off
 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         first and then LSE On or LSE Bypass.
 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   Transition HSE Bypass to HSE On and HSE On to HSE Bypass are not
 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         supported by this macro. User should request a transition to HSE Off
 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         first and then HSE On or HSE Bypass.
 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval HAL status
 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 187              		.loc 1 301 0
 188              		.cfi_startproc
 189              		@ args = 0, pretend = 0, frame = 8
 190              		@ frame_needed = 0, uses_anonymous_args = 0
 191              	.LVL14:
 192 0000 70B5     		push	{r4, r5, r6, lr}
 193              	.LCFI1:
 194              		.cfi_def_cfa_offset 16
 195              		.cfi_offset 4, -16
 196              		.cfi_offset 5, -12
ARM GAS  /tmp/ccQfjpF5.s 			page 10


 197              		.cfi_offset 6, -8
 198              		.cfi_offset 14, -4
 199 0002 82B0     		sub	sp, sp, #8
 200              	.LCFI2:
 201              		.cfi_def_cfa_offset 24
 202 0004 041E     		subs	r4, r0, #0
 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   uint32_t tickstart;
 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   uint32_t pll_config;
 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   uint32_t pll_config2;
 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check Null pointer */
 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(RCC_OscInitStruct == NULL)
 203              		.loc 1 307 0
 204 0006 00D1     		bne	.LCB169
 205 0008 85E2     		b	.L86	@long jump
 206              	.LCB169:
 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     return HAL_ERROR;
 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check the parameters */
 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*------------------------------- HSE Configuration ------------------------*/ 
 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
 207              		.loc 1 316 0
 208 000a 0368     		ldr	r3, [r0]
 209 000c DB07     		lsls	r3, r3, #31
 210 000e 2BD5     		bpl	.L21
 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the parameters */
 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowe
 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 
 211              		.loc 1 322 0
 212 0010 B34B     		ldr	r3, .L131
 213 0012 5A68     		ldr	r2, [r3, #4]
 214 0014 0C23     		movs	r3, #12
 215 0016 1340     		ands	r3, r2
 216 0018 042B     		cmp	r3, #4
 217 001a 1DD0     		beq	.L22
 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
 218              		.loc 1 323 0
 219 001c B04B     		ldr	r3, .L131
 220 001e 5A68     		ldr	r2, [r3, #4]
 221 0020 0C23     		movs	r3, #12
 222 0022 1340     		ands	r3, r2
 223 0024 082B     		cmp	r3, #8
 224 0026 0ED0     		beq	.L112
 225              	.L23:
 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_
 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         return HAL_ERROR;
 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
ARM GAS  /tmp/ccQfjpF5.s 			page 11


 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else
 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Set the new HSE configuration ---------------------------------------*/
 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
 226              		.loc 1 333 0
 227 0028 6368     		ldr	r3, [r4, #4]
 228 002a 012B     		cmp	r3, #1
 229 002c 41D0     		beq	.L113
 230              		.loc 1 333 0 is_stmt 0 discriminator 2
 231 002e 002B     		cmp	r3, #0
 232 0030 56D1     		bne	.L26
 233              		.loc 1 333 0 discriminator 3
 234 0032 AB4B     		ldr	r3, .L131
 235 0034 1A68     		ldr	r2, [r3]
 236 0036 AB49     		ldr	r1, .L131+4
 237 0038 0A40     		ands	r2, r1
 238 003a 1A60     		str	r2, [r3]
 239 003c 1A68     		ldr	r2, [r3]
 240 003e AA49     		ldr	r1, .L131+8
 241 0040 0A40     		ands	r2, r1
 242 0042 1A60     		str	r2, [r3]
 243 0044 3BE0     		b	.L25
 244              	.L112:
 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
 245              		.loc 1 323 0 is_stmt 1 discriminator 1
 246 0046 A64B     		ldr	r3, .L131
 247 0048 5B68     		ldr	r3, [r3, #4]
 248 004a C022     		movs	r2, #192
 249 004c 5202     		lsls	r2, r2, #9
 250 004e 1340     		ands	r3, r2
 251 0050 8022     		movs	r2, #128
 252 0052 5202     		lsls	r2, r2, #9
 253 0054 9342     		cmp	r3, r2
 254 0056 E7D1     		bne	.L23
 255              	.L22:
 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 256              		.loc 1 325 0
 257 0058 A14B     		ldr	r3, .L131
 258 005a 1B68     		ldr	r3, [r3]
 259 005c 9B03     		lsls	r3, r3, #14
 260 005e 03D5     		bpl	.L21
 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 261              		.loc 1 325 0 is_stmt 0 discriminator 1
 262 0060 6368     		ldr	r3, [r4, #4]
 263 0062 002B     		cmp	r3, #0
 264 0064 00D1     		bne	.LCB227
 265 0066 59E2     		b	.L114	@long jump
 266              	.LCB227:
 267              	.LVL15:
 268              	.L21:
 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        /* Check the HSE State */
 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Get Start Tick */
 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
ARM GAS  /tmp/ccQfjpF5.s 			page 12


 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Wait till HSE is ready */
 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       else
 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Get Start Tick */
 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Wait till HSE is disabled */
 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****            if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*----------------------------- HSI Configuration --------------------------*/ 
 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
 269              		.loc 1 368 0 is_stmt 1
 270 0068 2368     		ldr	r3, [r4]
 271 006a 9B07     		lsls	r3, r3, #30
 272 006c 78D5     		bpl	.L33
 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the parameters */
 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock *
 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 
 273              		.loc 1 375 0
 274 006e 9C4B     		ldr	r3, .L131
 275 0070 5B68     		ldr	r3, [r3, #4]
 276 0072 0C22     		movs	r2, #12
 277 0074 1A42     		tst	r2, r3
 278 0076 62D0     		beq	.L34
 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_
 279              		.loc 1 376 0
 280 0078 994B     		ldr	r3, .L131
 281 007a 5A68     		ldr	r2, [r3, #4]
 282 007c 0C23     		movs	r3, #12
 283 007e 1340     		ands	r3, r2
 284 0080 082B     		cmp	r3, #8
 285 0082 53D0     		beq	.L115
 286              	.L35:
 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* When HSI is used as system clock it will not disabled */
 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_
ARM GAS  /tmp/ccQfjpF5.s 			page 13


 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         return HAL_ERROR;
 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Otherwise, just the calibration is allowed */
 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       else
 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else
 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Check the HSI State */
 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
 287              		.loc 1 393 0
 288 0084 E368     		ldr	r3, [r4, #12]
 289 0086 002B     		cmp	r3, #0
 290 0088 00D1     		bne	.LCB252
 291 008a 8BE0     		b	.L37	@long jump
 292              	.LCB252:
 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        /* Enable the Internal High Speed oscillator (HSI). */
 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_HSI_ENABLE();
 293              		.loc 1 396 0
 294 008c 944A     		ldr	r2, .L131
 295 008e 1368     		ldr	r3, [r2]
 296 0090 0121     		movs	r1, #1
 297 0092 0B43     		orrs	r3, r1
 298 0094 1360     		str	r3, [r2]
 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Get Start Tick */
 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 299              		.loc 1 399 0
 300 0096 FFF7FEFF 		bl	HAL_GetTick
 301              	.LVL16:
 302 009a 0500     		movs	r5, r0
 303              	.LVL17:
 304              	.L38:
 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Wait till HSI is ready */
 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 305              		.loc 1 402 0
 306 009c 904B     		ldr	r3, .L131
 307 009e 1B68     		ldr	r3, [r3]
 308 00a0 9B07     		lsls	r3, r3, #30
 309 00a2 76D4     		bmi	.L116
 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 310              		.loc 1 404 0
 311 00a4 FFF7FEFF 		bl	HAL_GetTick
 312              	.LVL18:
 313 00a8 401B     		subs	r0, r0, r5
 314 00aa 0228     		cmp	r0, #2
 315 00ac F6D9     		bls	.L38
 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 316              		.loc 1 406 0
ARM GAS  /tmp/ccQfjpF5.s 			page 14


 317 00ae 0320     		movs	r0, #3
 318 00b0 32E2     		b	.L20
 319              	.LVL19:
 320              	.L113:
 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 321              		.loc 1 333 0 discriminator 1
 322 00b2 8B4A     		ldr	r2, .L131
 323 00b4 1168     		ldr	r1, [r2]
 324 00b6 8023     		movs	r3, #128
 325 00b8 5B02     		lsls	r3, r3, #9
 326 00ba 0B43     		orrs	r3, r1
 327 00bc 1360     		str	r3, [r2]
 328              	.L25:
 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 329              		.loc 1 337 0
 330 00be 6368     		ldr	r3, [r4, #4]
 331 00c0 002B     		cmp	r3, #0
 332 00c2 25D0     		beq	.L28
 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 333              		.loc 1 340 0
 334 00c4 FFF7FEFF 		bl	HAL_GetTick
 335              	.LVL20:
 336 00c8 0500     		movs	r5, r0
 337              	.LVL21:
 338              	.L29:
 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 339              		.loc 1 343 0
 340 00ca 854B     		ldr	r3, .L131
 341 00cc 1B68     		ldr	r3, [r3]
 342 00ce 9B03     		lsls	r3, r3, #14
 343 00d0 CAD4     		bmi	.L21
 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 344              		.loc 1 345 0
 345 00d2 FFF7FEFF 		bl	HAL_GetTick
 346              	.LVL22:
 347 00d6 401B     		subs	r0, r0, r5
 348 00d8 6428     		cmp	r0, #100
 349 00da F6D9     		bls	.L29
 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 350              		.loc 1 347 0
 351 00dc 0320     		movs	r0, #3
 352 00de 1BE2     		b	.L20
 353              	.LVL23:
 354              	.L26:
 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 355              		.loc 1 333 0 discriminator 4
 356 00e0 052B     		cmp	r3, #5
 357 00e2 09D0     		beq	.L117
 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 358              		.loc 1 333 0 is_stmt 0 discriminator 6
 359 00e4 7E4B     		ldr	r3, .L131
 360 00e6 1A68     		ldr	r2, [r3]
 361 00e8 7E49     		ldr	r1, .L131+4
 362 00ea 0A40     		ands	r2, r1
 363 00ec 1A60     		str	r2, [r3]
 364 00ee 1A68     		ldr	r2, [r3]
 365 00f0 7D49     		ldr	r1, .L131+8
ARM GAS  /tmp/ccQfjpF5.s 			page 15


 366 00f2 0A40     		ands	r2, r1
 367 00f4 1A60     		str	r2, [r3]
 368 00f6 E2E7     		b	.L25
 369              	.L117:
 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 370              		.loc 1 333 0 discriminator 5
 371 00f8 794B     		ldr	r3, .L131
 372 00fa 1968     		ldr	r1, [r3]
 373 00fc 8022     		movs	r2, #128
 374 00fe D202     		lsls	r2, r2, #11
 375 0100 0A43     		orrs	r2, r1
 376 0102 1A60     		str	r2, [r3]
 377 0104 1968     		ldr	r1, [r3]
 378 0106 8022     		movs	r2, #128
 379 0108 5202     		lsls	r2, r2, #9
 380 010a 0A43     		orrs	r2, r1
 381 010c 1A60     		str	r2, [r3]
 382 010e D6E7     		b	.L25
 383              	.L28:
 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 384              		.loc 1 354 0 is_stmt 1
 385 0110 FFF7FEFF 		bl	HAL_GetTick
 386              	.LVL24:
 387 0114 0500     		movs	r5, r0
 388              	.LVL25:
 389              	.L31:
 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 390              		.loc 1 357 0
 391 0116 724B     		ldr	r3, .L131
 392 0118 1B68     		ldr	r3, [r3]
 393 011a 9B03     		lsls	r3, r3, #14
 394 011c A4D5     		bpl	.L21
 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 395              		.loc 1 359 0
 396 011e FFF7FEFF 		bl	HAL_GetTick
 397              	.LVL26:
 398 0122 401B     		subs	r0, r0, r5
 399 0124 6428     		cmp	r0, #100
 400 0126 F6D9     		bls	.L31
 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 401              		.loc 1 361 0
 402 0128 0320     		movs	r0, #3
 403 012a F5E1     		b	.L20
 404              	.LVL27:
 405              	.L115:
 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 406              		.loc 1 376 0 discriminator 1
 407 012c 6C4B     		ldr	r3, .L131
 408 012e 5B68     		ldr	r3, [r3, #4]
 409 0130 C022     		movs	r2, #192
 410 0132 5202     		lsls	r2, r2, #9
 411 0134 1340     		ands	r3, r2
 412 0136 8022     		movs	r2, #128
 413 0138 1202     		lsls	r2, r2, #8
 414 013a 9342     		cmp	r3, r2
 415 013c A2D1     		bne	.L35
 416              	.L34:
ARM GAS  /tmp/ccQfjpF5.s 			page 16


 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 417              		.loc 1 379 0
 418 013e 684B     		ldr	r3, .L131
 419 0140 1B68     		ldr	r3, [r3]
 420 0142 9B07     		lsls	r3, r3, #30
 421 0144 04D5     		bpl	.L36
 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 422              		.loc 1 379 0 is_stmt 0 discriminator 1
 423 0146 E368     		ldr	r3, [r4, #12]
 424 0148 012B     		cmp	r3, #1
 425 014a 01D0     		beq	.L36
 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 426              		.loc 1 381 0 is_stmt 1
 427 014c 0120     		movs	r0, #1
 428 014e E3E1     		b	.L20
 429              	.L36:
 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 430              		.loc 1 387 0
 431 0150 6349     		ldr	r1, .L131
 432 0152 0B68     		ldr	r3, [r1]
 433 0154 F822     		movs	r2, #248
 434 0156 9343     		bics	r3, r2
 435 0158 2269     		ldr	r2, [r4, #16]
 436 015a D200     		lsls	r2, r2, #3
 437 015c 1343     		orrs	r3, r2
 438 015e 0B60     		str	r3, [r1]
 439              	.L33:
 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                 
 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       else
 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Disable the Internal High Speed oscillator (HSI). */
 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_HSI_DISABLE();
 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Get Start Tick */
 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Wait till HSI is disabled */
 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*------------------------------ LSI Configuration -------------------------*/ 
 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
 440              		.loc 1 433 0
 441 0160 2368     		ldr	r3, [r4]
 442 0162 1B07     		lsls	r3, r3, #28
ARM GAS  /tmp/ccQfjpF5.s 			page 17


 443 0164 44D5     		bpl	.L42
 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the parameters */
 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the LSI State */
 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
 444              		.loc 1 439 0
 445 0166 E369     		ldr	r3, [r4, #28]
 446 0168 002B     		cmp	r3, #0
 447 016a 2ED0     		beq	.L43
 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Enable the Internal Low Speed oscillator (LSI). */
 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_LSI_ENABLE();
 448              		.loc 1 442 0
 449 016c 5C4A     		ldr	r2, .L131
 450 016e 536A     		ldr	r3, [r2, #36]
 451 0170 0121     		movs	r1, #1
 452 0172 0B43     		orrs	r3, r1
 453 0174 5362     		str	r3, [r2, #36]
 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Get Start Tick */
 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 454              		.loc 1 445 0
 455 0176 FFF7FEFF 		bl	HAL_GetTick
 456              	.LVL28:
 457 017a 0500     		movs	r5, r0
 458              	.LVL29:
 459              	.L44:
 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Wait till LSI is ready */  
 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
 460              		.loc 1 448 0
 461 017c 584B     		ldr	r3, .L131
 462 017e 5B6A     		ldr	r3, [r3, #36]
 463 0180 9B07     		lsls	r3, r3, #30
 464 0182 35D4     		bmi	.L42
 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 465              		.loc 1 450 0
 466 0184 FFF7FEFF 		bl	HAL_GetTick
 467              	.LVL30:
 468 0188 401B     		subs	r0, r0, r5
 469 018a 0228     		cmp	r0, #2
 470 018c F6D9     		bls	.L44
 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           return HAL_TIMEOUT;
 471              		.loc 1 452 0
 472 018e 0320     		movs	r0, #3
 473 0190 C2E1     		b	.L20
 474              	.L116:
 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 475              		.loc 1 411 0
 476 0192 5349     		ldr	r1, .L131
 477 0194 0B68     		ldr	r3, [r1]
 478 0196 F822     		movs	r2, #248
 479 0198 9343     		bics	r3, r2
ARM GAS  /tmp/ccQfjpF5.s 			page 18


 480 019a 2269     		ldr	r2, [r4, #16]
 481 019c D200     		lsls	r2, r2, #3
 482 019e 1343     		orrs	r3, r2
 483 01a0 0B60     		str	r3, [r1]
 484 01a2 DDE7     		b	.L33
 485              	.LVL31:
 486              	.L37:
 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 487              		.loc 1 416 0
 488 01a4 4E4A     		ldr	r2, .L131
 489 01a6 1368     		ldr	r3, [r2]
 490 01a8 0121     		movs	r1, #1
 491 01aa 8B43     		bics	r3, r1
 492 01ac 1360     		str	r3, [r2]
 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 493              		.loc 1 419 0
 494 01ae FFF7FEFF 		bl	HAL_GetTick
 495              	.LVL32:
 496 01b2 0500     		movs	r5, r0
 497              	.LVL33:
 498              	.L40:
 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 499              		.loc 1 422 0
 500 01b4 4A4B     		ldr	r3, .L131
 501 01b6 1B68     		ldr	r3, [r3]
 502 01b8 9B07     		lsls	r3, r3, #30
 503 01ba D1D5     		bpl	.L33
 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 504              		.loc 1 424 0
 505 01bc FFF7FEFF 		bl	HAL_GetTick
 506              	.LVL34:
 507 01c0 401B     		subs	r0, r0, r5
 508 01c2 0228     		cmp	r0, #2
 509 01c4 F6D9     		bls	.L40
 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 510              		.loc 1 426 0
 511 01c6 0320     		movs	r0, #3
 512 01c8 A6E1     		b	.L20
 513              	.LVL35:
 514              	.L43:
 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else
 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Disable the Internal Low Speed oscillator (LSI). */
 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_LSI_DISABLE();
 515              		.loc 1 459 0
 516 01ca 454A     		ldr	r2, .L131
 517 01cc 536A     		ldr	r3, [r2, #36]
 518 01ce 0121     		movs	r1, #1
 519 01d0 8B43     		bics	r3, r1
 520 01d2 5362     		str	r3, [r2, #36]
 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Get Start Tick */
 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 521              		.loc 1 462 0
ARM GAS  /tmp/ccQfjpF5.s 			page 19


 522 01d4 FFF7FEFF 		bl	HAL_GetTick
 523              	.LVL36:
 524 01d8 0500     		movs	r5, r0
 525              	.LVL37:
 526              	.L46:
 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Wait till LSI is disabled */  
 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
 527              		.loc 1 465 0
 528 01da 414B     		ldr	r3, .L131
 529 01dc 5B6A     		ldr	r3, [r3, #36]
 530 01de 9B07     		lsls	r3, r3, #30
 531 01e0 06D5     		bpl	.L42
 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
 532              		.loc 1 467 0
 533 01e2 FFF7FEFF 		bl	HAL_GetTick
 534              	.LVL38:
 535 01e6 401B     		subs	r0, r0, r5
 536 01e8 0228     		cmp	r0, #2
 537 01ea F6D9     		bls	.L46
 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           return HAL_TIMEOUT;
 538              		.loc 1 469 0
 539 01ec 0320     		movs	r0, #3
 540 01ee 93E1     		b	.L20
 541              	.LVL39:
 542              	.L42:
 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*------------------------------ LSE Configuration -------------------------*/ 
 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
 543              		.loc 1 475 0
 544 01f0 2368     		ldr	r3, [r4]
 545 01f2 5B07     		lsls	r3, r3, #29
 546 01f4 00D4     		bmi	.LCB535
 547 01f6 7FE0     		b	.L48	@long jump
 548              	.LCB535:
 549              	.LVL40:
 550              	.LBB2:
 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     FlagStatus       pwrclkchanged = RESET;
 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the parameters */
 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Update LSE configuration in Backup Domain control register    */
 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Requires to enable write access to Backup Domain of necessary */
 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(__HAL_RCC_PWR_IS_CLK_DISABLED())
 551              		.loc 1 484 0
 552 01f8 394B     		ldr	r3, .L131
 553 01fa DB69     		ldr	r3, [r3, #28]
 554 01fc DB00     		lsls	r3, r3, #3
 555 01fe 1DD4     		bmi	.L95
 556              	.LBB3:
ARM GAS  /tmp/ccQfjpF5.s 			page 20


 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_PWR_CLK_ENABLE();
 557              		.loc 1 486 0
 558 0200 374A     		ldr	r2, .L131
 559 0202 D169     		ldr	r1, [r2, #28]
 560 0204 8020     		movs	r0, #128
 561 0206 4005     		lsls	r0, r0, #21
 562 0208 0143     		orrs	r1, r0
 563 020a D161     		str	r1, [r2, #28]
 564 020c D369     		ldr	r3, [r2, #28]
 565 020e 0340     		ands	r3, r0
 566 0210 0193     		str	r3, [sp, #4]
 567 0212 019B     		ldr	r3, [sp, #4]
 568              	.LVL41:
 569              	.LBE3:
 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       pwrclkchanged = SET;
 570              		.loc 1 487 0
 571 0214 0125     		movs	r5, #1
 572              	.LVL42:
 573              	.L49:
 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 574              		.loc 1 490 0
 575 0216 354B     		ldr	r3, .L131+12
 576 0218 1B68     		ldr	r3, [r3]
 577 021a DB05     		lsls	r3, r3, #23
 578 021c 10D5     		bpl	.L118
 579              	.L50:
 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Enable write access to Backup domain */
 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       SET_BIT(PWR->CR, PWR_CR_DBP);
 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Wait for Backup domain Write protection disable */
 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           return HAL_TIMEOUT;
 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Set the new LSE configuration -----------------------------------------*/
 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
 580              		.loc 1 508 0
 581 021e A368     		ldr	r3, [r4, #8]
 582 0220 012B     		cmp	r3, #1
 583 0222 21D0     		beq	.L119
 584              		.loc 1 508 0 is_stmt 0 discriminator 2
 585 0224 002B     		cmp	r3, #0
 586 0226 36D1     		bne	.L55
 587              		.loc 1 508 0 discriminator 3
 588 0228 2D4B     		ldr	r3, .L131
 589 022a 1A6A     		ldr	r2, [r3, #32]
ARM GAS  /tmp/ccQfjpF5.s 			page 21


 590 022c 0121     		movs	r1, #1
 591 022e 8A43     		bics	r2, r1
 592 0230 1A62     		str	r2, [r3, #32]
 593 0232 1A6A     		ldr	r2, [r3, #32]
 594 0234 0331     		adds	r1, r1, #3
 595 0236 8A43     		bics	r2, r1
 596 0238 1A62     		str	r2, [r3, #32]
 597 023a 1AE0     		b	.L54
 598              	.LVL43:
 599              	.L95:
 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 600              		.loc 1 477 0 is_stmt 1
 601 023c 0025     		movs	r5, #0
 602 023e EAE7     		b	.L49
 603              	.LVL44:
 604              	.L118:
 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 605              		.loc 1 493 0
 606 0240 2A4A     		ldr	r2, .L131+12
 607 0242 1168     		ldr	r1, [r2]
 608 0244 8023     		movs	r3, #128
 609 0246 5B00     		lsls	r3, r3, #1
 610 0248 0B43     		orrs	r3, r1
 611 024a 1360     		str	r3, [r2]
 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 612              		.loc 1 496 0
 613 024c FFF7FEFF 		bl	HAL_GetTick
 614              	.LVL45:
 615 0250 0600     		movs	r6, r0
 616              	.LVL46:
 617              	.L51:
 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 618              		.loc 1 498 0
 619 0252 264B     		ldr	r3, .L131+12
 620 0254 1B68     		ldr	r3, [r3]
 621 0256 DB05     		lsls	r3, r3, #23
 622 0258 E1D4     		bmi	.L50
 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 623              		.loc 1 500 0
 624 025a FFF7FEFF 		bl	HAL_GetTick
 625              	.LVL47:
 626 025e 801B     		subs	r0, r0, r6
 627 0260 6428     		cmp	r0, #100
 628 0262 F6D9     		bls	.L51
 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 629              		.loc 1 502 0
 630 0264 0320     		movs	r0, #3
 631 0266 57E1     		b	.L20
 632              	.LVL48:
 633              	.L119:
 634              		.loc 1 508 0 discriminator 1
 635 0268 1D4A     		ldr	r2, .L131
 636 026a 136A     		ldr	r3, [r2, #32]
 637 026c 0121     		movs	r1, #1
 638 026e 0B43     		orrs	r3, r1
 639 0270 1362     		str	r3, [r2, #32]
 640              	.L54:
ARM GAS  /tmp/ccQfjpF5.s 			page 22


 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the LSE State */
 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
 641              		.loc 1 510 0
 642 0272 A368     		ldr	r3, [r4, #8]
 643 0274 002B     		cmp	r3, #0
 644 0276 24D0     		beq	.L57
 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Get Start Tick */
 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 645              		.loc 1 513 0
 646 0278 FFF7FEFF 		bl	HAL_GetTick
 647              	.LVL49:
 648 027c 0600     		movs	r6, r0
 649              	.LVL50:
 650              	.L58:
 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Wait till LSE is ready */  
 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
 651              		.loc 1 516 0
 652 027e 184B     		ldr	r3, .L131
 653 0280 1B6A     		ldr	r3, [r3, #32]
 654 0282 9B07     		lsls	r3, r3, #30
 655 0284 36D4     		bmi	.L60
 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 656              		.loc 1 518 0
 657 0286 FFF7FEFF 		bl	HAL_GetTick
 658              	.LVL51:
 659 028a 801B     		subs	r0, r0, r6
 660 028c 184B     		ldr	r3, .L131+16
 661 028e 9842     		cmp	r0, r3
 662 0290 F5D9     		bls	.L58
 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           return HAL_TIMEOUT;
 663              		.loc 1 520 0
 664 0292 0320     		movs	r0, #3
 665 0294 40E1     		b	.L20
 666              	.LVL52:
 667              	.L55:
 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the LSE State */
 668              		.loc 1 508 0 discriminator 4
 669 0296 052B     		cmp	r3, #5
 670 0298 09D0     		beq	.L120
 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the LSE State */
 671              		.loc 1 508 0 is_stmt 0 discriminator 6
 672 029a 114B     		ldr	r3, .L131
 673 029c 1A6A     		ldr	r2, [r3, #32]
 674 029e 0121     		movs	r1, #1
 675 02a0 8A43     		bics	r2, r1
 676 02a2 1A62     		str	r2, [r3, #32]
 677 02a4 1A6A     		ldr	r2, [r3, #32]
 678 02a6 0331     		adds	r1, r1, #3
 679 02a8 8A43     		bics	r2, r1
 680 02aa 1A62     		str	r2, [r3, #32]
 681 02ac E1E7     		b	.L54
 682              	.L120:
 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the LSE State */
ARM GAS  /tmp/ccQfjpF5.s 			page 23


 683              		.loc 1 508 0 discriminator 5
 684 02ae 0C4B     		ldr	r3, .L131
 685 02b0 1A6A     		ldr	r2, [r3, #32]
 686 02b2 0421     		movs	r1, #4
 687 02b4 0A43     		orrs	r2, r1
 688 02b6 1A62     		str	r2, [r3, #32]
 689 02b8 1A6A     		ldr	r2, [r3, #32]
 690 02ba 0339     		subs	r1, r1, #3
 691 02bc 0A43     		orrs	r2, r1
 692 02be 1A62     		str	r2, [r3, #32]
 693 02c0 D7E7     		b	.L54
 694              	.L57:
 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else
 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Get Start Tick */
 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 695              		.loc 1 527 0 is_stmt 1
 696 02c2 FFF7FEFF 		bl	HAL_GetTick
 697              	.LVL53:
 698 02c6 0600     		movs	r6, r0
 699              	.LVL54:
 700              	.L61:
 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Wait till LSE is disabled */  
 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
 701              		.loc 1 530 0
 702 02c8 054B     		ldr	r3, .L131
 703 02ca 1B6A     		ldr	r3, [r3, #32]
 704 02cc 9B07     		lsls	r3, r3, #30
 705 02ce 11D5     		bpl	.L60
 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
 706              		.loc 1 532 0
 707 02d0 FFF7FEFF 		bl	HAL_GetTick
 708              	.LVL55:
 709 02d4 801B     		subs	r0, r0, r6
 710 02d6 064B     		ldr	r3, .L131+16
 711 02d8 9842     		cmp	r0, r3
 712 02da F5D9     		bls	.L61
 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           return HAL_TIMEOUT;
 713              		.loc 1 534 0
 714 02dc 0320     		movs	r0, #3
 715 02de 1BE1     		b	.L20
 716              	.L132:
 717              		.align	2
 718              	.L131:
 719 02e0 00100240 		.word	1073876992
 720 02e4 FFFFFEFF 		.word	-65537
 721 02e8 FFFFFBFF 		.word	-262145
 722 02ec 00700040 		.word	1073770496
 723 02f0 88130000 		.word	5000
 724              	.L60:
 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
ARM GAS  /tmp/ccQfjpF5.s 			page 24


 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Require to disable power clock if necessary */
 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(pwrclkchanged == SET)
 725              		.loc 1 540 0
 726 02f4 012D     		cmp	r5, #1
 727 02f6 3AD0     		beq	.L121
 728              	.LVL56:
 729              	.L48:
 730              	.LBE2:
 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_PWR_CLK_DISABLE();
 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*----------------------------- HSI14 Configuration --------------------------*/
 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14)
 731              		.loc 1 547 0
 732 02f8 2368     		ldr	r3, [r4]
 733 02fa DB06     		lsls	r3, r3, #27
 734 02fc 10D5     		bpl	.L63
 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the parameters */
 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State));
 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue));
 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the HSI14 State */
 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON)
 735              		.loc 1 554 0
 736 02fe 6369     		ldr	r3, [r4, #20]
 737 0300 012B     		cmp	r3, #1
 738 0302 3AD0     		beq	.L122
 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Disable ADC control of the Internal High Speed oscillator HSI14 */
 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_HSI14ADC_DISABLE();
 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Enable the Internal High Speed oscillator (HSI). */
 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_HSI14_ENABLE();
 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Get Start Tick */
 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Wait till HSI is ready */  
 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           return HAL_TIMEOUT;
 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }      
 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       } 
 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL)
 739              		.loc 1 577 0
ARM GAS  /tmp/ccQfjpF5.s 			page 25


 740 0304 0533     		adds	r3, r3, #5
 741 0306 58D1     		bne	.L67
 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Enable ADC control of the Internal High Speed oscillator HSI14 */
 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_HSI14ADC_ENABLE();
 742              		.loc 1 580 0
 743 0308 884A     		ldr	r2, .L133
 744 030a 536B     		ldr	r3, [r2, #52]
 745 030c 0421     		movs	r1, #4
 746 030e 8B43     		bics	r3, r1
 747 0310 5363     		str	r3, [r2, #52]
 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
 748              		.loc 1 583 0
 749 0312 536B     		ldr	r3, [r2, #52]
 750 0314 F431     		adds	r1, r1, #244
 751 0316 8B43     		bics	r3, r1
 752 0318 A169     		ldr	r1, [r4, #24]
 753 031a C900     		lsls	r1, r1, #3
 754 031c 0B43     		orrs	r3, r1
 755 031e 5363     		str	r3, [r2, #52]
 756              	.L63:
 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else
 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Disable ADC control of the Internal High Speed oscillator HSI14 */
 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_HSI14ADC_DISABLE();
 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Disable the Internal High Speed oscillator (HSI). */
 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       __HAL_RCC_HSI14_DISABLE();
 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Get Start Tick */
 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       tickstart = HAL_GetTick();
 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Wait till HSI is ready */  
 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           return HAL_TIMEOUT;
 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*----------------------------- HSI48 Configuration --------------------------*/
 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
 757              		.loc 1 609 0
 758 0320 2368     		ldr	r3, [r4]
 759 0322 9B06     		lsls	r3, r3, #26
 760 0324 00D4     		bmi	.LCB765
 761 0326 82E0     		b	.L70	@long jump
 762              	.LCB765:
 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check the parameters */
ARM GAS  /tmp/ccQfjpF5.s 			page 26


 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* When the HSI48 is used as system clock it is not allowed to be disabled */
 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) ||
 763              		.loc 1 615 0
 764 0328 804B     		ldr	r3, .L133
 765 032a 5A68     		ldr	r2, [r3, #4]
 766 032c 0C23     		movs	r3, #12
 767 032e 1340     		ands	r3, r2
 768 0330 0C2B     		cmp	r3, #12
 769 0332 60D0     		beq	.L71
 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC
 770              		.loc 1 616 0 discriminator 1
 771 0334 7D4B     		ldr	r3, .L133
 772 0336 5A68     		ldr	r2, [r3, #4]
 773 0338 0C23     		movs	r3, #12
 774 033a 1340     		ands	r3, r2
 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSC
 775              		.loc 1 615 0 discriminator 1
 776 033c 082B     		cmp	r3, #8
 777 033e 53D0     		beq	.L123
 778              	.L72:
 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_
 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         return HAL_ERROR;
 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else
 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Check the HSI48 State */
 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF)
 779              		.loc 1 626 0
 780 0340 236A     		ldr	r3, [r4, #32]
 781 0342 002B     		cmp	r3, #0
 782 0344 60D0     		beq	.L73
 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Enable the Internal High Speed oscillator (HSI48). */
 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_HSI48_ENABLE();
 783              		.loc 1 629 0
 784 0346 794A     		ldr	r2, .L133
 785 0348 516B     		ldr	r1, [r2, #52]
 786 034a 8023     		movs	r3, #128
 787 034c 5B02     		lsls	r3, r3, #9
 788 034e 0B43     		orrs	r3, r1
 789 0350 5363     		str	r3, [r2, #52]
 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Get Start Tick */
 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 790              		.loc 1 632 0
 791 0352 FFF7FEFF 		bl	HAL_GetTick
 792              	.LVL57:
 793 0356 0500     		movs	r5, r0
 794              	.LVL58:
 795              	.L74:
 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Wait till HSI48 is ready */  
ARM GAS  /tmp/ccQfjpF5.s 			page 27


 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
 796              		.loc 1 635 0
 797 0358 744B     		ldr	r3, .L133
 798 035a 5B6B     		ldr	r3, [r3, #52]
 799 035c DB03     		lsls	r3, r3, #15
 800 035e 66D4     		bmi	.L70
 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 801              		.loc 1 637 0
 802 0360 FFF7FEFF 		bl	HAL_GetTick
 803              	.LVL59:
 804 0364 401B     		subs	r0, r0, r5
 805 0366 0228     		cmp	r0, #2
 806 0368 F6D9     		bls	.L74
 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 807              		.loc 1 639 0
 808 036a 0320     		movs	r0, #3
 809 036c D4E0     		b	.L20
 810              	.LVL60:
 811              	.L121:
 812              	.LBB4:
 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 813              		.loc 1 542 0
 814 036e 6F4A     		ldr	r2, .L133
 815 0370 D369     		ldr	r3, [r2, #28]
 816 0372 6F49     		ldr	r1, .L133+4
 817 0374 0B40     		ands	r3, r1
 818 0376 D361     		str	r3, [r2, #28]
 819 0378 BEE7     		b	.L48
 820              	.LVL61:
 821              	.L122:
 822              	.LBE4:
 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 823              		.loc 1 557 0
 824 037a 6C4B     		ldr	r3, .L133
 825 037c 5A6B     		ldr	r2, [r3, #52]
 826 037e 0421     		movs	r1, #4
 827 0380 0A43     		orrs	r2, r1
 828 0382 5A63     		str	r2, [r3, #52]
 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 829              		.loc 1 560 0
 830 0384 5A6B     		ldr	r2, [r3, #52]
 831 0386 0339     		subs	r1, r1, #3
 832 0388 0A43     		orrs	r2, r1
 833 038a 5A63     		str	r2, [r3, #52]
 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 834              		.loc 1 563 0
 835 038c FFF7FEFF 		bl	HAL_GetTick
 836              	.LVL62:
 837 0390 0500     		movs	r5, r0
 838              	.LVL63:
 839              	.L65:
 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 840              		.loc 1 566 0
 841 0392 664B     		ldr	r3, .L133
 842 0394 5B6B     		ldr	r3, [r3, #52]
ARM GAS  /tmp/ccQfjpF5.s 			page 28


 843 0396 9B07     		lsls	r3, r3, #30
 844 0398 06D4     		bmi	.L124
 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 845              		.loc 1 568 0
 846 039a FFF7FEFF 		bl	HAL_GetTick
 847              	.LVL64:
 848 039e 401B     		subs	r0, r0, r5
 849 03a0 0228     		cmp	r0, #2
 850 03a2 F6D9     		bls	.L65
 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }      
 851              		.loc 1 570 0
 852 03a4 0320     		movs	r0, #3
 853 03a6 B7E0     		b	.L20
 854              	.L124:
 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 855              		.loc 1 575 0
 856 03a8 6049     		ldr	r1, .L133
 857 03aa 4B6B     		ldr	r3, [r1, #52]
 858 03ac F822     		movs	r2, #248
 859 03ae 9343     		bics	r3, r2
 860 03b0 A269     		ldr	r2, [r4, #24]
 861 03b2 D200     		lsls	r2, r2, #3
 862 03b4 1343     		orrs	r3, r2
 863 03b6 4B63     		str	r3, [r1, #52]
 864 03b8 B2E7     		b	.L63
 865              	.LVL65:
 866              	.L67:
 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 867              		.loc 1 588 0
 868 03ba 5C4B     		ldr	r3, .L133
 869 03bc 5A6B     		ldr	r2, [r3, #52]
 870 03be 0421     		movs	r1, #4
 871 03c0 0A43     		orrs	r2, r1
 872 03c2 5A63     		str	r2, [r3, #52]
 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 873              		.loc 1 591 0
 874 03c4 5A6B     		ldr	r2, [r3, #52]
 875 03c6 0339     		subs	r1, r1, #3
 876 03c8 8A43     		bics	r2, r1
 877 03ca 5A63     		str	r2, [r3, #52]
 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 878              		.loc 1 594 0
 879 03cc FFF7FEFF 		bl	HAL_GetTick
 880              	.LVL66:
 881 03d0 0500     		movs	r5, r0
 882              	.LVL67:
 883              	.L68:
 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 884              		.loc 1 597 0
 885 03d2 564B     		ldr	r3, .L133
 886 03d4 5B6B     		ldr	r3, [r3, #52]
 887 03d6 9B07     		lsls	r3, r3, #30
 888 03d8 A2D5     		bpl	.L63
 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 889              		.loc 1 599 0
 890 03da FFF7FEFF 		bl	HAL_GetTick
 891              	.LVL68:
ARM GAS  /tmp/ccQfjpF5.s 			page 29


 892 03de 401B     		subs	r0, r0, r5
 893 03e0 0228     		cmp	r0, #2
 894 03e2 F6D9     		bls	.L68
 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 895              		.loc 1 601 0
 896 03e4 0320     		movs	r0, #3
 897 03e6 97E0     		b	.L20
 898              	.LVL69:
 899              	.L123:
 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 900              		.loc 1 616 0
 901 03e8 504B     		ldr	r3, .L133
 902 03ea 5B68     		ldr	r3, [r3, #4]
 903 03ec C022     		movs	r2, #192
 904 03ee 5202     		lsls	r2, r2, #9
 905 03f0 1340     		ands	r3, r2
 906 03f2 9342     		cmp	r3, r2
 907 03f4 A4D1     		bne	.L72
 908              	.L71:
 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 909              		.loc 1 618 0
 910 03f6 4D4B     		ldr	r3, .L133
 911 03f8 5B6B     		ldr	r3, [r3, #52]
 912 03fa DB03     		lsls	r3, r3, #15
 913 03fc 17D5     		bpl	.L70
 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 914              		.loc 1 618 0 is_stmt 0 discriminator 1
 915 03fe 236A     		ldr	r3, [r4, #32]
 916 0400 012B     		cmp	r3, #1
 917 0402 14D0     		beq	.L70
 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 918              		.loc 1 620 0 is_stmt 1
 919 0404 0120     		movs	r0, #1
 920 0406 87E0     		b	.L20
 921              	.L73:
 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         } 
 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       else
 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Disable the Internal High Speed oscillator (HSI48). */
 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_HSI48_DISABLE();
 922              		.loc 1 646 0
 923 0408 484A     		ldr	r2, .L133
 924 040a 536B     		ldr	r3, [r2, #52]
 925 040c 4949     		ldr	r1, .L133+8
 926 040e 0B40     		ands	r3, r1
 927 0410 5363     		str	r3, [r2, #52]
 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Get Start Tick */
 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 928              		.loc 1 649 0
 929 0412 FFF7FEFF 		bl	HAL_GetTick
 930              	.LVL70:
 931 0416 0500     		movs	r5, r0
 932              	.LVL71:
 933              	.L76:
ARM GAS  /tmp/ccQfjpF5.s 			page 30


 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       
 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Wait till HSI48 is ready */  
 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
 934              		.loc 1 652 0
 935 0418 444B     		ldr	r3, .L133
 936 041a 5B6B     		ldr	r3, [r3, #52]
 937 041c DB03     		lsls	r3, r3, #15
 938 041e 06D5     		bpl	.L70
 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
 939              		.loc 1 654 0
 940 0420 FFF7FEFF 		bl	HAL_GetTick
 941              	.LVL72:
 942 0424 401B     		subs	r0, r0, r5
 943 0426 0228     		cmp	r0, #2
 944 0428 F6D9     		bls	.L76
 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 945              		.loc 1 656 0
 946 042a 0320     		movs	r0, #3
 947 042c 74E0     		b	.L20
 948              	.LVL73:
 949              	.L70:
 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        
 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*-------------------------------- PLL Configuration -----------------------*/
 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check the parameters */
 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
 950              		.loc 1 667 0
 951 042e 636A     		ldr	r3, [r4, #36]
 952 0430 002B     		cmp	r3, #0
 953 0432 00D1     		bne	.LCB967
 954 0434 74E0     		b	.L104	@long jump
 955              	.LCB967:
 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check if the PLL is used as system clock or not */
 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
 956              		.loc 1 670 0
 957 0436 3D4A     		ldr	r2, .L133
 958 0438 5168     		ldr	r1, [r2, #4]
 959 043a 0C22     		movs	r2, #12
 960 043c 0A40     		ands	r2, r1
 961 043e 082A     		cmp	r2, #8
 962 0440 4DD0     		beq	.L78
 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     { 
 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
 963              		.loc 1 672 0
 964 0442 022B     		cmp	r3, #2
 965 0444 12D0     		beq	.L125
 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Check the parameters */
ARM GAS  /tmp/ccQfjpF5.s 			page 31


 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Disable the main PLL. */
 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_PLL_DISABLE();
 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Get Start Tick */
 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Wait till PLL is disabled */
 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Configure the main PLL clock source, predivider and multiplication factor. */
 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PREDIV,
 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PLLMUL);
 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Enable the main PLL. */
 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_PLL_ENABLE();
 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Get Start Tick */
 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Wait till PLL is ready */
 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  == RESET)
 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       else
 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Disable the main PLL. */
 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         __HAL_RCC_PLL_DISABLE();
 966              		.loc 1 716 0
 967 0446 394A     		ldr	r2, .L133
 968 0448 1368     		ldr	r3, [r2]
 969 044a 3B49     		ldr	r1, .L133+12
 970 044c 0B40     		ands	r3, r1
 971 044e 1360     		str	r3, [r2]
 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****  
 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Get Start Tick */
 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         tickstart = HAL_GetTick();
 972              		.loc 1 719 0
 973 0450 FFF7FEFF 		bl	HAL_GetTick
 974              	.LVL74:
 975 0454 0400     		movs	r4, r0
 976              	.LVL75:
 977              	.L84:
ARM GAS  /tmp/ccQfjpF5.s 			page 32


 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Wait till PLL is disabled */  
 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY)  != RESET)
 978              		.loc 1 722 0
 979 0456 354B     		ldr	r3, .L133
 980 0458 1B68     		ldr	r3, [r3]
 981 045a 9B01     		lsls	r3, r3, #6
 982 045c 3DD5     		bpl	.L126
 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
 983              		.loc 1 724 0
 984 045e FFF7FEFF 		bl	HAL_GetTick
 985              	.LVL76:
 986 0462 001B     		subs	r0, r0, r4
 987 0464 0228     		cmp	r0, #2
 988 0466 F6D9     		bls	.L84
 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****             return HAL_TIMEOUT;
 989              		.loc 1 726 0
 990 0468 0320     		movs	r0, #3
 991 046a 55E0     		b	.L20
 992              	.LVL77:
 993              	.L125:
 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 994              		.loc 1 680 0
 995 046c 2F4A     		ldr	r2, .L133
 996 046e 1368     		ldr	r3, [r2]
 997 0470 3149     		ldr	r1, .L133+12
 998 0472 0B40     		ands	r3, r1
 999 0474 1360     		str	r3, [r2]
 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 1000              		.loc 1 683 0
 1001 0476 FFF7FEFF 		bl	HAL_GetTick
 1002              	.LVL78:
 1003 047a 0500     		movs	r5, r0
 1004              	.LVL79:
 1005              	.L80:
 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 1006              		.loc 1 686 0
 1007 047c 2B4B     		ldr	r3, .L133
 1008 047e 1B68     		ldr	r3, [r3]
 1009 0480 9B01     		lsls	r3, r3, #6
 1010 0482 06D5     		bpl	.L127
 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 1011              		.loc 1 688 0
 1012 0484 FFF7FEFF 		bl	HAL_GetTick
 1013              	.LVL80:
 1014 0488 401B     		subs	r0, r0, r5
 1015 048a 0228     		cmp	r0, #2
 1016 048c F6D9     		bls	.L80
 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 1017              		.loc 1 690 0
 1018 048e 0320     		movs	r0, #3
 1019 0490 42E0     		b	.L20
 1020              	.L127:
 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                              RCC_OscInitStruct->PLL.PREDIV,
 1021              		.loc 1 695 0
ARM GAS  /tmp/ccQfjpF5.s 			page 33


 1022 0492 264B     		ldr	r3, .L133
 1023 0494 DA6A     		ldr	r2, [r3, #44]
 1024 0496 0F21     		movs	r1, #15
 1025 0498 8A43     		bics	r2, r1
 1026 049a 216B     		ldr	r1, [r4, #48]
 1027 049c 0A43     		orrs	r2, r1
 1028 049e DA62     		str	r2, [r3, #44]
 1029 04a0 5A68     		ldr	r2, [r3, #4]
 1030 04a2 2649     		ldr	r1, .L133+16
 1031 04a4 0A40     		ands	r2, r1
 1032 04a6 E16A     		ldr	r1, [r4, #44]
 1033 04a8 A06A     		ldr	r0, [r4, #40]
 1034 04aa 0143     		orrs	r1, r0
 1035 04ac 0A43     		orrs	r2, r1
 1036 04ae 5A60     		str	r2, [r3, #4]
 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 1037              		.loc 1 699 0
 1038 04b0 1968     		ldr	r1, [r3]
 1039 04b2 8022     		movs	r2, #128
 1040 04b4 5204     		lsls	r2, r2, #17
 1041 04b6 0A43     		orrs	r2, r1
 1042 04b8 1A60     		str	r2, [r3]
 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         
 1043              		.loc 1 702 0
 1044 04ba FFF7FEFF 		bl	HAL_GetTick
 1045              	.LVL81:
 1046 04be 0400     		movs	r4, r0
 1047              	.LVL82:
 1048              	.L82:
 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 1049              		.loc 1 705 0
 1050 04c0 1A4B     		ldr	r3, .L133
 1051 04c2 1B68     		ldr	r3, [r3]
 1052 04c4 9B01     		lsls	r3, r3, #6
 1053 04c6 06D4     		bmi	.L128
 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           {
 1054              		.loc 1 707 0
 1055 04c8 FFF7FEFF 		bl	HAL_GetTick
 1056              	.LVL83:
 1057 04cc 001B     		subs	r0, r0, r4
 1058 04ce 0228     		cmp	r0, #2
 1059 04d0 F6D9     		bls	.L82
 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 1060              		.loc 1 709 0
 1061 04d2 0320     		movs	r0, #3
 1062 04d4 20E0     		b	.L20
 1063              	.L128:
 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           }
 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else
 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Check if there is a request to disable the PLL used as System clock source */
 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         return HAL_ERROR;
ARM GAS  /tmp/ccQfjpF5.s 			page 34


 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       else
 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* Do not return HAL_ERROR if request repeats the current configuration */
 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         pll_config  = RCC->CFGR;
 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         pll_config2 = RCC->CFGR2;
 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         if((READ_BIT(pll_config,  RCC_CFGR_PLLSRC)  != RCC_OscInitStruct->PLL.PLLSource) ||
 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****            (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)    ||
 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****            (READ_BIT(pll_config,  RCC_CFGR_PLLMUL)  != RCC_OscInitStruct->PLL.PLLMUL))
 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****           return HAL_ERROR;
 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   return HAL_OK;
 1064              		.loc 1 753 0
 1065 04d6 0020     		movs	r0, #0
 1066 04d8 1EE0     		b	.L20
 1067              	.L126:
 1068 04da 0020     		movs	r0, #0
 1069 04dc 1CE0     		b	.L20
 1070              	.LVL84:
 1071              	.L78:
 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 1072              		.loc 1 734 0
 1073 04de 012B     		cmp	r3, #1
 1074 04e0 20D0     		beq	.L108
 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         pll_config2 = RCC->CFGR2;
 1075              		.loc 1 741 0
 1076 04e2 124B     		ldr	r3, .L133
 1077 04e4 5A68     		ldr	r2, [r3, #4]
 1078              	.LVL85:
 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         if((READ_BIT(pll_config,  RCC_CFGR_PLLSRC)  != RCC_OscInitStruct->PLL.PLLSource) ||
 1079              		.loc 1 742 0
 1080 04e6 D96A     		ldr	r1, [r3, #44]
 1081              	.LVL86:
 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****            (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)    ||
 1082              		.loc 1 743 0
 1083 04e8 C023     		movs	r3, #192
 1084 04ea 5B02     		lsls	r3, r3, #9
 1085 04ec 1340     		ands	r3, r2
 1086 04ee A06A     		ldr	r0, [r4, #40]
 1087 04f0 8342     		cmp	r3, r0
 1088 04f2 01D0     		beq	.L129
 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 1089              		.loc 1 747 0
 1090 04f4 0120     		movs	r0, #1
 1091 04f6 0FE0     		b	.L20
 1092              	.L129:
 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****            (READ_BIT(pll_config,  RCC_CFGR_PLLMUL)  != RCC_OscInitStruct->PLL.PLLMUL))
 1093              		.loc 1 744 0 discriminator 1
 1094 04f8 0F23     		movs	r3, #15
 1095 04fa 0B40     		ands	r3, r1
 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****            (READ_BIT(pll_config2, RCC_CFGR2_PREDIV) != RCC_OscInitStruct->PLL.PREDIV)    ||
 1096              		.loc 1 743 0 discriminator 1
ARM GAS  /tmp/ccQfjpF5.s 			page 35


 1097 04fc 216B     		ldr	r1, [r4, #48]
 1098              	.LVL87:
 1099 04fe 8B42     		cmp	r3, r1
 1100 0500 01D0     		beq	.L130
 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 1101              		.loc 1 747 0
 1102 0502 0120     		movs	r0, #1
 1103 0504 08E0     		b	.L20
 1104              	.L130:
 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         {
 1105              		.loc 1 745 0
 1106 0506 F023     		movs	r3, #240
 1107 0508 9B03     		lsls	r3, r3, #14
 1108 050a 1A40     		ands	r2, r3
 1109              	.LVL88:
 1110 050c E36A     		ldr	r3, [r4, #44]
 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****            (READ_BIT(pll_config,  RCC_CFGR_PLLMUL)  != RCC_OscInitStruct->PLL.PLLMUL))
 1111              		.loc 1 744 0
 1112 050e 9A42     		cmp	r2, r3
 1113 0510 0AD0     		beq	.L111
 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         }
 1114              		.loc 1 747 0
 1115 0512 0120     		movs	r0, #1
 1116 0514 00E0     		b	.L20
 1117              	.LVL89:
 1118              	.L86:
 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1119              		.loc 1 309 0
 1120 0516 0120     		movs	r0, #1
 1121              	.LVL90:
 1122              	.L20:
 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1123              		.loc 1 754 0
 1124 0518 02B0     		add	sp, sp, #8
 1125              		@ sp needed
 1126 051a 70BD     		pop	{r4, r5, r6, pc}
 1127              	.LVL91:
 1128              	.L114:
 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 1129              		.loc 1 327 0
 1130 051c 0120     		movs	r0, #1
 1131              	.LVL92:
 1132 051e FBE7     		b	.L20
 1133              	.L104:
 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1134              		.loc 1 753 0
 1135 0520 0020     		movs	r0, #0
 1136 0522 F9E7     		b	.L20
 1137              	.L108:
 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 1138              		.loc 1 736 0
 1139 0524 0120     		movs	r0, #1
 1140 0526 F7E7     		b	.L20
 1141              	.L111:
 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1142              		.loc 1 753 0
 1143 0528 0020     		movs	r0, #0
ARM GAS  /tmp/ccQfjpF5.s 			page 36


 1144 052a F5E7     		b	.L20
 1145              	.L134:
 1146              		.align	2
 1147              	.L133:
 1148 052c 00100240 		.word	1073876992
 1149 0530 FFFFFFEF 		.word	-268435457
 1150 0534 FFFFFEFF 		.word	-65537
 1151 0538 FFFFFFFE 		.word	-16777217
 1152 053c FF7FC2FF 		.word	-4030465
 1153              		.cfi_endproc
 1154              	.LFE41:
 1156              		.section	.text.HAL_RCC_MCOConfig,"ax",%progbits
 1157              		.align	1
 1158              		.global	HAL_RCC_MCOConfig
 1159              		.syntax unified
 1160              		.code	16
 1161              		.thumb_func
 1162              		.fpu softvfp
 1164              	HAL_RCC_MCOConfig:
 1165              	.LFB43:
 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Initializes the CPU, AHB and APB buses clocks according to the specified 
 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         parameters in the RCC_ClkInitStruct.
 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_ClkInitStruct pointer to an RCC_OscInitTypeDef structure that
 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         contains the configuration information for the RCC peripheral.
 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  FLatency FLASH Latency                   
 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *          The value of this parameter depend on device used within the same series
 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency 
 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         and updated by @ref HAL_RCC_GetHCLKFreq() function called within this function
 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *
 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   The HSI is used (enabled by hardware) as system clock source after
 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         start-up from Reset, wake-up from STOP and STANDBY mode, or in case
 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         of failure of the HSE used directly or indirectly as system clock
 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         (if the Clock Security System CSS is enabled).
 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *           
 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   A switch from one clock source to another occurs only if the target
 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         clock source is ready (clock stable after start-up delay or PLL locked). 
 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         If a clock source which is not yet ready is selected, the switch will
 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         occur when the clock source will be ready. 
 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         currently used as system clock source.
 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval HAL status
 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t FLatency)
 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   uint32_t tickstart;
 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check Null pointer */
 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(RCC_ClkInitStruct == NULL)
 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     return HAL_ERROR;
 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check the parameters */
 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(IS_FLASH_LATENCY(FLatency));
ARM GAS  /tmp/ccQfjpF5.s 			page 37


 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* To correctly read data from FLASH memory, the number of wait states (LATENCY) 
 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   must be correctly programmed according to the frequency of the CPU clock 
 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     (HCLK) of the device. */
 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Increasing the number of wait states because of higher CPU frequency */
 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(FLatency > __HAL_FLASH_GET_LATENCY())
 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {    
 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     __HAL_FLASH_SET_LATENCY(FLatency);
 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check that the new number of wait states is taken into account to access the Flash
 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     memory by reading the FLASH_ACR register */
 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(__HAL_FLASH_GET_LATENCY() != FLatency)
 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       return HAL_ERROR;
 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*-------------------------- HCLK Configuration --------------------------*/
 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Set the highest APB divider in order to ensure that we do not go through
 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****        a non-spec phase whatever we decrease or increase HCLK. */
 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_HCLK_DIV16);
 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Set the new HCLK clock divider */
 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*------------------------- SYSCLK Configuration ---------------------------*/ 
 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* HSE is selected as System Clock Source */
 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Check the HSE ready flag */  
 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         return HAL_ERROR;
 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* PLL is selected as System Clock Source */
 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Check the PLL ready flag */  
 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         return HAL_ERROR;
 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
ARM GAS  /tmp/ccQfjpF5.s 			page 38


 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48)
 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* HSI48 is selected as System Clock Source */
 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Check the HSI48 ready flag */
 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         return HAL_ERROR;
 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */
 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* HSI is selected as System Clock Source */
 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     else
 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       /* Check the HSI ready flag */  
 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         return HAL_ERROR;
 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Get Start Tick */
 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     tickstart = HAL_GetTick();
 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         return HAL_TIMEOUT;
 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Decreasing the number of wait states because of lower CPU frequency */
 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(FLatency < __HAL_FLASH_GET_LATENCY())
 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {    
 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     __HAL_FLASH_SET_LATENCY(FLatency);
 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Check that the new number of wait states is taken into account to access the Flash
 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     memory by reading the FLASH_ACR register */
 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     if(__HAL_FLASH_GET_LATENCY() != FLatency)
 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       return HAL_ERROR;
 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }    
 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /*-------------------------- PCLK1 Configuration ---------------------------*/ 
 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Update the SystemCoreClock global variable */
 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CF
ARM GAS  /tmp/ccQfjpF5.s 			page 39


 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Configure the source of time base considering new system clocks settings*/
 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   HAL_InitTick (TICK_INT_PRIORITY);
 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   return HAL_OK;
 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @}
 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *  @brief   RCC clocks control functions
 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *
 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @verbatim   
 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ===============================================================================
 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                   ##### Peripheral Control functions #####
 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   ===============================================================================  
 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     [..]
 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     This subsection provides a set of functions allowing to control the RCC Clocks 
 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     frequencies.
 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @endverbatim
 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @{
 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_MCOPRE)
 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Selects the clock source to output on MCO pin.
 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   MCO pin should be configured in alternate function mode.
 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_MCOx specifies the output direction for the clock source.
 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_MCOSource specifies the clock source to output.
 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_NOCLOCK     No clock selected
 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_SYSCLK      System Clock selected as MCO clock
 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI         HSI selected as MCO clock
 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSE         HSE selected as MCO clock
 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_LSI         LSI selected as MCO clock
 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_LSE         LSE selected as MCO clock
 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI14       HSI14 selected as MCO clock
 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @if STM32F042x6
 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elseif STM32F048xx
 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elseif STM32F071xB
 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elseif STM32F072xB
 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elseif STM32F078xx
 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
ARM GAS  /tmp/ccQfjpF5.s 			page 40


 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elseif STM32F091xC
 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elseif STM32F098xx
 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI48       HSI48 selected as MCO clock
 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elif STM32F030x6
 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elif STM32F030xC
 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elif STM32F031x6
 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elif STM32F038xx
 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elif STM32F070x6
 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @elif STM32F070xB
 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK      PLLCLK selected as MCO clock
 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   @endif
 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock
 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_MCODiv specifies the MCO DIV.
 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *          This parameter can be one of the following values:
 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_1   no division applied to MCO clock
 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_2   division by 2 applied to MCO clock
 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_4   division by 4 applied to MCO clock
 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_8   division by 8 applied to MCO clock
 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_16  division by 16 applied to MCO clock
 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_32  division by 32 applied to MCO clock
 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_64  division by 64 applied to MCO clock
 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_128 division by 128 applied to MCO clock
 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval None
 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else
 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Selects the clock source to output on MCO pin.
 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   MCO pin should be configured in alternate function mode.
 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_MCOx specifies the output direction for the clock source.
1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *          This parameter can be one of the following values:
1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1 Clock source to output on MCO1 pin(PA8).
1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_MCOSource specifies the clock source to output.
1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *          This parameter can be one of the following values:
1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_NOCLOCK     No clock selected as MCO clock
1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_SYSCLK      System clock selected as MCO clock
1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI         HSI selected as MCO clock
1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSE         HSE selected as MCO clock
1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_LSI         LSI selected as MCO clock
1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_LSE         LSE selected as MCO clock
1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_HSI14       HSI14 selected as MCO clock
1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCO1SOURCE_PLLCLK_DIV2 PLLCLK Divided by 2 selected as MCO clock
1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_MCODiv specifies the MCO DIV.
1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *          This parameter can be one of the following values:
1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *            @arg @ref RCC_MCODIV_1 no division applied to MCO clock
1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval None
1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif
1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
ARM GAS  /tmp/ccQfjpF5.s 			page 41


 1166              		.loc 1 1019 0
 1167              		.cfi_startproc
 1168              		@ args = 0, pretend = 0, frame = 24
 1169              		@ frame_needed = 0, uses_anonymous_args = 0
 1170              	.LVL93:
 1171 0000 70B5     		push	{r4, r5, r6, lr}
 1172              	.LCFI3:
 1173              		.cfi_def_cfa_offset 16
 1174              		.cfi_offset 4, -16
 1175              		.cfi_offset 5, -12
 1176              		.cfi_offset 6, -8
 1177              		.cfi_offset 14, -4
 1178 0002 86B0     		sub	sp, sp, #24
 1179              	.LCFI4:
 1180              		.cfi_def_cfa_offset 40
 1181 0004 0D00     		movs	r5, r1
 1182 0006 1600     		movs	r6, r2
1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   GPIO_InitTypeDef gpio;
1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check the parameters */
1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(IS_RCC_MCO(RCC_MCOx));
1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(IS_RCC_MCODIV(RCC_MCODiv));
1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Configure the MCO1 pin in alternate function mode */
1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   gpio.Mode      = GPIO_MODE_AF_PP;
 1183              		.loc 1 1028 0
 1184 0008 0223     		movs	r3, #2
 1185 000a 0293     		str	r3, [sp, #8]
1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   gpio.Speed     = GPIO_SPEED_FREQ_HIGH;
 1186              		.loc 1 1029 0
 1187 000c 0133     		adds	r3, r3, #1
 1188 000e 0493     		str	r3, [sp, #16]
1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   gpio.Pull      = GPIO_NOPULL;
 1189              		.loc 1 1030 0
 1190 0010 0023     		movs	r3, #0
 1191 0012 0393     		str	r3, [sp, #12]
1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   gpio.Pin       = MCO1_PIN;
 1192              		.loc 1 1031 0
 1193 0014 8022     		movs	r2, #128
 1194              	.LVL94:
 1195 0016 5200     		lsls	r2, r2, #1
 1196 0018 0192     		str	r2, [sp, #4]
1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   gpio.Alternate = GPIO_AF0_MCO;
 1197              		.loc 1 1032 0
 1198 001a 0593     		str	r3, [sp, #20]
 1199              	.LBB5:
1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* MCO1 Clock Enable */
1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   MCO1_CLK_ENABLE();
 1200              		.loc 1 1035 0
 1201 001c 0B4C     		ldr	r4, .L136
 1202 001e 6269     		ldr	r2, [r4, #20]
 1203 0020 8021     		movs	r1, #128
 1204              	.LVL95:
 1205 0022 8902     		lsls	r1, r1, #10
 1206 0024 0A43     		orrs	r2, r1
ARM GAS  /tmp/ccQfjpF5.s 			page 42


 1207 0026 6261     		str	r2, [r4, #20]
 1208 0028 6369     		ldr	r3, [r4, #20]
 1209 002a 0B40     		ands	r3, r1
 1210 002c 0093     		str	r3, [sp]
 1211 002e 009B     		ldr	r3, [sp]
 1212              	.LBE5:
1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio);
 1213              		.loc 1 1037 0
 1214 0030 9020     		movs	r0, #144
 1215              	.LVL96:
 1216 0032 01A9     		add	r1, sp, #4
 1217 0034 C005     		lsls	r0, r0, #23
 1218 0036 FFF7FEFF 		bl	HAL_GPIO_Init
 1219              	.LVL97:
1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Configure the MCO clock source */
1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   __HAL_RCC_MCO1_CONFIG(RCC_MCOSource, RCC_MCODiv);
 1220              		.loc 1 1040 0
 1221 003a 6268     		ldr	r2, [r4, #4]
 1222 003c 044B     		ldr	r3, .L136+4
 1223 003e 1A40     		ands	r2, r3
 1224 0040 3543     		orrs	r5, r6
 1225              	.LVL98:
 1226 0042 2A43     		orrs	r2, r5
 1227 0044 6260     		str	r2, [r4, #4]
1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1228              		.loc 1 1041 0
 1229 0046 06B0     		add	sp, sp, #24
 1230              		@ sp needed
 1231              	.LVL99:
 1232 0048 70BD     		pop	{r4, r5, r6, pc}
 1233              	.L137:
 1234 004a C046     		.align	2
 1235              	.L136:
 1236 004c 00100240 		.word	1073876992
 1237 0050 FFFFFF80 		.word	-2130706433
 1238              		.cfi_endproc
 1239              	.LFE43:
 1241              		.section	.text.HAL_RCC_EnableCSS,"ax",%progbits
 1242              		.align	1
 1243              		.global	HAL_RCC_EnableCSS
 1244              		.syntax unified
 1245              		.code	16
 1246              		.thumb_func
 1247              		.fpu softvfp
 1249              	HAL_RCC_EnableCSS:
 1250              	.LFB44:
1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Enables the Clock Security System.
1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   If a failure is detected on the HSE oscillator clock, this oscillator
1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         is automatically disabled and an interrupt is generated to inform the
1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         software about the failure (Clock Security System Interrupt, CSSI),
1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         allowing the MCU to perform rescue operations. The CSSI is linked to 
1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector.  
1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval None
ARM GAS  /tmp/ccQfjpF5.s 			page 43


1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_EnableCSS(void)
1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 1251              		.loc 1 1053 0
 1252              		.cfi_startproc
 1253              		@ args = 0, pretend = 0, frame = 0
 1254              		@ frame_needed = 0, uses_anonymous_args = 0
 1255              		@ link register save eliminated.
1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   SET_BIT(RCC->CR, RCC_CR_CSSON) ;
 1256              		.loc 1 1054 0
 1257 0000 034A     		ldr	r2, .L139
 1258 0002 1168     		ldr	r1, [r2]
 1259 0004 8023     		movs	r3, #128
 1260 0006 1B03     		lsls	r3, r3, #12
 1261 0008 0B43     		orrs	r3, r1
 1262 000a 1360     		str	r3, [r2]
1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1263              		.loc 1 1055 0
 1264              		@ sp needed
 1265 000c 7047     		bx	lr
 1266              	.L140:
 1267 000e C046     		.align	2
 1268              	.L139:
 1269 0010 00100240 		.word	1073876992
 1270              		.cfi_endproc
 1271              	.LFE44:
 1273              		.section	.text.HAL_RCC_DisableCSS,"ax",%progbits
 1274              		.align	1
 1275              		.global	HAL_RCC_DisableCSS
 1276              		.syntax unified
 1277              		.code	16
 1278              		.thumb_func
 1279              		.fpu softvfp
 1281              	HAL_RCC_DisableCSS:
 1282              	.LFB45:
1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Disables the Clock Security System.
1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval None
1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_DisableCSS(void)
1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 1283              		.loc 1 1062 0
 1284              		.cfi_startproc
 1285              		@ args = 0, pretend = 0, frame = 0
 1286              		@ frame_needed = 0, uses_anonymous_args = 0
 1287              		@ link register save eliminated.
1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   CLEAR_BIT(RCC->CR, RCC_CR_CSSON) ;
 1288              		.loc 1 1063 0
 1289 0000 024A     		ldr	r2, .L142
 1290 0002 1368     		ldr	r3, [r2]
 1291 0004 0249     		ldr	r1, .L142+4
 1292 0006 0B40     		ands	r3, r1
 1293 0008 1360     		str	r3, [r2]
1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1294              		.loc 1 1064 0
 1295              		@ sp needed
ARM GAS  /tmp/ccQfjpF5.s 			page 44


 1296 000a 7047     		bx	lr
 1297              	.L143:
 1298              		.align	2
 1299              	.L142:
 1300 000c 00100240 		.word	1073876992
 1301 0010 FFFFF7FF 		.word	-524289
 1302              		.cfi_endproc
 1303              	.LFE45:
 1305              		.global	__aeabi_uidiv
 1306              		.section	.text.HAL_RCC_GetSysClockFreq,"ax",%progbits
 1307              		.align	1
 1308              		.global	HAL_RCC_GetSysClockFreq
 1309              		.syntax unified
 1310              		.code	16
 1311              		.thumb_func
 1312              		.fpu softvfp
 1314              	HAL_RCC_GetSysClockFreq:
 1315              	.LFB46:
1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Returns the SYSCLK frequency     
1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   The system frequency computed by this function is not the real 
1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         frequency in the chip. It is calculated based on the predefined 
1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         constant and the selected clock source:
1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note     If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note     If SYSCLK source is HSE, function returns a value based on HSE_VALUE
1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *           divided by PREDIV factor(**)
1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note     If SYSCLK source is PLL, function returns a value based on HSE_VALUE
1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *           divided by PREDIV factor(**) or depending on STM32F0xxxx devices either a value based
1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *           on HSI_VALUE divided by 2 or HSI_VALUE divided by PREDIV factor(*) multiplied by the 
1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *           PLL factor.
1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note     (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *               8 MHz) but the real value may vary depending on the variations
1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *               in voltage and temperature.
1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note     (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *                8 MHz), user has to ensure that HSE_VALUE is same as the real
1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *                frequency of the crystal used. Otherwise, this function may
1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *                have wrong result.
1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *                  
1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   The result of this function could be not correct when using fractional
1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         value for HSE crystal.
1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *           
1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   This function can be used by the user application to compute the 
1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         baud-rate for the communication peripherals or configure other parameters.
1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *           
1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   Each time SYSCLK changes, this function must be called to update the
1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         right SYSCLK value. Otherwise, any configuration based on this function will be incorre
1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         
1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval SYSCLK frequency
1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void)
1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 1316              		.loc 1 1098 0
 1317              		.cfi_startproc
 1318              		@ args = 0, pretend = 0, frame = 32
 1319              		@ frame_needed = 0, uses_anonymous_args = 0
 1320 0000 30B5     		push	{r4, r5, lr}
ARM GAS  /tmp/ccQfjpF5.s 			page 45


 1321              	.LCFI5:
 1322              		.cfi_def_cfa_offset 12
 1323              		.cfi_offset 4, -12
 1324              		.cfi_offset 5, -8
 1325              		.cfi_offset 14, -4
 1326 0002 89B0     		sub	sp, sp, #36
 1327              	.LCFI6:
 1328              		.cfi_def_cfa_offset 48
1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   const uint8_t aPLLMULFactorTable[16] = { 2U,  3U,  4U,  5U,  6U,  7U,  8U,  9U,
 1329              		.loc 1 1099 0
 1330 0004 04AA     		add	r2, sp, #16
 1331 0006 1F4B     		ldr	r3, .L153
 1332 0008 1800     		movs	r0, r3
 1333 000a 32C8     		ldmia	r0!, {r1, r4, r5}
 1334 000c 32C2     		stmia	r2!, {r1, r4, r5}
 1335 000e 1100     		movs	r1, r2
 1336 0010 0268     		ldr	r2, [r0]
 1337 0012 0A60     		str	r2, [r1]
1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                                          10U, 11U, 12U, 13U, 14U, 15U, 16U, 16U};
1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   const uint8_t aPredivFactorTable[16] = { 1U, 2U,  3U,  4U,  5U,  6U,  7U,  8U,
 1338              		.loc 1 1101 0
 1339 0014 6A46     		mov	r2, sp
 1340 0016 1033     		adds	r3, r3, #16
 1341 0018 13CB     		ldmia	r3!, {r0, r1, r4}
 1342 001a 13C2     		stmia	r2!, {r0, r1, r4}
 1343 001c 1B68     		ldr	r3, [r3]
 1344 001e 1360     		str	r3, [r2]
 1345              	.LVL100:
1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                                            9U,10U, 11U, 12U, 13U, 14U, 15U, 16U};
1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   uint32_t sysclockfreq = 0U;
1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   tmpreg = RCC->CFGR;
 1346              		.loc 1 1107 0
 1347 0020 194B     		ldr	r3, .L153+4
 1348 0022 5A68     		ldr	r2, [r3, #4]
 1349              	.LVL101:
1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get SYSCLK source -------------------------------------------------------*/
1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   switch (tmpreg & RCC_CFGR_SWS)
 1350              		.loc 1 1110 0
 1351 0024 0C23     		movs	r3, #12
 1352 0026 1340     		ands	r3, r2
 1353 0028 082B     		cmp	r3, #8
 1354 002a 04D0     		beq	.L146
 1355 002c 0C2B     		cmp	r3, #12
 1356 002e 26D0     		beq	.L150
1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     case RCC_SYSCLKSOURCE_STATUS_HSE:  /* HSE used as system clock */
1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       sysclockfreq = HSE_VALUE;
 1357              		.loc 1 1114 0
 1358 0030 1648     		ldr	r0, .L153+8
 1359              	.LVL102:
 1360              	.L144:
1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       break;
ARM GAS  /tmp/ccQfjpF5.s 			page 46


1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     case RCC_SYSCLKSOURCE_STATUS_PLLCLK:  /* PLL used as system clock */
1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER
1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT
1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         pllclk = (uint32_t)((uint64_t) HSE_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_PLLSRC_HSI48_PREDIV)
1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48)
1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */
1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         pllclk = (uint32_t)((uint64_t) HSI48_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_PLLSRC_HSI48_PREDIV */
1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       else
1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if  (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) 
1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         pllclk = (uint32_t)((uint64_t) HSI_VALUE / (uint64_t) (prediv)) * ((uint64_t) pllmul);
1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else
1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****         pllclk = (uint32_t)((uint64_t) (HSI_VALUE >> 1U) * ((uint64_t) pllmul));
1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif
1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       sysclockfreq = pllclk;
1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       break;
1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_CFGR_SWS_HSI48)
1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     case RCC_SYSCLKSOURCE_STATUS_HSI48:    /* HSI48 used as system clock source */
1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       sysclockfreq = HSI48_VALUE;
1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       break;
1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_CFGR_SWS_HSI48 */
1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     case RCC_SYSCLKSOURCE_STATUS_HSI:  /* HSI used as system clock source */
1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     default: /* HSI used as system clock */
1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       sysclockfreq = HSI_VALUE;
1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       break;
1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   return sysclockfreq;
1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1361              		.loc 1 1161 0
 1362 0032 09B0     		add	sp, sp, #36
 1363              		@ sp needed
 1364 0034 30BD     		pop	{r4, r5, pc}
 1365              	.LVL103:
 1366              	.L146:
1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BIT
 1367              		.loc 1 1119 0
 1368 0036 910C     		lsrs	r1, r2, #18
 1369 0038 0F23     		movs	r3, #15
 1370 003a 1940     		ands	r1, r3
ARM GAS  /tmp/ccQfjpF5.s 			page 47


 1371 003c 04A8     		add	r0, sp, #16
 1372 003e 445C     		ldrb	r4, [r0, r1]
 1373              	.LVL104:
1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
 1374              		.loc 1 1120 0
 1375 0040 1149     		ldr	r1, .L153+4
 1376 0042 C96A     		ldr	r1, [r1, #44]
 1377 0044 0B40     		ands	r3, r1
 1378 0046 6946     		mov	r1, sp
 1379 0048 C95C     		ldrb	r1, [r1, r3]
 1380              	.LVL105:
1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 1381              		.loc 1 1121 0
 1382 004a C023     		movs	r3, #192
 1383 004c 5B02     		lsls	r3, r3, #9
 1384 004e 1A40     		ands	r2, r3
 1385              	.LVL106:
 1386 0050 8023     		movs	r3, #128
 1387 0052 5B02     		lsls	r3, r3, #9
 1388 0054 9A42     		cmp	r2, r3
 1389 0056 08D0     		beq	.L151
1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 1390              		.loc 1 1127 0
 1391 0058 C023     		movs	r3, #192
 1392 005a 5B02     		lsls	r3, r3, #9
 1393 005c 9A42     		cmp	r2, r3
 1394 005e 09D0     		beq	.L152
1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #else
 1395              		.loc 1 1137 0
 1396 0060 0A48     		ldr	r0, .L153+8
 1397 0062 FFF7FEFF 		bl	__aeabi_uidiv
 1398              	.LVL107:
 1399 0066 6043     		muls	r0, r4
 1400              	.LVL108:
 1401 0068 E3E7     		b	.L144
 1402              	.LVL109:
 1403              	.L151:
1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 1404              		.loc 1 1124 0
 1405 006a 0848     		ldr	r0, .L153+8
 1406 006c FFF7FEFF 		bl	__aeabi_uidiv
 1407              	.LVL110:
 1408 0070 6043     		muls	r0, r4
 1409              	.LVL111:
 1410 0072 DEE7     		b	.L144
 1411              	.LVL112:
 1412              	.L152:
1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 1413              		.loc 1 1130 0
 1414 0074 0648     		ldr	r0, .L153+12
 1415 0076 FFF7FEFF 		bl	__aeabi_uidiv
 1416              	.LVL113:
 1417 007a 6043     		muls	r0, r4
 1418              	.LVL114:
 1419 007c D9E7     		b	.L144
 1420              	.LVL115:
 1421              	.L150:
ARM GAS  /tmp/ccQfjpF5.s 			page 48


1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       break;
 1422              		.loc 1 1149 0
 1423 007e 0448     		ldr	r0, .L153+12
 1424              	.LVL116:
1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1425              		.loc 1 1160 0
 1426 0080 D7E7     		b	.L144
 1427              	.L154:
 1428 0082 C046     		.align	2
 1429              	.L153:
 1430 0084 00000000 		.word	.LANCHOR0
 1431 0088 00100240 		.word	1073876992
 1432 008c 00127A00 		.word	8000000
 1433 0090 006CDC02 		.word	48000000
 1434              		.cfi_endproc
 1435              	.LFE46:
 1437              		.section	.text.HAL_RCC_ClockConfig,"ax",%progbits
 1438              		.align	1
 1439              		.global	HAL_RCC_ClockConfig
 1440              		.syntax unified
 1441              		.code	16
 1442              		.thumb_func
 1443              		.fpu softvfp
 1445              	HAL_RCC_ClockConfig:
 1446              	.LFB42:
 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   uint32_t tickstart;
 1447              		.loc 1 780 0
 1448              		.cfi_startproc
 1449              		@ args = 0, pretend = 0, frame = 0
 1450              		@ frame_needed = 0, uses_anonymous_args = 0
 1451              	.LVL117:
 1452 0000 70B5     		push	{r4, r5, r6, lr}
 1453              	.LCFI7:
 1454              		.cfi_def_cfa_offset 16
 1455              		.cfi_offset 4, -16
 1456              		.cfi_offset 5, -12
 1457              		.cfi_offset 6, -8
 1458              		.cfi_offset 14, -4
 1459 0002 0400     		movs	r4, r0
 1460 0004 0D00     		movs	r5, r1
 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 1461              		.loc 1 784 0
 1462 0006 0028     		cmp	r0, #0
 1463 0008 00D1     		bne	.LCB1473
 1464 000a 89E0     		b	.L169	@long jump
 1465              	.LCB1473:
 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {    
 1466              		.loc 1 798 0
 1467 000c 464B     		ldr	r3, .L181
 1468 000e 1A68     		ldr	r2, [r3]
 1469 0010 0123     		movs	r3, #1
 1470 0012 1340     		ands	r3, r2
 1471 0014 8B42     		cmp	r3, r1
 1472 0016 0BD2     		bcs	.L157
 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 1473              		.loc 1 801 0
 1474 0018 4349     		ldr	r1, .L181
ARM GAS  /tmp/ccQfjpF5.s 			page 49


 1475              	.LVL118:
 1476 001a 0B68     		ldr	r3, [r1]
 1477 001c 0122     		movs	r2, #1
 1478 001e 9343     		bics	r3, r2
 1479 0020 2B43     		orrs	r3, r5
 1480 0022 0B60     		str	r3, [r1]
 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 1481              		.loc 1 805 0
 1482 0024 0B68     		ldr	r3, [r1]
 1483 0026 1A40     		ands	r2, r3
 1484 0028 AA42     		cmp	r2, r5
 1485 002a 01D0     		beq	.L157
 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 1486              		.loc 1 807 0
 1487 002c 0120     		movs	r0, #1
 1488              	.LVL119:
 1489 002e 78E0     		b	.L156
 1490              	.LVL120:
 1491              	.L157:
 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 1492              		.loc 1 812 0
 1493 0030 2368     		ldr	r3, [r4]
 1494 0032 9A07     		lsls	r2, r3, #30
 1495 0034 0ED5     		bpl	.L158
 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 1496              		.loc 1 816 0
 1497 0036 5B07     		lsls	r3, r3, #29
 1498 0038 05D5     		bpl	.L159
 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 1499              		.loc 1 818 0
 1500 003a 3C4A     		ldr	r2, .L181+4
 1501 003c 5168     		ldr	r1, [r2, #4]
 1502 003e E023     		movs	r3, #224
 1503 0040 DB00     		lsls	r3, r3, #3
 1504 0042 0B43     		orrs	r3, r1
 1505 0044 5360     		str	r3, [r2, #4]
 1506              	.L159:
 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1507              		.loc 1 823 0
 1508 0046 394A     		ldr	r2, .L181+4
 1509 0048 5368     		ldr	r3, [r2, #4]
 1510 004a F021     		movs	r1, #240
 1511 004c 8B43     		bics	r3, r1
 1512 004e A168     		ldr	r1, [r4, #8]
 1513 0050 0B43     		orrs	r3, r1
 1514 0052 5360     		str	r3, [r2, #4]
 1515              	.L158:
 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 1516              		.loc 1 827 0
 1517 0054 2368     		ldr	r3, [r4]
 1518 0056 DB07     		lsls	r3, r3, #31
 1519 0058 35D5     		bpl	.L160
 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 1520              		.loc 1 832 0
 1521 005a 6368     		ldr	r3, [r4, #4]
 1522 005c 012B     		cmp	r3, #1
 1523 005e 09D0     		beq	.L177
ARM GAS  /tmp/ccQfjpF5.s 			page 50


 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 1524              		.loc 1 841 0
 1525 0060 022B     		cmp	r3, #2
 1526 0062 24D0     		beq	.L178
 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 1527              		.loc 1 851 0
 1528 0064 032B     		cmp	r3, #3
 1529 0066 28D0     		beq	.L179
 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 1530              		.loc 1 864 0
 1531 0068 304A     		ldr	r2, .L181+4
 1532 006a 1268     		ldr	r2, [r2]
 1533 006c 9207     		lsls	r2, r2, #30
 1534 006e 05D4     		bmi	.L162
 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 1535              		.loc 1 866 0
 1536 0070 0120     		movs	r0, #1
 1537              	.LVL121:
 1538 0072 56E0     		b	.L156
 1539              	.LVL122:
 1540              	.L177:
 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 1541              		.loc 1 835 0
 1542 0074 2D4A     		ldr	r2, .L181+4
 1543 0076 1268     		ldr	r2, [r2]
 1544 0078 9203     		lsls	r2, r2, #14
 1545 007a 53D5     		bpl	.L180
 1546              	.L162:
 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 1547              		.loc 1 869 0
 1548 007c 2B49     		ldr	r1, .L181+4
 1549 007e 4A68     		ldr	r2, [r1, #4]
 1550 0080 0320     		movs	r0, #3
 1551              	.LVL123:
 1552 0082 8243     		bics	r2, r0
 1553 0084 1343     		orrs	r3, r2
 1554 0086 4B60     		str	r3, [r1, #4]
 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 1555              		.loc 1 872 0
 1556 0088 FFF7FEFF 		bl	HAL_GetTick
 1557              	.LVL124:
 1558 008c 0600     		movs	r6, r0
 1559              	.LVL125:
 1560              	.L165:
 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 1561              		.loc 1 874 0
 1562 008e 274B     		ldr	r3, .L181+4
 1563 0090 5B68     		ldr	r3, [r3, #4]
 1564 0092 0C22     		movs	r2, #12
 1565 0094 1A40     		ands	r2, r3
 1566 0096 6368     		ldr	r3, [r4, #4]
 1567 0098 9B00     		lsls	r3, r3, #2
 1568 009a 9A42     		cmp	r2, r3
 1569 009c 13D0     		beq	.L160
 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 1570              		.loc 1 876 0
 1571 009e FFF7FEFF 		bl	HAL_GetTick
ARM GAS  /tmp/ccQfjpF5.s 			page 51


 1572              	.LVL126:
 1573 00a2 801B     		subs	r0, r0, r6
 1574 00a4 224B     		ldr	r3, .L181+8
 1575 00a6 9842     		cmp	r0, r3
 1576 00a8 F1D9     		bls	.L165
 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 1577              		.loc 1 878 0
 1578 00aa 0320     		movs	r0, #3
 1579 00ac 39E0     		b	.L156
 1580              	.LVL127:
 1581              	.L178:
 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 1582              		.loc 1 844 0
 1583 00ae 1F4A     		ldr	r2, .L181+4
 1584 00b0 1268     		ldr	r2, [r2]
 1585 00b2 9201     		lsls	r2, r2, #6
 1586 00b4 E2D4     		bmi	.L162
 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 1587              		.loc 1 846 0
 1588 00b6 0120     		movs	r0, #1
 1589              	.LVL128:
 1590 00b8 33E0     		b	.L156
 1591              	.LVL129:
 1592              	.L179:
 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       {
 1593              		.loc 1 854 0
 1594 00ba 1C4A     		ldr	r2, .L181+4
 1595 00bc 526B     		ldr	r2, [r2, #52]
 1596 00be D203     		lsls	r2, r2, #15
 1597 00c0 DCD4     		bmi	.L162
 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 1598              		.loc 1 856 0
 1599 00c2 0120     		movs	r0, #1
 1600              	.LVL130:
 1601 00c4 2DE0     		b	.L156
 1602              	.L160:
 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {    
 1603              		.loc 1 884 0
 1604 00c6 184B     		ldr	r3, .L181
 1605 00c8 1A68     		ldr	r2, [r3]
 1606 00ca 0123     		movs	r3, #1
 1607 00cc 1340     		ands	r3, r2
 1608 00ce AB42     		cmp	r3, r5
 1609 00d0 0BD9     		bls	.L167
 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 1610              		.loc 1 887 0
 1611 00d2 1549     		ldr	r1, .L181
 1612 00d4 0B68     		ldr	r3, [r1]
 1613 00d6 0122     		movs	r2, #1
 1614 00d8 9343     		bics	r3, r2
 1615 00da 2B43     		orrs	r3, r5
 1616 00dc 0B60     		str	r3, [r1]
 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     {
 1617              		.loc 1 891 0
 1618 00de 0B68     		ldr	r3, [r1]
 1619 00e0 1A40     		ands	r2, r3
 1620 00e2 AA42     		cmp	r2, r5
ARM GAS  /tmp/ccQfjpF5.s 			page 52


 1621 00e4 01D0     		beq	.L167
 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     }
 1622              		.loc 1 893 0
 1623 00e6 0120     		movs	r0, #1
 1624 00e8 1BE0     		b	.L156
 1625              	.L167:
 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 1626              		.loc 1 898 0
 1627 00ea 2368     		ldr	r3, [r4]
 1628 00ec 5B07     		lsls	r3, r3, #29
 1629 00ee 06D5     		bpl	.L168
 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1630              		.loc 1 901 0
 1631 00f0 0E4A     		ldr	r2, .L181+4
 1632 00f2 5368     		ldr	r3, [r2, #4]
 1633 00f4 0F49     		ldr	r1, .L181+12
 1634 00f6 0B40     		ands	r3, r1
 1635 00f8 E168     		ldr	r1, [r4, #12]
 1636 00fa 0B43     		orrs	r3, r1
 1637 00fc 5360     		str	r3, [r2, #4]
 1638              	.L168:
 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 1639              		.loc 1 905 0
 1640 00fe FFF7FEFF 		bl	HAL_RCC_GetSysClockFreq
 1641              	.LVL131:
 1642 0102 0A4B     		ldr	r3, .L181+4
 1643 0104 5A68     		ldr	r2, [r3, #4]
 1644 0106 1209     		lsrs	r2, r2, #4
 1645 0108 0F23     		movs	r3, #15
 1646 010a 1340     		ands	r3, r2
 1647 010c 0A4A     		ldr	r2, .L181+16
 1648 010e D35C     		ldrb	r3, [r2, r3]
 1649 0110 D840     		lsrs	r0, r0, r3
 1650 0112 0A4B     		ldr	r3, .L181+20
 1651 0114 1860     		str	r0, [r3]
 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
 1652              		.loc 1 908 0
 1653 0116 0020     		movs	r0, #0
 1654 0118 FFF7FEFF 		bl	HAL_InitTick
 1655              	.LVL132:
 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1656              		.loc 1 910 0
 1657 011c 0020     		movs	r0, #0
 1658 011e 00E0     		b	.L156
 1659              	.LVL133:
 1660              	.L169:
 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1661              		.loc 1 786 0
 1662 0120 0120     		movs	r0, #1
 1663              	.LVL134:
 1664              	.L156:
 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 1665              		.loc 1 911 0
 1666              		@ sp needed
 1667              	.LVL135:
 1668              	.LVL136:
 1669 0122 70BD     		pop	{r4, r5, r6, pc}
ARM GAS  /tmp/ccQfjpF5.s 			page 53


 1670              	.LVL137:
 1671              	.L180:
 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****       }
 1672              		.loc 1 837 0
 1673 0124 0120     		movs	r0, #1
 1674              	.LVL138:
 1675 0126 FCE7     		b	.L156
 1676              	.L182:
 1677              		.align	2
 1678              	.L181:
 1679 0128 00200240 		.word	1073881088
 1680 012c 00100240 		.word	1073876992
 1681 0130 88130000 		.word	5000
 1682 0134 FFF8FFFF 		.word	-1793
 1683 0138 00000000 		.word	AHBPrescTable
 1684 013c 00000000 		.word	SystemCoreClock
 1685              		.cfi_endproc
 1686              	.LFE42:
 1688              		.section	.text.HAL_RCC_GetHCLKFreq,"ax",%progbits
 1689              		.align	1
 1690              		.global	HAL_RCC_GetHCLKFreq
 1691              		.syntax unified
 1692              		.code	16
 1693              		.thumb_func
 1694              		.fpu softvfp
 1696              	HAL_RCC_GetHCLKFreq:
 1697              	.LFB47:
1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Returns the HCLK frequency     
1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   Each time HCLK changes, this function must be called to update the
1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         right HCLK value. Otherwise, any configuration based on this function will be incorrect
1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * 
1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   The SystemCoreClock CMSIS variable is used to store System Clock Frequency 
1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         and updated within this function
1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval HCLK frequency
1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetHCLKFreq(void)
1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 1698              		.loc 1 1173 0
 1699              		.cfi_startproc
 1700              		@ args = 0, pretend = 0, frame = 0
 1701              		@ frame_needed = 0, uses_anonymous_args = 0
 1702              		@ link register save eliminated.
1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   return SystemCoreClock;
 1703              		.loc 1 1174 0
 1704 0000 014B     		ldr	r3, .L184
 1705 0002 1868     		ldr	r0, [r3]
1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1706              		.loc 1 1175 0
 1707              		@ sp needed
 1708 0004 7047     		bx	lr
 1709              	.L185:
 1710 0006 C046     		.align	2
 1711              	.L184:
 1712 0008 00000000 		.word	SystemCoreClock
 1713              		.cfi_endproc
ARM GAS  /tmp/ccQfjpF5.s 			page 54


 1714              	.LFE47:
 1716              		.section	.text.HAL_RCC_GetPCLK1Freq,"ax",%progbits
 1717              		.align	1
 1718              		.global	HAL_RCC_GetPCLK1Freq
 1719              		.syntax unified
 1720              		.code	16
 1721              		.thumb_func
 1722              		.fpu softvfp
 1724              	HAL_RCC_GetPCLK1Freq:
 1725              	.LFB48:
1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Returns the PCLK1 frequency     
1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note   Each time PCLK1 changes, this function must be called to update the
1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *         right PCLK1 value. Otherwise, any configuration based on this function will be incorrec
1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval PCLK1 frequency
1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** uint32_t HAL_RCC_GetPCLK1Freq(void)
1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 1726              		.loc 1 1184 0
 1727              		.cfi_startproc
 1728              		@ args = 0, pretend = 0, frame = 0
 1729              		@ frame_needed = 0, uses_anonymous_args = 0
 1730 0000 10B5     		push	{r4, lr}
 1731              	.LCFI8:
 1732              		.cfi_def_cfa_offset 8
 1733              		.cfi_offset 4, -8
 1734              		.cfi_offset 14, -4
1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_BITNU
 1735              		.loc 1 1186 0
 1736 0002 FFF7FEFF 		bl	HAL_RCC_GetHCLKFreq
 1737              	.LVL139:
 1738 0006 044B     		ldr	r3, .L187
 1739 0008 5A68     		ldr	r2, [r3, #4]
 1740 000a 120A     		lsrs	r2, r2, #8
 1741 000c 0723     		movs	r3, #7
 1742 000e 1340     		ands	r3, r2
 1743 0010 024A     		ldr	r2, .L187+4
 1744 0012 D35C     		ldrb	r3, [r2, r3]
 1745 0014 D840     		lsrs	r0, r0, r3
1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }    
 1746              		.loc 1 1187 0
 1747              		@ sp needed
 1748 0016 10BD     		pop	{r4, pc}
 1749              	.L188:
 1750              		.align	2
 1751              	.L187:
 1752 0018 00100240 		.word	1073876992
 1753 001c 00000000 		.word	APBPrescTable
 1754              		.cfi_endproc
 1755              	.LFE48:
 1757              		.section	.text.HAL_RCC_GetOscConfig,"ax",%progbits
 1758              		.align	1
 1759              		.global	HAL_RCC_GetOscConfig
 1760              		.syntax unified
 1761              		.code	16
ARM GAS  /tmp/ccQfjpF5.s 			page 55


 1762              		.thumb_func
 1763              		.fpu softvfp
 1765              	HAL_RCC_GetOscConfig:
 1766              	.LFB49:
1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Configures the RCC_OscInitStruct according to the internal 
1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * RCC configuration registers.
1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_OscInitStruct pointer to an RCC_OscInitTypeDef structure that 
1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * will be configured.
1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval None
1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef  *RCC_OscInitStruct)
1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 1767              		.loc 1 1197 0
 1768              		.cfi_startproc
 1769              		@ args = 0, pretend = 0, frame = 0
 1770              		@ frame_needed = 0, uses_anonymous_args = 0
 1771              		@ link register save eliminated.
 1772              	.LVL140:
1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check the parameters */
1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(RCC_OscInitStruct != NULL);
1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Set all possible values for the Oscillator type parameter ---------------*/
1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI  \
1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****                   | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI14;
1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_OscInitStruct->OscillatorType |= RCC_OSCILLATORTYPE_HSI48;
 1773              		.loc 1 1205 0
 1774 0000 3F23     		movs	r3, #63
 1775 0002 0360     		str	r3, [r0]
1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the HSE configuration -----------------------------------------------*/
1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
 1776              		.loc 1 1210 0
 1777 0004 324B     		ldr	r3, .L205
 1778 0006 1B68     		ldr	r3, [r3]
 1779 0008 5B03     		lsls	r3, r3, #13
 1780 000a 40D5     		bpl	.L190
1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
 1781              		.loc 1 1212 0
 1782 000c 0523     		movs	r3, #5
 1783 000e 4360     		str	r3, [r0, #4]
 1784              	.L191:
1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_ON;
1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   else
1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
ARM GAS  /tmp/ccQfjpF5.s 			page 56


1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the HSI configuration -----------------------------------------------*/
1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
 1785              		.loc 1 1224 0
 1786 0010 2F4B     		ldr	r3, .L205
 1787 0012 1B68     		ldr	r3, [r3]
 1788 0014 DB07     		lsls	r3, r3, #31
 1789 0016 44D5     		bpl	.L193
1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->HSIState = RCC_HSI_ON;
 1790              		.loc 1 1226 0
 1791 0018 0123     		movs	r3, #1
 1792 001a C360     		str	r3, [r0, #12]
 1793              	.L194:
1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   else
1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_B
 1794              		.loc 1 1233 0
 1795 001c 2C49     		ldr	r1, .L205
 1796 001e 0A68     		ldr	r2, [r1]
 1797 0020 D208     		lsrs	r2, r2, #3
 1798 0022 1F23     		movs	r3, #31
 1799 0024 1340     		ands	r3, r2
 1800 0026 0361     		str	r3, [r0, #16]
1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the LSE configuration -----------------------------------------------*/
1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
 1801              		.loc 1 1236 0
 1802 0028 0B6A     		ldr	r3, [r1, #32]
 1803 002a 5B07     		lsls	r3, r3, #29
 1804 002c 3CD5     		bpl	.L195
1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
 1805              		.loc 1 1238 0
 1806 002e 0523     		movs	r3, #5
 1807 0030 8360     		str	r3, [r0, #8]
 1808              	.L196:
1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_ON;
1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   else
1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the LSI configuration -----------------------------------------------*/
1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
 1809              		.loc 1 1250 0
 1810 0032 274B     		ldr	r3, .L205
 1811 0034 5B6A     		ldr	r3, [r3, #36]
 1812 0036 DB07     		lsls	r3, r3, #31
 1813 0038 40D5     		bpl	.L198
ARM GAS  /tmp/ccQfjpF5.s 			page 57


1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->LSIState = RCC_LSI_ON;
 1814              		.loc 1 1252 0
 1815 003a 0123     		movs	r3, #1
 1816 003c C361     		str	r3, [r0, #28]
 1817              	.L199:
1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   else
1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the HSI14 configuration -----------------------------------------------*/
1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if((RCC->CR2 & RCC_CR2_HSI14ON) == RCC_CR2_HSI14ON)
 1818              		.loc 1 1260 0
 1819 003e 244B     		ldr	r3, .L205
 1820 0040 5B6B     		ldr	r3, [r3, #52]
 1821 0042 DB07     		lsls	r3, r3, #31
 1822 0044 3DD5     		bpl	.L200
1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->HSI14State = RCC_HSI_ON;
 1823              		.loc 1 1262 0
 1824 0046 0123     		movs	r3, #1
 1825 0048 4361     		str	r3, [r0, #20]
 1826              	.L201:
1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   else
1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->HSI14State = RCC_HSI_OFF;
1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_OscInitStruct->HSI14CalibrationValue = (uint32_t)((RCC->CR2 & RCC_CR2_HSI14TRIM) >> RCC_HSI14
 1827              		.loc 1 1269 0
 1828 004a 214A     		ldr	r2, .L205
 1829 004c 516B     		ldr	r1, [r2, #52]
 1830 004e C908     		lsrs	r1, r1, #3
 1831 0050 1F23     		movs	r3, #31
 1832 0052 0B40     		ands	r3, r1
 1833 0054 8361     		str	r3, [r0, #24]
1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #if defined(RCC_HSI48_SUPPORT)
1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the HSI48 configuration if any-----------------------------------------*/
1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_OscInitStruct->HSI48State = __HAL_RCC_GET_HSI48_STATE();
 1834              		.loc 1 1273 0
 1835 0056 536B     		ldr	r3, [r2, #52]
 1836 0058 8021     		movs	r1, #128
 1837 005a 4902     		lsls	r1, r1, #9
 1838 005c 0B40     		ands	r3, r1
 1839 005e 591E     		subs	r1, r3, #1
 1840 0060 8B41     		sbcs	r3, r3, r1
 1841 0062 0362     		str	r3, [r0, #32]
1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** #endif /* RCC_HSI48_SUPPORT */
1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the PLL configuration -----------------------------------------------*/
1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
 1842              		.loc 1 1277 0
 1843 0064 1368     		ldr	r3, [r2]
ARM GAS  /tmp/ccQfjpF5.s 			page 58


 1844 0066 DB01     		lsls	r3, r3, #7
 1845 0068 2ED4     		bmi	.L204
1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   else
1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
 1846              		.loc 1 1283 0
 1847 006a 0123     		movs	r3, #1
 1848 006c 4362     		str	r3, [r0, #36]
 1849              	.L203:
1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
 1850              		.loc 1 1285 0
 1851 006e 184B     		ldr	r3, .L205
 1852 0070 5A68     		ldr	r2, [r3, #4]
 1853 0072 C021     		movs	r1, #192
 1854 0074 4902     		lsls	r1, r1, #9
 1855 0076 0A40     		ands	r2, r1
 1856 0078 8262     		str	r2, [r0, #40]
1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL);
 1857              		.loc 1 1286 0
 1858 007a 5A68     		ldr	r2, [r3, #4]
 1859 007c F021     		movs	r1, #240
 1860 007e 8903     		lsls	r1, r1, #14
 1861 0080 0A40     		ands	r2, r1
 1862 0082 C262     		str	r2, [r0, #44]
1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV);
 1863              		.loc 1 1287 0
 1864 0084 DA6A     		ldr	r2, [r3, #44]
 1865 0086 0F23     		movs	r3, #15
 1866 0088 1340     		ands	r3, r2
 1867 008a 0363     		str	r3, [r0, #48]
1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1868              		.loc 1 1288 0
 1869              		@ sp needed
 1870 008c 7047     		bx	lr
 1871              	.L190:
1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 1872              		.loc 1 1214 0
 1873 008e 104B     		ldr	r3, .L205
 1874 0090 1B68     		ldr	r3, [r3]
 1875 0092 DB03     		lsls	r3, r3, #15
 1876 0094 02D5     		bpl	.L192
1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1877              		.loc 1 1216 0
 1878 0096 0123     		movs	r3, #1
 1879 0098 4360     		str	r3, [r0, #4]
 1880 009a B9E7     		b	.L191
 1881              	.L192:
1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1882              		.loc 1 1220 0
 1883 009c 0023     		movs	r3, #0
 1884 009e 4360     		str	r3, [r0, #4]
 1885 00a0 B6E7     		b	.L191
 1886              	.L193:
ARM GAS  /tmp/ccQfjpF5.s 			page 59


1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1887              		.loc 1 1230 0
 1888 00a2 0023     		movs	r3, #0
 1889 00a4 C360     		str	r3, [r0, #12]
 1890 00a6 B9E7     		b	.L194
 1891              	.L195:
1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 1892              		.loc 1 1240 0
 1893 00a8 094B     		ldr	r3, .L205
 1894 00aa 1B6A     		ldr	r3, [r3, #32]
 1895 00ac DB07     		lsls	r3, r3, #31
 1896 00ae 02D5     		bpl	.L197
1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1897              		.loc 1 1242 0
 1898 00b0 0123     		movs	r3, #1
 1899 00b2 8360     		str	r3, [r0, #8]
 1900 00b4 BDE7     		b	.L196
 1901              	.L197:
1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1902              		.loc 1 1246 0
 1903 00b6 0023     		movs	r3, #0
 1904 00b8 8360     		str	r3, [r0, #8]
 1905 00ba BAE7     		b	.L196
 1906              	.L198:
1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1907              		.loc 1 1256 0
 1908 00bc 0023     		movs	r3, #0
 1909 00be C361     		str	r3, [r0, #28]
 1910 00c0 BDE7     		b	.L199
 1911              	.L200:
1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1912              		.loc 1 1266 0
 1913 00c2 0023     		movs	r3, #0
 1914 00c4 4361     		str	r3, [r0, #20]
 1915 00c6 C0E7     		b	.L201
 1916              	.L204:
1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 1917              		.loc 1 1279 0
 1918 00c8 0223     		movs	r3, #2
 1919 00ca 4362     		str	r3, [r0, #36]
 1920 00cc CFE7     		b	.L203
 1921              	.L206:
 1922 00ce C046     		.align	2
 1923              	.L205:
 1924 00d0 00100240 		.word	1073876992
 1925              		.cfi_endproc
 1926              	.LFE49:
 1928              		.section	.text.HAL_RCC_GetClockConfig,"ax",%progbits
 1929              		.align	1
 1930              		.global	HAL_RCC_GetClockConfig
 1931              		.syntax unified
 1932              		.code	16
 1933              		.thumb_func
 1934              		.fpu softvfp
 1936              	HAL_RCC_GetClockConfig:
 1937              	.LFB50:
1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
ARM GAS  /tmp/ccQfjpF5.s 			page 60


1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  Get the RCC_ClkInitStruct according to the internal 
1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * RCC configuration registers.
1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  RCC_ClkInitStruct pointer to an RCC_ClkInitTypeDef structure that 
1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * contains the current clock configuration.
1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @param  pFLatency Pointer on the Flash Latency.
1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval None
1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef  *RCC_ClkInitStruct, uint32_t *pFLatency)
1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 1938              		.loc 1 1299 0
 1939              		.cfi_startproc
 1940              		@ args = 0, pretend = 0, frame = 0
 1941              		@ frame_needed = 0, uses_anonymous_args = 0
 1942              	.LVL141:
 1943 0000 10B5     		push	{r4, lr}
 1944              	.LCFI9:
 1945              		.cfi_def_cfa_offset 8
 1946              		.cfi_offset 4, -8
 1947              		.cfi_offset 14, -4
1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check the parameters */
1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(RCC_ClkInitStruct != NULL);
1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   assert_param(pFLatency != NULL);
1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Set all possible values for the Clock type parameter --------------------*/
1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1;
 1948              		.loc 1 1305 0
 1949 0002 0723     		movs	r3, #7
 1950 0004 0360     		str	r3, [r0]
1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the SYSCLK configuration --------------------------------------------*/ 
1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
 1951              		.loc 1 1308 0
 1952 0006 0A4B     		ldr	r3, .L208
 1953 0008 5C68     		ldr	r4, [r3, #4]
 1954 000a 0322     		movs	r2, #3
 1955 000c 2240     		ands	r2, r4
 1956 000e 4260     		str	r2, [r0, #4]
1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the HCLK configuration ----------------------------------------------*/ 
1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 
 1957              		.loc 1 1311 0
 1958 0010 5C68     		ldr	r4, [r3, #4]
 1959 0012 F022     		movs	r2, #240
 1960 0014 2240     		ands	r2, r4
 1961 0016 8260     		str	r2, [r0, #8]
1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   
1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the APB1 configuration ----------------------------------------------*/ 
1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE);   
 1962              		.loc 1 1314 0
 1963 0018 5B68     		ldr	r3, [r3, #4]
 1964 001a E022     		movs	r2, #224
 1965 001c D200     		lsls	r2, r2, #3
 1966 001e 1340     		ands	r3, r2
 1967 0020 C360     		str	r3, [r0, #12]
1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Get the Flash Wait State (Latency) configuration ------------------------*/   
1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   *pFLatency = __HAL_FLASH_GET_LATENCY(); 
ARM GAS  /tmp/ccQfjpF5.s 			page 61


 1968              		.loc 1 1316 0
 1969 0022 044B     		ldr	r3, .L208+4
 1970 0024 1A68     		ldr	r2, [r3]
 1971 0026 0123     		movs	r3, #1
 1972 0028 1340     		ands	r3, r2
 1973 002a 0B60     		str	r3, [r1]
1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 1974              		.loc 1 1317 0
 1975              		@ sp needed
 1976 002c 10BD     		pop	{r4, pc}
 1977              	.L209:
 1978 002e C046     		.align	2
 1979              	.L208:
 1980 0030 00100240 		.word	1073876992
 1981 0034 00200240 		.word	1073881088
 1982              		.cfi_endproc
 1983              	.LFE50:
 1985              		.section	.text.HAL_RCC_CSSCallback,"ax",%progbits
 1986              		.align	1
 1987              		.weak	HAL_RCC_CSSCallback
 1988              		.syntax unified
 1989              		.code	16
 1990              		.thumb_func
 1991              		.fpu softvfp
 1993              	HAL_RCC_CSSCallback:
 1994              	.LFB52:
1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief This function handles the RCC CSS interrupt request.
1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @note This API should be called under the NMI_Handler().
1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval None
1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** void HAL_RCC_NMI_IRQHandler(void)
1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check RCC CSSF flag  */
1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   if(__HAL_RCC_GET_IT(RCC_IT_CSS))
1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* RCC Clock Security System interrupt user callback */
1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     HAL_RCC_CSSCallback();
1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     /* Clear RCC CSS pending bit */
1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** /**
1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @brief  RCC Clock Security System interrupt callback
1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   * @retval none
1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   */
1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** __weak void HAL_RCC_CSSCallback(void)
1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** {
 1995              		.loc 1 1342 0
 1996              		.cfi_startproc
 1997              		@ args = 0, pretend = 0, frame = 0
 1998              		@ frame_needed = 0, uses_anonymous_args = 0
 1999              		@ link register save eliminated.
1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* NOTE : This function Should not be modified, when the callback is needed,
ARM GAS  /tmp/ccQfjpF5.s 			page 62


1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     the HAL_RCC_CSSCallback could be implemented in the user file
1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     */ 
1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** }
 2000              		.loc 1 1346 0
 2001              		@ sp needed
 2002 0000 7047     		bx	lr
 2003              		.cfi_endproc
 2004              	.LFE52:
 2006              		.section	.text.HAL_RCC_NMI_IRQHandler,"ax",%progbits
 2007              		.align	1
 2008              		.global	HAL_RCC_NMI_IRQHandler
 2009              		.syntax unified
 2010              		.code	16
 2011              		.thumb_func
 2012              		.fpu softvfp
 2014              	HAL_RCC_NMI_IRQHandler:
 2015              	.LFB51:
1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   /* Check RCC CSSF flag  */
 2016              		.loc 1 1325 0
 2017              		.cfi_startproc
 2018              		@ args = 0, pretend = 0, frame = 0
 2019              		@ frame_needed = 0, uses_anonymous_args = 0
 2020 0000 10B5     		push	{r4, lr}
 2021              	.LCFI10:
 2022              		.cfi_def_cfa_offset 8
 2023              		.cfi_offset 4, -8
 2024              		.cfi_offset 14, -4
1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   {
 2025              		.loc 1 1327 0
 2026 0002 054B     		ldr	r3, .L214
 2027 0004 9B68     		ldr	r3, [r3, #8]
 2028 0006 1B06     		lsls	r3, r3, #24
 2029 0008 00D4     		bmi	.L213
 2030              	.L211:
1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 2031              		.loc 1 1335 0
 2032              		@ sp needed
 2033 000a 10BD     		pop	{r4, pc}
 2034              	.L213:
1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****     
 2035              		.loc 1 1330 0
 2036 000c FFF7FEFF 		bl	HAL_RCC_CSSCallback
 2037              	.LVL142:
1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c ****   }
 2038              		.loc 1 1333 0
 2039 0010 024B     		ldr	r3, .L214+4
 2040 0012 8022     		movs	r2, #128
 2041 0014 1A70     		strb	r2, [r3]
1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc.c **** 
 2042              		.loc 1 1335 0
 2043 0016 F8E7     		b	.L211
 2044              	.L215:
 2045              		.align	2
 2046              	.L214:
 2047 0018 00100240 		.word	1073876992
 2048 001c 0A100240 		.word	1073877002
 2049              		.cfi_endproc
ARM GAS  /tmp/ccQfjpF5.s 			page 63


 2050              	.LFE51:
 2052              		.section	.rodata
 2053              		.align	2
 2054              		.set	.LANCHOR0,. + 0
 2055              	.LC0:
 2056 0000 02       		.byte	2
 2057 0001 03       		.byte	3
 2058 0002 04       		.byte	4
 2059 0003 05       		.byte	5
 2060 0004 06       		.byte	6
 2061 0005 07       		.byte	7
 2062 0006 08       		.byte	8
 2063 0007 09       		.byte	9
 2064 0008 0A       		.byte	10
 2065 0009 0B       		.byte	11
 2066 000a 0C       		.byte	12
 2067 000b 0D       		.byte	13
 2068 000c 0E       		.byte	14
 2069 000d 0F       		.byte	15
 2070 000e 10       		.byte	16
 2071 000f 10       		.byte	16
 2072              	.LC1:
 2073 0010 01       		.byte	1
 2074 0011 02       		.byte	2
 2075 0012 03       		.byte	3
 2076 0013 04       		.byte	4
 2077 0014 05       		.byte	5
 2078 0015 06       		.byte	6
 2079 0016 07       		.byte	7
 2080 0017 08       		.byte	8
 2081 0018 09       		.byte	9
 2082 0019 0A       		.byte	10
 2083 001a 0B       		.byte	11
 2084 001b 0C       		.byte	12
 2085 001c 0D       		.byte	13
 2086 001d 0E       		.byte	14
 2087 001e 0F       		.byte	15
 2088 001f 10       		.byte	16
 2089              		.text
 2090              	.Letext0:
 2091              		.file 2 "/usr/include/newlib/machine/_default_types.h"
 2092              		.file 3 "/usr/include/newlib/sys/_stdint.h"
 2093              		.file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h"
 2094              		.file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h"
 2095              		.file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h"
 2096              		.file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h"
 2097              		.file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h"
 2098              		.file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_gpio.h"
 2099              		.file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h"
ARM GAS  /tmp/ccQfjpF5.s 			page 64


DEFINED SYMBOLS
                            *ABS*:0000000000000000 stm32f0xx_hal_rcc.c
     /tmp/ccQfjpF5.s:16     .text.HAL_RCC_DeInit:0000000000000000 $t
     /tmp/ccQfjpF5.s:23     .text.HAL_RCC_DeInit:0000000000000000 HAL_RCC_DeInit
     /tmp/ccQfjpF5.s:166    .text.HAL_RCC_DeInit:00000000000000ac $d
     /tmp/ccQfjpF5.s:178    .text.HAL_RCC_OscConfig:0000000000000000 $t
     /tmp/ccQfjpF5.s:185    .text.HAL_RCC_OscConfig:0000000000000000 HAL_RCC_OscConfig
     /tmp/ccQfjpF5.s:719    .text.HAL_RCC_OscConfig:00000000000002e0 $d
     /tmp/ccQfjpF5.s:726    .text.HAL_RCC_OscConfig:00000000000002f4 $t
     /tmp/ccQfjpF5.s:1148   .text.HAL_RCC_OscConfig:000000000000052c $d
     /tmp/ccQfjpF5.s:1157   .text.HAL_RCC_MCOConfig:0000000000000000 $t
     /tmp/ccQfjpF5.s:1164   .text.HAL_RCC_MCOConfig:0000000000000000 HAL_RCC_MCOConfig
     /tmp/ccQfjpF5.s:1236   .text.HAL_RCC_MCOConfig:000000000000004c $d
     /tmp/ccQfjpF5.s:1242   .text.HAL_RCC_EnableCSS:0000000000000000 $t
     /tmp/ccQfjpF5.s:1249   .text.HAL_RCC_EnableCSS:0000000000000000 HAL_RCC_EnableCSS
     /tmp/ccQfjpF5.s:1269   .text.HAL_RCC_EnableCSS:0000000000000010 $d
     /tmp/ccQfjpF5.s:1274   .text.HAL_RCC_DisableCSS:0000000000000000 $t
     /tmp/ccQfjpF5.s:1281   .text.HAL_RCC_DisableCSS:0000000000000000 HAL_RCC_DisableCSS
     /tmp/ccQfjpF5.s:1300   .text.HAL_RCC_DisableCSS:000000000000000c $d
     /tmp/ccQfjpF5.s:1307   .text.HAL_RCC_GetSysClockFreq:0000000000000000 $t
     /tmp/ccQfjpF5.s:1314   .text.HAL_RCC_GetSysClockFreq:0000000000000000 HAL_RCC_GetSysClockFreq
     /tmp/ccQfjpF5.s:1430   .text.HAL_RCC_GetSysClockFreq:0000000000000084 $d
     /tmp/ccQfjpF5.s:1438   .text.HAL_RCC_ClockConfig:0000000000000000 $t
     /tmp/ccQfjpF5.s:1445   .text.HAL_RCC_ClockConfig:0000000000000000 HAL_RCC_ClockConfig
     /tmp/ccQfjpF5.s:1679   .text.HAL_RCC_ClockConfig:0000000000000128 $d
     /tmp/ccQfjpF5.s:1689   .text.HAL_RCC_GetHCLKFreq:0000000000000000 $t
     /tmp/ccQfjpF5.s:1696   .text.HAL_RCC_GetHCLKFreq:0000000000000000 HAL_RCC_GetHCLKFreq
     /tmp/ccQfjpF5.s:1712   .text.HAL_RCC_GetHCLKFreq:0000000000000008 $d
     /tmp/ccQfjpF5.s:1717   .text.HAL_RCC_GetPCLK1Freq:0000000000000000 $t
     /tmp/ccQfjpF5.s:1724   .text.HAL_RCC_GetPCLK1Freq:0000000000000000 HAL_RCC_GetPCLK1Freq
     /tmp/ccQfjpF5.s:1752   .text.HAL_RCC_GetPCLK1Freq:0000000000000018 $d
     /tmp/ccQfjpF5.s:1758   .text.HAL_RCC_GetOscConfig:0000000000000000 $t
     /tmp/ccQfjpF5.s:1765   .text.HAL_RCC_GetOscConfig:0000000000000000 HAL_RCC_GetOscConfig
     /tmp/ccQfjpF5.s:1924   .text.HAL_RCC_GetOscConfig:00000000000000d0 $d
     /tmp/ccQfjpF5.s:1929   .text.HAL_RCC_GetClockConfig:0000000000000000 $t
     /tmp/ccQfjpF5.s:1936   .text.HAL_RCC_GetClockConfig:0000000000000000 HAL_RCC_GetClockConfig
     /tmp/ccQfjpF5.s:1980   .text.HAL_RCC_GetClockConfig:0000000000000030 $d
     /tmp/ccQfjpF5.s:1986   .text.HAL_RCC_CSSCallback:0000000000000000 $t
     /tmp/ccQfjpF5.s:1993   .text.HAL_RCC_CSSCallback:0000000000000000 HAL_RCC_CSSCallback
     /tmp/ccQfjpF5.s:2007   .text.HAL_RCC_NMI_IRQHandler:0000000000000000 $t
     /tmp/ccQfjpF5.s:2014   .text.HAL_RCC_NMI_IRQHandler:0000000000000000 HAL_RCC_NMI_IRQHandler
     /tmp/ccQfjpF5.s:2047   .text.HAL_RCC_NMI_IRQHandler:0000000000000018 $d
     /tmp/ccQfjpF5.s:2053   .rodata:0000000000000000 $d

UNDEFINED SYMBOLS
HAL_GetTick
HAL_InitTick
SystemCoreClock
uwTickPrio
HAL_GPIO_Init
__aeabi_uidiv
AHBPrescTable
APBPrescTable