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ARM GAS /tmp/ccYdhGWl.s page 1
1 .cpu cortex-m0
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 0
10 .eabi_attribute 18, 4
11 .file "stm32f0xx_hal_rcc_ex.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_RCCEx_PeriphCLKConfig,"ax",%progbits
16 .align 1
17 .global HAL_RCCEx_PeriphCLKConfig
18 .syntax unified
19 .code 16
20 .thumb_func
21 .fpu softvfp
23 HAL_RCCEx_PeriphCLKConfig:
24 .LFB40:
25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c"
1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ******************************************************************************
3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @file stm32f0xx_hal_rcc_ex.c
4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @author MCD Application Team
5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended RCC HAL module driver.
6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * functionalities RCC extension peripheral:
8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + Extended Peripheral Control functions
9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * + Extended Clock Recovery System Control functions
10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** *
11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ******************************************************************************
12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @attention
13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** *
14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * <h2><center>© Copyright (c) 2016 STMicroelectronics.
15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * All rights reserved.</center></h2>
16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** *
17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This software component is licensed by ST under BSD 3-Clause license,
18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the "License"; You may not use this file except in compliance with the
19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * License. You may obtain a copy of the License at:
20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * opensource.org/licenses/BSD-3-Clause
21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** *
22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ******************************************************************************
23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Includes ------------------------------------------------------------------*/
26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #include "stm32f0xx_hal.h"
27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver
29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{
30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #ifdef HAL_RCC_MODULE_ENABLED
33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
ARM GAS /tmp/ccYdhGWl.s page 2
34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx
35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCC Extension HAL module driver.
36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{
37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private typedef -----------------------------------------------------------*/
40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private define ------------------------------------------------------------*/
41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CRS)
42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Constants RCCEx Private Constants
43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{
44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Bit position in register */
46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_CFGR_FELIM_BITNUMBER 16
47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_CR_TRIM_BITNUMBER 8
48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #define CRS_ISR_FECAP_BITNUMBER 16
49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @}
51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* CRS */
53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private macro -------------------------------------------------------------*/
55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Private_Macros RCCEx Private Macros
56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{
57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @}
60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private variables ---------------------------------------------------------*/
63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private function prototypes -----------------------------------------------*/
64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Private functions ---------------------------------------------------------*/
65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{
68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions
71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended Peripheral Control functions
72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** *
73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @verbatim
74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ===============================================================================
75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ##### Extended Peripheral Control functions #####
76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ===============================================================================
77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..]
78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** This subsection provides a set of functions allowing to control the RCC Clocks
79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequencies.
80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..]
81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** select the RTC clock source; in this case the Backup domain will be reset in
83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** order to modify the RTC Clock source, as consequence RTC registers (including
84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the backup registers) are set to their reset values.
85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endverbatim
87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{
88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
ARM GAS /tmp/ccYdhGWl.s page 3
91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Initializes the RCC extended peripherals clocks according to the specified
92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * parameters in the RCC_PeriphCLKInitTypeDef.
93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * contains the configuration information for the Extended Peripherals clocks
95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * (USART, RTC, I2C, CEC and USB).
96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** *
97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Care must be taken when @ref HAL_RCCEx_PeriphCLKConfig() is used to select
98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the RTC clock source; in this case the Backup domain will be reset in
99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * order to modify the RTC Clock source, as consequence RTC registers (including
100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * the backup registers) and RCC_BDCR register are set to their reset values.
101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** *
102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval HAL status
103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
26 .loc 1 105 0
27 .cfi_startproc
28 @ args = 0, pretend = 0, frame = 8
29 @ frame_needed = 0, uses_anonymous_args = 0
30 .LVL0:
31 0000 70B5 push {r4, r5, r6, lr}
32 .LCFI0:
33 .cfi_def_cfa_offset 16
34 .cfi_offset 4, -16
35 .cfi_offset 5, -12
36 .cfi_offset 6, -8
37 .cfi_offset 14, -4
38 0002 82B0 sub sp, sp, #8
39 .LCFI1:
40 .cfi_def_cfa_offset 24
41 0004 0400 movs r4, r0
42 .LVL1:
106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U;
107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t temp_reg = 0U;
108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */
110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*---------------------------- RTC configuration -------------------------------*/
113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
43 .loc 1 113 0
44 0006 0368 ldr r3, [r0]
45 0008 DB03 lsls r3, r3, #15
46 000a 35D5 bpl .L2
47 .LVL2:
48 .LBB2:
114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* check for RTC Parameters used to output RTCCLK */
116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** FlagStatus pwrclkchanged = RESET;
119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* As soon as function is called to change RTC clock source, activation of the
121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** power domain is done. */
122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Requires to enable write access to Backup Domain of necessary */
123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_PWR_IS_CLK_DISABLED())
49 .loc 1 123 0
ARM GAS /tmp/ccYdhGWl.s page 4
50 000c 4B4B ldr r3, .L22
51 000e DB69 ldr r3, [r3, #28]
52 0010 DB00 lsls r3, r3, #3
53 0012 66D4 bmi .L15
54 .LBB3:
124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
55 .loc 1 125 0
56 0014 494A ldr r2, .L22
57 0016 D169 ldr r1, [r2, #28]
58 0018 8020 movs r0, #128
59 .LVL3:
60 001a 4005 lsls r0, r0, #21
61 001c 0143 orrs r1, r0
62 001e D161 str r1, [r2, #28]
63 0020 D369 ldr r3, [r2, #28]
64 0022 0340 ands r3, r0
65 0024 0193 str r3, [sp, #4]
66 0026 019B ldr r3, [sp, #4]
67 .LVL4:
68 .LBE3:
126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pwrclkchanged = SET;
69 .loc 1 126 0
70 0028 0125 movs r5, #1
71 .LVL5:
72 .L3:
127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
73 .loc 1 129 0
74 002a 454B ldr r3, .L22+4
75 002c 1B68 ldr r3, [r3]
76 002e DB05 lsls r3, r3, #23
77 0030 59D5 bpl .L19
78 .LVL6:
79 .L4:
130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Enable write access to Backup domain */
132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(PWR->CR, PWR_CR_DBP);
133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for Backup domain Write protection disable */
135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_TIMEOUT;
142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value
147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
80 .loc 1 147 0
81 0032 424B ldr r3, .L22
82 0034 1B6A ldr r3, [r3, #32]
ARM GAS /tmp/ccYdhGWl.s page 5
83 0036 C022 movs r2, #192
84 0038 9200 lsls r2, r2, #2
85 003a 1340 ands r3, r2
86 .LVL7:
148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSE
87 .loc 1 148 0
88 003c 13D0 beq .L8
89 .loc 1 148 0 is_stmt 0 discriminator 1
90 003e 6168 ldr r1, [r4, #4]
91 0040 0A40 ands r2, r1
92 0042 9A42 cmp r2, r3
93 0044 0FD0 beq .L8
149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Store the content of BDCR register before the reset of Backup Domain */
151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
94 .loc 1 151 0 is_stmt 1
95 0046 3D4B ldr r3, .L22
96 .LVL8:
97 0048 186A ldr r0, [r3, #32]
98 004a 3E4A ldr r2, .L22+8
99 004c 0240 ands r2, r0
100 .LVL9:
152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* RTC Clock selection can be changed only if the Backup Domain is reset */
153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_FORCE();
101 .loc 1 153 0
102 004e 1E6A ldr r6, [r3, #32]
103 0050 8021 movs r1, #128
104 0052 4902 lsls r1, r1, #9
105 0054 3143 orrs r1, r6
106 0056 1962 str r1, [r3, #32]
154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE();
107 .loc 1 154 0
108 0058 196A ldr r1, [r3, #32]
109 005a 3B4E ldr r6, .L22+12
110 005c 3140 ands r1, r6
111 005e 1962 str r1, [r3, #32]
155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Restore the Content of BDCR register */
156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** RCC->BDCR = temp_reg;
112 .loc 1 156 0
113 0060 1A62 str r2, [r3, #32]
157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for LSERDY if LSE was enabled */
159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
114 .loc 1 159 0
115 0062 C307 lsls r3, r0, #31
116 0064 53D4 bmi .L20
117 .LVL10:
118 .L8:
160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Start Tick */
162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait till LSE is ready */
165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
ARM GAS /tmp/ccYdhGWl.s page 6
169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_TIMEOUT;
170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
119 .loc 1 174 0
120 0066 354A ldr r2, .L22
121 0068 136A ldr r3, [r2, #32]
122 006a 3649 ldr r1, .L22+8
123 006c 0B40 ands r3, r1
124 006e 6168 ldr r1, [r4, #4]
125 0070 0B43 orrs r3, r1
126 0072 1362 str r3, [r2, #32]
175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Require to disable power clock if necessary */
177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(pwrclkchanged == SET)
127 .loc 1 177 0
128 0074 012D cmp r5, #1
129 0076 59D0 beq .L21
130 .LVL11:
131 .L2:
132 .LBE2:
178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_DISABLE();
180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------- USART1 Configuration ------------------------*/
184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1)
133 .loc 1 184 0
134 0078 2368 ldr r3, [r4]
135 007a DB07 lsls r3, r3, #31
136 007c 06D5 bpl .L11
185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */
187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection));
188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART1 clock source */
190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection);
137 .loc 1 190 0
138 007e 2F4A ldr r2, .L22
139 0080 136B ldr r3, [r2, #48]
140 0082 0321 movs r1, #3
141 0084 8B43 bics r3, r1
142 0086 A168 ldr r1, [r4, #8]
143 0088 0B43 orrs r3, r1
144 008a 1363 str r3, [r2, #48]
145 .L11:
191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\
194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx)
195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*----------------------------- USART2 Configuration --------------------------*/
196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2)
146 .loc 1 196 0
147 008c 2368 ldr r3, [r4]
ARM GAS /tmp/ccYdhGWl.s page 7
148 008e 9B07 lsls r3, r3, #30
149 0090 06D5 bpl .L12
197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */
199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection));
200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART2 clock source */
202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection);
150 .loc 1 202 0
151 0092 2A4A ldr r2, .L22
152 0094 136B ldr r3, [r2, #48]
153 0096 2D49 ldr r1, .L22+16
154 0098 0B40 ands r3, r1
155 009a E168 ldr r1, [r4, #12]
156 009c 0B43 orrs r3, r1
157 009e 1363 str r3, [r2, #48]
158 .L12:
203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F071xB || STM32F072xB || STM32F078xx || */
205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */
206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F091xC) || defined(STM32F098xx)
208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*----------------------------- USART3 Configuration --------------------------*/
209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3)
210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */
212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection));
213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USART3 clock source */
215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection);
216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F091xC || STM32F098xx */
218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ I2C1 Configuration ------------------------*/
220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1)
159 .loc 1 220 0
160 00a0 2368 ldr r3, [r4]
161 00a2 9B06 lsls r3, r3, #26
162 00a4 06D5 bpl .L13
221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */
223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection));
224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the I2C1 clock source */
226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection);
163 .loc 1 226 0
164 00a6 254A ldr r2, .L22
165 00a8 136B ldr r3, [r2, #48]
166 00aa 1021 movs r1, #16
167 00ac 8B43 bics r3, r1
168 00ae 2169 ldr r1, [r4, #16]
169 00b0 0B43 orrs r3, r1
170 00b2 1363 str r3, [r2, #48]
171 .L13:
227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) ||
ARM GAS /tmp/ccYdhGWl.s page 8
230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ USB Configuration ------------------------*/
231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
172 .loc 1 231 0
173 00b4 2368 ldr r3, [r4]
174 00b6 9B03 lsls r3, r3, #14
175 00b8 06D5 bpl .L14
232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */
234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection));
235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the USB clock source */
237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
176 .loc 1 237 0
177 00ba 204A ldr r2, .L22
178 00bc 136B ldr r3, [r2, #48]
179 00be 8021 movs r1, #128
180 00c0 8B43 bics r3, r1
181 00c2 A169 ldr r1, [r4, #24]
182 00c4 0B43 orrs r3, r1
183 00c6 1363 str r3, [r2, #48]
184 .L14:
238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx)\
242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F051x8) || defined(STM32F058xx)\
243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\
244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx)
245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /*------------------------------ CEC clock Configuration -------------------*/
246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CEC) == RCC_PERIPHCLK_CEC)
185 .loc 1 246 0
186 00c8 2368 ldr r3, [r4]
187 00ca 5B05 lsls r3, r3, #21
188 00cc 33D5 bpl .L18
247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */
249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CECCLKSOURCE(PeriphClkInit->CecClockSelection));
250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Configure the CEC clock source */
252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
189 .loc 1 252 0
190 00ce 1B4A ldr r2, .L22
191 00d0 136B ldr r3, [r2, #48]
192 00d2 4021 movs r1, #64
193 00d4 8B43 bics r3, r1
194 00d6 6169 ldr r1, [r4, #20]
195 00d8 0B43 orrs r3, r1
196 00da 1363 str r3, [r2, #48]
253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || */
255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F051x8 || STM32F058xx || */
256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F071xB || STM32F072xB || STM32F078xx || */
257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */
258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return HAL_OK;
197 .loc 1 259 0
198 00dc 0020 movs r0, #0
ARM GAS /tmp/ccYdhGWl.s page 9
199 .L6:
260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
200 .loc 1 260 0
201 00de 02B0 add sp, sp, #8
202 @ sp needed
203 .LVL12:
204 00e0 70BD pop {r4, r5, r6, pc}
205 .LVL13:
206 .L15:
207 .LBB4:
118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
208 .loc 1 118 0
209 00e2 0025 movs r5, #0
210 00e4 A1E7 b .L3
211 .LVL14:
212 .L19:
132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
213 .loc 1 132 0
214 00e6 164A ldr r2, .L22+4
215 00e8 1168 ldr r1, [r2]
216 00ea 8023 movs r3, #128
217 00ec 5B00 lsls r3, r3, #1
218 00ee 0B43 orrs r3, r1
219 00f0 1360 str r3, [r2]
135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
220 .loc 1 135 0
221 00f2 FFF7FEFF bl HAL_GetTick
222 .LVL15:
223 00f6 0600 movs r6, r0
224 .LVL16:
225 .L5:
137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
226 .loc 1 137 0
227 00f8 114B ldr r3, .L22+4
228 00fa 1B68 ldr r3, [r3]
229 00fc DB05 lsls r3, r3, #23
230 00fe 98D4 bmi .L4
139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
231 .loc 1 139 0
232 0100 FFF7FEFF bl HAL_GetTick
233 .LVL17:
234 0104 801B subs r0, r0, r6
235 0106 6428 cmp r0, #100
236 0108 F6D9 bls .L5
141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
237 .loc 1 141 0
238 010a 0320 movs r0, #3
239 010c E7E7 b .L6
240 .LVL18:
241 .L20:
162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
242 .loc 1 162 0
243 010e FFF7FEFF bl HAL_GetTick
244 .LVL19:
245 0112 0600 movs r6, r0
246 .LVL20:
247 .L9:
ARM GAS /tmp/ccYdhGWl.s page 10
165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
248 .loc 1 165 0
249 0114 094B ldr r3, .L22
250 0116 1B6A ldr r3, [r3, #32]
251 0118 9B07 lsls r3, r3, #30
252 011a A4D4 bmi .L8
167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
253 .loc 1 167 0
254 011c FFF7FEFF bl HAL_GetTick
255 .LVL21:
256 0120 801B subs r0, r0, r6
257 0122 0B4B ldr r3, .L22+20
258 0124 9842 cmp r0, r3
259 0126 F5D9 bls .L9
169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
260 .loc 1 169 0
261 0128 0320 movs r0, #3
262 012a D8E7 b .L6
263 .LVL22:
264 .L21:
179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
265 .loc 1 179 0
266 012c D369 ldr r3, [r2, #28]
267 012e 0949 ldr r1, .L22+24
268 0130 0B40 ands r3, r1
269 0132 D361 str r3, [r2, #28]
270 0134 A0E7 b .L2
271 .LVL23:
272 .L18:
273 .LBE4:
259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
274 .loc 1 259 0
275 0136 0020 movs r0, #0
276 0138 D1E7 b .L6
277 .L23:
278 013a C046 .align 2
279 .L22:
280 013c 00100240 .word 1073876992
281 0140 00700040 .word 1073770496
282 0144 FFFCFFFF .word -769
283 0148 FFFFFEFF .word -65537
284 014c FFFFFCFF .word -196609
285 0150 88130000 .word 5000
286 0154 FFFFFFEF .word -268435457
287 .cfi_endproc
288 .LFE40:
290 .section .text.HAL_RCCEx_GetPeriphCLKConfig,"ax",%progbits
291 .align 1
292 .global HAL_RCCEx_GetPeriphCLKConfig
293 .syntax unified
294 .code 16
295 .thumb_func
296 .fpu softvfp
298 HAL_RCCEx_GetPeriphCLKConfig:
299 .LFB41:
261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
ARM GAS /tmp/ccYdhGWl.s page 11
263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Get the RCC_ClkInitStruct according to the internal
264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * RCC configuration registers.
265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that
266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * returns the configuration information for the Extended Peripherals clocks
267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * (USART, RTC, I2C, CEC and USB).
268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None
269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
300 .loc 1 271 0
301 .cfi_startproc
302 @ args = 0, pretend = 0, frame = 0
303 @ frame_needed = 0, uses_anonymous_args = 0
304 @ link register save eliminated.
305 .LVL24:
272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set all possible values for the extended clock type parameter------------*/
273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Common part first */
274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK
306 .loc 1 274 0
307 0000 114B ldr r3, .L25
308 0002 0360 str r3, [r0]
275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the RTC configuration --------------------------------------------*/
276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE();
309 .loc 1 276 0
310 0004 114B ldr r3, .L25+4
311 0006 1A6A ldr r2, [r3, #32]
312 0008 C021 movs r1, #192
313 000a 8900 lsls r1, r1, #2
314 000c 0A40 ands r2, r1
315 000e 4260 str r2, [r0, #4]
277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART1 clock configuration --------------------------------------------*/
278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE();
316 .loc 1 278 0
317 0010 196B ldr r1, [r3, #48]
318 0012 0322 movs r2, #3
319 0014 0A40 ands r2, r1
320 0016 8260 str r2, [r0, #8]
279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the I2C1 clock source -----------------------------------------------*/
280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE();
321 .loc 1 280 0
322 0018 196B ldr r1, [r3, #48]
323 001a 1022 movs r2, #16
324 001c 0A40 ands r2, r1
325 001e 0261 str r2, [r0, #16]
281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\
283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx)
284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART2;
326 .loc 1 284 0
327 0020 0B4A ldr r2, .L25+8
328 0022 0260 str r2, [r0]
285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART2 clock source ---------------------------------------------*/
286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE();
329 .loc 1 286 0
330 0024 1A6B ldr r2, [r3, #48]
331 0026 C021 movs r1, #192
332 0028 8902 lsls r1, r1, #10
ARM GAS /tmp/ccYdhGWl.s page 12
333 002a 0A40 ands r2, r1
334 002c C260 str r2, [r0, #12]
287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F071xB || STM32F072xB || STM32F078xx || */
288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */
289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F091xC) || defined(STM32F098xx)
291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USART3;
292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USART3 clock source ---------------------------------------------*/
293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE();
294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F091xC || STM32F098xx */
295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) ||
297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_USB;
335 .loc 1 297 0
336 002e 094A ldr r2, .L25+12
337 0030 0260 str r2, [r0]
298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the USB clock source ---------------------------------------------*/
299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE();
338 .loc 1 299 0
339 0032 196B ldr r1, [r3, #48]
340 0034 8022 movs r2, #128
341 0036 0A40 ands r2, r1
342 0038 8261 str r2, [r0, #24]
300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB || STM32F070x6 */
301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx)\
303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F051x8) || defined(STM32F058xx)\
304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx)\
305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** || defined(STM32F091xC) || defined(STM32F098xx)
306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->PeriphClockSelection |= RCC_PERIPHCLK_CEC;
343 .loc 1 306 0
344 003a 074A ldr r2, .L25+16
345 003c 0260 str r2, [r0]
307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the CEC clock source ------------------------------------------------*/
308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** PeriphClkInit->CecClockSelection = __HAL_RCC_GET_CEC_SOURCE();
346 .loc 1 308 0
347 003e 1A6B ldr r2, [r3, #48]
348 0040 4023 movs r3, #64
349 0042 1340 ands r3, r2
350 0044 4361 str r3, [r0, #20]
309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || */
310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F051x8 || STM32F058xx || */
311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F071xB || STM32F072xB || STM32F078xx || */
312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* STM32F091xC || STM32F098xx */
313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
351 .loc 1 314 0
352 @ sp needed
353 0046 7047 bx lr
354 .L26:
355 .align 2
356 .L25:
357 0048 21000100 .word 65569
358 004c 00100240 .word 1073876992
359 0050 23000100 .word 65571
360 0054 23000300 .word 196643
361 0058 23040300 .word 197667
ARM GAS /tmp/ccYdhGWl.s page 13
362 .cfi_endproc
363 .LFE41:
365 .global __aeabi_uidiv
366 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits
367 .align 1
368 .global HAL_RCCEx_GetPeriphCLKFreq
369 .syntax unified
370 .code 16
371 .thumb_func
372 .fpu softvfp
374 HAL_RCCEx_GetPeriphCLKFreq:
375 .LFB42:
315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Returns the peripheral clock frequency
318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Returns 0 if peripheral clock is unknown
319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param PeriphClk Peripheral clock identifier
320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be one of the following values:
321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock
322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock
323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock
324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F042x6
325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F048xx
329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F051x8
333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F058xx
336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F070x6
339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F070xB
342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F071xB
345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F072xB
349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F078xx
354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock
356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F091xC
359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
ARM GAS /tmp/ccYdhGWl.s page 14
360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART2 peripheral clock
361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @if STM32F098xx
364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART2 USART2 peripheral clock
365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_USART3 USART2 peripheral clock
366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_PERIPHCLK_CEC CEC peripheral clock
367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endif
368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval Frequency in Hz (0: means that no available frequency for the peripheral)
369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk)
371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
376 .loc 1 371 0
377 .cfi_startproc
378 @ args = 0, pretend = 0, frame = 0
379 @ frame_needed = 0, uses_anonymous_args = 0
380 .LVL25:
381 0000 10B5 push {r4, lr}
382 .LCFI2:
383 .cfi_def_cfa_offset 8
384 .cfi_offset 4, -8
385 .cfi_offset 14, -4
386 .LVL26:
372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency == 0 : means that no available frequency for the peripheral */
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t frequency = 0U;
374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t srcclk = 0U;
376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(USB)
377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t pllmull = 0U, pllsource = 0U, predivfactor = 0U;
378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* USB */
379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */
381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_PERIPHCLOCK(PeriphClk));
382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** switch (PeriphClk)
387 .loc 1 383 0
388 0002 2028 cmp r0, #32
389 0004 00D1 bne .LCB374
390 0006 80E0 b .L29 @long jump
391 .LCB374:
392 0008 0FD9 bls .L67
393 000a 8023 movs r3, #128
394 000c 5B02 lsls r3, r3, #9
395 000e 9842 cmp r0, r3
396 0010 23D0 beq .L33
397 0012 8023 movs r3, #128
398 0014 9B02 lsls r3, r3, #10
399 0016 9842 cmp r0, r3
400 0018 00D1 bne .LCB384
401 001a 86E0 b .L34 @long jump
402 .LCB384:
403 001c 8023 movs r3, #128
404 001e DB00 lsls r3, r3, #3
405 0020 9842 cmp r0, r3
406 0022 00D1 bne .LCB388
407 0024 B7E0 b .L68 @long jump
408 .LCB388:
ARM GAS /tmp/ccYdhGWl.s page 15
409 .L49:
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
410 .loc 1 373 0
411 0026 0020 movs r0, #0
412 .LVL27:
413 .L27:
384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_RTC:
386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current RTC source */
388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_RTC_SOURCE();
389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if RTC clock selection is LSE */
391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSI is ready and if RTC clock selection is LSI */
396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY)))
397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSI_VALUE;
399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/
401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY)))
402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSE_VALUE / 32U;
404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break;
406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART1:
408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART1 source */
410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART1_SOURCE();
411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is PCLK1 */
413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART1CLKSOURCE_PCLK1)
414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART1 clock selection is HSI */
418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART1 clock selection is SYSCLK */
423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART1CLKSOURCE_SYSCLK)
424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART1 clock selection is LSE */
428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break;
433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART2SW)
ARM GAS /tmp/ccYdhGWl.s page 16
435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART2:
436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART2 source */
438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART2_SOURCE();
439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is PCLK1 */
441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART2CLKSOURCE_PCLK1)
442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART2 clock selection is HSI */
446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART2 clock selection is SYSCLK */
451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART2CLKSOURCE_SYSCLK)
452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART2 clock selection is LSE */
456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break;
461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART2SW */
463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CFGR3_USART3SW)
464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USART3:
465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USART3 source */
467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USART3_SOURCE();
468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is PCLK1 */
470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (srcclk == RCC_USART3CLKSOURCE_PCLK1)
471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetPCLK1Freq();
473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if USART3 clock selection is HSI */
475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if USART3 clock selection is SYSCLK */
480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_USART3CLKSOURCE_SYSCLK)
481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if USART3 clock selection is LSE */
485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break;
490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CFGR3_USART3SW */
ARM GAS /tmp/ccYdhGWl.s page 17
492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_I2C1:
493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current I2C1 source */
495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_I2C1_SOURCE();
496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if I2C1 clock selection is HSI */
498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if I2C1 clock selection is SYSCLK */
503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (srcclk == RCC_I2C1CLKSOURCE_SYSCLK)
504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HAL_RCC_GetSysClockFreq();
506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break;
508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(USB)
510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_USB:
511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current USB source */
513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_USB_SOURCE();
514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if PLL is ready and if USB clock selection is PLL */
516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_USBCLKSOURCE_PLL) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_PLLRDY)))
517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get PLL clock source and multiplication factor ----------------------*/
519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;
520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = (pllmull >> RCC_CFGR_PLLMUL_BITNUMBER) + 2U;
522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U;
523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)
525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSE used as PLL clock source : frequency = HSE/PREDIV * PLLMUL */
527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSE_VALUE/predivfactor) * pllmull;
528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CR2_HSI48ON)
530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)
531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI48 used as PLL clock source : frequency = HSI48/PREDIV * PLLMUL */
533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI48_VALUE / predivfactor) * pllmull;
534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CR2_HSI48ON */
536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else
537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F078xx) || defined(STM32F072xB) ||
539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : frequency = HSI/PREDIV * PLLMUL */
540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI_VALUE / predivfactor) * pllmull;
541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #else
542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* HSI used as PLL clock source : frequency = HSI/2U * PLLMUL */
543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = (HSI_VALUE >> 1U) * pllmull;
544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F070xB */
545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(RCC_CR2_HSI48ON)
548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI48 is ready and if USB clock selection is HSI48 */
ARM GAS /tmp/ccYdhGWl.s page 18
549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_USBCLKSOURCE_HSI48) && (HAL_IS_BIT_SET(RCC->CR2, RCC_CR2_HSI48RDY)))
550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI48_VALUE;
552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* RCC_CR2_HSI48ON */
554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break;
555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* USB */
557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CEC)
558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** case RCC_PERIPHCLK_CEC:
559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the current CEC source */
561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** srcclk = __HAL_RCC_GET_CEC_SOURCE();
562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if HSI is ready and if CEC clock selection is HSI */
564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if ((srcclk == RCC_CECCLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY)))
565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = HSI_VALUE;
567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check if LSE is ready and if CEC clock selection is LSE */
569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if ((srcclk == RCC_CECCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY)))
570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** frequency = LSE_VALUE;
572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break;
574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #endif /* CEC */
576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** default:
577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** break;
579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return(frequency);
582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
414 .loc 1 582 0
415 @ sp needed
416 0028 10BD pop {r4, pc}
417 .LVL28:
418 .L67:
383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
419 .loc 1 383 0
420 002a 0128 cmp r0, #1
421 002c 3CD0 beq .L31
422 002e 0228 cmp r0, #2
423 0030 F9D1 bne .L49
438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
424 .loc 1 438 0
425 0032 6B4B ldr r3, .L83
426 0034 1B6B ldr r3, [r3, #48]
427 0036 C022 movs r2, #192
428 0038 9202 lsls r2, r2, #10
429 003a 1340 ands r3, r2
430 .LVL29:
441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
431 .loc 1 441 0
432 003c 53D0 beq .L69
446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
ARM GAS /tmp/ccYdhGWl.s page 19
433 .loc 1 446 0
434 003e C022 movs r2, #192
435 0040 9202 lsls r2, r2, #10
436 0042 9342 cmp r3, r2
437 0044 52D0 beq .L70
438 .L42:
451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
439 .loc 1 451 0
440 0046 8022 movs r2, #128
441 0048 5202 lsls r2, r2, #9
442 004a 9342 cmp r3, r2
443 004c 54D0 beq .L71
456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
444 .loc 1 456 0
445 004e 8022 movs r2, #128
446 0050 9202 lsls r2, r2, #10
447 0052 9342 cmp r3, r2
448 0054 53D0 beq .L72
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
449 .loc 1 373 0
450 0056 0020 movs r0, #0
451 .LVL30:
452 0058 E6E7 b .L27
453 .LVL31:
454 .L33:
388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
455 .loc 1 388 0
456 005a 614B ldr r3, .L83
457 005c 1B6A ldr r3, [r3, #32]
458 005e C022 movs r2, #192
459 0060 9200 lsls r2, r2, #2
460 0062 1340 ands r3, r2
461 .LVL32:
391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
462 .loc 1 391 0
463 0064 8022 movs r2, #128
464 0066 5200 lsls r2, r2, #1
465 0068 9342 cmp r3, r2
466 006a 09D0 beq .L73
467 .L36:
396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
468 .loc 1 396 0
469 006c 8022 movs r2, #128
470 006e 9200 lsls r2, r2, #2
471 0070 9342 cmp r3, r2
472 0072 0CD0 beq .L74
473 .L37:
401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
474 .loc 1 401 0
475 0074 C022 movs r2, #192
476 0076 9200 lsls r2, r2, #2
477 0078 9342 cmp r3, r2
478 007a 0ED0 beq .L75
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
479 .loc 1 373 0
480 007c 0020 movs r0, #0
481 .LVL33:
ARM GAS /tmp/ccYdhGWl.s page 20
482 007e D3E7 b .L27
483 .LVL34:
484 .L73:
391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
485 .loc 1 391 0 discriminator 1
486 0080 574A ldr r2, .L83
487 0082 126A ldr r2, [r2, #32]
488 0084 9207 lsls r2, r2, #30
489 0086 F1D5 bpl .L36
393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
490 .loc 1 393 0
491 0088 8020 movs r0, #128
492 .LVL35:
493 008a 0002 lsls r0, r0, #8
494 008c CCE7 b .L27
495 .LVL36:
496 .L74:
396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
497 .loc 1 396 0 discriminator 1
498 008e 544A ldr r2, .L83
499 0090 526A ldr r2, [r2, #36]
500 0092 9207 lsls r2, r2, #30
501 0094 EED5 bpl .L37
398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
502 .loc 1 398 0
503 0096 5348 ldr r0, .L83+4
504 .LVL37:
505 0098 C6E7 b .L27
506 .LVL38:
507 .L75:
401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
508 .loc 1 401 0 discriminator 1
509 009a 514B ldr r3, .L83
510 .LVL39:
511 009c 1B68 ldr r3, [r3]
512 009e 9B03 lsls r3, r3, #14
513 00a0 00D5 bpl .LCB506
514 00a2 89E0 b .L53 @long jump
515 .LCB506:
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
516 .loc 1 373 0
517 00a4 0020 movs r0, #0
518 .LVL40:
519 00a6 BFE7 b .L27
520 .LVL41:
521 .L31:
410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
522 .loc 1 410 0
523 00a8 4D4B ldr r3, .L83
524 00aa 1A6B ldr r2, [r3, #48]
525 00ac 0323 movs r3, #3
526 00ae 1340 ands r3, r2
527 .LVL42:
413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
528 .loc 1 413 0
529 00b0 07D0 beq .L76
418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
ARM GAS /tmp/ccYdhGWl.s page 21
530 .loc 1 418 0
531 00b2 032B cmp r3, #3
532 00b4 08D0 beq .L77
533 .L39:
423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
534 .loc 1 423 0
535 00b6 012B cmp r3, #1
536 00b8 0CD0 beq .L78
428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
537 .loc 1 428 0
538 00ba 022B cmp r3, #2
539 00bc 0DD0 beq .L79
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
540 .loc 1 373 0
541 00be 0020 movs r0, #0
542 .LVL43:
543 00c0 B2E7 b .L27
544 .LVL44:
545 .L76:
415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
546 .loc 1 415 0
547 00c2 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
548 .LVL45:
549 00c6 AFE7 b .L27
550 .LVL46:
551 .L77:
418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
552 .loc 1 418 0 discriminator 1
553 00c8 454A ldr r2, .L83
554 00ca 1268 ldr r2, [r2]
555 00cc 9207 lsls r2, r2, #30
556 00ce F2D5 bpl .L39
420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
557 .loc 1 420 0
558 00d0 4548 ldr r0, .L83+8
559 .LVL47:
560 00d2 A9E7 b .L27
561 .LVL48:
562 .L78:
425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
563 .loc 1 425 0
564 00d4 FFF7FEFF bl HAL_RCC_GetSysClockFreq
565 .LVL49:
566 00d8 A6E7 b .L27
567 .LVL50:
568 .L79:
428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
569 .loc 1 428 0 discriminator 1
570 00da 414B ldr r3, .L83
571 .LVL51:
572 00dc 1B6A ldr r3, [r3, #32]
573 00de 9B07 lsls r3, r3, #30
574 00e0 6CD4 bmi .L56
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
575 .loc 1 373 0
576 00e2 0020 movs r0, #0
577 .LVL52:
ARM GAS /tmp/ccYdhGWl.s page 22
578 00e4 A0E7 b .L27
579 .LVL53:
580 .L69:
443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
581 .loc 1 443 0
582 00e6 FFF7FEFF bl HAL_RCC_GetPCLK1Freq
583 .LVL54:
584 00ea 9DE7 b .L27
585 .LVL55:
586 .L70:
446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
587 .loc 1 446 0 discriminator 1
588 00ec 3C4A ldr r2, .L83
589 00ee 1268 ldr r2, [r2]
590 00f0 9207 lsls r2, r2, #30
591 00f2 A8D5 bpl .L42
448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
592 .loc 1 448 0
593 00f4 3C48 ldr r0, .L83+8
594 .LVL56:
595 00f6 97E7 b .L27
596 .LVL57:
597 .L71:
453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
598 .loc 1 453 0
599 00f8 FFF7FEFF bl HAL_RCC_GetSysClockFreq
600 .LVL58:
601 00fc 94E7 b .L27
602 .LVL59:
603 .L72:
456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
604 .loc 1 456 0 discriminator 1
605 00fe 384B ldr r3, .L83
606 .LVL60:
607 0100 1B6A ldr r3, [r3, #32]
608 0102 9B07 lsls r3, r3, #30
609 0104 5DD4 bmi .L59
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
610 .loc 1 373 0
611 0106 0020 movs r0, #0
612 .LVL61:
613 0108 8EE7 b .L27
614 .LVL62:
615 .L29:
495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
616 .loc 1 495 0
617 010a 354B ldr r3, .L83
618 010c 1A6B ldr r2, [r3, #48]
619 010e 1023 movs r3, #16
620 0110 1340 ands r3, r2
621 .LVL63:
498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
622 .loc 1 498 0
623 0112 03D1 bne .L44
498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
624 .loc 1 498 0 is_stmt 0 discriminator 1
625 0114 324A ldr r2, .L83
ARM GAS /tmp/ccYdhGWl.s page 23
626 0116 1268 ldr r2, [r2]
627 0118 9207 lsls r2, r2, #30
628 011a 55D4 bmi .L60
629 .L44:
503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
630 .loc 1 503 0 is_stmt 1
631 011c 002B cmp r3, #0
632 011e 01D1 bne .L80
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
633 .loc 1 373 0
634 0120 0020 movs r0, #0
635 .LVL64:
636 0122 81E7 b .L27
637 .LVL65:
638 .L80:
505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
639 .loc 1 505 0
640 0124 FFF7FEFF bl HAL_RCC_GetSysClockFreq
641 .LVL66:
642 0128 7EE7 b .L27
643 .LVL67:
644 .L34:
513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
645 .loc 1 513 0
646 012a 2D4B ldr r3, .L83
647 012c 1B6B ldr r3, [r3, #48]
648 012e 8020 movs r0, #128
649 .LVL68:
650 0130 1840 ands r0, r3
651 .LVL69:
516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
652 .loc 1 516 0
653 0132 27D0 beq .L45
516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
654 .loc 1 516 0 is_stmt 0 discriminator 1
655 0134 2A4B ldr r3, .L83
656 0136 1B68 ldr r3, [r3]
657 0138 9B01 lsls r3, r3, #6
658 013a 23D5 bpl .L45
519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
659 .loc 1 519 0 is_stmt 1
660 013c 284A ldr r2, .L83
661 013e 5068 ldr r0, [r2, #4]
662 .LVL70:
520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pllmull = (pllmull >> RCC_CFGR_PLLMUL_BITNUMBER) + 2U;
663 .loc 1 520 0
664 0140 5368 ldr r3, [r2, #4]
665 0142 C021 movs r1, #192
666 0144 4902 lsls r1, r1, #9
667 0146 0B40 ands r3, r1
668 .LVL71:
521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1U;
669 .loc 1 521 0
670 0148 800C lsrs r0, r0, #18
671 .LVL72:
672 014a 0F21 movs r1, #15
673 014c 0840 ands r0, r1
ARM GAS /tmp/ccYdhGWl.s page 24
674 014e 841C adds r4, r0, #2
675 .LVL73:
522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
676 .loc 1 522 0
677 0150 D26A ldr r2, [r2, #44]
678 0152 1140 ands r1, r2
679 0154 0131 adds r1, r1, #1
680 .LVL74:
524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
681 .loc 1 524 0
682 0156 8022 movs r2, #128
683 0158 5202 lsls r2, r2, #9
684 015a 9342 cmp r3, r2
685 015c 08D0 beq .L81
530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
686 .loc 1 530 0
687 015e C022 movs r2, #192
688 0160 5202 lsls r2, r2, #9
689 0162 9342 cmp r3, r2
690 0164 09D0 beq .L82
540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #else
691 .loc 1 540 0
692 0166 2048 ldr r0, .L83+8
693 0168 FFF7FEFF bl __aeabi_uidiv
694 .LVL75:
695 016c 6043 muls r0, r4
696 .LVL76:
697 016e 5BE7 b .L27
698 .LVL77:
699 .L81:
527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
700 .loc 1 527 0
701 0170 1D48 ldr r0, .L83+8
702 0172 FFF7FEFF bl __aeabi_uidiv
703 .LVL78:
704 0176 6043 muls r0, r4
705 .LVL79:
706 0178 56E7 b .L27
707 .LVL80:
708 .L82:
533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
709 .loc 1 533 0
710 017a 1C48 ldr r0, .L83+12
711 017c FFF7FEFF bl __aeabi_uidiv
712 .LVL81:
713 0180 6043 muls r0, r4
714 .LVL82:
715 0182 51E7 b .L27
716 .LVL83:
717 .L45:
549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
718 .loc 1 549 0
719 0184 0028 cmp r0, #0
720 0186 21D1 bne .L62
549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
721 .loc 1 549 0 is_stmt 0 discriminator 1
722 0188 154B ldr r3, .L83
ARM GAS /tmp/ccYdhGWl.s page 25
723 018a 5B6B ldr r3, [r3, #52]
724 018c 9B03 lsls r3, r3, #14
725 018e 00D4 bmi .LCB770
726 0190 4AE7 b .L27 @long jump
727 .LCB770:
551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
728 .loc 1 551 0 is_stmt 1
729 0192 1648 ldr r0, .L83+12
730 .LVL84:
731 0194 48E7 b .L27
732 .LVL85:
733 .L68:
561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
734 .loc 1 561 0
735 0196 124B ldr r3, .L83
736 0198 1A6B ldr r2, [r3, #48]
737 019a 4023 movs r3, #64
738 019c 1340 ands r3, r2
739 .LVL86:
564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
740 .loc 1 564 0
741 019e 03D1 bne .L48
564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
742 .loc 1 564 0 is_stmt 0 discriminator 1
743 01a0 0F4A ldr r2, .L83
744 01a2 1268 ldr r2, [r2]
745 01a4 9207 lsls r2, r2, #30
746 01a6 13D4 bmi .L64
747 .L48:
569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
748 .loc 1 569 0 is_stmt 1
749 01a8 002B cmp r3, #0
750 01aa 13D0 beq .L65
569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
751 .loc 1 569 0 is_stmt 0 discriminator 1
752 01ac 0C4B ldr r3, .L83
753 .LVL87:
754 01ae 1B6A ldr r3, [r3, #32]
755 01b0 9B07 lsls r3, r3, #30
756 01b2 11D4 bmi .L66
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
757 .loc 1 373 0 is_stmt 1
758 01b4 0020 movs r0, #0
759 .LVL88:
760 01b6 37E7 b .L27
761 .LVL89:
762 .L53:
403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
763 .loc 1 403 0
764 01b8 0D48 ldr r0, .L83+16
765 .LVL90:
766 01ba 35E7 b .L27
767 .LVL91:
768 .L56:
430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
769 .loc 1 430 0
770 01bc 8020 movs r0, #128
ARM GAS /tmp/ccYdhGWl.s page 26
771 .LVL92:
772 01be 0002 lsls r0, r0, #8
773 01c0 32E7 b .L27
774 .LVL93:
775 .L59:
458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
776 .loc 1 458 0
777 01c2 8020 movs r0, #128
778 .LVL94:
779 01c4 0002 lsls r0, r0, #8
780 01c6 2FE7 b .L27
781 .LVL95:
782 .L60:
500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
783 .loc 1 500 0
784 01c8 0748 ldr r0, .L83+8
785 .LVL96:
786 01ca 2DE7 b .L27
787 .LVL97:
788 .L62:
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
789 .loc 1 373 0
790 01cc 0020 movs r0, #0
791 .LVL98:
792 01ce 2BE7 b .L27
793 .LVL99:
794 .L64:
566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
795 .loc 1 566 0
796 01d0 0548 ldr r0, .L83+8
797 .LVL100:
798 01d2 29E7 b .L27
799 .LVL101:
800 .L65:
373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
801 .loc 1 373 0
802 01d4 0020 movs r0, #0
803 .LVL102:
804 01d6 27E7 b .L27
805 .LVL103:
806 .L66:
571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
807 .loc 1 571 0
808 01d8 8020 movs r0, #128
809 .LVL104:
810 01da 0002 lsls r0, r0, #8
811 .LVL105:
581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
812 .loc 1 581 0
813 01dc 24E7 b .L27
814 .L84:
815 01de C046 .align 2
816 .L83:
817 01e0 00100240 .word 1073876992
818 01e4 409C0000 .word 40000
819 01e8 00127A00 .word 8000000
820 01ec 006CDC02 .word 48000000
ARM GAS /tmp/ccYdhGWl.s page 27
821 01f0 90D00300 .word 250000
822 .cfi_endproc
823 .LFE42:
825 .section .text.HAL_RCCEx_CRSConfig,"ax",%progbits
826 .align 1
827 .global HAL_RCCEx_CRSConfig
828 .syntax unified
829 .code 16
830 .thumb_func
831 .fpu softvfp
833 HAL_RCCEx_CRSConfig:
834 .LFB43:
583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @}
586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** #if defined(CRS)
589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /** @defgroup RCCEx_Exported_Functions_Group3 Extended Clock Recovery System Control functions
591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Extended Clock Recovery System Control functions
592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** *
593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @verbatim
594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ===============================================================================
595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ##### Extended Clock Recovery System Control functions #####
596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** ===============================================================================
597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** [..]
598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** For devices with Clock Recovery System feature (CRS), RCC Extention HAL driver can be used as
599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) In System clock config, HSI48 needs to be enabled
601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Enable CRS clock in IP MSP init which will use CRS functions
603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Call CRS functions as follows:
605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) Prepare synchronization configuration necessary for HSI48 calibration
606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Default values can be set for frequency Error Measurement (reload and error lim
607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** and also HSI48 oscillator smooth trimming.
608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Macro @ref __HAL_RCC_CRS_RELOADVALUE_CALCULATE can be also used to calculate
609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** directly reload value with target and synchronization frequencies values
610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) Call function @ref HAL_RCCEx_CRSConfig which
611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Reset CRS registers to their default values.
612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Configure CRS registers with synchronization configuration
613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Enable automatic calibration and frequency error counter feature
614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** Note: When using USB LPM (Link Power Management) and the device is in Sleep mode, the
615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** periodic USB SOF will not be generated by the host. No SYNC signal will therefore be
616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** provided to the CRS to calibrate the HSI48 on the run. To guarantee the required clock
617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** precision after waking up from Sleep mode, the LSE or reference clock on the GPIOs
618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** should be used as SYNC signal.
619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (##) A polling function is provided to wait for complete synchronization
621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) Call function @ref HAL_RCCEx_CRSWaitSynchronization()
622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) According to CRS status, user can decide to adjust again the calibration or con
623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** application if synchronization is OK
624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) User can retrieve information related to synchronization in calling function
626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @ref HAL_RCCEx_CRSGetSynchronizationInfo()
627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
ARM GAS /tmp/ccYdhGWl.s page 28
628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) Regarding synchronization status and synchronization information, user can try a new cali
629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** in changing synchronization configuration and call again HAL_RCCEx_CRSConfig.
630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** Note: When the SYNC event is detected during the downcounting phase (before reaching the
631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** it means that the actual frequency is lower than the target (and so, that the TRIM value
632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** incremented), while when it is detected during the upcounting phase it means that the ac
633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** is higher (and that the TRIM value should be decremented).
634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) In interrupt mode, user can resort to the available macros (__HAL_RCC_CRS_XXX_IT). Interr
636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** through CRS Handler (RCC_IRQn/RCC_IRQHandler)
637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Call function @ref HAL_RCCEx_CRSConfig()
638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Enable RCC_IRQn (thanks to NVIC functions)
639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Enable CRS interrupt (@ref __HAL_RCC_CRS_ENABLE_IT)
640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (++) Implement CRS status management in the following user callbacks called from
641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_IRQHandler():
642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_SyncOkCallback()
643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_SyncWarnCallback()
644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_ExpectedSyncCallback()
645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (+++) @ref HAL_RCCEx_CRS_ErrorCallback()
646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** (#) To force a SYNC EVENT, user can use the function @ref HAL_RCCEx_CRSSoftwareSynchronizatio
648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** This function can be called before calling @ref HAL_RCCEx_CRSConfig (for instance in Syst
649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** @endverbatim
651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @{
652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Start automatic synchronization for polling mode
656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param pInit Pointer on RCC_CRSInitTypeDef structure
657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None
658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSConfig(RCC_CRSInitTypeDef *pInit)
660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
835 .loc 1 660 0
836 .cfi_startproc
837 @ args = 0, pretend = 0, frame = 0
838 @ frame_needed = 0, uses_anonymous_args = 0
839 @ link register save eliminated.
840 .LVL106:
661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t value = 0U;
662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameters */
664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_DIV(pInit->Prescaler));
665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_SOURCE(pInit->Source));
666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_SYNC_POLARITY(pInit->Polarity));
667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_RELOADVALUE(pInit->ReloadValue));
668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_ERRORLIMIT(pInit->ErrorLimitValue));
669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(IS_RCC_CRS_HSI48CALIBRATION(pInit->HSI48CalibrationValue));
670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CONFIGURATION */
672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Before configuration, reset CRS registers to their default values*/
674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_FORCE_RESET();
841 .loc 1 674 0
842 0000 104B ldr r3, .L86
843 0002 1969 ldr r1, [r3, #16]
844 0004 8022 movs r2, #128
ARM GAS /tmp/ccYdhGWl.s page 29
845 0006 1205 lsls r2, r2, #20
846 0008 0A43 orrs r2, r1
847 000a 1A61 str r2, [r3, #16]
675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_RELEASE_RESET();
848 .loc 1 675 0
849 000c 1A69 ldr r2, [r3, #16]
850 000e 0E49 ldr r1, .L86+4
851 0010 0A40 ands r2, r1
852 0012 1A61 str r2, [r3, #16]
676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCDIV[2:0] bits according to Prescaler value */
678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCSRC[1:0] bits according to Source value */
679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the SYNCSPOL bit according to Polarity value */
680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value = (pInit->Prescaler | pInit->Source | pInit->Polarity);
853 .loc 1 680 0
854 0014 0268 ldr r2, [r0]
855 0016 4368 ldr r3, [r0, #4]
856 0018 1A43 orrs r2, r3
857 001a 8368 ldr r3, [r0, #8]
858 001c 1A43 orrs r2, r3
859 .LVL107:
681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the RELOAD[15:0] bits according to ReloadValue value */
682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value |= pInit->ReloadValue;
860 .loc 1 682 0
861 001e C368 ldr r3, [r0, #12]
862 0020 1343 orrs r3, r2
863 .LVL108:
683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the FELIM[7:0] bits according to ErrorLimitValue value */
684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** value |= (pInit->ErrorLimitValue << CRS_CFGR_FELIM_BITNUMBER);
864 .loc 1 684 0
865 0022 0269 ldr r2, [r0, #16]
866 0024 1204 lsls r2, r2, #16
867 0026 1A43 orrs r2, r3
868 .LVL109:
685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->CFGR, value);
869 .loc 1 685 0
870 0028 084B ldr r3, .L86+8
871 002a 5A60 str r2, [r3, #4]
686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Adjust HSI48 oscillator smooth trimming */
688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Set the TRIM[5:0] bits according to RCC_CRS_HSI48CalibrationValue value */
689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_BITNUMBER));
872 .loc 1 689 0
873 002c 1A68 ldr r2, [r3]
874 .LVL110:
875 002e 0849 ldr r1, .L86+12
876 0030 0A40 ands r2, r1
877 0032 4169 ldr r1, [r0, #20]
878 0034 0902 lsls r1, r1, #8
879 0036 0A43 orrs r2, r1
880 0038 1A60 str r2, [r3]
881 .LVL111:
690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* START AUTOMATIC SYNCHRONIZATION*/
692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Enable Automatic trimming & Frequency error counter */
694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN);
ARM GAS /tmp/ccYdhGWl.s page 30
882 .loc 1 694 0
883 003a 1A68 ldr r2, [r3]
884 003c 6021 movs r1, #96
885 003e 0A43 orrs r2, r1
886 0040 1A60 str r2, [r3]
695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
887 .loc 1 695 0
888 @ sp needed
889 0042 7047 bx lr
890 .L87:
891 .align 2
892 .L86:
893 0044 00100240 .word 1073876992
894 0048 FFFFFFF7 .word -134217729
895 004c 006C0040 .word 1073769472
896 0050 FFC0FFFF .word -16129
897 .cfi_endproc
898 .LFE43:
900 .section .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate,"ax",%progbits
901 .align 1
902 .global HAL_RCCEx_CRSSoftwareSynchronizationGenerate
903 .syntax unified
904 .code 16
905 .thumb_func
906 .fpu softvfp
908 HAL_RCCEx_CRSSoftwareSynchronizationGenerate:
909 .LFB44:
696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Generate the software synchronization event
699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None
700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSSoftwareSynchronizationGenerate(void)
702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
910 .loc 1 702 0
911 .cfi_startproc
912 @ args = 0, pretend = 0, frame = 0
913 @ frame_needed = 0, uses_anonymous_args = 0
914 @ link register save eliminated.
703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** SET_BIT(CRS->CR, CRS_CR_SWSYNC);
915 .loc 1 703 0
916 0000 024A ldr r2, .L89
917 0002 1368 ldr r3, [r2]
918 0004 8021 movs r1, #128
919 0006 0B43 orrs r3, r1
920 0008 1360 str r3, [r2]
704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
921 .loc 1 704 0
922 @ sp needed
923 000a 7047 bx lr
924 .L90:
925 .align 2
926 .L89:
927 000c 006C0040 .word 1073769472
928 .cfi_endproc
929 .LFE44:
931 .section .text.HAL_RCCEx_CRSGetSynchronizationInfo,"ax",%progbits
ARM GAS /tmp/ccYdhGWl.s page 31
932 .align 1
933 .global HAL_RCCEx_CRSGetSynchronizationInfo
934 .syntax unified
935 .code 16
936 .thumb_func
937 .fpu softvfp
939 HAL_RCCEx_CRSGetSynchronizationInfo:
940 .LFB45:
705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Return synchronization info
708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param pSynchroInfo Pointer on RCC_CRSSynchroInfoTypeDef structure
709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None
710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRSGetSynchronizationInfo(RCC_CRSSynchroInfoTypeDef *pSynchroInfo)
712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
941 .loc 1 712 0
942 .cfi_startproc
943 @ args = 0, pretend = 0, frame = 0
944 @ frame_needed = 0, uses_anonymous_args = 0
945 @ link register save eliminated.
946 .LVL112:
713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check the parameter */
714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** assert_param(pSynchroInfo != NULL);
715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get the reload value */
717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD));
947 .loc 1 717 0
948 0000 094A ldr r2, .L92
949 0002 5368 ldr r3, [r2, #4]
950 0004 1B04 lsls r3, r3, #16
951 0006 1B0C lsrs r3, r3, #16
952 0008 0360 str r3, [r0]
718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get HSI48 oscillator smooth trimming */
720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_BI
953 .loc 1 720 0
954 000a 1168 ldr r1, [r2]
955 000c 090A lsrs r1, r1, #8
956 000e 3F23 movs r3, #63
957 0010 0B40 ands r3, r1
958 0012 4360 str r3, [r0, #4]
721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Frequency error capture */
723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_BI
959 .loc 1 723 0
960 0014 9368 ldr r3, [r2, #8]
961 0016 1B0C lsrs r3, r3, #16
962 0018 8360 str r3, [r0, #8]
724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get Frequency error direction */
726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR));
963 .loc 1 726 0
964 001a 9368 ldr r3, [r2, #8]
965 001c 8022 movs r2, #128
966 001e 1202 lsls r2, r2, #8
967 0020 1340 ands r3, r2
ARM GAS /tmp/ccYdhGWl.s page 32
968 0022 C360 str r3, [r0, #12]
727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
969 .loc 1 727 0
970 @ sp needed
971 0024 7047 bx lr
972 .L93:
973 0026 C046 .align 2
974 .L92:
975 0028 006C0040 .word 1073769472
976 .cfi_endproc
977 .LFE45:
979 .section .text.HAL_RCCEx_CRSWaitSynchronization,"ax",%progbits
980 .align 1
981 .global HAL_RCCEx_CRSWaitSynchronization
982 .syntax unified
983 .code 16
984 .thumb_func
985 .fpu softvfp
987 HAL_RCCEx_CRSWaitSynchronization:
988 .LFB46:
728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Wait for CRS Synchronization status.
731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param Timeout Duration of the timeout
732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note Timeout is based on the maximum time to receive a SYNC event based on synchronization
733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * frequency.
734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @note If Timeout set to HAL_MAX_DELAY, HAL_TIMEOUT will be never returned.
735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval Combination of Synchronization status
736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values:
737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TIMEOUT
738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCOK
739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCWARN
740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR
741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS
742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF
743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t HAL_RCCEx_CRSWaitSynchronization(uint32_t Timeout)
745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
989 .loc 1 745 0
990 .cfi_startproc
991 @ args = 0, pretend = 0, frame = 0
992 @ frame_needed = 0, uses_anonymous_args = 0
993 .LVL113:
994 0000 70B5 push {r4, r5, r6, lr}
995 .LCFI3:
996 .cfi_def_cfa_offset 16
997 .cfi_offset 4, -16
998 .cfi_offset 5, -12
999 .cfi_offset 6, -8
1000 .cfi_offset 14, -4
1001 0002 0500 movs r5, r0
1002 .LVL114:
746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crsstatus = RCC_CRS_NONE;
747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t tickstart = 0U;
748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get timeout */
750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
ARM GAS /tmp/ccYdhGWl.s page 33
1003 .loc 1 750 0
1004 0004 FFF7FEFF bl HAL_GetTick
1005 .LVL115:
1006 0008 0600 movs r6, r0
1007 .LVL116:
746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crsstatus = RCC_CRS_NONE;
1008 .loc 1 746 0
1009 000a 0024 movs r4, #0
1010 000c 3AE0 b .L102
1011 .LVL117:
1012 .L106:
751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Wait for CRS flag or timeout detection */
753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** do
754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(Timeout != HAL_MAX_DELAY)
756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((Timeout == 0U) || ((HAL_GetTick() - tickstart) > Timeout))
1013 .loc 1 757 0 discriminator 1
1014 000e FFF7FEFF bl HAL_GetTick
1015 .LVL118:
1016 0012 801B subs r0, r0, r6
1017 0014 A842 cmp r0, r5
1018 0016 3BD8 bhi .L104
1019 .LVL119:
1020 .L95:
758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus = RCC_CRS_TIMEOUT;
760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */
763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCOK))
1021 .loc 1 763 0
1022 0018 1F4B ldr r3, .L107
1023 001a 9B68 ldr r3, [r3, #8]
1024 001c DB07 lsls r3, r3, #31
1025 001e 04D5 bpl .L96
764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC event OK */
766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCOK;
1026 .loc 1 766 0
1027 0020 0223 movs r3, #2
1028 0022 1C43 orrs r4, r3
1029 .LVL120:
767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK bit */
769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCOK);
1030 .loc 1 769 0
1031 0024 1C4B ldr r3, .L107
1032 0026 0122 movs r2, #1
1033 0028 DA60 str r2, [r3, #12]
1034 .L96:
770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */
773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCWARN))
1035 .loc 1 773 0
ARM GAS /tmp/ccYdhGWl.s page 34
1036 002a 1B4B ldr r3, .L107
1037 002c 9B68 ldr r3, [r3, #8]
1038 002e 9B07 lsls r3, r3, #30
1039 0030 04D5 bpl .L97
774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC warning */
776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCWARN;
1040 .loc 1 776 0
1041 0032 0423 movs r3, #4
1042 0034 1C43 orrs r4, r3
1043 .LVL121:
777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN bit */
779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCWARN);
1044 .loc 1 779 0
1045 0036 184B ldr r3, .L107
1046 0038 0222 movs r2, #2
1047 003a DA60 str r2, [r3, #12]
1048 .L97:
780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS TRIM overflow flag */
783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_TRIMOVF))
1049 .loc 1 783 0
1050 003c 164B ldr r3, .L107
1051 003e 9B68 ldr r3, [r3, #8]
1052 0040 5B05 lsls r3, r3, #21
1053 0042 04D5 bpl .L98
784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Error */
786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_TRIMOVF;
1054 .loc 1 786 0
1055 0044 2023 movs r3, #32
1056 0046 1C43 orrs r4, r3
1057 .LVL122:
787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */
789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_TRIMOVF);
1058 .loc 1 789 0
1059 0048 134B ldr r3, .L107
1060 004a 0422 movs r2, #4
1061 004c DA60 str r2, [r3, #12]
1062 .L98:
790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Error flag */
793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCERR))
1063 .loc 1 793 0
1064 004e 124B ldr r3, .L107
1065 0050 9B68 ldr r3, [r3, #8]
1066 0052 DB05 lsls r3, r3, #23
1067 0054 04D5 bpl .L99
794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Error */
796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCERR;
1068 .loc 1 796 0
1069 0056 0823 movs r3, #8
ARM GAS /tmp/ccYdhGWl.s page 35
1070 0058 1C43 orrs r4, r3
1071 .LVL123:
797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error bit */
799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCERR);
1072 .loc 1 799 0
1073 005a 0F4B ldr r3, .L107
1074 005c 0422 movs r2, #4
1075 005e DA60 str r2, [r3, #12]
1076 .L99:
800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNC Missed flag */
803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_SYNCMISS))
1077 .loc 1 803 0
1078 0060 0D4B ldr r3, .L107
1079 0062 9B68 ldr r3, [r3, #8]
1080 0064 9B05 lsls r3, r3, #22
1081 0066 04D5 bpl .L100
804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* CRS SYNC Missed */
806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crsstatus |= RCC_CRS_SYNCMISS;
1082 .loc 1 806 0
1083 0068 1023 movs r3, #16
1084 006a 1C43 orrs r4, r3
1085 .LVL124:
807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC Missed bit */
809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_SYNCMISS);
1086 .loc 1 809 0
1087 006c 0A4B ldr r3, .L107
1088 006e 0422 movs r2, #4
1089 0070 DA60 str r2, [r3, #12]
1090 .L100:
810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */
813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(__HAL_RCC_CRS_GET_FLAG(RCC_CRS_FLAG_ESYNC))
1091 .loc 1 813 0
1092 0072 094B ldr r3, .L107
1093 0074 9B68 ldr r3, [r3, #8]
1094 0076 1B07 lsls r3, r3, #28
1095 0078 02D5 bpl .L101
814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */
816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __HAL_RCC_CRS_CLEAR_FLAG(RCC_CRS_FLAG_ESYNC);
1096 .loc 1 816 0 discriminator 2
1097 007a 074B ldr r3, .L107
1098 007c 0822 movs r2, #8
1099 007e DA60 str r2, [r3, #12]
1100 .L101:
817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** } while(RCC_CRS_NONE == crsstatus);
1101 .loc 1 818 0
1102 0080 002C cmp r4, #0
1103 0082 07D1 bne .L105
1104 .LVL125:
ARM GAS /tmp/ccYdhGWl.s page 36
1105 .L102:
755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1106 .loc 1 755 0
1107 0084 6B1C adds r3, r5, #1
1108 0086 C7D0 beq .L95
757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1109 .loc 1 757 0
1110 0088 002D cmp r5, #0
1111 008a C0D1 bne .L106
759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1112 .loc 1 759 0
1113 008c 0124 movs r4, #1
1114 .LVL126:
1115 008e C3E7 b .L95
1116 .LVL127:
1117 .L104:
1118 0090 0124 movs r4, #1
1119 .LVL128:
1120 0092 C1E7 b .L95
1121 .LVL129:
1122 .L105:
819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** return crsstatus;
821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1123 .loc 1 821 0
1124 0094 2000 movs r0, r4
1125 @ sp needed
1126 .LVL130:
1127 .LVL131:
1128 .LVL132:
1129 0096 70BD pop {r4, r5, r6, pc}
1130 .L108:
1131 .align 2
1132 .L107:
1133 0098 006C0040 .word 1073769472
1134 .cfi_endproc
1135 .LFE46:
1137 .section .text.HAL_RCCEx_CRS_SyncOkCallback,"ax",%progbits
1138 .align 1
1139 .weak HAL_RCCEx_CRS_SyncOkCallback
1140 .syntax unified
1141 .code 16
1142 .thumb_func
1143 .fpu softvfp
1145 HAL_RCCEx_CRS_SyncOkCallback:
1146 .LFB48:
822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief Handle the Clock Recovery System interrupt request.
825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval None
826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** void HAL_RCCEx_CRS_IRQHandler(void)
828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE;
830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */
831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itflags = READ_REG(CRS->ISR);
832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR);
ARM GAS /tmp/ccYdhGWl.s page 37
833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCOK flag */
835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_SYNCOK) != RESET) && ((itsources & RCC_CRS_IT_SYNCOK) != RESET))
836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNC event OK flag */
838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCOKC);
839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */
841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncOkCallback();
842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS SYNCWARN flag */
844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_SYNCWARN) != RESET) && ((itsources & RCC_CRS_IT_SYNCWARN) != RES
845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS SYNCWARN flag */
847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_SYNCWARNC);
848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */
850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_SyncWarnCallback();
851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Expected SYNC flag */
853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else if(((itflags & RCC_CRS_FLAG_ESYNC) != RESET) && ((itsources & RCC_CRS_IT_ESYNC) != RESET))
854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* frequency error counter reached a zero value */
856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ESYNCC);
857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user callback */
859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ExpectedSyncCallback();
860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Check CRS Error flags */
862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** else
863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if(((itflags & RCC_CRS_FLAG_ERR) != RESET) && ((itsources & RCC_CRS_IT_ERR) != RESET))
865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCERR) != RESET)
867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCERR;
869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_SYNCMISS) != RESET)
871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_SYNCMISS;
873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** if((itflags & RCC_CRS_FLAG_TRIMOVF) != RESET)
875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** crserror |= RCC_CRS_TRIMOVF;
877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Clear CRS Error flags */
880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** WRITE_REG(CRS->ICR, CRS_ICR_ERRC);
881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* user error callback */
883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** HAL_RCCEx_CRS_ErrorCallback(crserror);
884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCOK interrupt callback.
ARM GAS /tmp/ccYdhGWl.s page 38
890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none
891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncOkCallback(void)
893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1147 .loc 1 893 0
1148 .cfi_startproc
1149 @ args = 0, pretend = 0, frame = 0
1150 @ frame_needed = 0, uses_anonymous_args = 0
1151 @ link register save eliminated.
894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncOkCallback should be implemented in the user file
896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1152 .loc 1 897 0
1153 @ sp needed
1154 0000 7047 bx lr
1155 .cfi_endproc
1156 .LFE48:
1158 .section .text.HAL_RCCEx_CRS_SyncWarnCallback,"ax",%progbits
1159 .align 1
1160 .weak HAL_RCCEx_CRS_SyncWarnCallback
1161 .syntax unified
1162 .code 16
1163 .thumb_func
1164 .fpu softvfp
1166 HAL_RCCEx_CRS_SyncWarnCallback:
1167 .LFB49:
898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System SYNCWARN interrupt callback.
901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none
902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_SyncWarnCallback(void)
904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1168 .loc 1 904 0
1169 .cfi_startproc
1170 @ args = 0, pretend = 0, frame = 0
1171 @ frame_needed = 0, uses_anonymous_args = 0
1172 @ link register save eliminated.
905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_SyncWarnCallback should be implemented in the user file
907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1173 .loc 1 908 0
1174 @ sp needed
1175 0000 7047 bx lr
1176 .cfi_endproc
1177 .LFE49:
1179 .section .text.HAL_RCCEx_CRS_ExpectedSyncCallback,"ax",%progbits
1180 .align 1
1181 .weak HAL_RCCEx_CRS_ExpectedSyncCallback
1182 .syntax unified
1183 .code 16
1184 .thumb_func
1185 .fpu softvfp
1187 HAL_RCCEx_CRS_ExpectedSyncCallback:
1188 .LFB50:
ARM GAS /tmp/ccYdhGWl.s page 39
909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Expected SYNC interrupt callback.
912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none
913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ExpectedSyncCallback(void)
915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1189 .loc 1 915 0
1190 .cfi_startproc
1191 @ args = 0, pretend = 0, frame = 0
1192 @ frame_needed = 0, uses_anonymous_args = 0
1193 @ link register save eliminated.
916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ExpectedSyncCallback should be implemented in the user file
918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1194 .loc 1 919 0
1195 @ sp needed
1196 0000 7047 bx lr
1197 .cfi_endproc
1198 .LFE50:
1200 .section .text.HAL_RCCEx_CRS_ErrorCallback,"ax",%progbits
1201 .align 1
1202 .weak HAL_RCCEx_CRS_ErrorCallback
1203 .syntax unified
1204 .code 16
1205 .thumb_func
1206 .fpu softvfp
1208 HAL_RCCEx_CRS_ErrorCallback:
1209 .LFB51:
920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /**
922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @brief RCCEx Clock Recovery System Error interrupt callback.
923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @param Error Combination of Error status.
924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * This parameter can be a combination of the following values:
925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCERR
926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_SYNCMISS
927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @arg @ref RCC_CRS_TRIMOVF
928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** * @retval none
929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** __weak void HAL_RCCEx_CRS_ErrorCallback(uint32_t Error)
931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1210 .loc 1 931 0
1211 .cfi_startproc
1212 @ args = 0, pretend = 0, frame = 0
1213 @ frame_needed = 0, uses_anonymous_args = 0
1214 @ link register save eliminated.
1215 .LVL133:
932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Prevent unused argument(s) compilation warning */
933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** UNUSED(Error);
934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* NOTE : This function should not be modified, when the callback is needed,
936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** the @ref HAL_RCCEx_CRS_ErrorCallback should be implemented in the user file
937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** */
938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1216 .loc 1 938 0
1217 @ sp needed
ARM GAS /tmp/ccYdhGWl.s page 40
1218 0000 7047 bx lr
1219 .cfi_endproc
1220 .LFE51:
1222 .section .text.HAL_RCCEx_CRS_IRQHandler,"ax",%progbits
1223 .align 1
1224 .global HAL_RCCEx_CRS_IRQHandler
1225 .syntax unified
1226 .code 16
1227 .thumb_func
1228 .fpu softvfp
1230 HAL_RCCEx_CRS_IRQHandler:
1231 .LFB47:
828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t crserror = RCC_CRS_NONE;
1232 .loc 1 828 0
1233 .cfi_startproc
1234 @ args = 0, pretend = 0, frame = 0
1235 @ frame_needed = 0, uses_anonymous_args = 0
1236 0000 10B5 push {r4, lr}
1237 .LCFI4:
1238 .cfi_def_cfa_offset 8
1239 .cfi_offset 4, -8
1240 .cfi_offset 14, -4
1241 .LVL134:
831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** uint32_t itsources = READ_REG(CRS->CR);
1242 .loc 1 831 0
1243 0002 1C4A ldr r2, .L125
1244 0004 9368 ldr r3, [r2, #8]
1245 .LVL135:
832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
1246 .loc 1 832 0
1247 0006 1268 ldr r2, [r2]
1248 .LVL136:
835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1249 .loc 1 835 0
1250 0008 D907 lsls r1, r3, #31
1251 000a 01D5 bpl .L114
835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1252 .loc 1 835 0 is_stmt 0 discriminator 1
1253 000c D107 lsls r1, r2, #31
1254 000e 1CD4 bmi .L122
1255 .L114:
844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1256 .loc 1 844 0 is_stmt 1
1257 0010 9907 lsls r1, r3, #30
1258 0012 01D5 bpl .L116
844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1259 .loc 1 844 0 is_stmt 0 discriminator 1
1260 0014 9107 lsls r1, r2, #30
1261 0016 1ED4 bmi .L123
1262 .L116:
853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1263 .loc 1 853 0 is_stmt 1
1264 0018 1907 lsls r1, r3, #28
1265 001a 01D5 bpl .L117
853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1266 .loc 1 853 0 is_stmt 0 discriminator 1
1267 001c 1107 lsls r1, r2, #28
ARM GAS /tmp/ccYdhGWl.s page 41
1268 001e 20D4 bmi .L124
1269 .L117:
864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1270 .loc 1 864 0 is_stmt 1
1271 0020 5907 lsls r1, r3, #29
1272 0022 11D5 bpl .L113
864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1273 .loc 1 864 0 is_stmt 0 discriminator 1
1274 0024 5207 lsls r2, r2, #29
1275 0026 0FD5 bpl .L113
1276 .LVL137:
866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1277 .loc 1 866 0 is_stmt 1
1278 0028 DA05 lsls r2, r3, #23
1279 002a 20D4 bmi .L121
829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** /* Get current IT flags and IT sources values */
1280 .loc 1 829 0
1281 002c 0020 movs r0, #0
1282 .L118:
1283 .LVL138:
870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1284 .loc 1 870 0
1285 002e 9A05 lsls r2, r3, #22
1286 0030 01D5 bpl .L119
872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1287 .loc 1 872 0
1288 0032 1022 movs r2, #16
1289 0034 1043 orrs r0, r2
1290 .LVL139:
1291 .L119:
874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** {
1292 .loc 1 874 0
1293 0036 5B05 lsls r3, r3, #21
1294 0038 01D5 bpl .L120
1295 .LVL140:
876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1296 .loc 1 876 0
1297 003a 2023 movs r3, #32
1298 003c 1843 orrs r0, r3
1299 .LVL141:
1300 .L120:
880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
1301 .loc 1 880 0
1302 003e 0D4B ldr r3, .L125
1303 0040 0422 movs r2, #4
1304 0042 DA60 str r2, [r3, #12]
883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1305 .loc 1 883 0
1306 0044 FFF7FEFF bl HAL_RCCEx_CRS_ErrorCallback
1307 .LVL142:
1308 .L113:
886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
1309 .loc 1 886 0
1310 @ sp needed
1311 0048 10BD pop {r4, pc}
1312 .LVL143:
1313 .L122:
ARM GAS /tmp/ccYdhGWl.s page 42
838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
1314 .loc 1 838 0
1315 004a 0A4B ldr r3, .L125
1316 .LVL144:
1317 004c 0122 movs r2, #1
1318 .LVL145:
1319 004e DA60 str r2, [r3, #12]
841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1320 .loc 1 841 0
1321 0050 FFF7FEFF bl HAL_RCCEx_CRS_SyncOkCallback
1322 .LVL146:
1323 0054 F8E7 b .L113
1324 .LVL147:
1325 .L123:
847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
1326 .loc 1 847 0
1327 0056 074B ldr r3, .L125
1328 .LVL148:
1329 0058 0222 movs r2, #2
1330 .LVL149:
1331 005a DA60 str r2, [r3, #12]
850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1332 .loc 1 850 0
1333 005c FFF7FEFF bl HAL_RCCEx_CRS_SyncWarnCallback
1334 .LVL150:
1335 0060 F2E7 b .L113
1336 .LVL151:
1337 .L124:
856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c ****
1338 .loc 1 856 0
1339 0062 044B ldr r3, .L125
1340 .LVL152:
1341 0064 0822 movs r2, #8
1342 .LVL153:
1343 0066 DA60 str r2, [r3, #12]
859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1344 .loc 1 859 0
1345 0068 FFF7FEFF bl HAL_RCCEx_CRS_ExpectedSyncCallback
1346 .LVL154:
1347 006c ECE7 b .L113
1348 .LVL155:
1349 .L121:
868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_rcc_ex.c **** }
1350 .loc 1 868 0
1351 006e 0820 movs r0, #8
1352 0070 DDE7 b .L118
1353 .L126:
1354 0072 C046 .align 2
1355 .L125:
1356 0074 006C0040 .word 1073769472
1357 .cfi_endproc
1358 .LFE47:
1360 .text
1361 .Letext0:
1362 .file 2 "/home/janhenrik/programme/gcc-arm-none-eabi-7-2018-q2-update/arm-none-eabi/include/machin
1363 .file 3 "/home/janhenrik/programme/gcc-arm-none-eabi-7-2018-q2-update/arm-none-eabi/include/sys/_s
1364 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h"
ARM GAS /tmp/ccYdhGWl.s page 43
1365 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h"
1366 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h"
1367 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h"
1368 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc_ex.h"
1369 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h"
1370 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_rcc.h"
ARM GAS /tmp/ccYdhGWl.s page 44
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f0xx_hal_rcc_ex.c
/tmp/ccYdhGWl.s:16 .text.HAL_RCCEx_PeriphCLKConfig:0000000000000000 $t
/tmp/ccYdhGWl.s:23 .text.HAL_RCCEx_PeriphCLKConfig:0000000000000000 HAL_RCCEx_PeriphCLKConfig
/tmp/ccYdhGWl.s:280 .text.HAL_RCCEx_PeriphCLKConfig:000000000000013c $d
/tmp/ccYdhGWl.s:291 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000000 $t
/tmp/ccYdhGWl.s:298 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000000 HAL_RCCEx_GetPeriphCLKConfig
/tmp/ccYdhGWl.s:357 .text.HAL_RCCEx_GetPeriphCLKConfig:0000000000000048 $d
/tmp/ccYdhGWl.s:367 .text.HAL_RCCEx_GetPeriphCLKFreq:0000000000000000 $t
/tmp/ccYdhGWl.s:374 .text.HAL_RCCEx_GetPeriphCLKFreq:0000000000000000 HAL_RCCEx_GetPeriphCLKFreq
/tmp/ccYdhGWl.s:817 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000000001e0 $d
/tmp/ccYdhGWl.s:826 .text.HAL_RCCEx_CRSConfig:0000000000000000 $t
/tmp/ccYdhGWl.s:833 .text.HAL_RCCEx_CRSConfig:0000000000000000 HAL_RCCEx_CRSConfig
/tmp/ccYdhGWl.s:893 .text.HAL_RCCEx_CRSConfig:0000000000000044 $d
/tmp/ccYdhGWl.s:901 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:0000000000000000 $t
/tmp/ccYdhGWl.s:908 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:0000000000000000 HAL_RCCEx_CRSSoftwareSynchronizationGenerate
/tmp/ccYdhGWl.s:927 .text.HAL_RCCEx_CRSSoftwareSynchronizationGenerate:000000000000000c $d
/tmp/ccYdhGWl.s:932 .text.HAL_RCCEx_CRSGetSynchronizationInfo:0000000000000000 $t
/tmp/ccYdhGWl.s:939 .text.HAL_RCCEx_CRSGetSynchronizationInfo:0000000000000000 HAL_RCCEx_CRSGetSynchronizationInfo
/tmp/ccYdhGWl.s:975 .text.HAL_RCCEx_CRSGetSynchronizationInfo:0000000000000028 $d
/tmp/ccYdhGWl.s:980 .text.HAL_RCCEx_CRSWaitSynchronization:0000000000000000 $t
/tmp/ccYdhGWl.s:987 .text.HAL_RCCEx_CRSWaitSynchronization:0000000000000000 HAL_RCCEx_CRSWaitSynchronization
/tmp/ccYdhGWl.s:1133 .text.HAL_RCCEx_CRSWaitSynchronization:0000000000000098 $d
/tmp/ccYdhGWl.s:1138 .text.HAL_RCCEx_CRS_SyncOkCallback:0000000000000000 $t
/tmp/ccYdhGWl.s:1145 .text.HAL_RCCEx_CRS_SyncOkCallback:0000000000000000 HAL_RCCEx_CRS_SyncOkCallback
/tmp/ccYdhGWl.s:1159 .text.HAL_RCCEx_CRS_SyncWarnCallback:0000000000000000 $t
/tmp/ccYdhGWl.s:1166 .text.HAL_RCCEx_CRS_SyncWarnCallback:0000000000000000 HAL_RCCEx_CRS_SyncWarnCallback
/tmp/ccYdhGWl.s:1180 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:0000000000000000 $t
/tmp/ccYdhGWl.s:1187 .text.HAL_RCCEx_CRS_ExpectedSyncCallback:0000000000000000 HAL_RCCEx_CRS_ExpectedSyncCallback
/tmp/ccYdhGWl.s:1201 .text.HAL_RCCEx_CRS_ErrorCallback:0000000000000000 $t
/tmp/ccYdhGWl.s:1208 .text.HAL_RCCEx_CRS_ErrorCallback:0000000000000000 HAL_RCCEx_CRS_ErrorCallback
/tmp/ccYdhGWl.s:1223 .text.HAL_RCCEx_CRS_IRQHandler:0000000000000000 $t
/tmp/ccYdhGWl.s:1230 .text.HAL_RCCEx_CRS_IRQHandler:0000000000000000 HAL_RCCEx_CRS_IRQHandler
/tmp/ccYdhGWl.s:1356 .text.HAL_RCCEx_CRS_IRQHandler:0000000000000074 $d
UNDEFINED SYMBOLS
HAL_GetTick
__aeabi_uidiv
HAL_RCC_GetPCLK1Freq
HAL_RCC_GetSysClockFreq
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