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path: root/hid-dials/build/stm32f0xx_hal_adc.lst
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Diffstat (limited to 'hid-dials/build/stm32f0xx_hal_adc.lst')
-rw-r--r--hid-dials/build/stm32f0xx_hal_adc.lst5976
1 files changed, 5976 insertions, 0 deletions
diff --git a/hid-dials/build/stm32f0xx_hal_adc.lst b/hid-dials/build/stm32f0xx_hal_adc.lst
new file mode 100644
index 0000000..1c1414d
--- /dev/null
+++ b/hid-dials/build/stm32f0xx_hal_adc.lst
@@ -0,0 +1,5976 @@
+ARM GAS /tmp/cchTrxI7.s page 1
+
+
+ 1 .cpu cortex-m0
+ 2 .eabi_attribute 20, 1
+ 3 .eabi_attribute 21, 1
+ 4 .eabi_attribute 23, 3
+ 5 .eabi_attribute 24, 1
+ 6 .eabi_attribute 25, 1
+ 7 .eabi_attribute 26, 1
+ 8 .eabi_attribute 30, 1
+ 9 .eabi_attribute 34, 0
+ 10 .eabi_attribute 18, 4
+ 11 .file "stm32f0xx_hal_adc.c"
+ 12 .text
+ 13 .Ltext0:
+ 14 .cfi_sections .debug_frame
+ 15 .section .text.ADC_ConversionStop,"ax",%progbits
+ 16 .align 1
+ 17 .syntax unified
+ 18 .code 16
+ 19 .thumb_func
+ 20 .fpu softvfp
+ 22 ADC_ConversionStop:
+ 23 .LFB64:
+ 24 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c"
+ 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ******************************************************************************
+ 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @file stm32f0xx_hal_adc.c
+ 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @author MCD Application Team
+ 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief This file provides firmware functions to manage the following
+ 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * functionalities of the Analog to Digital Convertor (ADC)
+ 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * peripheral:
+ 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + Initialization and de-initialization functions
+ 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Initialization and Configuration of ADC
+ 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + Operation functions
+ 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Start, stop, get result of conversions of regular
+ 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * group, using 3 possible modes: polling, interruption or DMA.
+ 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + Control functions
+ 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Channels configuration on regular group
+ 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Analog Watchdog configuration
+ 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * + State functions
+ 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ ADC state machine management
+ 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ++ Interrupts and flags management
+ 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Other functions (extended functions) are available in file
+ 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "stm32f0xx_hal_adc_ex.c".
+ 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *
+ 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim
+ 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ==============================================================================
+ 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### ADC peripheral features #####
+ 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ==============================================================================
+ 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
+ 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Interrupt generation at the end of regular conversion and in case of
+ 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** analog watchdog or overrun events.
+ 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Single and continuous conversion modes.
+ 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Scan mode for conversion of several channels sequentially.
+ ARM GAS /tmp/cchTrxI7.s page 2
+
+
+ 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Data alignment with in-built data coherency.
+ 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Programmable sampling time (common for all channels)
+ 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC conversion of regular group.
+ 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) External trigger (timer or EXTI) with configurable polarity
+ 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) DMA request generation for transfer of conversions data of regular group.
+ 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC calibration
+ 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC supply requirements: 2.4 V to 3.6 V at full speed and down to 1.8 V at
+ 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** slower speed.
+ 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ADC input range: from Vref- (connected to Vssa) to Vref+ (connected to
+ 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Vdda or to an external voltage reference).
+ 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### How to use this driver #####
+ 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ==============================================================================
+ 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Configuration of top level parameters related to ADC ***
+ 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================
+ 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Enable the ADC interface
+ 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) As prerequisite, ADC clock must be configured at RCC top level.
+ 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Caution: On STM32F0, ADC clock frequency max is 14MHz (refer
+ 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** to device datasheet).
+ 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Therefore, ADC clock prescaler must be configured in
+ 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function of ADC clock source frequency to remain below
+ 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** this maximum frequency.
+ 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Two clock settings are mandatory:
+ 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) ADC clock (core clock, also possibly conversion clock).
+ 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) ADC clock (conversions clock).
+ 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Two possible clock sources: synchronous clock derived from APB clock
+ 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** or asynchronous clock derived from ADC dedicated HSI RC oscillator
+ 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** 14MHz.
+ 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** If asynchronous clock is selected, parameter "HSI14State" must be set either:
+ 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** - to "...HSI14State = RCC_HSI14_ADC_CONTROL" to let the ADC control
+ 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** the HSI14 oscillator enable/disable (if not used to supply the main
+ 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** system clock): feature used if ADC mode LowPowerAutoPowerOff is
+ 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** enabled.
+ 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** - to "...HSI14State = RCC_HSI14_ON" to maintain the HSI14 oscillator
+ 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** always enabled: can be used to supply the main system clock.
+ 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Example:
+ 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Into HAL_ADC_MspInit() (recommended code location) or with
+ 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** other device clock parameters configuration:
+ 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) __HAL_RCC_ADC1_CLK_ENABLE(); (mandatory)
+ 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HI14 enable or let under control of ADC: (optional: if asynchronous clock
+ ARM GAS /tmp/cchTrxI7.s page 3
+
+
+ 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitTypeDef RCC_OscInitStructure;
+ 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
+ 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14CalibrationValue = RCC_HSI14CALIBRATION_DEFAULT;
+ 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_ADC_CONTROL;
+ 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.PLL... (optional if used for system clock)
+ 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
+ 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC clock source and clock prescaler are configured at ADC level with
+ 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** parameter "ClockPrescaler" using function HAL_ADC_Init().
+ 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) ADC pins configuration
+ 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Enable the clock for the ADC GPIOs
+ 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_ENABLE()
+ 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure these ADC pins in analog mode
+ 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_GPIO_Init()
+ 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions:
+ 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure the NVIC for ADC
+ 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(ADCx_IRQn)
+ 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
+ 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** into the function of corresponding ADC interruption vector
+ 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADCx_IRQHandler().
+ 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of DMA:
+ 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure the DMA (DMA channel, mode normal or circular, ...)
+ 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_DMA_Init().
+ 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Configure the NVIC for DMA
+ 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_EnableIRQ(DMAx_Channelx_IRQn)
+ 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Insert the ADC interruption handler function HAL_ADC_IRQHandler()
+ 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** into the function of corresponding DMA interruption vector
+ 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** DMAx_Channelx_IRQHandler().
+ 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Configuration of ADC, group regular, channels parameters ***
+ 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ================================================================
+ 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Configure the ADC parameters (resolution, data alignment, ...)
+ 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** and regular group parameters (conversion trigger, sequencer, ...)
+ 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Init().
+ 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Configure the channels for regular group parameters (channel number,
+ 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** channel rank into sequencer, ..., into regular group)
+ 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_ConfigChannel().
+ 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, configure the analog watchdog parameters (channels
+ 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** monitored, thresholds, ...)
+ 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_AnalogWDGConfig().
+ 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Execution of ADC conversions ***
+ 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ====================================
+ 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, perform an automatic ADC calibration to improve the
+ 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** conversion accuracy
+ 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADCEx_Calibration_Start().
+ 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) ADC driver can be used among three modes: polling, interruption,
+ ARM GAS /tmp/cchTrxI7.s page 4
+
+
+ 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** transfer by DMA.
+ 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC conversion by polling:
+ 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions
+ 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Start()
+ 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Wait for ADC conversion completion
+ 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_PollForConversion()
+ 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Retrieve conversion results
+ 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_GetValue()
+ 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral
+ 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Stop()
+ 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC conversion by interruption:
+ 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions
+ 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Start_IT()
+ 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function
+ 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback()
+ 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (this function must be implemented in user program)
+ 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Retrieve conversion results
+ 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_GetValue()
+ 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral
+ 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Stop_IT()
+ 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC conversion with transfer by DMA:
+ 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Activate the ADC peripheral and start conversions
+ 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Start_DMA()
+ 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Wait for ADC conversion completion by call of function
+ 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback() or HAL_ADC_ConvHalfCpltCallback()
+ 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (these functions must be implemented in user program)
+ 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Conversion results are automatically transferred by DMA into
+ 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** destination variable address.
+ 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Stop conversion and disable the ADC peripheral
+ 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_ADC_Stop_DMA()
+ 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (@) Callback functions must be implemented in user program:
+ 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_ErrorCallback()
+ 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_LevelOutOfWindowCallback() (callback of analog watchdog)
+ 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_ConvCpltCallback()
+ 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+@) HAL_ADC_ConvHalfCpltCallback
+ 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Deinitialization of ADC ***
+ 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ============================================================
+ 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Disable the ADC interface
+ 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC clock can be hard reset and disabled at RCC top level.
+ 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Hard reset of ADC peripherals
+ 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using macro __ADCx_FORCE_RESET(), __ADCx_RELEASE_RESET().
+ 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) ADC clock disable
+ 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using the equivalent macro/functions as configuration step.
+ 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) Example:
+ 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Into HAL_ADC_MspDeInit() (recommended code location) or with
+ 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** other device clock parameters configuration:
+ 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.OscillatorType = RCC_OSCILLATORTYPE_HSI14;
+ 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) RCC_OscInitStructure.HSI14State = RCC_HSI14_OFF; (if not used for system clock
+ ARM GAS /tmp/cchTrxI7.s page 5
+
+
+ 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+++) HAL_RCC_OscConfig(&RCC_OscInitStructure);
+ 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) ADC pins configuration
+ 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Disable the clock for the ADC GPIOs
+ 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using macro __HAL_RCC_GPIOx_CLK_DISABLE()
+ 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of ADC with interruptions:
+ 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Disable the NVIC for ADC
+ 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_DisableIRQ(ADCx_IRQn)
+ 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (#) Optionally, in case of usage of DMA:
+ 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Deinitialize the DMA
+ 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_DMA_DeInit().
+ 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (++) Disable the NVIC for DMA
+ 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using function HAL_NVIC_DisableIRQ(DMAx_Channelx_IRQn)
+ 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *** Callback registration ***
+ 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** =============================================
+ 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** The compilation flag USE_HAL_ADC_REGISTER_CALLBACKS, when set to 1,
+ 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** allows the user to configure dynamically the driver callbacks.
+ 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Use Functions @ref HAL_ADC_RegisterCallback()
+ 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** to register an interrupt callback.
+ 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Function @ref HAL_ADC_RegisterCallback() allows to register following callbacks:
+ 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvCpltCallback : ADC conversion complete callback
+ 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
+ 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
+ 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ErrorCallback : ADC error callback
+ 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback
+ 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback
+ 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This function takes as parameters the HAL peripheral handle, the Callback ID
+ 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** and a pointer to the user callback function.
+ 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Use function @ref HAL_ADC_UnRegisterCallback to reset a callback to the default
+ 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** weak function.
+ 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @ref HAL_ADC_UnRegisterCallback takes as parameters the HAL peripheral handle,
+ 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** and the Callback ID.
+ 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This function allows to reset following callbacks:
+ 252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvCpltCallback : ADC conversion complete callback
+ 253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ConvHalfCpltCallback : ADC conversion DMA half-transfer callback
+ 254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) LevelOutOfWindowCallback : ADC analog watchdog 1 callback
+ 255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) ErrorCallback : ADC error callback
+ 256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback
+ 257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback
+ 258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** By default, after the @ref HAL_ADC_Init() and when the state is @ref HAL_ADC_STATE_RESET
+ 261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** all callbacks are set to the corresponding weak functions:
+ 262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** examples @ref HAL_ADC_ConvCpltCallback(), @ref HAL_ADC_ErrorCallback().
+ ARM GAS /tmp/cchTrxI7.s page 6
+
+
+ 263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Exception done for MspInit and MspDeInit functions that are
+ 264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** reset to the legacy weak functions in the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit() only when
+ 265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** these callbacks are null (not registered beforehand).
+ 266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** If MspInit or MspDeInit are not null, the @ref HAL_ADC_Init()/ @ref HAL_ADC_DeInit()
+ 269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** keep and use the user MspInit/MspDeInit callbacks (registered beforehand) whatever the state.
+ 270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Callbacks can be registered/unregistered in @ref HAL_ADC_STATE_READY state only.
+ 273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Exception done MspInit/MspDeInit functions that can be registered/unregistered
+ 274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** in @ref HAL_ADC_STATE_READY or @ref HAL_ADC_STATE_RESET state,
+ 275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
+ 276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** Then, the user first registers the MspInit/MspDeInit user callbacks
+ 279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** using @ref HAL_ADC_RegisterCallback() before calling @ref HAL_ADC_DeInit()
+ 280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** or @ref HAL_ADC_Init() function.
+ 281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+ 282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** When the compilation flag USE_HAL_ADC_REGISTER_CALLBACKS is set to 0 or
+ 284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** not defined, the callback registration feature is not available and all callbacks
+ 285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** are set to the corresponding weak functions.
+ 286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim
+ 288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ******************************************************************************
+ 289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @attention
+ 290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *
+ 291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+ 292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * All rights reserved.</center></h2>
+ 293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *
+ 294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This software component is licensed by ST under BSD 3-Clause license,
+ 295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the "License"; You may not use this file except in compliance with the
+ 296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * License. You may obtain a copy of the License at:
+ 297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * opensource.org/licenses/BSD-3-Clause
+ 298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *
+ 299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ******************************************************************************
+ 300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Includes ------------------------------------------------------------------*/
+ 303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #include "stm32f0xx_hal.h"
+ 304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @addtogroup STM32F0xx_HAL_Driver
+ 306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+ 307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC ADC
+ 310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief ADC HAL module driver
+ 311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+ 312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #ifdef HAL_ADC_MODULE_ENABLED
+ 315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private typedef -----------------------------------------------------------*/
+ 317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private define ------------------------------------------------------------*/
+ 318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Constants ADC Private Constants
+ 319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+ ARM GAS /tmp/cchTrxI7.s page 7
+
+
+ 320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Fixed timeout values for ADC calibration, enable settling time, disable */
+ 323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* settling time. */
+ 324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Values defined to be higher than worst cases: low clock frequency, */
+ 325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* maximum prescaler. */
+ 326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Ex of profile low frequency : Clock source at 0.1 MHz, ADC clock */
+ 327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* prescaler 4, sampling time 7.5 ADC clock cycles, resolution 12 bits. */
+ 328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unit: ms */
+ 329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_ENABLE_TIMEOUT ( 2U)
+ 330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_DISABLE_TIMEOUT ( 2U)
+ 331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_STOP_CONVERSION_TIMEOUT ( 2U)
+ 332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for ADC stabilization time. */
+ 334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
+ 335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unit: us */
+ 336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_STAB_DELAY_US ( 1U)
+ 337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for temperature sensor stabilization time. */
+ 339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
+ 340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unit: us */
+ 341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #define ADC_TEMPSENSOR_DELAY_US ( 10U)
+ 342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @}
+ 345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private macro -------------------------------------------------------------*/
+ 348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private variables ---------------------------------------------------------*/
+ 349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Private function prototypes -----------------------------------------------*/
+ 350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions
+ 351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+ 352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc);
+ 354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc);
+ 355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc);
+ 356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma);
+ 357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma);
+ 358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAError(DMA_HandleTypeDef *hdma);
+ 359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @}
+ 361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Exported functions ---------------------------------------------------------*/
+ 364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions ADC Exported Functions
+ 366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+ 367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group1 Initialization/de-initialization functions
+ 370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initialization and Configuration functions
+ 371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *
+ 372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim
+ 373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ===============================================================================
+ 374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Initialization and de-initialization functions #####
+ 375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ===============================================================================
+ 376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to:
+ ARM GAS /tmp/cchTrxI7.s page 8
+
+
+ 377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Initialize and configure the ADC.
+ 378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) De-initialize the ADC
+ 379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim
+ 380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+ 381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initializes the ADC peripheral and regular group according to
+ 385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameters specified in structure "ADC_InitTypeDef".
+ 386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note As prerequisite, ADC clock must be configured at RCC top level
+ 387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * depending on both possible clock sources: APB clock of HSI clock.
+ 388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * See commented example code below that can be copied and uncommented
+ 389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * into HAL_ADC_MspInit().
+ 390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly:
+ 391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes the ADC MSP (HAL_ADC_MspInit()) only when
+ 392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * coming from ADC state reset. Following calls to this function can
+ 393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * be used to reconfigure some parameters of ADC_InitTypeDef
+ 394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * structure on the fly, without modifying MSP configuration. If ADC
+ 395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * MSP has to be modified again, HAL_ADC_DeInit() must be called
+ 396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * before HAL_ADC_Init().
+ 397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state.
+ 398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure
+ 399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_InitTypeDef".
+ 400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function configures the ADC within 2 scopes: scope of entire
+ 401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC and scope of regular group. For parameters details, see comments
+ 402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_InitTypeDef".
+ 403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+ 404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+ 405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
+ 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpCFGR1 = 0U;
+ 410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check ADC handle */
+ 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(hadc == NULL)
+ 413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR;
+ 415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+ 418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+ 419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CLOCKPRESCALER(hadc->Init.ClockPrescaler));
+ 420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RESOLUTION(hadc->Init.Resolution));
+ 421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
+ 422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
+ 423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
+ 424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DiscontinuousConvMode));
+ 425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
+ 426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
+ 427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
+ 428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
+ 429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_OVERRUN(hadc->Init.Overrun));
+ 430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoWait));
+ 431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.LowPowerAutoPowerOff));
+ 432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* As prerequisite, into HAL_ADC_MspInit(), ADC clock must be configured */
+ ARM GAS /tmp/cchTrxI7.s page 9
+
+
+ 434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* at RCC top level depending on both possible clock sources: */
+ 435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* APB clock or HSI clock. */
+ 436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Refer to header of this file for more details on clock enabling procedure*/
+ 437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Actions performed only if ADC is coming from state reset: */
+ 439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Initialization of ADC MSP */
+ 440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC voltage regulator enable */
+ 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->State == HAL_ADC_STATE_RESET)
+ 442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Initialize ADC error code */
+ 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc);
+ 445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allocate lock resource and initialize it */
+ 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Lock = HAL_UNLOCKED;
+ 448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+ 450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the ADC Callback settings */
+ 451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback; /* Legacy weak
+ 452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback; /* Legacy weak
+ 453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback; /* Legacy weak
+ 454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback; /* Legacy weak
+ 455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->MspInitCallback == NULL)
+ 457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
+ 459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the low level hardware */
+ 462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback(hadc);
+ 463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else
+ 464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Init the low level hardware */
+ 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_MspInit(hadc);
+ 466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ 467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */
+ 470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* correctly completed. */
+ 471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* and if there is no conversion on going on regular group (ADC can be */
+ 472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enabled anyway, in case of call of this function to update a parameter */
+ 473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* on the fly). */
+ 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
+ 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) &&
+ 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) )
+ 477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+ 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+ 480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+ 481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL);
+ 482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */
+ 484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated only when ADC is disabled: */
+ 485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC clock mode */
+ 486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC clock prescaler */
+ 487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - ADC resolution */
+ 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET)
+ 489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Some parameters of this register are not reset, since they are set */
+ ARM GAS /tmp/cchTrxI7.s page 10
+
+
+ 491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by other functions and must be kept in case of usage of this */
+ 492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* function on the fly (update of a parameter of ADC_InitTypeDef */
+ 493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* without needing to reconfigure all other ADC groups/channels */
+ 494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameters): */
+ 495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - internal measurement paths: Vbat, temperature sensor, Vref */
+ 496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (set into HAL_ADC_ConfigChannel() ) */
+ 497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC resolution */
+ 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR1,
+ 500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_RES ,
+ 501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.Resolution );
+ 502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC clock mode: clock source AHB or HSI with */
+ 504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* selectable prescaler */
+ 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** MODIFY_REG(hadc->Instance->CFGR2 ,
+ 506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR2_CKMODE ,
+ 507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ClockPrescaler );
+ 508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC: */
+ 511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - discontinuous mode */
+ 512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - LowPowerAutoWait mode */
+ 513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - LowPowerAutoPowerOff mode */
+ 514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - continuous conversion mode */
+ 515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - overrun */
+ 516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - external trigger to start conversion */
+ 517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - external trigger polarity */
+ 518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - data alignment */
+ 519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - resolution */
+ 520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - scan direction */
+ 521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - DMA continuous request */
+ 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_DISCEN |
+ 523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF |
+ 524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTDLY |
+ 525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONT |
+ 526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVRMOD |
+ 527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTSEL |
+ 528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTEN |
+ 529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_ALIGN |
+ 530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_SCANDIR |
+ 531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACFG );
+ 532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= (ADC_CFGR1_AUTOWAIT((uint32_t)hadc->Init.LowPowerAutoWait) |
+ 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) |
+ 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
+ 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) |
+ 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign |
+ 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) |
+ 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) );
+ 540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable discontinuous mode only if continuous mode is disabled */
+ 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.DiscontinuousConvMode == ENABLE)
+ 543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.ContinuousConvMode == DISABLE)
+ 545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the selected ADC group regular discontinuous mode */
+ 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= ADC_CFGR1_DISCEN;
+ ARM GAS /tmp/cchTrxI7.s page 11
+
+
+ 548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+ 550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC regular group discontinuous was intended to be enabled, */
+ 552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* but ADC regular group modes continuous and sequencer discontinuous */
+ 553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* cannot be enabled simultaneously. */
+ 554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+ 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
+ 557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+ 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+ 560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable external trigger if trigger selection is different of software */
+ 564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* start. */
+ 565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: This configuration keeps the hardware feature of parameter */
+ 566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ExternalTrigConvEdge "trigger edge none" equivalent to */
+ 567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* software start. */
+ 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.ExternalTrigConv != ADC_SOFTWARE_START)
+ 569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpCFGR1 |= ( hadc->Init.ExternalTrigConv |
+ 571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge );
+ 572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC configuration register with previous settings */
+ 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= tmpCFGR1;
+ 576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */
+ 578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */
+ 579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (obsolete): sampling time set in this function if parameter */
+ 580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "SamplingTimeCommon" has been set to a valid sampling time. */
+ 581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Otherwise, sampling time is set into ADC channel initialization */
+ 582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* structure with parameter "SamplingTime" (obsolete). */
+ 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
+ 584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */
+ 586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the old sample time */
+ 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
+ 588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the new sample time */
+ 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR |= ADC_SMPR_SET(hadc->Init.SamplingTimeCommon);
+ 591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check back that ADC registers have effectively been configured to */
+ 594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ensure of no potential problem of ADC core IP clocking. */
+ 595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check through register CFGR1 (excluding analog watchdog configuration: */
+ 596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* set into separate dedicated function, and bits of ADC resolution set */
+ 597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* out of temporary variable 'tmpCFGR1'). */
+ 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->Instance->CFGR1 & ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1
+ 599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1)
+ 600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to none */
+ 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc);
+ 603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the ADC state */
+ ARM GAS /tmp/cchTrxI7.s page 12
+
+
+ 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+ 606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL,
+ 607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY);
+ 608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+ 610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+ 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+ 613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL,
+ 614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_ERROR_INTERNAL);
+ 615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+ 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+ 618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR;
+ 620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+ 624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+ 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
+ 627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR;
+ 629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+ 632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+ 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Deinitialize the ADC peripheral registers to their default reset
+ 638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * values, with deinitialization of the ADC MSP.
+ 639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note For devices with several ADCs: reset of ADC common registers is done
+ 640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * only if all ADCs sharing the same common group are disabled.
+ 641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * If this is not the case, reset of these common parameters reset is
+ 642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * bypassed without error reporting: it can be the intended behaviour in
+ 643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * case of reset of a single ADC while the other ADCs sharing the same
+ 644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * common group is still running.
+ 645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+ 646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+ 647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
+ 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check ADC handle */
+ 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(hadc == NULL)
+ 654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR;
+ 656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+ 659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+ 660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+ ARM GAS /tmp/cchTrxI7.s page 13
+
+
+ 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
+ 663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop potential conversion on going, on regular group */
+ 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc);
+ 666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */
+ 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+ 669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC peripheral */
+ 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc);
+ 672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */
+ 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR)
+ 675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state */
+ 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_READY;
+ 678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of ADC parameters if previous preliminary actions are */
+ 683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* correctly completed. */
+ 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_ERROR)
+ 685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Reset ADC registers ========== */
+ 688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register IER */
+ 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_AWD | ADC_IT_OVR |
+ 690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOS | ADC_IT_EOC |
+ 691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOSMP | ADC_IT_RDY ) );
+ 692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register ISR */
+ 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_AWD | ADC_FLAG_OVR |
+ 695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOS | ADC_FLAG_EOC |
+ 696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOSMP | ADC_FLAG_RDY ) );
+ 697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CR */
+ 699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Bits ADC_CR_ADCAL, ADC_CR_ADSTP, ADC_CR_ADSTART are in access mode */
+ 700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "read-set": no direct reset applicable. */
+ 701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CFGR1 */
+ 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~(ADC_CFGR1_AWDCH | ADC_CFGR1_AWDEN | ADC_CFGR1_AWDSGL | ADC_CFGR1_
+ 704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_
+ 705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_EXTEN | ADC_CFGR1_EXTSEL | ADC_CFGR1_ALIGN | ADC_CFGR1_
+ 706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_SCANDIR | ADC_CFGR1_DMACFG | ADC_CFGR1_DMAEN
+ 707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CFGR2 */
+ 709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Update of ADC clock mode is conditioned to ADC state disabled: */
+ 710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* already done above. */
+ 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR2 &= ~ADC_CFGR2_CKMODE;
+ 712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register SMPR */
+ 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~ADC_SMPR_SMP;
+ 715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register TR1 */
+ 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
+ 718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ ARM GAS /tmp/cchTrxI7.s page 14
+
+
+ 719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CHSELR */
+ 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR &= ~(ADC_CHSELR_CHSEL18 | ADC_CHSELR_CHSEL17 | ADC_CHSELR_CHSEL16 |
+ 721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_
+ 722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL11 | ADC_CHSELR_CHSEL10 | ADC_CHSELR_CHSEL9 | ADC_
+ 723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL7 | ADC_CHSELR_CHSEL6 | ADC_CHSELR_CHSEL5 | ADC_
+ 724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL3 | ADC_CHSELR_CHSEL2 | ADC_CHSELR_CHSEL1 | ADC_
+ 725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register DR */
+ 727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* bits in access mode read only, no direct reset applicable*/
+ 728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset register CCR */
+ 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR &= ~(ADC_CCR_ALL);
+ 731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Hard reset ADC peripheral ========== */
+ 733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Performs a global reset of the entire ADC peripheral: ADC state is */
+ 734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* forced to a similar state after device power-on. */
+ 735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If needed, copy-paste and uncomment the following reset code into */
+ 736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* function "void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)": */
+ 737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* */
+ 738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* __HAL_RCC_ADC1_FORCE_RESET() */
+ 739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* __HAL_RCC_ADC1_RELEASE_RESET() */
+ 740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+ 742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->MspDeInitCallback == NULL)
+ 743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
+ 745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* DeInit the low level hardware */
+ 748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback(hadc);
+ 749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else
+ 750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* DeInit the low level hardware */
+ 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_MspDeInit(hadc);
+ 752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ 753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to none */
+ 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc);
+ 756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+ 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->State = HAL_ADC_STATE_RESET;
+ 759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+ 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+ 763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+ 765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+ 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Initializes the ADC MSP.
+ 771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+ 772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+ 773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
+ 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ ARM GAS /tmp/cchTrxI7.s page 15
+
+
+ 776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+ 777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc);
+ 778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed,
+ 780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_MspInit must be implemented in the user file.
+ 781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DeInitializes the ADC MSP.
+ 786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+ 787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+ 788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
+ 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+ 792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc);
+ 793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed,
+ 795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_MspDeInit must be implemented in the user file.
+ 796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+ 800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Register a User ADC Callback
+ 802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * To be used instead of the weak predefined callback
+ 803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
+ 804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the configuration information for the specified ADC.
+ 805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param CallbackID ID of the callback to be registered
+ 806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values:
+ 807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
+ 808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
+ 809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
+ 810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
+ 811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet
+ 812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
+ 813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
+ 814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
+ 815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
+ 816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param pCallback pointer to the Callback function
+ 817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+ 818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_RegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Callb
+ 820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK;
+ 822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (pCallback == NULL)
+ 824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */
+ 826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+ 827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR;
+ 829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0)
+ 832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ ARM GAS /tmp/cchTrxI7.s page 16
+
+
+ 833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID)
+ 834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
+ 836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = pCallback;
+ 837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID :
+ 840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = pCallback;
+ 841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
+ 844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = pCallback;
+ 845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID :
+ 848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = pCallback;
+ 849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID :
+ 852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = pCallback;
+ 853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID :
+ 856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback;
+ 857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default :
+ 860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */
+ 861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+ 862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */
+ 864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR;
+ 865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State)
+ 869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID)
+ 871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID :
+ 873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = pCallback;
+ 874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID :
+ 877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = pCallback;
+ 878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default :
+ 881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */
+ 882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+ 883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */
+ 885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR;
+ 886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+ ARM GAS /tmp/cchTrxI7.s page 17
+
+
+ 890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */
+ 892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+ 893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */
+ 895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR;
+ 896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return status;
+ 899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Unregister a ADC Callback
+ 903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC callback is redirected to the weak predefined callback
+ 904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc Pointer to a ADC_HandleTypeDef structure that contains
+ 905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the configuration information for the specified ADC.
+ 906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param CallbackID ID of the callback to be unregistered
+ 907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values:
+ 908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_COMPLETE_CB_ID ADC conversion complete callback ID
+ 909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_CONVERSION_HALF_CB_ID ADC conversion complete callback ID
+ 910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID ADC analog watchdog 1 callback ID
+ 911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_ERROR_CB_ID ADC error callback ID
+ 912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_INJ_CONVERSION_COMPLETE_CB_ID ADC group injected conversion complet
+ 913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID ADC Msp Init callback ID
+ 914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID ADC Msp DeInit callback ID
+ 915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPINIT_CB_ID MspInit callback ID
+ 916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg @ref HAL_ADC_MSPDEINIT_CB_ID MspDeInit callback ID
+ 917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+ 918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_UnRegisterCallback(ADC_HandleTypeDef *hadc, HAL_ADC_CallbackIDTypeDef Cal
+ 920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef status = HAL_OK;
+ 922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->State & HAL_ADC_STATE_READY) != 0)
+ 924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID)
+ 926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_COMPLETE_CB_ID :
+ 928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback = HAL_ADC_ConvCpltCallback;
+ 929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_CONVERSION_HALF_CB_ID :
+ 932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback = HAL_ADC_ConvHalfCpltCallback;
+ 933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_LEVEL_OUT_OF_WINDOW_1_CB_ID :
+ 936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback = HAL_ADC_LevelOutOfWindowCallback;
+ 937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID :
+ 940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback = HAL_ADC_ErrorCallback;
+ 941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID :
+ 944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit */
+ 945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ ARM GAS /tmp/cchTrxI7.s page 18
+
+
+ 947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID :
+ 948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit */
+ 949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default :
+ 952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */
+ 953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+ 954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */
+ 956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR;
+ 957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else if (HAL_ADC_STATE_RESET == hadc->State)
+ 961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch (CallbackID)
+ 963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPINIT_CB_ID :
+ 965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspInitCallback = HAL_ADC_MspInit; /* Legacy weak MspInit
+ 966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case HAL_ADC_MSPDEINIT_CB_ID :
+ 969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->MspDeInitCallback = HAL_ADC_MspDeInit; /* Legacy weak MspDeInit
+ 970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default :
+ 973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */
+ 974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+ 975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */
+ 977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR;
+ 978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+ 982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update the error code */
+ 984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
+ 985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return error status */
+ 987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** status = HAL_ERROR;
+ 988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return status;
+ 991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ 994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+ 996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @}
+ 997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ 998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group2 IO operation functions
+1000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief IO operation functions
+1001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *
+1002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim
+1003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ===============================================================================
+ ARM GAS /tmp/cchTrxI7.s page 19
+
+
+1004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### IO operation functions #####
+1005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ===============================================================================
+1006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to:
+1007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group.
+1008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group.
+1009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Poll for conversion complete on regular group.
+1010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Poll for conversion event.
+1011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Get result of regular channel conversion.
+1012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group and enable interruptions.
+1013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group and disable interruptions.
+1014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Handle ADC interrupt request
+1015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Start conversion of regular group and enable DMA transfer.
+1016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Stop conversion of regular group and disable ADC DMA transfer.
+1017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim
+1018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+1019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group.
+1023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function: None.
+1024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+1026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
+1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+1030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */
+1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
+1036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */
+1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc);
+1039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */
+1041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
+1042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */
+1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
+1044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc);
+1046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */
+1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */
+1053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */
+1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+1055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A
+1056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY);
+1057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */
+1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc);
+1060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ ARM GAS /tmp/cchTrxI7.s page 20
+
+
+1061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+1062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */
+1063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */
+1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+1065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */
+1067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */
+1068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */
+1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
+1070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */
+1072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */
+1073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */
+1074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */
+1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART;
+1076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+1079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY;
+1081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+1084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable ADC peripheral.
+1089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status.
+1091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
+1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+1095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */
+1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc);
+1101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */
+1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc);
+1104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */
+1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */
+1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc);
+1110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */
+1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+1116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+1117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY);
+ ARM GAS /tmp/cchTrxI7.s page 21
+
+
+1118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+1123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+1125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Wait for regular group conversion to be completed.
+1130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note ADC conversion flags EOS (end of sequence) and EOC (end of
+1131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * conversion) are cleared by this function, with an exception:
+1132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * if low power feature "LowPowerAutoWait" is enabled, flags are
+1133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * not cleared to not interfere with this feature until data register
+1134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * is read using function HAL_ADC_GetValue().
+1135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function cannot be used in a particular setup: ADC configured
+1136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * in DMA mode and polling for end of each conversion (ADC init
+1137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
+1138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * In this case, DMA resets the flag EOC and polling cannot be
+1139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * performed on each conversion. Nevertheless, polling can still
+1140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * be performed on the complete sequence (ADC init
+1141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SEQ_CONV).
+1142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Timeout Timeout value in millisecond.
+1144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+1145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
+1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart;
+1149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmp_Flag_EOC;
+1150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If end of conversion selected to end of sequence */
+1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
+1156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_Flag_EOC = ADC_FLAG_EOS;
+1158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If end of conversion selected to end of each conversion */
+1160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else /* ADC_EOC_SINGLE_CONV */
+1161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification that ADC configuration is compliant with polling for */
+1163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* each conversion: */
+1164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Particular case is ADC configured in DMA mode and ADC sequencer with */
+1165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* several ranks and polling for end of each conversion. */
+1166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* For code simplicity sake, this particular case is generalized to */
+1167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC configured in DMA mode and and polling for end of each conversion. */
+1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN))
+1169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
+1172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+ ARM GAS /tmp/cchTrxI7.s page 22
+
+
+1175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR;
+1177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+1179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_Flag_EOC = (ADC_FLAG_EOC | ADC_FLAG_EOS);
+1181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */
+1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick();
+1186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait until End of Conversion flag is raised */
+1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(HAL_IS_BIT_CLR(hadc->Instance->ISR, tmp_Flag_EOC))
+1189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */
+1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY)
+1192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
+1194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to timeout */
+1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
+1197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+1200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_TIMEOUT;
+1202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine */
+1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
+1208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */
+1210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */
+1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
+1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) )
+1213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */
+1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
+1216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
+1218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */
+1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
+1220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */
+1222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */
+1223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */
+1224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */
+1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
+1226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+1229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+1230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY);
+1231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ ARM GAS /tmp/cchTrxI7.s page 23
+
+
+1232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+1233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */
+1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
+1236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+1239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear end of conversion flag of regular group if low power feature */
+1244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* "LowPowerAutoWait " is disabled, to not interfere with this feature */
+1245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* until data register is read using function HAL_ADC_GetValue(). */
+1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoWait == DISABLE)
+1247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag */
+1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS));
+1250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */
+1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK;
+1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Poll for conversion event.
+1258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param EventType the ADC event type.
+1260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This parameter can be one of the following values:
+1261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg ADC_AWD_EVENT: ADC Analog watchdog event
+1262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @arg ADC_OVR_EVENT: ADC Overrun event
+1263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Timeout Timeout value in millisecond.
+1264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+1265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef* hadc, uint32_t EventType, uint32_t Timeou
+1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0;
+1269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EVENT_TYPE(EventType));
+1273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */
+1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick();
+1276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check selected event flag */
+1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, EventType) == RESET)
+1279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if timeout is disabled (set to infinite wait) */
+1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY)
+1282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
+1284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to timeout */
+1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
+1287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+ ARM GAS /tmp/cchTrxI7.s page 24
+
+
+1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+1290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_TIMEOUT;
+1292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch(EventType)
+1297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Analog watchdog (level out of window) event */
+1299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case ADC_AWD_EVENT:
+1300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
+1302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC analog watchdog flag */
+1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
+1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+1306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Overrun event */
+1308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default: /* Case ADC_OVR_EVENT */
+1309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If overrun is set to overwrite previous data, overrun event is not */
+1310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* considered as an error. */
+1311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */
+1312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun ") */
+1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED)
+1314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_OVR);
+1317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to overrun */
+1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
+1320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC Overrun flag */
+1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
+1324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+1325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */
+1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK;
+1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group with interruption.
+1333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function:
+1334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - EOC (end of conversion of regular group) or EOS (end of
+1335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * sequence of regular group) depending on ADC initialization
+1336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * parameter "EOCSelection"
+1337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - overrun (if available)
+1338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function.
+1339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+1341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
+1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+1345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ ARM GAS /tmp/cchTrxI7.s page 25
+
+
+1346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */
+1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
+1351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */
+1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc);
+1354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */
+1356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
+1357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */
+1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
+1359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc);
+1361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */
+1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */
+1368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */
+1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+1370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A
+1371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY);
+1372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */
+1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc);
+1375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+1377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */
+1378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */
+1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+1380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */
+1382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */
+1383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */
+1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
+1385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC end of conversion interrupt */
+1387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC overrun interrupt */
+1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** switch(hadc->Init.EOCSelection)
+1389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** case ADC_EOC_SEQ_CONV:
+1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
+1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR));
+1393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+1394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* case ADC_EOC_SINGLE_CONV */
+1395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** default:
+1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
+1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+1398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */
+1401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */
+1402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */
+ ARM GAS /tmp/cchTrxI7.s page 26
+
+
+1403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */
+1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART;
+1405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+1408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY;
+1410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+1413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable interruption of
+1419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * end-of-conversion, disable ADC peripheral.
+1420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status.
+1422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
+1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+1426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */
+1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc);
+1432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */
+1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc);
+1435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */
+1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of conversion interrupt for regular group */
+1440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC overrun interrupt */
+1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
+1442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */
+1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc);
+1445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */
+1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+1451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+1452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY);
+1453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+1458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+ ARM GAS /tmp/cchTrxI7.s page 27
+
+
+1460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1462:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1463:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1464:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enables ADC, starts conversion of regular group and transfers result
+1465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * through DMA.
+1466:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Interruptions enabled in this function:
+1467:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - DMA transfer complete
+1468:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - DMA half transfer
+1469:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - overrun
+1470:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function.
+1471:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1472:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param pData The destination Buffer address.
+1473:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param Length The length of data to be transferred from ADC peripheral to memory.
+1474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+1475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
+1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+1479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1480:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1481:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1482:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1483:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Perform ADC enable and conversion start if no conversion is on going */
+1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
+1485:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1486:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */
+1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc);
+1488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1489:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */
+1490:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If low power mode AutoPowerOff is enabled, power-on/off phases are */
+1491:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* performed automatically by hardware. */
+1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (hadc->Init.LowPowerAutoPowerOff != ENABLE)
+1493:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Enable(hadc);
+1495:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1496:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1497:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start conversion if ADC is effectively enabled */
+1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1500:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1501:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Clear state bitfield related to regular group conversion results */
+1502:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set state bitfield related to regular operation */
+1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+1504:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A
+1505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY);
+1506:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1507:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset ADC all error code fields */
+1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc);
+1509:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1510:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+1511:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Unlock before starting ADC conversions: in case of potential */
+1512:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* interruption, to let the process to ADC IRQ Handler. */
+1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+1514:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1515:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA transfer complete callback */
+1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
+ ARM GAS /tmp/cchTrxI7.s page 28
+
+
+1517:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1518:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA half transfer complete callback */
+1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
+1520:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1521:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the DMA error callback */
+1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
+1523:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1524:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1525:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
+1526:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* start (in case of SW start): */
+1527:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1528:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag and overrun flag */
+1529:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC */
+1530:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* operations) */
+1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
+1532:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC overrun interrupt */
+1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
+1535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable ADC DMA mode */
+1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ADC_CFGR1_DMAEN;
+1538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Start the DMA channel */
+1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
+1541:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable conversion of regular group. */
+1543:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If software start has been selected, conversion starts immediately. */
+1544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If external trigger has been selected, conversion will start at next */
+1545:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* trigger event. */
+1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTART;
+1547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1548:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1549:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+1550:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_BUSY;
+1552:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1553:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1554:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+1555:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1557:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1558:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion of regular group, disable ADC DMA transfer, disable
+1560:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * ADC peripheral.
+1561:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Each of these interruptions has its dedicated callback function.
+1562:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1563:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status.
+1564:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1565:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
+1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1567:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+1568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1569:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1571:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1572:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */
+1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc);
+ ARM GAS /tmp/cchTrxI7.s page 29
+
+
+1574:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 1. Stop potential conversion on going, on regular group */
+1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_ConversionStop(hadc);
+1577:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1578:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC peripheral if conversions are effectively stopped */
+1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1580:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1581:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
+1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~ADC_CFGR1_DMAEN;
+1583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1584:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the DMA channel (in case of DMA in circular mode or stop while */
+1585:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* while DMA transfer is on going) */
+1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
+1587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1588:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if DMA channel effectively disabled */
+1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status != HAL_OK)
+1590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1591:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
+1593:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1594:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1595:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC overrun interrupt */
+1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
+1597:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* 2. Disable the ADC peripheral */
+1599:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */
+1600:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* in memory a potential failing status. */
+1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = ADC_Disable(hadc);
+1604:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+1606:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_Disable(hadc);
+1608:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1609:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1610:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if ADC is effectively disabled */
+1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (tmp_hal_status == HAL_OK)
+1612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1613:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+1615:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+1616:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY);
+1617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1618:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1620:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1621:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+1623:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1624:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+1625:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1627:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1629:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Get ADC regular group conversion result.
+1630:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Reading register DR automatically clears ADC flag EOC
+ ARM GAS /tmp/cchTrxI7.s page 30
+
+
+1631:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC group regular end of unitary conversion).
+1632:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note This function does not clear ADC flag EOS
+1633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC group regular end of sequence conversion).
+1634:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Occurrence of flag EOS rising:
+1635:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - If sequencer is composed of 1 rank, flag EOS is equivalent
+1636:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * to flag EOC.
+1637:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * - If sequencer is composed of several ranks, during the scan
+1638:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * sequence flag EOC only is raised, at the end of the scan sequence
+1639:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * both flags EOC and EOS are raised.
+1640:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * To clear this flag, either use function:
+1641:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
+1642:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * model polling: @ref HAL_ADC_PollForConversion()
+1643:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_EOS).
+1644:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1645:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval ADC group regular conversion data
+1646:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1647:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
+1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1650:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1651:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1652:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: EOC flag is not cleared here by software because automatically */
+1653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* cleared by hardware when reading register DR. */
+1654:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC converted value */
+1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->Instance->DR;
+1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1658:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1659:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1660:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Handles ADC interrupt request.
+1661:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+1663:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1664:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** void HAL_ADC_IRQHandler(ADC_HandleTypeDef* hadc)
+1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1666:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1667:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
+1669:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_EOC_SELECTION(hadc->Init.EOCSelection));
+1670:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check End of Conversion flag for regular group ========== */
+1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOC) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOC)) ||
+1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
+1674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1675:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */
+1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
+1677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1678:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
+1680:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1681:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1682:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */
+1683:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */
+1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
+1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) )
+1686:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1687:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */
+ ARM GAS /tmp/cchTrxI7.s page 31
+
+
+1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
+1689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1690:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
+1691:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */
+1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
+1693:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */
+1695:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */
+1696:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */
+1697:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */
+1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
+1699:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1700:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+1702:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+1703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY);
+1704:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1705:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+1706:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1707:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */
+1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
+1709:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1710:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+1712:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1713:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1715:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1716:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: into callback, to determine if conversion has been triggered */
+1717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* from EOC or EOS, possibility to use: */
+1718:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* " if( __HAL_ADC_GET_FLAG(&hadc, ADC_FLAG_EOS)) " */
+1719:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+1720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback(hadc);
+1721:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else
+1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc);
+1723:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+1724:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1725:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1726:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear regular group conversion flag */
+1727:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: in case of overrun set to ADC_OVR_DATA_PRESERVED, end of */
+1728:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion flags clear induces the release of the preserved data.*/
+1729:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Therefore, if the preserved data value is needed, it must be */
+1730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* read preliminarily into HAL_ADC_ConvCpltCallback(). */
+1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS) );
+1732:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1733:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1734:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check Analog watchdog flags ========== */
+1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_AWD) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_AWD))
+1736:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1737:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_AWD1);
+1739:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1740:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+1741:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->LevelOutOfWindowCallback(hadc);
+1742:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else
+1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_LevelOutOfWindowCallback(hadc);
+1744:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ ARM GAS /tmp/cchTrxI7.s page 32
+
+
+1745:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1746:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC Analog watchdog flag */
+1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_AWD);
+1748:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1749:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1750:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1752:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ========== Check Overrun flag ========== */
+1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_OVR) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_OVR))
+1754:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If overrun is set to overwrite previous data (default setting), */
+1756:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun event is not considered as an error. */
+1757:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (cf ref manual "Managing conversions without using the DMA and without */
+1758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* overrun ") */
+1759:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Exception for usage with DMA overrun event always considered as an */
+1760:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* error. */
+1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if ((hadc->Init.Overrun == ADC_OVR_DATA_PRESERVED) ||
+1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) )
+1763:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1764:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to overrun */
+1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_OVR);
+1766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1767:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear ADC overrun flag */
+1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
+1769:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1770:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+1771:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback(hadc);
+1772:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else
+1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc);
+1774:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+1775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1776:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1777:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the Overrun flag */
+1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_OVR);
+1779:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1780:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1783:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1784:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1785:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Conversion complete callback in non blocking mode
+1786:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1787:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+1788:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1789:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
+1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1791:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+1792:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc);
+1793:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1794:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed,
+1795:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ConvCpltCallback must be implemented in the user file.
+1796:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1798:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1799:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1800:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Conversion DMA half-transfer callback in non blocking mode
+1801:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+ ARM GAS /tmp/cchTrxI7.s page 33
+
+
+1802:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+1803:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1804:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
+1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1806:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+1807:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc);
+1808:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1809:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed,
+1810:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
+1811:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1813:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1814:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1815:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Analog watchdog callback in non blocking mode.
+1816:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1817:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+1818:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1819:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_LevelOutOfWindowCallback(ADC_HandleTypeDef* hadc)
+1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1821:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+1822:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc);
+1823:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1824:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed,
+1825:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_LevelOoutOfWindowCallback must be implemented in the user file.
+1826:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1828:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1829:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1830:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief ADC error callback in non blocking mode
+1831:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * (ADC conversion with interruption or transfer by DMA)
+1832:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1833:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+1834:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1835:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
+1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1837:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+1838:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** UNUSED(hadc);
+1839:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1840:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* NOTE : This function should not be modified. When the callback is needed,
+1841:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** function HAL_ADC_ErrorCallback must be implemented in the user file.
+1842:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1844:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1845:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1846:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1847:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @}
+1848:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1849:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1850:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group3 Peripheral Control functions
+1851:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Peripheral Control functions
+1852:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *
+1853:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim
+1854:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ===============================================================================
+1855:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Peripheral Control functions #####
+1856:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ===============================================================================
+1857:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..] This section provides functions allowing to:
+1858:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Configure channels on regular group
+ ARM GAS /tmp/cchTrxI7.s page 34
+
+
+1859:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Configure the analog watchdog
+1860:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1861:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim
+1862:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+1863:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1864:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1865:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+1866:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Configures the the selected channel to be linked to the regular
+1867:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * group.
+1868:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note In case of usage of internal measurement channels:
+1869:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * VrefInt/Vbat/TempSensor.
+1870:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Sampling time constraints must be respected (sampling time can be
+1871:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * adjusted in function of ADC clock frequency and sampling time
+1872:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * setting).
+1873:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Refer to device datasheet for timings values, parameters TS_vrefint,
+1874:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * TS_vbat, TS_temp (values rough order: 5us to 17us).
+1875:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * These internal paths can be be disabled using function
+1876:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * HAL_ADC_DeInit().
+1877:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly:
+1878:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes channel into regular group, following
+1879:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters
+1880:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_ChannelConfTypeDef" on the fly, without reseting
+1881:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the ADC.
+1882:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state.
+1883:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure
+1884:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_ChannelConfTypeDef".
+1885:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+1886:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param sConfig Structure of ADC channel for regular group.
+1887:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+1888:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+1889:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
+1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U;
+1893:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1894:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+1895:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+1896:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(sConfig->Channel));
+1897:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANK(sConfig->Rank));
+1898:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1899:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
+1900:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1901:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
+1902:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1903:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1904:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */
+1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc);
+1906:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1907:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */
+1908:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */
+1909:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion on going on regular group: */
+1910:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Channel number */
+1911:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Channel sampling time */
+1912:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Management of internal measurement channels: VrefInt/TempSensor/Vbat */
+1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
+1914:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1915:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configure channel: depending on rank setting, add it or remove it from */
+ ARM GAS /tmp/cchTrxI7.s page 35
+
+
+1916:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC conversion sequencer. */
+1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->Rank != ADC_RANK_NONE)
+1918:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1919:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Regular sequence configuration */
+1920:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the channel selection register from the selected channel */
+1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR |= ADC_CHSELR_CHANNEL(sConfig->Channel);
+1922:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1923:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */
+1924:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of parameters "SamplingTimeCommon" and "SamplingTime" */
+1925:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* (obsolete): sampling time set in this function with */
+1926:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameter "SamplingTime" (obsolete) only if not already set into */
+1927:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC initialization structure with parameter "SamplingTimeCommon". */
+1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (! IS_ADC_SAMPLE_TIME(hadc->Init.SamplingTimeCommon))
+1929:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1930:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Modify sampling time if needed (not needed in case of reoccurrence */
+1931:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* for several channels programmed consecutively into the sequencer) */
+1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->SamplingTime != ADC_GET_SAMPLINGTIME(hadc))
+1933:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1934:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Channel sampling time configuration */
+1935:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the old sample time */
+1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR &= ~(ADC_SMPR_SMP);
+1937:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1938:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the new sample time */
+1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->SMPR |= ADC_SMPR_SET(sConfig->SamplingTime);
+1940:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1941:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1942:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1943:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
+1944:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* internal measurement paths enable: If internal channel selected, */
+1945:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enable dedicated internal buffers and path. */
+1946:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: these internal measurement paths can be disabled using */
+1947:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_ADC_DeInit() or removing the channel from sequencer with */
+1948:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channel configuration parameter "Rank". */
+1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
+1950:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1951:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_16 is selected, enable Temp. sensor measurement path. */
+1952:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_17 is selected, enable VREFINT measurement path. */
+1953:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_18 is selected, enable VBAT measurement path. */
+1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR |= ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
+1955:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1956:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Temp. sensor is selected, wait for stabilization delay */
+1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
+1958:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1959:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for temperature sensor stabilization time */
+1960:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Compute number of CPU cycles to wait for */
+1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
+1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U)
+1963:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index--;
+1965:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1966:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1967:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1968:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1969:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+1970:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1971:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Regular sequence configuration */
+1972:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Reset the channel selection register from the selected channel */
+ ARM GAS /tmp/cchTrxI7.s page 36
+
+
+1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CHSELR &= ~ADC_CHSELR_CHANNEL(sConfig->Channel);
+1974:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1975:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Management of internal measurement channels: VrefInt/TempSensor/Vbat */
+1976:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* internal measurement paths disable: If internal channel selected, */
+1977:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* disable dedicated internal buffers and path. */
+1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_CHANNEL_INTERNAL(sConfig->Channel))
+1979:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1980:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_16 is selected, disable Temp. sensor measurement path. */
+1981:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_17 is selected, disable VREFINT measurement path. */
+1982:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If Channel_18 is selected, disable VBAT measurement path. */
+1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC->CCR &= ~ADC_CHANNEL_INTERNAL_PATH(sConfig->Channel);
+1984:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1985:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1986:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1987:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1988:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1989:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If a conversion is on going on regular group, no update on regular */
+1990:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channel could be done on neither of the channel configuration structure */
+1991:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* parameters. */
+1992:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+1993:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+1994:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
+1996:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR;
+1998:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+1999:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2000:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+2002:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2003:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+2004:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2006:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2007:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2008:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2009:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Configures the analog watchdog.
+2010:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Possibility to update parameters on the fly:
+2011:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * This function initializes the selected analog watchdog, following
+2012:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * calls to this function can be used to reconfigure some parameters
+2013:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * of structure "ADC_AnalogWDGConfTypeDef" on the fly, without reseting
+2014:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * the ADC.
+2015:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * The setting of these parameters is conditioned to ADC state.
+2016:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For parameters constraints, see comments of structure
+2017:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "ADC_AnalogWDGConfTypeDef".
+2018:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+2019:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param AnalogWDGConfig Structure of ADC analog watchdog configuration
+2020:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status
+2021:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2022:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* Analog
+2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+2025:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2026:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDHighThresholdShifted;
+2027:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpAWDLowThresholdShifted;
+2028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+ ARM GAS /tmp/cchTrxI7.s page 37
+
+
+2030:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+2031:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ANALOG_WATCHDOG_MODE(AnalogWDGConfig->WatchdogMode));
+2032:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_FUNCTIONAL_STATE(AnalogWDGConfig->ITMode));
+2033:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2034:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verify if threshold is within the selected ADC resolution */
+2035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->HighThreshold));
+2036:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), AnalogWDGConfig->LowThreshold));
+2037:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(AnalogWDGConfig->WatchdogMode == ADC_ANALOGWATCHDOG_SINGLE_REG)
+2039:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2040:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_CHANNEL(AnalogWDGConfig->Channel));
+2041:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2042:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process locked */
+2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_LOCK(hadc);
+2045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2046:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters update conditioned to ADC state: */
+2047:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Parameters that can be updated when ADC is disabled or enabled without */
+2048:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* conversion on going on regular group: */
+2049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Analog watchdog channels */
+2050:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Analog watchdog thresholds */
+2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
+2052:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2053:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configuration of analog watchdog: */
+2054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set the analog watchdog enable mode: one or overall group of */
+2055:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* channels. */
+2056:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* - Set the Analog watchdog channel (is not used if watchdog */
+2057:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* mode "all channels": ADC_CFGR_AWD1SGL=0). */
+2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 &= ~( ADC_CFGR1_AWDSGL |
+2059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN |
+2060:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDCH );
+2061:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CFGR1 |= ( AnalogWDGConfig->WatchdogMode |
+2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) );
+2064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2065:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Shift the offset in function of the selected ADC resolution: Thresholds*/
+2066:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* have to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
+2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDHighThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->HighThre
+2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres
+2069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2070:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set the high and low thresholds */
+2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR &= ~(ADC_TR_HT | ADC_TR_LT);
+2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) |
+2073:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted );
+2074:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Clear the ADC Analog watchdog flag (in case of left enabled by */
+2076:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* previous ADC operations) to be ready to use for HAL_ADC_IRQHandler() */
+2077:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* or HAL_ADC_PollForEvent(). */
+2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_IT_AWD);
+2079:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Configure ADC Analog watchdog interrupt */
+2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(AnalogWDGConfig->ITMode == ENABLE)
+2082:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2083:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC Analog watchdog interrupt */
+2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_AWD);
+2085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2086:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+ ARM GAS /tmp/cchTrxI7.s page 38
+
+
+2087:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2088:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC Analog watchdog interrupt */
+2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_AWD);
+2090:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2091:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2092:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If a conversion is on going on regular group, no update could be done */
+2094:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* on neither of the AWD configuration structure parameters. */
+2095:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+2096:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2097:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
+2099:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmp_hal_status = HAL_ERROR;
+2101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Process unlocked */
+2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_UNLOCK(hadc);
+2106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return function status */
+2108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return tmp_hal_status;
+2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @}
+2114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Exported_Functions_Group4 Peripheral State functions
+2118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Peripheral State functions
+2119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** *
+2120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @verbatim
+2121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ===============================================================================
+2122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ##### Peripheral State and Errors functions #####
+2123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ===============================================================================
+2124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** [..]
+2125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** This subsection provides functions to get in run-time the status of the
+2126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** peripheral.
+2127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Check the ADC state
+2128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (+) Check the ADC error code
+2129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** @endverbatim
+2131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+2132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Return the ADC state
+2136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note ADC state machine is managed by bitfields, ADC status must be
+2137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * compared with states bits.
+2138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * For example:
+2139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_REG_BUSY)) "
+2140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * " if (HAL_IS_BIT_SET(HAL_ADC_GetState(hadc1), HAL_ADC_STATE_AWD1) ) "
+2141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+2142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL state
+2143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+ ARM GAS /tmp/cchTrxI7.s page 39
+
+
+2144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetState(ADC_HandleTypeDef* hadc)
+2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+2147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+2148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return ADC state */
+2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->State;
+2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Return the ADC error code
+2155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+2156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval ADC Error Code
+2157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc)
+2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->ErrorCode;
+2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @}
+2165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @}
+2169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /** @defgroup ADC_Private_Functions ADC Private Functions
+2172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @{
+2173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Enable the selected ADC.
+2177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC must be disabled
+2178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * and voltage regulator must be enabled (done into HAL_ADC_Init()).
+2179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note If low power mode AutoPowerOff is enabled, power-on/off phases are
+2180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * performed automatically by hardware.
+2181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * In this mode, this function is useless and must not be called because
+2182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * flag ADC_FLAG_RDY is not usable.
+2183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * Therefore, this function must be called under condition of
+2184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * "if (hadc->Init.LowPowerAutoPowerOff != ENABLE)".
+2185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+2186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status.
+2187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
+2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U;
+2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U;
+2192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADC enable and wait for ADC ready (in case of ADC is disabled or */
+2194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* enabling phase not yet completed: flag ADC ready not yet set). */
+2195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
+2196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* causes: ADC clock not running, ...). */
+2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) == RESET)
+2198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if conditions to enable the ADC are fulfilled */
+2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_ENABLING_CONDITIONS(hadc) == RESET)
+ ARM GAS /tmp/cchTrxI7.s page 40
+
+
+2201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
+2204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+2207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR;
+2209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Enable the ADC peripheral */
+2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE(hadc);
+2213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Delay for ADC stabilization time */
+2215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Compute number of CPU cycles to wait for */
+2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
+2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U)
+2218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** wait_loop_index--;
+2220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */
+2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick();
+2224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for ADC effectively enabled */
+2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_RDY) == RESET)
+2227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
+2229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
+2232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+2235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR;
+2237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */
+2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK;
+2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Disable the selected ADC.
+2248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be
+2249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * stopped.
+2250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+2251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status.
+2252:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_Disable(ADC_HandleTypeDef* hadc)
+2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2255:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U;
+2256:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2257:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification if ADC is not already disabled: */
+ ARM GAS /tmp/cchTrxI7.s page 41
+
+
+2258:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: forbidden to disable ADC (set bit ADC_CR_ADDIS) if ADC is already */
+2259:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* disabled. */
+2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_ENABLE(hadc) != RESET)
+2261:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2262:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check if conditions to disable the ADC are fulfilled */
+2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_DISABLING_CONDITIONS(hadc) != RESET)
+2264:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2265:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable the ADC peripheral */
+2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE(hadc);
+2267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2268:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+2269:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2270:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
+2272:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2273:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+2275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR;
+2277:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2279:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for ADC effectively disabled */
+2280:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */
+2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick();
+2282:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADEN))
+2284:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
+2286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2287:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
+2289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2290:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+2292:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR;
+2294:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2295:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2297:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2298:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */
+2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK;
+2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2302:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2303:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief Stop ADC conversion.
+2305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @note Prerequisite condition to use this function: ADC conversions must be
+2306:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * stopped to disable the ADC.
+2307:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hadc ADC handle
+2308:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval HAL status.
+2309:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2310:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static HAL_StatusTypeDef ADC_ConversionStop(ADC_HandleTypeDef* hadc)
+2311:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 25 .loc 1 2311 0
+ 26 .cfi_startproc
+ 27 @ args = 0, pretend = 0, frame = 0
+ ARM GAS /tmp/cchTrxI7.s page 42
+
+
+ 28 @ frame_needed = 0, uses_anonymous_args = 0
+ 29 .LVL0:
+ 30 0000 70B5 push {r4, r5, r6, lr}
+ 31 .LCFI0:
+ 32 .cfi_def_cfa_offset 16
+ 33 .cfi_offset 4, -16
+ 34 .cfi_offset 5, -12
+ 35 .cfi_offset 6, -8
+ 36 .cfi_offset 14, -4
+ 37 0002 0400 movs r4, r0
+ 38 .LVL1:
+2312:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U;
+2313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2314:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+2315:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
+2316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2317:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Verification if ADC is not already stopped on regular group to bypass */
+2318:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* this function if not needed. */
+2319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc))
+ 39 .loc 1 2319 0
+ 40 0004 0368 ldr r3, [r0]
+ 41 0006 9A68 ldr r2, [r3, #8]
+ 42 0008 5207 lsls r2, r2, #29
+ 43 000a 21D5 bpl .L6
+2320:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2321:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2322:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop potential conversion on going on regular group */
+2323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Software is allowed to set ADSTP only when ADSTART=1 and ADDIS=0 */
+2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_SET(hadc->Instance->CR, ADC_CR_ADSTART) &&
+ 44 .loc 1 2324 0
+ 45 000c 9A68 ldr r2, [r3, #8]
+ 46 000e 5207 lsls r2, r2, #29
+ 47 0010 06D5 bpl .L3
+2325:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
+ 48 .loc 1 2325 0 discriminator 1
+ 49 0012 9A68 ldr r2, [r3, #8]
+2324:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_CLR(hadc->Instance->CR, ADC_CR_ADDIS) )
+ 50 .loc 1 2324 0 discriminator 1
+ 51 0014 9207 lsls r2, r2, #30
+ 52 0016 03D4 bmi .L3
+2326:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2327:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Stop conversions on regular group */
+2328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->CR |= ADC_CR_ADSTP;
+ 53 .loc 1 2328 0
+ 54 0018 9A68 ldr r2, [r3, #8]
+ 55 001a 1021 movs r1, #16
+ 56 001c 0A43 orrs r2, r1
+ 57 001e 9A60 str r2, [r3, #8]
+ 58 .L3:
+2329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2330:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2331:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Wait for conversion effectively stopped */
+2332:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Get tick count */
+2333:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tickstart = HAL_GetTick();
+ 59 .loc 1 2333 0
+ 60 0020 FFF7FEFF bl HAL_GetTick
+ 61 .LVL2:
+ ARM GAS /tmp/cchTrxI7.s page 43
+
+
+ 62 0024 0500 movs r5, r0
+ 63 .LVL3:
+ 64 .L4:
+2334:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2335:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while((hadc->Instance->CR & ADC_CR_ADSTART) != RESET)
+ 65 .loc 1 2335 0
+ 66 0026 2368 ldr r3, [r4]
+ 67 0028 9B68 ldr r3, [r3, #8]
+ 68 002a 5B07 lsls r3, r3, #29
+ 69 002c 0ED5 bpl .L7
+2336:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2337:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
+ 70 .loc 1 2337 0
+ 71 002e FFF7FEFF bl HAL_GetTick
+ 72 .LVL4:
+ 73 0032 401B subs r0, r0, r5
+ 74 0034 0228 cmp r0, #2
+ 75 0036 F6D9 bls .L4
+2338:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2339:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update ADC state machine to error */
+2340:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
+ 76 .loc 1 2340 0
+ 77 0038 A36B ldr r3, [r4, #56]
+ 78 003a 1022 movs r2, #16
+ 79 003c 1343 orrs r3, r2
+ 80 003e A363 str r3, [r4, #56]
+2341:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2342:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+2343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+ 81 .loc 1 2343 0
+ 82 0040 E36B ldr r3, [r4, #60]
+ 83 0042 0F3A subs r2, r2, #15
+ 84 0044 1343 orrs r3, r2
+ 85 0046 E363 str r3, [r4, #60]
+2344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2345:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_ERROR;
+ 86 .loc 1 2345 0
+ 87 0048 0120 movs r0, #1
+ 88 004a 02E0 b .L2
+ 89 .L7:
+2346:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2347:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2348:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2349:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2351:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Return HAL status */
+2352:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return HAL_OK;
+ 90 .loc 1 2352 0
+ 91 004c 0020 movs r0, #0
+ 92 004e 00E0 b .L2
+ 93 .LVL5:
+ 94 .L6:
+ 95 0050 0020 movs r0, #0
+ 96 .LVL6:
+ 97 .L2:
+2353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 98 .loc 1 2353 0
+ ARM GAS /tmp/cchTrxI7.s page 44
+
+
+ 99 @ sp needed
+ 100 .LVL7:
+ 101 0052 70BD pop {r4, r5, r6, pc}
+ 102 .cfi_endproc
+ 103 .LFE64:
+ 105 .section .text.ADC_Disable,"ax",%progbits
+ 106 .align 1
+ 107 .syntax unified
+ 108 .code 16
+ 109 .thumb_func
+ 110 .fpu softvfp
+ 112 ADC_Disable:
+ 113 .LFB63:
+2254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U;
+ 114 .loc 1 2254 0
+ 115 .cfi_startproc
+ 116 @ args = 0, pretend = 0, frame = 0
+ 117 @ frame_needed = 0, uses_anonymous_args = 0
+ 118 .LVL8:
+ 119 0000 70B5 push {r4, r5, r6, lr}
+ 120 .LCFI1:
+ 121 .cfi_def_cfa_offset 16
+ 122 .cfi_offset 4, -16
+ 123 .cfi_offset 5, -12
+ 124 .cfi_offset 6, -8
+ 125 .cfi_offset 14, -4
+ 126 0002 0400 movs r4, r0
+ 127 .LVL9:
+2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 128 .loc 1 2260 0
+ 129 0004 0268 ldr r2, [r0]
+ 130 0006 9168 ldr r1, [r2, #8]
+ 131 0008 0323 movs r3, #3
+ 132 000a 0B40 ands r3, r1
+ 133 000c 012B cmp r3, #1
+ 134 000e 01D0 beq .L16
+2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 135 .loc 1 2299 0
+ 136 0010 0020 movs r0, #0
+ 137 .LVL10:
+ 138 .L9:
+2300:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 139 .loc 1 2300 0
+ 140 @ sp needed
+ 141 .LVL11:
+ 142 0012 70BD pop {r4, r5, r6, pc}
+ 143 .LVL12:
+ 144 .L16:
+2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 145 .loc 1 2260 0 discriminator 1
+ 146 0014 1368 ldr r3, [r2]
+ 147 0016 DB07 lsls r3, r3, #31
+ 148 0018 02D4 bmi .L10
+2260:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 149 .loc 1 2260 0 is_stmt 0 discriminator 4
+ 150 001a D368 ldr r3, [r2, #12]
+ 151 001c 1B04 lsls r3, r3, #16
+ ARM GAS /tmp/cchTrxI7.s page 45
+
+
+ 152 001e 2DD5 bpl .L15
+ 153 .L10:
+2263:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 154 .loc 1 2263 0 is_stmt 1
+ 155 0020 9168 ldr r1, [r2, #8]
+ 156 0022 0523 movs r3, #5
+ 157 0024 0B40 ands r3, r1
+ 158 0026 012B cmp r3, #1
+ 159 0028 09D0 beq .L17
+2271:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 160 .loc 1 2271 0
+ 161 002a A36B ldr r3, [r4, #56]
+ 162 002c 1022 movs r2, #16
+ 163 002e 1343 orrs r3, r2
+ 164 0030 A363 str r3, [r4, #56]
+2274:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 165 .loc 1 2274 0
+ 166 0032 E36B ldr r3, [r4, #60]
+ 167 0034 0F3A subs r2, r2, #15
+ 168 0036 1343 orrs r3, r2
+ 169 0038 E363 str r3, [r4, #60]
+2276:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 170 .loc 1 2276 0
+ 171 003a 0120 movs r0, #1
+ 172 .LVL13:
+ 173 003c E9E7 b .L9
+ 174 .LVL14:
+ 175 .L17:
+2266:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 176 .loc 1 2266 0
+ 177 003e 9368 ldr r3, [r2, #8]
+ 178 0040 0221 movs r1, #2
+ 179 0042 0B43 orrs r3, r1
+ 180 0044 9360 str r3, [r2, #8]
+ 181 0046 2368 ldr r3, [r4]
+ 182 0048 0322 movs r2, #3
+ 183 004a 1A60 str r2, [r3]
+2281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 184 .loc 1 2281 0
+ 185 004c FFF7FEFF bl HAL_GetTick
+ 186 .LVL15:
+ 187 0050 0500 movs r5, r0
+ 188 .LVL16:
+ 189 .L12:
+2283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 190 .loc 1 2283 0
+ 191 0052 2368 ldr r3, [r4]
+ 192 0054 9B68 ldr r3, [r3, #8]
+ 193 0056 DB07 lsls r3, r3, #31
+ 194 0058 0ED5 bpl .L18
+2285:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 195 .loc 1 2285 0
+ 196 005a FFF7FEFF bl HAL_GetTick
+ 197 .LVL17:
+ 198 005e 401B subs r0, r0, r5
+ 199 0060 0228 cmp r0, #2
+ 200 0062 F6D9 bls .L12
+ ARM GAS /tmp/cchTrxI7.s page 46
+
+
+2288:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 201 .loc 1 2288 0
+ 202 0064 A36B ldr r3, [r4, #56]
+ 203 0066 1022 movs r2, #16
+ 204 0068 1343 orrs r3, r2
+ 205 006a A363 str r3, [r4, #56]
+2291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 206 .loc 1 2291 0
+ 207 006c E36B ldr r3, [r4, #60]
+ 208 006e 0F3A subs r2, r2, #15
+ 209 0070 1343 orrs r3, r2
+ 210 0072 E363 str r3, [r4, #60]
+2293:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 211 .loc 1 2293 0
+ 212 0074 0120 movs r0, #1
+ 213 0076 CCE7 b .L9
+ 214 .L18:
+2299:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 215 .loc 1 2299 0
+ 216 0078 0020 movs r0, #0
+ 217 007a CAE7 b .L9
+ 218 .LVL18:
+ 219 .L15:
+ 220 007c 0020 movs r0, #0
+ 221 .LVL19:
+ 222 007e C8E7 b .L9
+ 223 .cfi_endproc
+ 224 .LFE63:
+ 226 .global __aeabi_uidiv
+ 227 .section .text.ADC_Enable,"ax",%progbits
+ 228 .align 1
+ 229 .syntax unified
+ 230 .code 16
+ 231 .thumb_func
+ 232 .fpu softvfp
+ 234 ADC_Enable:
+ 235 .LFB62:
+2189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart = 0U;
+ 236 .loc 1 2189 0
+ 237 .cfi_startproc
+ 238 @ args = 0, pretend = 0, frame = 8
+ 239 @ frame_needed = 0, uses_anonymous_args = 0
+ 240 .LVL20:
+ 241 0000 30B5 push {r4, r5, lr}
+ 242 .LCFI2:
+ 243 .cfi_def_cfa_offset 12
+ 244 .cfi_offset 4, -12
+ 245 .cfi_offset 5, -8
+ 246 .cfi_offset 14, -4
+ 247 0002 83B0 sub sp, sp, #12
+ 248 .LCFI3:
+ 249 .cfi_def_cfa_offset 24
+ 250 0004 0400 movs r4, r0
+ 251 .LVL21:
+2191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 252 .loc 1 2191 0
+ 253 0006 0023 movs r3, #0
+ ARM GAS /tmp/cchTrxI7.s page 47
+
+
+ 254 0008 0193 str r3, [sp, #4]
+2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 255 .loc 1 2197 0
+ 256 000a 0368 ldr r3, [r0]
+ 257 000c 9968 ldr r1, [r3, #8]
+ 258 000e 0322 movs r2, #3
+ 259 0010 0A40 ands r2, r1
+ 260 0012 012A cmp r2, #1
+ 261 0014 0ED0 beq .L29
+ 262 .L20:
+2200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 263 .loc 1 2200 0
+ 264 0016 9968 ldr r1, [r3, #8]
+ 265 0018 204A ldr r2, .L32
+ 266 001a 1142 tst r1, r2
+ 267 001c 12D1 bne .L30
+2212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 268 .loc 1 2212 0
+ 269 001e 9A68 ldr r2, [r3, #8]
+ 270 0020 0121 movs r1, #1
+ 271 0022 0A43 orrs r2, r1
+ 272 0024 9A60 str r2, [r3, #8]
+2216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U)
+ 273 .loc 1 2216 0
+ 274 0026 1E4B ldr r3, .L32+4
+ 275 0028 1868 ldr r0, [r3]
+ 276 .LVL22:
+ 277 002a 1E49 ldr r1, .L32+8
+ 278 002c FFF7FEFF bl __aeabi_uidiv
+ 279 .LVL23:
+ 280 0030 0190 str r0, [sp, #4]
+2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 281 .loc 1 2217 0
+ 282 0032 15E0 b .L23
+ 283 .LVL24:
+ 284 .L29:
+2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 285 .loc 1 2197 0 discriminator 1
+ 286 0034 1A68 ldr r2, [r3]
+ 287 0036 D207 lsls r2, r2, #31
+ 288 0038 2DD4 bmi .L27
+2197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 289 .loc 1 2197 0 is_stmt 0 discriminator 4
+ 290 003a DA68 ldr r2, [r3, #12]
+ 291 003c 1204 lsls r2, r2, #16
+ 292 003e EAD5 bpl .L20
+2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 293 .loc 1 2243 0 is_stmt 1
+ 294 0040 0020 movs r0, #0
+ 295 .LVL25:
+ 296 0042 08E0 b .L21
+ 297 .LVL26:
+ 298 .L30:
+2203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 299 .loc 1 2203 0
+ 300 0044 A36B ldr r3, [r4, #56]
+ 301 0046 1022 movs r2, #16
+ ARM GAS /tmp/cchTrxI7.s page 48
+
+
+ 302 0048 1343 orrs r3, r2
+ 303 004a A363 str r3, [r4, #56]
+2206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 304 .loc 1 2206 0
+ 305 004c E36B ldr r3, [r4, #60]
+ 306 004e 0F3A subs r2, r2, #15
+ 307 0050 1343 orrs r3, r2
+ 308 0052 E363 str r3, [r4, #60]
+2208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 309 .loc 1 2208 0
+ 310 0054 0120 movs r0, #1
+ 311 .LVL27:
+ 312 .L21:
+2244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 313 .loc 1 2244 0
+ 314 0056 03B0 add sp, sp, #12
+ 315 @ sp needed
+ 316 .LVL28:
+ 317 0058 30BD pop {r4, r5, pc}
+ 318 .LVL29:
+ 319 .L24:
+2219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 320 .loc 1 2219 0
+ 321 005a 019B ldr r3, [sp, #4]
+ 322 005c 013B subs r3, r3, #1
+ 323 005e 0193 str r3, [sp, #4]
+ 324 .L23:
+2217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 325 .loc 1 2217 0
+ 326 0060 019B ldr r3, [sp, #4]
+ 327 0062 002B cmp r3, #0
+ 328 0064 F9D1 bne .L24
+2223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 329 .loc 1 2223 0
+ 330 0066 FFF7FEFF bl HAL_GetTick
+ 331 .LVL30:
+ 332 006a 0500 movs r5, r0
+ 333 .LVL31:
+ 334 .L25:
+2226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 335 .loc 1 2226 0
+ 336 006c 2368 ldr r3, [r4]
+ 337 006e 1B68 ldr r3, [r3]
+ 338 0070 DB07 lsls r3, r3, #31
+ 339 0072 0ED4 bmi .L31
+2228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 340 .loc 1 2228 0
+ 341 0074 FFF7FEFF bl HAL_GetTick
+ 342 .LVL32:
+ 343 0078 401B subs r0, r0, r5
+ 344 007a 0228 cmp r0, #2
+ 345 007c F6D9 bls .L25
+2231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 346 .loc 1 2231 0
+ 347 007e A36B ldr r3, [r4, #56]
+ 348 0080 1022 movs r2, #16
+ 349 0082 1343 orrs r3, r2
+ ARM GAS /tmp/cchTrxI7.s page 49
+
+
+ 350 0084 A363 str r3, [r4, #56]
+2234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 351 .loc 1 2234 0
+ 352 0086 E36B ldr r3, [r4, #60]
+ 353 0088 0F3A subs r2, r2, #15
+ 354 008a 1343 orrs r3, r2
+ 355 008c E363 str r3, [r4, #60]
+2236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 356 .loc 1 2236 0
+ 357 008e 0120 movs r0, #1
+ 358 0090 E1E7 b .L21
+ 359 .L31:
+2243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 360 .loc 1 2243 0
+ 361 0092 0020 movs r0, #0
+ 362 0094 DFE7 b .L21
+ 363 .LVL33:
+ 364 .L27:
+ 365 0096 0020 movs r0, #0
+ 366 .LVL34:
+ 367 0098 DDE7 b .L21
+ 368 .L33:
+ 369 009a C046 .align 2
+ 370 .L32:
+ 371 009c 17000080 .word -2147483625
+ 372 00a0 00000000 .word SystemCoreClock
+ 373 00a4 40420F00 .word 1000000
+ 374 .cfi_endproc
+ 375 .LFE62:
+ 377 .section .text.HAL_ADC_MspInit,"ax",%progbits
+ 378 .align 1
+ 379 .weak HAL_ADC_MspInit
+ 380 .syntax unified
+ 381 .code 16
+ 382 .thumb_func
+ 383 .fpu softvfp
+ 385 HAL_ADC_MspInit:
+ 386 .LFB42:
+ 775:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+ 387 .loc 1 775 0
+ 388 .cfi_startproc
+ 389 @ args = 0, pretend = 0, frame = 0
+ 390 @ frame_needed = 0, uses_anonymous_args = 0
+ 391 @ link register save eliminated.
+ 392 .LVL35:
+ 782:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 393 .loc 1 782 0
+ 394 @ sp needed
+ 395 0000 7047 bx lr
+ 396 .cfi_endproc
+ 397 .LFE42:
+ 399 .section .text.HAL_ADC_Init,"ax",%progbits
+ 400 .align 1
+ 401 .global HAL_ADC_Init
+ 402 .syntax unified
+ 403 .code 16
+ 404 .thumb_func
+ ARM GAS /tmp/cchTrxI7.s page 50
+
+
+ 405 .fpu softvfp
+ 407 HAL_ADC_Init:
+ 408 .LFB40:
+ 407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 409 .loc 1 407 0
+ 410 .cfi_startproc
+ 411 @ args = 0, pretend = 0, frame = 0
+ 412 @ frame_needed = 0, uses_anonymous_args = 0
+ 413 .LVL36:
+ 414 0000 70B5 push {r4, r5, r6, lr}
+ 415 .LCFI4:
+ 416 .cfi_def_cfa_offset 16
+ 417 .cfi_offset 4, -16
+ 418 .cfi_offset 5, -12
+ 419 .cfi_offset 6, -8
+ 420 .cfi_offset 14, -4
+ 421 0002 041E subs r4, r0, #0
+ 422 .LVL37:
+ 412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 423 .loc 1 412 0
+ 424 0004 00D1 bne .LCB388
+ 425 0006 B1E0 b .L49 @long jump
+ 426 .LCB388:
+ 441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 427 .loc 1 441 0
+ 428 0008 836B ldr r3, [r0, #56]
+ 429 000a 002B cmp r3, #0
+ 430 000c 7ED0 beq .L51
+ 431 .LVL38:
+ 432 .L37:
+ 474:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (tmp_hal_status == HAL_OK) &&
+ 433 .loc 1 474 0
+ 434 000e A36B ldr r3, [r4, #56]
+ 435 0010 DB06 lsls r3, r3, #27
+ 436 0012 00D5 bpl .LCB398
+ 437 0014 A4E0 b .L38 @long jump
+ 438 .LCB398:
+ 476:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 439 .loc 1 476 0
+ 440 0016 2168 ldr r1, [r4]
+ 441 0018 8B68 ldr r3, [r1, #8]
+ 442 001a 0422 movs r2, #4
+ 443 001c 1A40 ands r2, r3
+ 475:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET) )
+ 444 .loc 1 475 0
+ 445 001e 00D0 beq .LCB404
+ 446 0020 9EE0 b .L38 @long jump
+ 447 .LCB404:
+ 479:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+ 448 .loc 1 479 0
+ 449 0022 A36B ldr r3, [r4, #56]
+ 450 0024 5248 ldr r0, .L56
+ 451 0026 0340 ands r3, r0
+ 452 0028 0630 adds r0, r0, #6
+ 453 002a FF30 adds r0, r0, #255
+ 454 002c 0343 orrs r3, r0
+ 455 002e A363 str r3, [r4, #56]
+ ARM GAS /tmp/cchTrxI7.s page 51
+
+
+ 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 456 .loc 1 488 0
+ 457 0030 8868 ldr r0, [r1, #8]
+ 458 0032 0323 movs r3, #3
+ 459 0034 0340 ands r3, r0
+ 460 0036 012B cmp r3, #1
+ 461 0038 6ED0 beq .L52
+ 462 .L39:
+ 499:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_RES ,
+ 463 .loc 1 499 0
+ 464 003a CB68 ldr r3, [r1, #12]
+ 465 003c 1820 movs r0, #24
+ 466 003e 8343 bics r3, r0
+ 467 0040 A068 ldr r0, [r4, #8]
+ 468 0042 0343 orrs r3, r0
+ 469 0044 CB60 str r3, [r1, #12]
+ 505:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR2_CKMODE ,
+ 470 .loc 1 505 0
+ 471 0046 2168 ldr r1, [r4]
+ 472 0048 0B69 ldr r3, [r1, #16]
+ 473 004a 9B00 lsls r3, r3, #2
+ 474 004c 9B08 lsrs r3, r3, #2
+ 475 004e 6068 ldr r0, [r4, #4]
+ 476 0050 0343 orrs r3, r0
+ 477 0052 0B61 str r3, [r1, #16]
+ 478 .L40:
+ 522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF |
+ 479 .loc 1 522 0
+ 480 0054 2168 ldr r1, [r4]
+ 481 0056 CB68 ldr r3, [r1, #12]
+ 482 0058 4648 ldr r0, .L56+4
+ 483 005a 0340 ands r3, r0
+ 484 005c CB60 str r3, [r1, #12]
+ 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) |
+ 485 .loc 1 533 0
+ 486 005e 237E ldrb r3, [r4, #24]
+ 487 0060 9B03 lsls r3, r3, #14
+ 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
+ 488 .loc 1 534 0
+ 489 0062 617E ldrb r1, [r4, #25]
+ 490 0064 C903 lsls r1, r1, #15
+ 533:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOOFF((uint32_t)hadc->Init.LowPowerAutoPowerOff) |
+ 491 .loc 1 533 0
+ 492 0066 0B43 orrs r3, r1
+ 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) |
+ 493 .loc 1 535 0
+ 494 0068 A17E ldrb r1, [r4, #26]
+ 495 006a 4803 lsls r0, r1, #13
+ 534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) |
+ 496 .loc 1 534 0
+ 497 006c 0343 orrs r3, r0
+ 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign |
+ 498 .loc 1 536 0
+ 499 006e A06A ldr r0, [r4, #40]
+ 500 0070 0128 cmp r0, #1
+ 501 0072 58D0 beq .L50
+ 502 0074 8020 movs r0, #128
+ ARM GAS /tmp/cchTrxI7.s page 52
+
+
+ 503 0076 4001 lsls r0, r0, #5
+ 504 .L41:
+ 535:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_OVERRUN(hadc->Init.Overrun) |
+ 505 .loc 1 535 0
+ 506 0078 0343 orrs r3, r0
+ 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign |
+ 507 .loc 1 536 0
+ 508 007a E068 ldr r0, [r4, #12]
+ 509 007c 0343 orrs r3, r0
+ 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) );
+ 510 .loc 1 538 0
+ 511 007e 2069 ldr r0, [r4, #16]
+ 512 0080 0228 cmp r0, #2
+ 513 0082 52D0 beq .L53
+ 514 .L42:
+ 537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_SCANDIR(hadc->Init.ScanConvMode) |
+ 515 .loc 1 537 0
+ 516 0084 1343 orrs r3, r2
+ 539:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 517 .loc 1 539 0
+ 518 0086 2422 movs r2, #36
+ 519 0088 A25C ldrb r2, [r4, r2]
+ 520 008a 5200 lsls r2, r2, #1
+ 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) );
+ 521 .loc 1 538 0
+ 522 008c 1343 orrs r3, r2
+ 523 .LVL39:
+ 542:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 524 .loc 1 542 0
+ 525 008e E27E ldrb r2, [r4, #27]
+ 526 0090 012A cmp r2, #1
+ 527 0092 4CD0 beq .L54
+ 528 .L43:
+ 568:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 529 .loc 1 568 0
+ 530 0094 E269 ldr r2, [r4, #28]
+ 531 0096 C221 movs r1, #194
+ 532 0098 FF31 adds r1, r1, #255
+ 533 009a 8A42 cmp r2, r1
+ 534 009c 02D0 beq .L45
+ 570:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.ExternalTrigConvEdge );
+ 535 .loc 1 570 0
+ 536 009e 216A ldr r1, [r4, #32]
+ 537 00a0 0A43 orrs r2, r1
+ 538 00a2 1343 orrs r3, r2
+ 539 .LVL40:
+ 540 .L45:
+ 575:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 541 .loc 1 575 0
+ 542 00a4 2168 ldr r1, [r4]
+ 543 00a6 CA68 ldr r2, [r1, #12]
+ 544 00a8 1A43 orrs r2, r3
+ 545 00aa CA60 str r2, [r1, #12]
+ 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 546 .loc 1 583 0
+ 547 00ac E26A ldr r2, [r4, #44]
+ 548 00ae 8021 movs r1, #128
+ ARM GAS /tmp/cchTrxI7.s page 53
+
+
+ 549 00b0 4905 lsls r1, r1, #21
+ 550 00b2 8A42 cmp r2, r1
+ 551 00b4 0DD0 beq .L46
+ 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 552 .loc 1 583 0 is_stmt 0 discriminator 1
+ 553 00b6 012A cmp r2, #1
+ 554 00b8 0BD0 beq .L46
+ 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 555 .loc 1 583 0 discriminator 2
+ 556 00ba 022A cmp r2, #2
+ 557 00bc 09D0 beq .L46
+ 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 558 .loc 1 583 0 discriminator 3
+ 559 00be 032A cmp r2, #3
+ 560 00c0 07D0 beq .L46
+ 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 561 .loc 1 583 0 discriminator 4
+ 562 00c2 042A cmp r2, #4
+ 563 00c4 05D0 beq .L46
+ 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 564 .loc 1 583 0 discriminator 5
+ 565 00c6 052A cmp r2, #5
+ 566 00c8 03D0 beq .L46
+ 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 567 .loc 1 583 0 discriminator 6
+ 568 00ca 062A cmp r2, #6
+ 569 00cc 01D0 beq .L46
+ 583:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 570 .loc 1 583 0 discriminator 7
+ 571 00ce 072A cmp r2, #7
+ 572 00d0 0AD1 bne .L47
+ 573 .L46:
+ 587:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 574 .loc 1 587 0 is_stmt 1
+ 575 00d2 2068 ldr r0, [r4]
+ 576 00d4 4169 ldr r1, [r0, #20]
+ 577 00d6 0722 movs r2, #7
+ 578 00d8 9143 bics r1, r2
+ 579 00da 4161 str r1, [r0, #20]
+ 590:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 580 .loc 1 590 0
+ 581 00dc 2068 ldr r0, [r4]
+ 582 00de 4169 ldr r1, [r0, #20]
+ 583 00e0 E56A ldr r5, [r4, #44]
+ 584 00e2 2A40 ands r2, r5
+ 585 00e4 0A43 orrs r2, r1
+ 586 00e6 4261 str r2, [r0, #20]
+ 587 .L47:
+ 598:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** == tmpCFGR1)
+ 588 .loc 1 598 0
+ 589 00e8 2268 ldr r2, [r4]
+ 590 00ea D268 ldr r2, [r2, #12]
+ 591 00ec 2249 ldr r1, .L56+8
+ 592 00ee 0A40 ands r2, r1
+ 593 00f0 9A42 cmp r2, r3
+ 594 00f2 2BD0 beq .L55
+ 612:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL,
+ ARM GAS /tmp/cchTrxI7.s page 54
+
+
+ 595 .loc 1 612 0
+ 596 00f4 A36B ldr r3, [r4, #56]
+ 597 .LVL41:
+ 598 00f6 1222 movs r2, #18
+ 599 00f8 9343 bics r3, r2
+ 600 00fa 023A subs r2, r2, #2
+ 601 00fc 1343 orrs r3, r2
+ 602 00fe A363 str r3, [r4, #56]
+ 617:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 603 .loc 1 617 0
+ 604 0100 E36B ldr r3, [r4, #60]
+ 605 0102 0F3A subs r2, r2, #15
+ 606 0104 1343 orrs r3, r2
+ 607 0106 E363 str r3, [r4, #60]
+ 608 .LVL42:
+ 619:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 609 .loc 1 619 0
+ 610 0108 0120 movs r0, #1
+ 611 010a 2EE0 b .L36
+ 612 .LVL43:
+ 613 .L51:
+ 444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 614 .loc 1 444 0
+ 615 010c C363 str r3, [r0, #60]
+ 447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 616 .loc 1 447 0
+ 617 010e 3422 movs r2, #52
+ 618 0110 8354 strb r3, [r0, r2]
+ 465:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ 619 .loc 1 465 0
+ 620 0112 FFF7FEFF bl HAL_ADC_MspInit
+ 621 .LVL44:
+ 622 0116 7AE7 b .L37
+ 623 .L52:
+ 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 624 .loc 1 488 0 discriminator 1
+ 625 0118 0B68 ldr r3, [r1]
+ 626 011a DB07 lsls r3, r3, #31
+ 627 011c 9AD4 bmi .L40
+ 488:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 628 .loc 1 488 0 is_stmt 0 discriminator 4
+ 629 011e CB68 ldr r3, [r1, #12]
+ 630 0120 1B04 lsls r3, r3, #16
+ 631 0122 97D4 bmi .L40
+ 632 0124 89E7 b .L39
+ 633 .L50:
+ 536:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Init.DataAlign |
+ 634 .loc 1 536 0 is_stmt 1
+ 635 0126 1000 movs r0, r2
+ 636 0128 A6E7 b .L41
+ 637 .L53:
+ 538:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests) );
+ 638 .loc 1 538 0
+ 639 012a 0422 movs r2, #4
+ 640 012c AAE7 b .L42
+ 641 .LVL45:
+ 642 .L54:
+ ARM GAS /tmp/cchTrxI7.s page 55
+
+
+ 544:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 643 .loc 1 544 0
+ 644 012e 0029 cmp r1, #0
+ 645 0130 03D1 bne .L44
+ 547:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 646 .loc 1 547 0
+ 647 0132 8022 movs r2, #128
+ 648 0134 5202 lsls r2, r2, #9
+ 649 0136 1343 orrs r3, r2
+ 650 .LVL46:
+ 651 0138 ACE7 b .L43
+ 652 .L44:
+ 556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 653 .loc 1 556 0
+ 654 013a A26B ldr r2, [r4, #56]
+ 655 013c 2021 movs r1, #32
+ 656 013e 0A43 orrs r2, r1
+ 657 0140 A263 str r2, [r4, #56]
+ 559:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 658 .loc 1 559 0
+ 659 0142 E26B ldr r2, [r4, #60]
+ 660 0144 1F39 subs r1, r1, #31
+ 661 0146 0A43 orrs r2, r1
+ 662 0148 E263 str r2, [r4, #60]
+ 663 014a A3E7 b .L43
+ 664 .L55:
+ 602:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 665 .loc 1 602 0
+ 666 014c 0023 movs r3, #0
+ 667 .LVL47:
+ 668 014e E363 str r3, [r4, #60]
+ 605:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_BUSY_INTERNAL,
+ 669 .loc 1 605 0
+ 670 0150 A36B ldr r3, [r4, #56]
+ 671 0152 0322 movs r2, #3
+ 672 0154 9343 bics r3, r2
+ 673 0156 023A subs r2, r2, #2
+ 674 0158 1343 orrs r3, r2
+ 675 015a A363 str r3, [r4, #56]
+ 408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tmpCFGR1 = 0U;
+ 676 .loc 1 408 0
+ 677 015c 0020 movs r0, #0
+ 678 015e 04E0 b .L36
+ 679 .LVL48:
+ 680 .L38:
+ 626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 681 .loc 1 626 0
+ 682 0160 A36B ldr r3, [r4, #56]
+ 683 0162 1022 movs r2, #16
+ 684 0164 1343 orrs r3, r2
+ 685 0166 A363 str r3, [r4, #56]
+ 686 .LVL49:
+ 628:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 687 .loc 1 628 0
+ 688 0168 0120 movs r0, #1
+ 689 .LVL50:
+ 690 .L36:
+ ARM GAS /tmp/cchTrxI7.s page 56
+
+
+ 633:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 691 .loc 1 633 0
+ 692 @ sp needed
+ 693 .LVL51:
+ 694 016a 70BD pop {r4, r5, r6, pc}
+ 695 .LVL52:
+ 696 .L49:
+ 414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 697 .loc 1 414 0
+ 698 016c 0120 movs r0, #1
+ 699 .LVL53:
+ 700 016e FCE7 b .L36
+ 701 .L57:
+ 702 .align 2
+ 703 .L56:
+ 704 0170 FDFEFFFF .word -259
+ 705 0174 1902FEFF .word -130535
+ 706 0178 E7FF3F83 .word -2092957721
+ 707 .cfi_endproc
+ 708 .LFE40:
+ 710 .section .text.HAL_ADC_MspDeInit,"ax",%progbits
+ 711 .align 1
+ 712 .weak HAL_ADC_MspDeInit
+ 713 .syntax unified
+ 714 .code 16
+ 715 .thumb_func
+ 716 .fpu softvfp
+ 718 HAL_ADC_MspDeInit:
+ 719 .LFB43:
+ 790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+ 720 .loc 1 790 0
+ 721 .cfi_startproc
+ 722 @ args = 0, pretend = 0, frame = 0
+ 723 @ frame_needed = 0, uses_anonymous_args = 0
+ 724 @ link register save eliminated.
+ 725 .LVL54:
+ 797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 726 .loc 1 797 0
+ 727 @ sp needed
+ 728 0000 7047 bx lr
+ 729 .cfi_endproc
+ 730 .LFE43:
+ 732 .section .text.HAL_ADC_DeInit,"ax",%progbits
+ 733 .align 1
+ 734 .global HAL_ADC_DeInit
+ 735 .syntax unified
+ 736 .code 16
+ 737 .thumb_func
+ 738 .fpu softvfp
+ 740 HAL_ADC_DeInit:
+ 741 .LFB41:
+ 649:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 742 .loc 1 649 0
+ 743 .cfi_startproc
+ 744 @ args = 0, pretend = 0, frame = 0
+ 745 @ frame_needed = 0, uses_anonymous_args = 0
+ 746 .LVL55:
+ ARM GAS /tmp/cchTrxI7.s page 57
+
+
+ 747 0000 70B5 push {r4, r5, r6, lr}
+ 748 .LCFI5:
+ 749 .cfi_def_cfa_offset 16
+ 750 .cfi_offset 4, -16
+ 751 .cfi_offset 5, -12
+ 752 .cfi_offset 6, -8
+ 753 .cfi_offset 14, -4
+ 754 0002 041E subs r4, r0, #0
+ 755 .LVL56:
+ 653:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 756 .loc 1 653 0
+ 757 0004 43D0 beq .L63
+ 662:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 758 .loc 1 662 0
+ 759 0006 836B ldr r3, [r0, #56]
+ 760 0008 0222 movs r2, #2
+ 761 000a 1343 orrs r3, r2
+ 762 000c 8363 str r3, [r0, #56]
+ 665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 763 .loc 1 665 0
+ 764 000e FFF7FEFF bl ADC_ConversionStop
+ 765 .LVL57:
+ 766 0012 051E subs r5, r0, #0
+ 767 .LVL58:
+ 668:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 768 .loc 1 668 0
+ 769 0014 06D0 beq .L64
+ 770 .LVL59:
+ 771 .L61:
+ 684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 772 .loc 1 684 0
+ 773 0016 012D cmp r5, #1
+ 774 0018 0DD1 bne .L65
+ 775 .L62:
+ 762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 776 .loc 1 762 0
+ 777 001a 3423 movs r3, #52
+ 778 001c 0022 movs r2, #0
+ 779 001e E254 strb r2, [r4, r3]
+ 780 .LVL60:
+ 781 .L60:
+ 766:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 782 .loc 1 766 0
+ 783 0020 2800 movs r0, r5
+ 784 @ sp needed
+ 785 .LVL61:
+ 786 0022 70BD pop {r4, r5, r6, pc}
+ 787 .LVL62:
+ 788 .L64:
+ 671:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 789 .loc 1 671 0
+ 790 0024 2000 movs r0, r4
+ 791 .LVL63:
+ 792 0026 FFF7FEFF bl ADC_Disable
+ 793 .LVL64:
+ 794 002a 0500 movs r5, r0
+ 795 .LVL65:
+ ARM GAS /tmp/cchTrxI7.s page 58
+
+
+ 674:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 796 .loc 1 674 0
+ 797 002c 0128 cmp r0, #1
+ 798 002e F2D0 beq .L61
+ 677:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 799 .loc 1 677 0
+ 800 0030 0123 movs r3, #1
+ 801 0032 A363 str r3, [r4, #56]
+ 802 0034 EFE7 b .L61
+ 803 .LVL66:
+ 804 .L65:
+ 689:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_IT_EOS | ADC_IT_EOC |
+ 805 .loc 1 689 0
+ 806 0036 2168 ldr r1, [r4]
+ 807 0038 4B68 ldr r3, [r1, #4]
+ 808 003a 9F22 movs r2, #159
+ 809 003c 9343 bics r3, r2
+ 810 003e 4B60 str r3, [r1, #4]
+ 694:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_FLAG_EOS | ADC_FLAG_EOC |
+ 811 .loc 1 694 0
+ 812 0040 2368 ldr r3, [r4]
+ 813 0042 1A60 str r2, [r3]
+ 703:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AUTOFF | ADC_CFGR1_WAIT | ADC_CFGR1_CONT | ADC_CFGR1_
+ 814 .loc 1 703 0
+ 815 0044 2268 ldr r2, [r4]
+ 816 0046 D368 ldr r3, [r2, #12]
+ 817 0048 1249 ldr r1, .L66
+ 818 004a 0B40 ands r3, r1
+ 819 004c D360 str r3, [r2, #12]
+ 711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 820 .loc 1 711 0
+ 821 004e 2268 ldr r2, [r4]
+ 822 0050 1369 ldr r3, [r2, #16]
+ 823 0052 9B00 lsls r3, r3, #2
+ 824 0054 9B08 lsrs r3, r3, #2
+ 825 0056 1361 str r3, [r2, #16]
+ 714:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 826 .loc 1 714 0
+ 827 0058 2268 ldr r2, [r4]
+ 828 005a 5369 ldr r3, [r2, #20]
+ 829 005c 0721 movs r1, #7
+ 830 005e 8B43 bics r3, r1
+ 831 0060 5361 str r3, [r2, #20]
+ 717:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 832 .loc 1 717 0
+ 833 0062 2268 ldr r2, [r4]
+ 834 0064 136A ldr r3, [r2, #32]
+ 835 0066 0C49 ldr r1, .L66+4
+ 836 0068 0B40 ands r3, r1
+ 837 006a 1362 str r3, [r2, #32]
+ 720:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CHSELR_CHSEL15 | ADC_CHSELR_CHSEL14 | ADC_CHSELR_CHSEL13 | ADC_
+ 838 .loc 1 720 0
+ 839 006c 2268 ldr r2, [r4]
+ 840 006e 936A ldr r3, [r2, #40]
+ 841 0070 DB0C lsrs r3, r3, #19
+ 842 0072 DB04 lsls r3, r3, #19
+ 843 0074 9362 str r3, [r2, #40]
+ ARM GAS /tmp/cchTrxI7.s page 59
+
+
+ 730:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 844 .loc 1 730 0
+ 845 0076 094A ldr r2, .L66+8
+ 846 0078 1368 ldr r3, [r2]
+ 847 007a 0949 ldr r1, .L66+12
+ 848 007c 0B40 ands r3, r1
+ 849 007e 1360 str r3, [r2]
+ 751:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ 850 .loc 1 751 0
+ 851 0080 2000 movs r0, r4
+ 852 0082 FFF7FEFF bl HAL_ADC_MspDeInit
+ 853 .LVL67:
+ 755:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 854 .loc 1 755 0
+ 855 0086 0023 movs r3, #0
+ 856 0088 E363 str r3, [r4, #60]
+ 758:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 857 .loc 1 758 0
+ 858 008a A363 str r3, [r4, #56]
+ 859 008c C5E7 b .L62
+ 860 .LVL68:
+ 861 .L63:
+ 655:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 862 .loc 1 655 0
+ 863 008e 0125 movs r5, #1
+ 864 0090 C6E7 b .L60
+ 865 .L67:
+ 866 0092 C046 .align 2
+ 867 .L66:
+ 868 0094 00023E83 .word -2093088256
+ 869 0098 00F000F0 .word -268374016
+ 870 009c 08270140 .word 1073817352
+ 871 00a0 FFFF3FFE .word -29360129
+ 872 .cfi_endproc
+ 873 .LFE41:
+ 875 .section .text.HAL_ADC_Start,"ax",%progbits
+ 876 .align 1
+ 877 .global HAL_ADC_Start
+ 878 .syntax unified
+ 879 .code 16
+ 880 .thumb_func
+ 881 .fpu softvfp
+ 883 HAL_ADC_Start:
+ 884 .LFB44:
+1028:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 885 .loc 1 1028 0
+ 886 .cfi_startproc
+ 887 @ args = 0, pretend = 0, frame = 0
+ 888 @ frame_needed = 0, uses_anonymous_args = 0
+ 889 .LVL69:
+ 890 0000 10B5 push {r4, lr}
+ 891 .LCFI6:
+ 892 .cfi_def_cfa_offset 8
+ 893 .cfi_offset 4, -8
+ 894 .cfi_offset 14, -4
+ 895 0002 0400 movs r4, r0
+ 896 .LVL70:
+ ARM GAS /tmp/cchTrxI7.s page 60
+
+
+1035:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 897 .loc 1 1035 0
+ 898 0004 0368 ldr r3, [r0]
+ 899 0006 9B68 ldr r3, [r3, #8]
+ 900 0008 5B07 lsls r3, r3, #29
+ 901 000a 23D4 bmi .L71
+1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 902 .loc 1 1038 0
+ 903 000c 3423 movs r3, #52
+ 904 000e C35C ldrb r3, [r0, r3]
+ 905 0010 012B cmp r3, #1
+ 906 0012 21D0 beq .L72
+1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 907 .loc 1 1038 0 is_stmt 0 discriminator 2
+ 908 0014 3423 movs r3, #52
+ 909 0016 0122 movs r2, #1
+ 910 0018 C254 strb r2, [r0, r3]
+1043:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 911 .loc 1 1043 0 is_stmt 1 discriminator 2
+ 912 001a 437E ldrb r3, [r0, #25]
+ 913 001c 012B cmp r3, #1
+ 914 001e 14D1 bne .L74
+1029:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 915 .loc 1 1029 0
+ 916 0020 0020 movs r0, #0
+ 917 .LVL71:
+ 918 .L70:
+1054:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A
+ 919 .loc 1 1054 0
+ 920 0022 A36B ldr r3, [r4, #56]
+ 921 0024 0D4A ldr r2, .L75
+ 922 0026 1A40 ands r2, r3
+ 923 0028 8023 movs r3, #128
+ 924 002a 5B00 lsls r3, r3, #1
+ 925 002c 1343 orrs r3, r2
+ 926 002e A363 str r3, [r4, #56]
+1059:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 927 .loc 1 1059 0
+ 928 0030 0023 movs r3, #0
+ 929 0032 E363 str r3, [r4, #60]
+1064:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 930 .loc 1 1064 0
+ 931 0034 3422 movs r2, #52
+ 932 0036 A354 strb r3, [r4, r2]
+1069:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 933 .loc 1 1069 0
+ 934 0038 2368 ldr r3, [r4]
+ 935 003a 183A subs r2, r2, #24
+ 936 003c 1A60 str r2, [r3]
+1075:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 937 .loc 1 1075 0
+ 938 003e 2268 ldr r2, [r4]
+ 939 0040 9368 ldr r3, [r2, #8]
+ 940 0042 0421 movs r1, #4
+ 941 0044 0B43 orrs r3, r1
+ 942 0046 9360 str r3, [r2, #8]
+ 943 .L69:
+ ARM GAS /tmp/cchTrxI7.s page 61
+
+
+1085:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 944 .loc 1 1085 0
+ 945 @ sp needed
+ 946 .LVL72:
+ 947 0048 10BD pop {r4, pc}
+ 948 .LVL73:
+ 949 .L74:
+1045:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 950 .loc 1 1045 0
+ 951 004a FFF7FEFF bl ADC_Enable
+ 952 .LVL74:
+1049:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 953 .loc 1 1049 0
+ 954 004e 0028 cmp r0, #0
+ 955 0050 E7D0 beq .L70
+ 956 0052 F9E7 b .L69
+ 957 .LVL75:
+ 958 .L71:
+1080:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 959 .loc 1 1080 0
+ 960 0054 0220 movs r0, #2
+ 961 .LVL76:
+ 962 0056 F7E7 b .L69
+ 963 .LVL77:
+ 964 .L72:
+1038:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 965 .loc 1 1038 0
+ 966 0058 0220 movs r0, #2
+ 967 .LVL78:
+ 968 005a F5E7 b .L69
+ 969 .L76:
+ 970 .align 2
+ 971 .L75:
+ 972 005c FEF0FFFF .word -3842
+ 973 .cfi_endproc
+ 974 .LFE44:
+ 976 .section .text.HAL_ADC_Stop,"ax",%progbits
+ 977 .align 1
+ 978 .global HAL_ADC_Stop
+ 979 .syntax unified
+ 980 .code 16
+ 981 .thumb_func
+ 982 .fpu softvfp
+ 984 HAL_ADC_Stop:
+ 985 .LFB45:
+1093:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 986 .loc 1 1093 0
+ 987 .cfi_startproc
+ 988 @ args = 0, pretend = 0, frame = 0
+ 989 @ frame_needed = 0, uses_anonymous_args = 0
+ 990 .LVL79:
+ 991 0000 10B5 push {r4, lr}
+ 992 .LCFI7:
+ 993 .cfi_def_cfa_offset 8
+ 994 .cfi_offset 4, -8
+ 995 .cfi_offset 14, -4
+ 996 0002 0400 movs r4, r0
+ ARM GAS /tmp/cchTrxI7.s page 62
+
+
+ 997 .LVL80:
+1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 998 .loc 1 1100 0
+ 999 0004 3423 movs r3, #52
+ 1000 0006 C35C ldrb r3, [r0, r3]
+ 1001 0008 012B cmp r3, #1
+ 1002 000a 17D0 beq .L80
+1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1003 .loc 1 1100 0 is_stmt 0 discriminator 2
+ 1004 000c 3423 movs r3, #52
+ 1005 000e 0122 movs r2, #1
+ 1006 0010 C254 strb r2, [r0, r3]
+1103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1007 .loc 1 1103 0 is_stmt 1 discriminator 2
+ 1008 0012 FFF7FEFF bl ADC_ConversionStop
+ 1009 .LVL81:
+1106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1010 .loc 1 1106 0 discriminator 2
+ 1011 0016 0028 cmp r0, #0
+ 1012 0018 03D0 beq .L81
+ 1013 .LVL82:
+ 1014 .L79:
+1122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1015 .loc 1 1122 0
+ 1016 001a 3423 movs r3, #52
+ 1017 001c 0022 movs r2, #0
+ 1018 001e E254 strb r2, [r4, r3]
+ 1019 .LVL83:
+ 1020 .L78:
+1126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1021 .loc 1 1126 0
+ 1022 @ sp needed
+ 1023 .LVL84:
+ 1024 0020 10BD pop {r4, pc}
+ 1025 .LVL85:
+ 1026 .L81:
+1109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1027 .loc 1 1109 0
+ 1028 0022 2000 movs r0, r4
+ 1029 .LVL86:
+ 1030 0024 FFF7FEFF bl ADC_Disable
+ 1031 .LVL87:
+1112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1032 .loc 1 1112 0
+ 1033 0028 0028 cmp r0, #0
+ 1034 002a F6D1 bne .L79
+1115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+ 1035 .loc 1 1115 0
+ 1036 002c A36B ldr r3, [r4, #56]
+ 1037 002e 044A ldr r2, .L82
+ 1038 0030 1340 ands r3, r2
+ 1039 0032 0432 adds r2, r2, #4
+ 1040 0034 FF32 adds r2, r2, #255
+ 1041 0036 1343 orrs r3, r2
+ 1042 0038 A363 str r3, [r4, #56]
+ 1043 003a EEE7 b .L79
+ 1044 .LVL88:
+ ARM GAS /tmp/cchTrxI7.s page 63
+
+
+ 1045 .L80:
+1100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1046 .loc 1 1100 0
+ 1047 003c 0220 movs r0, #2
+ 1048 .LVL89:
+ 1049 003e EFE7 b .L78
+ 1050 .L83:
+ 1051 .align 2
+ 1052 .L82:
+ 1053 0040 FEFEFFFF .word -258
+ 1054 .cfi_endproc
+ 1055 .LFE45:
+ 1057 .section .text.HAL_ADC_PollForConversion,"ax",%progbits
+ 1058 .align 1
+ 1059 .global HAL_ADC_PollForConversion
+ 1060 .syntax unified
+ 1061 .code 16
+ 1062 .thumb_func
+ 1063 .fpu softvfp
+ 1065 HAL_ADC_PollForConversion:
+ 1066 .LFB46:
+1147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart;
+ 1067 .loc 1 1147 0
+ 1068 .cfi_startproc
+ 1069 @ args = 0, pretend = 0, frame = 0
+ 1070 @ frame_needed = 0, uses_anonymous_args = 0
+ 1071 .LVL90:
+ 1072 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
+ 1073 .LCFI8:
+ 1074 .cfi_def_cfa_offset 24
+ 1075 .cfi_offset 3, -24
+ 1076 .cfi_offset 4, -20
+ 1077 .cfi_offset 5, -16
+ 1078 .cfi_offset 6, -12
+ 1079 .cfi_offset 7, -8
+ 1080 .cfi_offset 14, -4
+ 1081 0002 0400 movs r4, r0
+ 1082 0004 0D00 movs r5, r1
+1155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1083 .loc 1 1155 0
+ 1084 0006 4369 ldr r3, [r0, #20]
+ 1085 0008 082B cmp r3, #8
+ 1086 000a 26D0 beq .L93
+1168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1087 .loc 1 1168 0
+ 1088 000c 0368 ldr r3, [r0]
+ 1089 000e DB68 ldr r3, [r3, #12]
+ 1090 0010 DB07 lsls r3, r3, #31
+ 1091 0012 19D4 bmi .L96
+1180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1092 .loc 1 1180 0
+ 1093 0014 0C26 movs r6, #12
+ 1094 .L85:
+ 1095 .LVL91:
+1185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1096 .loc 1 1185 0
+ 1097 0016 FFF7FEFF bl HAL_GetTick
+ ARM GAS /tmp/cchTrxI7.s page 64
+
+
+ 1098 .LVL92:
+ 1099 001a 0700 movs r7, r0
+ 1100 .LVL93:
+ 1101 .L88:
+1188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1102 .loc 1 1188 0
+ 1103 001c 2368 ldr r3, [r4]
+ 1104 001e 1A68 ldr r2, [r3]
+ 1105 0020 1642 tst r6, r2
+ 1106 0022 1CD1 bne .L97
+1191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1107 .loc 1 1191 0
+ 1108 0024 6B1C adds r3, r5, #1
+ 1109 0026 F9D0 beq .L88
+1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1110 .loc 1 1193 0
+ 1111 0028 002D cmp r5, #0
+ 1112 002a 04D0 beq .L89
+1193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1113 .loc 1 1193 0 is_stmt 0 discriminator 1
+ 1114 002c FFF7FEFF bl HAL_GetTick
+ 1115 .LVL94:
+ 1116 0030 C01B subs r0, r0, r7
+ 1117 0032 A842 cmp r0, r5
+ 1118 0034 F2D9 bls .L88
+ 1119 .L89:
+1196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1120 .loc 1 1196 0 is_stmt 1
+ 1121 0036 A36B ldr r3, [r4, #56]
+ 1122 0038 0422 movs r2, #4
+ 1123 003a 1343 orrs r3, r2
+ 1124 003c A363 str r3, [r4, #56]
+1199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1125 .loc 1 1199 0
+ 1126 003e 3423 movs r3, #52
+ 1127 0040 0022 movs r2, #0
+ 1128 0042 E254 strb r2, [r4, r3]
+1201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1129 .loc 1 1201 0
+ 1130 0044 0320 movs r0, #3
+ 1131 0046 07E0 b .L86
+ 1132 .LVL95:
+ 1133 .L96:
+1171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1134 .loc 1 1171 0
+ 1135 0048 836B ldr r3, [r0, #56]
+ 1136 004a 2022 movs r2, #32
+ 1137 004c 1343 orrs r3, r2
+ 1138 004e 8363 str r3, [r0, #56]
+1174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1139 .loc 1 1174 0
+ 1140 0050 3423 movs r3, #52
+ 1141 0052 0022 movs r2, #0
+ 1142 0054 C254 strb r2, [r0, r3]
+1176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1143 .loc 1 1176 0
+ 1144 0056 0120 movs r0, #1
+ ARM GAS /tmp/cchTrxI7.s page 65
+
+
+ 1145 .LVL96:
+ 1146 .L86:
+1254:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1147 .loc 1 1254 0
+ 1148 @ sp needed
+ 1149 .LVL97:
+ 1150 .LVL98:
+ 1151 0058 F8BD pop {r3, r4, r5, r6, r7, pc}
+ 1152 .LVL99:
+ 1153 .L93:
+1157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1154 .loc 1 1157 0
+ 1155 005a 0826 movs r6, #8
+ 1156 005c DBE7 b .L85
+ 1157 .LVL100:
+ 1158 .L97:
+1207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1159 .loc 1 1207 0
+ 1160 005e A16B ldr r1, [r4, #56]
+ 1161 0060 8022 movs r2, #128
+ 1162 0062 9200 lsls r2, r2, #2
+ 1163 0064 0A43 orrs r2, r1
+ 1164 0066 A263 str r2, [r4, #56]
+1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) )
+ 1165 .loc 1 1211 0
+ 1166 0068 D968 ldr r1, [r3, #12]
+ 1167 006a C022 movs r2, #192
+ 1168 006c 1201 lsls r2, r2, #4
+ 1169 006e 1142 tst r1, r2
+ 1170 0070 13D1 bne .L91
+1212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1171 .loc 1 1212 0 discriminator 1
+ 1172 0072 A27E ldrb r2, [r4, #26]
+1211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) )
+ 1173 .loc 1 1211 0 discriminator 1
+ 1174 0074 002A cmp r2, #0
+ 1175 0076 10D1 bne .L91
+1215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1176 .loc 1 1215 0
+ 1177 0078 1A68 ldr r2, [r3]
+ 1178 007a 1207 lsls r2, r2, #28
+ 1179 007c 0DD5 bpl .L91
+1219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1180 .loc 1 1219 0
+ 1181 007e 9A68 ldr r2, [r3, #8]
+ 1182 0080 5207 lsls r2, r2, #29
+ 1183 0082 12D4 bmi .L92
+1225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1184 .loc 1 1225 0
+ 1185 0084 5A68 ldr r2, [r3, #4]
+ 1186 0086 0C21 movs r1, #12
+ 1187 0088 8A43 bics r2, r1
+ 1188 008a 5A60 str r2, [r3, #4]
+1228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+ 1189 .loc 1 1228 0
+ 1190 008c A36B ldr r3, [r4, #56]
+ 1191 008e 0C4A ldr r2, .L98
+ ARM GAS /tmp/cchTrxI7.s page 66
+
+
+ 1192 0090 1340 ands r3, r2
+ 1193 0092 0432 adds r2, r2, #4
+ 1194 0094 FF32 adds r2, r2, #255
+ 1195 0096 1343 orrs r3, r2
+ 1196 0098 A363 str r3, [r4, #56]
+ 1197 .L91:
+1246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1198 .loc 1 1246 0
+ 1199 009a 237E ldrb r3, [r4, #24]
+ 1200 009c 002B cmp r3, #0
+ 1201 009e 0DD1 bne .L95
+1249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1202 .loc 1 1249 0
+ 1203 00a0 2368 ldr r3, [r4]
+ 1204 00a2 0C22 movs r2, #12
+ 1205 00a4 1A60 str r2, [r3]
+1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1206 .loc 1 1253 0
+ 1207 00a6 0020 movs r0, #0
+ 1208 00a8 D6E7 b .L86
+ 1209 .L92:
+1235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1210 .loc 1 1235 0
+ 1211 00aa A36B ldr r3, [r4, #56]
+ 1212 00ac 2022 movs r2, #32
+ 1213 00ae 1343 orrs r3, r2
+ 1214 00b0 A363 str r3, [r4, #56]
+1238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1215 .loc 1 1238 0
+ 1216 00b2 E36B ldr r3, [r4, #60]
+ 1217 00b4 1F3A subs r2, r2, #31
+ 1218 00b6 1343 orrs r3, r2
+ 1219 00b8 E363 str r3, [r4, #60]
+ 1220 00ba EEE7 b .L91
+ 1221 .L95:
+1253:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1222 .loc 1 1253 0
+ 1223 00bc 0020 movs r0, #0
+ 1224 00be CBE7 b .L86
+ 1225 .L99:
+ 1226 .align 2
+ 1227 .L98:
+ 1228 00c0 FEFEFFFF .word -258
+ 1229 .cfi_endproc
+ 1230 .LFE46:
+ 1232 .section .text.HAL_ADC_PollForEvent,"ax",%progbits
+ 1233 .align 1
+ 1234 .global HAL_ADC_PollForEvent
+ 1235 .syntax unified
+ 1236 .code 16
+ 1237 .thumb_func
+ 1238 .fpu softvfp
+ 1240 HAL_ADC_PollForEvent:
+ 1241 .LFB47:
+1267:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** uint32_t tickstart=0;
+ 1242 .loc 1 1267 0
+ 1243 .cfi_startproc
+ ARM GAS /tmp/cchTrxI7.s page 67
+
+
+ 1244 @ args = 0, pretend = 0, frame = 0
+ 1245 @ frame_needed = 0, uses_anonymous_args = 0
+ 1246 .LVL101:
+ 1247 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
+ 1248 .LCFI9:
+ 1249 .cfi_def_cfa_offset 24
+ 1250 .cfi_offset 3, -24
+ 1251 .cfi_offset 4, -20
+ 1252 .cfi_offset 5, -16
+ 1253 .cfi_offset 6, -12
+ 1254 .cfi_offset 7, -8
+ 1255 .cfi_offset 14, -4
+ 1256 0002 0500 movs r5, r0
+ 1257 0004 0C00 movs r4, r1
+ 1258 0006 1600 movs r6, r2
+ 1259 .LVL102:
+1275:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1260 .loc 1 1275 0
+ 1261 0008 FFF7FEFF bl HAL_GetTick
+ 1262 .LVL103:
+ 1263 000c 0700 movs r7, r0
+ 1264 .LVL104:
+ 1265 .L102:
+1278:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1266 .loc 1 1278 0
+ 1267 000e 2A68 ldr r2, [r5]
+ 1268 0010 1368 ldr r3, [r2]
+ 1269 0012 2340 ands r3, r4
+ 1270 0014 A342 cmp r3, r4
+ 1271 0016 11D0 beq .L110
+1281:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1272 .loc 1 1281 0
+ 1273 0018 731C adds r3, r6, #1
+ 1274 001a F8D0 beq .L102
+1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1275 .loc 1 1283 0
+ 1276 001c 002E cmp r6, #0
+ 1277 001e 04D0 beq .L103
+1283:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1278 .loc 1 1283 0 is_stmt 0 discriminator 1
+ 1279 0020 FFF7FEFF bl HAL_GetTick
+ 1280 .LVL105:
+ 1281 0024 C01B subs r0, r0, r7
+ 1282 0026 B042 cmp r0, r6
+ 1283 0028 F1D9 bls .L102
+ 1284 .L103:
+1286:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1285 .loc 1 1286 0 is_stmt 1
+ 1286 002a AB6B ldr r3, [r5, #56]
+ 1287 002c 0422 movs r2, #4
+ 1288 002e 1343 orrs r3, r2
+ 1289 0030 AB63 str r3, [r5, #56]
+1289:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1290 .loc 1 1289 0
+ 1291 0032 3423 movs r3, #52
+ 1292 0034 0022 movs r2, #0
+ 1293 0036 EA54 strb r2, [r5, r3]
+ ARM GAS /tmp/cchTrxI7.s page 68
+
+
+1291:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1294 .loc 1 1291 0
+ 1295 0038 0320 movs r0, #3
+ 1296 003a 07E0 b .L104
+ 1297 .L110:
+1296:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1298 .loc 1 1296 0
+ 1299 003c 802C cmp r4, #128
+ 1300 003e 06D0 beq .L111
+1313:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1301 .loc 1 1313 0
+ 1302 0040 AB6A ldr r3, [r5, #40]
+ 1303 0042 012B cmp r3, #1
+ 1304 0044 0CD0 beq .L112
+ 1305 .L108:
+1323:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 1306 .loc 1 1323 0
+ 1307 0046 1023 movs r3, #16
+ 1308 0048 1360 str r3, [r2]
+1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1309 .loc 1 1328 0
+ 1310 004a 0020 movs r0, #0
+ 1311 .L104:
+1329:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1312 .loc 1 1329 0
+ 1313 @ sp needed
+ 1314 .LVL106:
+ 1315 .LVL107:
+ 1316 .LVL108:
+ 1317 .LVL109:
+ 1318 004c F8BD pop {r3, r4, r5, r6, r7, pc}
+ 1319 .LVL110:
+ 1320 .L111:
+1301:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1321 .loc 1 1301 0
+ 1322 004e A96B ldr r1, [r5, #56]
+ 1323 0050 8023 movs r3, #128
+ 1324 0052 5B02 lsls r3, r3, #9
+ 1325 0054 0B43 orrs r3, r1
+ 1326 0056 AB63 str r3, [r5, #56]
+1304:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 1327 .loc 1 1304 0
+ 1328 0058 8023 movs r3, #128
+ 1329 005a 1360 str r3, [r2]
+1328:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1330 .loc 1 1328 0
+ 1331 005c 0020 movs r0, #0
+1305:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1332 .loc 1 1305 0
+ 1333 005e F5E7 b .L104
+ 1334 .L112:
+1316:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1335 .loc 1 1316 0
+ 1336 0060 A96B ldr r1, [r5, #56]
+ 1337 0062 8023 movs r3, #128
+ 1338 0064 DB00 lsls r3, r3, #3
+ 1339 0066 0B43 orrs r3, r1
+ ARM GAS /tmp/cchTrxI7.s page 69
+
+
+ 1340 0068 AB63 str r3, [r5, #56]
+1319:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1341 .loc 1 1319 0
+ 1342 006a EB6B ldr r3, [r5, #60]
+ 1343 006c 0221 movs r1, #2
+ 1344 006e 0B43 orrs r3, r1
+ 1345 0070 EB63 str r3, [r5, #60]
+ 1346 0072 E8E7 b .L108
+ 1347 .cfi_endproc
+ 1348 .LFE47:
+ 1350 .section .text.HAL_ADC_Start_IT,"ax",%progbits
+ 1351 .align 1
+ 1352 .global HAL_ADC_Start_IT
+ 1353 .syntax unified
+ 1354 .code 16
+ 1355 .thumb_func
+ 1356 .fpu softvfp
+ 1358 HAL_ADC_Start_IT:
+ 1359 .LFB48:
+1343:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 1360 .loc 1 1343 0
+ 1361 .cfi_startproc
+ 1362 @ args = 0, pretend = 0, frame = 0
+ 1363 @ frame_needed = 0, uses_anonymous_args = 0
+ 1364 .LVL111:
+ 1365 0000 10B5 push {r4, lr}
+ 1366 .LCFI10:
+ 1367 .cfi_def_cfa_offset 8
+ 1368 .cfi_offset 4, -8
+ 1369 .cfi_offset 14, -4
+ 1370 0002 0400 movs r4, r0
+ 1371 .LVL112:
+1350:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1372 .loc 1 1350 0
+ 1373 0004 0368 ldr r3, [r0]
+ 1374 0006 9B68 ldr r3, [r3, #8]
+ 1375 0008 5B07 lsls r3, r3, #29
+ 1376 000a 36D4 bmi .L119
+1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1377 .loc 1 1353 0
+ 1378 000c 3423 movs r3, #52
+ 1379 000e C35C ldrb r3, [r0, r3]
+ 1380 0010 012B cmp r3, #1
+ 1381 0012 34D0 beq .L120
+1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1382 .loc 1 1353 0 is_stmt 0 discriminator 2
+ 1383 0014 3423 movs r3, #52
+ 1384 0016 0122 movs r2, #1
+ 1385 0018 C254 strb r2, [r0, r3]
+1358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1386 .loc 1 1358 0 is_stmt 1 discriminator 2
+ 1387 001a 437E ldrb r3, [r0, #25]
+ 1388 001c 012B cmp r3, #1
+ 1389 001e 21D1 bne .L123
+1344:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1390 .loc 1 1344 0
+ 1391 0020 0020 movs r0, #0
+ ARM GAS /tmp/cchTrxI7.s page 70
+
+
+ 1392 .LVL113:
+ 1393 .L115:
+1369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A
+ 1394 .loc 1 1369 0
+ 1395 0022 A36B ldr r3, [r4, #56]
+ 1396 0024 174A ldr r2, .L124
+ 1397 0026 1A40 ands r2, r3
+ 1398 0028 8023 movs r3, #128
+ 1399 002a 5B00 lsls r3, r3, #1
+ 1400 002c 1343 orrs r3, r2
+ 1401 002e A363 str r3, [r4, #56]
+1374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1402 .loc 1 1374 0
+ 1403 0030 0023 movs r3, #0
+ 1404 0032 E363 str r3, [r4, #60]
+1379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1405 .loc 1 1379 0
+ 1406 0034 3422 movs r2, #52
+ 1407 0036 A354 strb r3, [r4, r2]
+1384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1408 .loc 1 1384 0
+ 1409 0038 2368 ldr r3, [r4]
+ 1410 003a 183A subs r2, r2, #24
+ 1411 003c 1A60 str r2, [r3]
+1388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1412 .loc 1 1388 0
+ 1413 003e 6369 ldr r3, [r4, #20]
+ 1414 0040 082B cmp r3, #8
+ 1415 0042 14D1 bne .L122
+1391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, (ADC_IT_EOS | ADC_IT_OVR));
+ 1416 .loc 1 1391 0
+ 1417 0044 2268 ldr r2, [r4]
+ 1418 0046 5368 ldr r3, [r2, #4]
+ 1419 0048 0421 movs r1, #4
+ 1420 004a 8B43 bics r3, r1
+ 1421 004c 5360 str r3, [r2, #4]
+1392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 1422 .loc 1 1392 0
+ 1423 004e 2268 ldr r2, [r4]
+ 1424 0050 5368 ldr r3, [r2, #4]
+ 1425 0052 1431 adds r1, r1, #20
+ 1426 0054 0B43 orrs r3, r1
+ 1427 0056 5360 str r3, [r2, #4]
+ 1428 .L118:
+1404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1429 .loc 1 1404 0
+ 1430 0058 2268 ldr r2, [r4]
+ 1431 005a 9368 ldr r3, [r2, #8]
+ 1432 005c 0421 movs r1, #4
+ 1433 005e 0B43 orrs r3, r1
+ 1434 0060 9360 str r3, [r2, #8]
+ 1435 .L114:
+1414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1436 .loc 1 1414 0
+ 1437 @ sp needed
+ 1438 .LVL114:
+ 1439 0062 10BD pop {r4, pc}
+ ARM GAS /tmp/cchTrxI7.s page 71
+
+
+ 1440 .LVL115:
+ 1441 .L123:
+1360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1442 .loc 1 1360 0
+ 1443 0064 FFF7FEFF bl ADC_Enable
+ 1444 .LVL116:
+1364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1445 .loc 1 1364 0
+ 1446 0068 0028 cmp r0, #0
+ 1447 006a DAD0 beq .L115
+ 1448 006c F9E7 b .L114
+ 1449 .LVL117:
+ 1450 .L122:
+1396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** break;
+ 1451 .loc 1 1396 0
+ 1452 006e 2268 ldr r2, [r4]
+ 1453 0070 5368 ldr r3, [r2, #4]
+ 1454 0072 1C21 movs r1, #28
+ 1455 0074 0B43 orrs r3, r1
+ 1456 0076 5360 str r3, [r2, #4]
+1397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1457 .loc 1 1397 0
+ 1458 0078 EEE7 b .L118
+ 1459 .LVL118:
+ 1460 .L119:
+1409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1461 .loc 1 1409 0
+ 1462 007a 0220 movs r0, #2
+ 1463 .LVL119:
+ 1464 007c F1E7 b .L114
+ 1465 .LVL120:
+ 1466 .L120:
+1353:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1467 .loc 1 1353 0
+ 1468 007e 0220 movs r0, #2
+ 1469 .LVL121:
+ 1470 0080 EFE7 b .L114
+ 1471 .L125:
+ 1472 0082 C046 .align 2
+ 1473 .L124:
+ 1474 0084 FEF0FFFF .word -3842
+ 1475 .cfi_endproc
+ 1476 .LFE48:
+ 1478 .section .text.HAL_ADC_Stop_IT,"ax",%progbits
+ 1479 .align 1
+ 1480 .global HAL_ADC_Stop_IT
+ 1481 .syntax unified
+ 1482 .code 16
+ 1483 .thumb_func
+ 1484 .fpu softvfp
+ 1486 HAL_ADC_Stop_IT:
+ 1487 .LFB49:
+1424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 1488 .loc 1 1424 0
+ 1489 .cfi_startproc
+ 1490 @ args = 0, pretend = 0, frame = 0
+ 1491 @ frame_needed = 0, uses_anonymous_args = 0
+ ARM GAS /tmp/cchTrxI7.s page 72
+
+
+ 1492 .LVL122:
+ 1493 0000 10B5 push {r4, lr}
+ 1494 .LCFI11:
+ 1495 .cfi_def_cfa_offset 8
+ 1496 .cfi_offset 4, -8
+ 1497 .cfi_offset 14, -4
+ 1498 0002 0400 movs r4, r0
+ 1499 .LVL123:
+1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1500 .loc 1 1431 0
+ 1501 0004 3423 movs r3, #52
+ 1502 0006 C35C ldrb r3, [r0, r3]
+ 1503 0008 012B cmp r3, #1
+ 1504 000a 1CD0 beq .L129
+1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1505 .loc 1 1431 0 is_stmt 0 discriminator 2
+ 1506 000c 3423 movs r3, #52
+ 1507 000e 0122 movs r2, #1
+ 1508 0010 C254 strb r2, [r0, r3]
+1434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1509 .loc 1 1434 0 is_stmt 1 discriminator 2
+ 1510 0012 FFF7FEFF bl ADC_ConversionStop
+ 1511 .LVL124:
+1437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1512 .loc 1 1437 0 discriminator 2
+ 1513 0016 0028 cmp r0, #0
+ 1514 0018 03D0 beq .L130
+ 1515 .LVL125:
+ 1516 .L128:
+1457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1517 .loc 1 1457 0
+ 1518 001a 3423 movs r3, #52
+ 1519 001c 0022 movs r2, #0
+ 1520 001e E254 strb r2, [r4, r3]
+ 1521 .LVL126:
+ 1522 .L127:
+1461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1523 .loc 1 1461 0
+ 1524 @ sp needed
+ 1525 .LVL127:
+ 1526 0020 10BD pop {r4, pc}
+ 1527 .LVL128:
+ 1528 .L130:
+1441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1529 .loc 1 1441 0
+ 1530 0022 2268 ldr r2, [r4]
+ 1531 0024 5368 ldr r3, [r2, #4]
+ 1532 0026 1C21 movs r1, #28
+ 1533 0028 8B43 bics r3, r1
+ 1534 002a 5360 str r3, [r2, #4]
+1444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1535 .loc 1 1444 0
+ 1536 002c 2000 movs r0, r4
+ 1537 .LVL129:
+ 1538 002e FFF7FEFF bl ADC_Disable
+ 1539 .LVL130:
+1447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ ARM GAS /tmp/cchTrxI7.s page 73
+
+
+ 1540 .loc 1 1447 0
+ 1541 0032 0028 cmp r0, #0
+ 1542 0034 F1D1 bne .L128
+1450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+ 1543 .loc 1 1450 0
+ 1544 0036 A36B ldr r3, [r4, #56]
+ 1545 0038 044A ldr r2, .L131
+ 1546 003a 1340 ands r3, r2
+ 1547 003c 0432 adds r2, r2, #4
+ 1548 003e FF32 adds r2, r2, #255
+ 1549 0040 1343 orrs r3, r2
+ 1550 0042 A363 str r3, [r4, #56]
+ 1551 0044 E9E7 b .L128
+ 1552 .LVL131:
+ 1553 .L129:
+1431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1554 .loc 1 1431 0
+ 1555 0046 0220 movs r0, #2
+ 1556 .LVL132:
+ 1557 0048 EAE7 b .L127
+ 1558 .L132:
+ 1559 004a C046 .align 2
+ 1560 .L131:
+ 1561 004c FEFEFFFF .word -258
+ 1562 .cfi_endproc
+ 1563 .LFE49:
+ 1565 .section .text.HAL_ADC_Start_DMA,"ax",%progbits
+ 1566 .align 1
+ 1567 .global HAL_ADC_Start_DMA
+ 1568 .syntax unified
+ 1569 .code 16
+ 1570 .thumb_func
+ 1571 .fpu softvfp
+ 1573 HAL_ADC_Start_DMA:
+ 1574 .LFB50:
+1477:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 1575 .loc 1 1477 0
+ 1576 .cfi_startproc
+ 1577 @ args = 0, pretend = 0, frame = 0
+ 1578 @ frame_needed = 0, uses_anonymous_args = 0
+ 1579 .LVL133:
+ 1580 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
+ 1581 .LCFI12:
+ 1582 .cfi_def_cfa_offset 24
+ 1583 .cfi_offset 3, -24
+ 1584 .cfi_offset 4, -20
+ 1585 .cfi_offset 5, -16
+ 1586 .cfi_offset 6, -12
+ 1587 .cfi_offset 7, -8
+ 1588 .cfi_offset 14, -4
+ 1589 0002 0400 movs r4, r0
+ 1590 0004 0E00 movs r6, r1
+ 1591 0006 1700 movs r7, r2
+ 1592 .LVL134:
+1484:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1593 .loc 1 1484 0
+ 1594 0008 0368 ldr r3, [r0]
+ ARM GAS /tmp/cchTrxI7.s page 74
+
+
+ 1595 000a 9B68 ldr r3, [r3, #8]
+ 1596 000c 5B07 lsls r3, r3, #29
+ 1597 000e 3ED4 bmi .L136
+1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1598 .loc 1 1487 0
+ 1599 0010 3423 movs r3, #52
+ 1600 0012 C35C ldrb r3, [r0, r3]
+ 1601 0014 012B cmp r3, #1
+ 1602 0016 3CD0 beq .L137
+1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1603 .loc 1 1487 0 is_stmt 0 discriminator 2
+ 1604 0018 3423 movs r3, #52
+ 1605 001a 0122 movs r2, #1
+ 1606 .LVL135:
+ 1607 001c C254 strb r2, [r0, r3]
+1492:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1608 .loc 1 1492 0 is_stmt 1 discriminator 2
+ 1609 001e 437E ldrb r3, [r0, #25]
+ 1610 0020 012B cmp r3, #1
+ 1611 0022 32D0 beq .L138
+1494:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1612 .loc 1 1494 0
+ 1613 0024 FFF7FEFF bl ADC_Enable
+ 1614 .LVL136:
+ 1615 0028 051E subs r5, r0, #0
+ 1616 .LVL137:
+1498:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1617 .loc 1 1498 0
+ 1618 002a 2CD1 bne .L134
+ 1619 .LVL138:
+ 1620 .L135:
+1503:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_A
+ 1621 .loc 1 1503 0
+ 1622 002c A36B ldr r3, [r4, #56]
+ 1623 002e 1A4A ldr r2, .L139
+ 1624 0030 1A40 ands r2, r3
+ 1625 0032 8023 movs r3, #128
+ 1626 0034 5B00 lsls r3, r3, #1
+ 1627 0036 1343 orrs r3, r2
+ 1628 0038 A363 str r3, [r4, #56]
+1508:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1629 .loc 1 1508 0
+ 1630 003a 0023 movs r3, #0
+ 1631 003c E363 str r3, [r4, #60]
+1513:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1632 .loc 1 1513 0
+ 1633 003e 3422 movs r2, #52
+ 1634 0040 A354 strb r3, [r4, r2]
+1516:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1635 .loc 1 1516 0
+ 1636 0042 236B ldr r3, [r4, #48]
+ 1637 0044 154A ldr r2, .L139+4
+ 1638 0046 9A62 str r2, [r3, #40]
+1519:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1639 .loc 1 1519 0
+ 1640 0048 236B ldr r3, [r4, #48]
+ 1641 004a 154A ldr r2, .L139+8
+ ARM GAS /tmp/cchTrxI7.s page 75
+
+
+ 1642 004c DA62 str r2, [r3, #44]
+1522:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1643 .loc 1 1522 0
+ 1644 004e 236B ldr r3, [r4, #48]
+ 1645 0050 144A ldr r2, .L139+12
+ 1646 0052 1A63 str r2, [r3, #48]
+1531:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1647 .loc 1 1531 0
+ 1648 0054 2368 ldr r3, [r4]
+ 1649 0056 1C22 movs r2, #28
+ 1650 0058 1A60 str r2, [r3]
+1534:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1651 .loc 1 1534 0
+ 1652 005a 2268 ldr r2, [r4]
+ 1653 005c 5368 ldr r3, [r2, #4]
+ 1654 005e 1021 movs r1, #16
+ 1655 0060 0B43 orrs r3, r1
+ 1656 0062 5360 str r3, [r2, #4]
+1537:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1657 .loc 1 1537 0
+ 1658 0064 2268 ldr r2, [r4]
+ 1659 0066 D368 ldr r3, [r2, #12]
+ 1660 0068 0F39 subs r1, r1, #15
+ 1661 006a 0B43 orrs r3, r1
+ 1662 006c D360 str r3, [r2, #12]
+1540:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1663 .loc 1 1540 0
+ 1664 006e 2168 ldr r1, [r4]
+ 1665 0070 4031 adds r1, r1, #64
+ 1666 0072 3B00 movs r3, r7
+ 1667 0074 3200 movs r2, r6
+ 1668 0076 206B ldr r0, [r4, #48]
+ 1669 0078 FFF7FEFF bl HAL_DMA_Start_IT
+ 1670 .LVL139:
+1546:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1671 .loc 1 1546 0
+ 1672 007c 2268 ldr r2, [r4]
+ 1673 007e 9368 ldr r3, [r2, #8]
+ 1674 0080 0421 movs r1, #4
+ 1675 0082 0B43 orrs r3, r1
+ 1676 0084 9360 str r3, [r2, #8]
+ 1677 .L134:
+1556:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1678 .loc 1 1556 0
+ 1679 0086 2800 movs r0, r5
+ 1680 @ sp needed
+ 1681 .LVL140:
+ 1682 .LVL141:
+ 1683 .LVL142:
+ 1684 0088 F8BD pop {r3, r4, r5, r6, r7, pc}
+ 1685 .LVL143:
+ 1686 .L138:
+1478:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1687 .loc 1 1478 0
+ 1688 008a 0025 movs r5, #0
+ 1689 008c CEE7 b .L135
+ 1690 .LVL144:
+ ARM GAS /tmp/cchTrxI7.s page 76
+
+
+ 1691 .L136:
+1551:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1692 .loc 1 1551 0
+ 1693 008e 0225 movs r5, #2
+ 1694 0090 F9E7 b .L134
+ 1695 .L137:
+1487:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1696 .loc 1 1487 0
+ 1697 0092 0225 movs r5, #2
+ 1698 0094 F7E7 b .L134
+ 1699 .L140:
+ 1700 0096 C046 .align 2
+ 1701 .L139:
+ 1702 0098 FEF0FFFF .word -3842
+ 1703 009c 00000000 .word ADC_DMAConvCplt
+ 1704 00a0 00000000 .word ADC_DMAHalfConvCplt
+ 1705 00a4 00000000 .word ADC_DMAError
+ 1706 .cfi_endproc
+ 1707 .LFE50:
+ 1709 .section .text.HAL_ADC_Stop_DMA,"ax",%progbits
+ 1710 .align 1
+ 1711 .global HAL_ADC_Stop_DMA
+ 1712 .syntax unified
+ 1713 .code 16
+ 1714 .thumb_func
+ 1715 .fpu softvfp
+ 1717 HAL_ADC_Stop_DMA:
+ 1718 .LFB51:
+1566:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 1719 .loc 1 1566 0
+ 1720 .cfi_startproc
+ 1721 @ args = 0, pretend = 0, frame = 0
+ 1722 @ frame_needed = 0, uses_anonymous_args = 0
+ 1723 .LVL145:
+ 1724 0000 70B5 push {r4, r5, r6, lr}
+ 1725 .LCFI13:
+ 1726 .cfi_def_cfa_offset 16
+ 1727 .cfi_offset 4, -16
+ 1728 .cfi_offset 5, -12
+ 1729 .cfi_offset 6, -8
+ 1730 .cfi_offset 14, -4
+ 1731 0002 0500 movs r5, r0
+ 1732 .LVL146:
+1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1733 .loc 1 1573 0
+ 1734 0004 3423 movs r3, #52
+ 1735 0006 C35C ldrb r3, [r0, r3]
+ 1736 0008 012B cmp r3, #1
+ 1737 000a 32D0 beq .L147
+1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1738 .loc 1 1573 0 is_stmt 0 discriminator 2
+ 1739 000c 3423 movs r3, #52
+ 1740 000e 0122 movs r2, #1
+ 1741 0010 C254 strb r2, [r0, r3]
+1576:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1742 .loc 1 1576 0 is_stmt 1 discriminator 2
+ 1743 0012 FFF7FEFF bl ADC_ConversionStop
+ ARM GAS /tmp/cchTrxI7.s page 77
+
+
+ 1744 .LVL147:
+ 1745 0016 041E subs r4, r0, #0
+ 1746 .LVL148:
+1579:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1747 .loc 1 1579 0 discriminator 2
+ 1748 0018 04D0 beq .L148
+ 1749 .LVL149:
+ 1750 .L143:
+1622:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1751 .loc 1 1622 0
+ 1752 001a 3423 movs r3, #52
+ 1753 001c 0022 movs r2, #0
+ 1754 001e EA54 strb r2, [r5, r3]
+ 1755 .LVL150:
+ 1756 .L142:
+1626:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1757 .loc 1 1626 0
+ 1758 0020 2000 movs r0, r4
+ 1759 @ sp needed
+ 1760 .LVL151:
+ 1761 0022 70BD pop {r4, r5, r6, pc}
+ 1762 .LVL152:
+ 1763 .L148:
+1582:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1764 .loc 1 1582 0
+ 1765 0024 2A68 ldr r2, [r5]
+ 1766 0026 D368 ldr r3, [r2, #12]
+ 1767 0028 0121 movs r1, #1
+ 1768 002a 8B43 bics r3, r1
+ 1769 002c D360 str r3, [r2, #12]
+1586:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1770 .loc 1 1586 0
+ 1771 002e 286B ldr r0, [r5, #48]
+ 1772 .LVL153:
+ 1773 0030 FFF7FEFF bl HAL_DMA_Abort
+ 1774 .LVL154:
+ 1775 0034 041E subs r4, r0, #0
+ 1776 .LVL155:
+1589:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1777 .loc 1 1589 0
+ 1778 0036 03D0 beq .L144
+1592:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1779 .loc 1 1592 0
+ 1780 0038 AB6B ldr r3, [r5, #56]
+ 1781 003a 4022 movs r2, #64
+ 1782 003c 1343 orrs r3, r2
+ 1783 003e AB63 str r3, [r5, #56]
+ 1784 .L144:
+1596:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1785 .loc 1 1596 0
+ 1786 0040 2A68 ldr r2, [r5]
+ 1787 0042 5368 ldr r3, [r2, #4]
+ 1788 0044 1021 movs r1, #16
+ 1789 0046 8B43 bics r3, r1
+ 1790 0048 5360 str r3, [r2, #4]
+1601:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1791 .loc 1 1601 0
+ ARM GAS /tmp/cchTrxI7.s page 78
+
+
+ 1792 004a 002C cmp r4, #0
+ 1793 004c 0DD1 bne .L145
+1603:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1794 .loc 1 1603 0
+ 1795 004e 2800 movs r0, r5
+ 1796 .LVL156:
+ 1797 0050 FFF7FEFF bl ADC_Disable
+ 1798 .LVL157:
+ 1799 0054 0400 movs r4, r0
+ 1800 .LVL158:
+ 1801 .L146:
+1611:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1802 .loc 1 1611 0
+ 1803 0056 002C cmp r4, #0
+ 1804 0058 DFD1 bne .L143
+1614:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+ 1805 .loc 1 1614 0
+ 1806 005a AB6B ldr r3, [r5, #56]
+ 1807 005c 064A ldr r2, .L149
+ 1808 005e 1340 ands r3, r2
+ 1809 0060 0432 adds r2, r2, #4
+ 1810 0062 FF32 adds r2, r2, #255
+ 1811 0064 1343 orrs r3, r2
+ 1812 0066 AB63 str r3, [r5, #56]
+ 1813 0068 D7E7 b .L143
+ 1814 .LVL159:
+ 1815 .L145:
+1607:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1816 .loc 1 1607 0
+ 1817 006a 2800 movs r0, r5
+ 1818 .LVL160:
+ 1819 006c FFF7FEFF bl ADC_Disable
+ 1820 .LVL161:
+ 1821 0070 F1E7 b .L146
+ 1822 .LVL162:
+ 1823 .L147:
+1573:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1824 .loc 1 1573 0
+ 1825 0072 0224 movs r4, #2
+ 1826 0074 D4E7 b .L142
+ 1827 .L150:
+ 1828 0076 C046 .align 2
+ 1829 .L149:
+ 1830 0078 FEFEFFFF .word -258
+ 1831 .cfi_endproc
+ 1832 .LFE51:
+ 1834 .section .text.HAL_ADC_GetValue,"ax",%progbits
+ 1835 .align 1
+ 1836 .global HAL_ADC_GetValue
+ 1837 .syntax unified
+ 1838 .code 16
+ 1839 .thumb_func
+ 1840 .fpu softvfp
+ 1842 HAL_ADC_GetValue:
+ 1843 .LFB52:
+1648:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+ 1844 .loc 1 1648 0
+ ARM GAS /tmp/cchTrxI7.s page 79
+
+
+ 1845 .cfi_startproc
+ 1846 @ args = 0, pretend = 0, frame = 0
+ 1847 @ frame_needed = 0, uses_anonymous_args = 0
+ 1848 @ link register save eliminated.
+ 1849 .LVL163:
+1656:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1850 .loc 1 1656 0
+ 1851 0000 0368 ldr r3, [r0]
+ 1852 0002 186C ldr r0, [r3, #64]
+ 1853 .LVL164:
+1657:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1854 .loc 1 1657 0
+ 1855 @ sp needed
+ 1856 0004 7047 bx lr
+ 1857 .cfi_endproc
+ 1858 .LFE52:
+ 1860 .section .text.HAL_ADC_ConvCpltCallback,"ax",%progbits
+ 1861 .align 1
+ 1862 .weak HAL_ADC_ConvCpltCallback
+ 1863 .syntax unified
+ 1864 .code 16
+ 1865 .thumb_func
+ 1866 .fpu softvfp
+ 1868 HAL_ADC_ConvCpltCallback:
+ 1869 .LFB54:
+1790:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+ 1870 .loc 1 1790 0
+ 1871 .cfi_startproc
+ 1872 @ args = 0, pretend = 0, frame = 0
+ 1873 @ frame_needed = 0, uses_anonymous_args = 0
+ 1874 @ link register save eliminated.
+ 1875 .LVL165:
+1797:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1876 .loc 1 1797 0
+ 1877 @ sp needed
+ 1878 0000 7047 bx lr
+ 1879 .cfi_endproc
+ 1880 .LFE54:
+ 1882 .section .text.ADC_DMAConvCplt,"ax",%progbits
+ 1883 .align 1
+ 1884 .syntax unified
+ 1885 .code 16
+ 1886 .thumb_func
+ 1887 .fpu softvfp
+ 1889 ADC_DMAConvCplt:
+ 1890 .LFB65:
+2354:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2355:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2356:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2357:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA transfer complete callback.
+2358:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle.
+2359:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+2360:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2361:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
+2362:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1891 .loc 1 2362 0
+ 1892 .cfi_startproc
+ ARM GAS /tmp/cchTrxI7.s page 80
+
+
+ 1893 @ args = 0, pretend = 0, frame = 0
+ 1894 @ frame_needed = 0, uses_anonymous_args = 0
+ 1895 .LVL166:
+ 1896 0000 10B5 push {r4, lr}
+ 1897 .LCFI14:
+ 1898 .cfi_def_cfa_offset 8
+ 1899 .cfi_offset 4, -8
+ 1900 .cfi_offset 14, -4
+2363:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */
+2364:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+ 1901 .loc 1 2364 0
+ 1902 0002 436A ldr r3, [r0, #36]
+ 1903 .LVL167:
+2365:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2366:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */
+2367:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
+ 1904 .loc 1 2367 0
+ 1905 0004 9A6B ldr r2, [r3, #56]
+ 1906 0006 5021 movs r1, #80
+ 1907 0008 1142 tst r1, r2
+ 1908 000a 03D0 beq .L158
+2368:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2369:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
+2371:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2372:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group regular */
+2373:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by external trigger, continuous mode or scan sequence on going. */
+2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
+2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) )
+2376:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2377:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* If End of Sequence is reached, disable interrupts */
+2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if( __HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) )
+2379:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2380:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Allowed to modify bits ADC_IT_EOC/ADC_IT_EOS only if bit */
+2381:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* ADSTART==0 (no conversion on going) */
+2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** if (ADC_IS_CONVERSION_ONGOING_REGULAR(hadc) == RESET)
+2383:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2384:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */
+2385:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */
+2386:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* HAL_Start_IT(), but is not disabled here because can be used */
+2387:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* by overrun IRQ process below. */
+2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC | ADC_IT_EOS);
+2389:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2390:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State,
+2392:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+2393:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_READY);
+2394:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2395:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+2396:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2397:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Change ADC state to error state */
+2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
+2399:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2400:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to ADC IP internal error */
+2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
+2402:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2403:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ ARM GAS /tmp/cchTrxI7.s page 81
+
+
+2404:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2405:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2406:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Conversion complete callback */
+2407:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+2408:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvCpltCallback(hadc);
+2409:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else
+2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvCpltCallback(hadc);
+2411:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+2412:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2413:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** else
+2414:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+2415:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Call DMA error callback */
+2416:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->DMA_Handle->XferErrorCallback(hdma);
+ 1909 .loc 1 2416 0
+ 1910 000c 1B6B ldr r3, [r3, #48]
+ 1911 .LVL168:
+ 1912 000e 1B6B ldr r3, [r3, #48]
+ 1913 0010 9847 blx r3
+ 1914 .LVL169:
+ 1915 .L153:
+2417:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+2418:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2419:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1916 .loc 1 2419 0
+ 1917 @ sp needed
+ 1918 0012 10BD pop {r4, pc}
+ 1919 .LVL170:
+ 1920 .L158:
+2370:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1921 .loc 1 2370 0
+ 1922 0014 996B ldr r1, [r3, #56]
+ 1923 0016 8022 movs r2, #128
+ 1924 0018 9200 lsls r2, r2, #2
+ 1925 001a 0A43 orrs r2, r1
+ 1926 001c 9A63 str r2, [r3, #56]
+2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) )
+ 1927 .loc 1 2374 0
+ 1928 001e 1A68 ldr r2, [r3]
+ 1929 0020 D068 ldr r0, [r2, #12]
+ 1930 .LVL171:
+ 1931 0022 C021 movs r1, #192
+ 1932 0024 0901 lsls r1, r1, #4
+ 1933 0026 0842 tst r0, r1
+ 1934 0028 13D1 bne .L155
+2375:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1935 .loc 1 2375 0 discriminator 1
+ 1936 002a 997E ldrb r1, [r3, #26]
+2374:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) )
+ 1937 .loc 1 2374 0 discriminator 1
+ 1938 002c 0029 cmp r1, #0
+ 1939 002e 10D1 bne .L155
+2378:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 1940 .loc 1 2378 0
+ 1941 0030 1168 ldr r1, [r2]
+ 1942 0032 0907 lsls r1, r1, #28
+ 1943 0034 0DD5 bpl .L155
+2382:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ ARM GAS /tmp/cchTrxI7.s page 82
+
+
+ 1944 .loc 1 2382 0
+ 1945 0036 9168 ldr r1, [r2, #8]
+ 1946 0038 4907 lsls r1, r1, #29
+ 1947 003a 0ED4 bmi .L156
+2388:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1948 .loc 1 2388 0
+ 1949 003c 5168 ldr r1, [r2, #4]
+ 1950 003e 0C20 movs r0, #12
+ 1951 0040 8143 bics r1, r0
+ 1952 0042 5160 str r1, [r2, #4]
+2391:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+ 1953 .loc 1 2391 0
+ 1954 0044 9A6B ldr r2, [r3, #56]
+ 1955 0046 0949 ldr r1, .L159
+ 1956 0048 0A40 ands r2, r1
+ 1957 004a 0431 adds r1, r1, #4
+ 1958 004c FF31 adds r1, r1, #255
+ 1959 004e 0A43 orrs r2, r1
+ 1960 0050 9A63 str r2, [r3, #56]
+ 1961 .L155:
+2410:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ 1962 .loc 1 2410 0
+ 1963 0052 1800 movs r0, r3
+ 1964 0054 FFF7FEFF bl HAL_ADC_ConvCpltCallback
+ 1965 .LVL172:
+ 1966 0058 DBE7 b .L153
+ 1967 .LVL173:
+ 1968 .L156:
+2398:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 1969 .loc 1 2398 0
+ 1970 005a 9A6B ldr r2, [r3, #56]
+ 1971 005c 2021 movs r1, #32
+ 1972 005e 0A43 orrs r2, r1
+ 1973 0060 9A63 str r2, [r3, #56]
+2401:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 1974 .loc 1 2401 0
+ 1975 0062 DA6B ldr r2, [r3, #60]
+ 1976 0064 1F39 subs r1, r1, #31
+ 1977 0066 0A43 orrs r2, r1
+ 1978 0068 DA63 str r2, [r3, #60]
+ 1979 006a F2E7 b .L155
+ 1980 .L160:
+ 1981 .align 2
+ 1982 .L159:
+ 1983 006c FEFEFFFF .word -258
+ 1984 .cfi_endproc
+ 1985 .LFE65:
+ 1987 .section .text.HAL_ADC_ConvHalfCpltCallback,"ax",%progbits
+ 1988 .align 1
+ 1989 .weak HAL_ADC_ConvHalfCpltCallback
+ 1990 .syntax unified
+ 1991 .code 16
+ 1992 .thumb_func
+ 1993 .fpu softvfp
+ 1995 HAL_ADC_ConvHalfCpltCallback:
+ 1996 .LFB55:
+1805:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+ ARM GAS /tmp/cchTrxI7.s page 83
+
+
+ 1997 .loc 1 1805 0
+ 1998 .cfi_startproc
+ 1999 @ args = 0, pretend = 0, frame = 0
+ 2000 @ frame_needed = 0, uses_anonymous_args = 0
+ 2001 @ link register save eliminated.
+ 2002 .LVL174:
+1812:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2003 .loc 1 1812 0
+ 2004 @ sp needed
+ 2005 0000 7047 bx lr
+ 2006 .cfi_endproc
+ 2007 .LFE55:
+ 2009 .section .text.ADC_DMAHalfConvCplt,"ax",%progbits
+ 2010 .align 1
+ 2011 .syntax unified
+ 2012 .code 16
+ 2013 .thumb_func
+ 2014 .fpu softvfp
+ 2016 ADC_DMAHalfConvCplt:
+ 2017 .LFB66:
+2420:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2421:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2422:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA half transfer complete callback.
+2423:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle.
+2424:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+2425:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2426:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
+2427:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2018 .loc 1 2427 0
+ 2019 .cfi_startproc
+ 2020 @ args = 0, pretend = 0, frame = 0
+ 2021 @ frame_needed = 0, uses_anonymous_args = 0
+ 2022 .LVL175:
+ 2023 0000 10B5 push {r4, lr}
+ 2024 .LCFI15:
+ 2025 .cfi_def_cfa_offset 8
+ 2026 .cfi_offset 4, -8
+ 2027 .cfi_offset 14, -4
+2428:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */
+2429:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+ 2028 .loc 1 2429 0
+ 2029 0002 406A ldr r0, [r0, #36]
+ 2030 .LVL176:
+2430:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2431:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Half conversion callback */
+2432:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+2433:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ConvHalfCpltCallback(hadc);
+2434:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else
+2435:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ConvHalfCpltCallback(hadc);
+ 2031 .loc 1 2435 0
+ 2032 0004 FFF7FEFF bl HAL_ADC_ConvHalfCpltCallback
+ 2033 .LVL177:
+2436:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+2437:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2034 .loc 1 2437 0
+ 2035 @ sp needed
+ 2036 0008 10BD pop {r4, pc}
+ ARM GAS /tmp/cchTrxI7.s page 84
+
+
+ 2037 .cfi_endproc
+ 2038 .LFE66:
+ 2040 .section .text.HAL_ADC_LevelOutOfWindowCallback,"ax",%progbits
+ 2041 .align 1
+ 2042 .weak HAL_ADC_LevelOutOfWindowCallback
+ 2043 .syntax unified
+ 2044 .code 16
+ 2045 .thumb_func
+ 2046 .fpu softvfp
+ 2048 HAL_ADC_LevelOutOfWindowCallback:
+ 2049 .LFB56:
+1820:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+ 2050 .loc 1 1820 0
+ 2051 .cfi_startproc
+ 2052 @ args = 0, pretend = 0, frame = 0
+ 2053 @ frame_needed = 0, uses_anonymous_args = 0
+ 2054 @ link register save eliminated.
+ 2055 .LVL178:
+1827:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2056 .loc 1 1827 0
+ 2057 @ sp needed
+ 2058 0000 7047 bx lr
+ 2059 .cfi_endproc
+ 2060 .LFE56:
+ 2062 .section .text.HAL_ADC_ErrorCallback,"ax",%progbits
+ 2063 .align 1
+ 2064 .weak HAL_ADC_ErrorCallback
+ 2065 .syntax unified
+ 2066 .code 16
+ 2067 .thumb_func
+ 2068 .fpu softvfp
+ 2070 HAL_ADC_ErrorCallback:
+ 2071 .LFB57:
+1836:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Prevent unused argument(s) compilation warning */
+ 2072 .loc 1 1836 0
+ 2073 .cfi_startproc
+ 2074 @ args = 0, pretend = 0, frame = 0
+ 2075 @ frame_needed = 0, uses_anonymous_args = 0
+ 2076 @ link register save eliminated.
+ 2077 .LVL179:
+1843:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2078 .loc 1 1843 0
+ 2079 @ sp needed
+ 2080 0000 7047 bx lr
+ 2081 .cfi_endproc
+ 2082 .LFE57:
+ 2084 .section .text.ADC_DMAError,"ax",%progbits
+ 2085 .align 1
+ 2086 .syntax unified
+ 2087 .code 16
+ 2088 .thumb_func
+ 2089 .fpu softvfp
+ 2091 ADC_DMAError:
+ 2092 .LFB67:
+2438:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2439:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /**
+2440:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @brief DMA error callback
+ ARM GAS /tmp/cchTrxI7.s page 85
+
+
+2441:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @param hdma pointer to DMA handle.
+2442:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** * @retval None
+2443:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** */
+2444:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** static void ADC_DMAError(DMA_HandleTypeDef *hdma)
+2445:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2093 .loc 1 2445 0
+ 2094 .cfi_startproc
+ 2095 @ args = 0, pretend = 0, frame = 0
+ 2096 @ frame_needed = 0, uses_anonymous_args = 0
+ 2097 .LVL180:
+ 2098 0000 10B5 push {r4, lr}
+ 2099 .LCFI16:
+ 2100 .cfi_def_cfa_offset 8
+ 2101 .cfi_offset 4, -8
+ 2102 .cfi_offset 14, -4
+2446:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Retrieve ADC handle corresponding to current DMA handle */
+2447:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
+ 2103 .loc 1 2447 0
+ 2104 0002 406A ldr r0, [r0, #36]
+ 2105 .LVL181:
+2448:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2449:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC state */
+2450:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
+ 2106 .loc 1 2450 0
+ 2107 0004 836B ldr r3, [r0, #56]
+ 2108 0006 4022 movs r2, #64
+ 2109 0008 1343 orrs r3, r2
+ 2110 000a 8363 str r3, [r0, #56]
+2451:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2452:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Set ADC error code to DMA error */
+2453:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
+ 2111 .loc 1 2453 0
+ 2112 000c C36B ldr r3, [r0, #60]
+ 2113 000e 3C3A subs r2, r2, #60
+ 2114 0010 1343 orrs r3, r2
+ 2115 0012 C363 str r3, [r0, #60]
+2454:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+2455:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Error callback */
+2456:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
+2457:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->ErrorCallback(hadc);
+2458:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #else
+2459:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc);
+ 2116 .loc 1 2459 0
+ 2117 0014 FFF7FEFF bl HAL_ADC_ErrorCallback
+ 2118 .LVL182:
+2460:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+2461:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2119 .loc 1 2461 0
+ 2120 @ sp needed
+ 2121 0018 10BD pop {r4, pc}
+ 2122 .cfi_endproc
+ 2123 .LFE67:
+ 2125 .section .text.HAL_ADC_IRQHandler,"ax",%progbits
+ 2126 .align 1
+ 2127 .global HAL_ADC_IRQHandler
+ 2128 .syntax unified
+ 2129 .code 16
+ ARM GAS /tmp/cchTrxI7.s page 86
+
+
+ 2130 .thumb_func
+ 2131 .fpu softvfp
+ 2133 HAL_ADC_IRQHandler:
+ 2134 .LFB53:
+1665:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+ 2135 .loc 1 1665 0
+ 2136 .cfi_startproc
+ 2137 @ args = 0, pretend = 0, frame = 0
+ 2138 @ frame_needed = 0, uses_anonymous_args = 0
+ 2139 .LVL183:
+ 2140 0000 10B5 push {r4, lr}
+ 2141 .LCFI17:
+ 2142 .cfi_def_cfa_offset 8
+ 2143 .cfi_offset 4, -8
+ 2144 .cfi_offset 14, -4
+ 2145 0002 0400 movs r4, r0
+1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
+ 2146 .loc 1 1672 0
+ 2147 0004 0368 ldr r3, [r0]
+ 2148 0006 1A68 ldr r2, [r3]
+ 2149 0008 5207 lsls r2, r2, #29
+ 2150 000a 02D5 bpl .L167
+1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
+ 2151 .loc 1 1672 0 is_stmt 0 discriminator 1
+ 2152 000c 5A68 ldr r2, [r3, #4]
+ 2153 000e 5207 lsls r2, r2, #29
+ 2154 0010 05D4 bmi .L168
+ 2155 .L167:
+1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2156 .loc 1 1673 0 is_stmt 1 discriminator 3
+ 2157 0012 1A68 ldr r2, [r3]
+1672:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_EOS) && __HAL_ADC_GET_IT_SOURCE(hadc, ADC_IT_EOS)) )
+ 2158 .loc 1 1672 0 discriminator 3
+ 2159 0014 1207 lsls r2, r2, #28
+ 2160 0016 29D5 bpl .L169
+1673:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2161 .loc 1 1673 0
+ 2162 0018 5A68 ldr r2, [r3, #4]
+ 2163 001a 1207 lsls r2, r2, #28
+ 2164 001c 26D5 bpl .L169
+ 2165 .L168:
+1676:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2166 .loc 1 1676 0
+ 2167 001e A26B ldr r2, [r4, #56]
+ 2168 0020 D206 lsls r2, r2, #27
+ 2169 0022 04D4 bmi .L170
+1679:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2170 .loc 1 1679 0
+ 2171 0024 A16B ldr r1, [r4, #56]
+ 2172 0026 8022 movs r2, #128
+ 2173 0028 9200 lsls r2, r2, #2
+ 2174 002a 0A43 orrs r2, r1
+ 2175 002c A263 str r2, [r4, #56]
+ 2176 .L170:
+1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) )
+ 2177 .loc 1 1684 0
+ 2178 002e D968 ldr r1, [r3, #12]
+ ARM GAS /tmp/cchTrxI7.s page 87
+
+
+ 2179 0030 C022 movs r2, #192
+ 2180 0032 1201 lsls r2, r2, #4
+ 2181 0034 1142 tst r1, r2
+ 2182 0036 13D1 bne .L171
+1685:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2183 .loc 1 1685 0 discriminator 1
+ 2184 0038 A27E ldrb r2, [r4, #26]
+1684:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) )
+ 2185 .loc 1 1684 0 discriminator 1
+ 2186 003a 002A cmp r2, #0
+ 2187 003c 10D1 bne .L171
+1688:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2188 .loc 1 1688 0
+ 2189 003e 1A68 ldr r2, [r3]
+ 2190 0040 1207 lsls r2, r2, #28
+ 2191 0042 0DD5 bpl .L171
+1692:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2192 .loc 1 1692 0
+ 2193 0044 9A68 ldr r2, [r3, #8]
+ 2194 0046 5207 lsls r2, r2, #29
+ 2195 0048 31D4 bmi .L172
+1698:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2196 .loc 1 1698 0
+ 2197 004a 5A68 ldr r2, [r3, #4]
+ 2198 004c 0C21 movs r1, #12
+ 2199 004e 8A43 bics r2, r1
+ 2200 0050 5A60 str r2, [r3, #4]
+1701:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_ADC_STATE_REG_BUSY,
+ 2201 .loc 1 1701 0
+ 2202 0052 A36B ldr r3, [r4, #56]
+ 2203 0054 204A ldr r2, .L178
+ 2204 0056 1340 ands r3, r2
+ 2205 0058 0432 adds r2, r2, #4
+ 2206 005a FF32 adds r2, r2, #255
+ 2207 005c 1343 orrs r3, r2
+ 2208 005e A363 str r3, [r4, #56]
+ 2209 .L171:
+1722:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ 2210 .loc 1 1722 0
+ 2211 0060 2000 movs r0, r4
+ 2212 .LVL184:
+ 2213 0062 FFF7FEFF bl HAL_ADC_ConvCpltCallback
+ 2214 .LVL185:
+1731:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2215 .loc 1 1731 0
+ 2216 0066 2368 ldr r3, [r4]
+ 2217 0068 0C22 movs r2, #12
+ 2218 006a 1A60 str r2, [r3]
+ 2219 .L169:
+1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2220 .loc 1 1735 0
+ 2221 006c 2368 ldr r3, [r4]
+ 2222 006e 1A68 ldr r2, [r3]
+ 2223 0070 1206 lsls r2, r2, #24
+ 2224 0072 02D5 bpl .L173
+1735:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2225 .loc 1 1735 0 is_stmt 0 discriminator 1
+ ARM GAS /tmp/cchTrxI7.s page 88
+
+
+ 2226 0074 5B68 ldr r3, [r3, #4]
+ 2227 0076 1B06 lsls r3, r3, #24
+ 2228 0078 22D4 bmi .L177
+ 2229 .L173:
+1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2230 .loc 1 1753 0 is_stmt 1
+ 2231 007a 2368 ldr r3, [r4]
+ 2232 007c 1A68 ldr r2, [r3]
+ 2233 007e D206 lsls r2, r2, #27
+ 2234 0080 14D5 bpl .L166
+1753:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2235 .loc 1 1753 0 is_stmt 0 discriminator 1
+ 2236 0082 5A68 ldr r2, [r3, #4]
+ 2237 0084 D206 lsls r2, r2, #27
+ 2238 0086 11D5 bpl .L166
+1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) )
+ 2239 .loc 1 1761 0 is_stmt 1
+ 2240 0088 A26A ldr r2, [r4, #40]
+ 2241 008a 012A cmp r2, #1
+ 2242 008c 02D0 beq .L175
+1762:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2243 .loc 1 1762 0 discriminator 1
+ 2244 008e DA68 ldr r2, [r3, #12]
+1761:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_IS_BIT_SET(hadc->Instance->CFGR1, ADC_CFGR1_DMAEN) )
+ 2245 .loc 1 1761 0 discriminator 1
+ 2246 0090 D207 lsls r2, r2, #31
+ 2247 0092 08D5 bpl .L176
+ 2248 .L175:
+1765:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2249 .loc 1 1765 0
+ 2250 0094 E26B ldr r2, [r4, #60]
+ 2251 0096 0221 movs r1, #2
+ 2252 0098 0A43 orrs r2, r1
+ 2253 009a E263 str r2, [r4, #60]
+1768:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2254 .loc 1 1768 0
+ 2255 009c 1022 movs r2, #16
+ 2256 009e 1A60 str r2, [r3]
+1773:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ 2257 .loc 1 1773 0
+ 2258 00a0 2000 movs r0, r4
+ 2259 00a2 FFF7FEFF bl HAL_ADC_ErrorCallback
+ 2260 .LVL186:
+ 2261 .L176:
+1778:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2262 .loc 1 1778 0
+ 2263 00a6 2368 ldr r3, [r4]
+ 2264 00a8 1022 movs r2, #16
+ 2265 00aa 1A60 str r2, [r3]
+ 2266 .L166:
+1781:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2267 .loc 1 1781 0
+ 2268 @ sp needed
+ 2269 .LVL187:
+ 2270 00ac 10BD pop {r4, pc}
+ 2271 .LVL188:
+ 2272 .L172:
+ ARM GAS /tmp/cchTrxI7.s page 89
+
+
+1708:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2273 .loc 1 1708 0
+ 2274 00ae A36B ldr r3, [r4, #56]
+ 2275 00b0 2022 movs r2, #32
+ 2276 00b2 1343 orrs r3, r2
+ 2277 00b4 A363 str r3, [r4, #56]
+1711:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2278 .loc 1 1711 0
+ 2279 00b6 E36B ldr r3, [r4, #60]
+ 2280 00b8 1F3A subs r2, r2, #31
+ 2281 00ba 1343 orrs r3, r2
+ 2282 00bc E363 str r3, [r4, #60]
+ 2283 00be CFE7 b .L171
+ 2284 .LVL189:
+ 2285 .L177:
+1738:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2286 .loc 1 1738 0
+ 2287 00c0 A26B ldr r2, [r4, #56]
+ 2288 00c2 8023 movs r3, #128
+ 2289 00c4 5B02 lsls r3, r3, #9
+ 2290 00c6 1343 orrs r3, r2
+ 2291 00c8 A363 str r3, [r4, #56]
+1743:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** #endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
+ 2292 .loc 1 1743 0
+ 2293 00ca 2000 movs r0, r4
+ 2294 00cc FFF7FEFF bl HAL_ADC_LevelOutOfWindowCallback
+ 2295 .LVL190:
+1747:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2296 .loc 1 1747 0
+ 2297 00d0 2368 ldr r3, [r4]
+ 2298 00d2 8022 movs r2, #128
+ 2299 00d4 1A60 str r2, [r3]
+ 2300 00d6 D0E7 b .L173
+ 2301 .L179:
+ 2302 .align 2
+ 2303 .L178:
+ 2304 00d8 FEFEFFFF .word -258
+ 2305 .cfi_endproc
+ 2306 .LFE53:
+ 2308 .section .text.HAL_ADC_ConfigChannel,"ax",%progbits
+ 2309 .align 1
+ 2310 .global HAL_ADC_ConfigChannel
+ 2311 .syntax unified
+ 2312 .code 16
+ 2313 .thumb_func
+ 2314 .fpu softvfp
+ 2316 HAL_ADC_ConfigChannel:
+ 2317 .LFB58:
+1890:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 2318 .loc 1 1890 0
+ 2319 .cfi_startproc
+ 2320 @ args = 0, pretend = 0, frame = 8
+ 2321 @ frame_needed = 0, uses_anonymous_args = 0
+ 2322 .LVL191:
+ 2323 0000 30B5 push {r4, r5, lr}
+ 2324 .LCFI18:
+ 2325 .cfi_def_cfa_offset 12
+ ARM GAS /tmp/cchTrxI7.s page 90
+
+
+ 2326 .cfi_offset 4, -12
+ 2327 .cfi_offset 5, -8
+ 2328 .cfi_offset 14, -4
+ 2329 0002 83B0 sub sp, sp, #12
+ 2330 .LCFI19:
+ 2331 .cfi_def_cfa_offset 24
+ 2332 0004 0400 movs r4, r0
+ 2333 .LVL192:
+1892:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2334 .loc 1 1892 0
+ 2335 0006 0023 movs r3, #0
+ 2336 0008 0193 str r3, [sp, #4]
+1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2337 .loc 1 1905 0
+ 2338 000a 3433 adds r3, r3, #52
+ 2339 000c C35C ldrb r3, [r0, r3]
+ 2340 000e 012B cmp r3, #1
+ 2341 0010 00D1 bne .LCB2176
+ 2342 0012 8AE0 b .L190 @long jump
+ 2343 .LCB2176:
+1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2344 .loc 1 1905 0 is_stmt 0 discriminator 2
+ 2345 0014 3423 movs r3, #52
+ 2346 0016 0122 movs r2, #1
+ 2347 0018 C254 strb r2, [r0, r3]
+1913:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2348 .loc 1 1913 0 is_stmt 1 discriminator 2
+ 2349 001a 0368 ldr r3, [r0]
+ 2350 001c 9A68 ldr r2, [r3, #8]
+ 2351 001e 5207 lsls r2, r2, #29
+ 2352 0020 75D4 bmi .L182
+1917:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2353 .loc 1 1917 0
+ 2354 0022 434A ldr r2, .L201
+ 2355 0024 4868 ldr r0, [r1, #4]
+ 2356 .LVL193:
+ 2357 0026 9042 cmp r0, r2
+ 2358 0028 56D0 beq .L183
+1921:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2359 .loc 1 1921 0
+ 2360 002a 9A6A ldr r2, [r3, #40]
+ 2361 002c 0120 movs r0, #1
+ 2362 002e 0D68 ldr r5, [r1]
+ 2363 0030 A840 lsls r0, r0, r5
+ 2364 0032 0243 orrs r2, r0
+ 2365 0034 9A62 str r2, [r3, #40]
+1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2366 .loc 1 1928 0
+ 2367 0036 E36A ldr r3, [r4, #44]
+ 2368 0038 8022 movs r2, #128
+ 2369 003a 5205 lsls r2, r2, #21
+ 2370 003c 9342 cmp r3, r2
+ 2371 003e 1ED0 beq .L184
+1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2372 .loc 1 1928 0 is_stmt 0 discriminator 1
+ 2373 0040 012B cmp r3, #1
+ 2374 0042 1CD0 beq .L184
+ ARM GAS /tmp/cchTrxI7.s page 91
+
+
+1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2375 .loc 1 1928 0 discriminator 2
+ 2376 0044 022B cmp r3, #2
+ 2377 0046 1AD0 beq .L184
+1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2378 .loc 1 1928 0 discriminator 3
+ 2379 0048 032B cmp r3, #3
+ 2380 004a 18D0 beq .L184
+1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2381 .loc 1 1928 0 discriminator 4
+ 2382 004c 042B cmp r3, #4
+ 2383 004e 16D0 beq .L184
+1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2384 .loc 1 1928 0 discriminator 5
+ 2385 0050 052B cmp r3, #5
+ 2386 0052 14D0 beq .L184
+1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2387 .loc 1 1928 0 discriminator 6
+ 2388 0054 062B cmp r3, #6
+ 2389 0056 12D0 beq .L184
+1928:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2390 .loc 1 1928 0 discriminator 7
+ 2391 0058 072B cmp r3, #7
+ 2392 005a 10D0 beq .L184
+1932:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2393 .loc 1 1932 0 is_stmt 1
+ 2394 005c 2268 ldr r2, [r4]
+ 2395 005e 5069 ldr r0, [r2, #20]
+ 2396 0060 0723 movs r3, #7
+ 2397 0062 0340 ands r3, r0
+ 2398 0064 8868 ldr r0, [r1, #8]
+ 2399 0066 9842 cmp r0, r3
+ 2400 0068 09D0 beq .L184
+1936:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2401 .loc 1 1936 0
+ 2402 006a 5069 ldr r0, [r2, #20]
+ 2403 006c 0723 movs r3, #7
+ 2404 006e 9843 bics r0, r3
+ 2405 0070 5061 str r0, [r2, #20]
+1939:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2406 .loc 1 1939 0
+ 2407 0072 2068 ldr r0, [r4]
+ 2408 0074 4269 ldr r2, [r0, #20]
+ 2409 0076 8D68 ldr r5, [r1, #8]
+ 2410 0078 2B40 ands r3, r5
+ 2411 007a 1343 orrs r3, r2
+ 2412 007c 4361 str r3, [r0, #20]
+ 2413 .L184:
+1949:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2414 .loc 1 1949 0
+ 2415 007e 0B68 ldr r3, [r1]
+ 2416 0080 1A00 movs r2, r3
+ 2417 0082 103A subs r2, r2, #16
+ 2418 0084 022A cmp r2, #2
+ 2419 0086 4CD8 bhi .L191
+1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2420 .loc 1 1954 0
+ ARM GAS /tmp/cchTrxI7.s page 92
+
+
+ 2421 0088 2A4A ldr r2, .L201+4
+ 2422 008a 1268 ldr r2, [r2]
+ 2423 008c 102B cmp r3, #16
+ 2424 008e 0ED0 beq .L192
+1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2425 .loc 1 1954 0 is_stmt 0 discriminator 1
+ 2426 0090 112B cmp r3, #17
+ 2427 0092 09D0 beq .L198
+1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2428 .loc 1 1954 0
+ 2429 0094 8023 movs r3, #128
+ 2430 0096 5B04 lsls r3, r3, #17
+ 2431 .L186:
+1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2432 .loc 1 1954 0 discriminator 8
+ 2433 0098 1343 orrs r3, r2
+ 2434 009a 264A ldr r2, .L201+4
+ 2435 009c 1360 str r3, [r2]
+1957:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2436 .loc 1 1957 0 is_stmt 1 discriminator 8
+ 2437 009e 0B68 ldr r3, [r1]
+ 2438 00a0 102B cmp r3, #16
+ 2439 00a2 07D0 beq .L199
+1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U;
+ 2440 .loc 1 1891 0
+ 2441 00a4 0020 movs r0, #0
+ 2442 00a6 37E0 b .L185
+ 2443 .L198:
+1954:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2444 .loc 1 1954 0
+ 2445 00a8 8023 movs r3, #128
+ 2446 00aa DB03 lsls r3, r3, #15
+ 2447 00ac F4E7 b .L186
+ 2448 .L192:
+ 2449 00ae 8023 movs r3, #128
+ 2450 00b0 1B04 lsls r3, r3, #16
+ 2451 00b2 F1E7 b .L186
+ 2452 .L199:
+1961:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** while(wait_loop_index != 0U)
+ 2453 .loc 1 1961 0
+ 2454 00b4 204B ldr r3, .L201+8
+ 2455 00b6 1868 ldr r0, [r3]
+ 2456 00b8 2049 ldr r1, .L201+12
+ 2457 .LVL194:
+ 2458 00ba FFF7FEFF bl __aeabi_uidiv
+ 2459 .LVL195:
+ 2460 00be 8300 lsls r3, r0, #2
+ 2461 00c0 1818 adds r0, r3, r0
+ 2462 00c2 4300 lsls r3, r0, #1
+ 2463 00c4 0193 str r3, [sp, #4]
+1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2464 .loc 1 1962 0
+ 2465 00c6 02E0 b .L187
+ 2466 .L188:
+1964:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2467 .loc 1 1964 0
+ 2468 00c8 019B ldr r3, [sp, #4]
+ ARM GAS /tmp/cchTrxI7.s page 93
+
+
+ 2469 00ca 013B subs r3, r3, #1
+ 2470 00cc 0193 str r3, [sp, #4]
+ 2471 .L187:
+1962:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2472 .loc 1 1962 0
+ 2473 00ce 019B ldr r3, [sp, #4]
+ 2474 00d0 002B cmp r3, #0
+ 2475 00d2 F9D1 bne .L188
+1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U;
+ 2476 .loc 1 1891 0
+ 2477 00d4 0020 movs r0, #0
+ 2478 00d6 1FE0 b .L185
+ 2479 .LVL196:
+ 2480 .L183:
+1973:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2481 .loc 1 1973 0
+ 2482 00d8 9A6A ldr r2, [r3, #40]
+ 2483 00da 0120 movs r0, #1
+ 2484 00dc 0D68 ldr r5, [r1]
+ 2485 00de A840 lsls r0, r0, r5
+ 2486 00e0 8243 bics r2, r0
+ 2487 00e2 9A62 str r2, [r3, #40]
+1978:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2488 .loc 1 1978 0
+ 2489 00e4 0B68 ldr r3, [r1]
+ 2490 00e6 1A00 movs r2, r3
+ 2491 00e8 103A subs r2, r2, #16
+ 2492 00ea 022A cmp r2, #2
+ 2493 00ec 1BD8 bhi .L195
+1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2494 .loc 1 1983 0
+ 2495 00ee 114A ldr r2, .L201+4
+ 2496 00f0 1268 ldr r2, [r2]
+ 2497 00f2 102B cmp r3, #16
+ 2498 00f4 09D0 beq .L196
+1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2499 .loc 1 1983 0 is_stmt 0 discriminator 1
+ 2500 00f6 112B cmp r3, #17
+ 2501 00f8 05D0 beq .L200
+1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2502 .loc 1 1983 0
+ 2503 00fa 114B ldr r3, .L201+16
+ 2504 .L189:
+1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2505 .loc 1 1983 0 discriminator 8
+ 2506 00fc 1340 ands r3, r2
+ 2507 00fe 0D4A ldr r2, .L201+4
+ 2508 0100 1360 str r3, [r2]
+1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U;
+ 2509 .loc 1 1891 0 is_stmt 1 discriminator 8
+ 2510 0102 0020 movs r0, #0
+ 2511 0104 08E0 b .L185
+ 2512 .L200:
+1983:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2513 .loc 1 1983 0
+ 2514 0106 0F4B ldr r3, .L201+20
+ 2515 0108 F8E7 b .L189
+ ARM GAS /tmp/cchTrxI7.s page 94
+
+
+ 2516 .L196:
+ 2517 010a 0F4B ldr r3, .L201+24
+ 2518 010c F6E7 b .L189
+ 2519 .LVL197:
+ 2520 .L182:
+1995:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2521 .loc 1 1995 0
+ 2522 010e 836B ldr r3, [r0, #56]
+ 2523 0110 2022 movs r2, #32
+ 2524 0112 1343 orrs r3, r2
+ 2525 0114 8363 str r3, [r0, #56]
+ 2526 .LVL198:
+1997:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2527 .loc 1 1997 0
+ 2528 0116 0120 movs r0, #1
+ 2529 .LVL199:
+ 2530 .L185:
+2001:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2531 .loc 1 2001 0
+ 2532 0118 3423 movs r3, #52
+ 2533 011a 0022 movs r2, #0
+ 2534 011c E254 strb r2, [r4, r3]
+ 2535 .LVL200:
+ 2536 .L181:
+2005:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2537 .loc 1 2005 0
+ 2538 011e 03B0 add sp, sp, #12
+ 2539 @ sp needed
+ 2540 .LVL201:
+ 2541 0120 30BD pop {r4, r5, pc}
+ 2542 .LVL202:
+ 2543 .L191:
+1891:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** __IO uint32_t wait_loop_index = 0U;
+ 2544 .loc 1 1891 0
+ 2545 0122 0020 movs r0, #0
+ 2546 0124 F8E7 b .L185
+ 2547 .L195:
+ 2548 0126 0020 movs r0, #0
+ 2549 0128 F6E7 b .L185
+ 2550 .LVL203:
+ 2551 .L190:
+1905:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2552 .loc 1 1905 0
+ 2553 012a 0220 movs r0, #2
+ 2554 .LVL204:
+ 2555 012c F7E7 b .L181
+ 2556 .L202:
+ 2557 012e C046 .align 2
+ 2558 .L201:
+ 2559 0130 01100000 .word 4097
+ 2560 0134 08270140 .word 1073817352
+ 2561 0138 00000000 .word SystemCoreClock
+ 2562 013c 40420F00 .word 1000000
+ 2563 0140 FFFFFFFE .word -16777217
+ 2564 0144 FFFFBFFF .word -4194305
+ 2565 0148 FFFF7FFF .word -8388609
+ 2566 .cfi_endproc
+ ARM GAS /tmp/cchTrxI7.s page 95
+
+
+ 2567 .LFE58:
+ 2569 .section .text.HAL_ADC_AnalogWDGConfig,"ax",%progbits
+ 2570 .align 1
+ 2571 .global HAL_ADC_AnalogWDGConfig
+ 2572 .syntax unified
+ 2573 .code 16
+ 2574 .thumb_func
+ 2575 .fpu softvfp
+ 2577 HAL_ADC_AnalogWDGConfig:
+ 2578 .LFB59:
+2023:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
+ 2579 .loc 1 2023 0
+ 2580 .cfi_startproc
+ 2581 @ args = 0, pretend = 0, frame = 0
+ 2582 @ frame_needed = 0, uses_anonymous_args = 0
+ 2583 .LVL205:
+ 2584 0000 70B5 push {r4, r5, r6, lr}
+ 2585 .LCFI20:
+ 2586 .cfi_def_cfa_offset 16
+ 2587 .cfi_offset 4, -16
+ 2588 .cfi_offset 5, -12
+ 2589 .cfi_offset 6, -8
+ 2590 .cfi_offset 14, -4
+ 2591 .LVL206:
+2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2592 .loc 1 2044 0
+ 2593 0002 3423 movs r3, #52
+ 2594 0004 C35C ldrb r3, [r0, r3]
+ 2595 0006 012B cmp r3, #1
+ 2596 0008 49D0 beq .L208
+2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2597 .loc 1 2044 0 is_stmt 0 discriminator 2
+ 2598 000a 3423 movs r3, #52
+ 2599 000c 0122 movs r2, #1
+ 2600 000e C254 strb r2, [r0, r3]
+2051:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2601 .loc 1 2051 0 is_stmt 1 discriminator 2
+ 2602 0010 0368 ldr r3, [r0]
+ 2603 0012 9A68 ldr r2, [r3, #8]
+ 2604 0014 5207 lsls r2, r2, #29
+ 2605 0016 38D4 bmi .L205
+2058:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR1_AWDEN |
+ 2606 .loc 1 2058 0
+ 2607 0018 DA68 ldr r2, [r3, #12]
+ 2608 001a 224C ldr r4, .L210
+ 2609 001c 2240 ands r2, r4
+ 2610 001e DA60 str r2, [r3, #12]
+2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) );
+ 2611 .loc 1 2062 0
+ 2612 0020 0468 ldr r4, [r0]
+ 2613 0022 E368 ldr r3, [r4, #12]
+2063:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2614 .loc 1 2063 0
+ 2615 0024 4A68 ldr r2, [r1, #4]
+ 2616 0026 9206 lsls r2, r2, #26
+2062:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** ADC_CFGR_AWDCH(AnalogWDGConfig->Channel) );
+ 2617 .loc 1 2062 0
+ ARM GAS /tmp/cchTrxI7.s page 96
+
+
+ 2618 0028 0D68 ldr r5, [r1]
+ 2619 002a 2A43 orrs r2, r5
+ 2620 002c 1343 orrs r3, r2
+ 2621 002e E360 str r3, [r4, #12]
+2067:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted = ADC_AWD1THRESHOLD_SHIFT_RESOLUTION(hadc, AnalogWDGConfig->LowThres
+ 2622 .loc 1 2067 0
+ 2623 0030 0468 ldr r4, [r0]
+ 2624 0032 E368 ldr r3, [r4, #12]
+ 2625 0034 DB08 lsrs r3, r3, #3
+ 2626 0036 0322 movs r2, #3
+ 2627 0038 1340 ands r3, r2
+ 2628 003a 5B00 lsls r3, r3, #1
+ 2629 003c CD68 ldr r5, [r1, #12]
+ 2630 003e 9D40 lsls r5, r5, r3
+ 2631 0040 2B00 movs r3, r5
+ 2632 .LVL207:
+2068:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2633 .loc 1 2068 0
+ 2634 0042 E568 ldr r5, [r4, #12]
+ 2635 0044 ED08 lsrs r5, r5, #3
+ 2636 0046 2A40 ands r2, r5
+ 2637 0048 5200 lsls r2, r2, #1
+ 2638 004a 0D69 ldr r5, [r1, #16]
+ 2639 004c 9540 lsls r5, r5, r2
+ 2640 .LVL208:
+2071:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** hadc->Instance->TR |= ( ADC_TRX_HIGHTHRESHOLD (tmpAWDHighThresholdShifted) |
+ 2641 .loc 1 2071 0
+ 2642 004e 226A ldr r2, [r4, #32]
+ 2643 0050 154E ldr r6, .L210+4
+ 2644 0052 3240 ands r2, r6
+ 2645 0054 2262 str r2, [r4, #32]
+2072:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** tmpAWDLowThresholdShifted );
+ 2646 .loc 1 2072 0
+ 2647 0056 0468 ldr r4, [r0]
+ 2648 0058 226A ldr r2, [r4, #32]
+ 2649 005a 1B04 lsls r3, r3, #16
+ 2650 .LVL209:
+ 2651 005c 2B43 orrs r3, r5
+ 2652 005e 1343 orrs r3, r2
+ 2653 0060 2362 str r3, [r4, #32]
+2078:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2654 .loc 1 2078 0
+ 2655 0062 0368 ldr r3, [r0]
+ 2656 0064 8022 movs r2, #128
+ 2657 0066 1A60 str r2, [r3]
+2081:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** {
+ 2658 .loc 1 2081 0
+ 2659 0068 0B7A ldrb r3, [r1, #8]
+ 2660 006a 012B cmp r3, #1
+ 2661 006c 06D0 beq .L209
+2089:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2662 .loc 1 2089 0
+ 2663 006e 0268 ldr r2, [r0]
+ 2664 0070 5368 ldr r3, [r2, #4]
+ 2665 0072 8021 movs r1, #128
+ 2666 .LVL210:
+ 2667 0074 8B43 bics r3, r1
+ ARM GAS /tmp/cchTrxI7.s page 97
+
+
+ 2668 0076 5360 str r3, [r2, #4]
+2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2669 .loc 1 2024 0
+ 2670 0078 0023 movs r3, #0
+ 2671 007a 0BE0 b .L207
+ 2672 .LVL211:
+ 2673 .L209:
+2084:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2674 .loc 1 2084 0
+ 2675 007c 0268 ldr r2, [r0]
+ 2676 007e 5368 ldr r3, [r2, #4]
+ 2677 0080 8021 movs r1, #128
+ 2678 .LVL212:
+ 2679 0082 0B43 orrs r3, r1
+ 2680 0084 5360 str r3, [r2, #4]
+2024:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2681 .loc 1 2024 0
+ 2682 0086 0023 movs r3, #0
+ 2683 0088 04E0 b .L207
+ 2684 .LVL213:
+ 2685 .L205:
+2098:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2686 .loc 1 2098 0
+ 2687 008a 836B ldr r3, [r0, #56]
+ 2688 008c 2022 movs r2, #32
+ 2689 008e 1343 orrs r3, r2
+ 2690 0090 8363 str r3, [r0, #56]
+ 2691 .LVL214:
+2100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2692 .loc 1 2100 0
+ 2693 0092 0123 movs r3, #1
+ 2694 .LVL215:
+ 2695 .L207:
+2105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2696 .loc 1 2105 0
+ 2697 0094 3422 movs r2, #52
+ 2698 0096 0021 movs r1, #0
+ 2699 0098 8154 strb r1, [r0, r2]
+ 2700 .LVL216:
+ 2701 .L204:
+2109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2702 .loc 1 2109 0
+ 2703 009a 1800 movs r0, r3
+ 2704 .LVL217:
+ 2705 @ sp needed
+ 2706 009c 70BD pop {r4, r5, r6, pc}
+ 2707 .LVL218:
+ 2708 .L208:
+2044:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2709 .loc 1 2044 0
+ 2710 009e 0223 movs r3, #2
+ 2711 00a0 FBE7 b .L204
+ 2712 .L211:
+ 2713 00a2 C046 .align 2
+ 2714 .L210:
+ 2715 00a4 FFFF3F83 .word -2092957697
+ 2716 00a8 00F000F0 .word -268374016
+ ARM GAS /tmp/cchTrxI7.s page 98
+
+
+ 2717 .cfi_endproc
+ 2718 .LFE59:
+ 2720 .section .text.HAL_ADC_GetState,"ax",%progbits
+ 2721 .align 1
+ 2722 .global HAL_ADC_GetState
+ 2723 .syntax unified
+ 2724 .code 16
+ 2725 .thumb_func
+ 2726 .fpu softvfp
+ 2728 HAL_ADC_GetState:
+ 2729 .LFB60:
+2145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** /* Check the parameters */
+ 2730 .loc 1 2145 0
+ 2731 .cfi_startproc
+ 2732 @ args = 0, pretend = 0, frame = 0
+ 2733 @ frame_needed = 0, uses_anonymous_args = 0
+ 2734 @ link register save eliminated.
+ 2735 .LVL219:
+2150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2736 .loc 1 2150 0
+ 2737 0000 806B ldr r0, [r0, #56]
+ 2738 .LVL220:
+2151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2739 .loc 1 2151 0
+ 2740 @ sp needed
+ 2741 0002 7047 bx lr
+ 2742 .cfi_endproc
+ 2743 .LFE60:
+ 2745 .section .text.HAL_ADC_GetError,"ax",%progbits
+ 2746 .align 1
+ 2747 .global HAL_ADC_GetError
+ 2748 .syntax unified
+ 2749 .code 16
+ 2750 .thumb_func
+ 2751 .fpu softvfp
+ 2753 HAL_ADC_GetError:
+ 2754 .LFB61:
+2159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** return hadc->ErrorCode;
+ 2755 .loc 1 2159 0
+ 2756 .cfi_startproc
+ 2757 @ args = 0, pretend = 0, frame = 0
+ 2758 @ frame_needed = 0, uses_anonymous_args = 0
+ 2759 @ link register save eliminated.
+ 2760 .LVL221:
+2160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c **** }
+ 2761 .loc 1 2160 0
+ 2762 0000 C06B ldr r0, [r0, #60]
+ 2763 .LVL222:
+2161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_adc.c ****
+ 2764 .loc 1 2161 0
+ 2765 @ sp needed
+ 2766 0002 7047 bx lr
+ 2767 .cfi_endproc
+ 2768 .LFE61:
+ 2770 .text
+ 2771 .Letext0:
+ 2772 .file 2 "/home/janhenrik/programme/gcc-arm-none-eabi-7-2018-q2-update/arm-none-eabi/include/machin
+ ARM GAS /tmp/cchTrxI7.s page 99
+
+
+ 2773 .file 3 "/home/janhenrik/programme/gcc-arm-none-eabi-7-2018-q2-update/arm-none-eabi/include/sys/_s
+ 2774 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h"
+ 2775 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h"
+ 2776 .file 6 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h"
+ 2777 .file 7 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_def.h"
+ 2778 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_dma.h"
+ 2779 .file 9 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_adc.h"
+ 2780 .file 10 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h"
+ ARM GAS /tmp/cchTrxI7.s page 100
+
+
+DEFINED SYMBOLS
+ *ABS*:0000000000000000 stm32f0xx_hal_adc.c
+ /tmp/cchTrxI7.s:16 .text.ADC_ConversionStop:0000000000000000 $t
+ /tmp/cchTrxI7.s:22 .text.ADC_ConversionStop:0000000000000000 ADC_ConversionStop
+ /tmp/cchTrxI7.s:106 .text.ADC_Disable:0000000000000000 $t
+ /tmp/cchTrxI7.s:112 .text.ADC_Disable:0000000000000000 ADC_Disable
+ /tmp/cchTrxI7.s:228 .text.ADC_Enable:0000000000000000 $t
+ /tmp/cchTrxI7.s:234 .text.ADC_Enable:0000000000000000 ADC_Enable
+ /tmp/cchTrxI7.s:371 .text.ADC_Enable:000000000000009c $d
+ /tmp/cchTrxI7.s:378 .text.HAL_ADC_MspInit:0000000000000000 $t
+ /tmp/cchTrxI7.s:385 .text.HAL_ADC_MspInit:0000000000000000 HAL_ADC_MspInit
+ /tmp/cchTrxI7.s:400 .text.HAL_ADC_Init:0000000000000000 $t
+ /tmp/cchTrxI7.s:407 .text.HAL_ADC_Init:0000000000000000 HAL_ADC_Init
+ /tmp/cchTrxI7.s:704 .text.HAL_ADC_Init:0000000000000170 $d
+ /tmp/cchTrxI7.s:711 .text.HAL_ADC_MspDeInit:0000000000000000 $t
+ /tmp/cchTrxI7.s:718 .text.HAL_ADC_MspDeInit:0000000000000000 HAL_ADC_MspDeInit
+ /tmp/cchTrxI7.s:733 .text.HAL_ADC_DeInit:0000000000000000 $t
+ /tmp/cchTrxI7.s:740 .text.HAL_ADC_DeInit:0000000000000000 HAL_ADC_DeInit
+ /tmp/cchTrxI7.s:868 .text.HAL_ADC_DeInit:0000000000000094 $d
+ /tmp/cchTrxI7.s:876 .text.HAL_ADC_Start:0000000000000000 $t
+ /tmp/cchTrxI7.s:883 .text.HAL_ADC_Start:0000000000000000 HAL_ADC_Start
+ /tmp/cchTrxI7.s:972 .text.HAL_ADC_Start:000000000000005c $d
+ /tmp/cchTrxI7.s:977 .text.HAL_ADC_Stop:0000000000000000 $t
+ /tmp/cchTrxI7.s:984 .text.HAL_ADC_Stop:0000000000000000 HAL_ADC_Stop
+ /tmp/cchTrxI7.s:1053 .text.HAL_ADC_Stop:0000000000000040 $d
+ /tmp/cchTrxI7.s:1058 .text.HAL_ADC_PollForConversion:0000000000000000 $t
+ /tmp/cchTrxI7.s:1065 .text.HAL_ADC_PollForConversion:0000000000000000 HAL_ADC_PollForConversion
+ /tmp/cchTrxI7.s:1228 .text.HAL_ADC_PollForConversion:00000000000000c0 $d
+ /tmp/cchTrxI7.s:1233 .text.HAL_ADC_PollForEvent:0000000000000000 $t
+ /tmp/cchTrxI7.s:1240 .text.HAL_ADC_PollForEvent:0000000000000000 HAL_ADC_PollForEvent
+ /tmp/cchTrxI7.s:1351 .text.HAL_ADC_Start_IT:0000000000000000 $t
+ /tmp/cchTrxI7.s:1358 .text.HAL_ADC_Start_IT:0000000000000000 HAL_ADC_Start_IT
+ /tmp/cchTrxI7.s:1474 .text.HAL_ADC_Start_IT:0000000000000084 $d
+ /tmp/cchTrxI7.s:1479 .text.HAL_ADC_Stop_IT:0000000000000000 $t
+ /tmp/cchTrxI7.s:1486 .text.HAL_ADC_Stop_IT:0000000000000000 HAL_ADC_Stop_IT
+ /tmp/cchTrxI7.s:1561 .text.HAL_ADC_Stop_IT:000000000000004c $d
+ /tmp/cchTrxI7.s:1566 .text.HAL_ADC_Start_DMA:0000000000000000 $t
+ /tmp/cchTrxI7.s:1573 .text.HAL_ADC_Start_DMA:0000000000000000 HAL_ADC_Start_DMA
+ /tmp/cchTrxI7.s:1702 .text.HAL_ADC_Start_DMA:0000000000000098 $d
+ /tmp/cchTrxI7.s:1889 .text.ADC_DMAConvCplt:0000000000000000 ADC_DMAConvCplt
+ /tmp/cchTrxI7.s:2016 .text.ADC_DMAHalfConvCplt:0000000000000000 ADC_DMAHalfConvCplt
+ /tmp/cchTrxI7.s:2091 .text.ADC_DMAError:0000000000000000 ADC_DMAError
+ /tmp/cchTrxI7.s:1710 .text.HAL_ADC_Stop_DMA:0000000000000000 $t
+ /tmp/cchTrxI7.s:1717 .text.HAL_ADC_Stop_DMA:0000000000000000 HAL_ADC_Stop_DMA
+ /tmp/cchTrxI7.s:1830 .text.HAL_ADC_Stop_DMA:0000000000000078 $d
+ /tmp/cchTrxI7.s:1835 .text.HAL_ADC_GetValue:0000000000000000 $t
+ /tmp/cchTrxI7.s:1842 .text.HAL_ADC_GetValue:0000000000000000 HAL_ADC_GetValue
+ /tmp/cchTrxI7.s:1861 .text.HAL_ADC_ConvCpltCallback:0000000000000000 $t
+ /tmp/cchTrxI7.s:1868 .text.HAL_ADC_ConvCpltCallback:0000000000000000 HAL_ADC_ConvCpltCallback
+ /tmp/cchTrxI7.s:1883 .text.ADC_DMAConvCplt:0000000000000000 $t
+ /tmp/cchTrxI7.s:1983 .text.ADC_DMAConvCplt:000000000000006c $d
+ /tmp/cchTrxI7.s:1988 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 $t
+ /tmp/cchTrxI7.s:1995 .text.HAL_ADC_ConvHalfCpltCallback:0000000000000000 HAL_ADC_ConvHalfCpltCallback
+ /tmp/cchTrxI7.s:2010 .text.ADC_DMAHalfConvCplt:0000000000000000 $t
+ /tmp/cchTrxI7.s:2041 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 $t
+ /tmp/cchTrxI7.s:2048 .text.HAL_ADC_LevelOutOfWindowCallback:0000000000000000 HAL_ADC_LevelOutOfWindowCallback
+ /tmp/cchTrxI7.s:2063 .text.HAL_ADC_ErrorCallback:0000000000000000 $t
+ ARM GAS /tmp/cchTrxI7.s page 101
+
+
+ /tmp/cchTrxI7.s:2070 .text.HAL_ADC_ErrorCallback:0000000000000000 HAL_ADC_ErrorCallback
+ /tmp/cchTrxI7.s:2085 .text.ADC_DMAError:0000000000000000 $t
+ /tmp/cchTrxI7.s:2126 .text.HAL_ADC_IRQHandler:0000000000000000 $t
+ /tmp/cchTrxI7.s:2133 .text.HAL_ADC_IRQHandler:0000000000000000 HAL_ADC_IRQHandler
+ /tmp/cchTrxI7.s:2304 .text.HAL_ADC_IRQHandler:00000000000000d8 $d
+ /tmp/cchTrxI7.s:2309 .text.HAL_ADC_ConfigChannel:0000000000000000 $t
+ /tmp/cchTrxI7.s:2316 .text.HAL_ADC_ConfigChannel:0000000000000000 HAL_ADC_ConfigChannel
+ /tmp/cchTrxI7.s:2559 .text.HAL_ADC_ConfigChannel:0000000000000130 $d
+ /tmp/cchTrxI7.s:2570 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 $t
+ /tmp/cchTrxI7.s:2577 .text.HAL_ADC_AnalogWDGConfig:0000000000000000 HAL_ADC_AnalogWDGConfig
+ /tmp/cchTrxI7.s:2715 .text.HAL_ADC_AnalogWDGConfig:00000000000000a4 $d
+ /tmp/cchTrxI7.s:2721 .text.HAL_ADC_GetState:0000000000000000 $t
+ /tmp/cchTrxI7.s:2728 .text.HAL_ADC_GetState:0000000000000000 HAL_ADC_GetState
+ /tmp/cchTrxI7.s:2746 .text.HAL_ADC_GetError:0000000000000000 $t
+ /tmp/cchTrxI7.s:2753 .text.HAL_ADC_GetError:0000000000000000 HAL_ADC_GetError
+
+UNDEFINED SYMBOLS
+HAL_GetTick
+__aeabi_uidiv
+SystemCoreClock
+HAL_DMA_Start_IT
+HAL_DMA_Abort