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| author | jaseg <git@jaseg.net> | 2020-10-14 12:47:28 +0200 |
|---|---|---|
| committer | jaseg <git@jaseg.net> | 2020-10-14 12:47:28 +0200 |
| commit | 6ab94e0b318884bbcb95e2ea3835f951502e1d99 (patch) | |
| tree | 4cc5794b89f89c55ff8370ae252518ab96b5fed3 /hid-dials/Drivers/CMSIS/NN | |
| parent | 1e6e8a2062923b434b2f4f5f2a9f8c0098135b01 (diff) | |
| download | minikbd-6ab94e0b318884bbcb95e2ea3835f951502e1d99.tar.gz minikbd-6ab94e0b318884bbcb95e2ea3835f951502e1d99.tar.bz2 minikbd-6ab94e0b318884bbcb95e2ea3835f951502e1d99.zip | |
Move firmware into subdirectory
Diffstat (limited to 'hid-dials/Drivers/CMSIS/NN')
73 files changed, 0 insertions, 11827 deletions
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Compiler/EventRecorderConf.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Compiler/EventRecorderConf.h deleted file mode 100644 index 5958233..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/Compiler/EventRecorderConf.h +++ /dev/null @@ -1,44 +0,0 @@ -/*------------------------------------------------------------------------------
- * MDK - Component ::Event Recorder
- * Copyright (c) 2016 ARM Germany GmbH. All rights reserved.
- *------------------------------------------------------------------------------
- * Name: EventRecorderConf.h
- * Purpose: Event Recorder Configuration
- * Rev.: V1.0.0
- *----------------------------------------------------------------------------*/
-
-//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
-
-// <h>Event Recorder
-
-// <o>Number of Records
-// <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
-// <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-// <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
-// <1048576=>1048576
-// <i>Configure size of Event Record Buffer (each record is 16 bytes)
-// <i>Must be 2^n (min=8, max=1048576)
-#define EVENT_RECORD_COUNT 64U
-
-// <o>Time Stamp Source
-// <0=> DWT Cycle Counter <1=> SysTick
-// <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset)
-// <i>Selects source for 32-bit time stamp
-#define EVENT_TIMESTAMP_SOURCE 1
-
-// <h>SysTick Configuration
-// <i>Configure values when Time Stamp Source is set to SysTick
-
-// <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
-// <i>Defines SysTick input clock (typical identical with processor clock)
-#define SYSTICK_CLOCK 100000000U
-
-// <o>SysTick Interrupt Period [us] <1-1000000000>
-// <i>Defines time period of the SysTick timer interrupt
-#define SYSTICK_PERIOD_US 1000U
-
-// </h>
-
-// </h>
-
-//------------- <<< end of configuration section >>> ---------------------------
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM0/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM0/RTE_Components.h deleted file mode 100644 index 182fb76..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM0/RTE_Components.h +++ /dev/null @@ -1,24 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_cifar10'
- * Target: 'ARMCM0'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM0.h"
-
-#define RTE_Compiler_EventRecorder
- #define RTE_Compiler_EventRecorder_DAP
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_EVR /* Compiler I/O: STDOUT EVR */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM3/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM3/RTE_Components.h deleted file mode 100644 index 2aa5627..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM3/RTE_Components.h +++ /dev/null @@ -1,22 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_cifar10'
- * Target: 'ARMCM3'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM3.h"
-
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM4_FP/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM4_FP/RTE_Components.h deleted file mode 100644 index bdf6fb9..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM4_FP/RTE_Components.h +++ /dev/null @@ -1,22 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_cifar10'
- * Target: 'ARMCM4_FP'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM4_FP.h"
-
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM7_SP/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM7_SP/RTE_Components.h deleted file mode 100644 index 9d43970..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/RTE/_ARMCM7_SP/RTE_Components.h +++ /dev/null @@ -1,22 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_cifar10'
- * Target: 'ARMCM7_SP'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM7_SP.h"
-
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.cpp b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.cpp deleted file mode 100644 index ee1083b..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10.cpp +++ /dev/null @@ -1,196 +0,0 @@ -/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
-*
-*
-* Project: CMSIS NN Library
-* Title: arm_nnexamples_cifar10.cpp
-*
-* Description: Convolutional Neural Network Example
-*
-* Target Processor: Cortex-M4/Cortex-M7
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of Arm LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-/**
- * @ingroup groupExamples
- */
-
-/**
- * @defgroup CNNExample Convolutional Neural Network Example
- *
- * \par Description:
- * \par
- * Demonstrates a convolutional neural network (CNN) example with the use of convolution,
- * ReLU activation, pooling and fully-connected functions.
- *
- * \par Model definition:
- * \par
- * The CNN used in this example is based on CIFAR-10 example from Caffe [1].
- * The neural network consists
- * of 3 convolution layers interspersed by ReLU activation and max pooling layers, followed by a
- * fully-connected layer at the end. The input to the network is a 32x32 pixel color image, which will
- * be classified into one of the 10 output classes.
- * This example model implementation needs 32.3 KB to store weights, 40 KB for activations and
- * 3.1 KB for storing the \c im2col data.
- *
- * \image html CIFAR10_CNN.gif "Neural Network model definition"
- *
- * \par Variables Description:
- * \par
- * \li \c conv1_wt, \c conv2_wt, \c conv3_wt are convolution layer weight matrices
- * \li \c conv1_bias, \c conv2_bias, \c conv3_bias are convolution layer bias arrays
- * \li \c ip1_wt, ip1_bias point to fully-connected layer weights and biases
- * \li \c input_data points to the input image data
- * \li \c output_data points to the classification output
- * \li \c col_buffer is a buffer to store the \c im2col output
- * \li \c scratch_buffer is used to store the activation data (intermediate layer outputs)
- *
- * \par CMSIS DSP Software Library Functions Used:
- * \par
- * - arm_convolve_HWC_q7_RGB()
- * - arm_convolve_HWC_q7_fast()
- * - arm_relu_q7()
- * - arm_maxpool_q7_HWC()
- * - arm_avepool_q7_HWC()
- * - arm_fully_connected_q7_opt()
- * - arm_fully_connected_q7()
- *
- * <b> Refer </b>
- * \link arm_nnexamples_cifar10.cpp \endlink
- *
- * \par [1] https://github.com/BVLC/caffe
- */
-
-#include <stdint.h>
-#include <stdio.h>
-#include "arm_math.h"
-#include "arm_nnexamples_cifar10_parameter.h"
-#include "arm_nnexamples_cifar10_weights.h"
-
-#include "arm_nnfunctions.h"
-#include "arm_nnexamples_cifar10_inputs.h"
-
-#ifdef _RTE_
-#include "RTE_Components.h"
-#ifdef RTE_Compiler_EventRecorder
-#include "EventRecorder.h"
-#endif
-#endif
-
-// include the input and weights
-
-static q7_t conv1_wt[CONV1_IM_CH * CONV1_KER_DIM * CONV1_KER_DIM * CONV1_OUT_CH] = CONV1_WT;
-static q7_t conv1_bias[CONV1_OUT_CH] = CONV1_BIAS;
-
-static q7_t conv2_wt[CONV2_IM_CH * CONV2_KER_DIM * CONV2_KER_DIM * CONV2_OUT_CH] = CONV2_WT;
-static q7_t conv2_bias[CONV2_OUT_CH] = CONV2_BIAS;
-
-static q7_t conv3_wt[CONV3_IM_CH * CONV3_KER_DIM * CONV3_KER_DIM * CONV3_OUT_CH] = CONV3_WT;
-static q7_t conv3_bias[CONV3_OUT_CH] = CONV3_BIAS;
-
-static q7_t ip1_wt[IP1_DIM * IP1_OUT] = IP1_WT;
-static q7_t ip1_bias[IP1_OUT] = IP1_BIAS;
-
-/* Here the image_data should be the raw uint8 type RGB image in [RGB, RGB, RGB ... RGB] format */
-uint8_t image_data[CONV1_IM_CH * CONV1_IM_DIM * CONV1_IM_DIM] = IMG_DATA;
-q7_t output_data[IP1_OUT];
-
-//vector buffer: max(im2col buffer,average pool buffer, fully connected buffer)
-q7_t col_buffer[2 * 5 * 5 * 32 * 2];
-
-q7_t scratch_buffer[32 * 32 * 10 * 4];
-
-int main()
-{
- #ifdef RTE_Compiler_EventRecorder
- EventRecorderInitialize (EventRecordAll, 1); // initialize and start Event Recorder
- #endif
-
- printf("start execution\n");
- /* start the execution */
-
- q7_t *img_buffer1 = scratch_buffer;
- q7_t *img_buffer2 = img_buffer1 + 32 * 32 * 32;
-
- /* input pre-processing */
- int mean_data[3] = INPUT_MEAN_SHIFT;
- unsigned int scale_data[3] = INPUT_RIGHT_SHIFT;
- for (int i=0;i<32*32*3; i+=3) {
- img_buffer2[i] = (q7_t)__SSAT( ((((int)image_data[i] - mean_data[0])<<7) + (0x1<<(scale_data[0]-1)))
- >> scale_data[0], 8);
- img_buffer2[i+1] = (q7_t)__SSAT( ((((int)image_data[i+1] - mean_data[1])<<7) + (0x1<<(scale_data[1]-1)))
- >> scale_data[1], 8);
- img_buffer2[i+2] = (q7_t)__SSAT( ((((int)image_data[i+2] - mean_data[2])<<7) + (0x1<<(scale_data[2]-1)))
- >> scale_data[2], 8);
- }
-
- // conv1 img_buffer2 -> img_buffer1
- arm_convolve_HWC_q7_RGB(img_buffer2, CONV1_IM_DIM, CONV1_IM_CH, conv1_wt, CONV1_OUT_CH, CONV1_KER_DIM, CONV1_PADDING,
- CONV1_STRIDE, conv1_bias, CONV1_BIAS_LSHIFT, CONV1_OUT_RSHIFT, img_buffer1, CONV1_OUT_DIM,
- (q15_t *) col_buffer, NULL);
-
- arm_relu_q7(img_buffer1, CONV1_OUT_DIM * CONV1_OUT_DIM * CONV1_OUT_CH);
-
- // pool1 img_buffer1 -> img_buffer2
- arm_maxpool_q7_HWC(img_buffer1, CONV1_OUT_DIM, CONV1_OUT_CH, POOL1_KER_DIM,
- POOL1_PADDING, POOL1_STRIDE, POOL1_OUT_DIM, NULL, img_buffer2);
-
- // conv2 img_buffer2 -> img_buffer1
- arm_convolve_HWC_q7_fast(img_buffer2, CONV2_IM_DIM, CONV2_IM_CH, conv2_wt, CONV2_OUT_CH, CONV2_KER_DIM,
- CONV2_PADDING, CONV2_STRIDE, conv2_bias, CONV2_BIAS_LSHIFT, CONV2_OUT_RSHIFT, img_buffer1,
- CONV2_OUT_DIM, (q15_t *) col_buffer, NULL);
-
- arm_relu_q7(img_buffer1, CONV2_OUT_DIM * CONV2_OUT_DIM * CONV2_OUT_CH);
-
- // pool2 img_buffer1 -> img_buffer2
- arm_maxpool_q7_HWC(img_buffer1, CONV2_OUT_DIM, CONV2_OUT_CH, POOL2_KER_DIM,
- POOL2_PADDING, POOL2_STRIDE, POOL2_OUT_DIM, col_buffer, img_buffer2);
-
-// conv3 img_buffer2 -> img_buffer1
- arm_convolve_HWC_q7_fast(img_buffer2, CONV3_IM_DIM, CONV3_IM_CH, conv3_wt, CONV3_OUT_CH, CONV3_KER_DIM,
- CONV3_PADDING, CONV3_STRIDE, conv3_bias, CONV3_BIAS_LSHIFT, CONV3_OUT_RSHIFT, img_buffer1,
- CONV3_OUT_DIM, (q15_t *) col_buffer, NULL);
-
- arm_relu_q7(img_buffer1, CONV3_OUT_DIM * CONV3_OUT_DIM * CONV3_OUT_CH);
-
- // pool3 img_buffer-> img_buffer2
- arm_maxpool_q7_HWC(img_buffer1, CONV3_OUT_DIM, CONV3_OUT_CH, POOL3_KER_DIM,
- POOL3_PADDING, POOL3_STRIDE, POOL3_OUT_DIM, col_buffer, img_buffer2);
-
- arm_fully_connected_q7_opt(img_buffer2, ip1_wt, IP1_DIM, IP1_OUT, IP1_BIAS_LSHIFT, IP1_OUT_RSHIFT, ip1_bias,
- output_data, (q15_t *) img_buffer1);
-
- arm_softmax_q7(output_data, 10, output_data);
-
- for (int i = 0; i < 10; i++)
- {
- printf("%d: %d\n", i, output_data[i]);
- }
-
- return 0;
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_inputs.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_inputs.h deleted file mode 100644 index 4ff8dc2..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_inputs.h +++ /dev/null @@ -1,6 +0,0 @@ -/* Here are two different test images */
-
-//#define IMG_DATA {158,112,49,159,111,47,165,116,51,166,118,53,160,112,46,156,109,41,162,115,47,159,113,45,158,111,44,159,113,41,161,116,41,160,111,52,161,111,49,166,117,41,169,117,45,170,119,44,167,117,40,162,113,38,160,111,39,160,112,43,156,109,44,149,107,45,150,107,45,148,106,43,149,107,44,143,101,39,140,98,43,141,97,41,143,97,38,137,95,36,126,91,36,116,85,33,152,112,51,151,110,40,159,114,45,166,116,56,162,112,49,160,113,43,164,117,47,162,114,45,163,116,46,156,110,38,155,111,41,159,110,54,163,113,52,170,119,41,171,117,40,171,115,33,169,115,30,160,111,33,154,112,41,151,115,50,145,110,53,139,104,55,140,102,52,141,100,48,149,105,50,147,102,46,145,102,45,142,97,38,143,98,34,136,95,31,125,91,32,119,88,34,151,110,47,151,109,33,158,111,36,167,111,48,160,106,42,163,115,44,165,117,45,165,117,45,163,115,43,162,115,43,158,114,48,157,109,57,161,111,51,166,115,38,167,114,37,169,113,35,170,116,39,159,114,47,145,111,54,121,96,49,110,90,52,98,78,50,101,77,47,114,85,50,120,86,48,134,96,55,143,103,51,140,99,39,142,99,35,139,98,34,130,95,34,120,89,33,155,107,40,155,110,32,160,109,31,174,112,44,167,110,43,167,117,46,169,120,48,169,119,48,165,115,44,165,117,45,167,123,57,191,146,95,177,130,75,157,111,41,162,115,47,164,114,54,158,112,58,149,111,67,104,80,47,103,87,65,98,90,76,92,90,84,80,75,66,74,63,50,86,70,52,83,62,39,113,85,45,132,98,46,140,102,43,140,101,39,136,99,39,127,94,36,155,107,41,156,114,48,161,115,49,170,114,47,169,114,43,163,113,40,169,120,47,166,116,44,164,113,41,164,116,42,173,128,59,246,214,164,195,156,107,151,114,56,146,111,60,142,108,71,111,80,50,78,53,31,85,69,56,113,103,98,112,110,111,106,114,118,97,102,105,93,94,93,74,72,67,84,78,70,85,73,47,105,83,45,128,96,48,138,101,46,133,94,36,129,93,36,148,109,54,133,104,64,130,100,57,147,112,53,161,115,44,165,113,39,167,116,41,167,115,41,163,111,37,165,116,39,163,118,42,180,138,85,157,122,78,128,102,58,97,75,43,66,50,31,69,58,43,66,56,45,89,83,76,118,113,110,122,121,120,119,122,122,114,116,116,94,96,96,99,100,97,91,91,86,58,58,47,67,58,37,108,84,49,140,105,58,138,98,44,134,95,40,127,100,57,109,95,80,47,37,17,88,74,28,153,117,48,170,118,43,168,115,40,170,118,43,169,117,42,166,116,37,164,120,39,147,107,52,129,98,59,127,108,75,100,87,70,68,67,57,78,83,72,72,75,64,83,84,74,132,130,121,146,142,132,124,118,108,105,99,90,107,102,94,115,111,103,85,83,77,63,71,69,46,47,39,79,61,36,132,98,58,141,99,48,134,93,39,131,115,90,99,96,92,42,43,38,70,64,41,143,111,56,167,117,42,165,114,36,168,116,39,171,119,49,161,113,51,140,109,51,120,94,49,130,110,77,144,131,107,116,106,93,88,87,79,91,95,88,85,88,82,77,77,69,124,118,107,163,153,140,136,124,112,102,93,81,106,98,88,100,93,84,85,81,74,54,60,58,49,53,49,57,47,32,107,83,50,138,103,51,136,97,39,170,161,144,103,105,105,54,58,59,124,121,113,153,124,82,161,113,43,163,117,41,166,122,50,165,121,66,174,135,95,113,89,59,125,105,78,157,141,121,156,143,128,121,111,101,86,80,74,82,81,77,84,85,82,80,78,73,81,71,61,138,125,112,146,135,123,113,103,93,87,79,70,83,77,69,86,82,76,71,73,67,56,57,53,40,35,27,74,59,35,133,106,59,137,103,45,180,176,163,134,139,143,94,100,105,154,154,149,174,149,112,158,116,51,156,116,47,153,118,60,207,180,146,237,214,198,207,180,166,156,131,119,174,153,145,148,131,125,125,110,107,93,85,79,86,84,79,74,74,71,59,57,53,76,68,58,137,125,112,143,133,122,133,124,114,106,98,89,86,81,74,87,85,78,84,85,78,75,76,71,50,49,43,40,30,15,95,75,44,132,103,57,183,183,175,108,116,122,142,151,158,165,169,168,177,156,122,155,112,50,159,118,51,122,89,47,213,197,179,237,224,226,220,191,188,164,135,131,183,159,155,156,137,132,125,108,104,120,111,104,78,76,69,80,80,77,45,44,40,91,85,77,175,165,154,157,147,137,155,147,138,107,100,92,87,83,77,103,102,96,88,88,79,78,79,73,59,59,59,41,36,33,59,46,31,104,81,46,188,191,189,100,108,116,135,144,153,170,175,178,187,167,136,166,120,59,173,123,55,134,93,44,117,95,80,194,182,188,199,171,164,170,142,133,185,161,151,189,171,159,134,119,106,117,107,95,102,98,89,84,84,79,38,38,34,125,121,113,210,201,192,160,152,142,146,139,130,93,89,82,83,80,75,94,93,88,104,104,94,85,87,81,73,75,78,55,53,55,62,55,48,76,56,26,189,194,194,90,96,105,127,134,144,175,180,185,174,156,133,166,123,68,178,123,53,159,109,47,97,68,44,168,154,152,168,144,126,137,114,94,186,166,148,216,202,183,160,149,129,123,113,98,120,114,105,115,114,109,50,50,47,150,147,140,194,187,178,155,149,140,123,118,111,91,88,83,84,83,79,84,84,80,95,95,85,86,87,81,84,87,89,73,73,73,79,74,64,73,55,24,189,192,193,93,95,103,152,154,163,185,188,192,119,110,98,136,106,66,173,124,58,167,116,50,103,72,39,147,132,120,145,125,103,167,149,127,189,174,155,226,216,200,180,172,157,141,131,117,126,117,107,117,114,109,71,71,68,154,152,147,186,181,174,149,144,136,114,110,104,87,85,80,80,80,76,72,73,70,80,80,72,99,100,94,100,101,99,90,88,81,97,89,69,94,73,34,194,196,196,108,107,112,168,167,172,186,186,188,105,109,109,99,89,67,156,119,62,167,122,55,100,74,34,115,106,88,138,123,103,198,185,169,190,180,169,172,165,159,145,140,140,154,143,134,146,136,125,103,100,95,71,71,70,152,152,149,179,175,170,137,13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3,71,107,133,49,89,114,31,77,105,27,71,105,38,82,117,49,93,128,56,100,135,58,102,137,53,92,128,56,94,131,60,99,137,57,99,139,53,97,138,50,95,137,45,94,136,39,88,131,33,83,125,42,91,133,62,112,154,79,132,179,73,131,181,56,116,168,38,97,146,13,64,108,40,85,127,61,116,168,49,102,148,35,85,132,43,91,143,39,90,139,42,92,134,44,88,125,40,81,112,42,85,115,27,72,104,23,67,102,30,74,109,27,71,106,29,73,108,36,80,115,47,86,120,56,95,128,62,101,135,66,109,144,75,119,156,69,113,152,49,95,134,43,88,127,43,88,127,60,105,144,85,130,170,109,156,197,93,145,190,60,115,164,26,82,130,29,82,126,20,64,107,54,107,160,56,105,149,45,89,132,43,86,134,40,89,134,40,92,132,40,87,123,38,81,115,36,79,114,26,69,105,22,66,101,29,73,108,25,69,104,29,73,108,19,63,98,18,58,89,32,70,100,47,87,118,61,104,137,74,119,152,66,111,145,53,96,131,52,95,130,45,87,123,67,109,145,89,131,167,105,146,182,89,135,175,48,99,145,24,77,124,34,84,129,21,67,110}
-
-
-#define IMG_DATA {235,235,235,231,231,231,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,232,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,233,232,233,233,231,233,232,231,233,231,233,233,230,233,232,232,232,234,232,231,234,232,232,232,233,233,230,232,233,231,233,233,233,232,232,232,232,232,232,232,232,232,233,233,233,233,233,233,232,232,232,238,238,238,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,236,237,234,233,236,234,233,236,236,234,234,236,234,234,235,237,234,234,238,235,236,237,236,236,235,236,236,234,236,236,236,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,235,235,235,237,237,237,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,234,234,236,233,231,236,234,231,235,235,234,234,235,236,227,230,233,231,235,238,231,233,235,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,235,234,234,234,238,238,238,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,234,233,233,230,232,232,231,228,230,232,223,226,231,186,192,197,209,216,219,207,210,213,228,228,230,236,235,235,234,234,234,234,234,234,234,234,234,234,234,234,235,235,235,235,235,235,235,235,235,237,237,237,234,234,234,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,235,234,234,234,234,234,234,235,235,235,235,235,235,234,234,234,234,234,234,235,235,235,235,235,235,236,238,236,233,237,237,219,225,230,203,210,219,163,172,179,195,205,208,214,218,221,230,229,232,237,235,237,235,235,235,235,235,235,235,235,235,235,236,236,236,236,236,236,236,236,236,236,236,239,239,238,236,235,235,236,235,235,236,235,235,236,235,235,236,235,235,235,236,235,235,235,235,234,234,234,235,235,235,237,236,236,237,236,236,234,235,236,232,233,234,235,237,237,229,231,232,208,216,218,194,205,210,185,198,207,174,188,200,165,179,189,184,196,202,207,215,220,226,228,232,236,235,237,236,236,235,236,236,235,236,236,235,236,236,236,237,237,237,237,237,237,237,237,237,228,229,229,228,227,228,232,230,231,231,228,230,234,232,233,237,236,236,237,237,235,236,237,235,237,235,236,237,235,236,239,236,237,239,237,238,225,229,230,224,228,229,233,237,238,221,226,228,183,197,204,161,180,190,159,180,191,154,176,190,144,163,177,143,159,171,156,169,177,198,206,211,233,238,239,236,237,234,235,236,233,235,235,235,235,236,236,236,238,237,237,237,237,239,237,238,212,220,222,224,230,233,230,234,238,227,232,234,229,234,234,234,237,236,237,238,235,238,237,236,239,237,238,239,237,238,239,236,237,240,238,239,201,204,203,219,222,221,233,236,235,214,218,218,193,204,210,185,201,210,184,201,211,173,191,203,165,182,196,159,174,187,162,176,185,186,199,204,229,239,240,234,239,238,233,238,237,233,238,238,234,239,238,236,239,238,237,239,238,238,238,238,216,234,241,221,236,243,225,238,246,225,239,243,227,240,240,231,238,237,236,237,235,238,236,235,238,236,237,238,236,237,237,237,237,239,239,239,197,198,196,220,221,218,233,234,231,230,231,229,209,213,217,209,216,222,219,228,235,208,218,227,209,221,234,210,224,235,217,233,240,218,235,241,225,240,243,228,238,240,228,239,240,230,240,240,230,240,239,235,240,239,237,240,239,238,238,238,118,140,149,119,138,148,124,142,153,136,155,161,172,188,191,225,234,233,235,236,233,237,234,232,236,233,234,235,235,235,235,237,236,233,237,235,214,216,214,226,228,226,232,234,232,236,237,236,228,230,232,227,230,235,231,236,241,225,232,239,225,237,247,217,233,243,201,219,226,185,204,211,172,189,195,167,179,186,167,180,185,186,199,201,223,235,235,235,241,239,236,240,239,238,240,239,109,130,141,103,121,133,108,125,137,111,127,137,146,159,165,222,229,231,227,228,225,229,226,224,236,232,233,234,234,234,231,236,234,230,237,235,229,234,235,231,235,236,232,237,238,230,235,236,231,236,238,231,237,240,229,237,241,223,232,238,191,206,213,164,184,191,146,165,172,137,156,163,134,149,159,128,140,153,121,133,143,149,162,166,216,228,229,234,241,239,235,240,238,237,240,239,195,212,224,188,202,215,199,211,224,200,211,223,209,217,227,223,227,231,213,213,211,211,209,206,216,213,214,220,222,222,219,226,225,210,221,219,209,219,223,211,221,225,216,225,230,220,229,233,225,234,237,226,236,239,225,237,241,218,231,237,183,204,208,175,198,203,181,200,207,178,194,202,186,197,211,170,178,196,142,151,164,185,195,202,219,230,233,231,240,238,234,241,239,236,240,239,193,207,222,191,202,217,202,211,224,214,217,234,223,225,241,214,219,227,203,208,208,171,174,174,177,180,183,207,213,214,174,184,188,98,112,121,93,114,126,101,121,132,111,129,139,122,138,147,137,152,161,153,167,174,202,216,220,223,236,237,218,232,235,220,233,238,223,234,240,217,226,233,221,228,237,212,219,229,196,203,212,222,230,237,219,227,234,221,230,233,232,239,242,235,241,242,113,130,1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115,122,126,115,121,127,118,132,139,131,147,157,150,165,179,174,176,191,187,186,201,199,92,102,93,54,60,50,6,7,3,3,2,1,2,2,0,1,3,1,1,3,3,1,2,2,1,1,1,1,0,0,1,0,0,1,1,1,0,3,2,15,1,0,102,19,28,157,31,47,117,17,23,74,13,12,56,27,22,74,58,55,99,90,81,115,115,99,122,126,111,124,124,112,123,123,113,125,130,119,128,135,126,136,145,137,148,159,151,162,176,171,177,192,188,188,202,201,87,99,89,43,51,37,19,23,11,11,12,4,8,10,2,5,11,4,2,10,4,2,7,2,3,4,1,3,4,1,3,4,1,2,3,2,0,6,6,4,5,2,42,13,13,71,21,24,53,27,25,57,50,41,80,77,62,113,98,82,132,113,101,134,126,113,123,126,112,116,125,111,120,128,115,131,138,126,139,148,137,143,154,145,156,168,161,169,184,179,182,197,193,188,202,201,82,96,82,46,57,36,36,44,22,31,35,17,27,30,15,22,28,15,17,26,13,16,23,12,18,21,12,19,21,13,20,22,14,19,23,15,19,27,20,23,31,21,37,40,27,64,55,45,87,70,67,104,88,81,116,102,85,128,112,88,139,121,105,131,122,110,117,122,107,115,127,112,123,133,119,131,139,127,139,149,138,148,160,151,159,172,164,174,189,183,185,200,196,187,202,200,85,101,83,62,75,48,58,67,38,55,61,37,51,56,35,47,53,33,46,53,34,48,55,38,49,55,40,51,56,41,53,58,44,55,62,46,59,67,45,68,71,48,81,84,59,104,96,74,116,103,83,127,109,92,133,116,97,127,121,97,127,127,107,118,124,106,114,125,108,122,131,117,129,136,123,136,145,133,141,152,141,149,162,153,158,171,163,168,183,178,180,195,191,186,200,199}
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_parameter.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_parameter.h deleted file mode 100644 index 423d069..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_parameter.h +++ /dev/null @@ -1,43 +0,0 @@ -#define CONV1_IM_DIM 32
-#define CONV1_IM_CH 3
-#define CONV1_KER_DIM 5
-#define CONV1_PADDING 2
-#define CONV1_STRIDE 1
-#define CONV1_OUT_CH 32
-#define CONV1_OUT_DIM 32
-
-#define POOL1_KER_DIM 3
-#define POOL1_STRIDE 2
-#define POOL1_PADDING 0
-#define POOL1_OUT_DIM 16
-
-#define CONV2_IM_DIM 16
-#define CONV2_IM_CH 32
-#define CONV2_KER_DIM 5
-#define CONV2_PADDING 2
-#define CONV2_STRIDE 1
-#define CONV2_OUT_CH 16
-#define CONV2_OUT_DIM 16
-
-#define POOL2_KER_DIM 3
-#define POOL2_STRIDE 2
-#define POOL2_PADDING 0
-#define POOL2_OUT_DIM 8
-
-#define CONV3_IM_DIM 8
-#define CONV3_IM_CH 16
-#define CONV3_KER_DIM 5
-#define CONV3_PADDING 2
-#define CONV3_STRIDE 1
-#define CONV3_OUT_CH 32
-#define CONV3_OUT_DIM 8
-
-#define POOL3_KER_DIM 3
-#define POOL3_STRIDE 2
-#define POOL3_PADDING 0
-#define POOL3_OUT_DIM 4
-
-#define IP1_DIM 4*4*32
-#define IP1_IM_DIM 4
-#define IP1_IM_CH 32
-#define IP1_OUT 10
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_weights.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_weights.h deleted file mode 100644 index 2c3cedd..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/cifar10/arm_nnexamples_cifar10_weights.h +++ /dev/null @@ -1,26 +0,0 @@ -#define CONV1_WT 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-
-#define CONV1_BIAS {-49,-18,-7,-20,-12,-15,7,2,-10,-84,-72,-65,-53,-6,-87,-63,-64,-28,-28,-4,-3,-10,-52,-15,-5,-7,-31,-44,-102,-19,-5,-65}
-
-#define CONV2_WT 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-
-#define CONV2_BIAS {55,50,34,43,-37,35,-21,10,35,-53,-76,7,14,-1,92,20}
-
-#define CONV3_WT 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-
-#define CONV3_BIAS {18,36,-46,-45,64,8,13,-19,28,1,14,-57,23,20,-2,32,48,-11,85,73,-7,52,125,33,125,13,92,-72,89,-1,11,70}
-
-#define IP1_WT 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34,-1,-20}
-
-#define IP1_BIAS {30,-121,-51,77,40,20,46,-35,28,-33}
-
-#define CONV1_BIAS_LSHIFT 6
-#define CONV1_OUT_RSHIFT 9
-#define CONV2_BIAS_LSHIFT 4
-#define CONV2_OUT_RSHIFT 9
-#define CONV3_BIAS_LSHIFT 1
-#define CONV3_OUT_RSHIFT 7
-#define IP1_BIAS_LSHIFT 1
-#define IP1_OUT_RSHIFT 8
-#define INPUT_MEAN_SHIFT {125,123,114}
-#define INPUT_RIGHT_SHIFT {8,8,8}
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Compiler/EventRecorderConf.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Compiler/EventRecorderConf.h deleted file mode 100644 index 5958233..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/Compiler/EventRecorderConf.h +++ /dev/null @@ -1,44 +0,0 @@ -/*------------------------------------------------------------------------------
- * MDK - Component ::Event Recorder
- * Copyright (c) 2016 ARM Germany GmbH. All rights reserved.
- *------------------------------------------------------------------------------
- * Name: EventRecorderConf.h
- * Purpose: Event Recorder Configuration
- * Rev.: V1.0.0
- *----------------------------------------------------------------------------*/
-
-//-------- <<< Use Configuration Wizard in Context Menu >>> --------------------
-
-// <h>Event Recorder
-
-// <o>Number of Records
-// <8=>8 <16=>16 <32=>32 <64=>64 <128=>128 <256=>256 <512=>512 <1024=>1024
-// <2048=>2048 <4096=>4096 <8192=>8192 <16384=>16384 <32768=>32768
-// <65536=>65536 <131072=>131072 <262144=>262144 <524288=>524288
-// <1048576=>1048576
-// <i>Configure size of Event Record Buffer (each record is 16 bytes)
-// <i>Must be 2^n (min=8, max=1048576)
-#define EVENT_RECORD_COUNT 64U
-
-// <o>Time Stamp Source
-// <0=> DWT Cycle Counter <1=> SysTick
-// <3=> User Timer (Normal Reset) <4=> User Timer (Power-On Reset)
-// <i>Selects source for 32-bit time stamp
-#define EVENT_TIMESTAMP_SOURCE 1
-
-// <h>SysTick Configuration
-// <i>Configure values when Time Stamp Source is set to SysTick
-
-// <o>SysTick Input Clock Frequency [Hz] <1-1000000000>
-// <i>Defines SysTick input clock (typical identical with processor clock)
-#define SYSTICK_CLOCK 100000000U
-
-// <o>SysTick Interrupt Period [us] <1-1000000000>
-// <i>Defines time period of the SysTick timer interrupt
-#define SYSTICK_PERIOD_US 1000U
-
-// </h>
-
-// </h>
-
-//------------- <<< end of configuration section >>> ---------------------------
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM0/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM0/RTE_Components.h deleted file mode 100644 index 73f80ad..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM0/RTE_Components.h +++ /dev/null @@ -1,24 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_gru'
- * Target: 'ARMCM0'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM0.h"
-
-#define RTE_Compiler_EventRecorder
- #define RTE_Compiler_EventRecorder_DAP
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_EVR /* Compiler I/O: STDOUT EVR */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM3/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM3/RTE_Components.h deleted file mode 100644 index 1f91822..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM3/RTE_Components.h +++ /dev/null @@ -1,22 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_gru'
- * Target: 'ARMCM3'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM3.h"
-
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM4_FP/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM4_FP/RTE_Components.h deleted file mode 100644 index 3df85a0..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM4_FP/RTE_Components.h +++ /dev/null @@ -1,22 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_gru'
- * Target: 'ARMCM4_FP'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM4_FP.h"
-
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM7_SP/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM7_SP/RTE_Components.h deleted file mode 100644 index 04bee02..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/RTE/_ARMCM7_SP/RTE_Components.h +++ /dev/null @@ -1,22 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_gru'
- * Target: 'ARMCM7_SP'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM7_SP.h"
-
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.cpp b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.cpp deleted file mode 100644 index efb3257..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru.cpp +++ /dev/null @@ -1,221 +0,0 @@ -/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
-*
-*
-* Project: CMSIS NN Library
-* Title: arm_nnexamples_gru.cpp
-*
-* Description: Gated Recurrent Unit Example
-*
-* Target Processor: Cortex-M4/Cortex-M7
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of Arm LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-/**
- * @ingroup groupExamples
- */
-
-/**
- * @defgroup GRUExample Gated Recurrent Unit Example
- *
- * \par Description:
- * \par
- * Demonstrates a gated recurrent unit (GRU) example with the use of fully-connected,
- * Tanh/Sigmoid activation functions.
- *
- * \par Model definition:
- * \par
- * GRU is a type of recurrent neural network (RNN). It contains two sigmoid gates and one hidden
- * state.
- * \par
- * The computation can be summarized as:
- * <pre>z[t] = sigmoid( W_z ⋅ {h[t-1],x[t]} )
- * r[t] = sigmoid( W_r ⋅ {h[t-1],x[t]} )
- * n[t] = tanh( W_n ⋅ [r[t] × {h[t-1], x[t]} )
- * h[t] = (1 - z[t]) × h[t-1] + z[t] × n[t] </pre>
- * \image html GRU.gif "Gate Recurrent Unit Diagram"
- *
- * \par Variables Description:
- * \par
- * \li \c update_gate_weights, \c reset_gate_weights, \c hidden_state_weights are weights corresponding to update gate (W_z), reset gate (W_r), and hidden state (W_n).
- * \li \c update_gate_bias, \c reset_gate_bias, \c hidden_state_bias are layer bias arrays
- * \li \c test_input1, \c test_input2, \c test_history are the inputs and initial history
- *
- * \par
- * The buffer is allocated as:
- * \par
- * | reset | input | history | update | hidden_state |
- * \par
- * In this way, the concatination is automatically done since (reset, input) and (input, history)
- * are physically concatinated in memory.
- * \par
- * The ordering of the weight matrix should be adjusted accordingly.
- *
- *
- *
- * \par CMSIS DSP Software Library Functions Used:
- * \par
- * - arm_fully_connected_mat_q7_vec_q15_opt()
- * - arm_nn_activations_direct_q15()
- * - arm_mult_q15()
- * - arm_offset_q15()
- * - arm_sub_q15()
- * - arm_copy_q15()
- *
- * <b> Refer </b>
- * \link arm_nnexamples_gru.cpp \endlink
- *
- */
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <math.h>
-#include "arm_nnexamples_gru_test_data.h"
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-#ifdef _RTE_
-#include "RTE_Components.h"
-#ifdef RTE_Compiler_EventRecorder
-#include "EventRecorder.h"
-#endif
-#endif
-
-#define DIM_HISTORY 32
-#define DIM_INPUT 32
-#define DIM_VEC 64
-
-#define USE_X4
-
-#ifndef USE_X4
-static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X2;
-static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X2;
-static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X2;
-#else
-static q7_t update_gate_weights[DIM_VEC * DIM_HISTORY] = UPDATE_GATE_WEIGHT_X4;
-static q7_t reset_gate_weights[DIM_VEC * DIM_HISTORY] = RESET_GATE_WEIGHT_X4;
-static q7_t hidden_state_weights[DIM_VEC * DIM_HISTORY] = HIDDEN_STATE_WEIGHT_X4;
-#endif
-
-static q7_t update_gate_bias[DIM_HISTORY] = UPDATE_GATE_BIAS;
-static q7_t reset_gate_bias[DIM_HISTORY] = RESET_GATE_BIAS;
-static q7_t hidden_state_bias[DIM_HISTORY] = HIDDEN_STATE_BIAS;
-
-static q15_t test_input1[DIM_INPUT] = INPUT_DATA1;
-static q15_t test_input2[DIM_INPUT] = INPUT_DATA2;
-static q15_t test_history[DIM_HISTORY] = HISTORY_DATA;
-
-q15_t scratch_buffer[DIM_HISTORY * 4 + DIM_INPUT];
-
-void gru_example(q15_t * scratch_input, uint16_t input_size, uint16_t history_size,
- q7_t * weights_update, q7_t * weights_reset, q7_t * weights_hidden_state,
- q7_t * bias_update, q7_t * bias_reset, q7_t * bias_hidden_state)
-{
- q15_t *reset = scratch_input;
- q15_t *input = scratch_input + history_size;
- q15_t *history = scratch_input + history_size + input_size;
- q15_t *update = scratch_input + 2 * history_size + input_size;
- q15_t *hidden_state = scratch_input + 3 * history_size + input_size;
-
- // reset gate calculation
- // the range of the output can be adjusted with bias_shift and output_shift
-#ifndef USE_X4
- arm_fully_connected_mat_q7_vec_q15(input, weights_reset, input_size + history_size, history_size, 0, 15, bias_reset,
- reset, NULL);
-#else
- arm_fully_connected_mat_q7_vec_q15_opt(input, weights_reset, input_size + history_size, history_size, 0, 15,
- bias_reset, reset, NULL);
-#endif
- // sigmoid function, the size of the integer bit-width should be consistent with out_shift
- arm_nn_activations_direct_q15(reset, history_size, 0, ARM_SIGMOID);
- arm_mult_q15(history, reset, reset, history_size);
-
- // update gate calculation
- // the range of the output can be adjusted with bias_shift and output_shift
-#ifndef USE_X4
- arm_fully_connected_mat_q7_vec_q15(input, weights_update, input_size + history_size, history_size, 0, 15,
- bias_update, update, NULL);
-#else
- arm_fully_connected_mat_q7_vec_q15_opt(input, weights_update, input_size + history_size, history_size, 0, 15,
- bias_update, update, NULL);
-#endif
-
- // sigmoid function, the size of the integer bit-width should be consistent with out_shift
- arm_nn_activations_direct_q15(update, history_size, 0, ARM_SIGMOID);
-
- // hidden state calculation
-#ifndef USE_X4
- arm_fully_connected_mat_q7_vec_q15(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
- bias_hidden_state, hidden_state, NULL);
-#else
- arm_fully_connected_mat_q7_vec_q15_opt(reset, weights_hidden_state, input_size + history_size, history_size, 0, 15,
- bias_hidden_state, hidden_state, NULL);
-#endif
-
- // tanh function, the size of the integer bit-width should be consistent with out_shift
- arm_nn_activations_direct_q15(hidden_state, history_size, 0, ARM_TANH);
- arm_mult_q15(update, hidden_state, hidden_state, history_size);
-
- // we calculate z - 1 here
- // so final addition becomes substraction
- arm_offset_q15(update, 0x8000, update, history_size);
- // multiply history
- arm_mult_q15(history, update, update, history_size);
- // calculate history_out
- arm_sub_q15(hidden_state, update, history, history_size);
-
- return;
-}
-
-int main()
-{
- #ifdef RTE_Compiler_EventRecorder
- EventRecorderInitialize (EventRecordAll, 1); // initialize and start Event Recorder
- #endif
-
- printf("Start GRU execution\n");
- int input_size = DIM_INPUT;
- int history_size = DIM_HISTORY;
-
- // copy over the input data
- arm_copy_q15(test_input1, scratch_buffer + history_size, input_size);
- arm_copy_q15(test_history, scratch_buffer + history_size + input_size, history_size);
-
- gru_example(scratch_buffer, input_size, history_size,
- update_gate_weights, reset_gate_weights, hidden_state_weights,
- update_gate_bias, reset_gate_bias, hidden_state_bias);
- printf("Complete first iteration on GRU\n");
-
- arm_copy_q15(test_input2, scratch_buffer + history_size, input_size);
- gru_example(scratch_buffer, input_size, history_size,
- update_gate_weights, reset_gate_weights, hidden_state_weights,
- update_gate_bias, reset_gate_bias, hidden_state_bias);
- printf("Complete second iteration on GRU\n");
-
- return 0;
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru_test_data.h b/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru_test_data.h deleted file mode 100644 index e0ccbe1..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Examples/ARM/arm_nn_examples/gru/arm_nnexamples_gru_test_data.h +++ /dev/null @@ -1,23 +0,0 @@ -#define UPDATE_GATE_WEIGHT_X2 {-62,83,-58,-89,-80,1,-93,31,101,95,121,-83,71,18,-98,-5,44,-100,-16,-73,25,62,34,-22,-16,42,9,-125,60,-78,15,-76,-76,-63,71,-25,78,-66,38,-118,-71,-120,-80,28,33,51,82,-105,26,-47,38,86,-114,44,90,-98,105,-123,24,95,-12,11,49,-35,78,104,104,17,-116,-40,-83,4,88,-110,-111,-98,18,-89,120,-84,66,-69,-8,-22,-91,-29,-41,110,55,-124,-67,103,-40,-100,1,-25,-68,-62,-89,-75,-20,-78,101,-92,-51,-97,-54,59,-78,41,34,-102,-9,-53,56,103,-55,13,81,-75,-20,-37,29,36,110,84,-80,-127,-68,-33,-70,-16,-42,-9,-104,107,-81,-16,42,-74,-63,-4,-128,-109,-105,55,-51,-68,-88,19,-39,116,-7,66,52,-29,63,-94,71,-2,-127,31,-103,120,124,41,-13,-23,127,59,-22,54,-2,32,-87,-109,85,-31,-5,-59,-122,-97,-14,-88,-19,43,-30,115,42,14,10,121,28,-63,83,-85,101,40,23,-39,74,-99,73,50,-20,123,-88,-13,-126,-25,70,-11,16,-28,121,-29,20,-69,104,117,-40,-1,-97,-12,31,32,15,-32,77,31,16,40,107,-52,-52,-89,-17,124,-95,54,48,-40,37,24,-46,42,119,5,-118,-45,-10,106,83,57,-74,-10,-56,85,37,-25,83,-31,-54,111,-78,-96,-114,-65,-100,28,-31,-111,33,66,74,-43,112,119,-80,-26,74,-81,-123,55,-126,32,-66,110,-86,-118,-21,15,16,26,13,-109,41,-16,88,81,-82,-55,-89,109,-52,118,-39,57,-16,86,-68,-10,-19,110,-50,-17,-84,103,-3,94,-8,50,15,-44,-87,6,18,8,61,66,-108,-67,-6,107,-68,25,25,25,-82,71,62,121,-31,-4,17,-6,-60,-17,116,-67,45,117,-90,12,-68,20,121,-65,-43,74,-104,-42,-69,35,4,-17,5,95,-82,18,65,43,-57,89,1,-8,37,-51,10,67,4,-50,-18,81,-120,44,98,16,-98,25,127,88,-111,-49,114,111,-17,-74,40,-18,35,19,31,48,-23,53,102,41,89,-27,87,-54,-121,-113,97,125,125,-108,58,-17,8,70,-67,-55,59,42,-85,78,27,16,66,67,54,-74,33,-19,72,77,126,-122,-7,-109,58,78,-88,15,2,16,37,-34,-114,-88,-53,88,115,19,7,-67,93,80,-48,-11,-61,31,38,29,-59,-70,0,25,106,-7,-44,53,62,19,-64,109,70,-103,-114,97,57,112,24,-66,-127,29,29,-31,-87,-125,54,-98,101,-39,56,-88,-63,-113,-73,-91,80,112,-27,-75,-42,-5,79,60,-55,23,-61,66,51,39,-91,96,-60,-64,-1,75,55,-108,73,38,75,-113,-9,-92,-92,-3,-30,93,-27,-100,-55,125,52,72,110,12,84,-83,65,-79,92,11,87,-106,35,-38,-24,-79,15,-11,-109,-22,95,82,-1,-2,-113,116,-64,93,-62,-11,101,35,-91,51,-6,21,29,25,-16,68,-103,-111,-23,-123,-80,24,-17,-7,53,23,114,-13,-105,-88,120,13,-25,-40,29,-38,-43,3,2,-121,-110,54,-43,30,66,28,60,-81,-6,-8,126,-80,64,-42,126,75,-69,-116,-41,81,94,31,-116,5,-46,5,-21,-105,78,-20,-34,54,46,-124,120,-83,44,-17,-52,-23,-110,34,-35,31,61,88,-108,-38,31,117,-26,38,-57,65,9,0,59,124,14,-39,-95,-91,107,-34,85,-83,-31,-68,-78,-86,21,-118,56,60,-3,-116,33,53,-94,85,77,91,-94,100,-89,97,88,111,36,74,-110,7,-74,91,-112,21,32,-59,98,36,10,-41,44,-114,-88,92,111,72,43,58,42,-125,-11,96,126,25,96,-105,-128,-70,85,-82,-17,103,23,-37,76,58,108,16,-116,-44,22,89,0,6,-108,27,-34,88,-125,22,-45,-116,28,-29,-70,-3,-81,-80,42,119,105,-40,-109,105,64,5,72,-32,-95,90,60,6,-29,40,-19,57,89,-50,34,-123,-32,-18,20,9,-19,-81,-45,-120,-120,20,2,18,70,75,100,64,126,-9,63,-82,114,-62,106,-11,104,-9,-13,88,-40,101,73,108,52,33,116,-54,-114,-47,85,2,-117,-80,100,-20,98,-75,-83,-24,-125,-91,-97,95,-46,15,-94,-21,53,-27,-18,65,87,112,38,-115,-27,37,-84,1,103,85,-50,36,-49,-119,68,20,119,-113,43,-67,105,44,4,-48,16,-42,83,-39,106,31,-34,-76,-51,68,82,-111,-116,-104,-118,109,-29,-6,-91,81,-102,-76,-82,64,121,27,-98,-24,-88,36,115,59,-84,-121,4,29,45,73,110,-56,-12,109,-88,85,-30,87,18,118,23,21,106,40,115,78,-72,-103,11,83,44,117,-63,98,30,115,123,-39,25,15,84,52,46,77,64,-104,125,-13,34,125,65,6,57,-128,-2,115,7,-65,-73,82,72,-109,99,43,-94,-106,-39,-4,-127,58,123,-128,29,-80,4,51,109,-50,-38,25,-13,-52,-106,87,76,44,78,101,16,-102,-20,104,23,107,-88,18,-85,119,-21,-53,-84,-7,-8,-114,23,-54,74,80,77,-40,19,-75,-41,60,77,82,-96,-121,-43,114,-124,-1,-75,32,34,-117,21,64,-87,-100,-29,-36,-45,-46,-111,4,-44,-94,-117,100,-25,-27,105,95,15,88,25,-38,-88,122,62,-62,-28,95,-86,125,-83,-9,-100,101,-124,22,21,-91,50,-100,-27,-92,115,86,85,33,-112,-43,61,114,62,-31,-84,-7,5,-26,-10,-21,-89,60,-96,48,-34,88,-80,-91,92,12,118,-2,-38,83,-50,-109,-111,-26,-109,-78,-7,84,60,-95,15,-71,112,126,71,36,39,-42,-85,-126,-68,105,-18,-127,48,-41,57,-93,13,-25,-71,66,-43,-23,122,4,-70,123,115,124,-61,-32,18,-18,49,123,-101,37,-50,-111,-73,124,-18,54,-64,93,-69,16,112,21,-56,56,127,113,-48,-57,-4,85,-84,53,44,28,-126,-59,-11,94,58,-64,112,82,127,58,50,5,-6,-102,90,-18,-86,104,17,108,-64,-22,73,-102,-17,-31,-11,-105,-40,-49,84,-82,104,57,30,112,-119,-92,78,-92,35,90,-45,-13,-75,-125,-19,-83,-75,29,15,-33,127,-14,29,-80,61,41,67,-14,-18,101,101,108,-24,-61,-90,-59,-48,-114,1,-14,106,52,109,-45,-100,74,-33,-68,-94,-68,-22,-99,31,-86,85,-27,-70,69,127,92,125,-95,117,-87,-8,-71,18,94,-90,103,-31,-1,-50,-60,-2,96,31,-1,-98,75,104,-6,-38,-24,127,94,-48,97,-96,4,-108,106,76,-31,-7,-41,58,-13,-72,-81,-116,-24,-45,46,-20,114,97,-14,125,11,22,26,27,-2,-88,-28,-76,119,50,52,66,65,120,-42,-43,-59,-56,-28,-42,-87,-18,-47,-85,74,119,97,-6,-127,-86,30,18,-43,48,-73,22,-5,34,122,9,115,-32,-63,-13,61,119,18,-113,-12,80,26,-39,-76,-101,-104,-6,48,38,-82,-52,-91,-38,112,110,115,76,69,100,-116,109,3,-35,16,94,24,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-
-#define UPDATE_GATE_WEIGHT_X4 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-
-#define RESET_GATE_WEIGHT_X2 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-
-#define RESET_GATE_WEIGHT_X4 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-
-#define HIDDEN_STATE_WEIGHT_X2 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-
-#define HIDDEN_STATE_WEIGHT_X4 {-3,69,-33,102,76,60,80,19,59,-2,21,-4,-59,-59,11,-52,117,-25,70,121,-18,44,-74,-14,0,-1,44,-28,15,77,-102,92,108,-48,108,-100,99,-69,-19,121,-47,0,-80,-128,117,-123,99,-27,-118,60,34,-73,65,119,-50,-84,88,42,-91,-32,-108,79,-121,87,-123,118,-108,-88,-9,24,-104,85,8,-113,51,-112,33,118,94,1,26,-113,82,70,-95,-51,110,-96,-80,-98,107,118,-48,60,-97,102,-100,95,-69,77,76,-6,36,15,97,-52,-90,123,1,96,-58,120,17,-99,19,72,86,-109,-115,6,63,26,111,-102,45,35,-88,11,-40,-32,-125,120,38,-119,51,-109,110,113,24,22,123,-18,-23,16,58,6,-69,-68,-20,-112,-43,91,26,84,-31,-33,-37,-126,15,71,-65,103,-37,66,91,-29,-85,121,-47,111,-41,60,-88,-21,6,-120,-109,-76,106,33,-96,37,58,57,-100,10,108,25,78,-117,13,-39,-99,-43,108,93,23,93,1,56,116,41,104,-79,-43,-73,62,-104,86,110,-50,13,-70,77,-108,-107,-45,67,10,107,44,-52,30,111,-53,-113,112,90,74,-61,90,-4,34,58,96,64,79,44,-80,-119,-10,-125,-39,79,-20,67,71,72,-32,-85,-25,-18,-21,-66,0,36,-127,-96,-113,120,49,76,-117,-33,-124,-113,123,87,-49,106,-126,-76,21,-46,98,68,17,-96,-98,20,84,64,86,102,37,-117,92,63,76,-86,23,-60,55,-33,-116,-5,78,13,7,-71,-70,11,-50,-121,-127,56,-4,-105,77,-51,120,63,1,90,-46,-9,47,-56,124,59,-107,-35,59,27,78,-16,114,-33,-21,103,53,120,67,114,-48,74,-65,39,-99,23,6,124,-42,73,-15,-39,-98,-1,-115,99,85,-50,53,-85,-31,-95,116,51,-114,-71,7,-6,64,119,-46,118,-50,106,7,-41,105,-2,-13,30,70,-92,51,-69,-75,102,-101,26,110,-40,50,102,-52,-119,-55,119,20,-121,48,-3,101,-11,-51,2,125,-45,-126,-125,-120,-111,-19,9,-9,0,5,40,34,-115,-15,-5,46,-2,3,-41,81,-117,30,-89,-27,88,-39,-44,70,-7,-123,-11,114,-85,41,83,112,123,-50,-60,-30,19,25,-21,30,23,-72,81,76,-96,79,99,-6,-107,-83,75,71,82,107,43,-11,100,47,-40,-45,124,-97,-99,92,-3,74,89,102,-36,-84,89,67,3,44,-117,108,-100,49,-113,107,103,-26,-2,108,-34,60,47,101,-94,-113,112,-43,101,-37,-69,27,-38,110,39,-91,-101,-91,-28,-61,-37,37,-106,-69,60,59,121,-126,-71,-97,47,32,4,-32,-89,96,16,-89,14,119,-27,68,-11,-53,-52,111,64,-124,70,87,72,20,-114,-99,47,78,-91,54,-32,-24,-60,-49,-70,-128,1,46,-9,-95,-57,76,-44,-18,94,65,-4,-112,10,-12,-46,-109,53,22,-81,60,-22,96,4,90,23,122,68,-22,74,-73,-124,-104,-92,-106,76,-124,-68,59,-95,-59,83,97,-127,-37,96,-92,-49,123,-81,-86,-84,95,69,55,40,54,-80,-110,-3,-8,-26,-120,48,-80,0,44,-106,58,-3,-48,39,-16,1,-12,-87,-120,-65,-95,-113,96,32,-45,105,-86,109,36,40,118,-21,-32,122,-86,-103,-119,-1,-58,-110,-94,31,-14,-108,93,102,45,1,15,-86,29,-5,-43,-74,-75,-51,-8,-39,-114,85,64,40,38,108,71,88,70,67,-2,-35,-72,-36,-93,-82,-69,0,-111,89,22,84,100,-25,-123,93,-89,123,-75,-48,-18,61,-47,-62,-120,-115,-42,-115,-12,5,127,-54,45,83,108,-61,104,-114,-102,-51,59,114,-105,-127,93,-9,-11,-114,40,-61,27,114,-73,20,121,49,32,100,-66,-82,87,-26,-79,38,121,-45,-22,60,-92,19,46,39,-71,87,-9,60,92,-103,-108,33,118,19,124,86,-107,-120,79,37,60,97,-96,-68,40,-51,-66,88,-10,-61,119,89,75,91,86,8,-44,50,19,-30,-32,-47,-128,108,42,-14,75,116,88,-80,-57,25,-86,44,18,-31,-27,-58,77,111,-107,16,89,96,3,-59,-27,-83,-82,24,-120,-51,43,-75,-39,92,76,7,40,39,-62,98,66,110,84,-87,-122,-69,5,54,-82,106,29,-61,33,-98,45,65,-104,-47,-47,61,17,-46,-78,-120,34,-5,-50,113,-13,85,57,90,96,-123,23,-95,-66,103,89,101,-90,-61,-46,67,85,99,66,-85,-10,-93,-29,-66,-110,-45,37,109,-110,88,42,-42,-68,-70,-30,0,82,8,8,96,99,104,-58,59,13,86,-93,5,-29,-111,94,56,12,126,101,69,16,-25,115,17,35,-26,52,99,-13,-118,117,58,0,-101,127,23,0,109,80,-25,61,35,86,11,-117,4,-7,0,107,-123,-92,-41,-70,-94,-104,-3,-21,-56,-32,73,-27,100,21,112,-70,-128,127,96,-123,6,-93,8,-94,17,1,90,34,-75,-51,-52,-61,88,-13,-25,92,79,39,31,-62,-3,114,-13,-11,-43,64,105,-82,-56,29,-6,-103,-12,-109,68,76,-1,-121,51,-54,12,84,-94,58,96,20,40,73,124,-47,-19,-100,10,16,-56,74,81,52,-22,46,-88,108,-8,16,59,-60,-101,-26,-117,-127,-36,78,55,-54,112,33,-5,-64,7,48,111,122,118,85,-48,18,-43,15,109,53,-60,-99,-114,126,101,-125,88,125,38,19,-71,-111,122,-69,-21,-26,2,94,51,-111,-32,10,-87,41,114,-5,80,-46,59,111,16,46,115,-48,-5,-75,-122,123,-109,-70,116,-10,20,-44,-118,-67,17,41,16,102,-47,-31,-22,-96,-39,-1,-19,-98,30,-67,53,-53,-105,-9,24,15,-68,-53,77,-106,90,29,7,46,-30,67,-24,-101,-65,-66,-3,-118,-64,23,43,62,-27,-53,-7,45,-34,30,113,9,30,119,-12,-127,44,-114,-117,-12,-30,94,34,53,-91,-57,106,-38,37,-58,-97,90,116,-78,55,95,59,124,112,5,-99,-10,54,-3,-70,-110,108,-98,-75,110,99,88,99,-80,17,-77,26,123,-73,-26,120,77,-14,29,-61,78,97,-125,-39,19,80,105,22,114,-88,53,-54,-121,-7,92,34,10,101,-57,51,9,47,-124,-93,26,-76,38,70,50,45,-119,106,-51,-121,73,-68,59,121,40,78,92,23,-124,-73,67,43,104,-97,79,-31,15,75,-12,39,13,-99,75,-8,-62,-63,103,-68,101,-72,109,-123,-113,-93,47,-7,-51,64,-67,96,1,-81,34,-49,-66,-82,35,99,52,-95,28,27,-36,27,-93,-15,52,-68,55,-81,-104,117,67,-3,53,102,32,-5,-64,121,-31,-10,19,-123,41,-72,-97,113,45,-10,-111,-71,95,31,-89,-13,36,-111,39,86,126,10,-26,27,-91,48,-77,-45,-25,-106,126,-51,104,101,71,81,2,81,-26,-96,7,-114,-44,-94,-54,-22,110,19,-76,77,3,-127,-86,-78,110,6,-62,-96,121,-100,74,71,-3,-34,43,86,37,109,-110,123,56,118,-7,-33,-96,15,-60,75,-49,-23,-6,-34,57,60,117,-72,-82,-97,-104,88,30,-86,-55,111,-103,-121,-126,-63,-94,-103,-112,0,70,80,118,-46,-44,101,-85,28,85,52,91,-127,29,-88,-63,95,82,59,124,90,-86,-37,7,-116,75,72,-13,82,55,-125,-61,80,90,-75,41,-28,-41,-6,32,-62,35,88,91,61,-112,-104,-115,23,72,-102,-25,77,103,0,73,13,-121,6,81,-52,-70,59,63,113,-84,-85,-112,-9,113,-82,-52,98,-29,45,-25,59,-73,-78,-59,-96,-4,-32,-82,79,16,80,29,94,64,-7,67,-77,-5,-125,119,12,127,-9,104,-95,56,16,58,86,-117,18,66,26,-115,-55,48,59,126,-15,-90,-16,-126,15,120,75,-115,13,106,-76,80,-9,-15,-70,-10,50,-78,56,-51,110,85,-29,-102,20,15,-56,-73,-64,-23,-66,-12,-80,-128,-6,-121,-103,-6,-122,-97,40,46,-36,30,-2,-34,-2,32,116,-93,-59,-109,34,-79,126,-95,-120,-15,-40,-86,-64,71,-48,126,124,-2,-39,75,-64,127,57,30,-107,1,-74,-32,-105,-112,104,-115,80,-27,50,-86,-86,75,-13,-8,81,-13,-66,-38,-14,125,118,103,33,48,-71,10,35,-118,88,65,119,-36,-116,-107,-20,-43,-110,107,33,-27,15,-48,-119,46,-35,96,-75,88,-12,-7,90,-41,-6,-87,89,-88,-117,98,-29,-64,-41,-18,99,-83,13,61,-8,126,46,82,127,-81,-75,20,57,10,-36,81,54,-123,67,18,124,45,-55,95,50,-41,-38,-127,66,61,24,9,51,-55,113,-66,-80,28,49,-113,-71,24,113,-107,105,-71,37,47,-117,73,45,30,-74,117,114,26,6,-42,-80,-74,108,-81,110,73,88,124,-24,-43,-3,49,84,-55,-30,-125,36,102,62,-126,-45,-33,-50,98,-8,6,109,62,113,-84,-12,32,-40,24,-101,-87,-57,-56,59,-123,106,32,12,-71,-18,97,49,113,-47,105,-113,49,99,-124,-124,-81,-118,117,-12,-76,46,-9,-48,-41,-3,-54,-86,97,88,119,-82,-113,-52,-126,-93,-23,-121,127,-97,-28,-24,31,-62,-119,52,-93,75,7,33,-101,-67,67,-45,39,74,-83,127,-115,-66,4,-6,-18,-29,29,-23,68,-123,-103,31,24,117,49,8,-70,41,1,20,71,99,-40,-21,-116,-30,93,66,95,27,63,117,-49,20,-113,-92,-7,127,115,-85,97,-39,34,-67,-10,-53,123,-87,119,2,-77,68,-74,-66,22,96,-13,-12,96,-26,86,35,47,-128,-4,83,52,114,-2,-84,-14,67,-94,-53,-45,-74,-71,-94,94,-101,-122,3,-48,-14,124,-43,56,-3,58,-22,-97,-106,1,-32,57,-16,-127,51,23,-67,-59,-27,-60,125,-46,-125,-117,28,-74,29,29,-76,94,25,58,-32,-31,-101,-105,42,49,101,-115,-60,114,-55,-72,101,94,35,-14,-6,-115,-101,20,-36,-8,103,77,-42,82,61,104,85,35,-71,100,111,67,107,-90,-24,19,6,117,-87,-16,-67,-26,26,24,105,-64,102,105,-36,-7,60,109,112,-19,119,59,-81,10,-91,-9,69,124,-54,124,52,80,13,-105,21,-116,-114,-33,5,0,10,126,-93,22,-26,-115,115,94,22,105,-111,30,-7,102,44,63,0,85,-38,91,-30,98,-21,43,4,-63,-34,-124,-67,38,33,-2,45,-32,-86,12,-92,-38,29,39,121,-119,-42,-23,-30,-106,3,-12,-54,-108,7}
-
-#define UPDATE_GATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
-
-#define RESET_GATE_BIAS {-77,67,-93,-3,98,59,-121,33,49,50,41,91,-115,-33,71,47,-70,45,89,-115,72,106,-22,100,97,-100,-95,108,-33,3,14,30}
-
-#define HIDDEN_STATE_BIAS {-85,78,113,70,33,38,8,114,70,-35,-67,65,31,-24,-70,-124,-89,104,124,-122,111,61,-87,75,-61,-98,83,-69,-63,45,-11,103}
-
-#define INPUT_DATA1 {-367,-338,0,-89,453,-413,-343,-16,42,418,201,274,-352,477,-290,-92,266,-49,342,453,-398,247,-153,328,217,342,85,69,-38,351,73,128}
-
-#define INPUT_DATA2 {280,41,-322,61,315,350,504,-227,-221,-483,352,252,455,-236,344,364,-378,229,-187,-498,295,357,-511,58,-349,-458,-420,-66,-400,-379,477,-60}
-
-#define HISTORY_DATA {-38,53,105,-79,-463,51,-343,-226,-435,-282,218,441,-299,-215,-109,335,340,-471,-109,273,33,-245,-469,170,-26,-59,192,-119,76,-6,236,-145}
diff --git a/hid-dials/Drivers/CMSIS/NN/Include/arm_nn_tables.h b/hid-dials/Drivers/CMSIS/NN/Include/arm_nn_tables.h deleted file mode 100644 index 9357424..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Include/arm_nn_tables.h +++ /dev/null @@ -1,59 +0,0 @@ -/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nn_tables.h
- * Description: Extern declaration for NN tables
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef _ARM_NN_TABLES_H
-#define _ARM_NN_TABLES_H
-
-#include "arm_math.h"
-
-/**
-* @brief tables for various activation functions
-*
-*/
-
-extern const q15_t sigmoidTable_q15[256];
-extern const q7_t sigmoidTable_q7[256];
-
-extern const q7_t tanhTable_q7[256];
-extern const q15_t tanhTable_q15[256];
-
- /**
- * @brief 2-way tables for various activation functions
- *
- * 2-way table, H table for value larger than 1/4
- * L table for value smaller than 1/4, H table for remaining
- * We have this only for the q15_t version. It does not make
- * sense to have it for q7_t type
- */
-extern const q15_t sigmoidHTable_q15[192];
-extern const q15_t sigmoidLTable_q15[128];
-
-extern const q15_t sigmoidLTable_q15[128];
-extern const q15_t sigmoidHTable_q15[192];
-
-#endif /* ARM_NN_TABLES_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/Include/arm_nnfunctions.h b/hid-dials/Drivers/CMSIS/NN/Include/arm_nnfunctions.h deleted file mode 100644 index 96c59c2..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Include/arm_nnfunctions.h +++ /dev/null @@ -1,1010 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nnfunctions.h
- * Description: Public header file for CMSIS NN Library
- *
- * $Date: 13. July 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-
-/**
- \mainpage CMSIS NN Software Library
- *
- * Introduction
- * ------------
- *
- * This user manual describes the CMSIS NN software library,
- * a collection of efficient neural network kernels developed to maximize the
- * performance and minimize the memory footprint of neural networks on Cortex-M processor cores.
- *
- * The library is divided into a number of functions each covering a specific category:
- * - Neural Network Convolution Functions
- * - Neural Network Activation Functions
- * - Fully-connected Layer Functions
- * - Neural Network Pooling Functions
- * - Softmax Functions
- * - Neural Network Support Functions
- *
- * The library has separate functions for operating on different weight and activation data
- * types including 8-bit integers (q7_t) and 16-bit integers (q15_t). The descrition of the
- * kernels are included in the function description. The implementation details are also
- * described in this paper [1].
- *
- * Block Diagram
- * --------
- * \image html CMSIS-NN-OVERVIEW.PNG
- *
- * Examples
- * --------
- *
- * The library ships with a number of examples which demonstrate how to use the library functions.
- *
- * Pre-processor Macros
- * ------------
- *
- * Each library project have differant pre-processor macros.
- *
- * - ARM_MATH_DSP:
- *
- * Define macro ARM_MATH_DSP, If the silicon supports DSP instructions.
- *
- * - ARM_MATH_BIG_ENDIAN:
- *
- * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
- *
- * - ARM_NN_TRUNCATE:
- *
- * Define macro ARM_NN_TRUNCATE to use floor instead of round-to-the-nearest-int for the computation.
- *
- * Copyright Notice
- * ------------
- *
- * Copyright (C) 2010-2018 Arm Limited. All rights reserved.
- *
- * [1] CMSIS-NN: Efficient Neural Network Kernels for Arm Cortex-M CPUs https://arxiv.org/abs/1801.06601
- */
-
-/**
- * @defgroup groupNN Neural Network Functions
- * These functions perform basic operations for neural network layers.
- */
-
-#ifndef _ARM_NNFUNCTIONS_H
-#define _ARM_NNFUNCTIONS_H
-
-#include "arm_nnsupportfunctions.h"
-#include "arm_nn_tables.h"
-
-#define USE_INTRINSIC
-
-//#define ARM_NN_TRUNCATE /* This config the rounding model to floor or round to the nearest int */
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/**
- * @defgroup NNConv Neural Network Convolution Functions
- *
- * Perform convolution layer
- *
- * The convolution is implemented in 2 steps: im2col and GEMM
- *
- * im2col is a process of converting each patch of image data into
- * a column. After im2col, the convolution is computed as matrix-matrix
- * multiplication.
- *
- * To reduce the memory footprint, the im2col is performed partially.
- * Each iteration, only a few column (i.e., patches) are generated and
- * computed with GEMM kernels similar to CMSIS-DSP arm_mat_mult functions.
- *
- */
-
- /**
- * @brief Basic Q7 convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- */
-
- arm_status arm_convolve_HWC_q7_basic(const q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Basic Q7 convolution function (non-sqaure shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding size x
- * @param[in] padding_y padding size y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- */
-
- arm_status arm_convolve_HWC_q7_basic_nonsquare(const q7_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Basic Q15 convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- */
-
- arm_status arm_convolve_HWC_q15_basic(const q15_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q15_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q15_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q15_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Fast Q7 convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This function is the version with full list of optimization tricks, but with
- * some contraints:
- * ch_im_in is multiple of 4
- * ch_im_out is multiple of 2
- */
-
- arm_status arm_convolve_HWC_q7_fast(const q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Fast Q7 convolution function (non-sqaure shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding size x
- * @param[in] padding_y padding size y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This function is the version with full list of optimization tricks, but with
- * some contraints:
- * ch_im_in is multiple of 4
- * ch_im_out is multiple of 2
- */
-
- arm_status arm_convolve_HWC_q7_fast_nonsquare(const q7_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Fast Q7 version of 1x1 convolution (non-sqaure shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding size x
- * @param[in] padding_y padding size y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This function implement convolution with 1x1 kernel size (i.e., dim_kernel_x=1
- * and dim_kernel_y=1). It can be used for
- * second half of MobileNets after depthwise separable convolution.
- *
- * This function is the version with full list of optimization tricks, but with
- * some contraints:
- * ch_im_in is multiple of 4
- * ch_im_out is multiple of 2
- */
- arm_status arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Q7 version of convolution for RGB image
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This kernel is written exclusively for convolution with ch_im_in
- * equals 3. This applies on the first layer of CNNs which has input
- * image with RGB format.
- */
-
- arm_status arm_convolve_HWC_q7_RGB(const q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Fast Q15 convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This function is the version with full list of optimization tricks, but with
- * some contraints:
- * ch_im_in is multiple of 2
- * ch_im_out is multiple of 2
- */
-
- arm_status arm_convolve_HWC_q15_fast(const q15_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q15_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q15_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q15_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Fast Q15 convolution function (non-sqaure shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding size x
- * @param[in] padding_y padding size y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
- *
- * bufferB size: 0
- *
- * <b>Input dimension constraints:</b>
- *
- * ch_im_in is multiple of 2
- *
- * ch_im_out is multipe of 2
- *
- */
-
- arm_status
- arm_convolve_HWC_q15_fast_nonsquare(const q15_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q15_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q15_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q15_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Q7 depthwise separable convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This function is the version with full list of optimization tricks, but with
- * some contraints:
- * ch_im_in is multiple of 2
- * ch_im_out is multiple of 2
- */
-
- arm_status arm_depthwise_separable_conv_HWC_q7(const q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB);
-
- /**
- * @brief Q7 depthwise separable convolution function (non-square shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding sizes x
- * @param[in] padding_y padding sizes y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This function is the version with full list of optimization tricks, but with
- * some contraints:
- * ch_im_in is multiple of 2
- * ch_im_out is multiple of 2
- */
- arm_status arm_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB);
-
-
-/**
- * @defgroup FC Fully-connected Layer Functions
- *
- * Perform fully-connected layer
- *
- * Fully-connected layer is basically a matrix-vector multiplication
- * with bias. The matrix is the weights and the input/output vectors
- * are the activation values. Supported {weight, activation} precisions
- * include {8-bit, 8-bit}, {16-bit, 16-bit}, and {8-bit, 16-bit}.
- *
- * Here we have two types of kernel functions. The basic function
- * implements the function using regular GEMV approach. The opt functions
- * operates with weights in interleaved formats.
- *
- */
-
- /**
- * @brief Q7 basic fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- */
-
- arm_status arm_fully_connected_q7(const q7_t * pV,
- const q7_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q7_t * pOut,
- q15_t * vec_buffer);
-
- /**
- * @brief Q7 opt fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- */
-
- arm_status arm_fully_connected_q7_opt(const q7_t * pV,
- const q7_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q7_t * pOut,
- q15_t * vec_buffer);
-
- /**
- * @brief Q15 basic fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- */
-
- arm_status arm_fully_connected_q15(const q15_t * pV,
- const q15_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q15_t * bias,
- q15_t * pOut,
- q15_t * vec_buffer);
-
- /**
- * @brief Q15 opt fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- */
-
- arm_status arm_fully_connected_q15_opt(const q15_t * pV,
- const q15_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q15_t * bias,
- q15_t * pOut,
- q15_t * vec_buffer);
-
- /**
- * @brief Mixed Q15-Q7 fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- */
-
- arm_status arm_fully_connected_mat_q7_vec_q15(const q15_t * pV,
- const q7_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q15_t * pOut,
- q15_t * vec_buffer);
-
- /**
- * @brief Mixed Q15-Q7 opt fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- */
-
- arm_status arm_fully_connected_mat_q7_vec_q15_opt(const q15_t * pV,
- const q7_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q15_t * pOut,
- q15_t * vec_buffer);
-
-/**
- * @brief Matrix-Multiplication Kernels for Convolution
- *
- * These functions are used within convolution layer functions for
- * matrix multiplication.
- *
- * The implementation is similar to CMSIS-DSP arm_mat_mult functions
- * with one Q7 and one Q15 operands. The Q15 operand is the im2col
- * output which is always with 2 columns.
- *
- */
-
- /**
- * @brief Matrix-multiplication function for convolution
- * @param[in] pA pointer to operand A
- * @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
- * @param[in] ch_im_out numRow of A
- * @param[in] numCol_A numCol of A
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias the bias
- * @param[in,out] pOut pointer to output
- * @return The function returns the incremented output pointer
- */
-
- q7_t *arm_nn_mat_mult_kernel_q7_q15(const q7_t * pA,
- const q15_t * pInBuffer,
- const uint16_t ch_im_out,
- const uint16_t numCol_A,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q7_t * pOut);
-
- /**
- * @brief Matrix-multiplication function for convolution with reordered columns
- * @param[in] pA pointer to operand A
- * @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
- * @param[in] ch_im_out numRow of A
- * @param[in] numCol_A numCol of A
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias the bias
- * @param[in,out] pOut pointer to output
- * @return The function returns the incremented output pointer
- */
-
- q7_t *arm_nn_mat_mult_kernel_q7_q15_reordered(const q7_t * pA,
- const q15_t * pInBuffer,
- const uint16_t ch_im_out,
- const uint16_t numCol_A,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q7_t * pOut);
-
-#ifdef __cplusplus
-}
-#endif
-
-/*
- * Other functions
- * These layers are typically not timing critical
- * Basic implementation is supported here
- */
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/**
- * @defgroup Acti Neural Network Activation Functions
- *
- * Perform activation layers, including ReLU (Rectified Linear Unit),
- * sigmoid and tanh
- *
- */
-
- /**
- * @brief Q7 RELU function
- * @param[in,out] data pointer to input
- * @param[in] size number of elements
- * @return none.
- */
-
- void arm_relu_q7(q7_t * data, uint16_t size);
-
- /**
- * @brief Q15 RELU function
- * @param[in,out] data pointer to input
- * @param[in] size number of elements
- * @return none.
- */
-
- void arm_relu_q15(q15_t * data, uint16_t size);
-
- /**
- * @brief Q7 neural network activation function using direct table look-up
- * @param[in,out] data pointer to input
- * @param[in] size number of elements
- * @param[in] int_width bit-width of the integer part, assume to be smaller than 3
- * @param[in] type type of activation functions
- * @return none.
- */
-
- void arm_nn_activations_direct_q7(q7_t * data, uint16_t size, uint16_t int_width,
- arm_nn_activation_type type);
-
- /**
- * @brief Q15 neural network activation function using direct table look-up
- * @param[in,out] data pointer to input
- * @param[in] size number of elements
- * @param[in] int_width bit-width of the integer part, assume to be smaller than 3
- * @param[in] type type of activation functions
- * @return none.
- */
-
- void arm_nn_activations_direct_q15(q15_t * data, uint16_t size, uint16_t int_width,
- arm_nn_activation_type type);
-
-/**
- * @defgroup Pooling Neural Network Pooling Functions
- *
- * Perform pooling functions, including max pooling and average pooling
- *
- */
-
- /**
- * @brief Q7 max pooling function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] Im_out pointer to output tensor
- * @return none.
- *
- */
-
- void arm_maxpool_q7_HWC(q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const uint16_t dim_im_out,
- q7_t * bufferA,
- q7_t * Im_out);
-
- /**
- * @brief Q7 average pooling function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] Im_out pointer to output tensor
- * @return none.
- *
- */
-
- void arm_avepool_q7_HWC(q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const uint16_t dim_im_out,
- q7_t * bufferA,
- q7_t * Im_out);
-
-/**
- * @defgroup Softmax Softmax Functions
- *
- * EXP(2) based softmax function
- *
- */
-
- /**
- * @brief Q7 softmax function
- * @param[in] vec_in pointer to input vector
- * @param[in] dim_vec input vector dimention
- * @param[out] p_out pointer to output vector
- * @return none.
- *
- */
-
- void arm_softmax_q7(const q7_t * vec_in, const uint16_t dim_vec, q7_t * p_out);
-
- /**
- * @brief Q15 softmax function
- * @param[in] vec_in pointer to input vector
- * @param[in] dim_vec input vector dimention
- * @param[out] p_out pointer to output vector
- * @return none.
- *
- */
-
- void arm_softmax_q15(const q15_t * vec_in, const uint16_t dim_vec, q15_t * p_out);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/hid-dials/Drivers/CMSIS/NN/Include/arm_nnsupportfunctions.h b/hid-dials/Drivers/CMSIS/NN/Include/arm_nnsupportfunctions.h deleted file mode 100644 index 05a239d..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Include/arm_nnsupportfunctions.h +++ /dev/null @@ -1,202 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nnsupportfunctions.h
- * Description: Public header file of support functions for CMSIS NN Library
- *
- * $Date: 13. July 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-
-#ifndef _ARM_NNSUPPORTFUNCTIONS_H_
-#define _ARM_NNSUPPORTFUNCTIONS_H_
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-//#include <cstring>
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/**
- * @brief Union for SIMD access of Q31/Q15/Q7 types
- */
-union arm_nnword
-{
- q31_t word;
- /**< Q31 type */
- q15_t half_words[2];
- /**< Q15 type */
- q7_t bytes[4];
- /**< Q7 type */
-};
-
-/**
- * @brief Struct for specifying activation function types
- *
- */
-typedef enum
-{
- ARM_SIGMOID = 0,
- /**< Sigmoid activation function */
- ARM_TANH = 1,
- /**< Tanh activation function */
-} arm_nn_activation_type;
-
-/**
- * @defgroup nndata_convert Neural Network Data Conversion Functions
- *
- * Perform data type conversion in-between neural network operations
- *
- */
-
-/**
- * @brief Converts the elements of the Q7 vector to Q15 vector without left-shift
- * @param[in] *pSrc points to the Q7 input vector
- * @param[out] *pDst points to the Q15 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- */
-
-void arm_q7_to_q15_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize);
-
-/**
- * @brief Converts the elements of the Q7 vector to reordered Q15 vector without left-shift
- * @param[in] *pSrc points to the Q7 input vector
- * @param[out] *pDst points to the Q15 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- */
-
-void arm_q7_to_q15_reordered_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize);
-
-#if defined (ARM_MATH_DSP)
-
-/**
- * @brief read and expand one Q7 word into two Q15 words
- */
-
-__STATIC_FORCEINLINE void *read_and_pad(void *source, q31_t * out1, q31_t * out2)
-{
- q31_t inA = *__SIMD32(source)++;
- q31_t inAbuf1 = __SXTB16(__ROR(inA, 8));
- q31_t inAbuf2 = __SXTB16(inA);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- *out2 = __PKHTB(inAbuf1, inAbuf2, 16);
- *out1 = __PKHBT(inAbuf2, inAbuf1, 16);
-#else
- *out1 = __PKHTB(inAbuf1, inAbuf2, 16);
- *out2 = __PKHBT(inAbuf2, inAbuf1, 16);
-#endif
-
- return source;
-}
-
-/**
- * @brief read and expand one Q7 word into two Q15 words with reordering
- */
-
-__STATIC_FORCEINLINE void *read_and_pad_reordered(void *source, q31_t * out1, q31_t * out2)
-{
- q31_t inA = *__SIMD32(source)++;
-#ifndef ARM_MATH_BIG_ENDIAN
- *out2 = __SXTB16(__ROR(inA, 8));
- *out1 = __SXTB16(inA);
-#else
- *out1 = __SXTB16(__ROR(inA, 8));
- *out2 = __SXTB16(inA);
-#endif
-
- return source;
-}
-#endif
-
-/**
- * @defgroup NNBasicMath Basic Math Functions for Neural Network Computation
- *
- * Basic Math Functions for Neural Network Computation
- *
- */
-
-/**
- * @brief Q7 vector multiplication with variable output shifts
- * @param[in] *pSrcA pointer to the first input vector
- * @param[in] *pSrcB pointer to the second input vector
- * @param[out] *pDst pointer to the output vector
- * @param[in] out_shift amount of right-shift for output
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
- */
-
-void arm_nn_mult_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- const uint16_t out_shift,
- uint32_t blockSize);
-
-/**
- * @brief Q7 vector multiplication with variable output shifts
- * @param[in] *pSrcA pointer to the first input vector
- * @param[in] *pSrcB pointer to the second input vector
- * @param[out] *pDst pointer to the output vector
- * @param[in] out_shift amount of right-shift for output
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
- */
-
-void arm_nn_mult_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- const uint16_t out_shift,
- uint32_t blockSize);
-
-/**
- * @brief defition to adding rouding offset
- */
-#ifndef ARM_NN_TRUNCATE
- #define NN_ROUND(out_shift) ( 0x1 << (out_shift - 1) )
-#else
- #define NN_ROUND(out_shift) 0
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM0/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM0/RTE_Components.h deleted file mode 100644 index bf1d6d1..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM0/RTE_Components.h +++ /dev/null @@ -1,20 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_cifar10'
- * Target: 'ARMCM0'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM0.h"
-
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM3/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM3/RTE_Components.h deleted file mode 100644 index 6993e2a..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM3/RTE_Components.h +++ /dev/null @@ -1,26 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_nn_test'
- * Target: 'ARMCM3'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM3.h"
-
-#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
- #define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
-#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
- #define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM4_FP/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM4_FP/RTE_Components.h deleted file mode 100644 index 374579e..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM4_FP/RTE_Components.h +++ /dev/null @@ -1,26 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_nn_test'
- * Target: 'ARMCM4_FP'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM4_FP.h"
-
-#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
- #define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
-#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
- #define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM7_SP/RTE_Components.h b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM7_SP/RTE_Components.h deleted file mode 100644 index 40dfc78..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/RTE/_ARMCM7_SP/RTE_Components.h +++ /dev/null @@ -1,26 +0,0 @@ -
-/*
- * Auto generated Run-Time-Environment Component Configuration File
- * *** Do not modify ! ***
- *
- * Project: 'arm_nnexamples_nn_test'
- * Target: 'ARMCM7_SP'
- */
-
-#ifndef RTE_COMPONENTS_H
-#define RTE_COMPONENTS_H
-
-
-/*
- * Define the Device Header File:
- */
-#define CMSIS_device_header "ARMCM7_SP.h"
-
-#define RTE_Compiler_IO_STDERR /* Compiler I/O: STDERR */
- #define RTE_Compiler_IO_STDERR_ITM /* Compiler I/O: STDERR ITM */
-#define RTE_Compiler_IO_STDOUT /* Compiler I/O: STDOUT */
- #define RTE_Compiler_IO_STDOUT_ITM /* Compiler I/O: STDOUT ITM */
-#define RTE_Compiler_IO_TTY /* Compiler I/O: TTY */
- #define RTE_Compiler_IO_TTY_ITM /* Compiler I/O: TTY ITM */
-
-#endif /* RTE_COMPONENTS_H */
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q15_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q15_ref.c deleted file mode 100644 index 4aa6077..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q15_ref.c +++ /dev/null @@ -1,71 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_convolve_HWC_q15_ref(const q15_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimention
- const uint16_t ch_im_in, // number of input image channels
- const q15_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel, // filter kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const q15_t * bias, // bias
- const uint16_t bias_shift, const uint16_t out_shift, q15_t * Im_out, // output image
- const uint16_t dim_im_out, // output image dimension
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- )
-{
- int i, j, k, l, m, n;
- int conv_out;
- int in_row, in_col;
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out; j++)
- {
- for (k = 0; k < dim_im_out; k++)
- {
-#ifndef ARM_NN_TRUNCATE
- conv_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
-#else
- conv_out = bias[i] << bias_shift;
-#endif
- for (m = 0; m < dim_kernel; m++)
- {
- for (n = 0; n < dim_kernel; n++)
- {
- in_row = stride * j + m - padding;
- in_col = stride * k + n - padding;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] *
- wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
- }
- }
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q15_ref_nonsquare.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q15_ref_nonsquare.c deleted file mode 100644 index 69efcb2..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q15_ref_nonsquare.c +++ /dev/null @@ -1,83 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void
-arm_convolve_HWC_q15_nonsquare_ref(const q15_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q15_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q15_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q15_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB)
-
-{
- uint16_t i, j, k, l, m, n;
- int conv_out;
- signed char in_row, in_col;
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out_y; j++)
- {
- for (k = 0; k < dim_im_out_x; k++)
- {
-#ifndef ARM_NN_TRUNCATE
- conv_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
-#else
- conv_out = bias[i] << bias_shift;
-#endif
- for (m = 0; m < dim_kernel_y; m++)
- {
- for (n = 0; n < dim_kernel_x; n++)
- {
- in_row = stride_y * j + m - padding_y;
- in_col = stride_x * k + n - padding_x;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out +=
- Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in +
- l] * wt[i * ch_im_in * dim_kernel_x * dim_kernel_y + (m * dim_kernel_x +
- n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
- }
- }
- }
-}
-
-
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref.c deleted file mode 100644 index aaf25ba..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref.c +++ /dev/null @@ -1,72 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_convolve_HWC_q7_ref(const q7_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimention
- const uint16_t ch_im_in, // number of input image channels
- const q7_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel, // filter kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const q7_t * bias, // bias
- const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
- const uint16_t dim_im_out, // output image dimension
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- )
-{
- int i, j, k, l, m, n;
- int conv_out;
- int in_row, in_col;
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out; j++)
- {
- for (k = 0; k < dim_im_out; k++)
- {
-#ifndef ARM_NN_TRUNCATE
- conv_out = ((q31_t) (bias[i]) << bias_shift) + (0x1 << (out_shift - 1));
-#else
- conv_out = bias[i] << bias_shift;
-#endif
- for (m = 0; m < dim_kernel; m++)
- {
- for (n = 0; n < dim_kernel; n++)
- {
- // if-for implementation
- in_row = stride * j + m - padding;
- in_col = stride * k + n - padding;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + l] *
- wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel + n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref_nonsquare.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref_nonsquare.c deleted file mode 100644 index e731d07..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_convolve_HWC_q7_ref_nonsquare.c +++ /dev/null @@ -1,78 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_convolve_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
- const uint16_t dim_im_in_x, // input image dimention x
- const uint16_t dim_im_in_y, // input image dimention y
- const uint16_t ch_im_in, // number of input image channels
- const q7_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel_x, // filter kernel size x
- const uint16_t dim_kernel_y, // filter kernel size y
- const uint16_t padding_x, // padding sizes x
- const uint16_t padding_y, // padding sizes y
- const uint16_t stride_x, // stride x
- const uint16_t stride_y, // stride y
- const q7_t * bias, // bias
- const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
- const uint16_t dim_im_out_x, // output image dimension x
- const uint16_t dim_im_out_y, // output image dimension y
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- )
-{
- int i, j, k, l, m, n;
- int conv_out;
- int in_row, in_col;
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out_y; j++)
- {
- for (k = 0; k < dim_im_out_x; k++)
- {
-#ifndef ARM_NN_TRUNCATE
- conv_out = ((q31_t) (bias[i]) << bias_shift) + (0x1 << (out_shift - 1));
-#else
- conv_out = bias[i] << bias_shift;
-#endif
- for (m = 0; m < dim_kernel_y; m++)
- {
- for (n = 0; n < dim_kernel_x; n++)
- {
- // if-for implementation
- in_row = stride_y * j + m - padding_y;
- in_col = stride_x * k + n - padding_x;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
- wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_x + n) * ch_im_in +
- l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref.c deleted file mode 100644 index 970effc..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref.c +++ /dev/null @@ -1,70 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_depthwise_separable_conv_HWC_q7_ref(const q7_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimention
- const uint16_t ch_im_in, // number of input image channels
- const q7_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel, // filter kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const q7_t * bias, // bias
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- q7_t * Im_out, // output image
- const uint16_t dim_im_out, // output image dimension
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- )
-{
- int i_out_y, i_out_x, i_ch_out;
- int i_ker_y, i_ker_x;
- for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
- {
- for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
- {
- // for each output
-#ifndef ARM_NN_TRUNCATE
- int conv_out = (bias[i_ch_out] << bias_shift) + (0x1 << (out_shift - 1));
-#else
- int conv_out = bias[i_ch_out] << bias_shift;
-#endif
- for (i_ker_y = 0; i_ker_y < dim_kernel; i_ker_y++)
- {
- for (i_ker_x = 0; i_ker_x < dim_kernel; i_ker_x++)
- {
- int in_row = stride * i_out_y + i_ker_y - padding;
- int in_col = stride * i_out_x + i_ker_x - padding;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
- {
- conv_out += Im_in[(in_row * dim_im_in + in_col) * ch_im_in + i_ch_out] *
- wt[(i_ker_y * dim_kernel + i_ker_x) * ch_im_out + i_ch_out];
- }
- }
- }
- Im_out[(i_out_y * dim_im_out + i_out_x) * ch_im_out + i_ch_out] =
- (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c deleted file mode 100644 index 8fa4147..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_depthwise_separable_conv_HWC_q7_ref_nonsquare.c +++ /dev/null @@ -1,75 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_depthwise_separable_conv_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
- const uint16_t dim_im_in_x, // input image dimention x
- const uint16_t dim_im_in_y, // input image dimention y
- const uint16_t ch_im_in, // number of input image channels
- const q7_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel_x, // filter kernel size x
- const uint16_t dim_kernel_y, // filter kernel size y
- const uint16_t padding_x, // padding sizes x
- const uint16_t padding_y, // padding sizes y
- const uint16_t stride_x, // stride x
- const uint16_t stride_y, // stride y
- const q7_t * bias, // bias
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- q7_t * Im_out, // output image
- const uint16_t dim_im_out_x, // output image dimension x
- const uint16_t dim_im_out_y, // output image dimension y
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- )
-{
- int i_out_y, i_out_x, i_ch_out;
- int i_ker_y, i_ker_x;
- for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
- {
- for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
- {
- // for each output
-#ifndef ARM_NN_TRUNCATE
- int conv_out = (bias[i_ch_out] << bias_shift) + (0x1 << (out_shift - 1));
-#else
- int conv_out = bias[i_ch_out] << bias_shift;
-#endif
- for (i_ker_y = 0; i_ker_y < dim_kernel_y; i_ker_y++)
- {
- for (i_ker_x = 0; i_ker_x < dim_kernel_x; i_ker_x++)
- {
- int in_row = stride_y * i_out_y + i_ker_y - padding_y;
- int in_col = stride_x * i_out_x + i_ker_x - padding_x;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
- {
- conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + i_ch_out] *
- wt[(i_ker_y * dim_kernel_x + i_ker_x) * ch_im_out + i_ch_out];
- }
- }
- }
- Im_out[(i_out_y * dim_im_out_x + i_out_x) * ch_im_out + i_ch_out] =
- (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_opt_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_opt_ref.c deleted file mode 100644 index 6fe5e2b..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_opt_ref.c +++ /dev/null @@ -1,120 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_fully_connected_mat_q7_vec_q15_opt_ref(const q15_t * pV, // pointer to vector
- const q7_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q7_t * bias, q15_t * pOut, // output operand
- q15_t * vec_buffer)
-{
-
- uint16_t rowCnt = num_of_rows >> 2;
- const q7_t *pB = pM;
- const q15_t *pA;
- q15_t *pO = pOut;
- const q7_t *pBias = bias;
-
- while (rowCnt)
- {
- pA = pV;
-#ifndef ARM_NN_TRUNCATE
- q31_t sum = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
- q31_t sum2 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
- q31_t sum3 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
- q31_t sum4 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
-#else
- q31_t sum = *pBias++ << bias_shift;
- q31_t sum2 = *pBias++ << bias_shift;
- q31_t sum3 = *pBias++ << bias_shift;
- q31_t sum4 = *pBias++ << bias_shift;
-#endif
-
- uint16_t colCnt = dim_vec >> 1;
-
- while (colCnt)
- {
- q15_t inA1 = *pA++;
- q15_t inA2 = *pA++;
-
- q7_t inB1 = *pB++;
- q7_t inB3 = *pB++;
- q7_t inB2 = *pB++;
- q7_t inB4 = *pB++;
-
- sum += inA1 * inB1 + inA2 * inB2;
- sum2 += inA1 * inB3 + inA2 * inB4;
-
- inB1 = *pB++;
- inB3 = *pB++;
- inB2 = *pB++;
- inB4 = *pB++;
-
- sum3 += inA1 * inB1 + inA2 * inB2;
- sum4 += inA1 * inB3 + inA2 * inB4;
-
- colCnt--;
- }
- colCnt = dim_vec & 0x1;
- while (colCnt)
- {
- q15_t inA = *pA++;
- q7_t inB = *pB++;
- sum += inA * inB;
- inB = *pB++;
- sum2 += inA * inB;
- inB = *pB++;
- sum3 += inA * inB;
- inB = *pB++;
- sum4 += inA * inB;
-
- colCnt--;
- }
- *pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
-
- rowCnt--;
- }
-
- rowCnt = num_of_rows & 0x3;
-
- while (rowCnt)
- {
- pA = pV;
-#ifndef ARM_NN_TRUNCATE
- int ip_out = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
-#else
- int ip_out = *pBias++ << bias_shift;
-#endif
- for (int j = 0; j < dim_vec; j++)
- {
- q15_t inA = *pA++;
- q7_t inB = *pB++;
- ip_out += inA * inB;
- }
- *pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
-
- rowCnt--;
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_ref.c deleted file mode 100644 index 6a4d385..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_mat_q7_vec_q15_ref.c +++ /dev/null @@ -1,43 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_fully_connected_mat_q7_vec_q15_ref(const q15_t * pV, // pointer to vector
- const q7_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q7_t * bias, q15_t * pOut, // output operand
- q15_t * vec_buffer)
-{
- for (int i = 0; i < num_of_rows; i++)
- {
-#ifndef ARM_NN_TRUNCATE
- int ip_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
-#else
- int ip_out = bias[i] << bias_shift;
-#endif
- for (int j = 0; j < dim_vec; j++)
- {
- ip_out += pV[j] * pM[i * dim_vec + j];
- }
- pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_opt_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_opt_ref.c deleted file mode 100644 index 475c757..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_opt_ref.c +++ /dev/null @@ -1,119 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_fully_connected_q15_opt_ref(const q15_t * pV, // pointer to vector
- const q15_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q15_t * bias, q15_t * pOut, // output operand
- q15_t * vec_buffer)
-{
-
- uint16_t rowCnt = num_of_rows >> 2;
- const q15_t *pB = pM;
- const q15_t *pA;
- q15_t *pO = pOut;
- const q15_t *pBias = bias;
-
- while (rowCnt)
- {
- pA = pV;
-#ifndef ARM_NN_TRUNCATE
- q31_t sum = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
- q31_t sum2 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
- q31_t sum3 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
- q31_t sum4 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
-#else
- q31_t sum = *pBias++ << bias_shift;
- q31_t sum2 = *pBias++ << bias_shift;
- q31_t sum3 = *pBias++ << bias_shift;
- q31_t sum4 = *pBias++ << bias_shift;
-#endif
-
- uint16_t colCnt = dim_vec >> 1;
-
- while (colCnt)
- {
- q15_t inA1 = *pA++;
- q15_t inA2 = *pA++;
-
- q15_t inB1 = *pB++;
- q15_t inB2 = *pB++;
- sum += inA1 * inB1 + inA2 * inB2;
-
- inB1 = *pB++;
- inB2 = *pB++;
- sum2 += inA1 * inB1 + inA2 * inB2;
-
- inB1 = *pB++;
- inB2 = *pB++;
- sum3 += inA1 * inB1 + inA2 * inB2;
-
- inB1 = *pB++;
- inB2 = *pB++;
- sum4 += inA1 * inB1 + inA2 * inB2;
-
- colCnt--;
- }
- colCnt = dim_vec & 0x1;
- while (colCnt)
- {
- q15_t inA = *pA++;
- q15_t inB = *pB++;
- sum += inA * inB;
- inB = *pB++;
- sum2 += inA * inB;
- inB = *pB++;
- sum3 += inA * inB;
- inB = *pB++;
- sum4 += inA * inB;
- colCnt--;
- }
- *pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
-
- rowCnt--;
- }
-
- rowCnt = num_of_rows & 0x3;
-
- while (rowCnt)
- {
- pA = pV;
-#ifndef ARM_NN_TRUNCATE
- int ip_out = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
-#else
- int ip_out = *pBias++ << bias_shift;
-#endif
- for (int j = 0; j < dim_vec; j++)
- {
- q15_t inA = *pA++;
- q15_t inB = *pB++;
- ip_out += inA * inB;
- }
- *pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
-
- rowCnt--;
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_ref.c deleted file mode 100644 index 3fd0bc0..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q15_ref.c +++ /dev/null @@ -1,43 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_fully_connected_q15_ref(const q15_t * pV, // pointer to vector
- const q15_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q15_t * bias, q15_t * pOut, // output operand
- q15_t * vec_buffer)
-{
- for (int i = 0; i < num_of_rows; i++)
- {
-#ifndef ARM_NN_TRUNCATE
- int ip_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
-#else
- int ip_out = bias[i] << bias_shift;
-#endif
- for (int j = 0; j < dim_vec; j++)
- {
- ip_out += pV[j] * pM[i * dim_vec + j];
- }
- pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_opt_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_opt_ref.c deleted file mode 100644 index cee8faa..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_opt_ref.c +++ /dev/null @@ -1,138 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_fully_connected_q7_opt_ref(const q7_t * pV, // pointer to vector
- const q7_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q7_t * bias, q7_t * pOut, // output operand
- q15_t * vec_buffer)
-{
-
- uint16_t rowCnt = num_of_rows >> 2;
- const q7_t *pB = pM;
- const q7_t *pA;
- q7_t *pO = pOut;
- const q7_t *pBias = bias;
-
- while (rowCnt)
- {
- pA = pV;
-#ifndef ARM_NN_TRUNCATE
- q31_t sum = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
- q31_t sum2 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
- q31_t sum3 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
- q31_t sum4 = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
-#else
- q31_t sum = *pBias++ << bias_shift;
- q31_t sum2 = *pBias++ << bias_shift;
- q31_t sum3 = *pBias++ << bias_shift;
- q31_t sum4 = *pBias++ << bias_shift;
-#endif
-
- uint16_t colCnt = dim_vec >> 2;
-
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q7_t inA3 = *pA++;
- q7_t inA2 = *pA++;
- q7_t inA4 = *pA++;
-
- q7_t inB1 = *pB++;
- q7_t inB3 = *pB++;
- q7_t inB2 = *pB++;
- q7_t inB4 = *pB++;
-
- sum += inA1 * inB1 + inA2 * inB2;
- sum2 += inA1 * inB3 + inA2 * inB4;
-
- inB1 = *pB++;
- inB3 = *pB++;
- inB2 = *pB++;
- inB4 = *pB++;
-
- sum3 += inA1 * inB1 + inA2 * inB2;
- sum4 += inA1 * inB3 + inA2 * inB4;
-
- inB1 = *pB++;
- inB3 = *pB++;
- inB2 = *pB++;
- inB4 = *pB++;
-
- sum += inA3 * inB1 + inA4 * inB2;
- sum2 += inA3 * inB3 + inA4 * inB4;
-
- inB1 = *pB++;
- inB3 = *pB++;
- inB2 = *pB++;
- inB4 = *pB++;
-
- sum3 += inA3 * inB1 + inA4 * inB2;
- sum4 += inA3 * inB3 + inA4 * inB4;
-
- colCnt--;
- }
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q7_t inA = *pA++;
- q7_t inB = *pB++;
- sum += inA * inB;
- inB = *pB++;
- sum2 += inA * inB;
- inB = *pB++;
- sum3 += inA * inB;
- inB = *pB++;
- sum4 += inA * inB;
-
- colCnt--;
- }
- *pO++ = (q7_t) __SSAT((sum >> out_shift), 8);
- *pO++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
- *pO++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
- *pO++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
-
- rowCnt--;
- }
-
- rowCnt = num_of_rows & 0x3;
-
- while (rowCnt)
- {
- pA = pV;
-#ifndef ARM_NN_TRUNCATE
- int ip_out = (*pBias++ << bias_shift) + (0x1 << (out_shift - 1));
-#else
- int ip_out = *pBias++ << bias_shift;
-#endif
- for (int j = 0; j < dim_vec; j++)
- {
- q7_t inA = *pA++;
- q7_t inB = *pB++;
- ip_out += inA * inB;
- }
- *pO++ = (q7_t) __SSAT((ip_out >> out_shift), 8);
-
- rowCnt--;
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_ref.c deleted file mode 100644 index 78c891c..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_fully_connected_q7_ref.c +++ /dev/null @@ -1,43 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_fully_connected_q7_ref(const q7_t * pV, // pointer to vector
- const q7_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q7_t * bias, q7_t * pOut, // output operand
- q15_t * vec_buffer)
-{
- for (int i = 0; i < num_of_rows; i++)
- {
-#ifndef ARM_NN_TRUNCATE
- int ip_out = (bias[i] << bias_shift) + (0x1 << (out_shift - 1));
-#else
- int ip_out = bias[i] << bias_shift;
-#endif
- for (int j = 0; j < dim_vec; j++)
- {
- ip_out += pV[j] * pM[i * dim_vec + j];
- }
- pOut[i] = (q7_t) __SSAT((ip_out >> out_shift), 8);
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_nn_mult_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_nn_mult_ref.c deleted file mode 100644 index e78850f..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_nn_mult_ref.c +++ /dev/null @@ -1,58 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-void arm_nn_mult_q7_ref(q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- const uint16_t out_shift,
- uint32_t blockSize) {
- uint16_t i;
-
-for (i = 0; i < blockSize; i++)
- {
- q31_t product = pSrcA[i] * pSrcB[i];
-#ifndef ARM_NN_TRUNCATE
- pDst[i] = (q7_t)__SSAT((product + (0x1 << (out_shift - 1)))>>out_shift, 8);
-#else
- pDst[i] = (q7_t)__SSAT(product >> out_shift, 8);
-#endif
- }
-}
-
-void arm_nn_mult_q15_ref(q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- const uint16_t out_shift,
- uint32_t blockSize) {
- uint16_t i;
-
-for (i = 0; i < blockSize; i++)
- {
- q31_t product = pSrcA[i] * pSrcB[i];
-#ifndef ARM_NN_TRUNCATE
- pDst[i] = (q15_t)__SSAT((product + (0x1 << (out_shift - 1)))>>out_shift, 16);
-#else
- pDst[i] = (q15_t)__SSAT(product >> out_shift, 16);
-#endif
-
-
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_pool_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_pool_ref.c deleted file mode 100644 index b75a0a2..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_pool_ref.c +++ /dev/null @@ -1,96 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "ref_functions.h"
-
-void arm_avepool_q7_HWC_ref(const q7_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimension
- const uint16_t ch_im_in, // number of input image channels
- const uint16_t dim_kernel, // window kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const uint16_t dim_im_out, // output image dimension
- q7_t * bufferA, // a buffer for local storage
- q7_t * Im_out)
-{
- int16_t i_ch_in, i_x, i_y;
- int16_t k_x, k_y;
-
- for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
- {
- for (i_y = 0; i_y < dim_im_out; i_y++)
- {
- for (i_x = 0; i_x < dim_im_out; i_x++)
- {
- int sum = 0;
- int count = 0;
- for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
- {
- for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
- {
- if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
- {
- sum += Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
- count++;
- }
- }
- }
- Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = sum / count;
- }
- }
- }
-}
-
-void arm_maxpool_q7_HWC_ref(const q7_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimension
- const uint16_t ch_im_in, // number of input image channels
- const uint16_t dim_kernel, // window kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const uint16_t dim_im_out, // output image dimension
- q7_t * bufferA, // a buffer for local storage
- q7_t * Im_out)
-{
- int16_t i_ch_in, i_x, i_y;
- int16_t k_x, k_y;
-
- for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
- {
- for (i_y = 0; i_y < dim_im_out; i_y++)
- {
- for (i_x = 0; i_x < dim_im_out; i_x++)
- {
- int max = -129;
- for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
- {
- for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
- {
- if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
- {
- if (Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)] > max)
- {
- max = Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
- }
- }
- }
- }
- Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = max;
- }
- }
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_relu_ref.c b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_relu_ref.c deleted file mode 100644 index 9397ef1..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/arm_relu_ref.c +++ /dev/null @@ -1,42 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-void arm_relu_q7_ref(q7_t * data, uint16_t size)
-{
- uint16_t i;
-
- for (i = 0; i < size; i++)
- {
- if (data[i] < 0)
- data[i] = 0;
- }
-}
-
-void arm_relu_q15_ref(q15_t * data, uint16_t size)
-{
- uint16_t i;
-
- for (i = 0; i < size; i++)
- {
- if (data[i] < 0)
- data[i] = 0;
- }
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/fully_connected_testing_weights.h b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/fully_connected_testing_weights.h deleted file mode 100644 index 31cdcb0..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/fully_connected_testing_weights.h +++ /dev/null @@ -1,7 +0,0 @@ -#define IP2_WEIGHT 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-
-#define IP4_WEIGHT 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-
-#define IP4_q7_q15_WEIGHT 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-
-#define IP4_WEIGHT_Q15 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diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/ref_functions.h b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/ref_functions.h deleted file mode 100644 index 5a25ffa..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/Ref_Implementations/ref_functions.h +++ /dev/null @@ -1,250 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef _REF_FUNCTIONS_H_
-#define _REF_FUNCTIONS_H_
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-//#include "arm_nnsupportfunctions.h"
-#include "fully_connected_testing_weights.h"
-
-#ifdef __cplusplus
-extern "C"
-{
-#endif
-
-/*
- *
- * Convolution reference implemenation
- *
- */
-
- void arm_convolve_HWC_q7_ref(const q7_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimention
- const uint16_t ch_im_in, // number of input image channels
- const q7_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel, // filter kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const q7_t * bias, // bias
- const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
- const uint16_t dim_im_out, // output image dimension
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- );
-
- void arm_convolve_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
- const uint16_t dim_im_in_x, // input image dimention x
- const uint16_t dim_im_in_y, // input image dimention y
- const uint16_t ch_im_in, // number of input image channels
- const q7_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel_x, // filter kernel size x
- const uint16_t dim_kernel_y, // filter kernel size y
- const uint16_t padding_x, // padding sizes x
- const uint16_t padding_y, // padding sizes y
- const uint16_t stride_x, // stride x
- const uint16_t stride_y, // stride y
- const q7_t * bias, // bias
- const uint16_t bias_shift, const uint16_t out_shift, q7_t * Im_out, // output image
- const uint16_t dim_im_out_x, // output image dimension x
- const uint16_t dim_im_out_y, // output image dimension y
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- );
-
- void arm_convolve_HWC_q15_ref(const q15_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimention
- const uint16_t ch_im_in, // number of input image channels
- const q15_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel, // filter kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const q15_t * bias, // bias
- const uint16_t bias_shift, const uint16_t out_shift, q15_t * Im_out, // output image
- const uint16_t dim_im_out, // output image dimension
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- );
- void arm_convolve_HWC_q15_nonsquare_ref(const q15_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q15_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q15_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q15_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB);
-
- void arm_depthwise_separable_conv_HWC_q7_ref(const q7_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimention
- const uint16_t ch_im_in, // number of input image channels
- const q7_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel, // filter kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const q7_t * bias, // bias
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- q7_t * Im_out, // output image
- const uint16_t dim_im_out, // output image dimension
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- );
- void arm_depthwise_separable_conv_HWC_q7_ref_nonsquare(const q7_t * Im_in, // input image
- const uint16_t dim_im_in_x, // input image dimention x
- const uint16_t dim_im_in_y, // input image dimention y
- const uint16_t ch_im_in, // number of input image channels
- const q7_t * wt, // kernel weights
- const uint16_t ch_im_out, // number of filters, i.e., output image channels
- const uint16_t dim_kernel_x, // filter kernel size x
- const uint16_t dim_kernel_y, // filter kernel size y
- const uint16_t padding_x, // padding sizes x
- const uint16_t padding_y, // padding sizes y
- const uint16_t stride_x, // stride x
- const uint16_t stride_y, // stride y
- const q7_t * bias, // bias
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- q7_t * Im_out, // output image
- const uint16_t dim_im_out_x, // output image dimension x
- const uint16_t dim_im_out_y, // output image dimension y
- q15_t * bufferA, //buffer space for input
- q7_t * bufferB //buffer space for output
- );
-
-/*
- *
- * Fully-connected reference implemenation
- *
- */
-
- void arm_fully_connected_q7_ref(const q7_t * pV, // pointer to vector
- const q7_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q7_t * bias, q7_t * pOut, // output operand
- q15_t * vec_buffer);
-
- void arm_fully_connected_q15_ref(const q15_t * pV, // pointer to vector
- const q15_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q15_t * bias, q15_t * pOut, // output operand
- q15_t * vec_buffer);
-
- void arm_fully_connected_mat_q7_vec_q15_ref(const q15_t * pV, // pointer to vector
- const q7_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q7_t * bias, q15_t * pOut, // output operand
- q15_t * vec_buffer);
-
- void arm_fully_connected_q7_opt_ref(const q7_t * pV, // pointer to vector
- const q7_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q7_t * bias, q7_t * pOut, // output operand
- q15_t * vec_buffer);
-
- void arm_fully_connected_q15_opt_ref(const q15_t * pV, // pointer to vector
- const q15_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q15_t * bias, q15_t * pOut, // output operand
- q15_t * vec_buffer);
-
- void arm_fully_connected_mat_q7_vec_q15_opt_ref(const q15_t * pV, // pointer to vector
- const q7_t * pM, // pointer to matrix
- const uint16_t dim_vec, // length of the vector
- const uint16_t num_of_rows, // numCol of A
- const uint16_t bias_shift, // amount of left-shift for bias
- const uint16_t out_shift, // amount of right-shift for output
- const q7_t * bias, q15_t * pOut, // output operand
- q15_t * vec_buffer);
-
-/*
- *
- * Pooling reference implemenation
- *
- */
-
- void arm_avepool_q7_HWC_ref(const q7_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimension
- const uint16_t ch_im_in, // number of input image channels
- const uint16_t dim_kernel, // window kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const uint16_t dim_im_out, // output image dimension
- q7_t * bufferA, // a buffer for local storage
- q7_t * Im_out);
-
- void arm_maxpool_q7_HWC_ref(const q7_t * Im_in, // input image
- const uint16_t dim_im_in, // input image dimension
- const uint16_t ch_im_in, // number of input image channels
- const uint16_t dim_kernel, // window kernel size
- const uint16_t padding, // padding sizes
- const uint16_t stride, // stride
- const uint16_t dim_im_out, // output image dimension
- q7_t * bufferA, // a buffer for local storage
- q7_t * Im_out);
-
-/*
- *
- * Other reference implemenation
- *
- */
-
- void arm_relu_q7_ref(q7_t * data, uint16_t size);
-
- void arm_relu_q15_ref(q15_t * data, uint16_t size);
-
- void arm_nn_mult_q7_ref(q7_t * pSrcA, q7_t * pSrcB, q7_t * pDst, const uint16_t out_shift, uint32_t blockSize);
-
- void arm_nn_mult_q15_ref(q15_t * pSrcA, q15_t * pSrcB, q15_t * pDst, const uint16_t out_shift, uint32_t blockSize);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.cpp b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.cpp deleted file mode 100644 index 41088fe..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.cpp +++ /dev/null @@ -1,801 +0,0 @@ -/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2018 Arm Limited. All rights reserved.
-*
-*
-* Project: CMSIS NN Library
-* Title: arm_nnexamples_nn_test.cpp
-*
-* Description: Example code for NN kernel testing.
-*
-* Target Processor: Cortex-M cores
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-* - Redistributions of source code must retain the above copyright
-* notice, this list of conditions and the following disclaimer.
-* - Redistributions in binary form must reproduce the above copyright
-* notice, this list of conditions and the following disclaimer in
-* the documentation and/or other materials provided with the
-* distribution.
-* - Neither the name of ARM LIMITED nor the names of its contributors
-* may be used to endorse or promote products derived from this
-* software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_nnexamples_nn_test.h"
-
-//#define TEST_SIGMOID
-//#define TEST_TANH
-#define TEST_POOL
-#define TEST_RELU
-#define TEST_IP
-#define TEST_CONV
-#define TEST_NONSQUARE
-#define TEST_NNMULT
-
-int test_index = 0;
-q7_t test_flags[50];
-bool test_pass;
-
-int main()
-{
- printf("start tests\n");
-
- srand(1);
-
- // common pointers for testing data
- q7_t *test1;
- q15_t *test2;
- q7_t *test3;
- q15_t *test4;
-
- for (test_index = 0; test_index<50; test_index++) {
- test_flags[test_index] = -1;
- }
- test_index = 0;
-
-#ifdef TEST_NNMULT
-#define NNMULT_DIM 128
- test1 = new q7_t[NNMULT_DIM*2];
- test2 = new q15_t[NNMULT_DIM*2];
- test3 = new q7_t[NNMULT_DIM*2];
- test4 = new q15_t[NNMULT_DIM*2];
-
- q7_t * mult_out_q7 = test3;
- q7_t * mult_ref_q7 = test3 + NNMULT_DIM;
- q15_t * mult_out_q15 = test4;
- q15_t * mult_ref_q15 = test4 + NNMULT_DIM;
-
- for (int i=0;i<NNMULT_DIM*2;i++) {
- test1[i] = (rand() % 256 - 128);
- test2[i] = (rand() % 65536 - 32768);
- }
-
- // Test q7
- arm_nn_mult_q7(test1, test1+NNMULT_DIM, mult_out_q7, 5, NNMULT_DIM);
-
- arm_nn_mult_q7_ref(test1, test1+NNMULT_DIM, mult_ref_q7, 5, NNMULT_DIM);
-
- verify_results_q7(mult_out_q7, mult_ref_q7, NNMULT_DIM);
-
- arm_nn_mult_q7(test1, test1+NNMULT_DIM, mult_out_q7, 9, NNMULT_DIM);
-
- arm_nn_mult_q7_ref(test1, test1+NNMULT_DIM, mult_ref_q7, 9, NNMULT_DIM);
-
- verify_results_q7(mult_out_q7, mult_ref_q7, NNMULT_DIM);
-
- // Test q15
- arm_nn_mult_q15(test2, test2+NNMULT_DIM, mult_out_q15, 13, NNMULT_DIM);
-
- arm_nn_mult_q15_ref(test2, test2+NNMULT_DIM, mult_ref_q15, 13, NNMULT_DIM);
-
- verify_results_q15(mult_out_q15, mult_ref_q15, NNMULT_DIM);
-
- arm_nn_mult_q15(test2, test2+NNMULT_DIM, mult_out_q15, 18, NNMULT_DIM);
-
- arm_nn_mult_q15_ref(test2, test2+NNMULT_DIM, mult_ref_q15, 18, NNMULT_DIM);
-
- verify_results_q15(mult_out_q15, mult_ref_q15, NNMULT_DIM);
-
-#endif
-
-#ifdef TEST_SIGMOID
-
-#define SIGMOID_DIM 128
-
- /* This part tests the running of sigmoid functions */
-
- test1 = new q7_t[SIGMOID_DIM];
- test2 = new q15_t[SIGMOID_DIM];
- test3 = new q7_t[SIGMOID_DIM];
- test4 = new q15_t[SIGMOID_DIM];
-
- srand(1);
-
- for (int i = 0; i < SIGMOID_DIM; i++)
- {
- test1[i] = (rand() % 256 - 128);
- test2[i] = (rand() % 65536 - 32768);
- test3[i] = test1[i];
- test4[i] = test2[i];
- }
-
- arm_nn_activations_direct_q7(test3, SIGMOID_DIM, 3, ARM_SIGMOID);
-
- for (int i = 0; i < SIGMOID_DIM; i++)
- {
- printf("in: %d out: %d\n", test1[i], test3[i]);
- }
-
- printf("start testing q15_t sigmoid\n\n");
-
- arm_nn_activations_direct_q15(test4, SIGMOID_DIM, 3, ARM_SIGMOID);
-
- for (int i = 0; i < SIGMOID_DIM; i++)
- {
- printf("in: %d out: %d\n", test2[i], test4[i]);
- }
-
- delete[]test1;
- delete[]test2;
- delete[]test3;
- delete[]test4;
-
-#endif
-
-#ifdef TEST_TANH
-
-#define TANH_DIM 128
-
- /* This part tests the running of sigmoid functions */
-
- test1 = new q7_t[TANH_DIM];
- test2 = new q15_t[TANH_DIM];
- test3 = new q7_t[TANH_DIM];
- test4 = new q15_t[TANH_DIM];
-
- srand(1);
-
- for (int i = 0; i < TANH_DIM; i++)
- {
- test1[i] = (rand() % 256 - 128);
- test2[i] = (rand() % 65536 - 32768);
- test3[i] = test1[i];
- test4[i] = test2[i];
- }
-
- arm_nn_activations_direct_q7(test3, TANH_DIM, 3, ARM_TANH);
-
- printf("start testing q7_t tanh\n\n");
-
- for (int i = 0; i < TANH_DIM; i++)
- {
- printf("in: %d out: %d\n", test1[i], test3[i]);
- }
-
- printf("start testing q15_t tanh\n\n");
-
- arm_nn_activations_direct_q15(test4, TANH_DIM, 3, ARM_TANH);
-
- for (int i = 0; i < TANH_DIM; i++)
- {
- printf("in: %d out: %d\n", test2[i], test4[i]);
- }
-
- delete[]test1;
- delete[]test2;
- delete[]test3;
- delete[]test4;
-
-#endif
-
-#ifdef TEST_POOL
-
-#define POOL_IM_DIM 32
-#define POOL_IM_CH 8
-
- test1 = new q7_t[POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH * 2];
- test2 = new q15_t[POOL_IM_DIM * POOL_IM_CH];
- test3 = new q7_t[POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH];
-
- for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
- {
- test1[i] = (rand() % 256 - 128);
- }
-
- q7_t *img_in = test1 + POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH;
- q7_t *pool_out_ref = test3;
- q7_t *pool_out_opt = test3 + POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH / 2;
-
- for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
- {
- test3[i] = 0;
- }
-
- // copy over the img input
- for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
- {
- img_in[i] = test1[i];
- }
-
- initialize_results_q7(pool_out_ref, pool_out_opt, POOL_IM_DIM / 2 * POOL_IM_DIM / 2 * POOL_IM_CH);
-
- printf("Start maxpool reference implementation\n");
-
- arm_maxpool_q7_HWC_ref(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_ref);
-
- // copy over the img input
- for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
- {
- img_in[i] = test1[i];
- }
-
- printf("Start maxpool opt implementation\n");
-
- arm_maxpool_q7_HWC(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_opt);
-
- verify_results_q7(pool_out_ref, pool_out_opt, POOL_IM_DIM / 2 * POOL_IM_DIM / 2 * POOL_IM_CH);
-
- // copy over the img input
- for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
- {
- img_in[i] = test1[i];
- }
-
- // copy over the img input
- for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
- {
- img_in[i] = test1[i];
- }
-
- printf("Start avepool ref implementation\n");
-
- arm_avepool_q7_HWC_ref(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_ref);
-
- // copy over the img input
- for (int i = 0; i < POOL_IM_DIM * POOL_IM_DIM * POOL_IM_CH; i++)
- {
- img_in[i] = test1[i];
- }
-
- printf("Start avepool opt implementation\n");
-
- arm_avepool_q7_HWC(img_in, POOL_IM_DIM, POOL_IM_CH, 3, 0, 2, POOL_IM_DIM / 2, (q7_t *) test2, pool_out_opt);
-
- // special check here
- bool if_ave_pool_match = true;
- for (int i = 0; i < POOL_IM_DIM / 2 * POOL_IM_DIM / 2 * POOL_IM_CH; i++)
- {
- // we tolerate at most difference of 1 here because of rounding errors
- if (pool_out_ref[i] - pool_out_opt[i] >= 2 || pool_out_opt[i] - pool_out_ref[i] >= 2)
- {
- printf("Output mismatch at %d, expected %d, actual %d\n", i, pool_out_ref[i], pool_out_opt[i]);
- if_ave_pool_match = false;
- }
- }
- if (if_ave_pool_match == true)
- {
- printf("Outputs match.\n");
- }
-
- delete[]test1;
- delete[]test2;
- delete[]test3;
-
-#endif
-
-#ifdef TEST_RELU
-
-#define RELU_DIM 127
-
- test1 = new q7_t[RELU_DIM];
- test2 = new q15_t[RELU_DIM];
- test3 = new q7_t[RELU_DIM];
- test4 = new q15_t[RELU_DIM];
-
- for (int i = 0; i < RELU_DIM; i++)
- {
- test1[i] = (rand() % 256 - 128);
- test2[i] = (rand() % 65536 - 32768);
- test3[i] = test1[i];
- test4[i] = test2[i];
- }
-
- q7_t *relu_ref_data_q7 = test1;
- q7_t *relu_opt_data_q7 = test3;
- q15_t *relu_ref_data_q15 = test2;
- q15_t *relu_opt_data_q15 = test4;
-
- printf("Start ref relu q7 implementation\n");
-
- arm_relu_q7_ref(relu_ref_data_q7, RELU_DIM);
-
- printf("Start opt relu q7 implementation\n");
-
- arm_relu_q7(relu_opt_data_q7, RELU_DIM);
-
- verify_results_q7(relu_ref_data_q7, relu_opt_data_q7, RELU_DIM);
-
- printf("Start ref relu q15 implementation\n");
-
- arm_relu_q15_ref(relu_ref_data_q15, RELU_DIM);
-
- printf("Start opt relu q15 implementation\n");
-
- arm_relu_q15(relu_opt_data_q15, RELU_DIM);
-
- verify_results_q15(relu_ref_data_q15, relu_opt_data_q15, RELU_DIM);
-
- delete[]test1;
- delete[]test2;
- delete[]test3;
- delete[]test4;
-
-#endif
-
-#ifdef TEST_IP
-
-#define IP_ROW_DIM 127
-#define IP_COL_DIM 127
-
- q7_t ip_weights[IP_ROW_DIM * IP_COL_DIM] = IP2_WEIGHT;
- q7_t ip_q7_opt_weights[IP_ROW_DIM * IP_COL_DIM] = IP4_WEIGHT;
- q7_t ip_q7_q15_opt_weights[IP_ROW_DIM * IP_COL_DIM] = IP4_q7_q15_WEIGHT;
- q15_t ip_q15_weights[IP_ROW_DIM * IP_COL_DIM] = IP2_WEIGHT;
- q15_t ip_q15_opt_weights[IP_ROW_DIM * IP_COL_DIM] = IP4_WEIGHT_Q15;
-
- test1 = new q7_t[IP_COL_DIM + IP_ROW_DIM];
- test2 = new q15_t[IP_COL_DIM];
- test3 = new q7_t[IP_ROW_DIM * 3];
- test4 = new q15_t[IP_COL_DIM + IP_ROW_DIM * 2];
-
- for (int i = 0; i < IP_ROW_DIM + IP_COL_DIM; i++)
- {
- test1[i] = rand() % 256 - 100;
- }
- for (int i = 0; i < IP_ROW_DIM * 3; i++)
- {
- test3[i] = 0;
- }
-
- q7_t *ip_bias_q7 = test1 + IP_COL_DIM;
-
- q7_t *ip_out_q7_ref = test3;
- q7_t *ip_out_q7_opt = test3 + IP_ROW_DIM;
- q7_t *ip_out_q7_opt_fast = test3 + 2 * IP_ROW_DIM;
- q15_t *ip_out_q15_ref = test4 + IP_COL_DIM;
- q15_t *ip_out_q15_opt = test4 + IP_COL_DIM + IP_ROW_DIM;
-
- initialize_results_q7(ip_out_q7_ref, ip_out_q7_opt, IP_ROW_DIM);
- initialize_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
- initialize_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
-
- printf("Start ref q7 implementation\n");
-
- arm_fully_connected_q7_ref(test1, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q7_ref, test2);
-
- printf("Start q7 implementation\n");
-
- arm_fully_connected_q7(test1, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q7_opt, test2);
-
- verify_results_q7(ip_out_q7_ref, ip_out_q7_opt, IP_ROW_DIM);
-
- printf("Start q7 ref opt implementation\n");
-
- arm_fully_connected_q7_opt_ref(test1, ip_q7_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7,
- ip_out_q7_opt_fast, test2);
-
- verify_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
-
- printf("Start q7 opt implementation\n");
-
- arm_fully_connected_q7_opt(test1, ip_q7_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q7_opt_fast,
- test2);
-
- verify_results_q7(ip_out_q7_ref, ip_out_q7_opt_fast, IP_ROW_DIM);
-
- for (int i = 0; i < IP_ROW_DIM + IP_COL_DIM; i++)
- {
- test4[i] = (rand() % 65536 - 32768);
- }
-
- initialize_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
-
- printf("Start ref q15 implementation\n");
-
- arm_fully_connected_q15_ref(test4, ip_q15_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_ref, NULL);
-
- printf("Start q15 implementation\n");
-
- arm_fully_connected_q15(test4, ip_q15_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_opt, NULL);
-
- verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
-
- printf("Start ref opt q15 implementation\n");
-
- arm_fully_connected_q15_opt_ref(test4, ip_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_opt,
- NULL);
-
- verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
-
- printf("Start opt q15 implementation\n");
-
- arm_fully_connected_q15_opt(test4, ip_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, test2, ip_out_q15_opt, NULL);
-
- verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
-
- initialize_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
-
- printf("Start ref q7_q15 implementation\n");
-
- arm_fully_connected_mat_q7_vec_q15_ref(test4, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q15_ref,
- test2);
-
- printf("Start q7_q15 implementation\n");
-
- arm_fully_connected_mat_q7_vec_q15(test4, ip_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7, ip_out_q15_opt,
- test2);
-
- verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
-
- printf("Start ref opt q7_q15 implementation\n");
-
- arm_fully_connected_mat_q7_vec_q15_opt_ref(test4, ip_q7_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7,
- ip_out_q15_opt, test2);
-
- verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
-
- printf("Start opt q7_q15 implementation\n");
-
- arm_fully_connected_mat_q7_vec_q15_opt(test4, ip_q7_q15_opt_weights, IP_COL_DIM, IP_ROW_DIM, 1, 7, ip_bias_q7,
- ip_out_q15_opt, test2);
-
- verify_results_q15(ip_out_q15_ref, ip_out_q15_opt, IP_ROW_DIM);
-
- delete[]test1;
- delete[]test2;
- delete[]test3;
- delete[]test4;
-
-#endif
-
-#ifdef TEST_NONSQUARE
-
-/* Use RCONV to differential with square CONV */
-
-#define RCONV_IM_DIM_X 10
-#define RCONV_IM_DIM_Y 8
-#define RCONV_IM_CH 4
-#define RCONV_KER_DIM_X 5
-#define RCONV_KER_DIM_Y 3
-#define RCONV_STRIDE_X 1
-#define RCONV_STRIDE_Y 1
-#define RCONV_PADDING_X 2
-#define RCONV_PADDING_Y 1
-#define RCONV_OUT_CH 4
-#define RCONV_OUT_DIM_X 10
-#define RCONV_OUT_DIM_Y 8
-
- test1 = new q7_t[RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH];
- test2 = new q15_t[2 * RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH];
- test3 =
- new q7_t[RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH];
-
- for (int i = 0; i < RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH; i++)
- {
- test1[i] = rand() % 256 - 100;
- }
-
- for (int i = 0;
- i < RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH; i++)
- {
- test3[i] = rand() % 256 - 100;
- }
-
- q7_t *rconv_weight_q7 = test1;
- q7_t *rconv_bias_q7 = test1 + RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH;
-
- q15_t *rconv_buf = test2;
-
- q7_t *rconv_im_in_q7 = test3;
- q7_t *rconv_im_out_ref_q7 = test3 + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH;
- q7_t *rconv_im_out_opt_q7 =
- test3 + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH;
-
- initialize_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
-
- printf("start conv q7 nonsquare ref implementation\n");
- arm_convolve_HWC_q7_ref_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
- RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
- RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_ref_q7,
- RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- printf("start conv q7 nonsquare opt implementation\n");
- arm_convolve_HWC_q7_fast_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
- RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
- RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_opt_q7,
- RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
-
- initialize_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
-
- printf("start conv q7 nonsquare ref implementation\n");
- arm_convolve_HWC_q7_ref_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
- RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
- RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_ref_q7,
- RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- printf("start conv q7 nonsquare basic implementation\n");
- arm_convolve_HWC_q7_basic_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
- RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
- RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_opt_q7,
- RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
-
- initialize_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
-
- printf("start 1x1 conv q7 nonsquare fast implementation\n");
- arm_convolve_HWC_q7_fast_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
- RCONV_OUT_CH, 1, 1, 0, 0, RCONV_STRIDE_X,
- RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_ref_q7, RCONV_OUT_DIM_X,
- RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- printf("start 1x1 conv q7 nonsquare dedicated function implementation\n");
- arm_convolve_1x1_HWC_q7_fast_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q7,
- RCONV_OUT_CH, 1, 1, 0, 0, RCONV_STRIDE_X,
- RCONV_STRIDE_Y, rconv_bias_q7, 1, 7, rconv_im_out_opt_q7, RCONV_OUT_DIM_X,
- RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
-
- printf("start depthwise separable conv q7 nonsquare ref implementation\n");
- arm_depthwise_separable_conv_HWC_q7_ref_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH,
- rconv_weight_q7, RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y,
- RCONV_PADDING_X, RCONV_PADDING_Y, RCONV_STRIDE_X, RCONV_STRIDE_Y,
- rconv_bias_q7, 1, 7, rconv_im_out_ref_q7, RCONV_OUT_DIM_X,
- RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- printf("start depthwise separable conv q7 nonsquare opt implementation\n");
- arm_depthwise_separable_conv_HWC_q7_nonsquare(rconv_im_in_q7, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH,
- rconv_weight_q7, RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y,
- RCONV_PADDING_X, RCONV_PADDING_Y, RCONV_STRIDE_X, RCONV_STRIDE_Y,
- rconv_bias_q7, 1, 7, rconv_im_out_opt_q7, RCONV_OUT_DIM_X,
- RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- verify_results_q7(rconv_im_out_ref_q7, rconv_im_out_opt_q7, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
-
- delete[]test1;
- delete[]test2;
- delete[]test3;
-
- test2 = new q15_t[RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH]; // weights + bias
- test4 = new q15_t[2 * RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH //buffer
- + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH]; // i/o
-
- for (int i = 0; i < RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH + RCONV_OUT_CH; i++)
- {
- test2[i] = rand() % 256 - 100;
- }
-
- for (int i = 0;
- i < 2 * RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH
- + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH + 2 * RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH;
- i++)
- {
- test4[i] = rand() % 256 - 100;
- }
-
- q15_t *rconv_weight_q15 = test2;
- q15_t *rconv_bias_q15 = test2 + RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH * RCONV_OUT_CH;
-
- rconv_buf = test4;
-
- q15_t *rconv_im_in_q15 = test4 + 2 * RCONV_KER_DIM_Y * RCONV_KER_DIM_X * RCONV_IM_CH;
- q15_t *rconv_im_out_ref_q15 = rconv_im_in_q15 + RCONV_IM_DIM_Y * RCONV_IM_DIM_X * RCONV_IM_CH;
- q15_t *rconv_im_out_opt_q15 = rconv_im_out_ref_q15 + RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH;
-
- initialize_results_q15(rconv_im_out_ref_q15, rconv_im_out_opt_q15, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
-
- printf("start conv q15 nonsquare ref implementation\n");
- arm_convolve_HWC_q15_nonsquare_ref(rconv_im_in_q15, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q15,
- RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
- RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q15, 1, 7, rconv_im_out_ref_q15,
- RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- printf("start conv q5 nonsquare opt implementation\n");
- arm_convolve_HWC_q15_fast_nonsquare(rconv_im_in_q15, RCONV_IM_DIM_X, RCONV_IM_DIM_Y, RCONV_IM_CH, rconv_weight_q15,
- RCONV_OUT_CH, RCONV_KER_DIM_X, RCONV_KER_DIM_Y, RCONV_PADDING_X, RCONV_PADDING_Y,
- RCONV_STRIDE_X, RCONV_STRIDE_Y, rconv_bias_q15, 1, 7, rconv_im_out_opt_q15,
- RCONV_OUT_DIM_X, RCONV_OUT_DIM_Y, rconv_buf, NULL);
-
- verify_results_q15(rconv_im_out_ref_q15, rconv_im_out_opt_q15, RCONV_OUT_DIM_Y * RCONV_OUT_DIM_X * RCONV_OUT_CH);
-
- delete [] test2;
- delete [] test4;
-#endif
-
-#ifdef TEST_CONV
-
-#define CONV_IM_DIM 16
-#define CONV_IM_CH 16
-#define CONV_KER_DIM 5
-#define CONV_OUT_CH 16
-#define CONV_OUT_DIM 16
-
- test1 = new q7_t[CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH];
- test2 =
- new q15_t[CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH +
- 2 * CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH];
- test3 = new q7_t[CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH];
- test4 = new q15_t[CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH];
-
- for (int i = 0; i < CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH; i++)
- {
- test1[i] = rand() % 256 - 100;
- }
-
- for (int i = 0;
- i <
- CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH +
- 2 * CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH + CONV_OUT_CH; i++)
- {
- test2[i] = (rand() % 65536 - 32768);
- }
-
- for (int i = 0; i < CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH; i++)
- {
- test3[i] = rand() % 256 - 100;
- }
-
- for (int i = 0; i < CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + 2 * CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH; i++)
- {
- test4[i] = (rand() % 65536 - 32768);
- }
-
- q7_t *conv_weight_q7 = test1;
- q7_t *conv_bias_q7 = test1 + CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH;
-
- q15_t *conv_weight_q15 = test2;
- q15_t *conv_buf = test2 + CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH;
- q15_t *conv_bias_q15 =
- test2 + CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH +
- 2 * CONV_KER_DIM * CONV_KER_DIM * CONV_IM_CH * CONV_OUT_CH;
-
- q7_t *conv_im_in_q7 = test3;
- q7_t *conv_im_out_ref_q7 = test3 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH;
- q7_t *conv_im_out_opt_q7 =
- test3 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH;
-
- q15_t *conv_im_in_q15 = test4;
- q15_t *conv_im_out_ref_q15 = test4 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH;
- q15_t *conv_im_out_opt_q15 =
- test4 + CONV_IM_DIM * CONV_IM_DIM * CONV_IM_CH + CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH;
-
- initialize_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- printf("start q7 ref implementation\n");
-
- arm_convolve_HWC_q7_ref(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_ref_q7,
- CONV_OUT_DIM, conv_buf, NULL);
-
- printf("start q7 basic implementation\n");
-
- arm_convolve_HWC_q7_basic(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
- CONV_OUT_DIM, conv_buf, NULL);
-
- verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- printf("start q7 fast implementation\n");
-
- arm_convolve_HWC_q7_fast(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
- CONV_OUT_DIM, conv_buf, NULL);
-
- verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- // testing with RGB
- printf("start q7 ref implementation for RGB\n");
-
- arm_convolve_HWC_q7_ref(conv_im_in_q7, CONV_IM_DIM, 3, conv_weight_q7,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_ref_q7,
- CONV_OUT_DIM, conv_buf, NULL);
-
- printf("start q7 basic implementation for RGB\n");
-
- arm_convolve_HWC_q7_basic(conv_im_in_q7, CONV_IM_DIM, 3, conv_weight_q7,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
- CONV_OUT_DIM, conv_buf, NULL);
-
- verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- printf("start q7 RGB implementation for RGB\n");
-
- arm_convolve_HWC_q7_RGB(conv_im_in_q7, CONV_IM_DIM, 3, conv_weight_q7,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
- CONV_OUT_DIM, conv_buf, NULL);
-
- verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- // testing q15
- initialize_results_q15(conv_im_out_ref_q15, conv_im_out_opt_q15, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- printf("start q15 ref implementation\n");
-
- arm_convolve_HWC_q15_ref(conv_im_in_q15, CONV_IM_DIM, CONV_IM_CH, conv_weight_q15,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q15, 0, 15, conv_im_out_ref_q15,
- CONV_OUT_DIM, conv_buf, NULL);
-
- printf("start q15 basic implementation\n");
-
- arm_convolve_HWC_q15_basic(conv_im_in_q15, CONV_IM_DIM, CONV_IM_CH, conv_weight_q15,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q15, 0, 15, conv_im_out_opt_q15,
- CONV_OUT_DIM, conv_buf, NULL);
-
- verify_results_q15(conv_im_out_ref_q15, conv_im_out_opt_q15, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- printf("start q15 fast implementation\n");
-
- arm_convolve_HWC_q15_fast(conv_im_in_q15, CONV_IM_DIM, CONV_IM_CH, conv_weight_q15,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q15, 0, 15, conv_im_out_opt_q15,
- CONV_OUT_DIM, conv_buf, NULL);
-
- verify_results_q15(conv_im_out_ref_q15, conv_im_out_opt_q15, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- // depthwise separable conv
- initialize_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- printf("start q7 depthwise_separable_conv ref implementation\n");
-
- arm_depthwise_separable_conv_HWC_q7_ref(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_ref_q7,
- CONV_OUT_DIM, conv_buf, NULL);
-
- printf("start q7 depthwise_separable_conv implementation\n");
-
- arm_depthwise_separable_conv_HWC_q7(conv_im_in_q7, CONV_IM_DIM, CONV_IM_CH, conv_weight_q7,
- CONV_OUT_CH, CONV_KER_DIM, 2, 1, conv_bias_q7, 1, 7, conv_im_out_opt_q7,
- CONV_OUT_DIM, conv_buf, NULL);
-
- verify_results_q7(conv_im_out_ref_q7, conv_im_out_opt_q7, CONV_OUT_DIM * CONV_OUT_DIM * CONV_OUT_CH);
-
- delete[]test1;
- delete[]test2;
- delete[]test3;
- delete[]test4;
-
-#endif
-
- test_pass = true;
- test_index = 0;
- while (test_flags[test_index] != -1) {
- if (test_flags[test_index]) {
- test_pass = false;
- }
- test_index ++;
- }
- if (test_pass) {
- printf("All tests passed\n");
- } else {
- printf("Test failed passed\n");
- }
-
- return 0;
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.h b/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.h deleted file mode 100644 index 2e33988..0000000 --- a/hid-dials/Drivers/CMSIS/NN/NN_Lib_Tests/nn_test/arm_nnexamples_nn_test.h +++ /dev/null @@ -1,78 +0,0 @@ -#ifndef _MAIN_H_
-#define _MAIN_H_
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <math.h>
-
-#include "arm_math.h"
-
-#include "arm_nnfunctions.h"
-#include "ref_functions.h"
-
-extern int test_index;
-extern q7_t test_flags[50];
-
-void initialize_results_q7(q7_t * ref, q7_t * opt, int length)
-{
- arm_fill_q7(0, ref, length);
- arm_fill_q7(37, opt, length);
-}
-
-void initialize_results_q15(q15_t * ref, q15_t * opt, int length)
-{
- arm_fill_q15(0, ref, length);
- arm_fill_q15(0x5F5, opt, length);
-}
-
-void verify_results_q7(q7_t * ref, q7_t * opt, int length)
-{
-
- bool if_match = true;
-
- for (int i = 0; i < length; i++)
- {
- if (ref[i] != opt[i])
- {
- printf("Output mismatch at %d, expected %d, actual %d\r\n", i, ref[i], opt[i]);
-
- if_match = false;
- }
- }
-
- if (if_match == true)
- {
- printf("Outputs match.\r\n\r\n");
- test_flags[test_index++] = 0;
- } else {
- test_flags[test_index++] = 1;
- }
-
-}
-
-void verify_results_q15(q15_t * ref, q15_t * opt, int length)
-{
-
- bool if_match = true;
-
- for (int i = 0; i < length; i++)
- {
- if (ref[i] != opt[i])
- {
- printf("Output mismatch at %d, expected %d, actual %d\r\n", i, ref[i], opt[i]);
-
- if_match = false;
- }
- }
-
- if (if_match == true)
- {
- printf("Outputs match.\r\n\r\n");
- test_flags[test_index++] = 0;
- } else {
- test_flags[test_index++] = 1;
- }
-
-}
-
-#endif
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c b/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c deleted file mode 100644 index fd447e5..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q15.c +++ /dev/null @@ -1,101 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nn_activations_q15.c
- * Description: Q15 neural network activation function using direct table look-up
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup Acti
- * @{
- */
-
- /**
- * @brief Q15 neural network activation function using direct table look-up
- * @param[in,out] data pointer to input
- * @param[in] size number of elements
- * @param[in] int_width bit-width of the integer part, assume to be smaller than 3
- * @param[in] type type of activation functions
- * @return none.
- *
- * @details
- *
- * This is the direct table look-up approach.
- *
- * Assume here the integer part of the fixed-point is <= 3.
- * More than 3 just not making much sense, makes no difference with
- * saturation followed by any of these activation functions.
- */
-
-void arm_nn_activations_direct_q15(q15_t * data, uint16_t size, uint16_t int_width, arm_nn_activation_type type)
-{
- uint16_t i = size;
- q15_t *pIn = data;
- q15_t *pOut = data;
- uint16_t shift_size = 8 + 3 - int_width;
- uint32_t bit_mask = 0x7FF >> int_width;
- uint32_t full_frac = bit_mask + 1;
- const q15_t *lookup_table;
-
- switch (type)
- {
- case ARM_SIGMOID:
- lookup_table = sigmoidTable_q15;
- break;
- case ARM_TANH:
- default:
- lookup_table = tanhTable_q15;
- break;
- }
-
- while (i)
- {
- q15_t out;
- q15_t in = *pIn++;
- q15_t frac = (uint32_t) in & bit_mask;
- q15_t value = lookup_table[__USAT(in >> shift_size, 8)];
- q15_t value2 = lookup_table[__USAT(1 + (in >> shift_size), 8)];
-
- /* doing the interpolation here for better accuracy */
- out = ((q31_t) (full_frac - frac) * value + (q31_t) value2 * frac) >> shift_size;
-
- *pOut++ = out;
- i--;
- }
-
-}
-
-/**
- * @} end of Acti group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c b/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c deleted file mode 100644 index 2953bd5..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_nn_activations_q7.c +++ /dev/null @@ -1,91 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nn_activations_q7.c
- * Description: Q7 neural network activation function using direct table look-up
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup Acti
- * @{
- */
-
- /**
- * @brief Q7 neural network activation function using direct table look-up
- * @param[in,out] data pointer to input
- * @param[in] size number of elements
- * @param[in] int_width bit-width of the integer part, assume to be smaller than 3
- * @param[in] type type of activation functions
- * @return none.
- *
- * @details
- *
- * This is the direct table look-up approach.
- *
- * Assume here the integer part of the fixed-point is <= 3.
- * More than 3 just not making much sense, makes no difference with
- * saturation followed by any of these activation functions.
- */
-
-void arm_nn_activations_direct_q7(q7_t * data, uint16_t size, uint16_t int_width, arm_nn_activation_type type)
-{
- uint16_t i = size;
- q7_t *pIn = data;
- q7_t *pOut = data;
- q7_t in;
- q7_t out;
- uint16_t shift_size = 3 - int_width;
- const q7_t *lookup_table;
- switch (type)
- {
- case ARM_SIGMOID:
- lookup_table = sigmoidTable_q7;
- break;
- case ARM_TANH:
- default:
- lookup_table = tanhTable_q7;
- break;
- }
- while (i)
- {
- in = *pIn++;
- out = lookup_table[(uint8_t) (in >> shift_size)];
- *pOut++ = out;
- i--;
- }
-}
-
-/**
- * @} end of Acti group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c b/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c deleted file mode 100644 index 6a1b907..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q15.c +++ /dev/null @@ -1,106 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_relu_q15.c
- * Description: Q15 version of ReLU
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup Acti
- * @{
- */
-
- /**
- * @brief Q15 RELU function
- * @param[in,out] data pointer to input
- * @param[in] size number of elements
- * @return none.
- *
- * @details
- *
- * Optimized relu with QSUB instructions.
- *
- */
-
-void arm_relu_q15(q15_t * data, uint16_t size)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- uint16_t i = size >> 1;
- q15_t *pIn = data;
- q15_t *pOut = data;
- q31_t in;
- q31_t buf;
- q31_t mask;
-
- while (i)
- {
- in = *__SIMD32(pIn)++;
-
- /* extract the first bit */
- buf = __ROR(in & 0x80008000, 15);
-
- /* if MSB=1, mask will be 0xFF, 0x0 otherwise */
- mask = __QSUB16(0x00000000, buf);
-
- *__SIMD32(pOut)++ = in & (~mask);
- i--;
- }
-
- if (size & 0x1)
- {
- if (*pIn < 0)
- {
- *pIn = 0;
- }
- pIn++;
- }
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- uint16_t i;
-
- for (i = 0; i < size; i++)
- {
- if (data[i] < 0)
- data[i] = 0;
- }
-
-#endif /* ARM_MATH_DSP */
-
-}
-
-/**
- * @} end of Acti group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c b/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c deleted file mode 100644 index caa027b..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ActivationFunctions/arm_relu_q7.c +++ /dev/null @@ -1,110 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_relu_q7.c
- * Description: Q7 version of ReLU
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup Acti
- * @{
- */
-
- /**
- * @brief Q7 RELU function
- * @param[in,out] data pointer to input
- * @param[in] size number of elements
- * @return none.
- *
- * @details
- *
- * Optimized relu with QSUB instructions.
- *
- */
-
-void arm_relu_q7(q7_t * data, uint16_t size)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- uint16_t i = size >> 2;
- q7_t *pIn = data;
- q7_t *pOut = data;
- q31_t in;
- q31_t buf;
- q31_t mask;
-
- while (i)
- {
- in = *__SIMD32(pIn)++;
-
- /* extract the first bit */
- buf = __ROR(in & 0x80808080, 7);
-
- /* if MSB=1, mask will be 0xFF, 0x0 otherwise */
- mask = __QSUB8(0x00000000, buf);
-
- *__SIMD32(pOut)++ = in & (~mask);
- i--;
- }
-
- i = size & 0x3;
- while (i)
- {
- if (*pIn < 0)
- {
- *pIn = 0;
- }
- pIn++;
- i--;
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
-
- uint16_t i;
-
- for (i = 0; i < size; i++)
- {
- if (data[i] < 0)
- data[i] = 0;
- }
-
-#endif /* ARM_MATH_DSP */
-
-}
-
-/**
- * @} end of Acti group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c deleted file mode 100644 index 4c69e7c..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_1x1_HWC_q7_fast_nonsquare.c +++ /dev/null @@ -1,235 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_convolve_1x1_HWC_q7_fast_nonsquare.c
- * Description: Fast Q7 version of 1x1 convolution (non-square shape)
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
-/**
- * @brief Fast Q7 version of 1x1 convolution (non-sqaure shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding size x
- * @param[in] padding_y padding size y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This function is optimized for convolution with 1x1 kernel size (i.e., dim_kernel_x=1
- * and dim_kernel_y=1). It can be used for the second half of MobileNets [1] after depthwise
- * separable convolution.
- *
- * This function is the version with full list of optimization tricks, but with
- * some contraints:
- * ch_im_in is multiple of 4
- * ch_im_out is multiple of 2
- *
- * [1] MobileNets: Efficient Convolutional Neural Networks for Mobile Vision Applications
- * https://arxiv.org/abs/1704.04861
- */
-
-arm_status arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- int16_t i_out_y, i_out_x;
- int16_t i_ch_out;
-
- /* -----------------------
- * Here we use bufferA as q15_t internally as computation are done with q15_t level
- * im2col are done to output in q15_t format from q7_t input
- */
-
- q15_t *pBuffer = bufferA;
- q7_t *pOut = Im_out;
-
- if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0 || dim_kernel_x != 1 || dim_kernel_y != 1
- || padding_x != 0 || padding_y != 0 || stride_x != 1 || stride_y != 1)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
- {
- /* This part implements the im2col function */
- arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_out_y * dim_im_in_x + i_out_x) * ch_im_in, pBuffer,
- ch_im_in);
- pBuffer += ch_im_in;
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in, bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- /* check if there is left-over for compute */
- if (pBuffer != bufferA)
- {
- const q7_t *pA = wt;
- for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
- {
- q31_t sum = ((q31_t)(bias[i_ch_out]) << bias_shift) + NN_ROUND(out_shift);
- q15_t *pB = bufferA;
- /* basically each time it process 4 entries */
- uint16_t colCnt = ch_im_in * dim_kernel_x * dim_kernel_y >> 2;
-
- while (colCnt)
- {
-
- q31_t inA1, inA2;
- q31_t inB1, inB2;
-
- pA = (const q7_t *)read_and_pad_reordered((void *)pA, &inA1, &inA2);
-
- inB1 = *__SIMD32(pB)++;
- sum = __SMLAD(inA1, inB1, sum);
- inB2 = *__SIMD32(pB)++;
- sum = __SMLAD(inA2, inB2, sum);
-
- colCnt--;
- }
- colCnt = ch_im_in * dim_kernel_y * dim_kernel_x & 0x3;
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- sum += inA1 * inB1;
- colCnt--;
- }
- *pOut = (q7_t) __SSAT((sum >> out_shift), 8);
- pOut++;
-
- }
-
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
-
- int i, j, k, l, m, n;
- int conv_out;
- int in_row, in_col;
-
- if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0 || dim_kernel_x != 1 || dim_kernel_y != 1
- || padding_x != 0 || padding_y != 0 || stride_x != 1 || stride_y != 1)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out_y; j++)
- {
- for (k = 0; k < dim_im_out_x; k++)
- {
- conv_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
- for (m = 0; m < dim_kernel_y; m++)
- {
- for (n = 0; n < dim_kernel_x; n++)
- {
- // if-for implementation
- in_row = stride_y * j + m - padding_y;
- in_col = stride_x * k + n - padding_x;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
- wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_y + n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c deleted file mode 100644 index ee08d74..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_basic.c +++ /dev/null @@ -1,207 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_convolve_HWC_q15_basic.c
- * Description: Q15 version of convolution
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
- /**
- * @brief Basic Q15 convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: ch_im_in*dim_kernel*dim_kernel
- *
- * bufferB size: 0
- *
- * This basic version is designed to work for any input tensor and weight
- * dimension.
- */
-
-arm_status
-arm_convolve_HWC_q15_basic(const q15_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q15_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q15_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q15_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
-
- uint16_t im2col_out_pixel_index = 0;
- q15_t *pBuffer = bufferA;
- q15_t *pOut = Im_out;
- q15_t *im_buffer = bufferA;
- const q15_t *pA;
- int i;
-
- /* This part implements the im2col function */
- for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
- {
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
- {
- /* Filling 0 for out-of-bound paddings */
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- /* arm_copy_q15((q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); */
- memcpy(pBuffer, (q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, sizeof(q15_t)*ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- pA = wt;
- for (i = 0; i < ch_im_out; i++)
- {
- q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- q15_t *pB = im_buffer;
- uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 2;
- while (colCnt)
- {
- q31_t inA1 = *__SIMD32(pA)++;
- q31_t inB1 = *__SIMD32(pB)++;
- q31_t inA2 = *__SIMD32(pA)++;
- q31_t inB2 = *__SIMD32(pB)++;
-
- sum = __SMLAD(inA1, inB1, sum);
- sum = __SMLAD(inA2, inB2, sum);
-
- colCnt--;
- }
- colCnt = ch_im_in * dim_kernel * dim_kernel & 0x3;
- while (colCnt)
- {
- q15_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- sum += inA1 * inB1;
- colCnt--;
- }
- *pOut = (q15_t) __SSAT((sum >> out_shift), 16);
- pOut++;
- }
-
- /* counter reset */
- pBuffer = im_buffer;
- im2col_out_pixel_index++;
- }
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- uint16_t i, j, k, l, m, n;
- int conv_out;
- signed char in_row, in_col;
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out; j++)
- {
- for (k = 0; k < dim_im_out; k++)
- {
- conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- for (m = 0; m < dim_kernel; m++)
- {
- for (n = 0; n < dim_kernel; n++)
- {
- in_row = stride * j + m - padding;
- in_col = stride * k + n - padding;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out +=
- Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
- l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
- n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c deleted file mode 100644 index a02aaa0..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast.c +++ /dev/null @@ -1,255 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_convolve_HWC_q15_fast.c
- * Description: Fast Q15 version of convolution
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
- /**
- * @brief Fast Q15 convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
- *
- * bufferB size: 0
- *
- * <b>Input dimension constraints:</b>
- *
- * ch_im_in is multiple of 2
- *
- * ch_im_out is multipe of 2
- *
- */
-
-arm_status
-arm_convolve_HWC_q15_fast(const q15_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q15_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q15_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q15_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
-
- q15_t *pBuffer = bufferA;
- q15_t *im_buffer = bufferA;
- q15_t *pOut = Im_out;
-
- if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- /* This part implements the im2col function */
- for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
- {
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- /* arm_copy_q15((q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); */
- memcpy(pBuffer, (q15_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, sizeof(q15_t)*ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (i_out_x & 0x1)
- {
- int i;
- /* initialize the matrix pointers for A */
- const q15_t *pA = wt;
-
- /* set up the second output pointers */
- q15_t *pOut2 = pOut + ch_im_out;
-
- /* this loop over rows in A */
- for (i = 0; i < ch_im_out; i += 2)
- {
- /* setup pointers for B */
- q15_t *pB = im_buffer;
- const q15_t *pB2 = pB + ch_im_in * dim_kernel * dim_kernel;
-
- /* aling the second pointer for A */
- const q15_t *pA2 = pA + ch_im_in * dim_kernel * dim_kernel;
-
- /* init the sum with bias */
- q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 1;
- /* accumulate over the vector */
- while (colCnt)
- {
- q31_t inA1 = *__SIMD32(pA)++;
- q31_t inB1 = *__SIMD32(pB)++;
- q31_t inA2 = *__SIMD32(pA2)++;
- q31_t inB2 = *__SIMD32(pB2)++;
-
- sum = __SMLAD(inA1, inB1, sum);
- sum2 = __SMLAD(inA1, inB2, sum2);
- sum3 = __SMLAD(inA2, inB1, sum3);
- sum4 = __SMLAD(inA2, inB2, sum4);
-
- colCnt--;
- } /* while over colCnt */
- colCnt = ch_im_in * dim_kernel * dim_kernel & 0x1;
- while (colCnt)
- {
- q15_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- q15_t inA2 = *pA2++;
- q15_t inB2 = *pB2++;
-
- sum += inA1 * inB1;
- sum2 += inA1 * inB2;
- sum3 += inA2 * inB1;
- sum4 += inA2 * inB2;
- colCnt--;
- } /* while over colCnt */
- *pOut++ = (q15_t) __SSAT(sum >> out_shift, 16);
- *pOut++ = (q15_t) __SSAT(sum3 >> out_shift, 16);
- *pOut2++ = (q15_t) __SSAT(sum2 >> out_shift, 16);
- *pOut2++ = (q15_t) __SSAT(sum4 >> out_shift, 16);
-
- /* skip the row computed with A2 */
- pA += ch_im_in * dim_kernel * dim_kernel;
- } /* for over ch_im_out */
-
- pOut += ch_im_out;
- /* counter reset */
- pBuffer = im_buffer;
- }
- }
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- uint16_t i, j, k, l, m, n;
- int conv_out;
- signed char in_row, in_col;
-
- if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out; j++)
- {
- for (k = 0; k < dim_im_out; k++)
- {
- conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- for (m = 0; m < dim_kernel; m++)
- {
- for (n = 0; n < dim_kernel; n++)
- {
- in_row = stride * j + m - padding;
- in_col = stride * k + n - padding;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out +=
- Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
- l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
- n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c deleted file mode 100644 index 14d9130..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q15_fast_nonsquare.c +++ /dev/null @@ -1,265 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_convolve_HWC_q15_fast.c
- * Description: Fast Q15 version of convolution
- *
- * $Date: 24. May 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
- /**
- * @brief Fast Q15 convolution function (non-sqaure shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding size x
- * @param[in] padding_y padding size y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
- *
- * bufferB size: 0
- *
- * <b>Input dimension constraints:</b>
- *
- * ch_im_in is multiple of 2
- *
- * ch_im_out is multipe of 2
- *
- */
-
-arm_status
-arm_convolve_HWC_q15_fast_nonsquare(const q15_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q15_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q15_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q15_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
-
- q15_t *pBuffer = bufferA;
- q15_t *im_buffer = bufferA;
- q15_t *pOut = Im_out;
-
- if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- /* This part implements the im2col function */
- for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
- {
- for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x; i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- /* arm_copy_q15((q15_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, ch_im_in); */
- memcpy(pBuffer, (q15_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, sizeof(q15_t)*ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (i_out_x & 0x1)
- {
- int i;
- /* initialize the matrix pointers for A */
- const q15_t *pA = wt;
-
- /* set up the second output pointers */
- q15_t *pOut2 = pOut + ch_im_out;
-
- /* this loop over rows in A */
- for (i = 0; i < ch_im_out; i += 2)
- {
- /* setup pointers for B */
- q15_t *pB = im_buffer;
- const q15_t *pB2 = pB + ch_im_in * dim_kernel_y * dim_kernel_x;
-
- /* aling the second pointer for A */
- const q15_t *pA2 = pA + ch_im_in * dim_kernel_y * dim_kernel_x;
-
- /* init the sum with bias */
- q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)bias[i + 1] << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = ch_im_in * dim_kernel_y * dim_kernel_x >> 1;
- /* accumulate over the vector */
- while (colCnt)
- {
- q31_t inA1 = *__SIMD32(pA)++;
- q31_t inB1 = *__SIMD32(pB)++;
- q31_t inA2 = *__SIMD32(pA2)++;
- q31_t inB2 = *__SIMD32(pB2)++;
-
- sum = __SMLAD(inA1, inB1, sum);
- sum2 = __SMLAD(inA1, inB2, sum2);
- sum3 = __SMLAD(inA2, inB1, sum3);
- sum4 = __SMLAD(inA2, inB2, sum4);
-
- colCnt--;
- } /* while over colCnt */
- colCnt = ch_im_in * dim_kernel_y * dim_kernel_x & 0x1;
- while (colCnt)
- {
- q15_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- q15_t inA2 = *pA2++;
- q15_t inB2 = *pB2++;
-
- sum += inA1 * inB1;
- sum2 += inA1 * inB2;
- sum3 += inA2 * inB1;
- sum4 += inA2 * inB2;
- colCnt--;
- } /* while over colCnt */
- *pOut++ = (q15_t) __SSAT(sum >> out_shift, 16);
- *pOut++ = (q15_t) __SSAT(sum3 >> out_shift, 16);
- *pOut2++ = (q15_t) __SSAT(sum2 >> out_shift, 16);
- *pOut2++ = (q15_t) __SSAT(sum4 >> out_shift, 16);
-
- /* skip the row computed with A2 */
- pA += ch_im_in * dim_kernel_y * dim_kernel_x;
- } /* for over ch_im_out */
-
- pOut += ch_im_out;
- /* counter reset */
- pBuffer = im_buffer;
- }
- }
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- uint16_t i, j, k, l, m, n;
- int conv_out;
- signed char in_row, in_col;
-
- if (ch_im_in % 2 != 0 || ch_im_out % 2 != 0)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out_y; j++)
- {
- for (k = 0; k < dim_im_out_x; k++)
- {
- conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- for (m = 0; m < dim_kernel_y; m++)
- {
- for (n = 0; n < dim_kernel_x; n++)
- {
- in_row = stride_y * j + m - padding_y;
- in_col = stride_x * k + n - padding_x;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out +=
- Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in +
- l] * wt[i * ch_im_in * dim_kernel_x * dim_kernel_y + (m * dim_kernel_x +
- n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q15_t) __SSAT((conv_out >> out_shift), 16);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c deleted file mode 100644 index e53c6f9..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_RGB.c +++ /dev/null @@ -1,279 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_convolve_HWC_q7_RGB.c
- * Description: Q7 version of convolution for RGB image
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
- /**
- * @brief Q7 convolution function for RGB image
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
- *
- * bufferB size: 0
- *
- * <b>Input dimension constraints:</b>
- *
- * ch_im_in equals 3
- *
- * This kernel is written exclusively for convolution with ch_im_in
- * equals 3. This applies on the first layer of CNNs which has input
- * image with RGB format.
- */
-
-arm_status
-arm_convolve_HWC_q7_RGB(const q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out, const uint16_t dim_im_out, q15_t * bufferA, q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
- int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
-
- /*
- * Here we use bufferA as q15_t internally as computation are done with q15_t level
- * im2col are done to output in q15_t format from q7_t input
- */
- q15_t *pBuffer = bufferA;
- q7_t *pOut = Im_out;
-
- // check if number of input channels is 3
- if (ch_im_in != 3)
- {
- return ARM_MATH_SIZE_MISMATCH;
- }
- // This part implements the im2col function
- for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
- {
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
- {
- /* Equivalent to arm_fill_q15(0, pBuffer, ch_im_in) with assumption: ch_im_in = 3 */
- *__SIMD32(pBuffer) = 0x0;
- *(pBuffer + 2) = 0;
- pBuffer += 3;
- } else
- {
- /*
- * Equivalent to:
- * arm_q7_to_q15_no_shift( (q7_t*)Im_in+(i_ker_y*dim_im_in+i_ker_x)*3, pBuffer, 3);
- */
-
- const q7_t *pPixel = Im_in + (i_ker_y * dim_im_in + i_ker_x) * 3;
- q31_t buf = *__SIMD32(pPixel);
-
- union arm_nnword top;
- union arm_nnword bottom;
-
- top.word = __SXTB16(buf);
- bottom.word = __SXTB16(__ROR(buf, 8));
-
-#ifndef ARM_MATH_BIG_ENDIAN
- /*
- * little-endian, | omit | 3rd | 2nd | 1st |
- * MSB LSB
- * top | 3rd | 1st |; bottom | omit | 2nd |
- *
- * version 1, need to swap 2nd and 3rd weight
- * *__SIMD32(pBuffer) = top.word;
- * *(pBuffer+2) = bottom.half_words[0];
- *
- * version 2, no weight shuffling required
- */
- *pBuffer++ = top.half_words[0];
- *__SIMD32(pBuffer) = __PKHBT(bottom.word, top.word, 0);
-#else
- /*
- * big-endian, | 1st | 2nd | 3rd | omit |
- * MSB LSB
- * top | 2nd | omit |; bottom | 1st | 3rd |
- *
- * version 1, need to swap 2nd and 3rd weight
- * *__SIMD32(pBuffer) = bottom.word;
- * *(pBuffer+2) = top.half_words[1];
- *
- * version 2, no weight shuffling required
- */
- *pBuffer++ = bottom.half_words[0];
- *__SIMD32(pBuffer) = __PKHTB(top.word, bottom.word, 0);
-#endif
- pBuffer += 2;
- }
- }
- }
-
- if (pBuffer == bufferA + 2 * 3 * dim_kernel * dim_kernel)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15(wt, bufferA,
- ch_im_out,
- 3 * dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
-
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- /* left-over because odd number of output pixels */
- if (pBuffer != bufferA)
- {
- const q7_t *pA = wt;
- int i;
-
- for (i = 0; i < ch_im_out; i++)
- {
- q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- q15_t *pB = bufferA;
- /* basically each time it process 4 entries */
- uint16_t colCnt = 3 * dim_kernel * dim_kernel >> 2;
-
- while (colCnt)
- {
-
- q31_t inA1, inA2;
- q31_t inB1, inB2;
-
- pA = (q7_t *) read_and_pad((void *)pA, &inA1, &inA2);
-
- inB1 = *__SIMD32(pB)++;
- sum = __SMLAD(inA1, inB1, sum);
- inB2 = *__SIMD32(pB)++;
- sum = __SMLAD(inA2, inB2, sum);
-
- colCnt--;
- }
- colCnt = 3 * dim_kernel * dim_kernel & 0x3;
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- sum += inA1 * inB1;
- colCnt--;
- }
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- }
- }
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
-
- uint16_t i, j, k, l, m, n;
- int conv_out;
- signed char in_row, in_col;
-
- // check if number of input channels is 3
- if (ch_im_in != 3)
- {
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out; j++)
- {
- for (k = 0; k < dim_im_out; k++)
- {
- conv_out = (bias[i] << bias_shift) + NN_ROUND(out_shift);
- for (m = 0; m < dim_kernel; m++)
- {
- for (n = 0; n < dim_kernel; n++)
- {
- /* if-for implementation */
- in_row = stride * j + m - padding;
- in_col = stride * k + n - padding;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out +=
- Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
- l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
- n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return (ARM_MATH_SUCCESS);
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c deleted file mode 100644 index 7c9ec65..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic.c +++ /dev/null @@ -1,230 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_convolve_HWC_q7_basic.c
- * Description: Q7 version of convolution
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
- /**
- * @brief Basic Q7 convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
- *
- * bufferB size: 0
- *
- * This basic version is designed to work for any input tensor and weight
- * dimension.
- */
-
-arm_status
-arm_convolve_HWC_q7_basic(const q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
-
- /*
- * Here we use bufferA as q15_t internally as computation are done with q15_t level
- * im2col are done to output in q15_t format from q7_t input
- */
- q15_t *pBuffer = bufferA;
- q7_t *pOut = Im_out;
-
- /* This part implements the im2col function */
- for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
- {
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
- {
- /* Filling 0 for out-of-bound paddings */
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- /* Copying the pixel data to column */
- arm_q7_to_q15_no_shift((q7_t *)
- Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- /* Computation is filed for every 2 columns */
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15(wt, bufferA,
- ch_im_out,
- ch_im_in *
- dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
-
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- /* left-over because odd number of output pixels */
- if (pBuffer != bufferA)
- {
- const q7_t *pA = wt;
- int i;
-
- for (i = 0; i < ch_im_out; i++)
- {
- /* Load the accumulator with bias first */
- q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
-
- /* Point to the beging of the im2col buffer */
- q15_t *pB = bufferA;
-
- /* Each time it process 4 entries */
- uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 2;
-
- while (colCnt)
- {
- q31_t inA1, inA2;
- q31_t inB1, inB2;
-
- pA = (q7_t *) read_and_pad((void *)pA, &inA1, &inA2);
-
- inB1 = *__SIMD32(pB)++;
- sum = __SMLAD(inA1, inB1, sum);
- inB2 = *__SIMD32(pB)++;
- sum = __SMLAD(inA2, inB2, sum);
-
- colCnt--;
- }
- colCnt = ch_im_in * dim_kernel * dim_kernel & 0x3;
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- sum += inA1 * inB1;
- colCnt--;
- }
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- }
- }
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
-
- uint16_t i, j, k, l, m, n;
- int conv_out;
- signed char in_row, in_col;
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out; j++)
- {
- for (k = 0; k < dim_im_out; k++)
- {
- conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- for (m = 0; m < dim_kernel; m++)
- {
- for (n = 0; n < dim_kernel; n++)
- {
- // if-for implementation
- in_row = stride * j + m - padding;
- in_col = stride * k + n - padding;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out +=
- Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
- l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
- n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c deleted file mode 100644 index 24356d9..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_basic_nonsquare.c +++ /dev/null @@ -1,228 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_convolve_HWC_q7_basic.c
- * Description: Q7 version of convolution
- *
- * $Date: 13. July 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
- /**
- * @brief Basic Q7 convolution function (non-sqaure shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding size x
- * @param[in] padding_y padding size y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- */
-
-arm_status arm_convolve_HWC_q7_basic_nonsquare(const q7_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
-
- /*
- * Here we use bufferA as q15_t internally as computation are done with q15_t level
- * im2col are done to output in q15_t format from q7_t input
- */
- q15_t *pBuffer = bufferA;
- q7_t *pOut = Im_out;
-
- /* This part implements the im2col function */
- for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
- {
- for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x; i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
- {
- /* Filling 0 for out-of-bound paddings */
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- /* Copying the pixel data to column */
- arm_q7_to_q15_no_shift((q7_t *)
- Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- /* Computation is filed for every 2 columns */
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_y * dim_kernel_x)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15(wt, bufferA,
- ch_im_out,
- ch_im_in *
- dim_kernel_y * dim_kernel_x, bias_shift, out_shift, bias, pOut);
-
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- /* left-over because odd number of output pixels */
- if (pBuffer != bufferA)
- {
- const q7_t *pA = wt;
- int i;
-
- for (i = 0; i < ch_im_out; i++)
- {
- /* Load the accumulator with bias first */
- q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
-
- /* Point to the beging of the im2col buffer */
- q15_t *pB = bufferA;
-
- /* Each time it process 4 entries */
- uint16_t colCnt = ch_im_in * dim_kernel_y * dim_kernel_x >> 2;
-
- while (colCnt)
- {
- q31_t inA1, inA2;
- q31_t inB1, inB2;
-
- pA = (q7_t *) read_and_pad((void *)pA, &inA1, &inA2);
-
- inB1 = *__SIMD32(pB)++;
- sum = __SMLAD(inA1, inB1, sum);
- inB2 = *__SIMD32(pB)++;
- sum = __SMLAD(inA2, inB2, sum);
-
- colCnt--;
- }
- colCnt = ch_im_in * dim_kernel_y * dim_kernel_x & 0x3;
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- sum += inA1 * inB1;
- colCnt--;
- }
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- }
- }
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
-
- uint16_t i, j, k, l, m, n;
- int conv_out;
- signed char in_row, in_col;
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out_y; j++)
- {
- for (k = 0; k < dim_im_out_x; k++)
- {
- conv_out = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- for (m = 0; m < dim_kernel_y; m++)
- {
- for (n = 0; n < dim_kernel_x; n++)
- {
- // if-for implementation
- in_row = stride_y * j + m - padding_y;
- in_col = stride_x * k + n - padding_x;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out +=
- Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
- wt[i * ch_im_in * dim_kernel_y * dim_kernel_x +
- (m * dim_kernel_x + n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c deleted file mode 100644 index e2d469f..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast.c +++ /dev/null @@ -1,408 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_convolve_HWC_q7_fast.c
- * Description: Fast Q7 version of convolution
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
- /**
- * @brief Fast Q7 convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
- *
- * bufferB size: 0
- *
- * <b>Input dimension constraints:</b>
- *
- * ch_im_in is multiple of 4 ( because of the SIMD32 read and swap )
- *
- * ch_im_out is multipe of 2 ( bacause 2x2 mat_mult kernel )
- *
- * The im2col converts the Q7 tensor input into Q15 column, which is stored in
- * bufferA. There is reordering happenning during this im2col process with
- * arm_q7_to_q15_reordered_no_shift. For every four elements, the second and
- * third elements are swapped.
- *
- * The computation kernel arm_nn_mat_mult_kernel_q7_q15_reordered does the
- * GEMM computation with the reordered columns.
- *
- * To speed-up the determination of the padding condition, we split the
- * computation into 3x3 parts, i.e., {top, mid, bottom} X {left, mid, right}.
- * This reduces the total number of boundary condition checks and improves
- * the data copying performance.
- */
-
-arm_status
-arm_convolve_HWC_q7_fast(const q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
-
- /*
- * Here we use bufferA as q15_t internally as computation are done with q15_t level
- * im2col are done to output in q15_t format from q7_t input
- */
-
- q15_t *pBuffer = bufferA;
- q7_t *pOut = Im_out;
-
- if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- /*
- * Here we split the entire matrix into three regions depending on the padding situation
- * Top: i_out_y from 0 to padding - 1
- * Middle: i_out_y from padding to dim_im_out-padding-1
- * Bottom: i_out_y from dim_im_out-padding to dim_im_out-1
- */
-
- /* top part */
- for (i_out_y = 0; i_out_y < padding; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- arm_q7_to_q15_reordered_no_shift
- ((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
- bufferA,
- ch_im_out,
- ch_im_in
- *
- dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- /* middle part, here we also divide the x into left, mid and right */
- for (; i_out_y < dim_im_out - padding; i_out_y++)
- {
-
- /* left part */
- for (i_out_x = 0; i_out_x < padding; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
- {
- if (i_ker_x < 0 || i_ker_x >= dim_im_in)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- arm_q7_to_q15_reordered_no_shift
- ((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
- bufferA,
- ch_im_out,
- ch_im_in
- *
- dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
-
- /* mid part */
- for (; i_out_x < dim_im_out - padding; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in
- +
- (i_ker_y *
- dim_im_in +
- i_out_x *
- stride - padding) * ch_im_in, pBuffer, ch_im_in * dim_kernel);
- pBuffer += ch_im_in * dim_kernel;
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
- bufferA,
- ch_im_out,
- ch_im_in
- *
- dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
-
- /* right part */
- for (; i_out_x < dim_im_out; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
- {
- if (i_ker_x < 0 || i_ker_x >= dim_im_in)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- arm_q7_to_q15_reordered_no_shift
- ((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
- bufferA,
- ch_im_out,
- ch_im_in
- *
- dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- for (; i_out_y < dim_im_out; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- arm_q7_to_q15_reordered_no_shift
- ((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel * dim_kernel)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt,
- bufferA,
- ch_im_out,
- ch_im_in
- *
- dim_kernel * dim_kernel, bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- /* check if there is left-over for compute */
- if (pBuffer != bufferA)
- {
- const q7_t *pA = wt;
- int i;
-
- for (i = 0; i < ch_im_out; i++)
- {
- q31_t sum = ((q31_t)bias[i] << bias_shift) + NN_ROUND(out_shift);
- q15_t *pB = bufferA;
- /* each time it process 4 entries */
- uint16_t colCnt = ch_im_in * dim_kernel * dim_kernel >> 2;
-
- while (colCnt)
- {
-
- q31_t inA1, inA2;
- q31_t inB1, inB2;
-
- pA = (q7_t *) read_and_pad_reordered((void *)pA, &inA1, &inA2);
-
- inB1 = *__SIMD32(pB)++;
- sum = __SMLAD(inA1, inB1, sum);
- inB2 = *__SIMD32(pB)++;
- sum = __SMLAD(inA2, inB2, sum);
-
- colCnt--;
- }
- colCnt = ch_im_in * dim_kernel * dim_kernel & 0x3;
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- sum += inA1 * inB1;
- colCnt--;
- }
- *pOut = (q7_t) __SSAT((sum >> out_shift), 8);
- pOut++;
-
- }
-
- }
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
-
- uint16_t i, j, k, l, m, n;
- int conv_out;
- signed char in_row, in_col;
-
- if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out; j++)
- {
- for (k = 0; k < dim_im_out; k++)
- {
- conv_out = (bias[i] << bias_shift) + NN_ROUND(out_shift);
- for (m = 0; m < dim_kernel; m++)
- {
- for (n = 0; n < dim_kernel; n++)
- {
- // if-for implementation
- in_row = stride * j + m - padding;
- in_col = stride * k + n - padding;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out +=
- Im_in[(in_row * dim_im_in + in_col) * ch_im_in +
- l] * wt[i * ch_im_in * dim_kernel * dim_kernel + (m * dim_kernel +
- n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c deleted file mode 100644 index 6dc6f0b..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_convolve_HWC_q7_fast_nonsquare.c +++ /dev/null @@ -1,379 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_convolve_HWC_q7_fast_nonsquare.c
- * Description: Fast Q7 version of convolution (non-sqaure shape)
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
-/**
- * @brief Fast Q7 convolution function (non-sqaure shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding size x
- * @param[in] padding_y padding size y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This function is the version with full list of optimization tricks, but with
- * some contraints:
- * ch_im_in is multiple of 4
- * ch_im_out is multiple of 2
- */
-
-arm_status arm_convolve_HWC_q7_fast_nonsquare(const q7_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- int16_t i_out_y, i_out_x, i_ker_y, i_ker_x;
-
- /* -----------------------
- * Here we use bufferA as q15_t internally as computation are done with q15_t level
- * im2col are done to output in q15_t format from q7_t input
- */
-
- q15_t *pBuffer = bufferA;
- q7_t *pOut = Im_out;
-
- if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- /*
- * Here we split the entire matrix into three regions depending on the padding situation
- * Top: i_out_y from 0 to padding - 1
- * Middle: i_out_y from padding to dim_im_out-padding-1
- * Bottom: i_out_y from dim_im_out-padding to dim_im_out-1
- */
-
- /* top part */
- for (i_out_y = 0; i_out_y < padding_y; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
- i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
- i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
- pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
- bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- /* middle part, here we also divide the x into left, mid and right */
- for (; i_out_y < dim_im_out_y - padding_y; i_out_y++)
- {
-
- /* left part */
- for (i_out_x = 0; i_out_x < padding_x; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
- i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
- i_ker_x++)
- {
- if (i_ker_x < 0 || i_ker_x >= dim_im_in_x)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
- pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
- bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
-
- /* mid part */
- for (; i_out_x < dim_im_out_x - padding_x; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
- i_ker_y++)
- {
- arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in +
- (i_ker_y * dim_im_in_x + i_out_x * stride_x - padding_x) * ch_im_in,
- pBuffer, ch_im_in * dim_kernel_x);
- pBuffer += ch_im_in * dim_kernel_x;
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
- bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
-
- /* right part */
- for (; i_out_x < dim_im_out_x; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
- i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
- i_ker_x++)
- {
- if (i_ker_x < 0 || i_ker_x >= dim_im_in_x)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
- pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
- bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- for (; i_out_y < dim_im_out_y; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
- {
- /* This part implements the im2col function */
- for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
- i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
- i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
- {
- /* arm_fill_q15(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, sizeof(q15_t)*ch_im_in);
- } else
- {
- arm_q7_to_q15_reordered_no_shift((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in,
- pBuffer, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- if (pBuffer == bufferA + 2 * ch_im_in * dim_kernel_x * dim_kernel_y)
- {
- pOut =
- arm_nn_mat_mult_kernel_q7_q15_reordered(wt, bufferA, ch_im_out, ch_im_in * dim_kernel_x * dim_kernel_y,
- bias_shift, out_shift, bias, pOut);
- /* counter reset */
- pBuffer = bufferA;
- }
- }
- }
-
- /* check if there is left-over for compute */
- if (pBuffer != bufferA)
- {
- const q7_t *pA = wt;
- int i;
- for (i = 0; i < ch_im_out; i++)
- {
- q31_t sum = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
- q15_t *pB = bufferA;
- /* basically each time it process 4 entries */
- uint16_t colCnt = ch_im_in * dim_kernel_x * dim_kernel_y >> 2;
-
- while (colCnt)
- {
-
- q31_t inA1, inA2;
- q31_t inB1, inB2;
-
- pA = (const q7_t *)read_and_pad_reordered((void *)pA, &inA1, &inA2);
-
- inB1 = *__SIMD32(pB)++;
- sum = __SMLAD(inA1, inB1, sum);
- inB2 = *__SIMD32(pB)++;
- sum = __SMLAD(inA2, inB2, sum);
-
- colCnt--;
- }
- colCnt = (ch_im_in * dim_kernel_y * dim_kernel_x) & 0x3;
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- sum += inA1 * inB1;
- colCnt--;
- }
- *pOut = (q7_t) __SSAT((sum >> out_shift), 8);
- pOut++;
-
- }
-
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- int i, j, k, l, m, n;
- int conv_out;
- int in_row, in_col;
-
- if (ch_im_in % 4 != 0 || ch_im_out % 2 != 0)
- {
- /* check if the input dimension meets the constraints */
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i = 0; i < ch_im_out; i++)
- {
- for (j = 0; j < dim_im_out_y; j++)
- {
- for (k = 0; k < dim_im_out_x; k++)
- {
- conv_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
- for (m = 0; m < dim_kernel_y; m++)
- {
- for (n = 0; n < dim_kernel_x; n++)
- {
- /* if-for implementation */
- in_row = stride_y * j + m - padding_y;
- in_col = stride_x * k + n - padding_x;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
- {
- for (l = 0; l < ch_im_in; l++)
- {
- conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + l] *
- wt[i * ch_im_in * dim_kernel_y * dim_kernel_x + (m * dim_kernel_x + n) * ch_im_in + l];
- }
- }
- }
- }
- Im_out[i + (j * dim_im_out_x + k) * ch_im_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c deleted file mode 100644 index 705fa6a..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7.c +++ /dev/null @@ -1,418 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_depthwise_separable_conv_HWC_q7.c
- * Description: Q7 depthwise separable convolution function
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
-/**
- * @brief Q7 depthwise separable convolution function
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: 2*ch_im_in*dim_kernel*dim_kernel
- *
- * bufferB size: 0
- *
- * <b>Input dimension constraints:</b>
- *
- * ch_im_in equals ch_im_out
- *
- * Implementation:
- * There are 3 nested loop here:
- * Inner loop: calculate each output value with MAC instruction over an accumulator
- * Mid loop: loop over different output channel
- * Outer loop: loop over different output (x, y)
- */
-
-arm_status arm_depthwise_separable_conv_HWC_q7(const q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- int16_t i_out_y, i_out_x;
- int16_t i_ker_y, i_ker_x;
- q7_t *colBuffer = (q7_t *) bufferA;
- q7_t *pBuffer = colBuffer;
- const q7_t *pBias = bias;
- q7_t *pOut = Im_out;
- uint16_t rowCnt;
- uint16_t row_shift;
-
- /* do some checking here, basically ch_im_in == ch_im_out */
- if (ch_im_in != ch_im_out)
- {
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
- {
- /* we first do im2col here */
- for (i_ker_y = i_out_y * stride - padding; i_ker_y < i_out_y * stride - padding + dim_kernel; i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride - padding; i_ker_x < i_out_x * stride - padding + dim_kernel; i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in || i_ker_x < 0 || i_ker_x >= dim_im_in)
- {
- /* arm_fill_q7(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, ch_im_in);
- } else
- {
- /* arm_copy_q7((q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, pBuffer, ch_im_in); */
- memcpy(pBuffer, (q7_t *) Im_in + (i_ker_y * dim_im_in + i_ker_x) * ch_im_in, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- /* we will do the computation here for each channel */
- rowCnt = ch_im_out >> 2;
- row_shift = 0;
- pBias = bias;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = (dim_kernel * dim_kernel) >> 1;
- q7_t *pB = colBuffer + row_shift;
- const q7_t *pA = wt + row_shift;
- row_shift += 4;
-
-#ifdef USE_INTRINSIC
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- while (colCnt)
- {
- q31_t inA1, inA2, inB1, inB2, opA, opB;
-
- inB1 = *__SIMD32(pB);
- pB += ch_im_in;
- opB = *__SIMD32(pB);
- pB += ch_im_in;
- inB2 = __PKHTB(opB, inB1, 16);
- inB1 = __PKHBT(inB1, opB, 16);
- inA1 = *__SIMD32(pA);
- pA += ch_im_in;
- opB = *__SIMD32(pA);
- pA += ch_im_in;
- inA2 = __PKHTB(opB, inA1, 16);
- inA1 = __PKHBT(inA1, opB, 16);
- opA = __SXTB16(inA1);
- opB = __SXTB16(inB1);
- sum = __SMLAD(opA, opB, sum);
- opA = __SXTB16(__ROR(inA1, 8));
- opB = __SXTB16(__ROR(inB1, 8));
- sum2 = __SMLAD(opA, opB, sum2);
- opA = __SXTB16(inA2);
- opB = __SXTB16(inB2);
- sum3 = __SMLAD(opA, opB, sum3);
- opA = __SXTB16(__ROR(inA2, 8));
- opB = __SXTB16(__ROR(inB2, 8));
- sum4 = __SMLAD(opA, opB, sum4);
- colCnt--;
- }
-#else
-
- while (colCnt)
- {
- q31_t inA1, inA2, inB1, inB2, opA, opB;
-
- inB1 = *__SIMD32(pB);
- pB += ch_im_in;
- opB = *__SIMD32(pB);
- pB += ch_im_in;
- inB2 = __PKHBT(opB, inB1, 16);
- inB1 = __PKHTB(inB1, opB, 16);
- inA1 = *__SIMD32(pA);
- pA += ch_im_in;
- opB = *__SIMD32(pA);
- pA += ch_im_in;
- inA2 = __PKHBT(opB, inA1, 16);
- inA1 = __PKHTB(inA1, opB, 16);
- opA = __SXTB16(inA1);
- opB = __SXTB16(inB1);
- sum2 = __SMLAD(opA, opB, sum2);
- opA = __SXTB16(__ROR(inA1, 8));
- opB = __SXTB16(__ROR(inB1, 8));
- sum = __SMLAD(opA, opB, sum);
- opA = __SXTB16(inA2);
- opB = __SXTB16(inB2);
- sum4 = __SMLAD(opA, opB, sum4);
- opA = __SXTB16(__ROR(inA2, 8));
- opB = __SXTB16(__ROR(inB2, 8));
- sum3 = __SMLAD(opA, opB, sum3);
- colCnt--;
- }
-
-#endif /* ARM_MATH_BIG_ENDIAN */
-
-#else
-
-#ifndef ARM_MATH_BIG_ENDIAN
- /*
- * r0 r1 r2 r3 r4 r5
- * inA1, inA2, inB1, inB2, opA, opB
- */
-
- asm volatile ("COL_LOOP_%=:\n"
- "ldr.w r2, [%[pB], #0]\n"
- "add.w %[pB], %[pB], %[ch_im_in]\n"
- "ldr.w r5, [%[pB], #0]\n"
- "add.w %[pB], %[pB], %[ch_im_in]\n"
- "pkhtb r3, r5, r2, ASR #16\n"
- "pkhbt r2, r2, r5, LSL #16\n"
- "ldr.w r0, [%[pA], #0]\n"
- "add.w %[pA], %[pA], %[ch_im_in]\n"
- "ldr.w r5, [%[pA], #0]\n"
- "add.w %[pA], %[pA], %[ch_im_in]\n"
- "pkhtb r1, r5, r0, ASR #16\n"
- "pkhbt r0, r0, r5, LSL #16\n"
- "sxtb16 r4, r0\n"
- "sxtb16 r5, r2\n"
- "smlad %[sum], r4, r5, %[sum]\n"
- "mov.w r4, r0, ror #8\n"
- "mov.w r5, r2, ror #8\n"
- "sxtb16 r4, r4\n"
- "sxtb16 r5, r5\n"
- "smlad %[sum2], r4, r5, %[sum2]\n"
- "sxtb16 r4, r1\n"
- "sxtb16 r5, r3\n"
- "smlad %[sum3], r4, r5, %[sum3]\n"
- "mov.w r4, r1, ror #8\n"
- "mov.w r5, r3, ror #8\n"
- "sxtb16 r4, r4\n"
- "sxtb16 r5, r5\n"
- "smlad %[sum4], r4, r5, %[sum4]\n"
- "subs %[colCnt], #1\n"
- "bne COL_LOOP_%=\n":[sum]
- "+r"(sum),[sum2] "+r"(sum2),
- [sum3] "+r"(sum3),
- [sum4] "+r"(sum4),[pB] "+r"(pB),
- [pA] "+r"(pA):[colCnt]
- "r"(colCnt),[ch_im_in] "r"(ch_im_in):"r0", "r1", "r2", "r3", "r4", "r5");
-#else
- /*
- * r0 r1 r2 r3 r4 r5
- * inA1, inA2, inB1, inB2, opA, opB
- */
- asm volatile ("COL_LOOP_%=:\n"
- "ldr.w r2, [%[pB], #0]\n"
- "add.w %[pB], %[pB], %[ch_im_in]\n"
- "ldr.w r5, [%[pB], #0]\n"
- "add.w %[pB], %[pB], %[ch_im_in]\n"
- "pkhbt r3, r5, r2, LSL #16\n"
- "pkhtb r2, r2, r5, ASR #16\n"
- "ldr.w r0, [%[pA], #0]\n"
- "add.w %[pA], %[pA], %[ch_im_in]\n"
- "ldr.w r5, [%[pA], #0]\n"
- "add.w %[pA], %[pA], %[ch_im_in]\n"
- "pkhbt r1, r5, r0, LSL #16\n"
- "pkhtb r0, r0, r5, ASR #16\n"
- "sxtb16 r4, r0\n"
- "sxtb16 r5, r2\n"
- "smlad %[sum2], r4, r5, %[sum2]\n"
- "mov.w r4, r0, ror #8\n"
- "mov.w r5, r2, ror #8\n"
- "sxtb16 r4, r4\n"
- "sxtb16 r5, r5\n"
- "smlad %[sum], r4, r5, %[sum]\n"
- "sxtb16 r4, r1\n"
- "sxtb16 r5, r3\n"
- "smlad %[sum4], r4, r5, %[sum4]\n"
- "mov.w r4, r1, ror #8\n"
- "mov.w r5, r3, ror #8\n"
- "sxtb16 r4, r4\n"
- "sxtb16 r5, r5\n"
- "smlad %[sum3], r4, r5, %[sum3]\n"
- "subs %[colCnt], #1\n"
- "bne COL_LOOP_%=\n":[sum]
- "+r"(sum),[sum2] "+r"(sum2),
- [sum3] "+r"(sum3),
- [sum4] "+r"(sum4),[pB] "+r"(pB),
- [pA] "+r"(pA):[colCnt]
- "r"(colCnt),[ch_im_in] "r"(ch_im_in):"r0", "r1", "r2", "r3", "r4", "r5");
-
-#endif /* ARM_MATH_BIG_ENDIAN */
-
-#endif /* USE_INTRINSIC */
-
- colCnt = (dim_kernel * dim_kernel) & 0x1;
- while (colCnt)
- {
- union arm_nnword inA, inB;
- inA.word = *__SIMD32(pA);
- pA += ch_im_in;
- inB.word = *__SIMD32(pB);
- pB += ch_im_in;
- sum += inA.bytes[0] * inB.bytes[0];
- sum2 += inA.bytes[1] * inB.bytes[1];
- sum3 += inA.bytes[2] * inB.bytes[2];
- sum4 += inA.bytes[3] * inB.bytes[3];
- colCnt--;
- }
-
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- *pOut++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
- *pOut++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
- *pOut++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
-
- rowCnt--;
- }
-
- rowCnt = ch_im_out & 0x3;
- while (rowCnt)
- {
- q7_t *pB = colBuffer + row_shift;
- const q7_t *pA = wt + row_shift;
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- uint16_t colCnt = (dim_kernel * dim_kernel);
-
- row_shift += 1;
-
- while (colCnt)
- {
- q7_t A1 = *pA;
- q7_t B1 = *pB;
- pA += ch_im_in;
- pB += ch_im_in;
- sum += A1 * B1;
-
- colCnt--;
- }
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- rowCnt--;
- }
-
- /* clear counter and pointers */
- pBuffer = colBuffer;
- }
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- int i_out_y, i_out_x, i_ch_out, i_ker_x, i_ker_y;
- int conv_out;
-
- /* do some checking here, basically ch_im_in == ch_im_out */
- if (ch_im_in != ch_im_out)
- {
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i_out_y = 0; i_out_y < dim_im_out; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out; i_out_x++)
- {
- for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
- {
- // for each output
- conv_out = ((q31_t)(bias[i_ch_out]) << bias_shift) + NN_ROUND(out_shift);
- for (i_ker_y = 0; i_ker_y < dim_kernel; i_ker_y++)
- {
- for (i_ker_x = 0; i_ker_x < dim_kernel; i_ker_x++)
- {
- int in_row = stride * i_out_y + i_ker_y - padding;
- int in_col = stride * i_out_x + i_ker_x - padding;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in && in_col < dim_im_in)
- {
- conv_out +=
- Im_in[(in_row *
- dim_im_in +
- in_col) *
- ch_im_in +
- i_ch_out] * wt[(i_ker_y * dim_kernel + i_ker_x) * ch_im_out + i_ch_out];
- }
- }
- }
- Im_out[(i_out_y * dim_im_out +
- i_out_x) * ch_im_out + i_ch_out] = (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c deleted file mode 100644 index 5989304..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_depthwise_separable_conv_HWC_q7_nonsquare.c +++ /dev/null @@ -1,411 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_depthwise_separable_conv_HWC_q7_nonsquare.c
- * Description: Q7 depthwise separable convolution function (non-square shape)
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup NNConv
- * @{
- */
-
-/**
- * @brief Q7 depthwise separable convolution function (non-square shape)
- * @param[in] Im_in pointer to input tensor
- * @param[in] dim_im_in_x input tensor dimention x
- * @param[in] dim_im_in_y input tensor dimention y
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] wt pointer to kernel weights
- * @param[in] ch_im_out number of filters, i.e., output tensor channels
- * @param[in] dim_kernel_x filter kernel size x
- * @param[in] dim_kernel_y filter kernel size y
- * @param[in] padding_x padding sizes x
- * @param[in] padding_y padding sizes y
- * @param[in] stride_x convolution stride x
- * @param[in] stride_y convolution stride y
- * @param[in] bias pointer to bias
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in,out] Im_out pointer to output tensor
- * @param[in] dim_im_out_x output tensor dimension x
- * @param[in] dim_im_out_y output tensor dimension y
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] bufferB pointer to buffer space for output
- * @return The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- *
- * This function is the version with full list of optimization tricks, but with
- * some contraints:
- * ch_im_in is multiple of 2
- * ch_im_out is multiple of 2
- */
-
-arm_status arm_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t * Im_in,
- const uint16_t dim_im_in_x,
- const uint16_t dim_im_in_y,
- const uint16_t ch_im_in,
- const q7_t * wt,
- const uint16_t ch_im_out,
- const uint16_t dim_kernel_x,
- const uint16_t dim_kernel_y,
- const uint16_t padding_x,
- const uint16_t padding_y,
- const uint16_t stride_x,
- const uint16_t stride_y,
- const q7_t * bias,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- q7_t * Im_out,
- const uint16_t dim_im_out_x,
- const uint16_t dim_im_out_y,
- q15_t * bufferA,
- q7_t * bufferB)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
-/*
- * Implementation:
- * There are 3 nested loop here:
- * Inner loop: calculate each output value with MAC instruction over an accumulator
- * Mid loop: loop over different output channel
- * Outer loop: loop over different output (x, y)
- *
- */
-
- int16_t i_out_y, i_out_x;
- int16_t i_ker_y, i_ker_x;
- q7_t *colBuffer = (q7_t *) bufferA;
- q7_t *pBuffer = colBuffer;
- const q7_t *pBias = bias;
- q7_t *pOut = Im_out;
- uint16_t rowCnt;
- uint16_t row_shift;
-
- /* do some checking here, basically ch_im_in == ch_im_out */
- if (ch_im_in != ch_im_out)
- {
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
- {
- /* we first do im2col here */
- for (i_ker_y = i_out_y * stride_y - padding_y; i_ker_y < i_out_y * stride_y - padding_y + dim_kernel_y;
- i_ker_y++)
- {
- for (i_ker_x = i_out_x * stride_x - padding_x; i_ker_x < i_out_x * stride_x - padding_x + dim_kernel_x;
- i_ker_x++)
- {
- if (i_ker_y < 0 || i_ker_y >= dim_im_in_y || i_ker_x < 0 || i_ker_x >= dim_im_in_x)
- {
- /* arm_fill_q7(0, pBuffer, ch_im_in); */
- memset(pBuffer, 0, ch_im_in);
- } else
- {
- /* arm_copy_q7((q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, pBuffer, ch_im_in); */
- memcpy(pBuffer, (q7_t *) Im_in + (i_ker_y * dim_im_in_x + i_ker_x) * ch_im_in, ch_im_in);
- }
- pBuffer += ch_im_in;
- }
- }
-
- /* we will do the computation here for each channel */
- rowCnt = ch_im_out >> 2;
- row_shift = 0;
- pBias = bias;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = (dim_kernel_x * dim_kernel_y) >> 1;
- q7_t *pB = colBuffer + row_shift;
- const q7_t *pA = wt + row_shift;
- row_shift += 4;
-
-#ifdef USE_INTRINSIC
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- while (colCnt)
- {
- q31_t inA1, inA2, inB1, inB2, opA, opB;
-
- inB1 = *__SIMD32(pB);
- pB += ch_im_in;
- opB = *__SIMD32(pB);
- pB += ch_im_in;
- inB2 = __PKHTB(opB, inB1, 16);
- inB1 = __PKHBT(inB1, opB, 16);
- inA1 = *__SIMD32(pA);
- pA += ch_im_in;
- opB = *__SIMD32(pA);
- pA += ch_im_in;
- inA2 = __PKHTB(opB, inA1, 16);
- inA1 = __PKHBT(inA1, opB, 16);
- opA = __SXTB16(inA1);
- opB = __SXTB16(inB1);
- sum = __SMLAD(opA, opB, sum);
- opA = __SXTB16(__ROR(inA1, 8));
- opB = __SXTB16(__ROR(inB1, 8));
- sum2 = __SMLAD(opA, opB, sum2);
- opA = __SXTB16(inA2);
- opB = __SXTB16(inB2);
- sum3 = __SMLAD(opA, opB, sum3);
- opA = __SXTB16(__ROR(inA2, 8));
- opB = __SXTB16(__ROR(inB2, 8));
- sum4 = __SMLAD(opA, opB, sum4);
- colCnt--;
- }
-#else
-
- while (colCnt)
- {
- q31_t inA1, inA2, inB1, inB2, opA, opB;
-
- inB1 = *__SIMD32(pB);
- pB += ch_im_in;
- opB = *__SIMD32(pB);
- pB += ch_im_in;
- inB2 = __PKHBT(opB, inB1, 16);
- inB1 = __PKHTB(inB1, opB, 16);
- inA1 = *__SIMD32(pA);
- pA += ch_im_in;
- opB = *__SIMD32(pA);
- pA += ch_im_in;
- inA2 = __PKHBT(opB, inA1, 16);
- inA1 = __PKHTB(inA1, opB, 16);
- opA = __SXTB16(inA1);
- opB = __SXTB16(inB1);
- sum2 = __SMLAD(opA, opB, sum2);
- opA = __SXTB16(__ROR(inA1, 8));
- opB = __SXTB16(__ROR(inB1, 8));
- sum = __SMLAD(opA, opB, sum);
- opA = __SXTB16(inA2);
- opB = __SXTB16(inB2);
- sum4 = __SMLAD(opA, opB, sum4);
- opA = __SXTB16(__ROR(inA2, 8));
- opB = __SXTB16(__ROR(inB2, 8));
- sum3 = __SMLAD(opA, opB, sum3);
- colCnt--;
- }
-
-#endif /* ARM_MATH_BIG_ENDIAN */
-
-#else
-
-#ifndef ARM_MATH_BIG_ENDIAN
- // r0 r1 r2 r3 r4 r5
- // inA1, inA2, inB1, inB2, opA, opB
- asm volatile ("COL_LOOP:\n"
- "ldr.w r2, [%[pB], #0]\n"
- "add.w %[pB], %[pB], %[ch_im_in]\n"
- "ldr.w r5, [%[pB], #0]\n"
- "add.w %[pB], %[pB], %[ch_im_in]\n"
- "pkhtb r3, r5, r2, ASR #16\n"
- "pkhbt r2, r2, r5, LSL #16\n"
- "ldr.w r0, [%[pA], #0]\n"
- "add.w %[pA], %[pA], %[ch_im_in]\n"
- "ldr.w r5, [%[pA], #0]\n"
- "add.w %[pA], %[pA], %[ch_im_in]\n"
- "pkhtb r1, r5, r0, ASR #16\n"
- "pkhbt r0, r0, r5, LSL #16\n"
- "sxtb16 r4, r0\n"
- "sxtb16 r5, r2\n"
- "smlad %[sum], r4, r5, %[sum]\n"
- "mov.w r4, r0, ror #8\n"
- "mov.w r5, r2, ror #8\n"
- "sxtb16 r4, r4\n"
- "sxtb16 r5, r5\n"
- "smlad %[sum2], r4, r5, %[sum2]\n"
- "sxtb16 r4, r1\n"
- "sxtb16 r5, r3\n"
- "smlad %[sum3], r4, r5, %[sum3]\n"
- "mov.w r4, r1, ror #8\n"
- "mov.w r5, r3, ror #8\n"
- "sxtb16 r4, r4\n"
- "sxtb16 r5, r5\n"
- "smlad %[sum4], r4, r5, %[sum4]\n"
- "subs %[colCnt], #1\n"
- "bne COL_LOOP\n":[sum] "+r"(sum),[sum2] "+r"(sum2),[sum3] "+r"(sum3),
- [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt),
- [ch_im_in] "r"(ch_im_in):"r0", "r1", "r2", "r3", "r4", "r5");
-#else
- // r0 r1 r2 r3 r4 r5
- // inA1, inA2, inB1, inB2, opA, opB
- asm volatile ("COL_LOOP:\n"
- "ldr.w r2, [%[pB], #0]\n"
- "add.w %[pB], %[pB], %[ch_im_in]\n"
- "ldr.w r5, [%[pB], #0]\n"
- "add.w %[pB], %[pB], %[ch_im_in]\n"
- "pkhbt r3, r5, r2, LSL #16\n"
- "pkhtb r2, r2, r5, ASR #16\n"
- "ldr.w r0, [%[pA], #0]\n"
- "add.w %[pA], %[pA], %[ch_im_in]\n"
- "ldr.w r5, [%[pA], #0]\n"
- "add.w %[pA], %[pA], %[ch_im_in]\n"
- "pkhbt r1, r5, r0, LSL #16\n"
- "pkhtb r0, r0, r5, ASR #16\n"
- "sxtb16 r4, r0\n"
- "sxtb16 r5, r2\n"
- "smlad %[sum2], r4, r5, %[sum2]\n"
- "mov.w r4, r0, ror #8\n"
- "mov.w r5, r2, ror #8\n"
- "sxtb16 r4, r4\n"
- "sxtb16 r5, r5\n"
- "smlad %[sum], r4, r5, %[sum]\n"
- "sxtb16 r4, r1\n"
- "sxtb16 r5, r3\n"
- "smlad %[sum4], r4, r5, %[sum4]\n"
- "mov.w r4, r1, ror #8\n"
- "mov.w r5, r3, ror #8\n"
- "sxtb16 r4, r4\n"
- "sxtb16 r5, r5\n"
- "smlad %[sum3], r4, r5, %[sum3]\n"
- "subs %[colCnt], #1\n"
- "bne COL_LOOP\n":[sum] "+r"(sum),[sum2] "+r"(sum2),[sum3] "+r"(sum3),
- [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt),
- [ch_im_in] "r"(ch_im_in):"r0", "r1", "r2", "r3", "r4", "r5");
-#endif /*ARM_MATH_BIG_ENDIAN */
-
-#endif /* USE_INTRINSIC */
-
- colCnt = (dim_kernel_x * dim_kernel_y) & 0x1;
- while (colCnt)
- {
- union arm_nnword inA, inB;
- inA.word = *__SIMD32(pA);
- pA += ch_im_in;
- inB.word = *__SIMD32(pB);
- pB += ch_im_in;
- sum += inA.bytes[0] * inB.bytes[0];
- sum2 += inA.bytes[1] * inB.bytes[1];
- sum3 += inA.bytes[2] * inB.bytes[2];
- sum4 += inA.bytes[3] * inB.bytes[3];
- colCnt--;
- }
-
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- *pOut++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
- *pOut++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
- *pOut++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
-
- rowCnt--;
- }
-
- rowCnt = ch_im_out & 0x3;
- while (rowCnt)
- {
- q7_t *pB = colBuffer + row_shift;
- const q7_t *pA = wt + row_shift;
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- uint16_t colCnt = (dim_kernel_x * dim_kernel_y);
-
- row_shift += 1;
-
- while (colCnt)
- {
- q7_t A1 = *pA;
- q7_t B1 = *pB;
- pA += ch_im_in;
- pB += ch_im_in;
- sum += A1 * B1;
-
- colCnt--;
- }
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- rowCnt--;
- }
-
- // clear counter and pointers
- pBuffer = colBuffer;
- }
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- int i_out_y, i_out_x, i_ch_out;
- int i_ker_y, i_ker_x;
-
- /* do some checking here, basically ch_im_in == ch_im_out */
- if (ch_im_in != ch_im_out)
- {
- return ARM_MATH_SIZE_MISMATCH;
- }
-
- for (i_out_y = 0; i_out_y < dim_im_out_y; i_out_y++)
- {
- for (i_out_x = 0; i_out_x < dim_im_out_x; i_out_x++)
- {
- for (i_ch_out = 0; i_ch_out < ch_im_out; i_ch_out++)
- {
- // for each output
- int conv_out = ((q31_t)(bias[i_ch_out]) << bias_shift) + NN_ROUND(out_shift);
- for (i_ker_y = 0; i_ker_y < dim_kernel_y; i_ker_y++)
- {
- for (i_ker_x = 0; i_ker_x < dim_kernel_x; i_ker_x++)
- {
- int in_row = stride_y * i_out_y + i_ker_y - padding_y;
- int in_col = stride_x * i_out_x + i_ker_x - padding_x;
- if (in_row >= 0 && in_col >= 0 && in_row < dim_im_in_y && in_col < dim_im_in_x)
- {
- conv_out += Im_in[(in_row * dim_im_in_x + in_col) * ch_im_in + i_ch_out] *
- wt[(i_ker_y * dim_kernel_x + i_ker_x) * ch_im_out + i_ch_out];
- }
- }
- }
- Im_out[(i_out_y * dim_im_out_x + i_out_x) * ch_im_out + i_ch_out] =
- (q7_t) __SSAT((conv_out >> out_shift), 8);
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
-
- /* Return to application */
- return ARM_MATH_SUCCESS;
-
-}
-
-/**
- * @} end of NNConv group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c deleted file mode 100644 index 24ab412..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15.c +++ /dev/null @@ -1,187 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nn_mat_mult_kernel_q7_q15.c
- * Description: Matrix-multiplication function for convolution
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
- /**
- * @brief Matrix-multiplication function for convolution
- * @param[in] pA pointer to operand A
- * @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
- * @param[in] ch_im_out numRow of A
- * @param[in] numCol_A numCol of A
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias the bias
- * @param[in,out] pOut pointer to output
- * @return The function returns the incremented output pointer
- *
- * @details
- *
- * This function does the matrix multiplication with weight matrix
- * and 2 columns from im2col.
- */
-
-q7_t *arm_nn_mat_mult_kernel_q7_q15(const q7_t * pA,
- const q15_t * pInBuffer,
- const uint16_t ch_im_out,
- const uint16_t numCol_A,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q7_t * pOut)
-{
-#if defined (ARM_MATH_DSP)
- /* set up the second output pointers */
- q7_t *pOut2 = pOut + ch_im_out;
- const q7_t *pBias = bias;
-
- uint16_t rowCnt = ch_im_out >> 1;
- /* this loop over rows in A */
- while (rowCnt)
- {
- /* setup pointers for B */
- const q15_t *pB = pInBuffer;
- const q15_t *pB2 = pB + numCol_A;
-
- /* align the second pointer for A */
- const q7_t *pA2 = pA + numCol_A;
-
- /* init the sum with bias */
- q31_t sum = ((q31_t)(*pBias) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(*pBias) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = numCol_A >> 2;
- /* accumulate over the vector */
- while (colCnt)
- {
- q31_t inA11, inA12, inA21, inA22;
- q31_t inB1 = *__SIMD32(pB)++;
- q31_t inB2 = *__SIMD32(pB2)++;
-
- pA = (q7_t *) read_and_pad((void *)pA, &inA11, &inA12);
- pA2 = (q7_t *) read_and_pad((void *)pA2, &inA21, &inA22);
-
- sum = __SMLAD(inA11, inB1, sum);
- sum2 = __SMLAD(inA11, inB2, sum2);
- sum3 = __SMLAD(inA21, inB1, sum3);
- sum4 = __SMLAD(inA21, inB2, sum4);
-
- inB1 = *__SIMD32(pB)++;
- inB2 = *__SIMD32(pB2)++;
-
- sum = __SMLAD(inA12, inB1, sum);
- sum2 = __SMLAD(inA12, inB2, sum2);
- sum3 = __SMLAD(inA22, inB1, sum3);
- sum4 = __SMLAD(inA22, inB2, sum4);
-
- colCnt--;
- } /* while over colCnt */
- colCnt = numCol_A & 0x3;
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- q7_t inA2 = *pA2++;
- q15_t inB2 = *pB2++;
-
- sum += inA1 * inB1;
- sum2 += inA1 * inB2;
- sum3 += inA2 * inB1;
- sum4 += inA2 * inB2;
- colCnt--;
- } /* while over colCnt */
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- *pOut++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
- *pOut2++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
- *pOut2++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
-
- /* skip the row computed with A2 */
- pA += numCol_A;
- rowCnt--;
- } /* for over ch_im_out */
-
- /* compute left-over row if any */
- if (ch_im_out & 0x1)
- {
- /* setup pointers for B */
- const q15_t *pB = pInBuffer;
- const q15_t *pB2 = pB + numCol_A;
-
- /* load the bias */
- q31_t sum = ((q31_t)(*pBias) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = numCol_A >> 2;
- while (colCnt)
- {
- q31_t inA11, inA12;
- q31_t inB1 = *__SIMD32(pB)++;
- q31_t inB2 = *__SIMD32(pB2)++;
-
- pA = (q7_t *) read_and_pad((void *)pA, &inA11, &inA12);
-
- sum = __SMLAD(inA11, inB1, sum);
- sum2 = __SMLAD(inA11, inB2, sum2);
-
- inB1 = *__SIMD32(pB)++;
- inB2 = *__SIMD32(pB2)++;
- sum = __SMLAD(inA12, inB1, sum);
- sum2 = __SMLAD(inA12, inB2, sum2);
-
- colCnt--;
- }
- colCnt = numCol_A & 0x3;
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- q15_t inB2 = *pB2++;
-
- sum += inA1 * inB1;
- sum2 += inA1 * inB2;
- colCnt--;
- }
-
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- *pOut2++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
- }
-
- pOut += ch_im_out;
-
- /* return the new output pointer with offset */
- return pOut;
-#else
- /* To be completed */
- return NULL;
-#endif /* ARM_MATH_DSP */
-
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c b/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c deleted file mode 100644 index 36af21a..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/ConvolutionFunctions/arm_nn_mat_mult_kernel_q7_q15_reordered.c +++ /dev/null @@ -1,138 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nn_mat_mult_kernel_q7_q15_reordered.c
- * Description: Matrix-multiplication function for convolution with reordered columns
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-
-#include "arm_nnfunctions.h"
-#include "arm_math.h"
-
- /**
- * @brief Matrix-multiplication function for convolution with reordered columns
- * @param[in] pA pointer to operand A
- * @param[in] pInBuffer pointer to operand B, always conssists of 2 vectors
- * @param[in] ch_im_out numRow of A
- * @param[in] numCol_A numCol of A
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias the bias
- * @param[in,out] pOut pointer to output
- * @return The function returns the incremented output pointer
- *
- * @details
- *
- * This function assumes that data in pInBuffer are reordered
- */
-
-q7_t *arm_nn_mat_mult_kernel_q7_q15_reordered(const q7_t * pA,
- const q15_t * pInBuffer,
- const uint16_t ch_im_out,
- const uint16_t numCol_A,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q7_t * pOut)
-{
-
-#if defined (ARM_MATH_DSP)
- /* set up the second output pointers */
- q7_t *pOut2 = pOut + ch_im_out;
- int i;
-
- /* this loop over rows in A */
- for (i = 0; i < ch_im_out; i += 2)
- {
- /* setup pointers for B */
- const q15_t *pB = pInBuffer;
- const q15_t *pB2 = pB + numCol_A;
-
- /* align the second pointer for A */
- const q7_t *pA2 = pA + numCol_A;
-
- /* init the sum with bias */
- q31_t sum = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(bias[i + 1]) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(bias[i + 1]) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = numCol_A >> 2;
- /* accumulate over the vector */
- while (colCnt)
- {
- q31_t inA11, inA12, inA21, inA22;
- q31_t inB1 = *__SIMD32(pB)++;
- q31_t inB2 = *__SIMD32(pB2)++;
-
- pA = (q7_t *) read_and_pad_reordered((void *)pA, &inA11, &inA12);
- pA2 = (q7_t *) read_and_pad_reordered((void *)pA2, &inA21, &inA22);
-
- sum = __SMLAD(inA11, inB1, sum);
- sum2 = __SMLAD(inA11, inB2, sum2);
- sum3 = __SMLAD(inA21, inB1, sum3);
- sum4 = __SMLAD(inA21, inB2, sum4);
-
- inB1 = *__SIMD32(pB)++;
- inB2 = *__SIMD32(pB2)++;
-
- sum = __SMLAD(inA12, inB1, sum);
- sum2 = __SMLAD(inA12, inB2, sum2);
- sum3 = __SMLAD(inA22, inB1, sum3);
- sum4 = __SMLAD(inA22, inB2, sum4);
-
- colCnt--;
- } /* while over colCnt */
- colCnt = numCol_A & 0x3;
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q15_t inB1 = *pB++;
- q7_t inA2 = *pA2++;
- q15_t inB2 = *pB2++;
-
- sum += inA1 * inB1;
- sum2 += inA1 * inB2;
- sum3 += inA2 * inB1;
- sum4 += inA2 * inB2;
- colCnt--;
- } /* while over colCnt */
- *pOut++ = (q7_t) __SSAT((sum >> out_shift), 8);
- *pOut++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
- *pOut2++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
- *pOut2++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
-
- /* skip the row computed with A2 */
- pA += numCol_A;
- } /* for over ch_im_out */
-
- pOut += ch_im_out;
-
- /* return the new output pointer with offset */
- return pOut;
-#else
- /* To be completed */
- return NULL;
-#endif /* ARM_MATH_DSP */
-}
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c b/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c deleted file mode 100644 index bb9a091..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15.c +++ /dev/null @@ -1,199 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_fully_connected_mat_q7_vec_q15.c
- * Description: Mixed Q15-Q7 fully-connected layer function
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup FC
- * @{
- */
-
- /**
- * @brief Mixed Q15-Q7 fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * vec_buffer size: 0
- *
- * Q7_Q15 version of the fully connected layer
- *
- * Weights are in q7_t and Activations are in q15_t
- *
- */
-
-arm_status
-arm_fully_connected_mat_q7_vec_q15(const q15_t * pV,
- const q7_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q15_t * pOut,
- q15_t * vec_buffer)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- const q7_t *pB = pM;
- const q7_t *pB2;
- q15_t *pO = pOut;
- const q7_t *pBias = bias;
- const q15_t *pA = pV;
-
- uint16_t rowCnt = num_of_rows >> 1;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- uint16_t colCnt = dim_vec >> 2;
-
- pA = pV;
- pB2 = pB + dim_vec;
-
- while (colCnt)
- {
- q31_t inV, inM11, inM12, inM21, inM22;
- pB = (q7_t *) read_and_pad((void *)pB, &inM11, &inM12);
- pB2 = (q7_t *) read_and_pad((void *)pB2, &inM21, &inM22);
-
- inV = *__SIMD32(pA)++;
-
- sum = __SMLAD(inV, inM11, sum);
- sum2 = __SMLAD(inV, inM21, sum2);
-
- inV = *__SIMD32(pA)++;
-
- sum = __SMLAD(inV, inM12, sum);
- sum2 = __SMLAD(inV, inM22, sum2);
-
- colCnt--;
- }
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q15_t inV = *pA++;
- q7_t inM = *pB++;
- q7_t inM2 = *pB2++;
-
- sum += inV * inM;
- sum2 += inV * inM2;
- colCnt--;
- } /* while over colCnt */
- *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
- *pO++ = (q15_t) (__SSAT((sum2 >> out_shift), 16));
-
- /*adjust the pointers and counters */
- pB += dim_vec;
- rowCnt--;
- }
-
- /* left-over part of the rows */
- rowCnt = num_of_rows & 0x1;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- uint16_t colCnt = dim_vec >> 2;
-
- pA = pV;
-
- while (colCnt)
- {
- q31_t inV1, inV2, inM11, inM12;
-
- pB = (q7_t *) read_and_pad((void *)pB, &inM11, &inM12);
-
- inV1 = *__SIMD32(pA)++;
- sum = __SMLAD(inV1, inM11, sum);
-
- inV2 = *__SIMD32(pA)++;
- sum = __SMLAD(inV2, inM12, sum);
-
- colCnt--;
- }
-
- /* left-over of the vector */
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q15_t inV = *pA++;
- q7_t inM = *pB++;
- sum += inV * inM;
- colCnt--;
- }
-
- *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
-
- rowCnt--;
- }
-
-#else
- int i, j;
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- for (i = 0; i < num_of_rows; i++)
- {
- int ip_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
- for (j = 0; j < dim_vec; j++)
- {
- ip_out += pV[j] * pM[i * dim_vec + j];
- }
- pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to ARM_MATH_SUCCESS */
- return (ARM_MATH_SUCCESS);
-
-}
-
-/**
- * @} end of FC group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c b/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c deleted file mode 100644 index b0c308b..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_mat_q7_vec_q15_opt.c +++ /dev/null @@ -1,403 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_fully_connected_mat_q7_vec_q15_opt.c
- * Description: Mixed Q15-Q7 opt fully-connected layer function
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup FC
- * @{
- */
-
- /**
- * @brief Mixed Q15-Q7 opt fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * vec_buffer size: 0
- *
- * Q7_Q15 version of the fully connected layer
- *
- * Weights are in q7_t and Activations are in q15_t
- *
- * Limitation: x4 version requires weight reordering to work
- *
- * Here we use only one pointer to read 4 rows in the weight
- * matrix. So if the original q7_t matrix looks like this:
- *
- * | a11 | a12 | a13 | a14 | a15 | a16 | a17 |
- *
- * | a21 | a22 | a23 | a24 | a25 | a26 | a27 |
- *
- * | a31 | a32 | a33 | a34 | a35 | a36 | a37 |
- *
- * | a41 | a42 | a43 | a44 | a45 | a46 | a47 |
- *
- * | a51 | a52 | a53 | a54 | a55 | a56 | a57 |
- *
- * | a61 | a62 | a63 | a64 | a65 | a66 | a67 |
- *
- * We operates on multiple-of-4 rows, so the first four rows becomes
- *
- * | a11 | a21 | a12 | a22 | a31 | a41 | a32 | a42 |
- *
- * | a13 | a23 | a14 | a24 | a33 | a43 | a34 | a44 |
- *
- * | a15 | a25 | a16 | a26 | a35 | a45 | a36 | a46 |
- *
- * The column left over will be in-order.
- * which is:
- * | a17 | a27 | a37 | a47 |
- *
- * For the left-over rows, we do 1x1 computation, so the data remains
- * as its original order.
- *
- * So the stored weight matrix looks like this:
- *
- * | a11 | a21 | a12 | a22 | a31 | a41 |
- *
- * | a32 | a42 | a13 | a23 | a14 | a24 |
- *
- * | a33 | a43 | a34 | a44 | a15 | a25 |
- *
- * | a16 | a26 | a35 | a45 | a36 | a46 |
- *
- * | a17 | a27 | a37 | a47 | a51 | a52 |
- *
- * | a53 | a54 | a55 | a56 | a57 | a61 |
- *
- * | a62 | a63 | a64 | a65 | a66 | a67 |
- *
- */
-
-arm_status
-arm_fully_connected_mat_q7_vec_q15_opt(const q15_t * pV,
- const q7_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift, const q7_t * bias, q15_t * pOut, q15_t * vec_buffer)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- const q7_t *pB = pM;
- q15_t *pO = pOut;
- const q7_t *pBias = bias;
- const q15_t *pA = pV;
-
- uint16_t rowCnt = num_of_rows >> 2;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = dim_vec >> 1;
-
- pA = pV;
-
-#ifdef USE_INTRINSIC
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- while (colCnt)
- {
- q31_t inM11, inM12, inM13, inM14;
- q31_t inV;
-
- inV = *__SIMD32(pA)++;
- inM11 = *__SIMD32(pB)++;
- inM12 = __SXTB16(__ROR(inM11, 8));
- inM11 = __SXTB16(inM11);
- sum = __SMLAD(inM11, inV, sum);
- sum2 = __SMLAD(inM12, inV, sum2);
- inM13 = *__SIMD32(pB)++;
- inM14 = __SXTB16(__ROR(inM13, 8));
- inM13 = __SXTB16(inM13);
- sum3 = __SMLAD(inM13, inV, sum3);
- sum4 = __SMLAD(inM14, inV, sum4);
- colCnt--;
- }
-
-#else
-
- while (colCnt)
- {
- q31_t inM11, inM12, inM13, inM14;
- q31_t inV;
-
- inV = *__SIMD32(pA)++;
- inM11 = *__SIMD32(pB)++;
- inM12 = __SXTB16(__ROR(inM11, 8));
- inM11 = __SXTB16(inM11);
- sum = __SMLAD(inM12, inV, sum);
- sum2 = __SMLAD(inM11, inV, sum2);
- inM13 = *__SIMD32(pB)++;
- inM14 = __SXTB16(__ROR(inM13, 8));
- inM13 = __SXTB16(inM13);
- sum3 = __SMLAD(inM14, inV, sum3);
- sum4 = __SMLAD(inM13, inV, sum4);
- colCnt--;
- }
-
-#endif /* ARM_MATH_BIG_ENDIAN */
-
-#else
-
- /*
- * register needed:
- * loop counter: colCnt
- * accumulators: sum, sum2, sum3, sum4
- * pointers: pB, pA
- * weight data: inM11, inM12, inM13, inM14
- * activation data: inV
- */
-
-#ifndef ARM_MATH_BIG_ENDIAN
- asm volatile ("COL_LOOP_%=:\n"
- "ldr.w r4, [%[pA]], #4\n"
- "ldr.w r1, [%[pB]], #8\n"
- "mov.w r0, r1, ror #8\n"
- "sxtb16 r0, r0\n"
- "sxtb16 r1, r1\n"
- "smlad %[sum], r4, r1, %[sum]\n"
- "smlad %[sum2], r4, r0, %[sum2]\n"
- "ldr.w r3, [%[pB], #-4]\n"
- "mov.w r2, r3, ror #8\n"
- "sxtb16 r2, r2\n"
- "sxtb16 r3, r3\n"
- "smlad %[sum3], r4, r3, %[sum3]\n"
- "smlad %[sum4], r4, r2, %[sum4]\n"
- "subs %[colCnt], #1\n"
- "bne COL_LOOP_%=\n":[sum] "+r"(sum),
- [sum2] "+r"(sum2),[sum3] "+r"(sum3),
- [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
-#else
- asm volatile ("COL_LOOP_%=:\n"
- "ldr.w r4, [%[pA]], #4\n"
- "ldr.w r1, [%[pB]], #8\n"
- "mov.w r0, r1, ror #8\n"
- "sxtb16 r0, r0\n"
- "sxtb16 r1, r1\n"
- "smlad %[sum], r4, r0, %[sum]\n"
- "smlad %[sum2], r4, r1, %[sum2]\n"
- "ldr.w r3, [%[pB], #-4]\n"
- "mov.w r2, r3, ror #8\n"
- "sxtb16 r2, r2\n"
- "sxtb16 r3, r3\n"
- "smlad %[sum3], r4, r2, %[sum3]\n"
- "smlad %[sum4], r4, r3, %[sum4]\n"
- "subs %[colCnt], #1\n"
- "bne COL_LOOP_%=\n":[sum] "+r"(sum),
- [sum2] "+r"(sum2),[sum3] "+r"(sum3),
- [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
-#endif /* ARM_MATH_BIG_ENDIAN */
-
-#endif /* USE_INTRINSIC */
-
- colCnt = dim_vec & 0x1;
- while (colCnt)
- {
- q15_t inV = *pA++;
- q7_t inM = *pB++;
- q7_t inM2 = *pB++;
- q7_t inM3 = *pB++;
- q7_t inM4 = *pB++;
-
- sum += inV * inM;
- sum2 += inV * inM2;
- sum3 += inV * inM3;
- sum4 += inV * inM4;
- colCnt--;
- } /* while over colCnt */
- *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
- *pO++ = (q15_t) (__SSAT((sum2 >> out_shift), 16));
- *pO++ = (q15_t) (__SSAT((sum3 >> out_shift), 16));
- *pO++ = (q15_t) (__SSAT((sum4 >> out_shift), 16));
-
- /* adjust the pointers and counters */
- rowCnt--;
- }
-
- /* left-over part of the rows */
- rowCnt = num_of_rows & 0x3;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = dim_vec >> 2;
-
- pA = pV;
-
- while (colCnt)
- {
- q31_t inV1, inV2, inM11, inM12;
-
- pB = (q7_t *) read_and_pad((void *)pB, &inM11, &inM12);
-
- inV1 = *__SIMD32(pA)++;
- sum = __SMLAD(inV1, inM11, sum);
-
- inV2 = *__SIMD32(pA)++;
- sum = __SMLAD(inV2, inM12, sum);
-
- colCnt--;
- }
-
- /* left-over of the vector */
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q15_t inV = *pA++;
- q7_t inM = *pB++;
- sum += inV * inM;
- colCnt--;
- }
-
- *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
-
- rowCnt--;
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- uint16_t rowCnt = num_of_rows >> 2;
- const q7_t *pB = pM;
- const q15_t *pA;
- q15_t *pO = pOut;
- const q7_t *pBias = bias;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- uint16_t colCnt = dim_vec >> 1;
-
- pA = pV;
-
- while (colCnt)
- {
- q15_t inA1 = *pA++;
- q15_t inA2 = *pA++;
-
- q7_t inB1 = *pB++;
- q7_t inB3 = *pB++;
- q7_t inB2 = *pB++;
- q7_t inB4 = *pB++;
-
- sum += inA1 * inB1 + inA2 * inB2;
- sum2 += inA1 * inB3 + inA2 * inB4;
-
- inB1 = *pB++;
- inB3 = *pB++;
- inB2 = *pB++;
- inB4 = *pB++;
-
- sum3 += inA1 * inB1 + inA2 * inB2;
- sum4 += inA1 * inB3 + inA2 * inB4;
-
- colCnt--;
- }
-
- colCnt = dim_vec & 0x1;
- while (colCnt)
- {
- q15_t inA = *pA++;
- q7_t inB = *pB++;
- sum += inA * inB;
- inB = *pB++;
- sum2 += inA * inB;
- inB = *pB++;
- sum3 += inA * inB;
- inB = *pB++;
- sum4 += inA * inB;
-
- colCnt--;
- }
- *pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
-
- rowCnt--;
- }
-
- rowCnt = num_of_rows & 0x3;
-
- while (rowCnt)
- {
- int ip_out = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- int j;
-
- pA = pV;
- for (j = 0; j < dim_vec; j++)
- {
- q15_t inA = *pA++;
- q7_t inB = *pB++;
- ip_out += inA * inB;
- }
- *pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
-
- rowCnt--;
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to ARM_MATH_SUCCESS */
- return (ARM_MATH_SUCCESS);
-
-}
-
-/**
- * @} end of FC group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c b/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c deleted file mode 100644 index a4c6bba..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15.c +++ /dev/null @@ -1,193 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_fully_connected_q15.c
- * Description: Q15 basic fully-connected layer function
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup FC
- * @{
- */
-
- /**
- * @brief Q15 opt fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * vec_buffer size: 0
- *
- */
-
-arm_status
-arm_fully_connected_q15(const q15_t * pV,
- const q15_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q15_t * bias,
- q15_t * pOut,
- q15_t * vec_buffer)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- const q15_t *pB = pM;
- const q15_t *pB2 = pB + dim_vec;
- q15_t *pO = pOut;
- const q15_t *pA;
- const q15_t *pBias = bias;
- uint16_t rowCnt = num_of_rows >> 1;
-
- /* this loop loops over different output */
- while (rowCnt) {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = dim_vec >> 2;
-
- pA = pV;
- pB2 = pB + dim_vec;
-
- while (colCnt)
- {
- q31_t inV1, inM1, inM2;
- inV1 = *__SIMD32(pA)++;
- inM1 = *__SIMD32(pB)++;
- sum = __SMLAD(inV1, inM1, sum);
- inM2 = *__SIMD32(pB2)++;
- sum2 = __SMLAD(inV1, inM2, sum2);
-
- inV1 = *__SIMD32(pA)++;
- inM1 = *__SIMD32(pB)++;
- sum = __SMLAD(inV1, inM1, sum);
- inM2 = *__SIMD32(pB2)++;
- sum2 = __SMLAD(inV1, inM2, sum2);
-
- colCnt--;
- }
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q15_t inV = *pA++;
- q15_t inM = *pB++;
- q15_t inM2 = *pB2++;
-
- sum += inV * inM;
- sum2 += inV * inM2;
- colCnt--;
- } /* while over colCnt */
- *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
- *pO++ = (q15_t) (__SSAT((sum2>> out_shift), 16));
-
- /* adjust the pointers and counters */
- pB = pB + dim_vec;
- rowCnt --;
- }
-
- rowCnt = num_of_rows & 0x1;
-
- while (rowCnt) {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = dim_vec >> 2;
-
- pA = pV;
-
- while (colCnt) {
- q31_t inV1, inM1;
- inV1 = *__SIMD32(pA)++;
- inM1 = *__SIMD32(pB)++;
- sum = __SMLAD(inV1, inM1, sum);
-
- inV1 = *__SIMD32(pA)++;
- inM1 = *__SIMD32(pB)++;
- sum = __SMLAD(inV1, inM1, sum);
-
- colCnt--;
- }
-
- /* left-over of the vector */
- colCnt = dim_vec & 0x3;
- while(colCnt) {
- q15_t inV = *pA++;
- q15_t inM = *pB++;
-
- sum += inV * inM;
-
- colCnt--;
- }
-
- *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
-
- rowCnt --;
- }
-
-#else
- int i, j;
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- for (i = 0; i < num_of_rows; i++)
- {
- int ip_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
- for (j = 0; j < dim_vec; j++)
- {
- ip_out += pV[j] * pM[i * dim_vec + j];
- }
- pOut[i] = (q15_t) __SSAT((ip_out >> out_shift), 16);
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to application */
- return (ARM_MATH_SUCCESS);
-
-}
-
-/**
- * @} end of FC group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c b/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c deleted file mode 100644 index 8f3bbea..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q15_opt.c +++ /dev/null @@ -1,332 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_fully_connected_q15_opt.c
- * Description: Q15 opt fully-connected layer function
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup FC
- * @{
- */
-
- /**
- * @brief Q15 opt fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * vec_buffer size: 0
- *
- * Here we use only one pointer to read 4 rows in the weight
- * matrix. So if the original matrix looks like this:
- *
- * | a11 | a12 | a13 |
- *
- * | a21 | a22 | a23 |
- *
- * | a31 | a32 | a33 |
- *
- * | a41 | a42 | a43 |
- *
- * | a51 | a52 | a53 |
- *
- * | a61 | a62 | a63 |
- *
- * We operates on multiple-of-4 rows, so the first four rows becomes
- *
- * | a11 | a12 | a21 | a22 | a31 | a32 | a41 | a42 |
- *
- * | a13 | a23 | a33 | a43 |
- *
- * Remaining rows are kept the same original order.
- *
- * So the stored weight matrix looks like this:
- *
- *
- * | a11 | a12 | a21 | a22 | a31 | a32 | a41 | a42 |
- *
- * | a13 | a23 | a33 | a43 | a51 | a52 | a53 | a61 |
- *
- * | a62 | a63 |
- */
-
-arm_status
-arm_fully_connected_q15_opt(const q15_t * pV,
- const q15_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q15_t * bias,
- q15_t * pOut,
- q15_t * vec_buffer)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- const q15_t *pB = pM;
- q15_t *pO = pOut;
- const q15_t *pBias = bias;
- const q15_t *pA = pV;
-
- uint16_t rowCnt = num_of_rows >> 2;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = dim_vec >> 1;
-
- pA = pV;
-
-#ifdef USE_INTRINSIC
-
- while (colCnt)
- {
- q31_t inM11, inM12, inM13, inM14;
- q31_t inV;
-
- inV = *__SIMD32(pA)++;
- inM11 = *__SIMD32(pB)++;
- sum = __SMLAD(inV, inM11, sum);
- inM12 = *__SIMD32(pB)++;
- sum2 = __SMLAD(inV, inM12, sum2);
- inM13 = *__SIMD32(pB)++;
- sum3 = __SMLAD(inV, inM13, sum3);
- inM14 = *__SIMD32(pB)++;
- sum4 = __SMLAD(inV, inM14, sum4);
- colCnt--;
- }
-
-#else
-
- /*
- * register needed:
- * loop counter: colCnt
- * accumulators: sum, sum2, sum3, sum4
- * pointers: pB, pA
- * weight data: inM11, inM12, inM13, inM14
- * activation data: inV
- */
-
- asm volatile ("COL_LOOP_%=:\n"
- "ldr.w r4, [%[pA]], #4\n"
- "ldr.w r0, [%[pB]], #16\n"
- "smlad %[sum], r4, r0, %[sum]\n"
- "ldr.w r1, [%[pB] , #-12]\n"
- "smlad %[sum2], r4, r1, %[sum2]\n"
- "ldr.w r2, [%[pB] , #-8]\n"
- "smlad %[sum3], r4, r2, %[sum3]\n"
- "ldr.w r3, [%[pB] , #-4]\n"
- "smlad %[sum4], r4, r3, %[sum4]\n"
- "subs %[colCnt], #1\n"
- "bne COL_LOOP_%=\n":[sum] "+r"(sum),
- [sum2] "+r"(sum2),[sum3] "+r"(sum3),
- [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
-
-#endif /* USE_INTRINSIC */
-
- colCnt = dim_vec & 0x1;
- while (colCnt)
- {
-
- q15_t inV = *pA++;
- q15_t inM = *pB++;
- q15_t inM2 = *pB++;
- q15_t inM3 = *pB++;
- q15_t inM4 = *pB++;
-
- sum += inV * inM;
- sum2 += inV * inM2;
- sum3 += inV * inM3;
- sum4 += inV * inM4;
- colCnt--;
- } /* while over colCnt */
- *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
- *pO++ = (q15_t) (__SSAT((sum2 >> out_shift), 16));
- *pO++ = (q15_t) (__SSAT((sum3 >> out_shift), 16));
- *pO++ = (q15_t) (__SSAT((sum4 >> out_shift), 16));
-
- /* adjust the pointers and counters */
- rowCnt--;
- }
-
- /* left-over part of the rows */
- rowCnt = num_of_rows & 0x3;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = dim_vec >> 2;
-
- pA = pV;
-
- while (colCnt)
- {
- q31_t inV1, inV2, inM1, inM2;
-
- inM1 = *__SIMD32(pB)++;
- inV1 = *__SIMD32(pA)++;
- sum = __SMLAD(inV1, inM1, sum);
-
- inM2 = *__SIMD32(pB)++;
- inV2 = *__SIMD32(pA)++;
- sum = __SMLAD(inV2, inM2, sum);
-
- colCnt--;
- }
-
- /* left-over of the vector */
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q15_t inV = *pA++;
- q15_t inM = *pB++;
- sum += inV * inM;
- colCnt--;
- }
-
- *pO++ = (q15_t) (__SSAT((sum >> out_shift), 16));
-
- rowCnt--;
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- uint16_t rowCnt = num_of_rows >> 2;
- const q15_t *pB = pM;
- const q15_t *pA;
- q15_t *pO = pOut;
- const q15_t *pBias = bias;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = dim_vec >> 1;
-
- pA = pV;
- while (colCnt)
- {
- q15_t inA1 = *pA++;
- q15_t inA2 = *pA++;
-
- q15_t inB1 = *pB++;
- q15_t inB2 = *pB++;
- sum += inA1 * inB1 + inA2 * inB2;
-
- inB1 = *pB++;
- inB2 = *pB++;
- sum2 += inA1 * inB1 + inA2 * inB2;
-
- inB1 = *pB++;
- inB2 = *pB++;
- sum3 += inA1 * inB1 + inA2 * inB2;
-
- inB1 = *pB++;
- inB2 = *pB++;
- sum4 += inA1 * inB1 + inA2 * inB2;
-
- colCnt--;
- }
- colCnt = dim_vec & 0x1;
- while (colCnt)
- {
- q15_t inA = *pA++;
- q15_t inB = *pB++;
- sum += inA * inB;
- inB = *pB++;
- sum2 += inA * inB;
- inB = *pB++;
- sum3 += inA * inB;
- inB = *pB++;
- sum4 += inA * inB;
- colCnt--;
- }
- *pO++ = (q15_t) __SSAT((sum >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum2 >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum3 >> out_shift), 16);
- *pO++ = (q15_t) __SSAT((sum4 >> out_shift), 16);
-
- rowCnt--;
- }
- rowCnt = num_of_rows & 0x3;
-
- while (rowCnt)
- {
- int ip_out = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- int j;
-
- pA = pV;
- for (j = 0; j < dim_vec; j++)
- {
- q15_t inA = *pA++;
- q15_t inB = *pB++;
- ip_out += inA * inB;
- }
- *pO++ = (q15_t) __SSAT((ip_out >> out_shift), 16);
-
- rowCnt--;
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to ARM_MATH_SUCCESS */
- return (ARM_MATH_SUCCESS);
-
-}
-
-/**
- * @} end of FC group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c b/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c deleted file mode 100644 index 75e924f..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7.c +++ /dev/null @@ -1,198 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_fully_connected_q7.c
- * Description: Q7 basic fully-connected layer function
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup FC
- * @{
- */
-
- /**
- * @brief Q7 basic fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * vec_buffer size: dim_vec
- *
- * This basic function is designed to work with regular weight
- * matrix without interleaving.
- *
- */
-
-arm_status
-arm_fully_connected_q7(const q7_t * pV,
- const q7_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift, const q7_t * bias, q7_t * pOut, q15_t * vec_buffer)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- const q7_t *pB = pM;
- const q7_t *pB2;
- q7_t *pO = pOut;
- const q7_t *pBias = bias;
- q15_t *pA;
- uint16_t rowCnt = num_of_rows >> 1;
-
- /* expand the vector into the buffer */
- arm_q7_to_q15_reordered_no_shift(pV, vec_buffer, dim_vec);
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- uint16_t colCnt = dim_vec >> 2;
-
- pA = vec_buffer;
- pB2 = pB + dim_vec;
-
- while (colCnt)
- {
- q31_t inV, inM11, inM12, inM21, inM22;
- pB = (q7_t *) read_and_pad_reordered((void *)pB, &inM11, &inM12);
- pB2 = (q7_t *) read_and_pad_reordered((void *)pB2, &inM21, &inM22);
-
- inV = *__SIMD32(pA)++;
-
- sum = __SMLAD(inV, inM11, sum);
- sum2 = __SMLAD(inV, inM21, sum2);
-
- inV = *__SIMD32(pA)++;
-
- sum = __SMLAD(inV, inM12, sum);
- sum2 = __SMLAD(inV, inM22, sum2);
-
- colCnt--;
- }
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q7_t inV = *pA++;
- q15_t inM = *pB++;
- q15_t inM2 = *pB2++;
-
- sum += inV * inM;
- sum2 += inV * inM2;
- colCnt--;
- } /* while over colCnt */
- *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8));
- *pO++ = (q7_t) (__SSAT((sum2 >> out_shift), 8));
-
- /* adjust the pointers and counters */
- pB += dim_vec;
- rowCnt--;
- }
-
- /* left-over part of the rows */
- rowCnt = num_of_rows & 0x1;
-
- while (rowCnt)
- {
- uint16_t colCnt = dim_vec >> 2;
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- pA = vec_buffer;
-
- while (colCnt)
- {
- q31_t inV1, inV2, inM11, inM12;
-
- pB = (q7_t *) read_and_pad_reordered((void *)pB, &inM11, &inM12);
-
- inV1 = *__SIMD32(pA)++;
- sum = __SMLAD(inV1, inM11, sum);
-
- inV2 = *__SIMD32(pA)++;
- sum = __SMLAD(inV2, inM12, sum);
-
- colCnt--;
- }
-
- /* left-over of the vector */
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q7_t inV = *pA++;
- q15_t inM = *pB++;
- sum += inV * inM;
- colCnt--;
- }
-
- *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8));
-
- rowCnt--;
- }
-
-#else
- int i, j;
-
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- for (i = 0; i < num_of_rows; i++)
- {
- int ip_out = ((q31_t)(bias[i]) << bias_shift) + NN_ROUND(out_shift);
- for (j = 0; j < dim_vec; j++)
- {
- ip_out += pV[j] * pM[i * dim_vec + j];
- }
- pOut[i] = (q7_t) __SSAT((ip_out >> out_shift), 8);
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to ARM_MATH_SUCCESS */
- return (ARM_MATH_SUCCESS);
-
-}
-
-/**
- * @} end of FC group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c b/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c deleted file mode 100644 index d197adc..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/FullyConnectedFunctions/arm_fully_connected_q7_opt.c +++ /dev/null @@ -1,484 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_fully_connected_q7_opt.c
- * Description: Q7 basic fully-connected layer function
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup FC
- * @{
- */
-
- /**
- * @brief Q7 opt fully-connected layer function
- * @param[in] pV pointer to input vector
- * @param[in] pM pointer to matrix weights
- * @param[in] dim_vec length of the vector
- * @param[in] num_of_rows number of rows in weight matrix
- * @param[in] bias_shift amount of left-shift for bias
- * @param[in] out_shift amount of right-shift for output
- * @param[in] bias pointer to bias
- * @param[in,out] pOut pointer to output vector
- * @param[in,out] vec_buffer pointer to buffer space for input
- * @return The function returns <code>ARM_MATH_SUCCESS</code>
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * vec_buffer size: dim_vec
- *
- * This opt function is designed to work with interleaved weight
- * matrix. The vector input is assumed in q7_t format, we call
- * arm_q7_to_q15_no_shift_shuffle function to expand into
- * q15_t format with certain weight re-ordering, refer to the function
- * comments for more details.
- * Here we use only one pointer to read 4 rows in the weight
- * matrix. So if the original q7_t matrix looks like this:
- *
- * | a11 | a12 | a13 | a14 | a15 | a16 | a17 |
- *
- * | a21 | a22 | a23 | a24 | a25 | a26 | a27 |
- *
- * | a31 | a32 | a33 | a34 | a35 | a36 | a37 |
- *
- * | a41 | a42 | a43 | a44 | a45 | a46 | a47 |
- *
- * | a51 | a52 | a53 | a54 | a55 | a56 | a57 |
- *
- * | a61 | a62 | a63 | a64 | a65 | a66 | a67 |
- *
- *
- * We operates on multiple-of-4 rows, so the first four rows becomes
- *
- * | a11 | a21 | a13 | a23 | a31 | a41 | a33 | a43 |
- *
- * | a12 | a22 | a14 | a24 | a32 | a42 | a34 | a44 |
- *
- * | a15 | a25 | a35 | a45 | a16 | a26 | a36 | a46 |
- *
- * So within the kernel, we first read the re-ordered vector in as:
- *
- * | b1 | b3 | and | b2 | b4 |
- *
- * the four q31_t weights will look like
- *
- * | a11 | a13 |, | a21 | a23 |, | a31 | a33 |, | a41 | a43 |
- *
- * | a12 | a14 |, | a22 | a24 |, | a32 | a34 |, | a42 | a44 |
- *
- * The column left over will be in-order.
- * which is:
- *
- * | a17 | a27 | a37 | a47 |
- *
- * For the left-over rows, we do 1x1 computation, so the data remains
- * as its original order.
- *
- * So the stored weight matrix looks like this:
- *
- * | a11 | a21 | a13 | a23 | a31 | a41 |
- *
- * | a33 | a43 | a12 | a22 | a14 | a24 |
- *
- * | a32 | a42 | a34 | a44 | a15 | a25 |
- *
- * | a35 | a45 | a16 | a26 | a36 | a46 |
- *
- * | a17 | a27 | a37 | a47 | a51 | a52 |
- *
- * | a53 | a54 | a55 | a56 | a57 | a61 |
- *
- * | a62 | a63 | a64 | a65 | a66 | a67 |
- *
- *
- */
-
-arm_status
-arm_fully_connected_q7_opt(const q7_t * pV,
- const q7_t * pM,
- const uint16_t dim_vec,
- const uint16_t num_of_rows,
- const uint16_t bias_shift,
- const uint16_t out_shift,
- const q7_t * bias,
- q7_t * pOut,
- q15_t * vec_buffer)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- const q7_t *pB = pM;
- q7_t *pO = pOut;
- const q7_t *pBias = bias;
- q15_t *pA;
- uint16_t rowCnt = num_of_rows >> 2;
-
- arm_q7_to_q15_reordered_no_shift(pV, vec_buffer, dim_vec);
-
- while (rowCnt)
- {
-
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = dim_vec >> 2;
-
- pA = vec_buffer;
-
-#ifdef USE_INTRINSIC
-
-#ifndef ARM_MATH_BIG_ENDIAN
- while (colCnt)
- {
- q31_t inM11, inM12, inM13, inM14;
- q31_t inV;
-
- inV = *__SIMD32(pA)++;
- inM11 = *__SIMD32(pB)++;
- inM12 = __SXTB16(__ROR(inM11, 8));
- inM11 = __SXTB16(inM11);
- sum = __SMLAD(inM11, inV, sum);
- sum2 = __SMLAD(inM12, inV, sum2);
- inM13 = *__SIMD32(pB)++;
- inM14 = __SXTB16(__ROR(inM13, 8));
- inM13 = __SXTB16(inM13);
- sum3 = __SMLAD(inM13, inV, sum3);
- sum4 = __SMLAD(inM14, inV, sum4);
-
- inV = *__SIMD32(pA)++;
- inM11 = *__SIMD32(pB)++;
- inM12 = __SXTB16(__ROR(inM11, 8));
- inM11 = __SXTB16(inM11);
- sum = __SMLAD(inM11, inV, sum);
- sum2 = __SMLAD(inM12, inV, sum2);
- inM13 = *__SIMD32(pB)++;
- inM14 = __SXTB16(__ROR(inM13, 8));
- inM13 = __SXTB16(inM13);
- sum3 = __SMLAD(inM13, inV, sum3);
- sum4 = __SMLAD(inM14, inV, sum4);
- colCnt--;
- }
-#else
- while (colCnt)
- {
- q31_t inM11, inM12, inM13, inM14;
- q31_t inV;
-
- inV = *__SIMD32(pA)++;
- inM11 = *__SIMD32(pB)++;
- inM12 = __SXTB16(__ROR(inM11, 8));
- inM11 = __SXTB16(inM11);
- sum = __SMLAD(inM12, inV, sum);
- sum2 = __SMLAD(inM11, inV, sum2);
- inM13 = *__SIMD32(pB)++;
- inM14 = __SXTB16(__ROR(inM13, 8));
- inM13 = __SXTB16(inM13);
- sum3 = __SMLAD(inM14, inV, sum3);
- sum4 = __SMLAD(inM13, inV, sum4);
-
- inV = *__SIMD32(pA)++;
- inM11 = *__SIMD32(pB)++;
- inM12 = __SXTB16(__ROR(inM11, 8));
- inM11 = __SXTB16(inM11);
- sum = __SMLAD(inM12, inV, sum);
- sum2 = __SMLAD(inM11, inV, sum2);
- inM13 = *__SIMD32(pB)++;
- inM14 = __SXTB16(__ROR(inM13, 8));
- inM13 = __SXTB16(inM13);
- sum3 = __SMLAD(inM14, inV, sum3);
- sum4 = __SMLAD(inM13, inV, sum4);
- colCnt--;
- }
-#endif /* ARM_MATH_BIG_ENDIAN */
-
-#else
-
- /*
- * register needed:
- * loop counter: colCnt
- * accumulators: sum, sum2, sum3, sum4
- * pointers: pB, pA
- * weight data: inM11, inM12, inM13, inM14
- * activation data: inV
- */
-
-#ifndef ARM_MATH_BIG_ENDIAN
- asm volatile ("COL_LOOP_%=:\n"
- "ldr.w r4, [%[pA]], #8\n"
- "ldr.w r1, [%[pB]], #16\n"
- "mov.w r0, r1, ror #8\n"
- "sxtb16 r0, r0\n"
- "sxtb16 r1, r1\n"
- "smlad %[sum], r4, r1, %[sum]\n"
- "smlad %[sum2], r4, r0, %[sum2]\n"
- "ldr.w r3, [%[pB], #-12]\n"
- "mov.w r2, r3, ror #8\n"
- "sxtb16 r2, r2\n"
- "sxtb16 r3, r3\n"
- "smlad %[sum3], r4, r3, %[sum3]\n"
- "smlad %[sum4], r4, r2, %[sum4]\n"
- "ldr.w r4, [%[pA], #-4]\n"
- "ldr.w r1, [%[pB], #-8]\n"
- "mov.w r0, r1, ror #8\n"
- "sxtb16 r0, r0\n"
- "sxtb16 r1, r1\n"
- "smlad %[sum], r4, r1, %[sum]\n"
- "smlad %[sum2], r4, r0, %[sum2]\n"
- "ldr.w r3, [%[pB], #-4]\n"
- "mov.w r2, r3, ror #8\n"
- "sxtb16 r2, r2\n"
- "sxtb16 r3, r3\n"
- "smlad %[sum3], r4, r3, %[sum3]\n"
- "smlad %[sum4], r4, r2, %[sum4]\n"
- "subs %[colCnt], #1\n"
- "bne COL_LOOP_%=\n":[sum] "+r"(sum),
- [sum2] "+r"(sum2),[sum3] "+r"(sum3),
- [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
-#else
- asm volatile ("COL_LOOP_%=:\n"
- "ldr.w r4, [%[pA]], #8\n"
- "ldr.w r1, [%[pB]], #16\n"
- "mov.w r0, r1, ror #8\n"
- "sxtb16 r0, r0\n"
- "sxtb16 r1, r1\n"
- "smlad %[sum], r4, r0, %[sum]\n"
- "smlad %[sum2], r4, r1, %[sum2]\n"
- "ldr.w r3, [%[pB], #-12]\n"
- "mov.w r2, r3, ror #8\n"
- "sxtb16 r2, r2\n"
- "sxtb16 r3, r3\n"
- "smlad %[sum3], r4, r2, %[sum3]\n"
- "smlad %[sum4], r4, r3, %[sum4]\n"
- "ldr.w r4, [%[pA], #-4]\n"
- "ldr.w r1, [%[pB], #-8]\n"
- "mov.w r0, r1, ror #8\n"
- "sxtb16 r0, r0\n"
- "sxtb16 r1, r1\n"
- "smlad %[sum], r4, r0, %[sum]\n"
- "smlad %[sum2], r4, r1, %[sum2]\n"
- "ldr.w r3, [%[pB], #-4]\n"
- "mov.w r2, r3, ror #8\n"
- "sxtb16 r2, r2\n"
- "sxtb16 r3, r3\n"
- "smlad %[sum3], r4, r2, %[sum3]\n"
- "smlad %[sum4], r4, r3, %[sum4]\n"
- "subs %[colCnt], #1\n"
- "bne COL_LOOP_%=\n":[sum] "+r"(sum),
- [sum2] "+r"(sum2),[sum3] "+r"(sum3),
- [sum4] "+r"(sum4),[pB] "+r"(pB),[pA] "+r"(pA):[colCnt] "r"(colCnt):"r0", "r1", "r2", "r3", "r4");
-#endif /* ARM_MATH_BIG_ENDIAN */
-
-#endif /* USE_INTRINSIC */
-
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q15_t inV = *pA++;
- q7_t inM = *pB++;
- q7_t inM2 = *pB++;
- q7_t inM3 = *pB++;
- q7_t inM4 = *pB++;
-
- sum += inV * inM;
- sum2 += inV * inM2;
- sum3 += inV * inM3;
- sum4 += inV * inM4;
- colCnt--;
- } /* while over colCnt */
- *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8));
- *pO++ = (q7_t) (__SSAT((sum2 >> out_shift), 8));
- *pO++ = (q7_t) (__SSAT((sum3 >> out_shift), 8));
- *pO++ = (q7_t) (__SSAT((sum4 >> out_shift), 8));
-
- /* adjust the pointers and counters */
- rowCnt--;
- }
-
- /* left-over part of the rows */
- rowCnt = num_of_rows & 0x3;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- uint16_t colCnt = dim_vec >> 2;
-
- pA = vec_buffer;
-
- while (colCnt)
- {
- q31_t inV1, inV2, inM11, inM12;
-
- pB = (q7_t *) read_and_pad_reordered((void *)pB, &inM11, &inM12);
-
- inV1 = *__SIMD32(pA)++;
- sum = __SMLAD(inV1, inM11, sum);
-
- inV2 = *__SIMD32(pA)++;
- sum = __SMLAD(inV2, inM12, sum);
-
- colCnt--;
- }
-
- /* left-over of the vector */
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q15_t inV = *pA++;
- q7_t inM = *pB++;
- sum += inV * inM;
- colCnt--;
- }
-
- *pO++ = (q7_t) (__SSAT((sum >> out_shift), 8));
-
- rowCnt--;
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
- uint16_t rowCnt = num_of_rows >> 2;
- const q7_t *pB = pM;
- const q7_t *pA;
- q7_t *pO = pOut;
- const q7_t *pBias = bias;
-
- while (rowCnt)
- {
- q31_t sum = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum2 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum3 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
- q31_t sum4 = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- uint16_t colCnt = dim_vec >> 2;
-
- pA = pV;
-
- while (colCnt)
- {
- q7_t inA1 = *pA++;
- q7_t inA3 = *pA++;
- q7_t inA2 = *pA++;
- q7_t inA4 = *pA++;
-
- q7_t inB1 = *pB++;
- q7_t inB3 = *pB++;
- q7_t inB2 = *pB++;
- q7_t inB4 = *pB++;
-
- sum += inA1 * inB1 + inA2 * inB2;
- sum2 += inA1 * inB3 + inA2 * inB4;
-
- inB1 = *pB++;
- inB3 = *pB++;
- inB2 = *pB++;
- inB4 = *pB++;
-
- sum3 += inA1 * inB1 + inA2 * inB2;
- sum4 += inA1 * inB3 + inA2 * inB4;
-
- inB1 = *pB++;
- inB3 = *pB++;
- inB2 = *pB++;
- inB4 = *pB++;
-
- sum += inA3 * inB1 + inA4 * inB2;
- sum2 += inA3 * inB3 + inA4 * inB4;
-
- inB1 = *pB++;
- inB3 = *pB++;
- inB2 = *pB++;
- inB4 = *pB++;
-
- sum3 += inA3 * inB1 + inA4 * inB2;
- sum4 += inA3 * inB3 + inA4 * inB4;
-
- colCnt--;
- }
- colCnt = dim_vec & 0x3;
- while (colCnt)
- {
- q7_t inA = *pA++;
- q7_t inB = *pB++;
- sum += inA * inB;
- inB = *pB++;
- sum2 += inA * inB;
- inB = *pB++;
- sum3 += inA * inB;
- inB = *pB++;
- sum4 += inA * inB;
-
- colCnt--;
- }
- *pO++ = (q7_t) __SSAT((sum >> out_shift), 8);
- *pO++ = (q7_t) __SSAT((sum2 >> out_shift), 8);
- *pO++ = (q7_t) __SSAT((sum3 >> out_shift), 8);
- *pO++ = (q7_t) __SSAT((sum4 >> out_shift), 8);
-
- rowCnt--;
- }
-
- rowCnt = num_of_rows & 0x3;
-
- while (rowCnt)
- {
- int ip_out = ((q31_t)(*pBias++) << bias_shift) + NN_ROUND(out_shift);
-
- int j;
-
- pA = pV;
- for (j = 0; j < dim_vec; j++)
- {
- q7_t inA = *pA++;
- q7_t inB = *pB++;
- ip_out += inA * inB;
- }
- *pO++ = (q7_t) __SSAT((ip_out >> out_shift), 8);
-
- rowCnt--;
- }
-
-#endif /* ARM_MATH_DSP */
-
- /* Return to ARM_MATH_SUCCESS */
- return (ARM_MATH_SUCCESS);
-
-}
-
-/**
- * @} end of FC group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c b/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c deleted file mode 100644 index de7668b..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q15.c +++ /dev/null @@ -1,147 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nn_mult_q15.c
- * Description: Q15 vector multiplication with variable output shifts
- *
- * $Date: 13. July 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupSupport
- */
-
-/**
- * @addtogroup NNBasicMath
- * @{
- */
-
-
-/**
- * @brief Q7 vector multiplication with variable output shifts
- * @param[in] *pSrcA pointer to the first input vector
- * @param[in] *pSrcB pointer to the second input vector
- * @param[out] *pDst pointer to the output vector
- * @param[in] out_shift amount of right-shift for output
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
- */
-
-void arm_nn_mult_q15(
- q15_t * pSrcA,
- q15_t * pSrcB,
- q15_t * pDst,
- const uint16_t out_shift,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counters */
-
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q31_t inA1, inA2, inB1, inB2; /* temporary input variables */
- q15_t out1, out2, out3, out4; /* temporary output variables */
- q31_t mul1, mul2, mul3, mul4; /* temporary variables */
-
- /* loop Unrolling */
- blkCnt = blockSize >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* read two samples at a time from sourceA */
- inA1 = *__SIMD32(pSrcA)++;
- /* read two samples at a time from sourceB */
- inB1 = *__SIMD32(pSrcB)++;
- /* read two samples at a time from sourceA */
- inA2 = *__SIMD32(pSrcA)++;
- /* read two samples at a time from sourceB */
- inB2 = *__SIMD32(pSrcB)++;
-
- /* multiply mul = sourceA * sourceB */
- mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
- mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
- mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
- mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
-
- /* saturate result to 16 bit */
- out1 = (q15_t) __SSAT((mul1 + NN_ROUND(out_shift)) >> out_shift, 16);
- out2 = (q15_t) __SSAT((mul2 + NN_ROUND(out_shift)) >> out_shift, 16);
- out3 = (q15_t) __SSAT((mul3 + NN_ROUND(out_shift)) >> out_shift, 16);
- out4 = (q15_t) __SSAT((mul4 + NN_ROUND(out_shift)) >> out_shift, 16);
-
- /* store the result */
-#ifndef ARM_MATH_BIG_ENDIAN
-
- *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
- *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
-#else
-
- *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
- *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
- while (blkCnt > 0U)
- {
- /* C = A * B */
- /* Multiply the inputs and store the result in the destination buffer */
- *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 16);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of NNBasicMath group
- */
-
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c b/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c deleted file mode 100644 index 1b4e02c..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nn_mult_q7.c +++ /dev/null @@ -1,119 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nn_mult_q7.c
- * Description: Q7 vector multiplication with variable output shifts
- *
- * $Date: 13. July 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupSupport
- */
-
-/**
- * @addtogroup NNBasicMath
- * @{
- */
-
-/**
- * @brief Q7 vector multiplication with variable output shifts
- * @param[in] *pSrcA pointer to the first input vector
- * @param[in] *pSrcB pointer to the second input vector
- * @param[out] *pDst pointer to the output vector
- * @param[in] out_shift amount of right-shift for output
- * @param[in] blockSize number of samples in each vector
- * @return none.
- *
- * <b>Scaling and Overflow Behavior:</b>
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
- */
-
-void arm_nn_mult_q7(
- q7_t * pSrcA,
- q7_t * pSrcB,
- q7_t * pDst,
- const uint16_t out_shift,
- uint32_t blockSize)
-{
- uint32_t blkCnt; /* loop counters */
-
-#if defined (ARM_MATH_DSP)
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
- q7_t out1, out2, out3, out4; /* Temporary variables to store the product */
-
- /* loop Unrolling */
- blkCnt = blockSize >> 2U;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0U)
- {
- /* C = A * B */
- /* Multiply the inputs and store the results in temporary variables */
- out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
- out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
- out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
- out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
-
- /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
- *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4U;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Initialize blkCnt with number of samples */
- blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-
- while (blkCnt > 0U)
- {
- /* C = A * B */
- /* Multiply the inputs and store the result in the destination buffer */
- *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++) + NN_ROUND(out_shift)) >> out_shift), 8);
-
- /* Decrement the blockSize loop counter */
- blkCnt--;
- }
-}
-
-/**
- * @} end of NNBasicMath group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c b/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c deleted file mode 100644 index cabd9b1..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_nntables.c +++ /dev/null @@ -1,297 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_nntables.c
- * Description: Converts the elements of the Q7 vector to Q15 vector without left-shift
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_nnsupportfunctions.h"
-
-/**
- * @brief tables for various activation functions
- *
- * This file include the declaration of common tables.
- * Most of them are used for activation functions
- *
- * Assumption:
- * Unified table: input is 3.x format, i.e, range of [-8, 8)
- * sigmoid(8) = 0.9996646498695336
- * tanh(8) = 0.9999997749296758
- * The accuracy here should be good enough
- *
- * 2-stage HL table:
- *
- * The entire input range is divided into two parts:
- *
- * Low range table: 0x000x xxxx or 0x111x xxxx
- * table entry will be the binary number excluding the first
- * two digits, i.e., 0x0x xxxx or 0x1x xxxx
- *
- *
- *
- * High range table 0x0010 0000 -- 0x0111 1111
- * 0x1000 0000 -- 0x1101 1111
- *
- * For positive numbers, table entry will be
- * 0x0010 0000 -- 0x0111 1111 minus 0x0010 0000
- * i.e., 0x0000 0000 - 0x0101 11111
- *
- * same thing for the negative numbers, table entry will be
- * 0x1000 0000 -- 0x1101 1111 minux 0x0010 0000
- * i.e., 0x0110 0000 - 0x1011 1111
- */
-
-const q7_t sigmoidTable_q7[256] = {
- 0x40, 0x42, 0x44, 0x46, 0x48, 0x4a, 0x4c, 0x4e,
- 0x50, 0x52, 0x53, 0x55, 0x57, 0x59, 0x5a, 0x5c,
- 0x5e, 0x5f, 0x61, 0x62, 0x63, 0x65, 0x66, 0x67,
- 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f, 0x70,
- 0x71, 0x72, 0x72, 0x73, 0x74, 0x74, 0x75, 0x76,
- 0x76, 0x77, 0x77, 0x78, 0x78, 0x79, 0x79, 0x7a,
- 0x7a, 0x7a, 0x7b, 0x7b, 0x7b, 0x7c, 0x7c, 0x7c,
- 0x7c, 0x7c, 0x7d, 0x7d, 0x7d, 0x7d, 0x7d, 0x7e,
- 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
- 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
- 0x01, 0x01, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02,
- 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 0x03, 0x04,
- 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x06,
- 0x06, 0x06, 0x07, 0x07, 0x08, 0x08, 0x09, 0x09,
- 0x0a, 0x0a, 0x0b, 0x0c, 0x0c, 0x0d, 0x0e, 0x0e,
- 0x0f, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16,
- 0x17, 0x19, 0x1a, 0x1b, 0x1d, 0x1e, 0x1f, 0x21,
- 0x22, 0x24, 0x26, 0x27, 0x29, 0x2b, 0x2d, 0x2e,
- 0x30, 0x32, 0x34, 0x36, 0x38, 0x3a, 0x3c, 0x3e,
-};
-
-const q15_t sigmoidTable_q15[256] = {
- 0x4000, 0x4200, 0x43ff, 0x45fc, 0x47f5, 0x49eb, 0x4bdc, 0x4dc8,
- 0x4fad, 0x518a, 0x5360, 0x552c, 0x56ef, 0x58a8, 0x5a57, 0x5bfb,
- 0x5d93, 0x5f20, 0x60a1, 0x6216, 0x637f, 0x64db, 0x662b, 0x676f,
- 0x68a6, 0x69d2, 0x6af1, 0x6c05, 0x6d0d, 0x6e09, 0x6efb, 0x6fe2,
- 0x70be, 0x7190, 0x7258, 0x7316, 0x73cc, 0x7478, 0x751b, 0x75b7,
- 0x764a, 0x76d6, 0x775b, 0x77d8, 0x784f, 0x78c0, 0x792a, 0x798f,
- 0x79ee, 0x7a48, 0x7a9d, 0x7aed, 0x7b39, 0x7b80, 0x7bc4, 0x7c03,
- 0x7c3f, 0x7c78, 0x7cad, 0x7ce0, 0x7d0f, 0x7d3c, 0x7d66, 0x7d8d,
- 0x7db3, 0x7dd6, 0x7df7, 0x7e16, 0x7e33, 0x7e4f, 0x7e69, 0x7e81,
- 0x7e98, 0x7eae, 0x7ec2, 0x7ed5, 0x7ee7, 0x7ef8, 0x7f08, 0x7f17,
- 0x7f25, 0x7f32, 0x7f3e, 0x7f4a, 0x7f55, 0x7f5f, 0x7f69, 0x7f72,
- 0x7f7b, 0x7f83, 0x7f8a, 0x7f91, 0x7f98, 0x7f9e, 0x7fa4, 0x7faa,
- 0x7faf, 0x7fb4, 0x7fb8, 0x7fbd, 0x7fc1, 0x7fc5, 0x7fc8, 0x7fcc,
- 0x7fcf, 0x7fd2, 0x7fd5, 0x7fd7, 0x7fda, 0x7fdc, 0x7fde, 0x7fe0,
- 0x7fe2, 0x7fe4, 0x7fe6, 0x7fe7, 0x7fe9, 0x7fea, 0x7feb, 0x7fed,
- 0x7fee, 0x7fef, 0x7ff0, 0x7ff1, 0x7ff2, 0x7ff3, 0x7ff4, 0x7ff4,
- 0x000b, 0x000c, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010, 0x0011,
- 0x0012, 0x0013, 0x0015, 0x0016, 0x0017, 0x0019, 0x001a, 0x001c,
- 0x001e, 0x0020, 0x0022, 0x0024, 0x0026, 0x0029, 0x002b, 0x002e,
- 0x0031, 0x0034, 0x0038, 0x003b, 0x003f, 0x0043, 0x0048, 0x004c,
- 0x0051, 0x0056, 0x005c, 0x0062, 0x0068, 0x006f, 0x0076, 0x007d,
- 0x0085, 0x008e, 0x0097, 0x00a1, 0x00ab, 0x00b6, 0x00c2, 0x00ce,
- 0x00db, 0x00e9, 0x00f8, 0x0108, 0x0119, 0x012b, 0x013e, 0x0152,
- 0x0168, 0x017f, 0x0197, 0x01b1, 0x01cd, 0x01ea, 0x0209, 0x022a,
- 0x024d, 0x0273, 0x029a, 0x02c4, 0x02f1, 0x0320, 0x0353, 0x0388,
- 0x03c1, 0x03fd, 0x043c, 0x0480, 0x04c7, 0x0513, 0x0563, 0x05b8,
- 0x0612, 0x0671, 0x06d6, 0x0740, 0x07b1, 0x0828, 0x08a5, 0x092a,
- 0x09b6, 0x0a49, 0x0ae5, 0x0b88, 0x0c34, 0x0cea, 0x0da8, 0x0e70,
- 0x0f42, 0x101e, 0x1105, 0x11f7, 0x12f3, 0x13fb, 0x150f, 0x162e,
- 0x175a, 0x1891, 0x19d5, 0x1b25, 0x1c81, 0x1dea, 0x1f5f, 0x20e0,
- 0x226d, 0x2405, 0x25a9, 0x2758, 0x2911, 0x2ad4, 0x2ca0, 0x2e76,
- 0x3053, 0x3238, 0x3424, 0x3615, 0x380b, 0x3a04, 0x3c01, 0x3e00,
-};
-
-const q15_t sigmoidLTable_q15[128] = {
- 0x4000, 0x4100, 0x4200, 0x42ff, 0x43ff, 0x44fd, 0x45fc, 0x46f9,
- 0x47f5, 0x48f1, 0x49eb, 0x4ae5, 0x4bdc, 0x4cd3, 0x4dc8, 0x4ebb,
- 0x4fad, 0x509c, 0x518a, 0x5276, 0x5360, 0x5447, 0x552c, 0x560f,
- 0x56ef, 0x57cd, 0x58a8, 0x5981, 0x5a57, 0x5b2a, 0x5bfb, 0x5cc9,
- 0x5d93, 0x5e5b, 0x5f20, 0x5fe2, 0x60a1, 0x615d, 0x6216, 0x62cc,
- 0x637f, 0x642e, 0x64db, 0x6584, 0x662b, 0x66ce, 0x676f, 0x680c,
- 0x68a6, 0x693d, 0x69d2, 0x6a63, 0x6af1, 0x6b7c, 0x6c05, 0x6c8a,
- 0x6d0d, 0x6d8d, 0x6e09, 0x6e84, 0x6efb, 0x6f70, 0x6fe2, 0x7051,
- 0x0f42, 0x0faf, 0x101e, 0x1090, 0x1105, 0x117c, 0x11f7, 0x1273,
- 0x12f3, 0x1376, 0x13fb, 0x1484, 0x150f, 0x159d, 0x162e, 0x16c3,
- 0x175a, 0x17f4, 0x1891, 0x1932, 0x19d5, 0x1a7c, 0x1b25, 0x1bd2,
- 0x1c81, 0x1d34, 0x1dea, 0x1ea3, 0x1f5f, 0x201e, 0x20e0, 0x21a5,
- 0x226d, 0x2337, 0x2405, 0x24d6, 0x25a9, 0x267f, 0x2758, 0x2833,
- 0x2911, 0x29f1, 0x2ad4, 0x2bb9, 0x2ca0, 0x2d8a, 0x2e76, 0x2f64,
- 0x3053, 0x3145, 0x3238, 0x332d, 0x3424, 0x351b, 0x3615, 0x370f,
- 0x380b, 0x3907, 0x3a04, 0x3b03, 0x3c01, 0x3d01, 0x3e00, 0x3f00,
-};
-
-const q15_t sigmoidHTable_q15[192] = {
- 0x70be, 0x7190, 0x7258, 0x7316, 0x73cc, 0x7478, 0x751b, 0x75b7,
- 0x764a, 0x76d6, 0x775b, 0x77d8, 0x784f, 0x78c0, 0x792a, 0x798f,
- 0x79ee, 0x7a48, 0x7a9d, 0x7aed, 0x7b39, 0x7b80, 0x7bc4, 0x7c03,
- 0x7c3f, 0x7c78, 0x7cad, 0x7ce0, 0x7d0f, 0x7d3c, 0x7d66, 0x7d8d,
- 0x7db3, 0x7dd6, 0x7df7, 0x7e16, 0x7e33, 0x7e4f, 0x7e69, 0x7e81,
- 0x7e98, 0x7eae, 0x7ec2, 0x7ed5, 0x7ee7, 0x7ef8, 0x7f08, 0x7f17,
- 0x7f25, 0x7f32, 0x7f3e, 0x7f4a, 0x7f55, 0x7f5f, 0x7f69, 0x7f72,
- 0x7f7b, 0x7f83, 0x7f8a, 0x7f91, 0x7f98, 0x7f9e, 0x7fa4, 0x7faa,
- 0x7faf, 0x7fb4, 0x7fb8, 0x7fbd, 0x7fc1, 0x7fc5, 0x7fc8, 0x7fcc,
- 0x7fcf, 0x7fd2, 0x7fd5, 0x7fd7, 0x7fda, 0x7fdc, 0x7fde, 0x7fe0,
- 0x7fe2, 0x7fe4, 0x7fe6, 0x7fe7, 0x7fe9, 0x7fea, 0x7feb, 0x7fed,
- 0x7fee, 0x7fef, 0x7ff0, 0x7ff1, 0x7ff2, 0x7ff3, 0x7ff4, 0x7ff4,
- 0x000b, 0x000c, 0x000c, 0x000d, 0x000e, 0x000f, 0x0010, 0x0011,
- 0x0012, 0x0013, 0x0015, 0x0016, 0x0017, 0x0019, 0x001a, 0x001c,
- 0x001e, 0x0020, 0x0022, 0x0024, 0x0026, 0x0029, 0x002b, 0x002e,
- 0x0031, 0x0034, 0x0038, 0x003b, 0x003f, 0x0043, 0x0048, 0x004c,
- 0x0051, 0x0056, 0x005c, 0x0062, 0x0068, 0x006f, 0x0076, 0x007d,
- 0x0085, 0x008e, 0x0097, 0x00a1, 0x00ab, 0x00b6, 0x00c2, 0x00ce,
- 0x00db, 0x00e9, 0x00f8, 0x0108, 0x0119, 0x012b, 0x013e, 0x0152,
- 0x0168, 0x017f, 0x0197, 0x01b1, 0x01cd, 0x01ea, 0x0209, 0x022a,
- 0x024d, 0x0273, 0x029a, 0x02c4, 0x02f1, 0x0320, 0x0353, 0x0388,
- 0x03c1, 0x03fd, 0x043c, 0x0480, 0x04c7, 0x0513, 0x0563, 0x05b8,
- 0x0612, 0x0671, 0x06d6, 0x0740, 0x07b1, 0x0828, 0x08a5, 0x092a,
- 0x09b6, 0x0a49, 0x0ae5, 0x0b88, 0x0c34, 0x0cea, 0x0da8, 0x0e70,
-};
-
-const q7_t tanhTable_q7[256] = {
- 0x00, 0x08, 0x10, 0x18, 0x1f, 0x27, 0x2e, 0x35,
- 0x3b, 0x41, 0x47, 0x4c, 0x51, 0x56, 0x5a, 0x5e,
- 0x61, 0x65, 0x68, 0x6a, 0x6d, 0x6f, 0x71, 0x72,
- 0x74, 0x75, 0x76, 0x78, 0x78, 0x79, 0x7a, 0x7b,
- 0x7b, 0x7c, 0x7c, 0x7d, 0x7d, 0x7e, 0x7e, 0x7e,
- 0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80,
- 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x81,
- 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x82,
- 0x82, 0x82, 0x82, 0x82, 0x83, 0x83, 0x84, 0x84,
- 0x85, 0x85, 0x86, 0x87, 0x88, 0x88, 0x8a, 0x8b,
- 0x8c, 0x8e, 0x8f, 0x91, 0x93, 0x96, 0x98, 0x9b,
- 0x9f, 0xa2, 0xa6, 0xaa, 0xaf, 0xb4, 0xb9, 0xbf,
- 0xc5, 0xcb, 0xd2, 0xd9, 0xe1, 0xe8, 0xf0, 0xf8,
-};
-
-const q15_t tanhTable_q15[256] = {
- 0x0000, 0x07fd, 0x0feb, 0x17b9, 0x1f59, 0x26bf, 0x2ddf, 0x34ae,
- 0x3b27, 0x4142, 0x46fd, 0x4c56, 0x514d, 0x55e2, 0x5a1a, 0x5df6,
- 0x617c, 0x64b0, 0x6797, 0x6a37, 0x6c95, 0x6eb5, 0x709e, 0x7254,
- 0x73dc, 0x753a, 0x7672, 0x7788, 0x787f, 0x795b, 0x7a1e, 0x7acb,
- 0x7b65, 0x7bee, 0x7c66, 0x7cd1, 0x7d30, 0x7d84, 0x7dce, 0x7e0f,
- 0x7e49, 0x7e7d, 0x7eaa, 0x7ed2, 0x7ef5, 0x7f14, 0x7f30, 0x7f48,
- 0x7f5e, 0x7f71, 0x7f82, 0x7f91, 0x7f9e, 0x7fa9, 0x7fb3, 0x7fbc,
- 0x7fc4, 0x7fcb, 0x7fd1, 0x7fd7, 0x7fdc, 0x7fe0, 0x7fe4, 0x7fe7,
- 0x7fea, 0x7fed, 0x7fef, 0x7ff1, 0x7ff3, 0x7ff4, 0x7ff6, 0x7ff7,
- 0x7ff8, 0x7ff9, 0x7ffa, 0x7ffa, 0x7ffb, 0x7ffc, 0x7ffc, 0x7ffd,
- 0x7ffd, 0x7ffd, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001,
- 0x8001, 0x8001, 0x8001, 0x8002, 0x8002, 0x8002, 0x8002, 0x8003,
- 0x8003, 0x8003, 0x8004, 0x8004, 0x8005, 0x8006, 0x8006, 0x8007,
- 0x8008, 0x8009, 0x800a, 0x800c, 0x800d, 0x800f, 0x8011, 0x8013,
- 0x8016, 0x8019, 0x801c, 0x8020, 0x8024, 0x8029, 0x802f, 0x8035,
- 0x803c, 0x8044, 0x804d, 0x8057, 0x8062, 0x806f, 0x807e, 0x808f,
- 0x80a2, 0x80b8, 0x80d0, 0x80ec, 0x810b, 0x812e, 0x8156, 0x8183,
- 0x81b7, 0x81f1, 0x8232, 0x827c, 0x82d0, 0x832f, 0x839a, 0x8412,
- 0x849b, 0x8535, 0x85e2, 0x86a5, 0x8781, 0x8878, 0x898e, 0x8ac6,
- 0x8c24, 0x8dac, 0x8f62, 0x914b, 0x936b, 0x95c9, 0x9869, 0x9b50,
- 0x9e84, 0xa20a, 0xa5e6, 0xaa1e, 0xaeb3, 0xb3aa, 0xb903, 0xbebe,
- 0xc4d9, 0xcb52, 0xd221, 0xd941, 0xe0a7, 0xe847, 0xf015, 0xf803,
-};
-
-const q15_t tanhLTable_q15[128] = {
- 0x0000, 0x0400, 0x07fd, 0x0bf7, 0x0feb, 0x13d7, 0x17b9, 0x1b90,
- 0x1f59, 0x2314, 0x26bf, 0x2a58, 0x2ddf, 0x3151, 0x34ae, 0x37f6,
- 0x3b27, 0x3e40, 0x4142, 0x442c, 0x46fd, 0x49b6, 0x4c56, 0x4edd,
- 0x514d, 0x53a3, 0x55e2, 0x580a, 0x5a1a, 0x5c13, 0x5df6, 0x5fc4,
- 0x617c, 0x6320, 0x64b0, 0x662d, 0x6797, 0x68f0, 0x6a37, 0x6b6e,
- 0x6c95, 0x6dac, 0x6eb5, 0x6fb0, 0x709e, 0x717f, 0x7254, 0x731e,
- 0x73dc, 0x7490, 0x753a, 0x75da, 0x7672, 0x7701, 0x7788, 0x7807,
- 0x787f, 0x78f0, 0x795b, 0x79bf, 0x7a1e, 0x7a77, 0x7acb, 0x7b1b,
- 0x849b, 0x84e5, 0x8535, 0x8589, 0x85e2, 0x8641, 0x86a5, 0x8710,
- 0x8781, 0x87f9, 0x8878, 0x88ff, 0x898e, 0x8a26, 0x8ac6, 0x8b70,
- 0x8c24, 0x8ce2, 0x8dac, 0x8e81, 0x8f62, 0x9050, 0x914b, 0x9254,
- 0x936b, 0x9492, 0x95c9, 0x9710, 0x9869, 0x99d3, 0x9b50, 0x9ce0,
- 0x9e84, 0xa03c, 0xa20a, 0xa3ed, 0xa5e6, 0xa7f6, 0xaa1e, 0xac5d,
- 0xaeb3, 0xb123, 0xb3aa, 0xb64a, 0xb903, 0xbbd4, 0xbebe, 0xc1c0,
- 0xc4d9, 0xc80a, 0xcb52, 0xceaf, 0xd221, 0xd5a8, 0xd941, 0xdcec,
- 0xe0a7, 0xe470, 0xe847, 0xec29, 0xf015, 0xf409, 0xf803, 0xfc00,
-};
-
-const q15_t tanhHTable_q15[192] = {
- 0x7b65, 0x7bee, 0x7c66, 0x7cd1, 0x7d30, 0x7d84, 0x7dce, 0x7e0f,
- 0x7e49, 0x7e7d, 0x7eaa, 0x7ed2, 0x7ef5, 0x7f14, 0x7f30, 0x7f48,
- 0x7f5e, 0x7f71, 0x7f82, 0x7f91, 0x7f9e, 0x7fa9, 0x7fb3, 0x7fbc,
- 0x7fc4, 0x7fcb, 0x7fd1, 0x7fd7, 0x7fdc, 0x7fe0, 0x7fe4, 0x7fe7,
- 0x7fea, 0x7fed, 0x7fef, 0x7ff1, 0x7ff3, 0x7ff4, 0x7ff6, 0x7ff7,
- 0x7ff8, 0x7ff9, 0x7ffa, 0x7ffa, 0x7ffb, 0x7ffc, 0x7ffc, 0x7ffd,
- 0x7ffd, 0x7ffd, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000, 0x8000,
- 0x8000, 0x8000, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001,
- 0x8001, 0x8001, 0x8001, 0x8002, 0x8002, 0x8002, 0x8002, 0x8003,
- 0x8003, 0x8003, 0x8004, 0x8004, 0x8005, 0x8006, 0x8006, 0x8007,
- 0x8008, 0x8009, 0x800a, 0x800c, 0x800d, 0x800f, 0x8011, 0x8013,
- 0x8016, 0x8019, 0x801c, 0x8020, 0x8024, 0x8029, 0x802f, 0x8035,
- 0x803c, 0x8044, 0x804d, 0x8057, 0x8062, 0x806f, 0x807e, 0x808f,
- 0x80a2, 0x80b8, 0x80d0, 0x80ec, 0x810b, 0x812e, 0x8156, 0x8183,
- 0x81b7, 0x81f1, 0x8232, 0x827c, 0x82d0, 0x832f, 0x839a, 0x8412,
-};
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c b/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c deleted file mode 100644 index e043b38..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_no_shift.c +++ /dev/null @@ -1,134 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_q7_to_q15_no_shift.c
- * Description: Converts the elements of the Q7 vector to Q15 vector without left-shift
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_nnsupportfunctions.h"
-
-/**
- * @ingroup groupSupport
- */
-
-/**
- * @addtogroup nndata_convert
- * @{
- */
-
-/**
- * @brief Converts the elements of the Q7 vector to Q15 vector without left-shift
- * @param[in] *pSrc points to the Q7 input vector
- * @param[out] *pDst points to the Q15 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * \par Description:
- *
- * The equation used for the conversion process is:
- *
- * <pre>
- * pDst[n] = (q15_t) pSrc[n]; 0 <= n < blockSize.
- * </pre>
- *
- */
-
-void arm_q7_to_q15_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize)
-{
- const q7_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
- q31_t in;
- q31_t in1, in2;
- q31_t out1, out2;
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0u)
- {
- /* C = (q15_t) A << 8 */
- /* convert from q7 to q15 and then store the results in the destination buffer */
- in = *__SIMD32(pIn)++;
-
- /* rotatate in by 8 and extend two q7_t values to q15_t values */
- in1 = __SXTB16(__ROR(in, 8));
-
- /* extend remainig two q7_t values to q15_t values */
- in2 = __SXTB16(in);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
- out2 = __PKHTB(in1, in2, 16);
- out1 = __PKHBT(in2, in1, 16);
-
-#else
-
- out1 = __PKHTB(in1, in2, 16);
- out2 = __PKHBT(in2, in1, 16);
-
-#endif
-
- *__SIMD32(pDst)++ = out1;
- *__SIMD32(pDst)++ = out2;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while (blkCnt > 0u)
- {
- /* C = (q15_t) A << 8 */
- /* convert from q7 to q15 and then store the results in the destination buffer */
- *pDst++ = (q15_t) * pIn++;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-}
-
-/**
- * @} end of nndata_convert group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c b/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c deleted file mode 100644 index 52f5f8e..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/NNSupportFunctions/arm_q7_to_q15_reordered_no_shift.c +++ /dev/null @@ -1,145 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_q7_to_q15_reordered_no_shift.c
- * Description: Converts the elements of the Q7 vector to reordered Q15 vector without left-shift
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_nnsupportfunctions.h"
-
-/**
- * @ingroup groupSupport
- */
-
-/**
- * @addtogroup nndata_convert
- * @{
- */
-
-/**
- * @brief Converts the elements of the Q7 vector to reordered Q15 vector without left-shift
- * @param[in] *pSrc points to the Q7 input vector
- * @param[out] *pDst points to the Q15 output vector
- * @param[in] blockSize length of the input vector
- * @return none.
- *
- * @details
- *
- * This function does the q7 to q15 expansion with re-ordering
- *
- * <pre>
- * | A1 | A2 | A3 | A4 |
- *
- * 0 7 8 15 16 23 24 31
- * </pre>
- *
- * is converted into:
- *
- * <pre>
- * | A1 | A3 | and | A2 | A4 |
- *
- * 0 15 16 31 0 15 16 31
- * </pre>
- *
- *
- * This looks strange but is natural considering how sign-extension is done at
- * assembly level.
- *
- * The expansion of other other oprand will follow the same rule so that the end
- * results are the same.
- *
- * The tail (i.e., last (N % 4) elements) will still be in original order.
- *
- */
-
-void arm_q7_to_q15_reordered_no_shift(const q7_t * pSrc, q15_t * pDst, uint32_t blockSize)
-{
- const q7_t *pIn = pSrc; /* Src pointer */
- uint32_t blkCnt; /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
- q31_t in;
- q31_t in1, in2;
-
- /* Run the below code for Cortex-M4 and Cortex-M3 */
-
- /*loop Unrolling */
- blkCnt = blockSize >> 2u;
-
- /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
- ** a second loop below computes the remaining 1 to 3 samples. */
- while (blkCnt > 0u)
- {
- /* C = (q15_t) A << 8 */
- /* convert from q7 to q15 and then store the results in the destination buffer */
- in = *__SIMD32(pIn)++;
-
- /* rotatate in by 8 and extend two q7_t values to q15_t values */
- in1 = __SXTB16(__ROR(in, 8));
-
- /* extend remainig two q7_t values to q15_t values */
- in2 = __SXTB16(in);
-
-#ifndef ARM_MATH_BIG_ENDIAN
- *__SIMD32(pDst)++ = in2;
- *__SIMD32(pDst)++ = in1;
-#else
- *__SIMD32(pDst)++ = in1;
- *__SIMD32(pDst)++ = in2;
-#endif
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
- /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
- ** No loop unrolling is used. */
- blkCnt = blockSize % 0x4u;
-
-#else
-
- /* Run the below code for Cortex-M0 */
-
- /* Loop over blockSize number of values */
- blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
- while (blkCnt > 0u)
- {
- /* C = (q15_t) A << 8 */
- /* convert from q7 to q15 and then store the results in the destination buffer */
- *pDst++ = (q15_t) * pIn++;
-
- /* Decrement the loop counter */
- blkCnt--;
- }
-
-}
-
-/**
- * @} end of q7_to_x group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c b/hid-dials/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c deleted file mode 100644 index 2759731..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/PoolingFunctions/arm_pool_q7_HWC.c +++ /dev/null @@ -1,448 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_pool_q7_HWC.c
- * Description: Pooling function implementations
- *
- * $Date: 17. January 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-#if defined (ARM_MATH_DSP)
-
-/**
- * @brief A few utility functions used by pooling functions
- *
- *
- */
-
-static void buffer_scale_back_q15_to_q7(q15_t * buffer, q7_t * target, uint16_t length, uint16_t scale)
-{
- int i;
-
- for (i = 0; i < length; i++)
- {
- target[i] = (q7_t) (buffer[i] / scale);
- }
-}
-
-static void compare_and_replace_if_larger_q7(q7_t * base, // base data
- q7_t * target, // compare target
- const uint16_t length // data length
- )
-{
- q7_t *pIn = base;
- q7_t *pCom = target;
- union arm_nnword in;
- union arm_nnword com;
- uint16_t cnt = length >> 2;
-
- while (cnt > 0u)
- {
- in.word = *__SIMD32(pIn);
- com.word = *__SIMD32(pCom)++;
-
- // if version
- if (com.bytes[0] > in.bytes[0])
- in.bytes[0] = com.bytes[0];
- if (com.bytes[1] > in.bytes[1])
- in.bytes[1] = com.bytes[1];
- if (com.bytes[2] > in.bytes[2])
- in.bytes[2] = com.bytes[2];
- if (com.bytes[3] > in.bytes[3])
- in.bytes[3] = com.bytes[3];
-
- *__SIMD32(pIn)++ = in.word;
-
- cnt--;
- }
-}
-
-static void accumulate_q7_to_q15(q15_t * base, q7_t * target, const uint16_t length)
-{
- q15_t *pCnt = base;
- q7_t *pV = target;
- q31_t v1, v2, vo1, vo2;
- uint16_t cnt = length >> 2;
- q31_t in;
-
- while (cnt > 0u)
- {
- q31_t value = *__SIMD32(pV)++;
- v1 = __SXTB16(__ROR(value, 8));
- v2 = __SXTB16(value);
-#ifndef ARM_MATH_BIG_ENDIAN
-
- vo2 = __PKHTB(v1, v2, 16);
- vo1 = __PKHBT(v2, v1, 16);
-
-#else
-
- vo1 = __PKHTB(v1, v2, 16);
- vo2 = __PKHBT(v2, v1, 16);
-
-#endif
-
- in = *__SIMD32(pCnt);
- *__SIMD32(pCnt)++ = __QADD16(vo1, in);
-
- in = *__SIMD32(pCnt);
- *__SIMD32(pCnt)++ = __QADD16(vo2, in);
-
- cnt--;
- }
- cnt = length & 0x3;
- while (cnt > 0u)
- {
- *pCnt++ += *pV++;
- cnt--;
- }
-}
-
-#endif // ARM_MATH_DSP
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup Pooling
- * @{
- */
-
- /**
- * @brief Q7 max pooling function
- * @param[in, out] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] Im_out pointer to output tensor
- * @return none.
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: 0
- *
- * The pooling function is implemented as split x-pooling then
- * y-pooling.
- *
- * This pooling function is input-destructive. Input data is undefined
- * after calling this function.
- *
- */
-
-void
-arm_maxpool_q7_HWC(q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride, const uint16_t dim_im_out, q7_t * bufferA, q7_t * Im_out)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- int16_t i_x, i_y;
-
- /* first does the pooling along x axis */
- for (i_y = 0; i_y < dim_im_in; i_y++)
- {
-
- for (i_x = 0; i_x < dim_im_out; i_x++)
- {
- /* for each output pixel */
- q7_t *target = Im_in + (i_y * dim_im_in + i_x) * ch_im_in;
- q7_t *win_start;
- q7_t *win_stop;
- if (i_x * stride - padding < 0)
- {
- win_start = target;
- } else
- {
- win_start = Im_in + (i_y * dim_im_in + i_x * stride - padding) * ch_im_in;
- }
-
- if (i_x * stride - padding + dim_kernel >= dim_im_in)
- {
- win_stop = Im_in + (i_y * dim_im_in + dim_im_in) * ch_im_in;
- } else
- {
- win_stop = Im_in + (i_y * dim_im_in + i_x * stride - padding + dim_kernel) * ch_im_in;
- }
-
- /* first step is to copy over initial data */
- /* arm_copy_q7(win_start, target, ch_im_in); */
- memmove(target, win_start, ch_im_in);
-
- /* start the max operation from the second part */
- win_start += ch_im_in;
- for (; win_start < win_stop; win_start += ch_im_in)
- {
- compare_and_replace_if_larger_q7(target, win_start, ch_im_in);
- }
- }
- }
-
- /* then does the pooling along y axis */
- for (i_y = 0; i_y < dim_im_out; i_y++)
- {
-
- /* for each output row */
- q7_t *target = Im_out + i_y * dim_im_out * ch_im_in;
- q7_t *row_start;
- q7_t *row_end;
- /* setting the starting row */
- if (i_y * stride - padding < 0)
- {
- row_start = Im_in;
- } else
- {
- row_start = Im_in + (i_y * stride - padding) * dim_im_in * ch_im_in;
- }
- /* setting the stopping row */
- if (i_y * stride - padding + dim_kernel >= dim_im_in)
- {
- row_end = Im_in + dim_im_in * dim_im_in * ch_im_in;
- } else
- {
- row_end = Im_in + (i_y * stride - padding + dim_kernel) * dim_im_in * ch_im_in;
- }
-
- /* copy over the first row */
- /* arm_copy_q7(row_start, target, dim_im_out * ch_im_in); */
- memmove(target, row_start, dim_im_out * ch_im_in);
-
- /* move over to next row */
- row_start += ch_im_in * dim_im_in;
-
- for (; row_start < row_end; row_start += dim_im_in * ch_im_in)
- {
- compare_and_replace_if_larger_q7(target, row_start, dim_im_out * ch_im_in);
- }
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
-
- int16_t i_ch_in, i_x, i_y;
- int16_t k_x, k_y;
-
- for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
- {
- for (i_y = 0; i_y < dim_im_out; i_y++)
- {
- for (i_x = 0; i_x < dim_im_out; i_x++)
- {
- int max = -129;
- for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
- {
- for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
- {
- if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
- {
- if (Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)] > max)
- {
- max = Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
- }
- }
- }
- }
- Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = max;
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
-}
-
- /**
- * @brief Q7 average pooling function
- * @param[in,out] Im_in pointer to input tensor
- * @param[in] dim_im_in input tensor dimention
- * @param[in] ch_im_in number of input tensor channels
- * @param[in] dim_kernel filter kernel size
- * @param[in] padding padding sizes
- * @param[in] stride convolution stride
- * @param[in] dim_im_out output tensor dimension
- * @param[in,out] bufferA pointer to buffer space for input
- * @param[in,out] Im_out pointer to output tensor
- * @return none.
- *
- * @details
- *
- * <b>Buffer size:</b>
- *
- * bufferA size: 2*dim_im_out*ch_im_in
- *
- * The pooling function is implemented as split x-pooling then
- * y-pooling.
- *
- * This pooling function is input-destructive. Input data is undefined
- * after calling this function.
- *
- */
-
-void
-arm_avepool_q7_HWC(q7_t * Im_in,
- const uint16_t dim_im_in,
- const uint16_t ch_im_in,
- const uint16_t dim_kernel,
- const uint16_t padding,
- const uint16_t stride, const uint16_t dim_im_out, q7_t * bufferA, q7_t * Im_out)
-{
-
-#if defined (ARM_MATH_DSP)
- /* Run the following code for Cortex-M4 and Cortex-M7 */
-
- q15_t *buffer = (q15_t *) bufferA;
- int16_t i_x, i_y;
- int16_t count = 0;
-
- /* first does the pooling along x axis */
- for (i_y = 0; i_y < dim_im_in; i_y++)
- {
-
- for (i_x = 0; i_x < dim_im_out; i_x++)
- {
- /* for each output pixel */
- q7_t *target = Im_in + (i_y * dim_im_in + i_x) * ch_im_in;
- q7_t *win_start;
- q7_t *win_stop;
- if (i_x * stride - padding < 0)
- {
- win_start = target;
- } else
- {
- win_start = Im_in + (i_y * dim_im_in + i_x * stride - padding) * ch_im_in;
- }
-
- if (i_x * stride - padding + dim_kernel >= dim_im_in)
- {
- win_stop = Im_in + (i_y * dim_im_in + dim_im_in) * ch_im_in;
- } else
- {
- win_stop = Im_in + (i_y * dim_im_in + i_x * stride - padding + dim_kernel) * ch_im_in;
- }
-
- /* first step is to copy over initial data */
- arm_q7_to_q15_no_shift(win_start, buffer, ch_im_in);
- count = 1;
-
- /* start the max operation from the second part */
- win_start += ch_im_in;
- for (; win_start < win_stop; win_start += ch_im_in)
- {
- accumulate_q7_to_q15(buffer, win_start, ch_im_in);
- count++;
- }
- buffer_scale_back_q15_to_q7(buffer, target, ch_im_in, count);
- }
- }
-
- /* then does the pooling along y axis */
- for (i_y = 0; i_y < dim_im_out; i_y++)
- {
- /* for each output row */
- q7_t *target = Im_out + i_y * dim_im_out * ch_im_in;
- q7_t *row_start;
- q7_t *row_end;
- /* setting the starting row */
- if (i_y * stride - padding < 0)
- {
- row_start = Im_in;
- } else
- {
- row_start = Im_in + (i_y * stride - padding) * dim_im_in * ch_im_in;
- }
- /* setting the stopping row */
- if (i_y * stride - padding + dim_kernel >= dim_im_in)
- {
- row_end = Im_in + dim_im_in * dim_im_in * ch_im_in;
- } else
- {
- row_end = Im_in + (i_y * stride - padding + dim_kernel) * dim_im_in * ch_im_in;
- }
-
- /* copy over the first row */
- arm_q7_to_q15_no_shift(row_start, buffer, dim_im_out * ch_im_in);
- count = 1;
-
- /* move over to next row */
- row_start += ch_im_in * dim_im_in;
-
- for (; row_start < row_end; row_start += dim_im_in * ch_im_in)
- {
- accumulate_q7_to_q15(buffer, row_start, dim_im_out * ch_im_in);
- count++;
- }
- buffer_scale_back_q15_to_q7(buffer, target, dim_im_out * ch_im_in, count);
- }
-
-#else
- /* Run the following code as reference implementation for Cortex-M0 and Cortex-M3 */
-
- int16_t i_ch_in, i_x, i_y;
- int16_t k_x, k_y;
-
- for (i_ch_in = 0; i_ch_in < ch_im_in; i_ch_in++)
- {
- for (i_y = 0; i_y < dim_im_out; i_y++)
- {
- for (i_x = 0; i_x < dim_im_out; i_x++)
- {
- int sum = 0;
- int count = 0;
- for (k_y = i_y * stride - padding; k_y < i_y * stride - padding + dim_kernel; k_y++)
- {
- for (k_x = i_x * stride - padding; k_x < i_x * stride - padding + dim_kernel; k_x++)
- {
- if (k_y >= 0 && k_x >= 0 && k_y < dim_im_in && k_x < dim_im_in)
- {
- sum += Im_in[i_ch_in + ch_im_in * (k_x + k_y * dim_im_in)];
- count++;
- }
- }
- }
- Im_out[i_ch_in + ch_im_in * (i_x + i_y * dim_im_out)] = sum / count;
- }
- }
- }
-
-#endif /* ARM_MATH_DSP */
-
-}
-
-/**
- * @} end of Pooling group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c b/hid-dials/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c deleted file mode 100644 index 22fa62b..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q15.c +++ /dev/null @@ -1,120 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_softmax_q15.c
- * Description: Q15 softmax function
- *
- * $Date: 20. February 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup Softmax
- * @{
- */
-
- /**
- * @brief Q15 softmax function
- * @param[in] vec_in pointer to input vector
- * @param[in] dim_vec input vector dimention
- * @param[out] p_out pointer to output vector
- * @return none.
- *
- * @details
- *
- * Here, instead of typical e based softmax, we use
- * 2-based softmax, i.e.,:
- *
- * y_i = 2^(x_i) / sum(2^x_j)
- *
- * The relative output will be different here.
- * But mathematically, the gradient will be the same
- * with a log(2) scaling factor.
- *
- */
-
-void arm_softmax_q15(const q15_t * vec_in, const uint16_t dim_vec, q15_t * p_out)
-{
- q31_t sum;
- int16_t i;
- uint8_t shift;
- q31_t base;
- base = -1 * 0x100000;
- for (i = 0; i < dim_vec; i++)
- {
- if (vec_in[i] > base)
- {
- base = vec_in[i];
- }
- }
-
- /* we ignore really small values
- * anyway, they will be 0 after shrinking
- * to q15_t
- */
- base = base - 16;
-
- sum = 0;
-
- for (i = 0; i < dim_vec; i++)
- {
- if (vec_in[i] > base)
- {
- shift = (uint8_t)__USAT(vec_in[i] - base, 5);
- sum += 0x1 << shift;
- }
- }
-
- /* This is effectively (0x1 << 32) / sum */
- int64_t div_base = 0x100000000LL;
- int output_base = (int32_t)(div_base / sum);
-
- /* Final confidence will be output_base >> ( 17 - (vec_in[i] - base) )
- * so 32768 (0x1<<15) -> 100% confidence when sum = 0x1 << 16, output_base = 0x1 << 16
- * and vec_in[i]-base = 16
- */
- for (i = 0; i < dim_vec; i++)
- {
- if (vec_in[i] > base)
- {
- /* Here minimum value of 17+base-vec[i] will be 1 */
- shift = (uint8_t)__USAT(17+base-vec_in[i], 5);
- p_out[i] = (q15_t) __SSAT((output_base >> shift), 16);
- } else
- {
- p_out[i] = 0;
- }
- }
-
-}
-
-/**
- * @} end of Softmax group
- */
diff --git a/hid-dials/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c b/hid-dials/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c deleted file mode 100644 index 06a69e1..0000000 --- a/hid-dials/Drivers/CMSIS/NN/Source/SoftmaxFunctions/arm_softmax_q7.c +++ /dev/null @@ -1,121 +0,0 @@ -/*
- * Copyright (C) 2010-2018 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/* ----------------------------------------------------------------------
- * Project: CMSIS NN Library
- * Title: arm_softmax_q7.c
- * Description: Q7 softmax function
- *
- * $Date: 20. February 2018
- * $Revision: V.1.0.0
- *
- * Target Processor: Cortex-M cores
- *
- * -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_nnfunctions.h"
-
-/**
- * @ingroup groupNN
- */
-
-/**
- * @addtogroup Softmax
- * @{
- */
-
- /**
- * @brief Q7 softmax function
- * @param[in] vec_in pointer to input vector
- * @param[in] dim_vec input vector dimention
- * @param[out] p_out pointer to output vector
- * @return none.
- *
- * @details
- *
- * Here, instead of typical natural logarithm e based softmax, we use
- * 2-based softmax here, i.e.,:
- *
- * y_i = 2^(x_i) / sum(2^x_j)
- *
- * The relative output will be different here.
- * But mathematically, the gradient will be the same
- * with a log(2) scaling factor.
- *
- */
-
-void arm_softmax_q7(const q7_t * vec_in, const uint16_t dim_vec, q7_t * p_out)
-{
- q31_t sum;
- int16_t i;
- uint8_t shift;
- q15_t base;
- base = -257;
-
- /* We first search for the maximum */
- for (i = 0; i < dim_vec; i++)
- {
- if (vec_in[i] > base)
- {
- base = vec_in[i];
- }
- }
-
- /*
- * So the base is set to max-8, meaning
- * that we ignore really small values.
- * anyway, they will be 0 after shrinking to q7_t.
- */
- base = base - 8;
-
- sum = 0;
-
- for (i = 0; i < dim_vec; i++)
- {
- if (vec_in[i] > base)
- {
- shift = (uint8_t)__USAT(vec_in[i] - base, 5);
- sum += 0x1 << shift;
- }
- }
-
- /* This is effectively (0x1 << 20) / sum */
- int output_base = 0x100000 / sum;
-
- /*
- * Final confidence will be output_base >> ( 13 - (vec_in[i] - base) )
- * so 128 (0x1<<7) -> 100% confidence when sum = 0x1 << 8, output_base = 0x1 << 12
- * and vec_in[i]-base = 8
- */
- for (i = 0; i < dim_vec; i++)
- {
- if (vec_in[i] > base)
- {
- /* Here minimum value of 13+base-vec_in[i] will be 5 */
- shift = (uint8_t)__USAT(13+base-vec_in[i], 5);
- p_out[i] = (q7_t) __SSAT((output_base >> shift), 8);
- } else {
- p_out[i] = 0;
- }
- }
-}
-
-/**
- * @} end of Softmax group
- */
|