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author | jaseg <git@jaseg.net> | 2020-10-14 12:49:08 +0200 |
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committer | jaseg <git@jaseg.net> | 2020-10-14 12:49:08 +0200 |
commit | 3559d845d29272050d4d44e18e0bb84e676e48ff (patch) | |
tree | d8d6ce99e40b1a3745d76f0c9aac2f10e7286481 /fw/midi-dials/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f071xb_flash.icf | |
parent | 491b2acaaa9db1798445f3e174e68ada7424fc33 (diff) | |
parent | 6ab94e0b318884bbcb95e2ea3835f951502e1d99 (diff) | |
download | minikbd-3559d845d29272050d4d44e18e0bb84e676e48ff.tar.gz minikbd-3559d845d29272050d4d44e18e0bb84e676e48ff.tar.bz2 minikbd-3559d845d29272050d4d44e18e0bb84e676e48ff.zip |
Merge firmware and pcb repos
Diffstat (limited to 'fw/midi-dials/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f071xb_flash.icf')
-rw-r--r-- | fw/midi-dials/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f071xb_flash.icf | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/fw/midi-dials/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f071xb_flash.icf b/fw/midi-dials/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f071xb_flash.icf new file mode 100644 index 0000000..7ee89ac --- /dev/null +++ b/fw/midi-dials/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/iar/linker/stm32f071xb_flash.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0801FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x20003FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
+
+export symbol __ICFEDIT_region_RAM_start__;
+export symbol __ICFEDIT_region_RAM_end__;
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