minkbd: repo restructure

14 files changed, 0 insertions, 875 deletions

diff --git a/HW v1.2/edgerails/edgerails.kicad_pcb b/HW v1.2/edgerails/edgerails.kicad_pcb
deleted file mode 100644
index 75568c1..0000000
--- a/HW v1.2/edgerails/edgerails.kicad_pcb
+++ /dev/null
@@ -1,209 +0,0 @@
-(kicad_pcb (version 20171130) (host pcbnew 5.1.5-52549c5~84~ubuntu19.10.1)
-
-  (general
-    (thickness 1.6)
-    (drawings 89)
-    (tracks 0)
-    (zones 0)
-    (modules 1)
-    (nets 1)
-  )
-
-  (page A4)
-  (layers
-    (0 F.Cu signal)
-    (31 B.Cu signal)
-    (32 B.Adhes user)
-    (33 F.Adhes user)
-    (34 B.Paste user)
-    (35 F.Paste user)
-    (36 B.SilkS user)
-    (37 F.SilkS user)
-    (38 B.Mask user)
-    (39 F.Mask user)
-    (40 Dwgs.User user)
-    (41 Cmts.User user)
-    (42 Eco1.User user)
-    (43 Eco2.User user)
-    (44 Edge.Cuts user)
-    (45 Margin user)
-    (46 B.CrtYd user)
-    (47 F.CrtYd user)
-    (48 B.Fab user)
-    (49 F.Fab user)
-  )
-
-  (setup
-    (last_trace_width 0.25)
-    (trace_clearance 0.2)
-    (zone_clearance 0.508)
-    (zone_45_only no)
-    (trace_min 0.2)
-    (via_size 0.8)
-    (via_drill 0.4)
-    (via_min_size 0.4)
-    (via_min_drill 0.3)
-    (uvia_size 0.3)
-    (uvia_drill 0.1)
-    (uvias_allowed no)
-    (uvia_min_size 0.2)
-    (uvia_min_drill 0.1)
-    (edge_width 0.05)
-    (segment_width 0.2)
-    (pcb_text_width 0.3)
-    (pcb_text_size 1.5 1.5)
-    (mod_edge_width 0.12)
-    (mod_text_size 1 1)
-    (mod_text_width 0.15)
-    (pad_size 1.524 1.524)
-    (pad_drill 0.762)
-    (pad_to_mask_clearance 0.051)
-    (solder_mask_min_width 0.25)
-    (aux_axis_origin 0 0)
-    (visible_elements FFFFFF7F)
-    (pcbplotparams
-      (layerselection 0x010fc_ffffffff)
-      (usegerberextensions true)
-      (usegerberattributes false)
-      (usegerberadvancedattributes false)
-      (creategerberjobfile false)
-      (excludeedgelayer true)
-      (linewidth 0.100000)
-      (plotframeref false)
-      (viasonmask false)
-      (mode 1)
-      (useauxorigin false)
-      (hpglpennumber 1)
-      (hpglpenspeed 20)
-      (hpglpendiameter 15.000000)
-      (psnegative false)
-      (psa4output false)
-      (plotreference true)
-      (plotvalue true)
-      (plotinvisibletext false)
-      (padsonsilk false)
-      (subtractmaskfromsilk false)
-      (outputformat 1)
-      (mirror false)
-      (drillshape 0)
-      (scaleselection 1)
-      (outputdirectory "gerber/"))
-  )
-
-  (net 0 "")
-
-  (net_class Default "This is the default net class."
-    (clearance 0.2)
-    (trace_width 0.25)
-    (via_dia 0.8)
-    (via_drill 0.4)
-    (uvia_dia 0.3)
-    (uvia_drill 0.1)
-  )
-
-  (module otter:JLC_fiducial (layer F.Cu) (tedit 5E01237E) (tstamp 5E7FFBF9)
-    (at 11.5 90.5)
-    (fp_text reference REF** (at 0 -1.95) (layer F.SilkS) hide
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (fp_text value JLC_fiducial (at 0 -2.95) (layer F.Fab)
-      (effects (font (size 1 1) (thickness 0.15)))
-    )
-    (pad "" np_thru_hole circle (at 0 0) (size 1.152 1.152) (drill 1.152) (layers *.Cu *.Mask))
-  )
-
-  (gr_text "OtterPill V1.2 x4" (at 11.5 51 270) (layer F.SilkS)
-    (effects (font (size 1.5 1.5) (thickness 0.15)))
-  )
-  (gr_line (start 11 92) (end 10 92) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC01))
-  (gr_line (start 10 91) (end 11 91) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 88) (end 11 88) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
-  (gr_line (start 10 90) (end 12 90) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC02))
-  (gr_line (start 11 87) (end 10 87) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC01))
-  (gr_line (start 10 89) (end 11 89) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC00))
-  (gr_line (start 10 86) (end 11 86) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 83) (end 11 83) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
-  (gr_line (start 10 85) (end 12 85) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC02))
-  (gr_line (start 11 82) (end 10 82) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC01))
-  (gr_line (start 10 84) (end 11 84) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC00))
-  (gr_line (start 10 81) (end 11 81) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 78) (end 11 78) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
-  (gr_line (start 10 80) (end 12 80) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC02))
-  (gr_line (start 11 77) (end 10 77) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC01))
-  (gr_line (start 10 79) (end 11 79) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC00))
-  (gr_line (start 10 76) (end 11 76) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 73) (end 11 73) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
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-  (gr_line (start 10 71) (end 11 71) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 68) (end 11 68) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
-  (gr_line (start 10 70) (end 12 70) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC02))
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-  (gr_line (start 10 69) (end 11 69) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC00))
-  (gr_line (start 10 66) (end 11 66) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 63) (end 11 63) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
-  (gr_line (start 10 65) (end 12 65) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC02))
-  (gr_line (start 11 62) (end 10 62) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC01))
-  (gr_line (start 10 64) (end 11 64) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC00))
-  (gr_line (start 10 61) (end 11 61) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 58) (end 11 58) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
-  (gr_line (start 10 60) (end 12 60) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC02))
-  (gr_line (start 11 57) (end 10 57) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC01))
-  (gr_line (start 10 59) (end 11 59) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC00))
-  (gr_line (start 10 56) (end 11 56) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 53) (end 11 53) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
-  (gr_line (start 10 55) (end 12 55) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC02))
-  (gr_line (start 11 52) (end 10 52) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC01))
-  (gr_line (start 10 54) (end 11 54) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC00))
-  (gr_line (start 10 51) (end 11 51) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 48) (end 11 48) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
-  (gr_line (start 10 50) (end 12 50) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC02))
-  (gr_line (start 11 47) (end 10 47) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC01))
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-  (gr_line (start 10 46) (end 11 46) (layer B.SilkS) (width 0.12) (tstamp 5E7FFBFF))
-  (gr_line (start 10 43) (end 11 43) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC03))
-  (gr_line (start 10 45) (end 12 45) (layer B.SilkS) (width 0.12) (tstamp 5E7FFC02))
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-  (gr_line (start 10 10) (end 12 10) (layer B.SilkS) (width 0.12))
-  (gr_text JLCJLCJLCJLC (at 11.5 16 270) (layer F.SilkS)
-    (effects (font (size 0.8 0.8) (thickness 0.1)))
-  )
-  (gr_line (start 10 92) (end 10 10) (layer Edge.Cuts) (width 0.05) (tstamp 5E7FA45B))
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-  (gr_line (start 13 10) (end 13 92) (layer Edge.Cuts) (width 0.05))
-  (gr_line (start 10 10) (end 13 10) (layer Edge.Cuts) (width 0.05))
-
-)
diff --git a/HW v1.2/edgerails/edgerails.pro b/HW v1.2/edgerails/edgerails.pro
deleted file mode 100644
index 152769c..0000000
--- a/HW v1.2/edgerails/edgerails.pro
+++ /dev/null
@@ -1,33 +0,0 @@
-update=22/05/2015 07:44:53
-version=1
-last_client=kicad
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=
-[eeschema/libraries]
diff --git a/HW v1.2/edgerails/edgerails.sch b/HW v1.2/edgerails/edgerails.sch
deleted file mode 100644
index fff8c68..0000000
--- a/HW v1.2/edgerails/edgerails.sch
+++ /dev/null
@@ -1,4 +0,0 @@
-EESchema Schematic File Version 2
-EELAYER 25 0
-EELAYER END
-$EndSCHEMATC
diff --git a/HW v1.2/edgerails/gerber/edgerails-B_Cu.gbl b/HW v1.2/edgerails/gerber/edgerails-B_Cu.gbl
deleted file mode 100644
index 38faa77..0000000
--- a/HW v1.2/edgerails/gerber/edgerails-B_Cu.gbl
+++ /dev/null
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diff --git a/HW v1.2/edgerails/gerber/edgerails-B_Mask.gbs b/HW v1.2/edgerails/gerber/edgerails-B_Mask.gbs
deleted file mode 100644
index 30c1650..0000000
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diff --git a/HW v1.2/edgerails/gerber/edgerails-B_Paste.gbp b/HW v1.2/edgerails/gerber/edgerails-B_Paste.gbp
deleted file mode 100644
index cd25131..0000000
--- a/HW v1.2/edgerails/gerber/edgerails-B_Paste.gbp
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diff --git a/HW v1.2/edgerails/gerber/edgerails-B_SilkS.gbo b/HW v1.2/edgerails/gerber/edgerails-B_SilkS.gbo
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index 4654651..0000000
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diff --git a/HW v1.2/edgerails/gerber/edgerails-gerber.zip b/HW v1.2/edgerails/gerber/edgerails-gerber.zip
deleted file mode 100644
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