added blink example

1 files changed, 289 insertions, 0 deletions

diff --git a/Blink/build/stm32f0xx_it.lst b/Blink/build/stm32f0xx_it.lst
new file mode 100644
index 0000000..22bb684
--- /dev/null
+++ b/Blink/build/stm32f0xx_it.lst
@@ -0,0 +1,289 @@
+ARM GAS  /tmp/ccSazFTx.s 			page 1
+
+
+   1              		.cpu cortex-m0
+   2              		.eabi_attribute 20, 1
+   3              		.eabi_attribute 21, 1
+   4              		.eabi_attribute 23, 3
+   5              		.eabi_attribute 24, 1
+   6              		.eabi_attribute 25, 1
+   7              		.eabi_attribute 26, 1
+   8              		.eabi_attribute 30, 1
+   9              		.eabi_attribute 34, 0
+  10              		.eabi_attribute 18, 4
+  11              		.file	"stm32f0xx_it.c"
+  12              		.text
+  13              	.Ltext0:
+  14              		.cfi_sections	.debug_frame
+  15              		.section	.text.NMI_Handler,"ax",%progbits
+  16              		.align	1
+  17              		.global	NMI_Handler
+  18              		.syntax unified
+  19              		.code	16
+  20              		.thumb_func
+  21              		.fpu softvfp
+  23              	NMI_Handler:
+  24              	.LFB40:
+  25              		.file 1 "Src/stm32f0xx_it.c"
+   1:Src/stm32f0xx_it.c **** /* USER CODE BEGIN Header */
+   2:Src/stm32f0xx_it.c **** /**
+   3:Src/stm32f0xx_it.c ****   ******************************************************************************
+   4:Src/stm32f0xx_it.c ****   * @file    stm32f0xx_it.c
+   5:Src/stm32f0xx_it.c ****   * @brief   Interrupt Service Routines.
+   6:Src/stm32f0xx_it.c ****   ******************************************************************************
+   7:Src/stm32f0xx_it.c ****   * @attention
+   8:Src/stm32f0xx_it.c ****   *
+   9:Src/stm32f0xx_it.c ****   * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
+  10:Src/stm32f0xx_it.c ****   * All rights reserved.</center></h2>
+  11:Src/stm32f0xx_it.c ****   *
+  12:Src/stm32f0xx_it.c ****   * This software component is licensed by ST under BSD 3-Clause license,
+  13:Src/stm32f0xx_it.c ****   * the "License"; You may not use this file except in compliance with the
+  14:Src/stm32f0xx_it.c ****   * License. You may obtain a copy of the License at:
+  15:Src/stm32f0xx_it.c ****   *                        opensource.org/licenses/BSD-3-Clause
+  16:Src/stm32f0xx_it.c ****   *
+  17:Src/stm32f0xx_it.c ****   ******************************************************************************
+  18:Src/stm32f0xx_it.c ****   */
+  19:Src/stm32f0xx_it.c **** /* USER CODE END Header */
+  20:Src/stm32f0xx_it.c **** 
+  21:Src/stm32f0xx_it.c **** /* Includes ------------------------------------------------------------------*/
+  22:Src/stm32f0xx_it.c **** #include "main.h"
+  23:Src/stm32f0xx_it.c **** #include "stm32f0xx_it.h"
+  24:Src/stm32f0xx_it.c **** /* Private includes ----------------------------------------------------------*/
+  25:Src/stm32f0xx_it.c **** /* USER CODE BEGIN Includes */
+  26:Src/stm32f0xx_it.c **** /* USER CODE END Includes */
+  27:Src/stm32f0xx_it.c **** 
+  28:Src/stm32f0xx_it.c **** /* Private typedef -----------------------------------------------------------*/
+  29:Src/stm32f0xx_it.c **** /* USER CODE BEGIN TD */
+  30:Src/stm32f0xx_it.c **** 
+  31:Src/stm32f0xx_it.c **** /* USER CODE END TD */
+  32:Src/stm32f0xx_it.c **** 
+  33:Src/stm32f0xx_it.c **** /* Private define ------------------------------------------------------------*/
+ARM GAS  /tmp/ccSazFTx.s 			page 2
+
+
+  34:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PD */
+  35:Src/stm32f0xx_it.c ****  
+  36:Src/stm32f0xx_it.c **** /* USER CODE END PD */
+  37:Src/stm32f0xx_it.c **** 
+  38:Src/stm32f0xx_it.c **** /* Private macro -------------------------------------------------------------*/
+  39:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PM */
+  40:Src/stm32f0xx_it.c **** 
+  41:Src/stm32f0xx_it.c **** /* USER CODE END PM */
+  42:Src/stm32f0xx_it.c **** 
+  43:Src/stm32f0xx_it.c **** /* Private variables ---------------------------------------------------------*/
+  44:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PV */
+  45:Src/stm32f0xx_it.c **** 
+  46:Src/stm32f0xx_it.c **** /* USER CODE END PV */
+  47:Src/stm32f0xx_it.c **** 
+  48:Src/stm32f0xx_it.c **** /* Private function prototypes -----------------------------------------------*/
+  49:Src/stm32f0xx_it.c **** /* USER CODE BEGIN PFP */
+  50:Src/stm32f0xx_it.c **** 
+  51:Src/stm32f0xx_it.c **** /* USER CODE END PFP */
+  52:Src/stm32f0xx_it.c **** 
+  53:Src/stm32f0xx_it.c **** /* Private user code ---------------------------------------------------------*/
+  54:Src/stm32f0xx_it.c **** /* USER CODE BEGIN 0 */
+  55:Src/stm32f0xx_it.c **** 
+  56:Src/stm32f0xx_it.c **** /* USER CODE END 0 */
+  57:Src/stm32f0xx_it.c **** 
+  58:Src/stm32f0xx_it.c **** /* External variables --------------------------------------------------------*/
+  59:Src/stm32f0xx_it.c **** 
+  60:Src/stm32f0xx_it.c **** /* USER CODE BEGIN EV */
+  61:Src/stm32f0xx_it.c **** 
+  62:Src/stm32f0xx_it.c **** /* USER CODE END EV */
+  63:Src/stm32f0xx_it.c **** 
+  64:Src/stm32f0xx_it.c **** /******************************************************************************/
+  65:Src/stm32f0xx_it.c **** /*           Cortex-M0 Processor Interruption and Exception Handlers          */ 
+  66:Src/stm32f0xx_it.c **** /******************************************************************************/
+  67:Src/stm32f0xx_it.c **** /**
+  68:Src/stm32f0xx_it.c ****   * @brief This function handles Non maskable interrupt.
+  69:Src/stm32f0xx_it.c ****   */
+  70:Src/stm32f0xx_it.c **** void NMI_Handler(void)
+  71:Src/stm32f0xx_it.c **** {
+  26              		.loc 1 71 0
+  27              		.cfi_startproc
+  28              		@ args = 0, pretend = 0, frame = 0
+  29              		@ frame_needed = 0, uses_anonymous_args = 0
+  30              		@ link register save eliminated.
+  72:Src/stm32f0xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+  73:Src/stm32f0xx_it.c **** 
+  74:Src/stm32f0xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 0 */
+  75:Src/stm32f0xx_it.c ****   /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+  76:Src/stm32f0xx_it.c **** 
+  77:Src/stm32f0xx_it.c ****   /* USER CODE END NonMaskableInt_IRQn 1 */
+  78:Src/stm32f0xx_it.c **** }
+  31              		.loc 1 78 0
+  32              		@ sp needed
+  33 0000 7047     		bx	lr
+  34              		.cfi_endproc
+  35              	.LFE40:
+  37              		.section	.text.HardFault_Handler,"ax",%progbits
+  38              		.align	1
+ARM GAS  /tmp/ccSazFTx.s 			page 3
+
+
+  39              		.global	HardFault_Handler
+  40              		.syntax unified
+  41              		.code	16
+  42              		.thumb_func
+  43              		.fpu softvfp
+  45              	HardFault_Handler:
+  46              	.LFB41:
+  79:Src/stm32f0xx_it.c **** 
+  80:Src/stm32f0xx_it.c **** /**
+  81:Src/stm32f0xx_it.c ****   * @brief This function handles Hard fault interrupt.
+  82:Src/stm32f0xx_it.c ****   */
+  83:Src/stm32f0xx_it.c **** void HardFault_Handler(void)
+  84:Src/stm32f0xx_it.c **** {
+  47              		.loc 1 84 0
+  48              		.cfi_startproc
+  49              		@ Volatile: function does not return.
+  50              		@ args = 0, pretend = 0, frame = 0
+  51              		@ frame_needed = 0, uses_anonymous_args = 0
+  52              		@ link register save eliminated.
+  53              	.L3:
+  54 0000 FEE7     		b	.L3
+  55              		.cfi_endproc
+  56              	.LFE41:
+  58              		.section	.text.SVC_Handler,"ax",%progbits
+  59              		.align	1
+  60              		.global	SVC_Handler
+  61              		.syntax unified
+  62              		.code	16
+  63              		.thumb_func
+  64              		.fpu softvfp
+  66              	SVC_Handler:
+  67              	.LFB42:
+  85:Src/stm32f0xx_it.c ****   /* USER CODE BEGIN HardFault_IRQn 0 */
+  86:Src/stm32f0xx_it.c **** 
+  87:Src/stm32f0xx_it.c ****   /* USER CODE END HardFault_IRQn 0 */
+  88:Src/stm32f0xx_it.c ****   while (1)
+  89:Src/stm32f0xx_it.c ****   {
+  90:Src/stm32f0xx_it.c ****     /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+  91:Src/stm32f0xx_it.c ****     /* USER CODE END W1_HardFault_IRQn 0 */
+  92:Src/stm32f0xx_it.c ****   }
+  93:Src/stm32f0xx_it.c **** }
+  94:Src/stm32f0xx_it.c **** 
+  95:Src/stm32f0xx_it.c **** /**
+  96:Src/stm32f0xx_it.c ****   * @brief This function handles System service call via SWI instruction.
+  97:Src/stm32f0xx_it.c ****   */
+  98:Src/stm32f0xx_it.c **** void SVC_Handler(void)
+  99:Src/stm32f0xx_it.c **** {
+  68              		.loc 1 99 0
+  69              		.cfi_startproc
+  70              		@ args = 0, pretend = 0, frame = 0
+  71              		@ frame_needed = 0, uses_anonymous_args = 0
+  72              		@ link register save eliminated.
+ 100:Src/stm32f0xx_it.c ****   /* USER CODE BEGIN SVC_IRQn 0 */
+ 101:Src/stm32f0xx_it.c **** 
+ 102:Src/stm32f0xx_it.c ****   /* USER CODE END SVC_IRQn 0 */
+ 103:Src/stm32f0xx_it.c ****   /* USER CODE BEGIN SVC_IRQn 1 */
+ 104:Src/stm32f0xx_it.c **** 
+ARM GAS  /tmp/ccSazFTx.s 			page 4
+
+
+ 105:Src/stm32f0xx_it.c ****   /* USER CODE END SVC_IRQn 1 */
+ 106:Src/stm32f0xx_it.c **** }
+  73              		.loc 1 106 0
+  74              		@ sp needed
+  75 0000 7047     		bx	lr
+  76              		.cfi_endproc
+  77              	.LFE42:
+  79              		.section	.text.PendSV_Handler,"ax",%progbits
+  80              		.align	1
+  81              		.global	PendSV_Handler
+  82              		.syntax unified
+  83              		.code	16
+  84              		.thumb_func
+  85              		.fpu softvfp
+  87              	PendSV_Handler:
+  88              	.LFB43:
+ 107:Src/stm32f0xx_it.c **** 
+ 108:Src/stm32f0xx_it.c **** /**
+ 109:Src/stm32f0xx_it.c ****   * @brief This function handles Pendable request for system service.
+ 110:Src/stm32f0xx_it.c ****   */
+ 111:Src/stm32f0xx_it.c **** void PendSV_Handler(void)
+ 112:Src/stm32f0xx_it.c **** {
+  89              		.loc 1 112 0
+  90              		.cfi_startproc
+  91              		@ args = 0, pretend = 0, frame = 0
+  92              		@ frame_needed = 0, uses_anonymous_args = 0
+  93              		@ link register save eliminated.
+ 113:Src/stm32f0xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 0 */
+ 114:Src/stm32f0xx_it.c **** 
+ 115:Src/stm32f0xx_it.c ****   /* USER CODE END PendSV_IRQn 0 */
+ 116:Src/stm32f0xx_it.c ****   /* USER CODE BEGIN PendSV_IRQn 1 */
+ 117:Src/stm32f0xx_it.c **** 
+ 118:Src/stm32f0xx_it.c ****   /* USER CODE END PendSV_IRQn 1 */
+ 119:Src/stm32f0xx_it.c **** }
+  94              		.loc 1 119 0
+  95              		@ sp needed
+  96 0000 7047     		bx	lr
+  97              		.cfi_endproc
+  98              	.LFE43:
+ 100              		.section	.text.SysTick_Handler,"ax",%progbits
+ 101              		.align	1
+ 102              		.global	SysTick_Handler
+ 103              		.syntax unified
+ 104              		.code	16
+ 105              		.thumb_func
+ 106              		.fpu softvfp
+ 108              	SysTick_Handler:
+ 109              	.LFB44:
+ 120:Src/stm32f0xx_it.c **** 
+ 121:Src/stm32f0xx_it.c **** /**
+ 122:Src/stm32f0xx_it.c ****   * @brief This function handles System tick timer.
+ 123:Src/stm32f0xx_it.c ****   */
+ 124:Src/stm32f0xx_it.c **** void SysTick_Handler(void)
+ 125:Src/stm32f0xx_it.c **** {
+ 110              		.loc 1 125 0
+ 111              		.cfi_startproc
+ 112              		@ args = 0, pretend = 0, frame = 0
+ARM GAS  /tmp/ccSazFTx.s 			page 5
+
+
+ 113              		@ frame_needed = 0, uses_anonymous_args = 0
+ 114 0000 10B5     		push	{r4, lr}
+ 115              	.LCFI0:
+ 116              		.cfi_def_cfa_offset 8
+ 117              		.cfi_offset 4, -8
+ 118              		.cfi_offset 14, -4
+ 126:Src/stm32f0xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 0 */
+ 127:Src/stm32f0xx_it.c **** 
+ 128:Src/stm32f0xx_it.c ****   /* USER CODE END SysTick_IRQn 0 */
+ 129:Src/stm32f0xx_it.c ****   HAL_IncTick();
+ 119              		.loc 1 129 0
+ 120 0002 FFF7FEFF 		bl	HAL_IncTick
+ 121              	.LVL0:
+ 130:Src/stm32f0xx_it.c ****   /* USER CODE BEGIN SysTick_IRQn 1 */
+ 131:Src/stm32f0xx_it.c **** 
+ 132:Src/stm32f0xx_it.c ****   /* USER CODE END SysTick_IRQn 1 */
+ 133:Src/stm32f0xx_it.c **** }
+ 122              		.loc 1 133 0
+ 123              		@ sp needed
+ 124 0006 10BD     		pop	{r4, pc}
+ 125              		.cfi_endproc
+ 126              	.LFE44:
+ 128              		.text
+ 129              	.Letext0:
+ 130              		.file 2 "/home/janhenrik/programme/gcc-arm-none-eabi-7-2018-q2-update/arm-none-eabi/include/machin
+ 131              		.file 3 "/home/janhenrik/programme/gcc-arm-none-eabi-7-2018-q2-update/arm-none-eabi/include/sys/_s
+ 132              		.file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h"
+ 133              		.file 5 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h"
+ARM GAS  /tmp/ccSazFTx.s 			page 6
+
+
+DEFINED SYMBOLS
+                            *ABS*:0000000000000000 stm32f0xx_it.c
+     /tmp/ccSazFTx.s:16     .text.NMI_Handler:0000000000000000 $t
+     /tmp/ccSazFTx.s:23     .text.NMI_Handler:0000000000000000 NMI_Handler
+     /tmp/ccSazFTx.s:38     .text.HardFault_Handler:0000000000000000 $t
+     /tmp/ccSazFTx.s:45     .text.HardFault_Handler:0000000000000000 HardFault_Handler
+     /tmp/ccSazFTx.s:59     .text.SVC_Handler:0000000000000000 $t
+     /tmp/ccSazFTx.s:66     .text.SVC_Handler:0000000000000000 SVC_Handler
+     /tmp/ccSazFTx.s:80     .text.PendSV_Handler:0000000000000000 $t
+     /tmp/ccSazFTx.s:87     .text.PendSV_Handler:0000000000000000 PendSV_Handler
+     /tmp/ccSazFTx.s:101    .text.SysTick_Handler:0000000000000000 $t
+     /tmp/ccSazFTx.s:108    .text.SysTick_Handler:0000000000000000 SysTick_Handler
+
+UNDEFINED SYMBOLS
+HAL_IncTick