summaryrefslogtreecommitdiff
path: root/Blink/build/stm32f0xx_hal_pwr_ex.lst
diff options
context:
space:
mode:
authorJanHenrik <janhenrik@janhenrik.org>2020-01-19 00:56:37 +0100
committerJanHenrik <janhenrik@janhenrik.org>2020-01-19 00:56:37 +0100
commita81fc41c3eb99e8fc52aa734ee63e13c937aab81 (patch)
tree19974c4676ed64d6e4260b79fc3f1eaeda58a289 /Blink/build/stm32f0xx_hal_pwr_ex.lst
parenta96ec5d9995e7e4b7315a192e543b88f0aff4930 (diff)
downloadminikbd-a81fc41c3eb99e8fc52aa734ee63e13c937aab81.tar.gz
minikbd-a81fc41c3eb99e8fc52aa734ee63e13c937aab81.tar.bz2
minikbd-a81fc41c3eb99e8fc52aa734ee63e13c937aab81.zip
added blink example
Diffstat (limited to 'Blink/build/stm32f0xx_hal_pwr_ex.lst')
-rw-r--r--Blink/build/stm32f0xx_hal_pwr_ex.lst710
1 files changed, 710 insertions, 0 deletions
diff --git a/Blink/build/stm32f0xx_hal_pwr_ex.lst b/Blink/build/stm32f0xx_hal_pwr_ex.lst
new file mode 100644
index 0000000..ece0917
--- /dev/null
+++ b/Blink/build/stm32f0xx_hal_pwr_ex.lst
@@ -0,0 +1,710 @@
+ARM GAS /tmp/ccxTYr0X.s page 1
+
+
+ 1 .cpu cortex-m0
+ 2 .eabi_attribute 20, 1
+ 3 .eabi_attribute 21, 1
+ 4 .eabi_attribute 23, 3
+ 5 .eabi_attribute 24, 1
+ 6 .eabi_attribute 25, 1
+ 7 .eabi_attribute 26, 1
+ 8 .eabi_attribute 30, 1
+ 9 .eabi_attribute 34, 0
+ 10 .eabi_attribute 18, 4
+ 11 .file "stm32f0xx_hal_pwr_ex.c"
+ 12 .text
+ 13 .Ltext0:
+ 14 .cfi_sections .debug_frame
+ 15 .section .text.HAL_PWR_ConfigPVD,"ax",%progbits
+ 16 .align 1
+ 17 .global HAL_PWR_ConfigPVD
+ 18 .syntax unified
+ 19 .code 16
+ 20 .thumb_func
+ 21 .fpu softvfp
+ 23 HAL_PWR_ConfigPVD:
+ 24 .LFB40:
+ 25 .file 1 "Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c"
+ 1:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 2:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ******************************************************************************
+ 3:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @file stm32f0xx_hal_pwr_ex.c
+ 4:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @author MCD Application Team
+ 5:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Extended PWR HAL module driver.
+ 6:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * This file provides firmware functions to manage the following
+ 7:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * functionalities of the Power Controller (PWR) peripheral:
+ 8:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + Extended Initialization and de-initialization functions
+ 9:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * + Extended Peripheral Control functions
+ 10:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *
+ 11:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ******************************************************************************
+ 12:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @attention
+ 13:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *
+ 14:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
+ 15:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * All rights reserved.</center></h2>
+ 16:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *
+ 17:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * This software component is licensed by ST under BSD 3-Clause license,
+ 18:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * the "License"; You may not use this file except in compliance with the
+ 19:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * License. You may obtain a copy of the License at:
+ 20:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * opensource.org/licenses/BSD-3-Clause
+ 21:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *
+ 22:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ******************************************************************************
+ 23:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 24:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 25:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Includes ------------------------------------------------------------------*/
+ 26:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #include "stm32f0xx_hal.h"
+ 27:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 28:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @addtogroup STM32F0xx_HAL_Driver
+ 29:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{
+ 30:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 31:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 32:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx
+ 33:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWREx HAL module driver
+ ARM GAS /tmp/ccxTYr0X.s page 2
+
+
+ 34:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{
+ 35:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 36:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 37:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #ifdef HAL_PWR_MODULE_ENABLED
+ 38:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 39:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private typedef -----------------------------------------------------------*/
+ 40:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private define ------------------------------------------------------------*/
+ 41:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Private_Constants PWREx Private Constants
+ 42:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{
+ 43:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 44:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_MODE_IT (0x00010000U)
+ 45:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_MODE_EVT (0x00020000U)
+ 46:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_RISING_EDGE (0x00000001U)
+ 47:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #define PVD_FALLING_EDGE (0x00000002U)
+ 48:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 49:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @}
+ 50:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 51:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 52:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private macro -------------------------------------------------------------*/
+ 53:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private variables ---------------------------------------------------------*/
+ 54:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Private function prototypes -----------------------------------------------*/
+ 55:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Exported functions ---------------------------------------------------------*/
+ 56:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 57:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions PWREx Exported Functions
+ 58:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{
+ 59:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 60:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 61:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended Control Functions
+ 62:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Extended Peripheral Control functions
+ 63:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *
+ 64:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** @verbatim
+ 65:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 66:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ===============================================================================
+ 67:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ##### Peripheral extended control functions #####
+ 68:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ===============================================================================
+ 69:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 70:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *** PVD configuration ***
+ 71:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** =========================
+ 72:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** [..]
+ 73:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) The PVD is used to monitor the VDD power supply by comparing it to a
+ 74:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** threshold selected by the PVD Level (PLS[2:0] bits in the PWR_CR).
+ 75:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) A PVDO flag is available to indicate if VDD/VDDA is higher or lower
+ 76:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** than the PVD threshold. This event is internally connected to the EXTI
+ 77:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** line16 and can generate an interrupt if enabled. This is done through
+ 78:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWR_ConfigPVD(), HAL_PWR_EnablePVD() functions.
+ 79:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) The PVD is stopped in Standby mode.
+ 80:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** -@- PVD is not available on STM32F030x4/x6/x8
+ 81:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 82:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** *** VDDIO2 Monitor Configuration ***
+ 83:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** ====================================
+ 84:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** [..]
+ 85:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) VDDIO2 monitor is used to monitor the VDDIO2 power supply by comparing it
+ 86:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** to VREFInt Voltage
+ 87:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** (+) This monitor is internally connected to the EXTI line31
+ 88:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** and can generate an interrupt if enabled. This is done through
+ 89:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWREx_EnableVddio2Monitor() function.
+ 90:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** -@- VDDIO2 is available on STM32F07x/09x/04x
+ ARM GAS /tmp/ccxTYr0X.s page 3
+
+
+ 91:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 92:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** @endverbatim
+ 93:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @{
+ 94:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 95:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 96:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #if defined (STM32F031x6) || defined (STM32F051x8) || \
+ 97:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F071xB) || defined (STM32F091xC) || \
+ 98:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F042x6) || defined (STM32F072xB)
+ 99:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 100:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Configures the voltage threshold detected by the Power Voltage Detector(PVD).
+ 101:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @param sConfigPVD pointer to an PWR_PVDTypeDef structure that contains the configuration
+ 102:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * information for the PVD.
+ 103:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note Refer to the electrical characteristics of your device datasheet for
+ 104:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * more details about the voltage threshold corresponding to each
+ 105:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * detection level.
+ 106:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None
+ 107:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 108:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
+ 109:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 26 .loc 1 109 0
+ 27 .cfi_startproc
+ 28 @ args = 0, pretend = 0, frame = 0
+ 29 @ frame_needed = 0, uses_anonymous_args = 0
+ 30 @ link register save eliminated.
+ 31 .LVL0:
+ 110:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check the parameters */
+ 111:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
+ 112:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
+ 113:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 114:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Set PLS[7:5] bits according to PVDLevel value */
+ 115:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** MODIFY_REG(PWR->CR, PWR_CR_PLS, sConfigPVD->PVDLevel);
+ 32 .loc 1 115 0
+ 33 0000 1C4A ldr r2, .L6
+ 34 0002 1368 ldr r3, [r2]
+ 35 0004 E021 movs r1, #224
+ 36 0006 8B43 bics r3, r1
+ 37 0008 0168 ldr r1, [r0]
+ 38 000a 0B43 orrs r3, r1
+ 39 000c 1360 str r3, [r2]
+ 116:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 117:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear any previous config. Keep it clear if no event or IT mode is selected */
+ 118:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
+ 40 .loc 1 118 0
+ 41 000e 1A4B ldr r3, .L6+4
+ 42 0010 5968 ldr r1, [r3, #4]
+ 43 0012 1A4A ldr r2, .L6+8
+ 44 0014 1140 ands r1, r2
+ 45 0016 5960 str r1, [r3, #4]
+ 119:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT();
+ 46 .loc 1 119 0
+ 47 0018 1968 ldr r1, [r3]
+ 48 001a 1140 ands r1, r2
+ 49 001c 1960 str r1, [r3]
+ 120:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
+ 50 .loc 1 120 0
+ 51 001e 9968 ldr r1, [r3, #8]
+ 52 0020 1140 ands r1, r2
+ ARM GAS /tmp/ccxTYr0X.s page 4
+
+
+ 53 0022 9960 str r1, [r3, #8]
+ 54 0024 D968 ldr r1, [r3, #12]
+ 55 0026 0A40 ands r2, r1
+ 56 0028 DA60 str r2, [r3, #12]
+ 121:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 122:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure interrupt mode */
+ 123:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
+ 57 .loc 1 123 0
+ 58 002a 4368 ldr r3, [r0, #4]
+ 59 002c DB03 lsls r3, r3, #15
+ 60 002e 05D5 bpl .L2
+ 124:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 125:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_IT();
+ 61 .loc 1 125 0
+ 62 0030 114A ldr r2, .L6+4
+ 63 0032 1168 ldr r1, [r2]
+ 64 0034 8023 movs r3, #128
+ 65 0036 5B02 lsls r3, r3, #9
+ 66 0038 0B43 orrs r3, r1
+ 67 003a 1360 str r3, [r2]
+ 68 .L2:
+ 126:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 127:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 128:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure event mode */
+ 129:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
+ 69 .loc 1 129 0
+ 70 003c 4368 ldr r3, [r0, #4]
+ 71 003e 9B03 lsls r3, r3, #14
+ 72 0040 05D5 bpl .L3
+ 130:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 131:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
+ 73 .loc 1 131 0
+ 74 0042 0D4A ldr r2, .L6+4
+ 75 0044 5168 ldr r1, [r2, #4]
+ 76 0046 8023 movs r3, #128
+ 77 0048 5B02 lsls r3, r3, #9
+ 78 004a 0B43 orrs r3, r1
+ 79 004c 5360 str r3, [r2, #4]
+ 80 .L3:
+ 132:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 133:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 134:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Configure the edge */
+ 135:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
+ 81 .loc 1 135 0
+ 82 004e 4368 ldr r3, [r0, #4]
+ 83 0050 DB07 lsls r3, r3, #31
+ 84 0052 05D5 bpl .L4
+ 136:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 137:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
+ 85 .loc 1 137 0
+ 86 0054 084A ldr r2, .L6+4
+ 87 0056 9168 ldr r1, [r2, #8]
+ 88 0058 8023 movs r3, #128
+ 89 005a 5B02 lsls r3, r3, #9
+ 90 005c 0B43 orrs r3, r1
+ 91 005e 9360 str r3, [r2, #8]
+ 92 .L4:
+ ARM GAS /tmp/ccxTYr0X.s page 5
+
+
+ 138:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 139:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 140:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
+ 93 .loc 1 140 0
+ 94 0060 4368 ldr r3, [r0, #4]
+ 95 0062 9B07 lsls r3, r3, #30
+ 96 0064 05D5 bpl .L1
+ 141:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 142:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
+ 97 .loc 1 142 0
+ 98 0066 044A ldr r2, .L6+4
+ 99 0068 D168 ldr r1, [r2, #12]
+ 100 006a 8023 movs r3, #128
+ 101 006c 5B02 lsls r3, r3, #9
+ 102 006e 0B43 orrs r3, r1
+ 103 0070 D360 str r3, [r2, #12]
+ 104 .L1:
+ 143:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 144:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 105 .loc 1 144 0
+ 106 @ sp needed
+ 107 0072 7047 bx lr
+ 108 .L7:
+ 109 .align 2
+ 110 .L6:
+ 111 0074 00700040 .word 1073770496
+ 112 0078 00040140 .word 1073808384
+ 113 007c FFFFFEFF .word -65537
+ 114 .cfi_endproc
+ 115 .LFE40:
+ 117 .section .text.HAL_PWR_EnablePVD,"ax",%progbits
+ 118 .align 1
+ 119 .global HAL_PWR_EnablePVD
+ 120 .syntax unified
+ 121 .code 16
+ 122 .thumb_func
+ 123 .fpu softvfp
+ 125 HAL_PWR_EnablePVD:
+ 126 .LFB41:
+ 145:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 146:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 147:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Enables the Power Voltage Detector(PVD).
+ 148:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None
+ 149:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 150:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_EnablePVD(void)
+ 151:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 127 .loc 1 151 0
+ 128 .cfi_startproc
+ 129 @ args = 0, pretend = 0, frame = 0
+ 130 @ frame_needed = 0, uses_anonymous_args = 0
+ 131 @ link register save eliminated.
+ 152:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** PWR->CR |= (uint32_t)PWR_CR_PVDE;
+ 132 .loc 1 152 0
+ 133 0000 024A ldr r2, .L9
+ 134 0002 1368 ldr r3, [r2]
+ 135 0004 1021 movs r1, #16
+ 136 0006 0B43 orrs r3, r1
+ ARM GAS /tmp/ccxTYr0X.s page 6
+
+
+ 137 0008 1360 str r3, [r2]
+ 153:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 138 .loc 1 153 0
+ 139 @ sp needed
+ 140 000a 7047 bx lr
+ 141 .L10:
+ 142 .align 2
+ 143 .L9:
+ 144 000c 00700040 .word 1073770496
+ 145 .cfi_endproc
+ 146 .LFE41:
+ 148 .section .text.HAL_PWR_DisablePVD,"ax",%progbits
+ 149 .align 1
+ 150 .global HAL_PWR_DisablePVD
+ 151 .syntax unified
+ 152 .code 16
+ 153 .thumb_func
+ 154 .fpu softvfp
+ 156 HAL_PWR_DisablePVD:
+ 157 .LFB42:
+ 154:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 155:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 156:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Disables the Power Voltage Detector(PVD).
+ 157:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None
+ 158:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 159:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_DisablePVD(void)
+ 160:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 158 .loc 1 160 0
+ 159 .cfi_startproc
+ 160 @ args = 0, pretend = 0, frame = 0
+ 161 @ frame_needed = 0, uses_anonymous_args = 0
+ 162 @ link register save eliminated.
+ 161:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** PWR->CR &= ~((uint32_t)PWR_CR_PVDE);
+ 163 .loc 1 161 0
+ 164 0000 024A ldr r2, .L12
+ 165 0002 1368 ldr r3, [r2]
+ 166 0004 1021 movs r1, #16
+ 167 0006 8B43 bics r3, r1
+ 168 0008 1360 str r3, [r2]
+ 162:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 169 .loc 1 162 0
+ 170 @ sp needed
+ 171 000a 7047 bx lr
+ 172 .L13:
+ 173 .align 2
+ 174 .L12:
+ 175 000c 00700040 .word 1073770496
+ 176 .cfi_endproc
+ 177 .LFE42:
+ 179 .section .text.HAL_PWR_PVDCallback,"ax",%progbits
+ 180 .align 1
+ 181 .weak HAL_PWR_PVDCallback
+ 182 .syntax unified
+ 183 .code 16
+ 184 .thumb_func
+ 185 .fpu softvfp
+ 187 HAL_PWR_PVDCallback:
+ ARM GAS /tmp/ccxTYr0X.s page 7
+
+
+ 188 .LFB44:
+ 163:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 164:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 165:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief This function handles the PWR PVD interrupt request.
+ 166:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note This API should be called under the PVD_IRQHandler() or PVD_VDDIO2_IRQHandler().
+ 167:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None
+ 168:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 169:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWR_PVD_IRQHandler(void)
+ 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 171:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */
+ 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if(__HAL_PWR_PVD_EXTI_GET_FLAG() != RESET)
+ 173:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 174:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* PWR PVD interrupt user callback */
+ 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWR_PVDCallback();
+ 176:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 177:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */
+ 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_PVD_EXTI_CLEAR_FLAG();
+ 179:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 181:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 182:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 183:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWR PVD interrupt callback
+ 184:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None
+ 185:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 186:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __weak void HAL_PWR_PVDCallback(void)
+ 187:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 189 .loc 1 187 0
+ 190 .cfi_startproc
+ 191 @ args = 0, pretend = 0, frame = 0
+ 192 @ frame_needed = 0, uses_anonymous_args = 0
+ 193 @ link register save eliminated.
+ 188:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed,
+ 189:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** the HAL_PWR_PVDCallback could be implemented in the user file
+ 190:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 191:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 194 .loc 1 191 0
+ 195 @ sp needed
+ 196 0000 7047 bx lr
+ 197 .cfi_endproc
+ 198 .LFE44:
+ 200 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits
+ 201 .align 1
+ 202 .global HAL_PWR_PVD_IRQHandler
+ 203 .syntax unified
+ 204 .code 16
+ 205 .thumb_func
+ 206 .fpu softvfp
+ 208 HAL_PWR_PVD_IRQHandler:
+ 209 .LFB43:
+ 170:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */
+ 210 .loc 1 170 0
+ 211 .cfi_startproc
+ 212 @ args = 0, pretend = 0, frame = 0
+ 213 @ frame_needed = 0, uses_anonymous_args = 0
+ 214 0000 10B5 push {r4, lr}
+ 215 .LCFI0:
+ 216 .cfi_def_cfa_offset 8
+ ARM GAS /tmp/ccxTYr0X.s page 8
+
+
+ 217 .cfi_offset 4, -8
+ 218 .cfi_offset 14, -4
+ 172:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 219 .loc 1 172 0
+ 220 0002 064B ldr r3, .L18
+ 221 0004 5B69 ldr r3, [r3, #20]
+ 222 0006 DB03 lsls r3, r3, #15
+ 223 0008 00D4 bmi .L17
+ 224 .L15:
+ 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 225 .loc 1 180 0
+ 226 @ sp needed
+ 227 000a 10BD pop {r4, pc}
+ 228 .L17:
+ 175:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 229 .loc 1 175 0
+ 230 000c FFF7FEFF bl HAL_PWR_PVDCallback
+ 231 .LVL1:
+ 178:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 232 .loc 1 178 0
+ 233 0010 024B ldr r3, .L18
+ 234 0012 8022 movs r2, #128
+ 235 0014 5202 lsls r2, r2, #9
+ 236 0016 5A61 str r2, [r3, #20]
+ 180:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 237 .loc 1 180 0
+ 238 0018 F7E7 b .L15
+ 239 .L19:
+ 240 001a C046 .align 2
+ 241 .L18:
+ 242 001c 00040140 .word 1073808384
+ 243 .cfi_endproc
+ 244 .LFE43:
+ 246 .section .text.HAL_PWREx_EnableVddio2Monitor,"ax",%progbits
+ 247 .align 1
+ 248 .global HAL_PWREx_EnableVddio2Monitor
+ 249 .syntax unified
+ 250 .code 16
+ 251 .thumb_func
+ 252 .fpu softvfp
+ 254 HAL_PWREx_EnableVddio2Monitor:
+ 255 .LFB45:
+ 192:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 193:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #endif /* defined (STM32F031x6) || defined (STM32F051x8) || */
+ 194:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* defined (STM32F071xB) || defined (STM32F091xC) || */
+ 195:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* defined (STM32F042x6) || defined (STM32F072xB) */
+ 196:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 197:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** #if defined (STM32F042x6) || defined (STM32F048xx) || \
+ 198:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \
+ 199:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** defined (STM32F091xC) || defined (STM32F098xx)
+ 200:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 201:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Enable VDDIO2 monitor: enable Exti 31 and falling edge detection.
+ 202:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note If Exti 31 is enable correlty and VDDIO2 voltage goes below Vrefint,
+ 203:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** an interrupt is generated Irq line 1.
+ 204:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** NVIS has to be enable by user.
+ 205:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None
+ 206:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ ARM GAS /tmp/ccxTYr0X.s page 9
+
+
+ 207:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_EnableVddio2Monitor(void)
+ 208:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 256 .loc 1 208 0
+ 257 .cfi_startproc
+ 258 @ args = 0, pretend = 0, frame = 0
+ 259 @ frame_needed = 0, uses_anonymous_args = 0
+ 260 @ link register save eliminated.
+ 209:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_ENABLE_IT();
+ 261 .loc 1 209 0
+ 262 0000 044B ldr r3, .L21
+ 263 0002 1968 ldr r1, [r3]
+ 264 0004 8022 movs r2, #128
+ 265 0006 1206 lsls r2, r2, #24
+ 266 0008 1143 orrs r1, r2
+ 267 000a 1960 str r1, [r3]
+ 210:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE();
+ 268 .loc 1 210 0
+ 269 000c D968 ldr r1, [r3, #12]
+ 270 000e 0A43 orrs r2, r1
+ 271 0010 DA60 str r2, [r3, #12]
+ 211:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 272 .loc 1 211 0
+ 273 @ sp needed
+ 274 0012 7047 bx lr
+ 275 .L22:
+ 276 .align 2
+ 277 .L21:
+ 278 0014 00040140 .word 1073808384
+ 279 .cfi_endproc
+ 280 .LFE45:
+ 282 .section .text.HAL_PWREx_DisableVddio2Monitor,"ax",%progbits
+ 283 .align 1
+ 284 .global HAL_PWREx_DisableVddio2Monitor
+ 285 .syntax unified
+ 286 .code 16
+ 287 .thumb_func
+ 288 .fpu softvfp
+ 290 HAL_PWREx_DisableVddio2Monitor:
+ 291 .LFB46:
+ 212:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 213:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 214:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief Disable the Vddio2 Monitor.
+ 215:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None
+ 216:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 217:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_DisableVddio2Monitor(void)
+ 218:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 292 .loc 1 218 0
+ 293 .cfi_startproc
+ 294 @ args = 0, pretend = 0, frame = 0
+ 295 @ frame_needed = 0, uses_anonymous_args = 0
+ 296 @ link register save eliminated.
+ 219:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_DISABLE_IT();
+ 297 .loc 1 219 0
+ 298 0000 064B ldr r3, .L24
+ 299 0002 1A68 ldr r2, [r3]
+ 300 0004 5200 lsls r2, r2, #1
+ 301 0006 5208 lsrs r2, r2, #1
+ ARM GAS /tmp/ccxTYr0X.s page 10
+
+
+ 302 0008 1A60 str r2, [r3]
+ 220:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE();
+ 303 .loc 1 220 0
+ 304 000a DA68 ldr r2, [r3, #12]
+ 305 000c 5200 lsls r2, r2, #1
+ 306 000e 5208 lsrs r2, r2, #1
+ 307 0010 DA60 str r2, [r3, #12]
+ 308 0012 9A68 ldr r2, [r3, #8]
+ 309 0014 5200 lsls r2, r2, #1
+ 310 0016 5208 lsrs r2, r2, #1
+ 311 0018 9A60 str r2, [r3, #8]
+ 221:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 222:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 312 .loc 1 222 0
+ 313 @ sp needed
+ 314 001a 7047 bx lr
+ 315 .L25:
+ 316 .align 2
+ 317 .L24:
+ 318 001c 00040140 .word 1073808384
+ 319 .cfi_endproc
+ 320 .LFE46:
+ 322 .section .text.HAL_PWREx_Vddio2MonitorCallback,"ax",%progbits
+ 323 .align 1
+ 324 .weak HAL_PWREx_Vddio2MonitorCallback
+ 325 .syntax unified
+ 326 .code 16
+ 327 .thumb_func
+ 328 .fpu softvfp
+ 330 HAL_PWREx_Vddio2MonitorCallback:
+ 331 .LFB48:
+ 223:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 224:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 225:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief This function handles the PWR Vddio2 monitor interrupt request.
+ 226:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @note This API should be called under the VDDIO2_IRQHandler() PVD_VDDIO2_IRQHandler().
+ 227:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None
+ 228:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 229:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** void HAL_PWREx_Vddio2Monitor_IRQHandler(void)
+ 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 231:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */
+ 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** if(__HAL_PWR_VDDIO2_EXTI_GET_FLAG() != RESET)
+ 233:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 234:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* PWR Vddio2 monitor interrupt user callback */
+ 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** HAL_PWREx_Vddio2MonitorCallback();
+ 236:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 237:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Clear PWR Exti pending bit */
+ 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __HAL_PWR_VDDIO2_EXTI_CLEAR_FLAG();
+ 239:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 241:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 242:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /**
+ 243:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @brief PWR Vddio2 Monitor interrupt callback
+ 244:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** * @retval None
+ 245:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 246:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** __weak void HAL_PWREx_Vddio2MonitorCallback(void)
+ 247:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 332 .loc 1 247 0
+ ARM GAS /tmp/ccxTYr0X.s page 11
+
+
+ 333 .cfi_startproc
+ 334 @ args = 0, pretend = 0, frame = 0
+ 335 @ frame_needed = 0, uses_anonymous_args = 0
+ 336 @ link register save eliminated.
+ 248:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* NOTE : This function Should not be modified, when the callback is needed,
+ 249:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** the HAL_PWREx_Vddio2MonitorCallback could be implemented in the user file
+ 250:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** */
+ 251:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 337 .loc 1 251 0
+ 338 @ sp needed
+ 339 0000 7047 bx lr
+ 340 .cfi_endproc
+ 341 .LFE48:
+ 343 .section .text.HAL_PWREx_Vddio2Monitor_IRQHandler,"ax",%progbits
+ 344 .align 1
+ 345 .global HAL_PWREx_Vddio2Monitor_IRQHandler
+ 346 .syntax unified
+ 347 .code 16
+ 348 .thumb_func
+ 349 .fpu softvfp
+ 351 HAL_PWREx_Vddio2Monitor_IRQHandler:
+ 352 .LFB47:
+ 230:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** /* Check PWR exti flag */
+ 353 .loc 1 230 0
+ 354 .cfi_startproc
+ 355 @ args = 0, pretend = 0, frame = 0
+ 356 @ frame_needed = 0, uses_anonymous_args = 0
+ 357 0000 10B5 push {r4, lr}
+ 358 .LCFI1:
+ 359 .cfi_def_cfa_offset 8
+ 360 .cfi_offset 4, -8
+ 361 .cfi_offset 14, -4
+ 232:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** {
+ 362 .loc 1 232 0
+ 363 0002 064B ldr r3, .L30
+ 364 0004 5B69 ldr r3, [r3, #20]
+ 365 0006 002B cmp r3, #0
+ 366 0008 00DB blt .L29
+ 367 .L27:
+ 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 368 .loc 1 240 0
+ 369 @ sp needed
+ 370 000a 10BD pop {r4, pc}
+ 371 .L29:
+ 235:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 372 .loc 1 235 0
+ 373 000c FFF7FEFF bl HAL_PWREx_Vddio2MonitorCallback
+ 374 .LVL2:
+ 238:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c **** }
+ 375 .loc 1 238 0
+ 376 0010 024B ldr r3, .L30
+ 377 0012 8022 movs r2, #128
+ 378 0014 1206 lsls r2, r2, #24
+ 379 0016 5A61 str r2, [r3, #20]
+ 240:Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_hal_pwr_ex.c ****
+ 380 .loc 1 240 0
+ 381 0018 F7E7 b .L27
+ ARM GAS /tmp/ccxTYr0X.s page 12
+
+
+ 382 .L31:
+ 383 001a C046 .align 2
+ 384 .L30:
+ 385 001c 00040140 .word 1073808384
+ 386 .cfi_endproc
+ 387 .LFE47:
+ 389 .text
+ 390 .Letext0:
+ 391 .file 2 "/home/janhenrik/programme/gcc-arm-none-eabi-7-2018-q2-update/arm-none-eabi/include/machin
+ 392 .file 3 "/home/janhenrik/programme/gcc-arm-none-eabi-7-2018-q2-update/arm-none-eabi/include/sys/_s
+ 393 .file 4 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h"
+ 394 .file 5 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f072xb.h"
+ 395 .file 6 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal_pwr_ex.h"
+ 396 .file 7 "Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h"
+ 397 .file 8 "Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_hal.h"
+ ARM GAS /tmp/ccxTYr0X.s page 13
+
+
+DEFINED SYMBOLS
+ *ABS*:0000000000000000 stm32f0xx_hal_pwr_ex.c
+ /tmp/ccxTYr0X.s:16 .text.HAL_PWR_ConfigPVD:0000000000000000 $t
+ /tmp/ccxTYr0X.s:23 .text.HAL_PWR_ConfigPVD:0000000000000000 HAL_PWR_ConfigPVD
+ /tmp/ccxTYr0X.s:111 .text.HAL_PWR_ConfigPVD:0000000000000074 $d
+ /tmp/ccxTYr0X.s:118 .text.HAL_PWR_EnablePVD:0000000000000000 $t
+ /tmp/ccxTYr0X.s:125 .text.HAL_PWR_EnablePVD:0000000000000000 HAL_PWR_EnablePVD
+ /tmp/ccxTYr0X.s:144 .text.HAL_PWR_EnablePVD:000000000000000c $d
+ /tmp/ccxTYr0X.s:149 .text.HAL_PWR_DisablePVD:0000000000000000 $t
+ /tmp/ccxTYr0X.s:156 .text.HAL_PWR_DisablePVD:0000000000000000 HAL_PWR_DisablePVD
+ /tmp/ccxTYr0X.s:175 .text.HAL_PWR_DisablePVD:000000000000000c $d
+ /tmp/ccxTYr0X.s:180 .text.HAL_PWR_PVDCallback:0000000000000000 $t
+ /tmp/ccxTYr0X.s:187 .text.HAL_PWR_PVDCallback:0000000000000000 HAL_PWR_PVDCallback
+ /tmp/ccxTYr0X.s:201 .text.HAL_PWR_PVD_IRQHandler:0000000000000000 $t
+ /tmp/ccxTYr0X.s:208 .text.HAL_PWR_PVD_IRQHandler:0000000000000000 HAL_PWR_PVD_IRQHandler
+ /tmp/ccxTYr0X.s:242 .text.HAL_PWR_PVD_IRQHandler:000000000000001c $d
+ /tmp/ccxTYr0X.s:247 .text.HAL_PWREx_EnableVddio2Monitor:0000000000000000 $t
+ /tmp/ccxTYr0X.s:254 .text.HAL_PWREx_EnableVddio2Monitor:0000000000000000 HAL_PWREx_EnableVddio2Monitor
+ /tmp/ccxTYr0X.s:278 .text.HAL_PWREx_EnableVddio2Monitor:0000000000000014 $d
+ /tmp/ccxTYr0X.s:283 .text.HAL_PWREx_DisableVddio2Monitor:0000000000000000 $t
+ /tmp/ccxTYr0X.s:290 .text.HAL_PWREx_DisableVddio2Monitor:0000000000000000 HAL_PWREx_DisableVddio2Monitor
+ /tmp/ccxTYr0X.s:318 .text.HAL_PWREx_DisableVddio2Monitor:000000000000001c $d
+ /tmp/ccxTYr0X.s:323 .text.HAL_PWREx_Vddio2MonitorCallback:0000000000000000 $t
+ /tmp/ccxTYr0X.s:330 .text.HAL_PWREx_Vddio2MonitorCallback:0000000000000000 HAL_PWREx_Vddio2MonitorCallback
+ /tmp/ccxTYr0X.s:344 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:0000000000000000 $t
+ /tmp/ccxTYr0X.s:351 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:0000000000000000 HAL_PWREx_Vddio2Monitor_IRQHandler
+ /tmp/ccxTYr0X.s:385 .text.HAL_PWREx_Vddio2Monitor_IRQHandler:000000000000001c $d
+
+NO UNDEFINED SYMBOLS