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-rw-r--r--controller/fw/src/adc.c12
-rw-r--r--controller/fw/src/freq_meas.c27
-rw-r--r--controller/fw/src/main.c75
-rw-r--r--controller/fw/src/system_stm32f4xx.c5
4 files changed, 96 insertions, 23 deletions
diff --git a/controller/fw/src/adc.c b/controller/fw/src/adc.c
index 07431be..74f0aa9 100644
--- a/controller/fw/src/adc.c
+++ b/controller/fw/src/adc.c
@@ -51,8 +51,9 @@ void adc_init() {
ADC1->CR1 = (0<<ADC_CR1_RES_Pos) | (0<<ADC_CR1_DISCNUM_Pos) | ADC_CR1_DISCEN | (0<<ADC_CR1_AWDCH_Pos);
ADC1->CR2 = (1<<ADC_CR2_EXTEN_Pos) | (0<<ADC_CR2_EXTSEL_Pos) | ADC_CR2_DMA | ADC_CR2_ADON | ADC_CR2_DDS;
- ADC1->SQR3 = (adc_channel<<ADC_SQR3_SQ3_Pos);
+ ADC1->SQR3 = (adc_channel<<ADC_SQR3_SQ1_Pos);
ADC1->SQR1 = (0<<ADC_SQR1_L_Pos);
+ ADC1->SMPR2 = (7<<ADC_SMPR2_SMP0_Pos);
TIM1->CR2 = (2<<TIM_CR2_MMS_Pos); /* Enable update event on TRGO to provide a 1ms reference to rest of system */
TIM1->CCMR1 = (6<<TIM_CCMR1_OC1M_Pos) | (0<<TIM_CCMR1_CC1S_Pos);
@@ -86,11 +87,17 @@ void DMA2_Stream0_IRQHandler(void) {
uint8_t isr = (DMA2->LISR >> DMA_LISR_FEIF0_Pos) & 0x3f;
GPIOA->ODR ^= 1<<7;
+ GPIOA->BSRR = 1<<10;
if (isr & DMA_LISR_TCIF0) { /* Transfer complete */
/* Check we're done processing the old buffer */
- if (adc_fft_buf_ready_idx != -1)
+ if (adc_fft_buf_ready_idx != -1) { /* FIXME DEBUG */
+ GPIOA->BSRR = 1<<10<<16;
+ /* clear all flags */
+ adc_dma->LIFCR = isr<<DMA_LISR_FEIF0_Pos;
+ return;
panic();
+ }
/* Kickoff FFT */
int ct = !!(adc_stream->CR & DMA_SxCR_CT);
@@ -103,6 +110,7 @@ void DMA2_Stream0_IRQHandler(void) {
if (isr & DMA_LISR_TEIF0) /* Transfer error */
panic();
+ GPIOA->BSRR = 1<<10<<16;
/* clear all flags */
adc_dma->LIFCR = isr<<DMA_LISR_FEIF0_Pos;
}
diff --git a/controller/fw/src/freq_meas.c b/controller/fw/src/freq_meas.c
index 83a330c..020e12d 100644
--- a/controller/fw/src/freq_meas.c
+++ b/controller/fw/src/freq_meas.c
@@ -1,4 +1,8 @@
+#ifndef SIMULATION
+#include <stm32f407xx.h>
+#endif
+
#include <unistd.h>
#include <math.h>
@@ -57,7 +61,13 @@ int adc_buf_measure_freq(uint16_t adc_buf[FMEAS_FFT_LEN], float *out) {
DEBUG_PRINTN("%010f, ", in_buf[i]);
DEBUG_PRINTN("\n");
*/
+#ifndef SIMULATION
+ GPIOA->BSRR = 1<<12;
+#endif
arm_rfft_fast_f32(&fft_inst, in_buf, out_buf, 0);
+#ifndef SIMULATION
+ GPIOA->BSRR = 1<<12<<16;
+#endif
#define FMEAS_FFT_WINDOW_MIN_F_HZ 30.0f
#define FMEAS_FFT_WINDOW_MAX_F_HZ 70.0f
@@ -66,6 +76,7 @@ int adc_buf_measure_freq(uint16_t adc_buf[FMEAS_FFT_LEN], float *out) {
const size_t last_bin = (int)(FMEAS_FFT_WINDOW_MAX_F_HZ / binsize_hz + 0.5f);
const size_t nbins = last_bin - first_bin + 1;
+ /*
DEBUG_PRINT("binsize_hz=%f first_bin=%zd last_bin=%zd nbins=%zd", binsize_hz, first_bin, last_bin, nbins);
DEBUG_PRINTN(" [bins real] ");
for (size_t i=0; i<FMEAS_FFT_LEN/2; i+=2)
@@ -76,6 +87,7 @@ int adc_buf_measure_freq(uint16_t adc_buf[FMEAS_FFT_LEN], float *out) {
DEBUG_PRINT("\n");
DEBUG_PRINT("Repacking FFT results");
+ */
/* Copy real values of target data to front of output buffer */
for (size_t i=0; i<nbins; i++) {
float real = out_buf[2 * (first_bin + i)];
@@ -83,7 +95,9 @@ int adc_buf_measure_freq(uint16_t adc_buf[FMEAS_FFT_LEN], float *out) {
out_buf[i] = sqrtf(real*real + imag*imag);
}
+ /*
DEBUG_PRINT("Running Levenberg-Marquardt");
+ */
LMstat lmstat;
levmarq_init(&lmstat);
@@ -99,16 +113,29 @@ int adc_buf_measure_freq(uint16_t adc_buf[FMEAS_FFT_LEN], float *out) {
float par[3] = {
a_max, i_max, 1.0f
};
+ /*
DEBUG_PRINT(" par_pre={%010f, %010f, %010f}", par[0], par[1], par[2]);
+ */
+#ifndef SIMULATION
+ GPIOA->BSRR = 1<<12;
+#endif
if (levmarq(3, par, nbins, out_buf, NULL, func_gauss, func_gauss_grad, NULL, &lmstat) < 0) {
+#ifndef SIMULATION
+ GPIOA->BSRR = 1<<12<<16;
+#endif
*out = NAN;
return -1;
}
+#ifndef SIMULATION
+ GPIOA->BSRR = 1<<12<<16;
+#endif
+ /*
DEBUG_PRINT(" par_post={%010f, %010f, %010f}", par[0], par[1], par[2]);
DEBUG_PRINT("done.");
+ */
*out = (par[1] + first_bin) * binsize_hz;
return 0;
}
diff --git a/controller/fw/src/main.c b/controller/fw/src/main.c
index c03bcbb..fa5d50b 100644
--- a/controller/fw/src/main.c
+++ b/controller/fw/src/main.c
@@ -3,6 +3,7 @@
#include <stdint.h>
#include <assert.h>
#include <string.h>
+#include <math.h>
#include <stm32f407xx.h>
@@ -159,50 +160,52 @@ void spi_flash_test(void) {
static unsigned int measurement_errors = 0;
static struct dsss_demod_state demod_state;
static uint32_t freq_sample_ts = 0;
-static uint32_t debug_last_freq = 0;
+static float debug_last_freq = 0;
int main(void)
{
- /* DEBUG */
- /* MCO2 */
+#if DEBUG
+ /* PLL clock on MCO2 (pin C9) */
RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN;
GPIOC->MODER &= ~GPIO_MODER_MODER9_Msk;
GPIOC->MODER |= (2<<GPIO_MODER_MODER9_Pos);
GPIOC->AFR[1] &= ~GPIO_AFRH_AFSEL9_Msk;
GPIOC->OSPEEDR |= (3<<GPIO_OSPEEDR_OSPEED9_Pos); /* SCK */
RCC->CFGR |= (6<<RCC_CFGR_MCO2PRE_Pos) | (3<<RCC_CFGR_MCO2_Pos);
- /* END DEBUG */
+#endif
+
+ if (((SCB->CPACR>>20) & 0xf) != 0xf) {
+ asm volatile ("bkpt");
+ }
clock_setup();
led_setup();
- /*
spi_flash_setup();
adc_init();
- */
- /* DEBUG */
- /* TIM1 CC1 */
+#if DEBUG
+ /* TIM1 CC1 (ADC trigger) on pin A8 */
GPIOA->MODER &= ~GPIO_MODER_MODER8_Msk;
GPIOA->MODER |= (2<<GPIO_MODER_MODER8_Pos);
GPIOA->AFR[1] &= ~GPIO_AFRH_AFSEL8_Msk;
GPIOA->AFR[1] |= 1<<GPIO_AFRH_AFSEL8_Pos;
- /* END DEBUG */
- int cnt = 0;
- while (23) {
- if (cnt++ == 100000) {
- cnt = 0;
- GPIOA->ODR ^= 1<<6;
- }
+ GPIOA->MODER |= (1<<GPIO_MODER_MODER9_Pos) | (1<<GPIO_MODER_MODER10_Pos) | (1<<GPIO_MODER_MODER11_Pos) |
+ (1<<GPIO_MODER_MODER12_Pos) | (1<<GPIO_MODER_MODER15_Pos);
+#endif
+ while (23) {
if (adc_fft_buf_ready_idx != -1) {
+ GPIOA->BSRR = 1<<9;
+ adc_fft_buf_ready_idx = !adc_fft_buf_ready_idx; /* DEBUG */
memcpy(adc_fft_buf[!adc_fft_buf_ready_idx], adc_fft_buf[adc_fft_buf_ready_idx] + FMEAS_FFT_LEN/2, sizeof(adc_fft_buf[0][0]) * FMEAS_FFT_LEN/2);
+ GPIOA->BSRR = 1<<9<<16;
+ GPIOA->BSRR = 1<<11;
-#if 0
float out;
if (adc_buf_measure_freq(adc_fft_buf[adc_fft_buf_ready_idx], &out)) {
measurement_errors++;
- debug_last_freq = -1;
+ debug_last_freq = NAN;
} else {
debug_last_freq = out;
@@ -212,7 +215,7 @@ int main(void)
dsss_demod_step(&demod_state, out, freq_sample_ts);
*/
}
-#endif
+ GPIOA->BSRR = 1<<11<<16;
freq_sample_ts++; /* TODO: also increase in case of freq measurement error? */
adc_fft_buf_ready_idx = -1;
@@ -222,3 +225,39 @@ int main(void)
return 0;
}
+void NMI_Handler(void) {
+ asm volatile ("bkpt");
+}
+
+void HardFault_Handler(void) {
+ asm volatile ("bkpt");
+}
+
+void MemManage_Handler(void) {
+ asm volatile ("bkpt");
+}
+
+void BusFault_Handler(void) {
+ asm volatile ("bkpt");
+}
+
+void UsageFault_Handler(void) {
+ asm volatile ("bkpt");
+}
+
+void SVC_Handler(void) {
+ asm volatile ("bkpt");
+}
+
+void DebugMon_Handler(void) {
+ asm volatile ("bkpt");
+}
+
+void PendSV_Handler(void) {
+ asm volatile ("bkpt");
+}
+
+void SysTick_Handler(void) {
+ asm volatile ("bkpt");
+}
+
diff --git a/controller/fw/src/system_stm32f4xx.c b/controller/fw/src/system_stm32f4xx.c
index 9037604..5d005ed 100644
--- a/controller/fw/src/system_stm32f4xx.c
+++ b/controller/fw/src/system_stm32f4xx.c
@@ -165,10 +165,9 @@ const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
*/
void SystemInit(void)
{
- /* FPU settings ------------------------------------------------------------*/
- #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
- #endif
+ __DSB();
+ __ISB();
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
SystemInit_ExtMemCtl();
generated by cgit (git 2.34.1) at 2024-11-11 06:42:29 +0000