Merge remote-tracking branch 'wendelstein/master'

5 files changed, 0 insertions, 336 deletions

diff --git a/mech_pcbs/stator_raspi_vstrut_pcb/fp-info-cache b/mech_pcbs/stator_raspi_vstrut_pcb/fp-info-cache
deleted file mode 100644
index 1874828..0000000
--- a/mech_pcbs/stator_raspi_vstrut_pcb/fp-info-cache
+++ /dev/null
@@ -1 +0,0 @@
-0

diff --git a/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_pcb b/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_pcb
deleted file mode 100644
index 2be5e65..0000000
--- a/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_pcb
+++ /dev/null
@@ -1,97 +0,0 @@
-(kicad_pcb (version 20200811) (host pcbnew "(5.99.0-2687-geae739d98)")

-

-  (general

-    (thickness 1.6)

-    (drawings 0)

-    (tracks 0)

-    (modules 0)

-    (nets 1)

-  )

-

-  (paper "A4")

-  (layers

-    (0 "F.Cu" signal)

-    (31 "B.Cu" signal)

-    (32 "B.Adhes" user)

-    (33 "F.Adhes" user)

-    (34 "B.Paste" user)

-    (35 "F.Paste" user)

-    (36 "B.SilkS" user)

-    (37 "F.SilkS" user)

-    (38 "B.Mask" user)

-    (39 "F.Mask" user)

-    (40 "Dwgs.User" user)

-    (41 "Cmts.User" user)

-    (42 "Eco1.User" user)

-    (43 "Eco2.User" user)

-    (44 "Edge.Cuts" user)

-    (45 "Margin" user)

-    (46 "B.CrtYd" user)

-    (47 "F.CrtYd" user)

-    (48 "B.Fab" user)

-    (49 "F.Fab" user)

-  )

-

-  (setup

-    (grid_origin 150 100)

-    (pcbplotparams

-      (layerselection 0x010fc_ffffffff)

-      (usegerberextensions false)

-      (usegerberattributes true)

-      (usegerberadvancedattributes true)

-      (creategerberjobfile true)

-      (svguseinch false)

-      (svgprecision 6)

-      (excludeedgelayer true)

-      (linewidth 0.100000)

-      (plotframeref false)

-      (viasonmask false)

-      (mode 1)

-      (useauxorigin false)

-      (hpglpennumber 1)

-      (hpglpenspeed 20)

-      (hpglpendiameter 15.000000)

-      (psnegative false)

-      (psa4output false)

-      (plotreference true)

-      (plotvalue true)

-      (plotinvisibletext false)

-      (sketchpadsonfab false)

-      (subtractmaskfromsilk false)

-      (outputformat 1)

-      (mirror false)

-      (drillshape 1)

-      (scaleselection 1)

-      (outputdirectory "")

-    )

-  )

-

-  (net 0 "")

-

-

-  (gr_line (start 146.000 -15.200) (end 153.454 -15.200) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 153.454 -15.200) (end 153.454 -11.600) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 146.000 -11.600) (end 146.000 -15.200) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 139.727 -11.600) (end 146.000 -11.600) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 159.727 -11.600) (end 159.727 -1.600) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 159.727 98.400) (end 153.454 98.400) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 139.727 98.400) (end 139.727 83.400) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 121.727 -1.600) (end 139.727 -1.600) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 177.727 -1.600) (end 177.727 83.400) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 177.727 83.400) (end 159.727 83.400) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 121.727 83.400) (end 121.727 -1.600) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 153.454 98.400) (end 153.454 102.000) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 153.454 102.000) (end 146.000 102.000) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 146.000 102.000) (end 146.000 98.400) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 146.000 98.400) (end 139.727 98.400) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 139.727 83.400) (end 121.727 83.400) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 139.727 -1.600) (end 139.727 -11.600) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 159.727 83.400) (end 159.727 98.400) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 159.727 -1.600) (end 177.727 -1.600) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_line (start 153.454 -11.600) (end 159.727 -11.600) (angle 90) (layer Edge.Cuts) (width 0.16))

-  (gr_circle (center 125.500 1.900) (end 124.150 1.900) (layer Edge.Cuts) (width 0.16))

-  (gr_circle (center 174.500 1.900) (end 173.150 1.900) (layer Edge.Cuts) (width 0.16))

-  (gr_circle (center 174.500 59.900) (end 173.150 59.900) (layer Edge.Cuts) (width 0.16))

-  (gr_circle (center 125.500 59.900) (end 124.150 59.900) (layer Edge.Cuts) (width 0.16))

-)

- 
\ No newline at end of file
diff --git a/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_prl b/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_prl
deleted file mode 100644
index 6cbba0c..0000000
--- a/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_prl
+++ /dev/null
@@ -1,63 +0,0 @@
-{
-  "board": {
-    "active_layer": 0,
-    "active_layer_preset": "",
-    "hidden_nets": [],
-    "high_contrast_mode": 0,
-    "selection_filter": {
-      "dimensions": true,
-      "footprints": true,
-      "graphics": true,
-      "keepouts": true,
-      "lockedItems": true,
-      "otherItems": true,
-      "pads": true,
-      "text": true,
-      "tracks": true,
-      "vias": true,
-      "zones": true
-    },
-    "visible_items": [
-      0,
-      1,
-      2,
-      3,
-      4,
-      5,
-      6,
-      8,
-      9,
-      10,
-      11,
-      12,
-      13,
-      14,
-      15,
-      16,
-      17,
-      18,
-      19,
-      20,
-      21,
-      22,
-      23,
-      24,
-      25,
-      26,
-      27,
-      28,
-      29,
-      30,
-      31,
-      32,
-      33,
-      34,
-      35
-    ],
-    "visible_layers": "7ffff_ffffffff"
-  },
-  "meta": {
-    "filename": "stator_raspi_vstrut_pcb.kicad_prl",
-    "version": 1
-  }
-}
diff --git a/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_pro b/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_pro
deleted file mode 100644
index 0e3a658..0000000
--- a/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_pro
+++ /dev/null
@@ -1,170 +0,0 @@
-{
-  "board": {
-    "design_settings": {
-      "defaults": {
-        "board_outline_line_width": 0.09999999999999999,
-        "copper_line_width": 0.19999999999999998,
-        "copper_text_italic": false,
-        "copper_text_size_h": 1.5,
-        "copper_text_size_v": 1.5,
-        "copper_text_thickness": 0.3,
-        "copper_text_upright": false,
-        "courtyard_line_width": 0.049999999999999996,
-        "dimension_precision": 1,
-        "dimension_units": 0,
-        "fab_line_width": 0.09999999999999999,
-        "fab_text_italic": false,
-        "fab_text_size_h": 1.0,
-        "fab_text_size_v": 1.0,
-        "fab_text_thickness": 0.15,
-        "fab_text_upright": false,
-        "other_line_width": 0.15,
-        "other_text_italic": false,
-        "other_text_size_h": 1.0,
-        "other_text_size_v": 1.0,
-        "other_text_thickness": 0.15,
-        "other_text_upright": false,
-        "pads": {
-          "drill": 0.762,
-          "height": 1.524,
-          "width": 1.524
-        },
-        "silk_line_width": 0.15,
-        "silk_text_italic": false,
-        "silk_text_size_h": 1.0,
-        "silk_text_size_v": 1.0,
-        "silk_text_thickness": 0.15,
-        "silk_text_upright": false,
-        "zones": {
-          "45_degree_only": false,
-          "min_clearance": 0.508
-        }
-      },
-      "diff_pair_dimensions": [
-        {
-          "gap": 0.25,
-          "via_gap": 0.25,
-          "width": 0.2
-        }
-      ],
-      "drc_exclusions": [],
-      "meta": {
-        "version": 0
-      },
-      "rule_severities": {
-        "clearance": "error",
-        "copper_edge_clearance": "error",
-        "courtyards_overlap": "error",
-        "drill_too_small": "error",
-        "duplicate_footprints": "warning",
-        "extra_footprint": "warning",
-        "hole_near_hole": "error",
-        "invalid_outline": "error",
-        "item_on_disabled_layer": "error",
-        "items_not_allowed": "error",
-        "keepout": "error",
-        "malformed_courtyard": "error",
-        "microvia_drill_too_small": "error",
-        "microvia_too_small": "error",
-        "missing_courtyard": "ignore",
-        "missing_footprint": "warning",
-        "npth_inside_courtyard": "ignore",
-        "padstack": "error",
-        "pth_inside_courtyard": "ignore",
-        "shorting_items": "error",
-        "track_dangling": "warning",
-        "track_width": "error",
-        "tracks_crossing": "error",
-        "unconnected_items": "error",
-        "unresolved_variable": "error",
-        "via_annulus": "error",
-        "via_dangling": "warning",
-        "via_hole_larger_than_pad": "error",
-        "via_too_small": "error",
-        "zone_has_empty_net": "error",
-        "zones_intersect": "error"
-      },
-      "rules": {
-        "allow_blind_buried_vias": false,
-        "allow_microvias": false,
-        "max_error": 0.005,
-        "min_clearance": 0.0,
-        "min_copper_edge_clearance": 0.0,
-        "min_hole_to_hole": 0.25,
-        "min_microvia_diameter": 0.19999999999999998,
-        "min_microvia_drill": 0.09999999999999999,
-        "min_through_hole_diameter": 0.3,
-        "min_track_width": 0.19999999999999998,
-        "min_via_annulus": 0.049999999999999996,
-        "min_via_diameter": 0.39999999999999997,
-        "solder_mask_clearance": 0.0,
-        "solder_mask_min_width": 0.0,
-        "solder_paste_clearance": 0.0,
-        "solder_paste_margin_ratio": 0.0
-      },
-      "track_widths": [
-        0.25
-      ],
-      "via_dimensions": [
-        {
-          "diameter": 0.8,
-          "drill": 0.4
-        }
-      ],
-      "zones_use_no_outline": false
-    },
-    "layer_presets": []
-  },
-  "boards": [],
-  "cvpcb": {
-    "equivalence_files": []
-  },
-  "libraries": {
-    "pinned_footprint_libs": [],
-    "pinned_symbol_libs": []
-  },
-  "meta": {
-    "filename": "stator_raspi_vstrut_pcb.kicad_pro",
-    "version": 1
-  },
-  "net_settings": {
-    "classes": [
-      {
-        "bus_width": 6.0,
-        "clearance": 0.2,
-        "diff_pair_gap": 0.25,
-        "diff_pair_via_gap": 0.25,
-        "diff_pair_width": 0.2,
-        "line_style": 0,
-        "microvia_diameter": 0.3,
-        "microvia_drill": 0.1,
-        "name": "Default",
-        "track_width": 0.25,
-        "via_diameter": 0.8,
-        "via_drill": 0.4,
-        "wire_width": 6.0
-      }
-    ],
-    "meta": {
-      "version": 0
-    },
-    "net_colors": null
-  },
-  "pcbnew": {
-    "last_paths": {
-      "gencad": "",
-      "idf": "",
-      "netlist": "",
-      "specctra_dsn": "",
-      "step": "",
-      "vmrl": ""
-    },
-    "page_layout_descr_file": ""
-  },
-  "schematic": {
-    "legacy_lib_dir": "",
-    "legacy_lib_list": []
-  },
-  "sheets": [],
-  "text_variables": {}
-}
diff --git a/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_sch b/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_sch
deleted file mode 100644
index 1d1e834..0000000
--- a/mech_pcbs/stator_raspi_vstrut_pcb/stator_raspi_vstrut_pcb.kicad_sch
+++ /dev/null
@@ -1,5 +0,0 @@
-(kicad_sch (version 20200310) (host eeschema "unknown")
-(  page "A4")
-  (lib_symbols)
-  (symbol_instances)
-)