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authorjaseg <git@jaseg.de>2020-11-24 19:00:18 +0100
committerjaseg <git@jaseg.de>2020-11-24 19:00:18 +0100
commit0bfd7efaf4256e4c2821f8796781f0d81ad08251 (patch)
treeb9c1e08032ff7b31a70cddc35ed59137db43cc9e /.gitmodules
parent7ab2d94564fdb723eefca576f8043a770f22e1f7 (diff)
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Add prototype rotor firmware skeleton
Diffstat (limited to '.gitmodules')
-rw-r--r--.gitmodules23
1 files changed, 22 insertions, 1 deletions
diff --git a/.gitmodules b/.gitmodules
index 13007e9..c7286ab 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,3 +1,24 @@
[submodule "prototype/dbg-connect"]
path = prototype/dbg-connect
- url = git@git.jaseg.net:sjandrakei/pub/dbg-connect.git
+ url = https://git.jaseg.de/dbg-connect.git
+ branch = master
+
+[submodule "prototype/fw/upstream/cmsis-core"]
+ path = prototype/fw/upstream/cmsis-core
+ url = https://github.com/STMicroelectronics/cmsis_core
+ branch = master
+
+[submodule "prototype/fw/upstream/cmsis-device-f3"]
+ path = prototype/fw/upstream/cmsis-device-f3
+ url = https://github.com/STMicroelectronics/cmsis_device_f3
+ branch = master
+
+[submodule "prototype/fw/upstream/tinyprintf"]
+ path = prototype/fw/upstream/tinyprintf
+ url = https://github.com/cjlano/tinyprintf
+ branch = master
+
+[submodule "prototype/fw/upstream/stm32square"]
+ path = prototype/fw/upstream/stm32square
+ url = https://gitlab.com/neinseg/stm32square
+ branch = release