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authorjaseg <git@jaseg.de>2022-01-30 20:11:38 +0100
committerjaseg <git@jaseg.de>2022-01-30 20:11:38 +0100
commitc3ca4f95bd59f69d45e582a4149327f57a360760 (patch)
tree5f43c61a261698e2f671b5238a7aa9a71a0f6d23 /gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP
parent259a56186820923c78a5688f59bd8249cf958b5f (diff)
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Rename gerbonara/gerber package to just gerbonara
Diffstat (limited to 'gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP')
-rw-r--r--gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP3
1 files changed, 3 insertions, 0 deletions
diff --git a/gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP b/gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP
new file mode 100644
index 0000000..eaa098a
--- /dev/null
+++ b/gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP
@@ -0,0 +1,3 @@
+Layer Pairs Export File for PCB: E:\Saniok\Lime Micro\Lime PCBs\LimeSDR-QPCIe_1v2\AltiumDesigner Design files\PCB\LimeSDR-QPCIe_1v2.PcbDoc
+LayersSetName=Top_Bot_Thru_Holes|DrillFile=limesdr-qpcie_1v2-roundholes.txt|DrillLayers=gtl,g1,g2,g3,g4,g5,g6,g7,g8,g9,g10,g11,g12,gbl
+LayersSetName=Top_Bot_Slot_Holes|DrillFile=limesdr-qpcie_1v2-slotholes.txt|DrillLayers=gtl,g1,g2,g3,g4,g5,g6,g7,g8,g9,g10,g11,g12,gbl