From c3ca4f95bd59f69d45e582a4149327f57a360760 Mon Sep 17 00:00:00 2001 From: jaseg Date: Sun, 30 Jan 2022 20:11:38 +0100 Subject: Rename gerbonara/gerber package to just gerbonara --- .../resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP | 3 +++ 1 file changed, 3 insertions(+) create mode 100644 gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP (limited to 'gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP') diff --git a/gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP b/gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP new file mode 100644 index 0000000..eaa098a --- /dev/null +++ b/gerbonara/tests/resources/altium-composite-drill/NC Drill/LimeSDR-QPCIe_1v2.LDP @@ -0,0 +1,3 @@ +Layer Pairs Export File for PCB: E:\Saniok\Lime Micro\Lime PCBs\LimeSDR-QPCIe_1v2\AltiumDesigner Design files\PCB\LimeSDR-QPCIe_1v2.PcbDoc +LayersSetName=Top_Bot_Thru_Holes|DrillFile=limesdr-qpcie_1v2-roundholes.txt|DrillLayers=gtl,g1,g2,g3,g4,g5,g6,g7,g8,g9,g10,g11,g12,gbl +LayersSetName=Top_Bot_Slot_Holes|DrillFile=limesdr-qpcie_1v2-slotholes.txt|DrillLayers=gtl,g1,g2,g3,g4,g5,g6,g7,g8,g9,g10,g11,g12,gbl -- cgit