diff options
Diffstat (limited to 'cable/dbg_connect_cable/dbg_connect_cable.kicad_pro')
| -rw-r--r-- | cable/dbg_connect_cable/dbg_connect_cable.kicad_pro | 367 |
1 files changed, 367 insertions, 0 deletions
diff --git a/cable/dbg_connect_cable/dbg_connect_cable.kicad_pro b/cable/dbg_connect_cable/dbg_connect_cable.kicad_pro new file mode 100644 index 0000000..8fa011d --- /dev/null +++ b/cable/dbg_connect_cable/dbg_connect_cable.kicad_pro @@ -0,0 +1,367 @@ +{ + "board": { + "design_settings": { + "defaults": { + "board_outline_line_width": 0.09999999999999999, + "copper_line_width": 0.19999999999999998, + "copper_text_italic": false, + "copper_text_size_h": 1.5, + "copper_text_size_v": 1.5, + "copper_text_thickness": 0.3, + "copper_text_upright": false, + "courtyard_line_width": 0.049999999999999996, + "dimension_precision": 1, + "dimension_units": 0, + "fab_line_width": 0.09999999999999999, + "fab_text_italic": false, + "fab_text_size_h": 1.0, + "fab_text_size_v": 1.0, + "fab_text_thickness": 0.15, + "fab_text_upright": false, + "other_line_width": 0.15, + "other_text_italic": false, + "other_text_size_h": 1.0, + "other_text_size_v": 1.0, + "other_text_thickness": 0.15, + "other_text_upright": false, + "pads": { + "drill": 0.762, + "height": 1.524, + "width": 1.524 + }, + "silk_line_width": 0.15, + "silk_text_italic": false, + "silk_text_size_h": 1.0, + "silk_text_size_v": 1.0, + "silk_text_thickness": 0.15, + "silk_text_upright": false, + "zones": { + "45_degree_only": false, + "min_clearance": 0.508 + } + }, + "diff_pair_dimensions": [ + { + "gap": 0.25, + "via_gap": 0.25, + "width": 0.2 + } + ], + "drc_exclusions": [], + "meta": { + "version": 0 + }, + "rule_severities": { + "clearance": "error", + "copper_edge_clearance": "error", + "courtyards_overlap": "error", + "drill_too_small": "error", + "duplicate_footprints": "warning", + "extra_footprint": "warning", + "hole_near_hole": "error", + "invalid_outline": "error", + "item_on_disabled_layer": "error", + "items_not_allowed": "error", + "keepout": "error", + "malformed_courtyard": "error", + "microvia_drill_too_small": "error", + "microvia_too_small": "error", + "missing_courtyard": "ignore", + "missing_footprint": "warning", + "npth_inside_courtyard": "ignore", + "padstack": "error", + "pth_inside_courtyard": "ignore", + "shorting_items": "error", + "track_dangling": "warning", + "track_width": "error", + "tracks_crossing": "error", + "unconnected_items": "error", + "unresolved_variable": "error", + "via_annulus": "error", + "via_dangling": "warning", + "via_hole_larger_than_pad": "error", + "via_too_small": "error", + "zone_has_empty_net": "error", + "zones_intersect": "error" + }, + "rules": { + "allow_blind_buried_vias": false, + "allow_microvias": false, + "max_error": 0.005, + "min_clearance": 0.0, + "min_copper_edge_clearance": 0.0, + "min_hole_to_hole": 0.25, + "min_microvia_diameter": 0.19999999999999998, + "min_microvia_drill": 0.09999999999999999, + "min_through_hole_diameter": 0.3, + "min_track_width": 0.19999999999999998, + "min_via_annulus": 0.049999999999999996, + "min_via_diameter": 0.39999999999999997, + "solder_mask_clearance": 0.0, + "solder_mask_min_width": 0.0, + "solder_paste_clearance": 0.0, + "solder_paste_margin_ratio": -0.0 + }, + "track_widths": [ + 0.25, + 0.4 + ], + "via_dimensions": [ + { + "diameter": 0.8, + "drill": 0.4 + } + ], + "zones_use_no_outline": true + }, + "layer_presets": [] + }, + "boards": [], + "cvpcb": { + "equivalence_files": [] + }, + "erc": { + "meta": { + "version": 0 + }, + "pin_map": [ + [ + 0, + 0, + 0, + 0, + 0, + 1, + 0, + 0, + 0, + 0, + 2 + ], + [ + 0, + 2, + 0, + 1, + 0, + 1, + 0, + 2, + 2, + 2, + 2 + ], + [ + 0, + 0, + 0, + 0, + 0, + 1, + 0, + 1, + 0, + 1, + 2 + ], + [ + 0, + 1, + 0, + 0, + 0, + 1, + 1, + 2, + 1, + 1, + 2 + ], + [ + 0, + 0, + 0, + 0, + 0, + 1, + 0, + 0, + 0, + 0, + 2 + ], + [ + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 2 + ], + [ + 0, + 0, + 0, + 1, + 0, + 1, + 0, + 0, + 0, + 0, + 2 + ], + [ + 0, + 2, + 1, + 2, + 0, + 1, + 0, + 2, + 2, + 2, + 2 + ], + [ + 0, + 2, + 0, + 1, + 0, + 1, + 0, + 2, + 0, + 0, + 2 + ], + [ + 0, + 2, + 1, + 1, + 0, + 1, + 0, + 2, + 0, + 0, + 2 + ], + [ + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2, + 2 + ] + ], + "rule_severities": { + "bus_definition_conflict": "error", + "bus_label_syntax": "error", + "bus_to_bus_conflict": "error", + "bus_to_net_conflict": "error", + "different_unit_footprint": "error", + "different_unit_net": "error", + "duplicate_sheet_names": "error", + "global_label_dangling": "error", + "hier_label_mismatch": "error", + "label_dangling": "error", + "multiple_net_names": "error", + "net_not_bus_member": "error", + "no_connect_connected": "error", + "no_connect_dangling": "error", + "pin_not_connected": "error", + "pin_not_driven": "error", + "pin_to_pin": "warning", + "similar_labels": "error", + "unresolved_variable": "error" + } + }, + "libraries": { + "pinned_footprint_libs": [], + "pinned_symbol_libs": [] + }, + "meta": { + "filename": "dbg_connect_cable.kicad_pro", + "version": 1 + }, + "net_settings": { + "classes": [ + { + "bus_width": 6.0, + "clearance": 0.2, + "diff_pair_gap": 0.25, + "diff_pair_via_gap": 0.25, + "diff_pair_width": 0.2, + "line_style": 0, + "microvia_diameter": 0.3, + "microvia_drill": 0.1, + "name": "Default", + "track_width": 0.25, + "via_diameter": 0.8, + "via_drill": 0.4, + "wire_width": 6.0 + } + ], + "meta": { + "version": 0 + }, + "net_colors": null + }, + "pcbnew": { + "last_paths": { + "gencad": "", + "idf": "", + "netlist": "", + "specctra_dsn": "", + "step": "", + "vmrl": "" + }, + "page_layout_descr_file": "" + }, + "schematic": { + "drawing": { + "default_bus_thickness": 12.0, + "default_junction_size": 40.0, + "default_line_thickness": 6.0, + "default_text_size": 50.0, + "default_wire_thickness": 6.0, + "field_names": [], + "pin_symbol_size": 25.0, + "text_offset_ratio": 0.3 + }, + "legacy_lib_dir": "", + "legacy_lib_list": [], + "meta": { + "version": 0 + }, + "net_format_name": "", + "page_layout_descr_file": "", + "plot_directory": "", + "spice_adjust_passive_values": false, + "spice_external_command": "spice \"%I\"", + "subpart_first_id": 65, + "subpart_id_separator": 0 + }, + "sheets": [ + [ + "9a74d9a3-2539-4212-aa6c-7cc531762e01", + "" + ] + ], + "text_variables": {} +} |