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authorjaseg <git@jaseg.de>2022-05-08 16:36:25 +0200
committerjaseg <git@jaseg.de>2022-05-08 16:36:25 +0200
commit2e7724b9607223d84f2314c9d21cbd1111e017ec (patch)
tree9674cba7aafaf29d43385fc27253b9eaa1efd4cc /driver_fw
parentf21e9797a28b6f4eb84f6c3a74d3b64817abc42a (diff)
download8seg-2e7724b9607223d84f2314c9d21cbd1111e017ec.tar.gz
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WIP
Diffstat (limited to 'driver_fw')
-rw-r--r--driver_fw/main.c8
-rw-r--r--driver_fw/openocd.cfg4
2 files changed, 8 insertions, 4 deletions
diff --git a/driver_fw/main.c b/driver_fw/main.c
index 5123237..f02c177 100644
--- a/driver_fw/main.c
+++ b/driver_fw/main.c
@@ -96,6 +96,8 @@ static int flipbits10(int in) {
}
+uint8_t spinner = 0; /* FIXME DEBUG */
+
int main(void) {
/* Startup code */
RCC->CR |= RCC_CR_HSEON;
@@ -220,6 +222,7 @@ int main(void) {
while (42) {
if (sys_flag_1Hz) { /* Update display every second */
sys_flag_1Hz = 0;
+ spinner = ~spinner;
char buf[17];
int temp = mcp9801_read_mdegC();
@@ -252,8 +255,9 @@ int hamming_weight(int i) {
void TIM3_IRQHandler() {
static int txpos = -1;
static unsigned int tx_start_tick = 0;
- static uint8_t txbuf[2] = {0x04, 0x05};
+ static uint8_t txbuf[3] = {0x05, 0x01, 0};
static int backchannel_counter = 0;
+ txbuf[2] = spinner;
TIM3->SR &= ~TIM_SR_UIF;
int sym = txstate.current_symbol;
@@ -294,7 +298,7 @@ void TIM3_IRQHandler() {
txstate.current_symbol = sym;
/* FIXME factor out into header, or even make configurable */
-#define DEAD_TIME 100
+#define DEAD_TIME 1
/* Set both CCRs to values for opposing polarities. The dead time is always inserted at the beginning of the timer
* cycle due to the way the capture/compare unit PWM machinery works. By setting the CCR to 0xffff we make sure the
* output is never turned on, since 0xffff is larger than the ARR/counter top value.
diff --git a/driver_fw/openocd.cfg b/driver_fw/openocd.cfg
index 97a3a05..c1a4abc 100644
--- a/driver_fw/openocd.cfg
+++ b/driver_fw/openocd.cfg
@@ -1,8 +1,8 @@
telnet_port 4444
gdb_port 3333
-source [find interface/stlink-v2.cfg]
-#hla_serial "000000000001"
+source [find interface/stlink.cfg]
+hla_serial "54FF6B064987495026541187"
transport select hla_swd
source [find target/stm32f0x.cfg]