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| author | jaseg <git@jaseg.net> | 2019-03-04 23:16:42 +0900 |
|---|---|---|
| committer | jaseg <git@jaseg.net> | 2019-03-04 23:16:42 +0900 |
| commit | d48b92b93507f46ba2623284d8a0841e22e9a09b (patch) | |
| tree | 902491412a82f8e1d0ddf0fcdcf65bd33477414e /driver/driver.sch | |
| parent | ca0439cb8ea63e2e1fbd19873b1540b177e31df7 (diff) | |
| download | 8seg-d48b92b93507f46ba2623284d8a0841e22e9a09b.tar.gz 8seg-d48b92b93507f46ba2623284d8a0841e22e9a09b.tar.bz2 8seg-d48b92b93507f46ba2623284d8a0841e22e9a09b.zip | |
driver/fw: Beginnings of a firmware
This code starts up and blinks a led. This means RCC, GPIO and SPI1 are working.
Diffstat (limited to 'driver/driver.sch')
| -rw-r--r-- | driver/driver.sch | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/driver/driver.sch b/driver/driver.sch index 539a490..a4f3fbb 100644 --- a/driver/driver.sch +++ b/driver/driver.sch @@ -2744,4 +2744,7 @@ F 3 "~" H 17400 2950 50 0001 C CNN 1 17400 2950 1 0 0 -1 $EndComp +Text Notes 7600 10050 0 50 ~ 0 +TODO:\n* RS485 drv fp is wide, should be narrow SOIC-8\n* Heatsink holes are plated-through, shouln't be\n* Add thermal reliefs in upper logic ground plane\n* GND/VCC input labels are swapped +NoConn ~ 14600 2800 $EndSCHEMATC |