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author | jaseg <git@jaseg.net> | 2018-11-26 14:28:04 +0900 |
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committer | jaseg <git@jaseg.net> | 2018-11-26 14:28:04 +0900 |
commit | 7e1d100f1b3ab2ce76015f333d10279f6eee6d37 (patch) | |
tree | f9a1257f3abbffe344ddbd15fa729f65be1374e5 /board_outline.dxf | |
parent | 260b611fc37b484400d023867e7058cefc552c6f (diff) | |
download | 8seg-7e1d100f1b3ab2ce76015f333d10279f6eee6d37.tar.gz 8seg-7e1d100f1b3ab2ce76015f333d10279f6eee6d37.tar.bz2 8seg-7e1d100f1b3ab2ce76015f333d10279f6eee6d37.zip |
PCB designs R01 finished (not reviewed yet)
Diffstat (limited to 'board_outline.dxf')
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