Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2018-01-05 | Add some documentation | jaseg | 1 | -7/+7 |
2017-09-18 | hw v0.4 | jaseg | 1 | -973/+965 |
2017-09-06 | Fix up RS485/digital power label | jaseg | 1 | -9/+1890 |
2017-09-06 | Fix up version label and one ground trace | jaseg | 1 | -3126/+3193 |
2017-09-06 | Fixes for second prototype (v0.3) | jaseg | 1 | -2460/+640 |
2017-07-21 | Second production run, v0.3 | jaseg | 1 | -1431/+1501 |
2017-07-21 | Final silk art positioning | jaseg | 1 | -13/+13 |
2017-07-20 | Second board revision | jaseg | 1 | -10540/+10503 |
2017-07-15 | Schematic fixed up so far | jaseg | 1 | -1158/+1144 |
2017-06-10 | foo | jaseg | 1 | -243/+231 |
2017-05-17 | Release v0.2 | jaseg | 1 | -1261/+1630 |
2017-05-04 | Design mostly done | jaseg | 1 | -1520/+32516 |
2017-05-02 | Layout mostly done | jaseg | 1 | -812/+4992 |
2017-04-30 | Foo | jaseg | 1 | -1990/+2335 |
2017-04-29 | Pre safety fixup | jaseg | 1 | -1/+4699 |
2017-04-26 | Initial commit | jaseg | 1 | -0/+1 |