Structure type to access the Instrumentation Trace Macrocell Register (ITM).
|
| union { |
| __OM uint8_t u8 |
| | Offset: 0x000 ( /W) ITM Stimulus Port 8-bit.
|
| |
| __OM uint16_t u16 |
| | Offset: 0x000 ( /W) ITM Stimulus Port 16-bit.
|
| |
| __OM uint32_t u32 |
| | Offset: 0x000 ( /W) ITM Stimulus Port 32-bit.
|
| |
| } | PORT [32] |
| | Offset: 0x000 ( /W) ITM Stimulus Port Registers.
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| |
| uint32_t | RESERVED0 [864] |
| | Reserved.
|
| |
| __IOM uint32_t | TER |
| | Offset: 0xE00 (R/W) ITM Trace Enable Register.
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| |
| uint32_t | RESERVED1 [15] |
| | Reserved.
|
| |
| __IOM uint32_t | TPR |
| | Offset: 0xE40 (R/W) ITM Trace Privilege Register.
|
| |
| uint32_t | RESERVED2 [15] |
| | Reserved.
|
| |
| __IOM uint32_t | TCR |
| | Offset: 0xE80 (R/W) ITM Trace Control Register.
|
| |
| __OM { ... } ITM_Type::PORT[32] |
| uint32_t ITM_Type::RESERVED0[864] |
| uint32_t ITM_Type::RESERVED1[15] |
| uint32_t ITM_Type::RESERVED2[15] |
| __IOM uint32_t ITM_Type::TCR |
| __IOM uint32_t ITM_Type::TER |
| __IOM uint32_t ITM_Type::TPR |
| __OM uint16_t ITM_Type::u16 |
| __OM uint32_t ITM_Type::u32 |
| __OM uint8_t ITM_Type::u8 |
