From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/RTOS/html/dirstructfiles.html | 496 +++++++++++++++++++++++++++++++++++++ 1 file changed, 496 insertions(+) create mode 100644 docs/RTOS/html/dirstructfiles.html (limited to 'docs/RTOS/html/dirstructfiles.html') diff --git a/docs/RTOS/html/dirstructfiles.html b/docs/RTOS/html/dirstructfiles.html new file mode 100644 index 0000000..fd51c8c --- /dev/null +++ b/docs/RTOS/html/dirstructfiles.html @@ -0,0 +1,496 @@ + + + + + +Directory Structure and File Overview +CMSIS-RTOS: Directory Structure and File Overview + + + + + + + + + + + + + + +
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CMSIS-RTOS +  Version 1.03 +
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Real-Time Operating System: API and RTX Reference Implementation.
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+
Directory Structure and File Overview
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+

The following section provides an overview of the directory structure and the files that are relevant for the user's for CMSIS-RTOS RTX.

+

+CMSIS-RTOS RTX Directory Structure

+

The CMSIS-RTOS RTX is delivered in source code and several examples are provided.

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Directory Content
INC The include files for CMSIS-RTOS RTX. cmsis_os.h is the central include file for user applications.
LIB CMSIS-RTOS RTX library files for ARMCC, GCC, and IAR Compiler.
SRC Source code of CMSIS-RTOS RTX library along with project files for ARMCC, GCC, and IAR Compiler.
Templates CMSIS-RTOS RTX configuration file (RTX_Conf_CM.c).
UserCode Templates Template files for creating application projects with CMSIS-RTOS RTX.
+

+CMSIS-RTOS RTX Library Files

+

The CMSIS-RTOS RTX Library is available pre-compiled for ARMCC, GCC, and IAR C/C++ Compilers and supports all Cortex-M processor variants in every configuration.

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Library File Processor Configuration
LIB/ARM/RTX_CM0.lib CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M0 and M1, little-endian.
LIB/ARM/RTX_CM0_B.lib CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M0 and M1, big-endian.
LIB/ARM/RTX_CM3.lib CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M3, M4, and M7 without FPU, little-endian.
LIB/ARM/RTX_CM3_B.lib CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M3, M4, and M7 without FPU, big-endian.
LIB/ARM/RTX_CM4.lib CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M4 and M7 with FPU, little-endian.
LIB/ARM/RTX_CM4_B.lib CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M4 and M7 with FPU, big-endian.
LIB/GCC/libRTX_CM0.a CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M0 and M1, little-endian.
LIB/GCC/libRTX_CM0_B.a CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M0 and M1, big-endian.
LIB/GCC/libRTX_CM3.a CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M3, M4, and M7 without FPU, little-endian.
LIB/GCC/libRTX_CM3_B.a CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M3, M4, and M7 without FPU, big-endian.
LIB/GCC/libRTX_CM4.a CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M4 and M7 with FPU, little-endian.
LIB/GCC/libRTX_CM4_B.a CMSIS-RTOS RTX Library for GCC Compiler, Cortex-M4 and M7 with FPU, big-endian.
LIB/IAR/RTX_CM0.lib CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M0 and M1, little-endian.
LIB/IAR/RTX_CM0_B.lib CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M0 and M1, big-endian.
LIB/IAR/RTX_CM3.lib CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M3, M4, and M7 without FPU, little-endian.
LIB/IAR/RTX_CM3_B.lib CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M3, M4, and M7 without FPU, big-endian.
LIB/IAR/RTX_CM4.lib CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M4 and M7 with FPU, little-endian.
LIB/IAR/RTX_CM4_B.lib CMSIS-RTOS RTX Library for IAR Compiler, Cortex-M4 and M7 with FPU, big-endian.
+

+Configuration File RTX_Conf_CM.c

+
/*----------------------------------------------------------------------------
+
* CMSIS-RTOS - RTX
+
*----------------------------------------------------------------------------
+
* Name: RTX_Conf_CM.C
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* Purpose: Configuration of CMSIS RTX Kernel for Cortex-M
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* Rev.: V4.70.1
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*----------------------------------------------------------------------------
+
*
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* Copyright (c) 1999-2009 KEIL, 2009-2016 ARM Germany GmbH. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
+
* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
+
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
+
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+
* See the License for the specific language governing permissions and
+
* limitations under the License.
+
*---------------------------------------------------------------------------*/
+
+
#include "cmsis_os.h"
+
+
+
/*----------------------------------------------------------------------------
+
* RTX User configuration part BEGIN
+
*---------------------------------------------------------------------------*/
+
+
//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
+
//
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// <h>Thread Configuration
+
// =======================
+
//
+
// <o>Number of concurrent running user threads <1-250>
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// <i> Defines max. number of user threads that will run at the same time.
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// <i> Default: 6
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#ifndef OS_TASKCNT
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#define OS_TASKCNT 6
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#endif
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+
// <o>Default Thread stack size [bytes] <64-4096:8><#/4>
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// <i> Defines default stack size for threads with osThreadDef stacksz = 0
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// <i> Default: 200
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#ifndef OS_STKSIZE
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#define OS_STKSIZE 50 // this stack size value is in words
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#endif
+
+
// <o>Main Thread stack size [bytes] <64-32768:8><#/4>
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// <i> Defines stack size for main thread.
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// <i> Default: 200
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#ifndef OS_MAINSTKSIZE
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#define OS_MAINSTKSIZE 50 // this stack size value is in words
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#endif
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+
// <o>Number of threads with user-provided stack size <0-250>
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// <i> Defines the number of threads with user-provided stack size.
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// <i> Default: 0
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#ifndef OS_PRIVCNT
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#define OS_PRIVCNT 0
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#endif
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+
// <o>Total stack size [bytes] for threads with user-provided stack size <0-1048576:8><#/4>
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// <i> Defines the combined stack size for threads with user-provided stack size.
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// <i> Default: 0
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#ifndef OS_PRIVSTKSIZE
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#define OS_PRIVSTKSIZE 0 // this stack size value is in words
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#endif
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+
// <q>Stack overflow checking
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// <i> Enable stack overflow checks at thread switch.
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// <i> Enabling this option increases slightly the execution time of a thread switch.
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#ifndef OS_STKCHECK
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#define OS_STKCHECK 1
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#endif
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+
// <q>Stack usage watermark
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// <i> Initialize thread stack with watermark pattern for analyzing stack usage (current/maximum) in System and Thread Viewer.
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// <i> Enabling this option increases significantly the execution time of osThreadCreate.
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#ifndef OS_STKINIT
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#define OS_STKINIT 0
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#endif
+
+
// <o>Processor mode for thread execution
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// <0=> Unprivileged mode
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// <1=> Privileged mode
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// <i> Default: Privileged mode
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#ifndef OS_RUNPRIV
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#define OS_RUNPRIV 1
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#endif
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+
// </h>
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+
// <h>RTX Kernel Timer Tick Configuration
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// ======================================
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// <q> Use Cortex-M SysTick timer as RTX Kernel Timer
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// <i> Cortex-M processors provide in most cases a SysTick timer that can be used as
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// <i> as time-base for RTX.
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#ifndef OS_SYSTICK
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#define OS_SYSTICK 1
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#endif
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//
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// <o>RTOS Kernel Timer input clock frequency [Hz] <1-1000000000>
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// <i> Defines the input frequency of the RTOS Kernel Timer.
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// <i> When the Cortex-M SysTick timer is used, the input clock
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// <i> is on most systems identical with the core clock.
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#ifndef OS_CLOCK
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#define OS_CLOCK 12000000
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#endif
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// <o>RTX Timer tick interval value [us] <1-1000000>
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// <i> The RTX Timer tick interval value is used to calculate timeout values.
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// <i> When the Cortex-M SysTick timer is enabled, the value also configures the SysTick timer.
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// <i> Default: 1000 (1ms)
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#ifndef OS_TICK
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#define OS_TICK 1000
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#endif
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+
// </h>
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// <h>System Configuration
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// =======================
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//
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// <e>Round-Robin Thread switching
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// ===============================
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//
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// <i> Enables Round-Robin Thread switching.
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#ifndef OS_ROBIN
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#define OS_ROBIN 1
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#endif
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// <o>Round-Robin Timeout [ticks] <1-1000>
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// <i> Defines how long a thread will execute before a thread switch.
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// <i> Default: 5
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#ifndef OS_ROBINTOUT
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#define OS_ROBINTOUT 5
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#endif
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// </e>
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// <e>User Timers
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// ==============
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// <i> Enables user Timers
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#ifndef OS_TIMERS
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#define OS_TIMERS 1
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#endif
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+
// <o>Timer Thread Priority
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// <1=> Low
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// <2=> Below Normal <3=> Normal <4=> Above Normal
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// <5=> High
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// <6=> Realtime (highest)
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// <i> Defines priority for Timer Thread
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// <i> Default: High
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#ifndef OS_TIMERPRIO
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#define OS_TIMERPRIO 5
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#endif
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// <o>Timer Thread stack size [bytes] <64-4096:8><#/4>
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// <i> Defines stack size for Timer thread.
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// <i> Default: 200
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#ifndef OS_TIMERSTKSZ
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#define OS_TIMERSTKSZ 50 // this stack size value is in words
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#endif
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// <o>Timer Callback Queue size <1-32>
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// <i> Number of concurrent active timer callback functions.
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// <i> Default: 4
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#ifndef OS_TIMERCBQS
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#define OS_TIMERCBQS 4
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#endif
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+
// </e>
+
+
// <o>ISR FIFO Queue size<4=> 4 entries <8=> 8 entries
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// <12=> 12 entries <16=> 16 entries
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// <24=> 24 entries <32=> 32 entries
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// <48=> 48 entries <64=> 64 entries
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// <96=> 96 entries
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// <i> ISR functions store requests to this buffer,
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// <i> when they are called from the interrupt handler.
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// <i> Default: 16 entries
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#ifndef OS_FIFOSZ
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#define OS_FIFOSZ 16
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#endif
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+
// </h>
+
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//------------- <<< end of configuration section >>> -----------------------
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+
// Standard library system mutexes
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// ===============================
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// Define max. number system mutexes that are used to protect
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// the arm standard runtime library. For microlib they are not used.
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#ifndef OS_MUTEXCNT
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#define OS_MUTEXCNT 8
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#endif
+
+
/*----------------------------------------------------------------------------
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* RTX User configuration part END
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*---------------------------------------------------------------------------*/
+
+
#define OS_TRV ((uint32_t)(((double)OS_CLOCK*(double)OS_TICK)/1E6)-1)
+
+
+
/*----------------------------------------------------------------------------
+
* Global Functions
+
*---------------------------------------------------------------------------*/
+
+
/*--------------------------- os_idle_demon ---------------------------------*/
+
+
/// \brief The idle demon is running when no other thread is ready to run
+
void os_idle_demon (void) {
+
+
for (;;) {
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/* HERE: include optional user code to be executed when no thread runs.*/
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}
+
}
+
+
#if (OS_SYSTICK == 0) // Functions for alternative timer as RTX kernel timer
+
+
/*--------------------------- os_tick_init ----------------------------------*/
+
+
/// \brief Initializes an alternative hardware timer as RTX kernel timer
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/// \return IRQ number of the alternative hardware timer
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int os_tick_init (void) {
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return (-1); /* Return IRQ number of timer (0..239) */
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}
+
+
/*--------------------------- os_tick_val -----------------------------------*/
+
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/// \brief Get alternative hardware timer's current value (0 .. OS_TRV)
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/// \return Current value of the alternative hardware timer
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uint32_t os_tick_val (void) {
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return (0);
+
}
+
+
/*--------------------------- os_tick_ovf -----------------------------------*/
+
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/// \brief Get alternative hardware timer's overflow flag
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/// \return Overflow flag\n
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/// - 1 : overflow
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/// - 0 : no overflow
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uint32_t os_tick_ovf (void) {
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return (0);
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}
+
+
/*--------------------------- os_tick_irqack --------------------------------*/
+
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/// \brief Acknowledge alternative hardware timer interrupt
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void os_tick_irqack (void) {
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/* ... */
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}
+
+
#endif // (OS_SYSTICK == 0)
+
+
/*--------------------------- os_error --------------------------------------*/
+
+
/* OS Error Codes */
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#define OS_ERROR_STACK_OVF 1
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#define OS_ERROR_FIFO_OVF 2
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#define OS_ERROR_MBX_OVF 3
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#define OS_ERROR_TIMER_OVF 4
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+
extern osThreadId svcThreadGetId (void);
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+
/// \brief Called when a runtime error is detected
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/// \param[in] error_code actual error code that has been detected
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void os_error (uint32_t error_code) {
+
+
/* HERE: include optional code to be executed on runtime error. */
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switch (error_code) {
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case OS_ERROR_STACK_OVF:
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/* Stack overflow detected for the currently running task. */
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/* Thread can be identified by calling svcThreadGetId(). */
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break;
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case OS_ERROR_FIFO_OVF:
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/* ISR FIFO Queue buffer overflow detected. */
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break;
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case OS_ERROR_MBX_OVF:
+
/* Mailbox overflow detected. */
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break;
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case OS_ERROR_TIMER_OVF:
+
/* User Timer Callback Queue overflow detected. */
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break;
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default:
+
break;
+
}
+
for (;;);
+
}
+
+
+
/*----------------------------------------------------------------------------
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* RTX Configuration Functions
+
*---------------------------------------------------------------------------*/
+
+
#include "RTX_CM_lib.h"
+
+
/*----------------------------------------------------------------------------
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* end of file
+
*---------------------------------------------------------------------------*/
+
+
+ + + + -- cgit