From 96d6da4e252b06dcfdc041e7df23e86161c33007 Mon Sep 17 00:00:00 2001 From: rihab kouki Date: Tue, 28 Jul 2020 11:24:49 +0100 Subject: Official ARM version: v5.6.0 --- docs/NN/html/index.doxyidx | 225 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 225 insertions(+) create mode 100644 docs/NN/html/index.doxyidx (limited to 'docs/NN/html/index.doxyidx') diff --git a/docs/NN/html/index.doxyidx b/docs/NN/html/index.doxyidx new file mode 100644 index 0000000..8efcb05 --- /dev/null +++ b/docs/NN/html/index.doxyidx @@ -0,0 +1,225 @@ +/* + * Copyright (c) 2009-2016 ARM Limited. All rights reserved. + * + * @file index.doxyidx + * @brief Index file for MDK-ARM Help System + * @version 1.0 + * @date 10. July 2019 + * @note Generated by DoxyIndex V1.2.3 on Wednesday, 10.07.2019 15:22:29 + * from Path 'C:\tools\PACK\ARM\CMSIS\5.6.0\\CMSIS\Documentation\NN\html', + */ + +'ABCDFGHILNPQRSUabcghimnoprstuvw' +arm_avepool_q7_HWC, group__Pooling.html#gae4a7b07f97ec4313524c9fb9fbcb1f6a, arm_avepool_q7_HWC(q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const uint16_t dim_im_out, q7_t *bufferA, q7_t *Im_out): arm_pool_q7_HWC.c +arm_convolve_1x1_HWC_q7_fast_nonsquare, group__NNConv.html#ga110adcfdaab356c750c6270aa5e05f29, arm_convolve_1x1_HWC_q7_fast_nonsquare(const q7_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB): arm_convolve_1x1_HWC_q7_fast_nonsquare.c +arm_convolve_1x1_HWC_q7_fast_nonsquare.c, arm__convolve__1x1__HWC__q7__fast__nonsquare_8c.html, +arm_convolve_HWC_q15_basic, group__NNConv.html#ga55701f213b198084b52eab53097f1f58, arm_convolve_HWC_q15_basic(const q15_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q15_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q15_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q15_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB): arm_convolve_HWC_q15_basic.c +arm_convolve_HWC_q15_basic.c, arm__convolve__HWC__q15__basic_8c.html, +arm_convolve_HWC_q15_fast, group__NNConv.html#ga4efb1ccbbaa7dd936961989dcb443f50, arm_convolve_HWC_q15_fast(const q15_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q15_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q15_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q15_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB): arm_convolve_HWC_q15_fast.c +arm_convolve_HWC_q15_fast.c, arm__convolve__HWC__q15__fast_8c.html, +arm_convolve_HWC_q15_fast_nonsquare, group__NNConv.html#ga614ec3b71eb96e29952ec3f09e7b9c3c, arm_convolve_HWC_q15_fast_nonsquare(const q15_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q15_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q15_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q15_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB): arm_convolve_HWC_q15_fast_nonsquare.c +arm_convolve_HWC_q15_fast_nonsquare.c, arm__convolve__HWC__q15__fast__nonsquare_8c.html, +arm_convolve_HWC_q7_basic, group__NNConv.html#ga210ae8d8fc1d12ee15b41f1fa6947681, arm_convolve_HWC_q7_basic(const q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB): arm_convolve_HWC_q7_basic.c +arm_convolve_HWC_q7_basic.c, arm__convolve__HWC__q7__basic_8c.html, +arm_convolve_HWC_q7_basic_nonsquare, group__NNConv.html#ga4501fa22c0836002aa47ccc313dce252, arm_convolve_HWC_q7_basic_nonsquare(const q7_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB): arm_convolve_HWC_q7_basic_nonsquare.c +arm_convolve_HWC_q7_basic_nonsquare.c, arm__convolve__HWC__q7__basic__nonsquare_8c.html, +arm_convolve_HWC_q7_fast, group__NNConv.html#gae00d3c1285907d59657369fc98bcc83f, arm_convolve_HWC_q7_fast(const q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB): arm_convolve_HWC_q7_fast.c +arm_convolve_HWC_q7_fast.c, arm__convolve__HWC__q7__fast_8c.html, +arm_convolve_HWC_q7_fast_nonsquare, group__NNConv.html#gabc6d6b991024e9e5c5cdbd7489de88ef, arm_convolve_HWC_q7_fast_nonsquare(const q7_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB): arm_convolve_HWC_q7_fast_nonsquare.c +arm_convolve_HWC_q7_fast_nonsquare.c, arm__convolve__HWC__q7__fast__nonsquare_8c.html, +arm_convolve_HWC_q7_RGB, group__NNConv.html#ga98f2ead67d7cbdf558b0cd8a3b8fc148, arm_convolve_HWC_q7_RGB(const q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB): arm_convolve_HWC_q7_RGB.c +arm_convolve_HWC_q7_RGB.c, arm__convolve__HWC__q7__RGB_8c.html, +arm_depthwise_conv_u8_basic_ver1, group__NNConv.html#ga02a296cb4f6361a70c3ecf1ef1238292, arm_depthwise_conv_u8_basic_ver1(const uint8_t *input, const uint16_t input_x, const uint16_t input_y, const uint16_t input_ch, const uint8_t *kernel, const uint16_t kernel_x, const uint16_t kernel_y, const int16_t ch_mult, const int16_t pad_x, const int16_t pad_y, const int16_t stride_x, const int16_t stride_y, const int16_t dilation_x, const int16_t dilation_y, const int32_t *bias, const int32_t input_offset, const int32_t filter_offset, const int32_t output_offset, uint8_t *output, const uint16_t output_x, const uint16_t output_y, const int32_t output_activation_min, const int32_t output_activation_max, const int32_t out_shift, const int32_t out_mult): arm_depthwise_conv_u8_basic_ver1.c +arm_depthwise_conv_u8_basic_ver1.c, arm__depthwise__conv__u8__basic__ver1_8c.html, +arm_depthwise_separable_conv_HWC_q7, group__NNConv.html#gad3d21b3bc6dbd6f3b97d01104349cb0a, arm_depthwise_separable_conv_HWC_q7(const q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out, q15_t *bufferA, q7_t *bufferB): arm_depthwise_separable_conv_HWC_q7.c +arm_depthwise_separable_conv_HWC_q7.c, arm__depthwise__separable__conv__HWC__q7_8c.html, +arm_depthwise_separable_conv_HWC_q7_nonsquare, group__NNConv.html#ga32ac508c5467813a84f74f96655dc697, arm_depthwise_separable_conv_HWC_q7_nonsquare(const q7_t *Im_in, const uint16_t dim_im_in_x, const uint16_t dim_im_in_y, const uint16_t ch_im_in, const q7_t *wt, const uint16_t ch_im_out, const uint16_t dim_kernel_x, const uint16_t dim_kernel_y, const uint16_t padding_x, const uint16_t padding_y, const uint16_t stride_x, const uint16_t stride_y, const q7_t *bias, const uint16_t bias_shift, const uint16_t out_shift, q7_t *Im_out, const uint16_t dim_im_out_x, const uint16_t dim_im_out_y, q15_t *bufferA, q7_t *bufferB): arm_depthwise_separable_conv_HWC_q7_nonsquare.c +arm_depthwise_separable_conv_HWC_q7_nonsquare.c, arm__depthwise__separable__conv__HWC__q7__nonsquare_8c.html, +arm_fully_connected_mat_q7_vec_q15, group__FC.html#ga4a1521e7532a1e62d71f3b12762016e2, arm_fully_connected_mat_q7_vec_q15(const q15_t *pV, const q7_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q15_t *pOut, q15_t *vec_buffer): arm_fully_connected_mat_q7_vec_q15.c +arm_fully_connected_mat_q7_vec_q15.c, arm__fully__connected__mat__q7__vec__q15_8c.html, +arm_fully_connected_mat_q7_vec_q15_opt, group__FC.html#gae3857bb6375692e81dde8cbd70adec08, arm_fully_connected_mat_q7_vec_q15_opt(const q15_t *pV, const q7_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q15_t *pOut, q15_t *vec_buffer): arm_fully_connected_mat_q7_vec_q15_opt.c +arm_fully_connected_mat_q7_vec_q15_opt.c, arm__fully__connected__mat__q7__vec__q15__opt_8c.html, +arm_fully_connected_q15, group__FC.html#gaac666c212b209e636c2369dd5c75d0dc, arm_fully_connected_q15(const q15_t *pV, const q15_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q15_t *bias, q15_t *pOut, q15_t *vec_buffer): arm_fully_connected_q15.c +arm_fully_connected_q15.c, arm__fully__connected__q15_8c.html, +arm_fully_connected_q15_opt, group__FC.html#ga062912078da113f5dd2004fd919a0ff2, arm_fully_connected_q15_opt(const q15_t *pV, const q15_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q15_t *bias, q15_t *pOut, q15_t *vec_buffer): arm_fully_connected_q15_opt.c +arm_fully_connected_q15_opt.c, arm__fully__connected__q15__opt_8c.html, +arm_fully_connected_q7, group__FC.html#ga8b7e0c2e989e8c75f0dc789f3115323d, arm_fully_connected_q7(const q7_t *pV, const q7_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q7_t *pOut, q15_t *vec_buffer): arm_fully_connected_q7.c +arm_fully_connected_q7.c, arm__fully__connected__q7_8c.html, +arm_fully_connected_q7_opt, group__FC.html#gaf82b71ef472a38f8fc9ac414d9d07e67, arm_fully_connected_q7_opt(const q7_t *pV, const q7_t *pM, const uint16_t dim_vec, const uint16_t num_of_rows, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q7_t *pOut, q15_t *vec_buffer): arm_fully_connected_q7_opt.c +arm_fully_connected_q7_opt.c, arm__fully__connected__q7__opt_8c.html, +arm_maxpool_q7_HWC, group__Pooling.html#ga99afcdcc61eaf429ab3ee823702e44ce, arm_maxpool_q7_HWC(q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const uint16_t dim_im_out, q7_t *bufferA, q7_t *Im_out): arm_pool_q7_HWC.c +arm_nn_activation_type, arm__nnsupportfunctions_8h.html#a7f41aa78cd9a0552fae9b348ee4831a0, arm_nnsupportfunctions.h +arm_nn_activations_direct_q15, group__Acti.html#ga8932b57c8d0ee757511af2d40dcc11e7, arm_nn_activations_direct_q15(q15_t *data, uint16_t size, uint16_t int_width, arm_nn_activation_type type): arm_nn_activations_q15.c +arm_nn_activations_direct_q7, group__Acti.html#ga79f11131ae6767d60e03b1f6506b1af8, arm_nn_activations_direct_q7(q7_t *data, uint16_t size, uint16_t int_width, arm_nn_activation_type type): arm_nn_activations_q7.c +arm_nn_activations_q15.c, arm__nn__activations__q15_8c.html, +arm_nn_activations_q7.c, arm__nn__activations__q7_8c.html, +arm_nn_divide_by_power_of_two, arm__nnsupportfunctions_8h.html#ab6dbc2fd53fae3ccdd1d0d70c8d3b491, arm_nnsupportfunctions.h +arm_nn_mat_mult_kernel_q7_q15, arm__nn__mat__mult__kernel__q7__q15_8c.html#abc4fb258cfe8500ee68e812a293a80a3, arm_nn_mat_mult_kernel_q7_q15(const q7_t *pA, const q15_t *pInBuffer, const uint16_t ch_im_out, const uint16_t numCol_A, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q7_t *pOut): arm_nn_mat_mult_kernel_q7_q15.c +arm_nn_mat_mult_kernel_q7_q15.c, arm__nn__mat__mult__kernel__q7__q15_8c.html, +arm_nn_mat_mult_kernel_q7_q15_reordered, arm__nn__mat__mult__kernel__q7__q15__reordered_8c.html#aefe9c7ce9a65060a244b06dffe74c4b3, arm_nn_mat_mult_kernel_q7_q15_reordered(const q7_t *pA, const q15_t *pInBuffer, const uint16_t ch_im_out, const uint16_t numCol_A, const uint16_t bias_shift, const uint16_t out_shift, const q7_t *bias, q7_t *pOut): arm_nn_mat_mult_kernel_q7_q15_reordered.c +arm_nn_mat_mult_kernel_q7_q15_reordered.c, arm__nn__mat__mult__kernel__q7__q15__reordered_8c.html, +arm_nn_mult_q15, group__NNBasicMath.html#ga08f8340aa6533271b3aa6d211614fe22, arm_nn_mult_q15(q15_t *pSrcA, q15_t *pSrcB, q15_t *pDst, const uint16_t out_shift, uint32_t blockSize): arm_nn_mult_q15.c +arm_nn_mult_q15.c, arm__nn__mult__q15_8c.html, +arm_nn_mult_q7, group__NNBasicMath.html#gad46c9ab012cceda8ce6681c687a58c70, arm_nn_mult_q7(q7_t *pSrcA, q7_t *pSrcB, q7_t *pDst, const uint16_t out_shift, uint32_t blockSize): arm_nn_mult_q7.c +arm_nn_mult_q7.c, arm__nn__mult__q7_8c.html, +arm_nn_sat_doubling_high_mult, arm__nnsupportfunctions_8h.html#a51721c10f116c9f5b8d9908367989d44, arm_nnsupportfunctions.h +arm_nn_tables.h, arm__nn__tables_8h.html, +arm_nnexamples_cifar10.cpp, arm__nnexamples__cifar10_8cpp.html, +arm_nnexamples_cifar10_inputs.h, arm__nnexamples__cifar10__inputs_8h.html, +arm_nnexamples_cifar10_parameter.h, arm__nnexamples__cifar10__parameter_8h.html, +arm_nnexamples_cifar10_weights.h, arm__nnexamples__cifar10__weights_8h.html, +arm_nnexamples_gru.cpp, arm__nnexamples__gru_8cpp.html, +arm_nnexamples_gru_test_data.h, arm__nnexamples__gru__test__data_8h.html, +arm_nnfunctions.h, arm__nnfunctions_8h.html, +arm_nnsupportfunctions.h, arm__nnsupportfunctions_8h.html, +arm_nntables.c, arm__nntables_8c.html, +arm_nnword, unionarm__nnword.html, +arm_pool_q7_HWC.c, arm__pool__q7__HWC_8c.html, +arm_q7_to_q15_no_shift, group__nndata__convert.html#gae349de4dba8d253c89d45794ccf05680, arm_q7_to_q15_no_shift(const q7_t *pSrc, q15_t *pDst, uint32_t blockSize): arm_q7_to_q15_no_shift.c +arm_q7_to_q15_no_shift.c, arm__q7__to__q15__no__shift_8c.html, +arm_q7_to_q15_reordered_no_shift, group__nndata__convert.html#gaba8fd446d5f54760b406ee63b25d1aee, arm_q7_to_q15_reordered_no_shift(const q7_t *pSrc, q15_t *pDst, uint32_t blockSize): arm_q7_to_q15_reordered_no_shift.c +arm_q7_to_q15_reordered_no_shift.c, arm__q7__to__q15__reordered__no__shift_8c.html, +arm_relu_q15, group__Acti.html#ga53bcc00e54b802919bb3c89c143ee5ba, arm_relu_q15(q15_t *data, uint16_t size): arm_relu_q15.c +arm_relu_q15.c, arm__relu__q15_8c.html, +arm_relu_q7, group__Acti.html#ga638e803b4fe00426f401783a6255ca30, arm_relu_q7(q7_t *data, uint16_t size): arm_relu_q7.c +arm_relu_q7.c, arm__relu__q7_8c.html, +ARM_SIGMOID, arm__nnsupportfunctions_8h.html#a7f41aa78cd9a0552fae9b348ee4831a0a49b307e029715fbaa6f3101c806b8c54, arm_nnsupportfunctions.h +arm_softmax_q15, group__Softmax.html#ga1cacd8b84b8363079311987d0016ebe5, arm_softmax_q15(const q15_t *vec_in, const uint16_t dim_vec, q15_t *p_out): arm_softmax_q15.c +arm_softmax_q15.c, arm__softmax__q15_8c.html, +arm_softmax_q7, group__Softmax.html#ga89aff212a97a3cf32d9d7ddf11a8f43e, arm_softmax_q7(const q7_t *vec_in, const uint16_t dim_vec, q7_t *p_out): arm_softmax_q7.c +arm_softmax_q7.c, arm__softmax__q7_8c.html, +ARM_TANH, arm__nnsupportfunctions_8h.html#a7f41aa78cd9a0552fae9b348ee4831a0ac24e4db95c986f16c10dca71a4b4e1c5, arm_nnsupportfunctions.h +bytes, unionarm__nnword.html#ac7cff6480a8e29d95f29b73cb1267249, arm_nnword +Basic Math Functions for Neural Network Computation, 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