From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/NN/html/group__nndata__convert.html | 242 +++++++++++++++++++++++++++++++ 1 file changed, 242 insertions(+) create mode 100644 docs/NN/html/group__nndata__convert.html (limited to 'docs/NN/html/group__nndata__convert.html') diff --git a/docs/NN/html/group__nndata__convert.html b/docs/NN/html/group__nndata__convert.html new file mode 100644 index 0000000..b845dc1 --- /dev/null +++ b/docs/NN/html/group__nndata__convert.html @@ -0,0 +1,242 @@ + + + + + +Neural Network Data Conversion Functions +CMSIS-NN: Neural Network Data Conversion Functions + + + + + + + + + + + + + + +
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CMSIS-NN +  Version 1.1.0 +
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CMSIS NN Software Library
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+Functions
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Neural Network Data Conversion Functions
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+Functions

void arm_q7_to_q15_no_shift (const q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
 Converts the elements of the Q7 vector to Q15 vector without left-shift. More...
 
void arm_q7_to_q15_reordered_no_shift (const q7_t *pSrc, q15_t *pDst, uint32_t blockSize)
 Converts the elements of the Q7 vector to reordered Q15 vector without left-shift. More...
 
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Description

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Perform data type conversion in-between neural network operations

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Function Documentation

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void arm_q7_to_q15_no_shift (const q7_t * pSrc,
q15_t * pDst,
uint32_t blockSize 
)
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Parameters
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[in]*pSrcpoints to the Q7 input vector
[out]*pDstpoints to the Q15 output vector
[in]blockSizelength of the input vector
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Returns
none.
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Description:
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The equation used for the conversion process is:

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+        pDst[n] = (q15_t) pSrc[n];   0 <= n < blockSize.    
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Referenced by arm_avepool_q7_HWC(), arm_convolve_HWC_q7_basic(), and arm_convolve_HWC_q7_basic_nonsquare().

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void arm_q7_to_q15_reordered_no_shift (const q7_t * pSrc,
q15_t * pDst,
uint32_t blockSize 
)
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Parameters
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[in]*pSrcpoints to the Q7 input vector
[out]*pDstpoints to the Q15 output vector
[in]blockSizelength of the input vector
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Returns
none.
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This function does the q7 to q15 expansion with re-ordering

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+                         |   A1   |   A2   |   A3   |   A4   |
                          0      7 8     15 16    23 24    31
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is converted into:

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+ |       A1       |       A3       |   and  |       A2       |       A4       |
  0             15 16            31          0             15 16            31
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This looks strange but is natural considering how sign-extension is done at assembly level.

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The expansion of other other oprand will follow the same rule so that the end results are the same.

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The tail (i.e., last (N % 4) elements) will still be in original order.

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Referenced by arm_convolve_1x1_HWC_q7_fast_nonsquare(), arm_convolve_HWC_q7_fast(), arm_convolve_HWC_q7_fast_nonsquare(), arm_fully_connected_q7(), and arm_fully_connected_q7_opt().

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+ + + + -- cgit