From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/NN/html/group__Pooling.html | 321 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 321 insertions(+) create mode 100644 docs/NN/html/group__Pooling.html (limited to 'docs/NN/html/group__Pooling.html') diff --git a/docs/NN/html/group__Pooling.html b/docs/NN/html/group__Pooling.html new file mode 100644 index 0000000..89700d3 --- /dev/null +++ b/docs/NN/html/group__Pooling.html @@ -0,0 +1,321 @@ + + + + + +Neural Network Pooling Functions +CMSIS-NN: Neural Network Pooling Functions + + + + + + + + + + + + + + +
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CMSIS-NN +  Version 1.1.0 +
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CMSIS NN Software Library
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Neural Network Pooling Functions
Neural Network Functions
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+Functions

void arm_maxpool_q7_HWC (q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const uint16_t dim_im_out, q7_t *bufferA, q7_t *Im_out)
 Q7 max pooling function. More...
 
void arm_avepool_q7_HWC (q7_t *Im_in, const uint16_t dim_im_in, const uint16_t ch_im_in, const uint16_t dim_kernel, const uint16_t padding, const uint16_t stride, const uint16_t dim_im_out, q7_t *bufferA, q7_t *Im_out)
 Q7 average pooling function. More...
 
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Description

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Perform pooling functions, including max pooling and average pooling

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Function Documentation

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void arm_avepool_q7_HWC (q7_t * Im_in,
const uint16_t dim_im_in,
const uint16_t ch_im_in,
const uint16_t dim_kernel,
const uint16_t padding,
const uint16_t stride,
const uint16_t dim_im_out,
q7_t * bufferA,
q7_t * Im_out 
)
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Parameters
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[in,out]Im_inpointer to input tensor
[in]dim_im_ininput tensor dimention
[in]ch_im_innumber of input tensor channels
[in]dim_kernelfilter kernel size
[in]paddingpadding sizes
[in]strideconvolution stride
[in]dim_im_outoutput tensor dimension
[in,out]bufferApointer to buffer space for input
[in,out]Im_outpointer to output tensor
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Returns
none.
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Buffer size:

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bufferA size: 2*dim_im_out*ch_im_in

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The pooling function is implemented as split x-pooling then y-pooling.

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This pooling function is input-destructive. Input data is undefined after calling this function.

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References arm_q7_to_q15_no_shift().

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void arm_maxpool_q7_HWC (q7_t * Im_in,
const uint16_t dim_im_in,
const uint16_t ch_im_in,
const uint16_t dim_kernel,
const uint16_t padding,
const uint16_t stride,
const uint16_t dim_im_out,
q7_t * bufferA,
q7_t * Im_out 
)
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Parameters
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[in,out]Im_inpointer to input tensor
[in]dim_im_ininput tensor dimention
[in]ch_im_innumber of input tensor channels
[in]dim_kernelfilter kernel size
[in]paddingpadding sizes
[in]strideconvolution stride
[in]dim_im_outoutput tensor dimension
[in,out]bufferApointer to buffer space for input
[in,out]Im_outpointer to output tensor
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Returns
none.
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Buffer size:

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bufferA size: 0

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The pooling function is implemented as split x-pooling then y-pooling.

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This pooling function is input-destructive. Input data is undefined after calling this function.

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Referenced by main().

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+ + + + -- cgit