From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/Driver/html/CAN_Bit_Timing.png | Bin 0 -> 11350 bytes docs/Driver/html/CAN_Node.png | Bin 0 -> 14612 bytes docs/Driver/html/CMSIS_Logo_Final.png | Bin 0 -> 12402 bytes docs/Driver/html/Driver.png | Bin 0 -> 158281 bytes docs/Driver/html/Driver__CAN_8c.html | 186 ++ docs/Driver/html/Driver__CAN_8h.html | 613 ++++++ docs/Driver/html/Driver__Common_8c.html | 129 ++ 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docs/Driver/html/tab_b.png create mode 100644 docs/Driver/html/tab_h.png create mode 100644 docs/Driver/html/tab_s.png create mode 100644 docs/Driver/html/tab_topnav.png create mode 100644 docs/Driver/html/tabs.css create mode 100644 docs/Driver/html/theoryOperation.html (limited to 'docs/Driver') diff --git a/docs/Driver/html/CAN_Bit_Timing.png b/docs/Driver/html/CAN_Bit_Timing.png new file mode 100644 index 0000000..25eaddb Binary files /dev/null and b/docs/Driver/html/CAN_Bit_Timing.png differ diff --git a/docs/Driver/html/CAN_Node.png b/docs/Driver/html/CAN_Node.png new file mode 100644 index 0000000..b16699c Binary files /dev/null and b/docs/Driver/html/CAN_Node.png differ diff --git a/docs/Driver/html/CMSIS_Logo_Final.png b/docs/Driver/html/CMSIS_Logo_Final.png new file mode 100644 index 0000000..2056b7e Binary files /dev/null and b/docs/Driver/html/CMSIS_Logo_Final.png differ diff --git a/docs/Driver/html/Driver.png b/docs/Driver/html/Driver.png new file mode 100644 index 0000000..bccd403 Binary files /dev/null and b/docs/Driver/html/Driver.png differ diff --git a/docs/Driver/html/Driver__CAN_8c.html b/docs/Driver/html/Driver__CAN_8c.html new file mode 100644 index 0000000..d8b680b --- /dev/null +++ b/docs/Driver/html/Driver__CAN_8c.html @@ -0,0 +1,186 @@ + + + + + +Driver_CAN.c File Reference +CMSIS-Driver: Driver_CAN.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_CAN.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_CAN_GetVersion (void)
 Get driver version. More...
 
ARM_CAN_CAPABILITIES ARM_CAN_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_CAN_Initialize (ARM_CAN_SignalUnitEvent_t cb_unit_event, ARM_CAN_SignalObjectEvent_t cb_object_event)
 Initialize CAN interface and register signal (callback) functions. More...
 
int32_t ARM_CAN_Uninitialize (void)
 De-initialize CAN interface. More...
 
int32_t ARM_CAN_PowerControl (ARM_POWER_STATE state)
 Control CAN interface power. More...
 
uint32_t ARM_CAN_GetClock (void)
 Retrieve CAN base clock frequency. More...
 
int32_t ARM_CAN_SetBitrate (ARM_CAN_BITRATE_SELECT select, uint32_t bitrate, uint32_t bit_segments)
 Set bitrate for CAN interface. More...
 
int32_t ARM_CAN_SetMode (ARM_CAN_MODE mode)
 Set operating mode for CAN interface. More...
 
ARM_CAN_OBJ_CAPABILITIES ARM_CAN_ObjectGetCapabilities (uint32_t obj_idx)
 Retrieve capabilities of an object. More...
 
int32_t ARM_CAN_ObjectSetFilter (uint32_t obj_idx, ARM_CAN_FILTER_OPERATION operation, uint32_t id, uint32_t arg)
 Add or remove filter for message reception. More...
 
int32_t ARM_CAN_ObjectConfigure (uint32_t obj_idx, ARM_CAN_OBJ_CONFIG obj_cfg)
 Configure object. More...
 
int32_t ARM_CAN_MessageSend (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, const uint8_t *data, uint8_t size)
 Send message on CAN bus. More...
 
int32_t ARM_CAN_MessageRead (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, uint8_t *data, uint8_t size)
 Read message received on CAN bus. More...
 
int32_t ARM_CAN_Control (uint32_t control, uint32_t arg)
 Control CAN interface. More...
 
ARM_CAN_STATUS ARM_CAN_GetStatus (void)
 Get CAN status. More...
 
void ARM_CAN_SignalUnitEvent (uint32_t event)
 Signal CAN unit event. More...
 
void ARM_CAN_SignalObjectEvent (uint32_t obj_idx, uint32_t event)
 Signal CAN object event. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__CAN_8h.html b/docs/Driver/html/Driver__CAN_8h.html new file mode 100644 index 0000000..c0fea12 --- /dev/null +++ b/docs/Driver/html/Driver__CAN_8h.html @@ -0,0 +1,613 @@ + + + + + +Driver_CAN.h File Reference +CMSIS-Driver: Driver_CAN.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs | +Enumerations
+
+
Driver_CAN.h File Reference
+
+
+ + + + + + + + + + + + + + + + + +

+Data Structures

struct  ARM_CAN_OBJ_CAPABILITIES
 CAN Object Capabilities. More...
 
struct  ARM_CAN_MSG_INFO
 CAN Message Information. More...
 
struct  ARM_CAN_STATUS
 CAN Status. More...
 
struct  ARM_CAN_CAPABILITIES
 CAN Device Driver Capabilities. More...
 
struct  ARM_DRIVER_CAN
 Access structure of the CAN Driver. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_CAN_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(1,2) /* API version */
 
#define ARM_CAN_BIT_PROP_SEG_Pos   0UL
 bits 7..0 More...
 
#define ARM_CAN_BIT_PROP_SEG_Msk   (0xFFUL << ARM_CAN_BIT_PROP_SEG_Pos)
 
#define ARM_CAN_BIT_PROP_SEG(x)   (((x) << ARM_CAN_BIT_PROP_SEG_Pos) & ARM_CAN_BIT_PROP_SEG_Msk)
 
#define ARM_CAN_BIT_PHASE_SEG1_Pos   8UL
 bits 15..8 More...
 
#define ARM_CAN_BIT_PHASE_SEG1_Msk   (0xFFUL << ARM_CAN_BIT_PHASE_SEG1_Pos)
 
#define ARM_CAN_BIT_PHASE_SEG1(x)   (((x) << ARM_CAN_BIT_PHASE_SEG1_Pos) & ARM_CAN_BIT_PHASE_SEG1_Msk)
 
#define ARM_CAN_BIT_PHASE_SEG2_Pos   16UL
 bits 23..16 More...
 
#define ARM_CAN_BIT_PHASE_SEG2_Msk   (0xFFUL << ARM_CAN_BIT_PHASE_SEG2_Pos)
 
#define ARM_CAN_BIT_PHASE_SEG2(x)   (((x) << ARM_CAN_BIT_PHASE_SEG2_Pos) & ARM_CAN_BIT_PHASE_SEG2_Msk)
 
#define ARM_CAN_BIT_SJW_Pos   24UL
 bits 28..24 More...
 
#define ARM_CAN_BIT_SJW_Msk   (0x1FUL << ARM_CAN_BIT_SJW_Pos)
 
#define ARM_CAN_BIT_SJW(x)   (((x) << ARM_CAN_BIT_SJW_Pos) & ARM_CAN_BIT_SJW_Msk)
 
#define ARM_CAN_CONTROL_Pos   0UL
 
#define ARM_CAN_CONTROL_Msk   (0xFFUL << ARM_CAN_CONTROL_Pos)
 
#define ARM_CAN_SET_FD_MODE   (1UL << ARM_CAN_CONTROL_Pos)
 Set FD operation mode; arg: 0 = disable, 1 = enable. More...
 
#define ARM_CAN_ABORT_MESSAGE_SEND   (2UL << ARM_CAN_CONTROL_Pos)
 Abort sending of CAN message; arg = object. More...
 
#define ARM_CAN_CONTROL_RETRANSMISSION   (3UL << ARM_CAN_CONTROL_Pos)
 Enable/disable automatic retransmission; arg: 0 = disable, 1 = enable (default state) More...
 
#define ARM_CAN_SET_TRANSCEIVER_DELAY   (4UL << ARM_CAN_CONTROL_Pos)
 Set transceiver delay; arg = delay in time quanta. More...
 
#define ARM_CAN_ID_IDE_Pos   31UL
 
#define ARM_CAN_ID_IDE_Msk   (1UL << ARM_CAN_ID_IDE_Pos)
 
#define ARM_CAN_STANDARD_ID(id)   (id & 0x000007FFUL)
 CAN identifier in standard format (11-bits) More...
 
#define ARM_CAN_EXTENDED_ID(id)   ((id & 0x1FFFFFFFUL) | ARM_CAN_ID_IDE_Msk)
 CAN identifier in extended format (29-bits) More...
 
#define ARM_CAN_INVALID_BITRATE_SELECT   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 Bitrate selection not supported. More...
 
#define ARM_CAN_INVALID_BITRATE   (ARM_DRIVER_ERROR_SPECIFIC - 2)
 Requested bitrate not supported. More...
 
#define ARM_CAN_INVALID_BIT_PROP_SEG   (ARM_DRIVER_ERROR_SPECIFIC - 3)
 Propagation segment value not supported. More...
 
#define ARM_CAN_INVALID_BIT_PHASE_SEG1   (ARM_DRIVER_ERROR_SPECIFIC - 4)
 Phase segment 1 value not supported. More...
 
#define ARM_CAN_INVALID_BIT_PHASE_SEG2   (ARM_DRIVER_ERROR_SPECIFIC - 5)
 Phase segment 2 value not supported. More...
 
#define ARM_CAN_INVALID_BIT_SJW   (ARM_DRIVER_ERROR_SPECIFIC - 6)
 SJW value not supported. More...
 
#define ARM_CAN_NO_MESSAGE_AVAILABLE   (ARM_DRIVER_ERROR_SPECIFIC - 7)
 Message is not available. More...
 
#define ARM_CAN_UNIT_STATE_INACTIVE   (0U)
 Unit state: Not active on bus (initialization) More...
 
#define ARM_CAN_UNIT_STATE_ACTIVE   (1U)
 Unit state: Active on bus (can generate active error frame) More...
 
#define ARM_CAN_UNIT_STATE_PASSIVE   (2U)
 Unit state: Error passive (can not generate active error frame) More...
 
#define ARM_CAN_UNIT_STATE_BUS_OFF   (3U)
 Unit state: Bus-off (can recover to active state) More...
 
#define ARM_CAN_LEC_NO_ERROR   (0U)
 Last error code: No error. More...
 
#define ARM_CAN_LEC_BIT_ERROR   (1U)
 Last error code: Bit error. More...
 
#define ARM_CAN_LEC_STUFF_ERROR   (2U)
 Last error code: Bit stuffing error. More...
 
#define ARM_CAN_LEC_CRC_ERROR   (3U)
 Last error code: CRC error. More...
 
#define ARM_CAN_LEC_FORM_ERROR   (4U)
 Last error code: Illegal fixed-form bit. More...
 
#define ARM_CAN_LEC_ACK_ERROR   (5U)
 Last error code: Acknowledgment error. More...
 
#define ARM_CAN_EVENT_UNIT_INACTIVE   (0U)
 Unit entered Inactive state. More...
 
#define ARM_CAN_EVENT_UNIT_ACTIVE   (1U)
 Unit entered Error Active state. More...
 
#define ARM_CAN_EVENT_UNIT_WARNING   (2U)
 Unit entered Error Warning state (one or both error counters >= 96) More...
 
#define ARM_CAN_EVENT_UNIT_PASSIVE   (3U)
 Unit entered Error Passive state. More...
 
#define ARM_CAN_EVENT_UNIT_BUS_OFF   (4U)
 Unit entered Bus-off state. More...
 
#define ARM_CAN_EVENT_SEND_COMPLETE   (1UL << 0)
 Send complete. More...
 
#define ARM_CAN_EVENT_RECEIVE   (1UL << 1)
 Message received. More...
 
#define ARM_CAN_EVENT_RECEIVE_OVERRUN   (1UL << 2)
 Received message overrun. More...
 
+ + + + + + + +

+Typedefs

typedef void(* ARM_CAN_SignalUnitEvent_t )(uint32_t event)
 Pointer to ARM_CAN_SignalUnitEvent : Signal CAN Unit Event. More...
 
typedef void(* ARM_CAN_SignalObjectEvent_t )(uint32_t obj_idx, uint32_t event)
 Pointer to ARM_CAN_SignalObjectEvent : Signal CAN Object Event. More...
 
+ + + + + + + + + + +

+Enumerations

enum  ARM_CAN_BITRATE_SELECT {
+  ARM_CAN_BITRATE_NOMINAL, +
+  ARM_CAN_BITRATE_FD_DATA +
+ }
 Set the bit rate. More...
 
enum  ARM_CAN_MODE {
+  ARM_CAN_MODE_INITIALIZATION, +
+  ARM_CAN_MODE_NORMAL, +
+  ARM_CAN_MODE_RESTRICTED, +
+  ARM_CAN_MODE_MONITOR, +
+  ARM_CAN_MODE_LOOPBACK_INTERNAL, +
+  ARM_CAN_MODE_LOOPBACK_EXTERNAL +
+ }
 
enum  ARM_CAN_FILTER_OPERATION {
+  ARM_CAN_FILTER_ID_EXACT_ADD, +
+  ARM_CAN_FILTER_ID_EXACT_REMOVE, +
+  ARM_CAN_FILTER_ID_RANGE_ADD, +
+  ARM_CAN_FILTER_ID_RANGE_REMOVE, +
+  ARM_CAN_FILTER_ID_MASKABLE_ADD, +
+  ARM_CAN_FILTER_ID_MASKABLE_REMOVE +
+ }
 
enum  ARM_CAN_OBJ_CONFIG {
+  ARM_CAN_OBJ_INACTIVE, +
+  ARM_CAN_OBJ_TX, +
+  ARM_CAN_OBJ_RX, +
+  ARM_CAN_OBJ_RX_RTR_TX_DATA, +
+  ARM_CAN_OBJ_TX_RTR_RX_DATA +
+ }
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_CAN_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(1,2) /* API version */
+
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_BIT_PROP_SEG_Pos   0UL
+
+ +

bits 7..0

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_BIT_PROP_SEG_Msk   (0xFFUL << ARM_CAN_BIT_PROP_SEG_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_BIT_PHASE_SEG1_Pos   8UL
+
+ +

bits 15..8

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_BIT_PHASE_SEG1_Msk   (0xFFUL << ARM_CAN_BIT_PHASE_SEG1_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_BIT_PHASE_SEG2_Pos   16UL
+
+ +

bits 23..16

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_BIT_PHASE_SEG2_Msk   (0xFFUL << ARM_CAN_BIT_PHASE_SEG2_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_BIT_SJW_Pos   24UL
+
+ +

bits 28..24

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_BIT_SJW_Msk   (0x1FUL << ARM_CAN_BIT_SJW_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_CONTROL_Pos   0UL
+
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_CONTROL_Msk   (0xFFUL << ARM_CAN_CONTROL_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_ID_IDE_Pos   31UL
+
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_ID_IDE_Msk   (1UL << ARM_CAN_ID_IDE_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_INVALID_BITRATE_SELECT   (ARM_DRIVER_ERROR_SPECIFIC - 1)
+
+ +

Bitrate selection not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_INVALID_BITRATE   (ARM_DRIVER_ERROR_SPECIFIC - 2)
+
+ +

Requested bitrate not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_INVALID_BIT_PROP_SEG   (ARM_DRIVER_ERROR_SPECIFIC - 3)
+
+ +

Propagation segment value not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_INVALID_BIT_PHASE_SEG1   (ARM_DRIVER_ERROR_SPECIFIC - 4)
+
+ +

Phase segment 1 value not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_INVALID_BIT_PHASE_SEG2   (ARM_DRIVER_ERROR_SPECIFIC - 5)
+
+ +

Phase segment 2 value not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_INVALID_BIT_SJW   (ARM_DRIVER_ERROR_SPECIFIC - 6)
+
+ +

SJW value not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_NO_MESSAGE_AVAILABLE   (ARM_DRIVER_ERROR_SPECIFIC - 7)
+
+ +

Message is not available.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__Common_8c.html b/docs/Driver/html/Driver__Common_8c.html new file mode 100644 index 0000000..c53a4f4 --- /dev/null +++ b/docs/Driver/html/Driver__Common_8c.html @@ -0,0 +1,129 @@ + + + + + +Driver_Common.c File Reference +CMSIS-Driver: Driver_Common.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Driver_Common.c File Reference
+
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__Common_8h.html b/docs/Driver/html/Driver__Common_8h.html new file mode 100644 index 0000000..40bf8d3 --- /dev/null +++ b/docs/Driver/html/Driver__Common_8h.html @@ -0,0 +1,206 @@ + + + + + +Driver_Common.h File Reference +CMSIS-Driver: Driver_Common.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Enumerations
+
+
Driver_Common.h File Reference
+
+
+ + + + + +

+Data Structures

struct  ARM_DRIVER_VERSION
 Driver Version. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_DRIVER_VERSION_MAJOR_MINOR(major, minor)   (((major) << 8) | (minor))
 
#define ARM_DRIVER_OK   0
 Operation succeeded. More...
 
#define ARM_DRIVER_ERROR   -1
 Unspecified error. More...
 
#define ARM_DRIVER_ERROR_BUSY   -2
 Driver is busy. More...
 
#define ARM_DRIVER_ERROR_TIMEOUT   -3
 Timeout occurred. More...
 
#define ARM_DRIVER_ERROR_UNSUPPORTED   -4
 Operation not supported. More...
 
#define ARM_DRIVER_ERROR_PARAMETER   -5
 Parameter error. More...
 
#define ARM_DRIVER_ERROR_SPECIFIC   -6
 Start of driver specific errors. More...
 
+ + + + +

+Enumerations

enum  ARM_POWER_STATE {
+  ARM_POWER_OFF, +
+  ARM_POWER_LOW, +
+  ARM_POWER_FULL +
+ }
 General power states. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define ARM_DRIVER_VERSION_MAJOR_MINOR( major,
 minor 
)   (((major) << 8) | (minor))
+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__ETH_8c.html b/docs/Driver/html/Driver__ETH_8c.html new file mode 100644 index 0000000..0a578c1 --- /dev/null +++ b/docs/Driver/html/Driver__ETH_8c.html @@ -0,0 +1,129 @@ + + + + + +Driver_ETH.c File Reference +CMSIS-Driver: Driver_ETH.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Driver_ETH.c File Reference
+
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__ETH_8h.html b/docs/Driver/html/Driver__ETH_8h.html new file mode 100644 index 0000000..353a2ee --- /dev/null +++ b/docs/Driver/html/Driver__ETH_8h.html @@ -0,0 +1,254 @@ + + + + + +Driver_ETH.h File Reference +CMSIS-Driver: Driver_ETH.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Enumerations
+
+
Driver_ETH.h File Reference
+
+
+ + + + + + + + +

+Data Structures

struct  ARM_ETH_LINK_INFO
 Ethernet link information. More...
 
struct  ARM_ETH_MAC_ADDR
 Ethernet MAC Address. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_ETH_INTERFACE_MII   (0)
 Ethernet Media Interface type. More...
 
#define ARM_ETH_INTERFACE_RMII   (1)
 Reduced Media Independent Interface (RMII) More...
 
#define ARM_ETH_INTERFACE_SMII   (2)
 Serial Media Independent Interface (SMII) More...
 
#define ARM_ETH_SPEED_10M   (0)
 Ethernet link speed. More...
 
#define ARM_ETH_SPEED_100M   (1)
 100 Mbps link speed More...
 
#define ARM_ETH_SPEED_1G   (2)
 1 Gpbs link speed More...
 
#define ARM_ETH_DUPLEX_HALF   (0)
 Ethernet duplex mode. More...
 
#define ARM_ETH_DUPLEX_FULL   (1)
 Full duplex link. More...
 
+ + + + +

+Enumerations

enum  ARM_ETH_LINK_STATE {
+  ARM_ETH_LINK_DOWN, +
+  ARM_ETH_LINK_UP +
+ }
 Ethernet link state. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_SPEED_10M   (0)
+
+ +

Ethernet link speed.

+

10 Mbps link speed

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_SPEED_100M   (1)
+
+ +

100 Mbps link speed

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_SPEED_1G   (2)
+
+ +

1 Gpbs link speed

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_DUPLEX_HALF   (0)
+
+ +

Ethernet duplex mode.

+

Half duplex link

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_DUPLEX_FULL   (1)
+
+ +

Full duplex link.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__ETH__MAC_8c.html b/docs/Driver/html/Driver__ETH__MAC_8c.html new file mode 100644 index 0000000..2b5e352 --- /dev/null +++ b/docs/Driver/html/Driver__ETH__MAC_8c.html @@ -0,0 +1,189 @@ + + + + + +Driver_ETH_MAC.c File Reference +CMSIS-Driver: Driver_ETH_MAC.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_ETH_MAC.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion (void)
 Get driver version. More...
 
ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event)
 Initialize Ethernet MAC Device. More...
 
int32_t ARM_ETH_MAC_Uninitialize (void)
 De-initialize Ethernet MAC Device. More...
 
int32_t ARM_ETH_MAC_PowerControl (ARM_POWER_STATE state)
 Control Ethernet MAC Device Power. More...
 
int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr)
 Get Ethernet MAC Address. More...
 
int32_t ARM_ETH_MAC_SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr)
 Set Ethernet MAC Address. More...
 
int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr)
 Configure Address Filter. More...
 
int32_t ARM_ETH_MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags)
 Send Ethernet frame. More...
 
int32_t ARM_ETH_MAC_ReadFrame (uint8_t *frame, uint32_t len)
 Read data of received Ethernet frame. More...
 
uint32_t ARM_ETH_MAC_GetRxFrameSize (void)
 Get size of received Ethernet frame. More...
 
int32_t ARM_ETH_MAC_GetRxFrameTime (ARM_ETH_MAC_TIME *time)
 Get time of received Ethernet frame. More...
 
int32_t ARM_ETH_MAC_GetTxFrameTime (ARM_ETH_MAC_TIME *time)
 Get time of transmitted Ethernet frame. More...
 
int32_t ARM_ETH_MAC_Control (uint32_t control, uint32_t arg)
 Control Ethernet Interface. More...
 
int32_t ARM_ETH_MAC_ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time)
 Control Precision Timer. More...
 
int32_t ARM_ETH_MAC_PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
 Read Ethernet PHY Register through Management Interface. More...
 
int32_t ARM_ETH_MAC_PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
 Write Ethernet PHY Register through Management Interface. More...
 
void ARM_ETH_MAC_SignalEvent (uint32_t event)
 Callback function that signals a Ethernet Event. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__ETH__MAC_8h.html b/docs/Driver/html/Driver__ETH__MAC_8h.html new file mode 100644 index 0000000..2840b46 --- /dev/null +++ b/docs/Driver/html/Driver__ETH__MAC_8h.html @@ -0,0 +1,361 @@ + + + + + +Driver_ETH_MAC.h File Reference +CMSIS-Driver: Driver_ETH_MAC.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs
+
+
Driver_ETH_MAC.h File Reference
+
+
+ + + + + + + + + + + +

+Data Structures

struct  ARM_ETH_MAC_TIME
 Ethernet MAC Time. More...
 
struct  ARM_ETH_MAC_CAPABILITIES
 Ethernet MAC Capabilities. More...
 
struct  ARM_DRIVER_ETH_MAC
 Access structure of the Ethernet MAC Driver. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_ETH_MAC_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,1) /* API version */
 
#define _ARM_Driver_ETH_MAC_(n)   Driver_ETH_MAC##n
 
#define ARM_Driver_ETH_MAC_(n)   _ARM_Driver_ETH_MAC_(n)
 
#define ARM_ETH_MAC_CONFIGURE   (0x01)
 Configure MAC; arg = configuration. More...
 
#define ARM_ETH_MAC_CONTROL_TX   (0x02)
 Transmitter; arg: 0=disabled (default), 1=enabled. More...
 
#define ARM_ETH_MAC_CONTROL_RX   (0x03)
 Receiver; arg: 0=disabled (default), 1=enabled. More...
 
#define ARM_ETH_MAC_FLUSH   (0x04)
 Flush buffer; arg = ARM_ETH_MAC_FLUSH_... More...
 
#define ARM_ETH_MAC_SLEEP   (0x05)
 Sleep mode; arg: 1=enter and wait for Magic packet, 0=exit. More...
 
#define ARM_ETH_MAC_VLAN_FILTER   (0x06)
 VLAN Filter for received frames; arg15..0: VLAN Tag; arg16: optional ARM_ETH_MAC_VLAN_FILTER_ID_ONLY; 0=disabled (default) More...
 
#define ARM_ETH_MAC_SPEED_Pos   0
 
#define ARM_ETH_MAC_SPEED_Msk   (3UL << ARM_ETH_MAC_SPEED_Pos)
 
#define ARM_ETH_MAC_SPEED_10M   (ARM_ETH_SPEED_10M << ARM_ETH_MAC_SPEED_Pos)
 10 Mbps link speed More...
 
#define ARM_ETH_MAC_SPEED_100M   (ARM_ETH_SPEED_100M << ARM_ETH_MAC_SPEED_Pos)
 100 Mbps link speed More...
 
#define ARM_ETH_MAC_SPEED_1G   (ARM_ETH_SPEED_1G << ARM_ETH_MAC_SPEED_Pos)
 1 Gpbs link speed More...
 
#define ARM_ETH_MAC_DUPLEX_Pos   2
 
#define ARM_ETH_MAC_DUPLEX_Msk   (1UL << ARM_ETH_MAC_DUPLEX_Pos)
 
#define ARM_ETH_MAC_DUPLEX_HALF   (ARM_ETH_DUPLEX_HALF << ARM_ETH_MAC_DUPLEX_Pos)
 Half duplex link. More...
 
#define ARM_ETH_MAC_DUPLEX_FULL   (ARM_ETH_DUPLEX_FULL << ARM_ETH_MAC_DUPLEX_Pos)
 Full duplex link. More...
 
#define ARM_ETH_MAC_LOOPBACK   (1UL << 4)
 Loop-back test mode. More...
 
#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX   (1UL << 5)
 Receiver Checksum offload. More...
 
#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX   (1UL << 6)
 Transmitter Checksum offload. More...
 
#define ARM_ETH_MAC_ADDRESS_BROADCAST   (1UL << 7)
 Accept frames with Broadcast address. More...
 
#define ARM_ETH_MAC_ADDRESS_MULTICAST   (1UL << 8)
 Accept frames with any Multicast address. More...
 
#define ARM_ETH_MAC_ADDRESS_ALL   (1UL << 9)
 Accept frames with any address (Promiscuous Mode) More...
 
#define ARM_ETH_MAC_FLUSH_RX   (1UL << 0)
 Flush Receive buffer. More...
 
#define ARM_ETH_MAC_FLUSH_TX   (1UL << 1)
 Flush Transmit buffer. More...
 
#define ARM_ETH_MAC_VLAN_FILTER_ID_ONLY   (1UL << 16)
 Compare only the VLAN Identifier (12-bit) More...
 
#define ARM_ETH_MAC_TX_FRAME_FRAGMENT   (1UL << 0)
 Indicate frame fragment. More...
 
#define ARM_ETH_MAC_TX_FRAME_EVENT   (1UL << 1)
 Generate event when frame is transmitted. More...
 
#define ARM_ETH_MAC_TX_FRAME_TIMESTAMP   (1UL << 2)
 Capture frame time stamp. More...
 
#define ARM_ETH_MAC_TIMER_GET_TIME   (0x01)
 Get current time. More...
 
#define ARM_ETH_MAC_TIMER_SET_TIME   (0x02)
 Set new time. More...
 
#define ARM_ETH_MAC_TIMER_INC_TIME   (0x03)
 Increment current time. More...
 
#define ARM_ETH_MAC_TIMER_DEC_TIME   (0x04)
 Decrement current time. More...
 
#define ARM_ETH_MAC_TIMER_SET_ALARM   (0x05)
 Set alarm time. More...
 
#define ARM_ETH_MAC_TIMER_ADJUST_CLOCK   (0x06)
 Adjust clock frequency; time->ns: correction factor * 2^31. More...
 
#define ARM_ETH_MAC_EVENT_RX_FRAME   (1UL << 0)
 Frame Received. More...
 
#define ARM_ETH_MAC_EVENT_TX_FRAME   (1UL << 1)
 Frame Transmitted. More...
 
#define ARM_ETH_MAC_EVENT_WAKEUP   (1UL << 2)
 Wake-up (on Magic Packet) More...
 
#define ARM_ETH_MAC_EVENT_TIMER_ALARM   (1UL << 3)
 Timer Alarm. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_ETH_MAC_SignalEvent_t )(uint32_t event)
 Pointer to ARM_ETH_MAC_SignalEvent : Signal Ethernet Event. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_MAC_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,1) /* API version */
+
+ +
+
+ +
+
+ + + + + + + + +
#define _ARM_Driver_ETH_MAC_( n)   Driver_ETH_MAC##n
+
+ +
+
+ +
+
+ + + + + + + + +
#define ARM_Driver_ETH_MAC_( n)   _ARM_Driver_ETH_MAC_(n)
+
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_SPEED_Pos   0
+
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_SPEED_Msk   (3UL << ARM_ETH_MAC_SPEED_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_DUPLEX_Pos   2
+
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_DUPLEX_Msk   (1UL << ARM_ETH_MAC_DUPLEX_Pos)
+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__ETH__PHY_8c.html b/docs/Driver/html/Driver__ETH__PHY_8c.html new file mode 100644 index 0000000..e3d7fbe --- /dev/null +++ b/docs/Driver/html/Driver__ETH__PHY_8c.html @@ -0,0 +1,159 @@ + + + + + +Driver_ETH_PHY.c File Reference +CMSIS-Driver: Driver_ETH_PHY.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_ETH_PHY.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_ETH_PHY_GetVersion (void)
 Get driver version. More...
 
int32_t ARM_ETH_PHY_Initialize (ARM_ETH_PHY_Read_t fn_read, ARM_ETH_PHY_Write_t fn_write)
 Initialize Ethernet PHY Device. More...
 
int32_t ARM_ETH_PHY_Uninitialize (void)
 De-initialize Ethernet PHY Device. More...
 
int32_t ARM_ETH_PHY_PowerControl (ARM_POWER_STATE state)
 Control Ethernet PHY Device Power. More...
 
int32_t ARM_ETH_PHY_SetInterface (uint32_t interface)
 Set Ethernet Media Interface. More...
 
int32_t ARM_ETH_PHY_SetMode (uint32_t mode)
 Set Ethernet PHY Device Operation mode. More...
 
ARM_ETH_LINK_STATE ARM_ETH_PHY_GetLinkState (void)
 Get Ethernet PHY Device Link state. More...
 
ARM_ETH_LINK_INFO ARM_ETH_PHY_GetLinkInfo (void)
 Get Ethernet PHY Device Link information. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__ETH__PHY_8h.html b/docs/Driver/html/Driver__ETH__PHY_8h.html new file mode 100644 index 0000000..202dc57 --- /dev/null +++ b/docs/Driver/html/Driver__ETH__PHY_8h.html @@ -0,0 +1,283 @@ + + + + + +Driver_ETH_PHY.h File Reference +CMSIS-Driver: Driver_ETH_PHY.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs
+
+
Driver_ETH_PHY.h File Reference
+
+
+ + + + + +

+Data Structures

struct  ARM_DRIVER_ETH_PHY
 Access structure of the Ethernet PHY Driver. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_ETH_PHY_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,1) /* API version */
 
#define _ARM_Driver_ETH_PHY_(n)   Driver_ETH_PHY##n
 
#define ARM_Driver_ETH_PHY_(n)   _ARM_Driver_ETH_PHY_(n)
 
#define ARM_ETH_PHY_SPEED_Pos   0
 
#define ARM_ETH_PHY_SPEED_Msk   (3UL << ARM_ETH_PHY_SPEED_Pos)
 
#define ARM_ETH_PHY_SPEED_10M   (ARM_ETH_SPEED_10M << ARM_ETH_PHY_SPEED_Pos)
 10 Mbps link speed More...
 
#define ARM_ETH_PHY_SPEED_100M   (ARM_ETH_SPEED_100M << ARM_ETH_PHY_SPEED_Pos)
 100 Mbps link speed More...
 
#define ARM_ETH_PHY_SPEED_1G   (ARM_ETH_SPEED_1G << ARM_ETH_PHY_SPEED_Pos)
 1 Gpbs link speed More...
 
#define ARM_ETH_PHY_DUPLEX_Pos   2
 
#define ARM_ETH_PHY_DUPLEX_Msk   (1UL << ARM_ETH_PHY_DUPLEX_Pos)
 
#define ARM_ETH_PHY_DUPLEX_HALF   (ARM_ETH_DUPLEX_HALF << ARM_ETH_PHY_DUPLEX_Pos)
 Half duplex link. More...
 
#define ARM_ETH_PHY_DUPLEX_FULL   (ARM_ETH_DUPLEX_FULL << ARM_ETH_PHY_DUPLEX_Pos)
 Full duplex link. More...
 
#define ARM_ETH_PHY_AUTO_NEGOTIATE   (1UL << 3)
 Auto Negotiation mode. More...
 
#define ARM_ETH_PHY_LOOPBACK   (1UL << 4)
 Loop-back test mode. More...
 
#define ARM_ETH_PHY_ISOLATE   (1UL << 5)
 Isolate PHY from MII/RMII interface. More...
 
+ + + + + + + +

+Typedefs

typedef int32_t(* ARM_ETH_PHY_Read_t )(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
 Pointer to ARM_ETH_MAC_PHY_Read : Read Ethernet PHY Register. More...
 
typedef int32_t(* ARM_ETH_PHY_Write_t )(uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
 Pointer to ARM_ETH_MAC_PHY_Write : Write Ethernet PHY Register. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_PHY_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,1) /* API version */
+
+ +
+
+ +
+
+ + + + + + + + +
#define _ARM_Driver_ETH_PHY_( n)   Driver_ETH_PHY##n
+
+ +
+
+ +
+
+ + + + + + + + +
#define ARM_Driver_ETH_PHY_( n)   _ARM_Driver_ETH_PHY_(n)
+
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_SPEED_Pos   0
+
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_SPEED_Msk   (3UL << ARM_ETH_PHY_SPEED_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_DUPLEX_Pos   2
+
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_DUPLEX_Msk   (1UL << ARM_ETH_PHY_DUPLEX_Pos)
+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__Flash_8c.html b/docs/Driver/html/Driver__Flash_8c.html new file mode 100644 index 0000000..9d32824 --- /dev/null +++ b/docs/Driver/html/Driver__Flash_8c.html @@ -0,0 +1,171 @@ + + + + + +Driver_Flash.c File Reference +CMSIS-Driver: Driver_Flash.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_Flash.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_Flash_GetVersion (void)
 Get driver version. More...
 
ARM_FLASH_CAPABILITIES ARM_Flash_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_Flash_Initialize (ARM_Flash_SignalEvent_t cb_event)
 Initialize the Flash Interface. More...
 
int32_t ARM_Flash_Uninitialize (void)
 De-initialize the Flash Interface. More...
 
int32_t ARM_Flash_PowerControl (ARM_POWER_STATE state)
 Control the Flash interface power. More...
 
int32_t ARM_Flash_ReadData (uint32_t addr, void *data, uint32_t cnt)
 Read data from Flash. More...
 
int32_t ARM_Flash_ProgramData (uint32_t addr, const void *data, uint32_t cnt)
 Program data to Flash. More...
 
int32_t ARM_Flash_EraseSector (uint32_t addr)
 Erase Flash Sector. More...
 
int32_t ARM_Flash_EraseChip (void)
 Erase complete Flash. Optional function for faster full chip erase. More...
 
ARM_FLASH_STATUS ARM_Flash_GetStatus (void)
 Get Flash status. More...
 
ARM_FLASH_INFO * ARM_Flash_GetInfo (void)
 Get Flash information. More...
 
void ARM_Flash_SignalEvent (uint32_t event)
 Signal Flash event. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__Flash_8h.html b/docs/Driver/html/Driver__Flash_8h.html new file mode 100644 index 0000000..67ea671 --- /dev/null +++ b/docs/Driver/html/Driver__Flash_8h.html @@ -0,0 +1,246 @@ + + + + + +Driver_Flash.h File Reference +CMSIS-Driver: Driver_Flash.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs
+
+
Driver_Flash.h File Reference
+
+
+ + + + + + + + + + + + + + + + + +

+Data Structures

struct  ARM_FLASH_SECTOR
 Flash Sector information. More...
 
struct  ARM_FLASH_INFO
 Flash information. More...
 
struct  ARM_FLASH_STATUS
 Flash Status. More...
 
struct  ARM_FLASH_CAPABILITIES
 Flash Driver Capabilities. More...
 
struct  ARM_DRIVER_FLASH
 Access structure of the Flash Driver. More...
 
+ + + + + + + + + + + + + + + +

+Macros

#define ARM_FLASH_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */
 
#define _ARM_Driver_Flash_(n)   Driver_Flash##n
 
#define ARM_Driver_Flash_(n)   _ARM_Driver_Flash_(n)
 
#define ARM_FLASH_SECTOR_INFO(addr, size)   { (addr), (addr)+(size)-1 }
 
#define ARM_FLASH_EVENT_READY   (1UL << 0)
 Flash Ready. More...
 
#define ARM_FLASH_EVENT_ERROR   (1UL << 1)
 Read/Program/Erase Error. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_Flash_SignalEvent_t )(uint32_t event)
 Pointer to ARM_Flash_SignalEvent : Signal Flash Event. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_FLASH_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */
+
+ +
+
+ +
+
+ + + + + + + + +
#define _ARM_Driver_Flash_( n)   Driver_Flash##n
+
+ +
+
+ +
+
+ + + + + + + + +
#define ARM_Driver_Flash_( n)   _ARM_Driver_Flash_(n)
+
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
#define ARM_FLASH_SECTOR_INFO( addr,
 size 
)   { (addr), (addr)+(size)-1 }
+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__I2C_8c.html b/docs/Driver/html/Driver__I2C_8c.html new file mode 100644 index 0000000..16654e3 --- /dev/null +++ b/docs/Driver/html/Driver__I2C_8c.html @@ -0,0 +1,174 @@ + + + + + +Driver_I2C.c File Reference +CMSIS-Driver: Driver_I2C.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_I2C.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_I2C_GetVersion (void)
 Get driver version. More...
 
ARM_I2C_CAPABILITIES ARM_I2C_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_I2C_Initialize (ARM_I2C_SignalEvent_t cb_event)
 Initialize I2C Interface. More...
 
int32_t ARM_I2C_Uninitialize (void)
 De-initialize I2C Interface. More...
 
int32_t ARM_I2C_PowerControl (ARM_POWER_STATE state)
 Control I2C Interface Power. More...
 
int32_t ARM_I2C_MasterTransmit (uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
 Start transmitting data as I2C Master. More...
 
int32_t ARM_I2C_MasterReceive (uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
 Start receiving data as I2C Master. More...
 
int32_t ARM_I2C_SlaveTransmit (const uint8_t *data, uint32_t num)
 Start transmitting data as I2C Slave. More...
 
int32_t ARM_I2C_SlaveReceive (uint8_t *data, uint32_t num)
 Start receiving data as I2C Slave. More...
 
int32_t ARM_I2C_GetDataCount (void)
 Get transferred data count. More...
 
int32_t ARM_I2C_Control (uint32_t control, uint32_t arg)
 Control I2C Interface. More...
 
ARM_I2C_STATUS ARM_I2C_GetStatus (void)
 Get I2C status. More...
 
void ARM_I2C_SignalEvent (uint32_t event)
 Signal I2C Events. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__I2C_8h.html b/docs/Driver/html/Driver__I2C_8h.html new file mode 100644 index 0000000..30f46a9 --- /dev/null +++ b/docs/Driver/html/Driver__I2C_8h.html @@ -0,0 +1,227 @@ + + + + + +Driver_I2C.h File Reference +CMSIS-Driver: Driver_I2C.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs
+
+
Driver_I2C.h File Reference
+
+
+ + + + + + + + + + + +

+Data Structures

struct  ARM_I2C_STATUS
 I2C Status. More...
 
struct  ARM_I2C_CAPABILITIES
 I2C Driver Capabilities. More...
 
struct  ARM_DRIVER_I2C
 Access structure of the I2C Driver. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_I2C_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */
 
#define ARM_I2C_OWN_ADDRESS   (0x01)
 Set Own Slave Address; arg = address. More...
 
#define ARM_I2C_BUS_SPEED   (0x02)
 Set Bus Speed; arg = speed. More...
 
#define ARM_I2C_BUS_CLEAR   (0x03)
 Execute Bus clear: send nine clock pulses. More...
 
#define ARM_I2C_ABORT_TRANSFER   (0x04)
 Abort Master/Slave Transmit/Receive. More...
 
#define ARM_I2C_BUS_SPEED_STANDARD   (0x01)
 Standard Speed (100kHz) More...
 
#define ARM_I2C_BUS_SPEED_FAST   (0x02)
 Fast Speed (400kHz) More...
 
#define ARM_I2C_BUS_SPEED_FAST_PLUS   (0x03)
 Fast+ Speed ( 1MHz) More...
 
#define ARM_I2C_BUS_SPEED_HIGH   (0x04)
 High Speed (3.4MHz) More...
 
#define ARM_I2C_ADDRESS_10BIT   (0x0400)
 10-bit address flag More...
 
#define ARM_I2C_ADDRESS_GC   (0x8000)
 General Call flag. More...
 
#define ARM_I2C_EVENT_TRANSFER_DONE   (1UL << 0)
 Master/Slave Transmit/Receive finished. More...
 
#define ARM_I2C_EVENT_TRANSFER_INCOMPLETE   (1UL << 1)
 Master/Slave Transmit/Receive incomplete transfer. More...
 
#define ARM_I2C_EVENT_SLAVE_TRANSMIT   (1UL << 2)
 Addressed as Slave Transmitter but transmit operation is not set. More...
 
#define ARM_I2C_EVENT_SLAVE_RECEIVE   (1UL << 3)
 Addressed as Slave Receiver but receive operation is not set. More...
 
#define ARM_I2C_EVENT_ADDRESS_NACK   (1UL << 4)
 Address not acknowledged from Slave. More...
 
#define ARM_I2C_EVENT_GENERAL_CALL   (1UL << 5)
 Slave addressed with general call address. More...
 
#define ARM_I2C_EVENT_ARBITRATION_LOST   (1UL << 6)
 Master lost arbitration. More...
 
#define ARM_I2C_EVENT_BUS_ERROR   (1UL << 7)
 Bus error detected (START/STOP at illegal position) More...
 
#define ARM_I2C_EVENT_BUS_CLEAR   (1UL << 8)
 Bus clear finished. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_I2C_SignalEvent_t )(uint32_t event)
 Pointer to ARM_I2C_SignalEvent : Signal I2C Event. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_I2C_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */
+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__MCI_8c.html b/docs/Driver/html/Driver__MCI_8c.html new file mode 100644 index 0000000..dba56be --- /dev/null +++ b/docs/Driver/html/Driver__MCI_8c.html @@ -0,0 +1,177 @@ + + + + + +Driver_MCI.c File Reference +CMSIS-Driver: Driver_MCI.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_MCI.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_MCI_GetVersion (void)
 Get driver version. More...
 
ARM_MCI_CAPABILITIES ARM_MCI_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_MCI_Initialize (ARM_MCI_SignalEvent_t cb_event)
 Initialize the Memory Card Interface. More...
 
int32_t ARM_MCI_Uninitialize (void)
 De-initialize Memory Card Interface. More...
 
int32_t ARM_MCI_PowerControl (ARM_POWER_STATE state)
 Control Memory Card Interface Power. More...
 
int32_t ARM_MCI_CardPower (uint32_t voltage)
 Set Memory Card Power supply voltage. More...
 
int32_t ARM_MCI_ReadCD (void)
 Read Card Detect (CD) state. More...
 
int32_t ARM_MCI_ReadWP (void)
 Read Write Protect (WP) state. More...
 
int32_t ARM_MCI_SendCommand (uint32_t cmd, uint32_t arg, uint32_t flags, uint32_t *response)
 Send Command to card and get the response. More...
 
int32_t ARM_MCI_SetupTransfer (uint8_t *data, uint32_t block_count, uint32_t block_size, uint32_t mode)
 Setup read or write transfer operation. More...
 
int32_t ARM_MCI_AbortTransfer (void)
 Abort current read/write data transfer. More...
 
int32_t ARM_MCI_Control (uint32_t control, uint32_t arg)
 Control MCI Interface. More...
 
ARM_MCI_STATUS ARM_MCI_GetStatus (void)
 Get MCI status. More...
 
void ARM_MCI_SignalEvent (uint32_t event)
 Callback function that signals a MCI Card Event. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__MCI_8h.html b/docs/Driver/html/Driver__MCI_8h.html new file mode 100644 index 0000000..c2a9035 --- /dev/null +++ b/docs/Driver/html/Driver__MCI_8h.html @@ -0,0 +1,467 @@ + + + + + +Driver_MCI.h File Reference +CMSIS-Driver: Driver_MCI.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs
+
+
Driver_MCI.h File Reference
+
+
+ + + + + + + + + + + +

+Data Structures

struct  ARM_MCI_STATUS
 MCI Status. More...
 
struct  ARM_MCI_CAPABILITIES
 MCI Driver Capabilities. More...
 
struct  ARM_DRIVER_MCI
 Access structure of the MCI Driver. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_MCI_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */
 
#define ARM_MCI_RESPONSE_Pos   0
 
#define ARM_MCI_RESPONSE_Msk   (3UL << ARM_MCI_RESPONSE_Pos)
 
#define ARM_MCI_RESPONSE_NONE   (0UL << ARM_MCI_RESPONSE_Pos)
 No response expected (default) More...
 
#define ARM_MCI_RESPONSE_SHORT   (1UL << ARM_MCI_RESPONSE_Pos)
 Short response (48-bit) More...
 
#define ARM_MCI_RESPONSE_SHORT_BUSY   (2UL << ARM_MCI_RESPONSE_Pos)
 Short response with busy signal (48-bit) More...
 
#define ARM_MCI_RESPONSE_LONG   (3UL << ARM_MCI_RESPONSE_Pos)
 Long response (136-bit) More...
 
#define ARM_MCI_RESPONSE_INDEX   (1UL << 2)
 Check command index in response. More...
 
#define ARM_MCI_RESPONSE_CRC   (1UL << 3)
 Check CRC in response. More...
 
#define ARM_MCI_WAIT_BUSY   (1UL << 4)
 Wait until busy before sending the command. More...
 
#define ARM_MCI_TRANSFER_DATA   (1UL << 5)
 Activate Data transfer. More...
 
#define ARM_MCI_CARD_INITIALIZE   (1UL << 6)
 Execute Memory Card initialization sequence. More...
 
#define ARM_MCI_INTERRUPT_COMMAND   (1UL << 7)
 Send Interrupt command (CMD40 - MMC only) More...
 
#define ARM_MCI_INTERRUPT_RESPONSE   (1UL << 8)
 Send Interrupt response (CMD40 - MMC only) More...
 
#define ARM_MCI_BOOT_OPERATION   (1UL << 9)
 Execute Boot operation (MMC only) More...
 
#define ARM_MCI_BOOT_ALTERNATIVE   (1UL << 10)
 Execute Alternative Boot operation (MMC only) More...
 
#define ARM_MCI_BOOT_ACK   (1UL << 11)
 Expect Boot Acknowledge (MMC only) More...
 
#define ARM_MCI_CCSD   (1UL << 12)
 Send Command Completion Signal Disable (CCSD) for CE-ATA device. More...
 
#define ARM_MCI_CCS   (1UL << 13)
 Expect Command Completion Signal (CCS) for CE-ATA device. More...
 
#define ARM_MCI_TRANSFER_READ   (0UL << 0)
 Data Read Transfer (from MCI) More...
 
#define ARM_MCI_TRANSFER_WRITE   (1UL << 0)
 Data Write Transfer (to MCI) More...
 
#define ARM_MCI_TRANSFER_BLOCK   (0UL << 1)
 Block Data transfer (default) More...
 
#define ARM_MCI_TRANSFER_STREAM   (1UL << 1)
 Stream Data transfer (MMC only) More...
 
#define ARM_MCI_BUS_SPEED   (0x01)
 Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s. More...
 
#define ARM_MCI_BUS_SPEED_MODE   (0x02)
 Set Bus Speed Mode as specified with arg. More...
 
#define ARM_MCI_BUS_CMD_MODE   (0x03)
 Set CMD Line Mode as specified with arg. More...
 
#define ARM_MCI_BUS_DATA_WIDTH   (0x04)
 Set Bus Data Width as specified with arg. More...
 
#define ARM_MCI_DRIVER_STRENGTH   (0x05)
 Set SD UHS-I Driver Strength as specified with arg. More...
 
#define ARM_MCI_CONTROL_RESET   (0x06)
 Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active. More...
 
#define ARM_MCI_CONTROL_CLOCK_IDLE   (0x07)
 Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled. More...
 
#define ARM_MCI_UHS_TUNING_OPERATION   (0x08)
 Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute. More...
 
#define ARM_MCI_UHS_TUNING_RESULT   (0x09)
 Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error. More...
 
#define ARM_MCI_DATA_TIMEOUT   (0x0A)
 Set Data timeout; arg = timeout in bus cycles. More...
 
#define ARM_MCI_CSS_TIMEOUT   (0x0B)
 Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles. More...
 
#define ARM_MCI_MONITOR_SDIO_INTERRUPT   (0x0C)
 Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled. More...
 
#define ARM_MCI_CONTROL_READ_WAIT   (0x0D)
 Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled. More...
 
#define ARM_MCI_SUSPEND_TRANSFER   (0x0E)
 Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer. More...
 
#define ARM_MCI_RESUME_TRANSFER   (0x0F)
 Resume Data transfer (SD I/O) More...
 
#define ARM_MCI_BUS_DEFAULT_SPEED   (0x00)
 SD/MMC: Default Speed mode up to 25/26MHz. More...
 
#define ARM_MCI_BUS_HIGH_SPEED   (0x01)
 SD/MMC: High Speed mode up to 50/52MHz. More...
 
#define ARM_MCI_BUS_UHS_SDR12   (0x02)
 SD: SDR12 (Single Data Rate) up to 25MHz, 12.5MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
#define ARM_MCI_BUS_UHS_SDR25   (0x03)
 SD: SDR25 (Single Data Rate) up to 50MHz, 25 MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
#define ARM_MCI_BUS_UHS_SDR50   (0x04)
 SD: SDR50 (Single Data Rate) up to 100MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
#define ARM_MCI_BUS_UHS_SDR104   (0x05)
 SD: SDR104 (Single Data Rate) up to 208MHz, 104 MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
#define ARM_MCI_BUS_UHS_DDR50   (0x06)
 SD: DDR50 (Dual Data Rate) up to 50MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
#define ARM_MCI_BUS_CMD_PUSH_PULL   (0x00)
 Push-Pull CMD line (default) More...
 
#define ARM_MCI_BUS_CMD_OPEN_DRAIN   (0x01)
 Open Drain CMD line (MMC only) More...
 
#define ARM_MCI_BUS_DATA_WIDTH_1   (0x00)
 Bus data width: 1 bit (default) More...
 
#define ARM_MCI_BUS_DATA_WIDTH_4   (0x01)
 Bus data width: 4 bits. More...
 
#define ARM_MCI_BUS_DATA_WIDTH_8   (0x02)
 Bus data width: 8 bits. More...
 
#define ARM_MCI_BUS_DATA_WIDTH_4_DDR   (0x03)
 Bus data width: 4 bits, DDR (Dual Data Rate) - MMC only. More...
 
#define ARM_MCI_BUS_DATA_WIDTH_8_DDR   (0x04)
 Bus data width: 8 bits, DDR (Dual Data Rate) - MMC only. More...
 
#define ARM_MCI_DRIVER_TYPE_A   (0x01)
 SD UHS-I Driver Type A. More...
 
#define ARM_MCI_DRIVER_TYPE_B   (0x00)
 SD UHS-I Driver Type B (default) More...
 
#define ARM_MCI_DRIVER_TYPE_C   (0x02)
 SD UHS-I Driver Type C. More...
 
#define ARM_MCI_DRIVER_TYPE_D   (0x03)
 SD UHS-I Driver Type D. More...
 
#define ARM_MCI_POWER_VDD_Pos   0
 
#define ARM_MCI_POWER_VDD_Msk   (0x0FUL << ARM_MCI_POWER_VDD_Pos)
 
#define ARM_MCI_POWER_VDD_OFF   (0x01UL << ARM_MCI_POWER_VDD_Pos)
 VDD (VCC) turned off. More...
 
#define ARM_MCI_POWER_VDD_3V3   (0x02UL << ARM_MCI_POWER_VDD_Pos)
 VDD (VCC) = 3.3V. More...
 
#define ARM_MCI_POWER_VDD_1V8   (0x03UL << ARM_MCI_POWER_VDD_Pos)
 VDD (VCC) = 1.8V. More...
 
#define ARM_MCI_POWER_VCCQ_Pos   4
 
#define ARM_MCI_POWER_VCCQ_Msk   (0x0FUL << ARM_MCI_POWER_VCCQ_Pos)
 
#define ARM_MCI_POWER_VCCQ_OFF   (0x01UL << ARM_MCI_POWER_VCCQ_Pos)
 eMMC VCCQ turned off More...
 
#define ARM_MCI_POWER_VCCQ_3V3   (0x02UL << ARM_MCI_POWER_VCCQ_Pos)
 eMMC VCCQ = 3.3V More...
 
#define ARM_MCI_POWER_VCCQ_1V8   (0x03UL << ARM_MCI_POWER_VCCQ_Pos)
 eMMC VCCQ = 1.8V More...
 
#define ARM_MCI_POWER_VCCQ_1V2   (0x04UL << ARM_MCI_POWER_VCCQ_Pos)
 eMMC VCCQ = 1.2V More...
 
#define ARM_MCI_EVENT_CARD_INSERTED   (1UL << 0)
 Memory Card inserted. More...
 
#define ARM_MCI_EVENT_CARD_REMOVED   (1UL << 1)
 Memory Card removed. More...
 
#define ARM_MCI_EVENT_COMMAND_COMPLETE   (1UL << 2)
 Command completed. More...
 
#define ARM_MCI_EVENT_COMMAND_TIMEOUT   (1UL << 3)
 Command timeout. More...
 
#define ARM_MCI_EVENT_COMMAND_ERROR   (1UL << 4)
 Command response error (CRC error or invalid response) More...
 
#define ARM_MCI_EVENT_TRANSFER_COMPLETE   (1UL << 5)
 Data transfer completed. More...
 
#define ARM_MCI_EVENT_TRANSFER_TIMEOUT   (1UL << 6)
 Data transfer timeout. More...
 
#define ARM_MCI_EVENT_TRANSFER_ERROR   (1UL << 7)
 Data transfer CRC failed. More...
 
#define ARM_MCI_EVENT_SDIO_INTERRUPT   (1UL << 8)
 SD I/O Interrupt. More...
 
#define ARM_MCI_EVENT_CCS   (1UL << 9)
 Command Completion Signal (CCS) More...
 
#define ARM_MCI_EVENT_CCS_TIMEOUT   (1UL << 10)
 Command Completion Signal (CCS) Timeout. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_MCI_SignalEvent_t )(uint32_t event)
 Pointer to ARM_MCI_SignalEvent : Signal MCI Card Event. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */
+
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_RESPONSE_Pos   0
+
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_RESPONSE_Msk   (3UL << ARM_MCI_RESPONSE_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VDD_Pos   0
+
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VDD_Msk   (0x0FUL << ARM_MCI_POWER_VDD_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VCCQ_Pos   4
+
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VCCQ_Msk   (0x0FUL << ARM_MCI_POWER_VCCQ_Pos)
+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__NAND_8c.html b/docs/Driver/html/Driver__NAND_8c.html new file mode 100644 index 0000000..c00da8c --- /dev/null +++ b/docs/Driver/html/Driver__NAND_8c.html @@ -0,0 +1,192 @@ + + + + + +Driver_NAND.c File Reference +CMSIS-Driver: Driver_NAND.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_NAND.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_NAND_GetVersion (void)
 Get driver version. More...
 
ARM_NAND_CAPABILITIES ARM_NAND_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_NAND_Initialize (ARM_NAND_SignalEvent_t cb_event)
 Initialize the NAND Interface. More...
 
int32_t ARM_NAND_Uninitialize (void)
 De-initialize the NAND Interface. More...
 
int32_t ARM_NAND_PowerControl (ARM_POWER_STATE state)
 Control the NAND interface power. More...
 
int32_t ARM_NAND_DevicePower (uint32_t voltage)
 Set device power supply voltage. More...
 
int32_t ARM_NAND_WriteProtect (uint32_t dev_num, bool enable)
 Control WPn (Write Protect). More...
 
int32_t ARM_NAND_ChipEnable (uint32_t dev_num, bool enable)
 Control CEn (Chip Enable). More...
 
int32_t ARM_NAND_GetDeviceBusy (uint32_t dev_num)
 Get Device Busy pin state. More...
 
int32_t ARM_NAND_SendCommand (uint32_t dev_num, uint8_t cmd)
 Send command to NAND device. More...
 
int32_t ARM_NAND_SendAddress (uint32_t dev_num, uint8_t addr)
 Send address to NAND device. More...
 
int32_t ARM_NAND_ReadData (uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode)
 Read data from NAND device. More...
 
int32_t ARM_NAND_WriteData (uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode)
 Write data to NAND device. More...
 
int32_t ARM_NAND_ExecuteSequence (uint32_t dev_num, uint32_t code, uint32_t cmd, uint32_t addr_col, uint32_t addr_row, void *data, uint32_t data_cnt, uint8_t *status, uint32_t *count)
 Execute sequence of operations. More...
 
int32_t ARM_NAND_AbortSequence (uint32_t dev_num)
 Abort sequence execution. More...
 
int32_t ARM_NAND_Control (uint32_t dev_num, uint32_t control, uint32_t arg)
 Control NAND Interface. More...
 
ARM_NAND_STATUS ARM_NAND_GetStatus (uint32_t dev_num)
 Get NAND status. More...
 
int32_t ARM_NAND_InquireECC (int32_t index, ARM_NAND_ECC_INFO *info)
 Inquire about available ECC. More...
 
void ARM_NAND_SignalEvent (uint32_t dev_num, uint32_t event)
 Signal NAND event. More...
 
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+
+ + + + diff --git a/docs/Driver/html/Driver__NAND_8h.html b/docs/Driver/html/Driver__NAND_8h.html new file mode 100644 index 0000000..1160716 --- /dev/null +++ b/docs/Driver/html/Driver__NAND_8h.html @@ -0,0 +1,894 @@ + + + + + +Driver_NAND.h File Reference +CMSIS-Driver: Driver_NAND.h File Reference + + + + + + + + + + + + + + +
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+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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+ +
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+Data Structures | +Macros | +Typedefs
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+
Driver_NAND.h File Reference
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+ + + + + + + + + + + + + + +

+Data Structures

struct  ARM_NAND_ECC_INFO
 NAND ECC (Error Correction Code) Information. More...
 
struct  ARM_NAND_STATUS
 NAND Status. More...
 
struct  ARM_NAND_CAPABILITIES
 NAND Driver Capabilities. More...
 
struct  ARM_DRIVER_NAND
 Access structure of the NAND Driver. More...
 
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+Macros

#define ARM_NAND_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */
 
#define ARM_NAND_POWER_VCC_Pos   0
 
#define ARM_NAND_POWER_VCC_Msk   (0x07UL << ARM_NAND_POWER_VCC_Pos)
 
#define ARM_NAND_POWER_VCC_OFF   (0x01UL << ARM_NAND_POWER_VCC_Pos)
 VCC Power off. More...
 
#define ARM_NAND_POWER_VCC_3V3   (0x02UL << ARM_NAND_POWER_VCC_Pos)
 VCC = 3.3V. More...
 
#define ARM_NAND_POWER_VCC_1V8   (0x03UL << ARM_NAND_POWER_VCC_Pos)
 VCC = 1.8V. More...
 
#define ARM_NAND_POWER_VCCQ_Pos   3
 
#define ARM_NAND_POWER_VCCQ_Msk   (0x07UL << ARM_NAND_POWER_VCCQ_Pos)
 
#define ARM_NAND_POWER_VCCQ_OFF   (0x01UL << ARM_NAND_POWER_VCCQ_Pos)
 VCCQ I/O Power off. More...
 
#define ARM_NAND_POWER_VCCQ_3V3   (0x02UL << ARM_NAND_POWER_VCCQ_Pos)
 VCCQ = 3.3V. More...
 
#define ARM_NAND_POWER_VCCQ_1V8   (0x03UL << ARM_NAND_POWER_VCCQ_Pos)
 VCCQ = 1.8V. More...
 
#define ARM_NAND_POWER_VPP_OFF   (1UL << 6)
 VPP off. More...
 
#define ARM_NAND_POWER_VPP_ON   (1Ul << 7)
 VPP on. More...
 
#define ARM_NAND_BUS_MODE   (0x01)
 Set Bus Mode as specified with arg. More...
 
#define ARM_NAND_BUS_DATA_WIDTH   (0x02)
 Set Bus Data Width as specified with arg. More...
 
#define ARM_NAND_DRIVER_STRENGTH   (0x03)
 Set Driver Strength as specified with arg. More...
 
#define ARM_NAND_DEVICE_READY_EVENT   (0x04)
 Generate ARM_NAND_EVENT_DEVICE_READY; arg: 0=disabled (default), 1=enabled. More...
 
#define ARM_NAND_DRIVER_READY_EVENT   (0x05)
 Generate ARM_NAND_EVENT_DRIVER_READY; arg: 0=disabled (default), 1=enabled. More...
 
#define ARM_NAND_BUS_INTERFACE_Pos   4
 
#define ARM_NAND_BUS_INTERFACE_Msk   (0x03UL << ARM_NAND_BUS_INTERFACE_Pos)
 
#define ARM_NAND_BUS_SDR   (0x00UL << ARM_NAND_BUS_INTERFACE_Pos)
 Data Interface: SDR (Single Data Rate) - Traditional interface (default) More...
 
#define ARM_NAND_BUS_DDR   (0x01UL << ARM_NAND_BUS_INTERFACE_Pos)
 Data Interface: NV-DDR (Double Data Rate) More...
 
#define ARM_NAND_BUS_DDR2   (0x02UL << ARM_NAND_BUS_INTERFACE_Pos)
 Data Interface: NV-DDR2 (Double Data Rate) More...
 
#define ARM_NAND_BUS_TIMING_MODE_Pos   0
 
#define ARM_NAND_BUS_TIMING_MODE_Msk   (0x0FUL << ARM_NAND_BUS_TIMING_MODE_Pos)
 
#define ARM_NAND_BUS_TIMING_MODE_0   (0x00UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 0 (default) More...
 
#define ARM_NAND_BUS_TIMING_MODE_1   (0x01UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 1. More...
 
#define ARM_NAND_BUS_TIMING_MODE_2   (0x02UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 2. More...
 
#define ARM_NAND_BUS_TIMING_MODE_3   (0x03UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 3. More...
 
#define ARM_NAND_BUS_TIMING_MODE_4   (0x04UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 4 (SDR EDO capable) More...
 
#define ARM_NAND_BUS_TIMING_MODE_5   (0x05UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 5 (SDR EDO capable) More...
 
#define ARM_NAND_BUS_TIMING_MODE_6   (0x06UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 6 (NV-DDR2 only) More...
 
#define ARM_NAND_BUS_TIMING_MODE_7   (0x07UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 7 (NV-DDR2 only) More...
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_Pos   8
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_Msk   (0x0FUL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_0   (0x00UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
 DDR2 Data Output Warm-up cycles: 0 (default) More...
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_1   (0x01UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
 DDR2 Data Output Warm-up cycles: 1. More...
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_2   (0x02UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
 DDR2 Data Output Warm-up cycles: 2. More...
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_4   (0x03UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
 DDR2 Data Output Warm-up cycles: 4. More...
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_Pos   12
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_Msk   (0x0FUL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_0   (0x00UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
 DDR2 Data Input Warm-up cycles: 0 (default) More...
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_1   (0x01UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
 DDR2 Data Input Warm-up cycles: 1. More...
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_2   (0x02UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
 DDR2 Data Input Warm-up cycles: 2. More...
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_4   (0x03UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
 DDR2 Data Input Warm-up cycles: 4. More...
 
#define ARM_NAND_BUS_DDR2_VEN   (1UL << 16)
 DDR2 Enable external VREFQ as reference. More...
 
#define ARM_NAND_BUS_DDR2_CMPD   (1UL << 17)
 DDR2 Enable complementary DQS (DQS_c) signal. More...
 
#define ARM_NAND_BUS_DDR2_CMPR   (1UL << 18)
 DDR2 Enable complementary RE_n (RE_c) signal. More...
 
#define ARM_NAND_BUS_DATA_WIDTH_8   (0x00)
 Bus Data Width: 8 bit (default) More...
 
#define ARM_NAND_BUS_DATA_WIDTH_16   (0x01)
 Bus Data Width: 16 bit. More...
 
#define ARM_NAND_DRIVER_STRENGTH_18   (0x00)
 Driver Strength 2.0x = 18 Ohms. More...
 
#define ARM_NAND_DRIVER_STRENGTH_25   (0x01)
 Driver Strength 1.4x = 25 Ohms. More...
 
#define ARM_NAND_DRIVER_STRENGTH_35   (0x02)
 Driver Strength 1.0x = 35 Ohms (default) More...
 
#define ARM_NAND_DRIVER_STRENGTH_50   (0x03)
 Driver Strength 0.7x = 50 Ohms. More...
 
#define ARM_NAND_ECC_INDEX_Pos   0
 
#define ARM_NAND_ECC_INDEX_Msk   (0xFFUL << ARM_NAND_ECC_INDEX_Pos)
 
#define ARM_NAND_ECC(n)   ((n) & ARM_NAND_ECC_INDEX_Msk)
 Select ECC. More...
 
#define ARM_NAND_ECC0   (1UL << 8)
 Use ECC0 of selected ECC. More...
 
#define ARM_NAND_ECC1   (1UL << 9)
 Use ECC1 of selected ECC. More...
 
#define ARM_NAND_DRIVER_DONE_EVENT   (1UL << 16)
 Generate ARM_NAND_EVENT_DRIVER_DONE. More...
 
#define ARM_NAND_CODE_SEND_CMD1   (1UL << 17)
 Send Command 1. More...
 
#define ARM_NAND_CODE_SEND_ADDR_COL1   (1UL << 18)
 Send Column Address 1. More...
 
#define ARM_NAND_CODE_SEND_ADDR_COL2   (1UL << 19)
 Send Column Address 2. More...
 
#define ARM_NAND_CODE_SEND_ADDR_ROW1   (1UL << 20)
 Send Row Address 1. More...
 
#define ARM_NAND_CODE_SEND_ADDR_ROW2   (1UL << 21)
 Send Row Address 2. More...
 
#define ARM_NAND_CODE_SEND_ADDR_ROW3   (1UL << 22)
 Send Row Address 3. More...
 
#define ARM_NAND_CODE_INC_ADDR_ROW   (1UL << 23)
 Auto-increment Row Address. More...
 
#define ARM_NAND_CODE_WRITE_DATA   (1UL << 24)
 Write Data. More...
 
#define ARM_NAND_CODE_SEND_CMD2   (1UL << 25)
 Send Command 2. More...
 
#define ARM_NAND_CODE_WAIT_BUSY   (1UL << 26)
 Wait while R/Bn busy. More...
 
#define ARM_NAND_CODE_READ_DATA   (1UL << 27)
 Read Data. More...
 
#define ARM_NAND_CODE_SEND_CMD3   (1UL << 28)
 Send Command 3. More...
 
#define ARM_NAND_CODE_READ_STATUS   (1UL << 29)
 Read Status byte and check FAIL bit (bit 0) More...
 
#define ARM_NAND_CODE_CMD1_Pos   0
 
#define ARM_NAND_CODE_CMD1_Msk   (0xFFUL << ARM_NAND_CODE_CMD1_Pos)
 
#define ARM_NAND_CODE_CMD2_Pos   8
 
#define ARM_NAND_CODE_CMD2_Msk   (0xFFUL << ARM_NAND_CODE_CMD2_Pos)
 
#define ARM_NAND_CODE_CMD3_Pos   16
 
#define ARM_NAND_CODE_CMD3_Msk   (0xFFUL << ARM_NAND_CODE_CMD3_Pos)
 
#define ARM_NAND_CODE_ADDR_COL1_Pos   0
 
#define ARM_NAND_CODE_ADDR_COL1_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_COL1_Pos)
 
#define ARM_NAND_CODE_ADDR_COL2_Pos   8
 
#define ARM_NAND_CODE_ADDR_COL2_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_COL2_Pos)
 
#define ARM_NAND_CODE_ADDR_ROW1_Pos   0
 
#define ARM_NAND_CODE_ADDR_ROW1_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_ROW1_Pos)
 
#define ARM_NAND_CODE_ADDR_ROW2_Pos   8
 
#define ARM_NAND_CODE_ADDR_ROW2_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_ROW2_Pos)
 
#define ARM_NAND_CODE_ADDR_ROW3_Pos   16
 
#define ARM_NAND_CODE_ADDR_ROW3_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_ROW3_Pos)
 
#define ARM_NAND_ERROR_ECC   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 ECC generation/correction failed. More...
 
#define ARM_NAND_EVENT_DEVICE_READY   (1UL << 0)
 Device Ready: R/Bn rising edge. More...
 
#define ARM_NAND_EVENT_DRIVER_READY   (1UL << 1)
 Driver Ready. More...
 
#define ARM_NAND_EVENT_DRIVER_DONE   (1UL << 2)
 Driver operation done. More...
 
#define ARM_NAND_EVENT_ECC_ERROR   (1UL << 3)
 ECC could not correct data. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_NAND_SignalEvent_t )(uint32_t dev_num, uint32_t event)
 Pointer to ARM_NAND_SignalEvent : Signal NAND Event. More...
 
+

Macro Definition Documentation

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#define ARM_NAND_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */
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#define ARM_NAND_POWER_VCC_Pos   0
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#define ARM_NAND_POWER_VCC_Msk   (0x07UL << ARM_NAND_POWER_VCC_Pos)
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#define ARM_NAND_POWER_VCC_OFF   (0x01UL << ARM_NAND_POWER_VCC_Pos)
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VCC Power off.

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#define ARM_NAND_POWER_VCC_3V3   (0x02UL << ARM_NAND_POWER_VCC_Pos)
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VCC = 3.3V.

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#define ARM_NAND_POWER_VCC_1V8   (0x03UL << ARM_NAND_POWER_VCC_Pos)
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VCC = 1.8V.

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#define ARM_NAND_POWER_VCCQ_Pos   3
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#define ARM_NAND_POWER_VCCQ_Msk   (0x07UL << ARM_NAND_POWER_VCCQ_Pos)
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#define ARM_NAND_POWER_VCCQ_OFF   (0x01UL << ARM_NAND_POWER_VCCQ_Pos)
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VCCQ I/O Power off.

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#define ARM_NAND_POWER_VCCQ_3V3   (0x02UL << ARM_NAND_POWER_VCCQ_Pos)
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VCCQ = 3.3V.

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#define ARM_NAND_POWER_VCCQ_1V8   (0x03UL << ARM_NAND_POWER_VCCQ_Pos)
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VCCQ = 1.8V.

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#define ARM_NAND_POWER_VPP_OFF   (1UL << 6)
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VPP off.

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#define ARM_NAND_POWER_VPP_ON   (1Ul << 7)
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VPP on.

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#define ARM_NAND_BUS_INTERFACE_Pos   4
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#define ARM_NAND_BUS_INTERFACE_Msk   (0x03UL << ARM_NAND_BUS_INTERFACE_Pos)
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#define ARM_NAND_BUS_TIMING_MODE_Pos   0
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#define ARM_NAND_BUS_TIMING_MODE_Msk   (0x0FUL << ARM_NAND_BUS_TIMING_MODE_Pos)
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#define ARM_NAND_BUS_DDR2_DO_WCYC_Pos   8
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#define ARM_NAND_BUS_DDR2_DO_WCYC_Msk   (0x0FUL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
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#define ARM_NAND_BUS_DDR2_DI_WCYC_Pos   12
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#define ARM_NAND_BUS_DDR2_DI_WCYC_Msk   (0x0FUL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
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#define ARM_NAND_ECC_INDEX_Pos   0
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#define ARM_NAND_ECC_INDEX_Msk   (0xFFUL << ARM_NAND_ECC_INDEX_Pos)
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#define ARM_NAND_CODE_CMD1_Pos   0
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#define ARM_NAND_CODE_CMD1_Msk   (0xFFUL << ARM_NAND_CODE_CMD1_Pos)
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#define ARM_NAND_CODE_CMD2_Pos   8
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#define ARM_NAND_CODE_CMD2_Msk   (0xFFUL << ARM_NAND_CODE_CMD2_Pos)
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#define ARM_NAND_CODE_CMD3_Pos   16
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#define ARM_NAND_CODE_CMD3_Msk   (0xFFUL << ARM_NAND_CODE_CMD3_Pos)
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#define ARM_NAND_CODE_ADDR_COL1_Pos   0
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#define ARM_NAND_CODE_ADDR_COL1_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_COL1_Pos)
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#define ARM_NAND_CODE_ADDR_COL2_Pos   8
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#define ARM_NAND_CODE_ADDR_COL2_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_COL2_Pos)
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#define ARM_NAND_CODE_ADDR_ROW1_Pos   0
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#define ARM_NAND_CODE_ADDR_ROW1_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_ROW1_Pos)
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#define ARM_NAND_CODE_ADDR_ROW2_Pos   8
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#define ARM_NAND_CODE_ADDR_ROW2_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_ROW2_Pos)
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#define ARM_NAND_CODE_ADDR_ROW3_Pos   16
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#define ARM_NAND_CODE_ADDR_ROW3_Msk   (0xFFUL << ARM_NAND_CODE_ADDR_ROW3_Pos)
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+ + + + diff --git a/docs/Driver/html/Driver__SAI_8c.html b/docs/Driver/html/Driver__SAI_8c.html new file mode 100644 index 0000000..8d5e05f --- /dev/null +++ b/docs/Driver/html/Driver__SAI_8c.html @@ -0,0 +1,171 @@ + + + + + +Driver_SAI.c File Reference +CMSIS-Driver: Driver_SAI.c File Reference + + + + + + + + + + + + + + +
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+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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    + +
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+Functions
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Driver_SAI.c File Reference
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+Functions

ARM_DRIVER_VERSION ARM_SAI_GetVersion (void)
 Get driver version. More...
 
ARM_SAI_CAPABILITIES ARM_SAI_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_SAI_Initialize (ARM_SAI_SignalEvent_t cb_event)
 Initialize SAI Interface. More...
 
int32_t ARM_SAI_Uninitialize (void)
 De-initialize SAI Interface. More...
 
int32_t ARM_SAI_PowerControl (ARM_POWER_STATE state)
 Control SAI Interface Power. More...
 
int32_t ARM_SAI_Send (const void *data, uint32_t num)
 Start sending data to SAI transmitter. More...
 
int32_t ARM_SAI_Receive (void *data, uint32_t num)
 Start receiving data from SAI receiver. More...
 
uint32_t ARM_SAI_GetTxCount (void)
 Get transmitted data count. More...
 
uint32_t ARM_SAI_GetRxCount (void)
 Get received data count. More...
 
int32_t ARM_SAI_Control (uint32_t control, uint32_t arg1, uint32_t arg2)
 Control SAI Interface. More...
 
ARM_SAI_STATUS ARM_SAI_GetStatus (void)
 Get SAI status. More...
 
void ARM_SAI_SignalEvent (uint32_t event)
 Signal SAI Events. More...
 
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+ + + + diff --git a/docs/Driver/html/Driver__SAI_8h.html b/docs/Driver/html/Driver__SAI_8h.html new file mode 100644 index 0000000..aa09ad3 --- /dev/null +++ b/docs/Driver/html/Driver__SAI_8h.html @@ -0,0 +1,813 @@ + + + + + +Driver_SAI.h File Reference +CMSIS-Driver: Driver_SAI.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs
+
+
Driver_SAI.h File Reference
+
+
+ + + + + + + + + + + +

+Data Structures

struct  ARM_SAI_STATUS
 SAI Status. More...
 
struct  ARM_SAI_CAPABILITIES
 SAI Driver Capabilities. More...
 
struct  ARM_DRIVER_SAI
 Access structure of the SAI Driver. More...
 
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+Macros

#define ARM_SAI_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */
 
#define ARM_SAI_CONTROL_Msk   (0xFFU)
 
#define ARM_SAI_CONFIGURE_TX   (0x01U)
 Configure Transmitter; arg1 and arg2 provide additional configuration. More...
 
#define ARM_SAI_CONFIGURE_RX   (0x02U)
 Configure Receiver; arg1 and arg2 provide additional configuration. More...
 
#define ARM_SAI_CONTROL_TX   (0x03U)
 Control Transmitter; arg1.0: 0=disable (default), 1=enable; arg1.1: mute. More...
 
#define ARM_SAI_CONTROL_RX   (0x04U)
 Control Receiver; arg1.0: 0=disable (default), 1=enable. More...
 
#define ARM_SAI_MASK_SLOTS_TX   (0x05U)
 Mask Transmitter slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default. More...
 
#define ARM_SAI_MASK_SLOTS_RX   (0x06U)
 Mask Receiver slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default. More...
 
#define ARM_SAI_ABORT_SEND   (0x07U)
 Abort ARM_SAI_Send. More...
 
#define ARM_SAI_ABORT_RECEIVE   (0x08U)
 Abort ARM_SAI_Receive. More...
 
#define ARM_SAI_MODE_Pos   8
 
#define ARM_SAI_MODE_Msk   (1U << ARM_SAI_MODE_Pos)
 
#define ARM_SAI_MODE_MASTER   (1U << ARM_SAI_MODE_Pos)
 Master Mode. More...
 
#define ARM_SAI_MODE_SLAVE   (0U << ARM_SAI_MODE_Pos)
 Slave Mode (default) More...
 
#define ARM_SAI_SYNCHRONIZATION_Pos   9
 
#define ARM_SAI_SYNCHRONIZATION_Msk   (1U << ARM_SAI_SYNCHRONIZATION_Pos)
 
#define ARM_SAI_ASYNCHRONOUS   (0U << ARM_SAI_SYNCHRONIZATION_Pos)
 Asynchronous (default) More...
 
#define ARM_SAI_SYNCHRONOUS   (1U << ARM_SAI_SYNCHRONIZATION_Pos)
 Synchronous. More...
 
#define ARM_SAI_PROTOCOL_Pos   10
 
#define ARM_SAI_PROTOCOL_Msk   (7U << ARM_SAI_PROTOCOL_Pos)
 
#define ARM_SAI_PROTOCOL_USER   (0U << ARM_SAI_PROTOCOL_Pos)
 User defined (default) More...
 
#define ARM_SAI_PROTOCOL_I2S   (1U << ARM_SAI_PROTOCOL_Pos)
 I2S. More...
 
#define ARM_SAI_PROTOCOL_MSB_JUSTIFIED   (2U << ARM_SAI_PROTOCOL_Pos)
 MSB (left) justified. More...
 
#define ARM_SAI_PROTOCOL_LSB_JUSTIFIED   (3U << ARM_SAI_PROTOCOL_Pos)
 LSB (right) justified. More...
 
#define ARM_SAI_PROTOCOL_PCM_SHORT   (4U << ARM_SAI_PROTOCOL_Pos)
 PCM with short frame. More...
 
#define ARM_SAI_PROTOCOL_PCM_LONG   (5U << ARM_SAI_PROTOCOL_Pos)
 PCM with long frame. More...
 
#define ARM_SAI_PROTOCOL_AC97   (6U << ARM_SAI_PROTOCOL_Pos)
 AC'97. More...
 
#define ARM_SAI_DATA_SIZE_Pos   13
 
#define ARM_SAI_DATA_SIZE_Msk   (0x1FU << ARM_SAI_DATA_SIZE_Pos)
 
#define ARM_SAI_DATA_SIZE(n)   ((((n)-1)&0x1FU) << ARM_SAI_DATA_SIZE_Pos)
 Data size in bits (8..32) More...
 
#define ARM_SAI_BIT_ORDER_Pos   18
 
#define ARM_SAI_BIT_ORDER_Msk   (1U << ARM_SAI_BIT_ORDER_Pos)
 
#define ARM_SAI_MSB_FIRST   (0U << ARM_SAI_BIT_ORDER_Pos)
 Data is transferred with MSB first (default) More...
 
#define ARM_SAI_LSB_FIRST   (1U << ARM_SAI_BIT_ORDER_Pos)
 Data is transferred with LSB first; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_MONO_MODE   (1U << 19)
 Mono Mode (only for I2S, MSB/LSB justified) More...
 
#define ARM_SAI_COMPANDING_Pos   20
 
#define ARM_SAI_COMPANDING_Msk   (3U << ARM_SAI_COMPANDING_Pos)
 
#define ARM_SAI_COMPANDING_NONE   (0U << ARM_SAI_COMPANDING_Pos)
 No compading (default) More...
 
#define ARM_SAI_COMPANDING_A_LAW   (2U << ARM_SAI_COMPANDING_Pos)
 A-Law companding. More...
 
#define ARM_SAI_COMPANDING_U_LAW   (3U << ARM_SAI_COMPANDING_Pos)
 u-Law companding More...
 
#define ARM_SAI_CLOCK_POLARITY_Pos   23
 
#define ARM_SAI_CLOCK_POLARITY_Msk   (1U << ARM_SAI_CLOCK_POLARITY_Pos)
 
#define ARM_SAI_CLOCK_POLARITY_0   (0U << ARM_SAI_CLOCK_POLARITY_Pos)
 Drive on falling edge, Capture on rising edge (default) More...
 
#define ARM_SAI_CLOCK_POLARITY_1   (1U << ARM_SAI_CLOCK_POLARITY_Pos)
 Drive on rising edge, Capture on falling edge. More...
 
#define ARM_SAI_MCLK_PIN_Pos   24
 
#define ARM_SAI_MCLK_PIN_Msk   (3U << ARM_SAI_MCLK_PIN_Pos)
 
#define ARM_SAI_MCLK_PIN_INACTIVE   (0U << ARM_SAI_MCLK_PIN_Pos)
 MCLK not used (default) More...
 
#define ARM_SAI_MCLK_PIN_OUTPUT   (1U << ARM_SAI_MCLK_PIN_Pos)
 MCLK is output (Master only) More...
 
#define ARM_SAI_MCLK_PIN_INPUT   (2U << ARM_SAI_MCLK_PIN_Pos)
 MCLK is input (Master only) More...
 
#define ARM_SAI_FRAME_LENGTH_Pos   0
 
#define ARM_SAI_FRAME_LENGTH_Msk   (0x3FFU << ARM_SAI_FRAME_LENGTH_Pos)
 
#define ARM_SAI_FRAME_LENGTH(n)   ((((n)-1)&0x3FFU) << ARM_SAI_FRAME_LENGTH_Pos)
 Frame length in bits (8..1024); default depends on protocol and data. More...
 
#define ARM_SAI_FRAME_SYNC_WIDTH_Pos   10
 
#define ARM_SAI_FRAME_SYNC_WIDTH_Msk   (0xFFU << ARM_SAI_FRAME_SYNC_WIDTH_Pos)
 
#define ARM_SAI_FRAME_SYNC_WIDTH(n)   ((((n)-1)&0xFFU) << ARM_SAI_FRAME_SYNC_WIDTH_Pos)
 Frame Sync width in bits (1..256); default=1; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_FRAME_SYNC_POLARITY_Pos   18
 
#define ARM_SAI_FRAME_SYNC_POLARITY_Msk   (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
 
#define ARM_SAI_FRAME_SYNC_POLARITY_HIGH   (0U << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
 Frame Sync is active high (default); User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_FRAME_SYNC_POLARITY_LOW   (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
 Frame Sync is active low; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_FRAME_SYNC_EARLY   (1U << 19)
 Frame Sync one bit before the first bit of the frame; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_SLOT_COUNT_Pos   20
 
#define ARM_SAI_SLOT_COUNT_Msk   (0x1FU << ARM_SAI_SLOT_COUNT_Pos)
 
#define ARM_SAI_SLOT_COUNT(n)   ((((n)-1)&0x1FU) << ARM_SAI_SLOT_COUNT_Pos)
 Number of slots in frame (1..32); default=1; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_SLOT_SIZE_Pos   25
 
#define ARM_SAI_SLOT_SIZE_Msk   (3U << ARM_SAI_SLOT_SIZE_Pos)
 
#define ARM_SAI_SLOT_SIZE_DEFAULT   (0U << ARM_SAI_SLOT_SIZE_Pos)
 Slot size is equal to data size (default) More...
 
#define ARM_SAI_SLOT_SIZE_16   (1U << ARM_SAI_SLOT_SIZE_Pos)
 Slot size = 16 bits; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_SLOT_SIZE_32   (3U << ARM_SAI_SLOT_SIZE_Pos)
 Slot size = 32 bits; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_SLOT_OFFSET_Pos   27
 
#define ARM_SAI_SLOT_OFFSET_Msk   (0x1FU << ARM_SAI_SLOT_OFFSET_Pos)
 
#define ARM_SAI_SLOT_OFFSET(n)   (((n)&0x1FU) << ARM_SAI_SLOT_OFFSET_Pos)
 Offset of first data bit in slot (0..31); default=0; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_AUDIO_FREQ_Msk   (0x0FFFFFU)
 Audio frequency mask. More...
 
#define ARM_SAI_MCLK_PRESCALER_Pos   20
 
#define ARM_SAI_MCLK_PRESCALER_Msk   (0xFFFU << ARM_SAI_MCLK_PRESCALER_Pos)
 
#define ARM_SAI_MCLK_PRESCALER(n)   ((((n)-1)&0xFFFU) << ARM_SAI_MCLK_PRESCALER_Pos)
 MCLK prescaler; Audio_frequency = MCLK/n; n = 1..4096 (default=1) More...
 
#define ARM_SAI_ERROR_SYNCHRONIZATION   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 Specified Synchronization not supported. More...
 
#define ARM_SAI_ERROR_PROTOCOL   (ARM_DRIVER_ERROR_SPECIFIC - 2)
 Specified Protocol not supported. More...
 
#define ARM_SAI_ERROR_DATA_SIZE   (ARM_DRIVER_ERROR_SPECIFIC - 3)
 Specified Data size not supported. More...
 
#define ARM_SAI_ERROR_BIT_ORDER   (ARM_DRIVER_ERROR_SPECIFIC - 4)
 Specified Bit order not supported. More...
 
#define ARM_SAI_ERROR_MONO_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 5)
 Specified Mono mode not supported. More...
 
#define ARM_SAI_ERROR_COMPANDING   (ARM_DRIVER_ERROR_SPECIFIC - 6)
 Specified Companding not supported. More...
 
#define ARM_SAI_ERROR_CLOCK_POLARITY   (ARM_DRIVER_ERROR_SPECIFIC - 7)
 Specified Clock polarity not supported. More...
 
#define ARM_SAI_ERROR_AUDIO_FREQ   (ARM_DRIVER_ERROR_SPECIFIC - 8)
 Specified Audio frequency not supported. More...
 
#define ARM_SAI_ERROR_MCLK_PIN   (ARM_DRIVER_ERROR_SPECIFIC - 9)
 Specified MCLK Pin setting not supported. More...
 
#define ARM_SAI_ERROR_MCLK_PRESCALER   (ARM_DRIVER_ERROR_SPECIFIC - 10)
 Specified MCLK Prescaler not supported. More...
 
#define ARM_SAI_ERROR_FRAME_LENGHT   (ARM_DRIVER_ERROR_SPECIFIC - 11)
 Specified Frame length not supported. More...
 
#define ARM_SAI_ERROR_FRAME_SYNC_WIDTH   (ARM_DRIVER_ERROR_SPECIFIC - 12)
 Specified Frame Sync width not supported. More...
 
#define ARM_SAI_ERROR_FRAME_SYNC_POLARITY   (ARM_DRIVER_ERROR_SPECIFIC - 13)
 Specified Frame Sync polarity not supported. More...
 
#define ARM_SAI_ERROR_FRAME_SYNC_EARLY   (ARM_DRIVER_ERROR_SPECIFIC - 14)
 Specified Frame Sync early not supported. More...
 
#define ARM_SAI_ERROR_SLOT_COUNT   (ARM_DRIVER_ERROR_SPECIFIC - 15)
 Specified Slot count not supported. More...
 
#define ARM_SAI_ERROR_SLOT_SIZE   (ARM_DRIVER_ERROR_SPECIFIC - 16)
 Specified Slot size not supported. More...
 
#define ARM_SAI_ERROR_SLOT_OFFESET   (ARM_DRIVER_ERROR_SPECIFIC - 17)
 Specified Slot offset not supported. More...
 
#define ARM_SAI_EVENT_SEND_COMPLETE   (1U << 0)
 Send completed. More...
 
#define ARM_SAI_EVENT_RECEIVE_COMPLETE   (1U << 1)
 Receive completed. More...
 
#define ARM_SAI_EVENT_TX_UNDERFLOW   (1U << 2)
 Transmit data not available. More...
 
#define ARM_SAI_EVENT_RX_OVERFLOW   (1U << 3)
 Receive data overflow. More...
 
#define ARM_SAI_EVENT_FRAME_ERROR   (1U << 4)
 Sync Frame error in Slave mode (optional) More...
 
+ + + + +

+Typedefs

typedef void(* ARM_SAI_SignalEvent_t )(uint32_t event)
 Pointer to ARM_SAI_SignalEvent : Signal SAI Event. More...
 
+

Macro Definition Documentation

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#define ARM_SAI_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */
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#define ARM_SAI_CONTROL_Msk   (0xFFU)
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#define ARM_SAI_MODE_Pos   8
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#define ARM_SAI_MODE_Msk   (1U << ARM_SAI_MODE_Pos)
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#define ARM_SAI_SYNCHRONIZATION_Pos   9
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#define ARM_SAI_SYNCHRONIZATION_Msk   (1U << ARM_SAI_SYNCHRONIZATION_Pos)
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#define ARM_SAI_PROTOCOL_Pos   10
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#define ARM_SAI_PROTOCOL_Msk   (7U << ARM_SAI_PROTOCOL_Pos)
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#define ARM_SAI_DATA_SIZE_Pos   13
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#define ARM_SAI_DATA_SIZE_Msk   (0x1FU << ARM_SAI_DATA_SIZE_Pos)
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#define ARM_SAI_BIT_ORDER_Pos   18
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#define ARM_SAI_BIT_ORDER_Msk   (1U << ARM_SAI_BIT_ORDER_Pos)
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#define ARM_SAI_COMPANDING_Pos   20
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#define ARM_SAI_COMPANDING_Msk   (3U << ARM_SAI_COMPANDING_Pos)
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#define ARM_SAI_CLOCK_POLARITY_Pos   23
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#define ARM_SAI_CLOCK_POLARITY_Msk   (1U << ARM_SAI_CLOCK_POLARITY_Pos)
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#define ARM_SAI_MCLK_PIN_Pos   24
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#define ARM_SAI_MCLK_PIN_Msk   (3U << ARM_SAI_MCLK_PIN_Pos)
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#define ARM_SAI_FRAME_LENGTH_Pos   0
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#define ARM_SAI_FRAME_LENGTH_Msk   (0x3FFU << ARM_SAI_FRAME_LENGTH_Pos)
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#define ARM_SAI_FRAME_SYNC_WIDTH_Pos   10
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#define ARM_SAI_FRAME_SYNC_WIDTH_Msk   (0xFFU << ARM_SAI_FRAME_SYNC_WIDTH_Pos)
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#define ARM_SAI_FRAME_SYNC_POLARITY_Pos   18
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#define ARM_SAI_FRAME_SYNC_POLARITY_Msk   (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
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#define ARM_SAI_SLOT_COUNT_Pos   20
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#define ARM_SAI_SLOT_COUNT_Msk   (0x1FU << ARM_SAI_SLOT_COUNT_Pos)
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#define ARM_SAI_SLOT_SIZE_Pos   25
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#define ARM_SAI_SLOT_SIZE_Msk   (3U << ARM_SAI_SLOT_SIZE_Pos)
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#define ARM_SAI_SLOT_OFFSET_Pos   27
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#define ARM_SAI_SLOT_OFFSET_Msk   (0x1FU << ARM_SAI_SLOT_OFFSET_Pos)
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#define ARM_SAI_AUDIO_FREQ_Msk   (0x0FFFFFU)
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Audio frequency mask.

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#define ARM_SAI_MCLK_PRESCALER_Pos   20
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#define ARM_SAI_MCLK_PRESCALER_Msk   (0xFFFU << ARM_SAI_MCLK_PRESCALER_Pos)
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+ + + + diff --git a/docs/Driver/html/Driver__SPI_8c.html b/docs/Driver/html/Driver__SPI_8c.html new file mode 100644 index 0000000..d5e51cf --- /dev/null +++ b/docs/Driver/html/Driver__SPI_8c.html @@ -0,0 +1,171 @@ + + + + + +Driver_SPI.c File Reference +CMSIS-Driver: Driver_SPI.c File Reference + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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+Functions
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Driver_SPI.c File Reference
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+Functions

ARM_DRIVER_VERSION ARM_SPI_GetVersion (void)
 Get driver version. More...
 
ARM_SPI_CAPABILITIES ARM_SPI_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_SPI_Initialize (ARM_SPI_SignalEvent_t cb_event)
 Initialize SPI Interface. More...
 
int32_t ARM_SPI_Uninitialize (void)
 De-initialize SPI Interface. More...
 
int32_t ARM_SPI_PowerControl (ARM_POWER_STATE state)
 Control SPI Interface Power. More...
 
int32_t ARM_SPI_Send (const void *data, uint32_t num)
 Start sending data to SPI transmitter. More...
 
int32_t ARM_SPI_Receive (void *data, uint32_t num)
 Start receiving data from SPI receiver. More...
 
int32_t ARM_SPI_Transfer (const void *data_out, void *data_in, uint32_t num)
 Start sending/receiving data to/from SPI transmitter/receiver. More...
 
uint32_t ARM_SPI_GetDataCount (void)
 Get transferred data count. More...
 
int32_t ARM_SPI_Control (uint32_t control, uint32_t arg)
 Control SPI Interface. More...
 
ARM_SPI_STATUS ARM_SPI_GetStatus (void)
 Get SPI status. More...
 
void ARM_SPI_SignalEvent (uint32_t event)
 Signal SPI Events. More...
 
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+ + + + diff --git a/docs/Driver/html/Driver__SPI_8h.html b/docs/Driver/html/Driver__SPI_8h.html new file mode 100644 index 0000000..52405ad --- /dev/null +++ b/docs/Driver/html/Driver__SPI_8h.html @@ -0,0 +1,471 @@ + + + + + +Driver_SPI.h File Reference +CMSIS-Driver: Driver_SPI.h File Reference + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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+Data Structures | +Macros | +Typedefs
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Driver_SPI.h File Reference
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+Data Structures

struct  ARM_SPI_STATUS
 SPI Status. More...
 
struct  ARM_SPI_CAPABILITIES
 SPI Driver Capabilities. More...
 
struct  ARM_DRIVER_SPI
 Access structure of the SPI Driver. More...
 
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+Macros

#define ARM_SPI_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */
 
#define ARM_SPI_CONTROL_Pos   0
 
#define ARM_SPI_CONTROL_Msk   (0xFFUL << ARM_SPI_CONTROL_Pos)
 
#define ARM_SPI_MODE_INACTIVE   (0x00UL << ARM_SPI_CONTROL_Pos)
 SPI Inactive. More...
 
#define ARM_SPI_MODE_MASTER   (0x01UL << ARM_SPI_CONTROL_Pos)
 SPI Master (Output on MOSI, Input on MISO); arg = Bus Speed in bps. More...
 
#define ARM_SPI_MODE_SLAVE   (0x02UL << ARM_SPI_CONTROL_Pos)
 SPI Slave (Output on MISO, Input on MOSI) More...
 
#define ARM_SPI_MODE_MASTER_SIMPLEX   (0x03UL << ARM_SPI_CONTROL_Pos)
 SPI Master (Output/Input on MOSI); arg = Bus Speed in bps. More...
 
#define ARM_SPI_MODE_SLAVE_SIMPLEX   (0x04UL << ARM_SPI_CONTROL_Pos)
 SPI Slave (Output/Input on MISO) More...
 
#define ARM_SPI_FRAME_FORMAT_Pos   8
 
#define ARM_SPI_FRAME_FORMAT_Msk   (7UL << ARM_SPI_FRAME_FORMAT_Pos)
 
#define ARM_SPI_CPOL0_CPHA0   (0UL << ARM_SPI_FRAME_FORMAT_Pos)
 Clock Polarity 0, Clock Phase 0 (default) More...
 
#define ARM_SPI_CPOL0_CPHA1   (1UL << ARM_SPI_FRAME_FORMAT_Pos)
 Clock Polarity 0, Clock Phase 1. More...
 
#define ARM_SPI_CPOL1_CPHA0   (2UL << ARM_SPI_FRAME_FORMAT_Pos)
 Clock Polarity 1, Clock Phase 0. More...
 
#define ARM_SPI_CPOL1_CPHA1   (3UL << ARM_SPI_FRAME_FORMAT_Pos)
 Clock Polarity 1, Clock Phase 1. More...
 
#define ARM_SPI_TI_SSI   (4UL << ARM_SPI_FRAME_FORMAT_Pos)
 Texas Instruments Frame Format. More...
 
#define ARM_SPI_MICROWIRE   (5UL << ARM_SPI_FRAME_FORMAT_Pos)
 National Microwire Frame Format. More...
 
#define ARM_SPI_DATA_BITS_Pos   12
 
#define ARM_SPI_DATA_BITS_Msk   (0x3FUL << ARM_SPI_DATA_BITS_Pos)
 
#define ARM_SPI_DATA_BITS(n)   (((n) & 0x3F) << ARM_SPI_DATA_BITS_Pos)
 Number of Data bits. More...
 
#define ARM_SPI_BIT_ORDER_Pos   18
 
#define ARM_SPI_BIT_ORDER_Msk   (1UL << ARM_SPI_BIT_ORDER_Pos)
 
#define ARM_SPI_MSB_LSB   (0UL << ARM_SPI_BIT_ORDER_Pos)
 SPI Bit order from MSB to LSB (default) More...
 
#define ARM_SPI_LSB_MSB   (1UL << ARM_SPI_BIT_ORDER_Pos)
 SPI Bit order from LSB to MSB. More...
 
#define ARM_SPI_SS_MASTER_MODE_Pos   19
 
#define ARM_SPI_SS_MASTER_MODE_Msk   (3UL << ARM_SPI_SS_MASTER_MODE_Pos)
 
#define ARM_SPI_SS_MASTER_UNUSED   (0UL << ARM_SPI_SS_MASTER_MODE_Pos)
 SPI Slave Select when Master: Not used (default) More...
 
#define ARM_SPI_SS_MASTER_SW   (1UL << ARM_SPI_SS_MASTER_MODE_Pos)
 SPI Slave Select when Master: Software controlled. More...
 
#define ARM_SPI_SS_MASTER_HW_OUTPUT   (2UL << ARM_SPI_SS_MASTER_MODE_Pos)
 SPI Slave Select when Master: Hardware controlled Output. More...
 
#define ARM_SPI_SS_MASTER_HW_INPUT   (3UL << ARM_SPI_SS_MASTER_MODE_Pos)
 SPI Slave Select when Master: Hardware monitored Input. More...
 
#define ARM_SPI_SS_SLAVE_MODE_Pos   21
 
#define ARM_SPI_SS_SLAVE_MODE_Msk   (1UL << ARM_SPI_SS_SLAVE_MODE_Pos)
 
#define ARM_SPI_SS_SLAVE_HW   (0UL << ARM_SPI_SS_SLAVE_MODE_Pos)
 SPI Slave Select when Slave: Hardware monitored (default) More...
 
#define ARM_SPI_SS_SLAVE_SW   (1UL << ARM_SPI_SS_SLAVE_MODE_Pos)
 SPI Slave Select when Slave: Software controlled. More...
 
#define ARM_SPI_SET_BUS_SPEED   (0x10UL << ARM_SPI_CONTROL_Pos)
 Set Bus Speed in bps; arg = value. More...
 
#define ARM_SPI_GET_BUS_SPEED   (0x11UL << ARM_SPI_CONTROL_Pos)
 Get Bus Speed in bps. More...
 
#define ARM_SPI_SET_DEFAULT_TX_VALUE   (0x12UL << ARM_SPI_CONTROL_Pos)
 Set default Transmit value; arg = value. More...
 
#define ARM_SPI_CONTROL_SS   (0x13UL << ARM_SPI_CONTROL_Pos)
 Control Slave Select; arg: 0=inactive, 1=active. More...
 
#define ARM_SPI_ABORT_TRANSFER   (0x14UL << ARM_SPI_CONTROL_Pos)
 Abort current data transfer. More...
 
#define ARM_SPI_SS_INACTIVE   0
 SPI Slave Select Signal Inactive. More...
 
#define ARM_SPI_SS_ACTIVE   1
 SPI Slave Select Signal Active. More...
 
#define ARM_SPI_ERROR_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 Specified Mode not supported. More...
 
#define ARM_SPI_ERROR_FRAME_FORMAT   (ARM_DRIVER_ERROR_SPECIFIC - 2)
 Specified Frame Format not supported. More...
 
#define ARM_SPI_ERROR_DATA_BITS   (ARM_DRIVER_ERROR_SPECIFIC - 3)
 Specified number of Data bits not supported. More...
 
#define ARM_SPI_ERROR_BIT_ORDER   (ARM_DRIVER_ERROR_SPECIFIC - 4)
 Specified Bit order not supported. More...
 
#define ARM_SPI_ERROR_SS_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 5)
 Specified Slave Select Mode not supported. More...
 
#define ARM_SPI_EVENT_TRANSFER_COMPLETE   (1UL << 0)
 Data Transfer completed. More...
 
#define ARM_SPI_EVENT_DATA_LOST   (1UL << 1)
 Data lost: Receive overflow / Transmit underflow. More...
 
#define ARM_SPI_EVENT_MODE_FAULT   (1UL << 2)
 Master Mode Fault (SS deactivated when Master) More...
 
+ + + + +

+Typedefs

typedef void(* ARM_SPI_SignalEvent_t )(uint32_t event)
 Pointer to ARM_SPI_SignalEvent : Signal SPI Event. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SPI_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_CONTROL_Pos   0
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_CONTROL_Msk   (0xFFUL << ARM_SPI_CONTROL_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_FRAME_FORMAT_Pos   8
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_FRAME_FORMAT_Msk   (7UL << ARM_SPI_FRAME_FORMAT_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_DATA_BITS_Pos   12
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_DATA_BITS_Msk   (0x3FUL << ARM_SPI_DATA_BITS_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_BIT_ORDER_Pos   18
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_BIT_ORDER_Msk   (1UL << ARM_SPI_BIT_ORDER_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_MASTER_MODE_Pos   19
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_MASTER_MODE_Msk   (3UL << ARM_SPI_SS_MASTER_MODE_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_SLAVE_MODE_Pos   21
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_SLAVE_MODE_Msk   (1UL << ARM_SPI_SS_SLAVE_MODE_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_INACTIVE   0
+
+ +

SPI Slave Select Signal Inactive.

+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_ACTIVE   1
+
+ +

SPI Slave Select Signal Active.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__Storage_8c.html b/docs/Driver/html/Driver__Storage_8c.html new file mode 100644 index 0000000..696b4d1 --- /dev/null +++ b/docs/Driver/html/Driver__Storage_8c.html @@ -0,0 +1,177 @@ + + + + + +Driver_Storage.c File Reference +CMSIS-Driver: Driver_Storage.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_Storage.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_Storage_GetVersion (void)
 Get driver version. More...
 
ARM_STOR_CAPABILITIES ARM_Storage_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_Storage_Initialize (ARM_Storage_Callback_t callback)
 Initialize the Storage interface. More...
 
int32_t ARM_Storage_Uninitialize (void)
 De-initialize the Storage Interface. More...
 
int32_t ARM_Storage_PowerControl (ARM_POWER_STATE state)
 Control the Storage interface power. More...
 
int32_t ARM_Storage_ReadData (uint64_t addr, void *data, uint32_t size)
 Read data from Storage. More...
 
int32_t ARM_Storage_ProgramData (uint64_t addr, const void *data, uint32_t size)
 Program data to Storage. More...
 
int32_t ARM_Storage_Erase (uint64_t addr, uint32_t size)
 Erase Storage range. More...
 
int32_t ARM_Storage_EraseAll (void)
 Erase complete Storage. More...
 
ARM_Storage_STATUS ARM_Storage_GetStatus (void)
 Get Storage status. More...
 
int32_t ARM_Storage_GetInfo (ARM_STORAGE_INFO *info)
 Get Storage information. More...
 
uint32_t ARM_Storage_ResolveAddress (uint64_t addr)
 Resolve an address relative to the storage controller into a memory address. More...
 
int32_t ARM_Storage_GetNextBlock (const ARM_STORAGE_BLOCK *prev_block, ARM_STORAGE_BLOCK *next_block)
 Advance to the successor of the current block (iterator). More...
 
int32_t ARM_Storage_GetBlock (uint64_t addr, ARM_STORAGE_BLOCK *block)
 Find the storage block (iterator) encompassing a given storage address. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__Storage_8h.html b/docs/Driver/html/Driver__Storage_8h.html new file mode 100644 index 0000000..9da2db5 --- /dev/null +++ b/docs/Driver/html/Driver__Storage_8h.html @@ -0,0 +1,602 @@ + + + + + +Driver_Storage.h File Reference +CMSIS-Driver: Driver_Storage.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs | +Enumerations
+
+
Driver_Storage.h File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + +

+Data Structures

struct  ARM_STORAGE_BLOCK_ATTRIBUTES
 Attributes of the storage range within a storage block. More...
 
struct  ARM_STORAGE_BLOCK
 A storage block is a range of memory with uniform attributes. More...
 
struct  ARM_STORAGE_SECURITY_FEATURES
 
struct  ARM_STORAGE_INFO
 
struct  ARM_STORAGE_STATUS
 Operating status of the storage controller. More...
 
struct  ARM_STORAGE_CAPABILITIES
 Storage Driver API Capabilities. More...
 
struct  ARM_DRIVER_STORAGE
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_STORAGE_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */
 
#define _ARM_Driver_Storage_(n)   Driver_Storage##n
 
#define ARM_Driver_Storage_(n)   _ARM_Driver_Storage_(n)
 
#define ARM_STORAGE_INVALID_OFFSET   (0xFFFFFFFFFFFFFFFFULL)
 Invalid address (relative to a storage controller's address space). A storage block may never start at this address. More...
 
#define ARM_STORAGE_INVALID_ADDRESS   (0xFFFFFFFFUL)
 Invalid address within the processor's memory address space. Refer to memory-mapped storage, i.e. ARM_DRIVER_STORAGE::ResolveAddress(). More...
 
#define ARM_STORAGE_ERROR_NOT_ERASABLE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 Part (or all) of the range provided to Erase() isn't erasable. More...
 
#define ARM_STORAGE_ERROR_NOT_PROGRAMMABLE   (ARM_DRIVER_ERROR_SPECIFIC - 2)
 Part (or all) of the range provided to ProgramData() isn't programmable. More...
 
#define ARM_STORAGE_ERROR_PROTECTED   (ARM_DRIVER_ERROR_SPECIFIC - 3)
 Part (or all) of the range to Erase() or ProgramData() is protected. More...
 
#define ARM_STORAGE_VALID_BLOCK(BLK)   (((BLK)->addr != ARM_STORAGE_INVALID_OFFSET) && ((BLK)->size != 0))
 
#define ARM_STORAGE_PROGRAMMABILITY_RAM   (0x0)
 Values for encoding storage memory-types with respect to programmability. More...
 
#define ARM_STORAGE_PROGRAMMABILITY_ROM   (0x1)
 Read-only memory. More...
 
#define ARM_STORAGE_PROGRAMMABILITY_WORM   (0x2)
 write-once-read-only-memory (WORM). More...
 
#define ARM_STORAGE_PROGRAMMABILITY_ERASABLE   (0x3)
 re-programmable based on erase. Supports multiple writes. More...
 
#define ARM_RETENTION_WHILE_DEVICE_ACTIVE   (0x0)
 Data is retained only during device activity. More...
 
#define ARM_RETENTION_ACROSS_SLEEP   (0x1)
 Data is retained across processor sleep. More...
 
#define ARM_RETENTION_ACROSS_DEEP_SLEEP   (0x2)
 Data is retained across processor deep-sleep. More...
 
#define ARM_RETENTION_BATTERY_BACKED   (0x3)
 Data is battery-backed. Device can be powered off. More...
 
#define ARM_RETENTION_NVM   (0x4)
 Data is retained in non-volatile memory. More...
 
#define ARM_STORAGE_PROGRAM_CYCLES_INFINITE   (0UL)
 
+ + + +

+Typedefs

typedef void(* ARM_Storage_Callback_t )(int32_t status, ARM_STORAGE_OPERATION operation)
 
+ + + +

+Enumerations

enum  ARM_STORAGE_OPERATION {
+  ARM_STORAGE_OPERATION_GET_VERSION, +
+  ARM_STORAGE_OPERATION_GET_CAPABILITIES, +
+  ARM_STORAGE_OPERATION_INITIALIZE, +
+  ARM_STORAGE_OPERATION_UNINITIALIZE, +
+  ARM_STORAGE_OPERATION_POWER_CONTROL, +
+  ARM_STORAGE_OPERATION_READ_DATA, +
+  ARM_STORAGE_OPERATION_PROGRAM_DATA, +
+  ARM_STORAGE_OPERATION_ERASE, +
+  ARM_STORAGE_OPERATION_ERASE_ALL, +
+  ARM_STORAGE_OPERATION_GET_STATUS, +
+  ARM_STORAGE_OPERATION_GET_INFO, +
+  ARM_STORAGE_OPERATION_RESOLVE_ADDRESS, +
+  ARM_STORAGE_OPERATION_GET_NEXT_BLOCK, +
+  ARM_STORAGE_OPERATION_GET_BLOCK +
+ }
 
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_STORAGE_SECURITY_FEATURES
+
+

Device Data Security Protection Features. Applicable mostly to EXTERNAL_NVM.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +acls: 1 +Protection against internal software attacks using ACLs.
+uint32_t +rollback_protection: 1 +Roll-back protection. Set to true if the creator of the storage can ensure that an external attacker can't force an older firmware to run or to revert back to a previous state.
+uint32_t +tamper_proof: 1 +Tamper-proof memory (will be deleted on tamper-attempts using board level or chip level sensors).
+uint32_t +internal_flash: 1 +Internal flash.
+uint32_t +reserved1: 12 +
+uint32_t +software_attacks: 1 +device software (malware running on the device).

Encode support for hardening against various classes of attacks.

+
+uint32_t +board_level_attacks: 1 +board level attacks (debug probes, copy protection fuses.)
+uint32_t +chip_level_attacks: 1 +chip level attacks (tamper-protection).
+uint32_t +side_channel_attacks: 1 +side channel attacks.
+uint32_t +reserved2: 12 +
+ +
+
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_STORAGE_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */
+
+ +
+
+ +
+
+ + + + + + + + +
#define _ARM_Driver_Storage_( n)   Driver_Storage##n
+
+ +
+
+ +
+
+ + + + + + + + +
#define ARM_Driver_Storage_( n)   _ARM_Driver_Storage_(n)
+
+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_INVALID_OFFSET   (0xFFFFFFFFFFFFFFFFULL)
+
+ +

Invalid address (relative to a storage controller's address space). A storage block may never start at this address.

+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_INVALID_ADDRESS   (0xFFFFFFFFUL)
+
+ +

Invalid address within the processor's memory address space. Refer to memory-mapped storage, i.e. ARM_DRIVER_STORAGE::ResolveAddress().

+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_ERROR_NOT_ERASABLE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
+
+ +

Part (or all) of the range provided to Erase() isn't erasable.

+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_ERROR_NOT_PROGRAMMABLE   (ARM_DRIVER_ERROR_SPECIFIC - 2)
+
+ +

Part (or all) of the range provided to ProgramData() isn't programmable.

+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_ERROR_PROTECTED   (ARM_DRIVER_ERROR_SPECIFIC - 3)
+
+ +

Part (or all) of the range to Erase() or ProgramData() is protected.

+ +
+
+ +
+
+ + + + + + + + +
#define ARM_STORAGE_VALID_BLOCK( BLK)   (((BLK)->addr != ARM_STORAGE_INVALID_OFFSET) && ((BLK)->size != 0))
+
+

The check for a valid ARM_STORAGE_BLOCK.

+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_PROGRAMMABILITY_RAM   (0x0)
+
+ +

Values for encoding storage memory-types with respect to programmability.

+

Please ensure that the maximum of the following memory types doesn't exceed 16; we encode this in a 4-bit field within ARM_STORAGE_INFO::programmability.

+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_PROGRAMMABILITY_ROM   (0x1)
+
+ +

Read-only memory.

+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_PROGRAMMABILITY_WORM   (0x2)
+
+ +

write-once-read-only-memory (WORM).

+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_PROGRAMMABILITY_ERASABLE   (0x3)
+
+ +

re-programmable based on erase. Supports multiple writes.

+ +
+
+ +
+
+ + + + +
#define ARM_RETENTION_WHILE_DEVICE_ACTIVE   (0x0)
+
+ +

Data is retained only during device activity.

+

Values for encoding data-retention levels for storage blocks.

+

Please ensure that the maximum of the following retention types doesn't exceed 16; we encode this in a 4-bit field within ARM_STORAGE_INFO::retention_level.

+ +
+
+ +
+
+ + + + +
#define ARM_RETENTION_ACROSS_SLEEP   (0x1)
+
+ +

Data is retained across processor sleep.

+ +
+
+ +
+
+ + + + +
#define ARM_RETENTION_ACROSS_DEEP_SLEEP   (0x2)
+
+ +

Data is retained across processor deep-sleep.

+ +
+
+ +
+
+ + + + +
#define ARM_RETENTION_BATTERY_BACKED   (0x3)
+
+ +

Data is battery-backed. Device can be powered off.

+ +
+
+ +
+
+ + + + +
#define ARM_RETENTION_NVM   (0x4)
+
+ +

Data is retained in non-volatile memory.

+ +
+
+ +
+
+ + + + +
#define ARM_STORAGE_PROGRAM_CYCLES_INFINITE   (0UL)
+
+

Infinite or unknown endurance for reprogramming.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__Storage_8h_structARM__STORAGE__SECURITY__FEATURES.js b/docs/Driver/html/Driver__Storage_8h_structARM__STORAGE__SECURITY__FEATURES.js new file mode 100644 index 0000000..9bf4bb5 --- /dev/null +++ b/docs/Driver/html/Driver__Storage_8h_structARM__STORAGE__SECURITY__FEATURES.js @@ -0,0 +1,13 @@ +var Driver__Storage_8h_structARM__STORAGE__SECURITY__FEATURES = +[ + [ "acls", "Driver__Storage_8h.html#abbd64eb8edcf2263db5c8ac140dc0448", null ], + [ "rollback_protection", "Driver__Storage_8h.html#affe0253b35f41c44ea06ae1e87d91012", null ], + [ "tamper_proof", "Driver__Storage_8h.html#ac6f64a064cb84e29a631706586d6000c", null ], + [ "internal_flash", "Driver__Storage_8h.html#a47dd9737459c9c5ce48f3e8a04995b9a", null ], + [ "reserved1", "Driver__Storage_8h.html#aef9bb556c1530f5d648fd57e73b9a105", null ], + [ "software_attacks", "Driver__Storage_8h.html#a1b6a0329dd65f25a0ab22496ab708306", null ], + [ "board_level_attacks", "Driver__Storage_8h.html#a3981b8fafe1520f11518f2b6e12ef644", null ], + [ "chip_level_attacks", "Driver__Storage_8h.html#a19a70a7636956745f75a1f1bbb9cc478", null ], + [ "side_channel_attacks", "Driver__Storage_8h.html#acd90f369373d7551174a981c4083fef1", null ], + [ "reserved2", "Driver__Storage_8h.html#ae673672452e4741c4ab7c174af880a87", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/Driver__USART_8c.html b/docs/Driver/html/Driver__USART_8c.html new file mode 100644 index 0000000..c2cdf82 --- /dev/null +++ b/docs/Driver/html/Driver__USART_8c.html @@ -0,0 +1,180 @@ + + + + + +Driver_USART.c File Reference +CMSIS-Driver: Driver_USART.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_USART.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_USART_GetVersion (void)
 Get driver version. More...
 
ARM_USART_CAPABILITIES ARM_USART_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_USART_Initialize (ARM_USART_SignalEvent_t cb_event)
 Initialize USART Interface. More...
 
int32_t ARM_USART_Uninitialize (void)
 De-initialize USART Interface. More...
 
int32_t ARM_USART_PowerControl (ARM_POWER_STATE state)
 Control USART Interface Power. More...
 
int32_t ARM_USART_Send (const void *data, uint32_t num)
 Start sending data to USART transmitter. More...
 
int32_t ARM_USART_Receive (void *data, uint32_t num)
 Start receiving data from USART receiver. More...
 
int32_t ARM_USART_Transfer (const void *data_out, void *data_in, uint32_t num)
 Start sending/receiving data to/from USART transmitter/receiver. More...
 
uint32_t ARM_USART_GetTxCount (void)
 Get transmitted data count. More...
 
uint32_t ARM_USART_GetRxCount (void)
 Get received data count. More...
 
int32_t ARM_USART_Control (uint32_t control, uint32_t arg)
 Control USART Interface. More...
 
ARM_USART_STATUS ARM_USART_GetStatus (void)
 Get USART status. More...
 
int32_t ARM_USART_SetModemControl (ARM_USART_MODEM_CONTROL control)
 Set USART Modem Control line state. More...
 
ARM_USART_MODEM_STATUS ARM_USART_GetModemStatus (void)
 Get USART Modem Status lines state. More...
 
void ARM_USART_SignalEvent (uint32_t event)
 Signal USART Events. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__USART_8h.html b/docs/Driver/html/Driver__USART_8h.html new file mode 100644 index 0000000..ebad428 --- /dev/null +++ b/docs/Driver/html/Driver__USART_8h.html @@ -0,0 +1,562 @@ + + + + + +Driver_USART.h File Reference +CMSIS-Driver: Driver_USART.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs | +Enumerations
+
+
Driver_USART.h File Reference
+
+
+ + + + + + + + + + + + + + +

+Data Structures

struct  ARM_USART_STATUS
 USART Status. More...
 
struct  ARM_USART_MODEM_STATUS
 USART Modem Status. More...
 
struct  ARM_USART_CAPABILITIES
 USART Device Driver Capabilities. More...
 
struct  ARM_DRIVER_USART
 Access structure of the USART Driver. More...
 
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+Macros

#define ARM_USART_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */
 
#define ARM_USART_CONTROL_Pos   0
 
#define ARM_USART_CONTROL_Msk   (0xFFUL << ARM_USART_CONTROL_Pos)
 
#define ARM_USART_MODE_ASYNCHRONOUS   (0x01UL << ARM_USART_CONTROL_Pos)
 UART (Asynchronous); arg = Baudrate. More...
 
#define ARM_USART_MODE_SYNCHRONOUS_MASTER   (0x02UL << ARM_USART_CONTROL_Pos)
 Synchronous Master (generates clock signal); arg = Baudrate. More...
 
#define ARM_USART_MODE_SYNCHRONOUS_SLAVE   (0x03UL << ARM_USART_CONTROL_Pos)
 Synchronous Slave (external clock signal) More...
 
#define ARM_USART_MODE_SINGLE_WIRE   (0x04UL << ARM_USART_CONTROL_Pos)
 UART Single-wire (half-duplex); arg = Baudrate. More...
 
#define ARM_USART_MODE_IRDA   (0x05UL << ARM_USART_CONTROL_Pos)
 UART IrDA; arg = Baudrate. More...
 
#define ARM_USART_MODE_SMART_CARD   (0x06UL << ARM_USART_CONTROL_Pos)
 UART Smart Card; arg = Baudrate. More...
 
#define ARM_USART_DATA_BITS_Pos   8
 
#define ARM_USART_DATA_BITS_Msk   (7UL << ARM_USART_DATA_BITS_Pos)
 
#define ARM_USART_DATA_BITS_5   (5UL << ARM_USART_DATA_BITS_Pos)
 5 Data bits More...
 
#define ARM_USART_DATA_BITS_6   (6UL << ARM_USART_DATA_BITS_Pos)
 6 Data bit More...
 
#define ARM_USART_DATA_BITS_7   (7UL << ARM_USART_DATA_BITS_Pos)
 7 Data bits More...
 
#define ARM_USART_DATA_BITS_8   (0UL << ARM_USART_DATA_BITS_Pos)
 8 Data bits (default) More...
 
#define ARM_USART_DATA_BITS_9   (1UL << ARM_USART_DATA_BITS_Pos)
 9 Data bits More...
 
#define ARM_USART_PARITY_Pos   12
 
#define ARM_USART_PARITY_Msk   (3UL << ARM_USART_PARITY_Pos)
 
#define ARM_USART_PARITY_NONE   (0UL << ARM_USART_PARITY_Pos)
 No Parity (default) More...
 
#define ARM_USART_PARITY_EVEN   (1UL << ARM_USART_PARITY_Pos)
 Even Parity. More...
 
#define ARM_USART_PARITY_ODD   (2UL << ARM_USART_PARITY_Pos)
 Odd Parity. More...
 
#define ARM_USART_STOP_BITS_Pos   14
 
#define ARM_USART_STOP_BITS_Msk   (3UL << ARM_USART_STOP_BITS_Pos)
 
#define ARM_USART_STOP_BITS_1   (0UL << ARM_USART_STOP_BITS_Pos)
 1 Stop bit (default) More...
 
#define ARM_USART_STOP_BITS_2   (1UL << ARM_USART_STOP_BITS_Pos)
 2 Stop bits More...
 
#define ARM_USART_STOP_BITS_1_5   (2UL << ARM_USART_STOP_BITS_Pos)
 1.5 Stop bits More...
 
#define ARM_USART_STOP_BITS_0_5   (3UL << ARM_USART_STOP_BITS_Pos)
 0.5 Stop bits More...
 
#define ARM_USART_FLOW_CONTROL_Pos   16
 
#define ARM_USART_FLOW_CONTROL_Msk   (3UL << ARM_USART_FLOW_CONTROL_Pos)
 
#define ARM_USART_FLOW_CONTROL_NONE   (0UL << ARM_USART_FLOW_CONTROL_Pos)
 No Flow Control (default) More...
 
#define ARM_USART_FLOW_CONTROL_RTS   (1UL << ARM_USART_FLOW_CONTROL_Pos)
 RTS Flow Control. More...
 
#define ARM_USART_FLOW_CONTROL_CTS   (2UL << ARM_USART_FLOW_CONTROL_Pos)
 CTS Flow Control. More...
 
#define ARM_USART_FLOW_CONTROL_RTS_CTS   (3UL << ARM_USART_FLOW_CONTROL_Pos)
 RTS/CTS Flow Control. More...
 
#define ARM_USART_CPOL_Pos   18
 
#define ARM_USART_CPOL_Msk   (1UL << ARM_USART_CPOL_Pos)
 
#define ARM_USART_CPOL0   (0UL << ARM_USART_CPOL_Pos)
 CPOL = 0 (default) More...
 
#define ARM_USART_CPOL1   (1UL << ARM_USART_CPOL_Pos)
 CPOL = 1. More...
 
#define ARM_USART_CPHA_Pos   19
 
#define ARM_USART_CPHA_Msk   (1UL << ARM_USART_CPHA_Pos)
 
#define ARM_USART_CPHA0   (0UL << ARM_USART_CPHA_Pos)
 CPHA = 0 (default) More...
 
#define ARM_USART_CPHA1   (1UL << ARM_USART_CPHA_Pos)
 CPHA = 1. More...
 
#define ARM_USART_SET_DEFAULT_TX_VALUE   (0x10UL << ARM_USART_CONTROL_Pos)
 Set default Transmit value (Synchronous Receive only); arg = value. More...
 
#define ARM_USART_SET_IRDA_PULSE   (0x11UL << ARM_USART_CONTROL_Pos)
 Set IrDA Pulse in ns; arg: 0=3/16 of bit period. More...
 
#define ARM_USART_SET_SMART_CARD_GUARD_TIME   (0x12UL << ARM_USART_CONTROL_Pos)
 Set Smart Card Guard Time; arg = number of bit periods. More...
 
#define ARM_USART_SET_SMART_CARD_CLOCK   (0x13UL << ARM_USART_CONTROL_Pos)
 Set Smart Card Clock in Hz; arg: 0=Clock not generated. More...
 
#define ARM_USART_CONTROL_SMART_CARD_NACK   (0x14UL << ARM_USART_CONTROL_Pos)
 Smart Card NACK generation; arg: 0=disabled, 1=enabled. More...
 
#define ARM_USART_CONTROL_TX   (0x15UL << ARM_USART_CONTROL_Pos)
 Transmitter; arg: 0=disabled, 1=enabled. More...
 
#define ARM_USART_CONTROL_RX   (0x16UL << ARM_USART_CONTROL_Pos)
 Receiver; arg: 0=disabled, 1=enabled. More...
 
#define ARM_USART_CONTROL_BREAK   (0x17UL << ARM_USART_CONTROL_Pos)
 Continuous Break transmission; arg: 0=disabled, 1=enabled. More...
 
#define ARM_USART_ABORT_SEND   (0x18UL << ARM_USART_CONTROL_Pos)
 Abort ARM_USART_Send. More...
 
#define ARM_USART_ABORT_RECEIVE   (0x19UL << ARM_USART_CONTROL_Pos)
 Abort ARM_USART_Receive. More...
 
#define ARM_USART_ABORT_TRANSFER   (0x1AUL << ARM_USART_CONTROL_Pos)
 Abort ARM_USART_Transfer. More...
 
#define ARM_USART_ERROR_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 Specified Mode not supported. More...
 
#define ARM_USART_ERROR_BAUDRATE   (ARM_DRIVER_ERROR_SPECIFIC - 2)
 Specified baudrate not supported. More...
 
#define ARM_USART_ERROR_DATA_BITS   (ARM_DRIVER_ERROR_SPECIFIC - 3)
 Specified number of Data bits not supported. More...
 
#define ARM_USART_ERROR_PARITY   (ARM_DRIVER_ERROR_SPECIFIC - 4)
 Specified Parity not supported. More...
 
#define ARM_USART_ERROR_STOP_BITS   (ARM_DRIVER_ERROR_SPECIFIC - 5)
 Specified number of Stop bits not supported. More...
 
#define ARM_USART_ERROR_FLOW_CONTROL   (ARM_DRIVER_ERROR_SPECIFIC - 6)
 Specified Flow Control not supported. More...
 
#define ARM_USART_ERROR_CPOL   (ARM_DRIVER_ERROR_SPECIFIC - 7)
 Specified Clock Polarity not supported. More...
 
#define ARM_USART_ERROR_CPHA   (ARM_DRIVER_ERROR_SPECIFIC - 8)
 Specified Clock Phase not supported. More...
 
#define ARM_USART_EVENT_SEND_COMPLETE   (1UL << 0)
 Send completed; however USART may still transmit data. More...
 
#define ARM_USART_EVENT_RECEIVE_COMPLETE   (1UL << 1)
 Receive completed. More...
 
#define ARM_USART_EVENT_TRANSFER_COMPLETE   (1UL << 2)
 Transfer completed. More...
 
#define ARM_USART_EVENT_TX_COMPLETE   (1UL << 3)
 Transmit completed (optional) More...
 
#define ARM_USART_EVENT_TX_UNDERFLOW   (1UL << 4)
 Transmit data not available (Synchronous Slave) More...
 
#define ARM_USART_EVENT_RX_OVERFLOW   (1UL << 5)
 Receive data overflow. More...
 
#define ARM_USART_EVENT_RX_TIMEOUT   (1UL << 6)
 Receive character timeout (optional) More...
 
#define ARM_USART_EVENT_RX_BREAK   (1UL << 7)
 Break detected on receive. More...
 
#define ARM_USART_EVENT_RX_FRAMING_ERROR   (1UL << 8)
 Framing error detected on receive. More...
 
#define ARM_USART_EVENT_RX_PARITY_ERROR   (1UL << 9)
 Parity error detected on receive. More...
 
#define ARM_USART_EVENT_CTS   (1UL << 10)
 CTS state changed (optional) More...
 
#define ARM_USART_EVENT_DSR   (1UL << 11)
 DSR state changed (optional) More...
 
#define ARM_USART_EVENT_DCD   (1UL << 12)
 DCD state changed (optional) More...
 
#define ARM_USART_EVENT_RI   (1UL << 13)
 RI state changed (optional) More...
 
+ + + + +

+Typedefs

typedef void(* ARM_USART_SignalEvent_t )(uint32_t event)
 Pointer to ARM_USART_SignalEvent : Signal USART Event. More...
 
+ + + + +

+Enumerations

enum  ARM_USART_MODEM_CONTROL {
+  ARM_USART_RTS_CLEAR, +
+  ARM_USART_RTS_SET, +
+  ARM_USART_DTR_CLEAR, +
+  ARM_USART_DTR_SET +
+ }
 USART Modem Control. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,3) /* API version */
+
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CONTROL_Pos   0
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+ +
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+ +
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+ + + + +
#define ARM_USART_CONTROL_Msk   (0xFFUL << ARM_USART_CONTROL_Pos)
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+ +
+
+ +
+
+ + + + +
#define ARM_USART_DATA_BITS_Pos   8
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+ +
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+ + + + +
#define ARM_USART_DATA_BITS_Msk   (7UL << ARM_USART_DATA_BITS_Pos)
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+ +
+
+ +
+
+ + + + +
#define ARM_USART_PARITY_Pos   12
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+ +
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+ +
+
+ + + + +
#define ARM_USART_PARITY_Msk   (3UL << ARM_USART_PARITY_Pos)
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+ +
+
+ +
+
+ + + + +
#define ARM_USART_STOP_BITS_Pos   14
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+ +
+
+ + + + +
#define ARM_USART_STOP_BITS_Msk   (3UL << ARM_USART_STOP_BITS_Pos)
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+
+ +
+
+ + + + +
#define ARM_USART_FLOW_CONTROL_Pos   16
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+
+ +
+
+ + + + +
#define ARM_USART_FLOW_CONTROL_Msk   (3UL << ARM_USART_FLOW_CONTROL_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CPOL_Pos   18
+
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CPOL_Msk   (1UL << ARM_USART_CPOL_Pos)
+
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CPHA_Pos   19
+
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CPHA_Msk   (1UL << ARM_USART_CPHA_Pos)
+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__USBD_8c.html b/docs/Driver/html/Driver__USBD_8c.html new file mode 100644 index 0000000..398887b --- /dev/null +++ b/docs/Driver/html/Driver__USBD_8c.html @@ -0,0 +1,195 @@ + + + + + +Driver_USBD.c File Reference +CMSIS-Driver: Driver_USBD.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_USBD.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_USBD_GetVersion (void)
 Get driver version. More...
 
ARM_USBD_CAPABILITIES ARM_USBD_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_USBD_Initialize (ARM_USBD_SignalDeviceEvent_t cb_device_event, ARM_USBD_SignalEndpointEvent_t cb_endpoint_event)
 Initialize USB Device Interface. More...
 
int32_t ARM_USBD_Uninitialize (void)
 De-initialize USB Device Interface. More...
 
int32_t ARM_USBD_PowerControl (ARM_POWER_STATE state)
 Control USB Device Interface Power. More...
 
int32_t ARM_USBD_DeviceConnect (void)
 Connect USB Device. More...
 
int32_t ARM_USBD_DeviceDisconnect (void)
 Disconnect USB Device. More...
 
ARM_USBD_STATE ARM_USBD_DeviceGetState (void)
 Get current USB Device State. More...
 
int32_t ARM_USBD_DeviceRemoteWakeup (void)
 Trigger USB Remote Wakeup. More...
 
int32_t ARM_USBD_DeviceSetAddress (uint8_t dev_addr)
 Set USB Device Address. More...
 
int32_t ARM_USBD_ReadSetupPacket (uint8_t *setup)
 Read setup packet received over Control Endpoint. More...
 
int32_t ARM_USBD_EndpointConfigure (uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size)
 Configure USB Endpoint. More...
 
int32_t ARM_USBD_EndpointUnconfigure (uint8_t ep_addr)
 Unconfigure USB Endpoint. More...
 
int32_t ARM_USBD_EndpointStall (uint8_t ep_addr, bool stall)
 Set/Clear Stall for USB Endpoint. More...
 
int32_t ARM_USBD_EndpointTransfer (uint8_t ep_addr, uint8_t *data, uint32_t num)
 Read data from or Write data to USB Endpoint. More...
 
uint32_t ARM_USBD_EndpointTransferGetResult (uint8_t ep_addr)
 Get result of USB Endpoint transfer. More...
 
int32_t ARM_USBD_EndpointTransferAbort (uint8_t ep_addr)
 Abort current USB Endpoint transfer. More...
 
uint16_t ARM_USBD_GetFrameNumber (void)
 Get current USB Frame Number. More...
 
void ARM_USBD_SignalDeviceEvent (uint32_t event)
 Signal USB Device Event. More...
 
void ARM_USBD_SignalEndpointEvent (uint8_t ep_addr, uint32_t ep_event)
 Signal USB Endpoint Event. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__USBD_8h.html b/docs/Driver/html/Driver__USBD_8h.html new file mode 100644 index 0000000..f11cbdb --- /dev/null +++ b/docs/Driver/html/Driver__USBD_8h.html @@ -0,0 +1,200 @@ + + + + + +Driver_USBD.h File Reference +CMSIS-Driver: Driver_USBD.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs
+
+
Driver_USBD.h File Reference
+
+
+ + + + + + + + + + + +

+Data Structures

struct  ARM_USBD_STATE
 USB Device State. More...
 
struct  ARM_USBD_CAPABILITIES
 USB Device Driver Capabilities. More...
 
struct  ARM_DRIVER_USBD
 Access structure of the USB Device Driver. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USBD_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */
 
#define ARM_USBD_EVENT_VBUS_ON   (1UL << 0)
 USB Device VBUS On. More...
 
#define ARM_USBD_EVENT_VBUS_OFF   (1UL << 1)
 USB Device VBUS Off. More...
 
#define ARM_USBD_EVENT_RESET   (1UL << 2)
 USB Reset occurred. More...
 
#define ARM_USBD_EVENT_HIGH_SPEED   (1UL << 3)
 USB switch to High Speed occurred. More...
 
#define ARM_USBD_EVENT_SUSPEND   (1UL << 4)
 USB Suspend occurred. More...
 
#define ARM_USBD_EVENT_RESUME   (1UL << 5)
 USB Resume occurred. More...
 
#define ARM_USBD_EVENT_SETUP   (1UL << 0)
 SETUP Packet. More...
 
#define ARM_USBD_EVENT_OUT   (1UL << 1)
 OUT Packet(s) More...
 
#define ARM_USBD_EVENT_IN   (1UL << 2)
 IN Packet(s) More...
 
+ + + + + + + +

+Typedefs

typedef void(* ARM_USBD_SignalDeviceEvent_t )(uint32_t event)
 Pointer to ARM_USBD_SignalDeviceEvent : Signal USB Device Event. More...
 
typedef void(* ARM_USBD_SignalEndpointEvent_t )(uint8_t ep_addr, uint32_t event)
 Pointer to ARM_USBD_SignalEndpointEvent : Signal USB Endpoint Event. More...
 
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USBD_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */
+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/Driver__USBH_8c.html b/docs/Driver/html/Driver__USBH_8c.html new file mode 100644 index 0000000..1980888 --- /dev/null +++ b/docs/Driver/html/Driver__USBH_8c.html @@ -0,0 +1,216 @@ + + + + + +Driver_USBH.c File Reference +CMSIS-Driver: Driver_USBH.c File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Functions
+
+
Driver_USBH.c File Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_USBH_GetVersion (void)
 Get driver version. More...
 
ARM_USBH_CAPABILITIES ARM_USBH_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_USBH_Initialize (ARM_USBH_SignalPortEvent_t cb_port_event, ARM_USBH_SignalPipeEvent_t cb_pipe_event)
 Initialize USB Host Interface. More...
 
int32_t ARM_USBH_Uninitialize (void)
 De-initialize USB Host Interface. More...
 
int32_t ARM_USBH_PowerControl (ARM_POWER_STATE state)
 Control USB Host Interface Power. More...
 
int32_t ARM_USBH_PortVbusOnOff (uint8_t port, bool vbus)
 Root HUB Port VBUS on/off. More...
 
int32_t ARM_USBH_PortReset (uint8_t port)
 Do Root HUB Port Reset. More...
 
int32_t ARM_USBH_PortSuspend (uint8_t port)
 Suspend Root HUB Port (stop generating SOFs). More...
 
int32_t ARM_USBH_PortResume (uint8_t port)
 Resume Root HUB Port (start generating SOFs). More...
 
ARM_USBH_PORT_STATE ARM_USBH_PortGetState (uint8_t port)
 Get current Root HUB Port State. More...
 
ARM_USBH_PIPE_HANDLE ARM_USBH_PipeCreate (uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size, uint8_t ep_interval)
 Create Pipe in System. More...
 
int32_t ARM_USBH_PipeModify (ARM_USBH_PIPE_HANDLE pipe_hndl, uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint16_t ep_max_packet_size)
 Modify Pipe in System. More...
 
int32_t ARM_USBH_PipeDelete (ARM_USBH_PIPE_HANDLE pipe_hndl)
 Delete Pipe from System. More...
 
int32_t ARM_USBH_PipeReset (ARM_USBH_PIPE_HANDLE pipe_hndl)
 Reset Pipe. More...
 
int32_t ARM_USBH_PipeTransfer (ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t packet, uint8_t *data, uint32_t num)
 Transfer packets through USB Pipe. More...
 
uint32_t ARM_USBH_PipeTransferGetResult (ARM_USBH_PIPE_HANDLE pipe_hndl)
 Get result of USB Pipe transfer. More...
 
int32_t ARM_USBH_PipeTransferAbort (ARM_USBH_PIPE_HANDLE pipe_hndl)
 Abort current USB Pipe transfer. More...
 
uint16_t ARM_USBH_GetFrameNumber (void)
 Get current USB Frame Number. More...
 
void ARM_USBH_SignalPortEvent (uint8_t port, uint32_t event)
 Signal Root HUB Port Event. More...
 
void ARM_USBH_SignalPipeEvent (ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t event)
 Signal Pipe Event. More...
 
ARM_DRIVER_VERSION ARM_USBH_HCI_GetVersion (void)
 Get USB Host HCI (OHCI/EHCI) driver version. More...
 
ARM_USBH_HCI_CAPABILITIES ARM_USBH_HCI_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_USBH_HCI_Initialize (ARM_USBH_HCI_Interrupt_t *cb_interrupt)
 Initialize USB Host HCI (OHCI/EHCI) Interface. More...
 
int32_t ARM_USBH_HCI_Uninitialize (void)
 De-initialize USB Host HCI (OHCI/EHCI) Interface. More...
 
int32_t ARM_USBH_HCI_PowerControl (ARM_POWER_STATE state)
 Control USB Host HCI (OHCI/EHCI) Interface Power. More...
 
int32_t ARM_USBH_HCI_PortVbusOnOff (uint8_t port, bool vbus)
 USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off. More...
 
void ARM_USBH_HCI_Interrupt (void)
 USB Host HCI Interrupt Handler. More...
 
+
+
+ + + + diff --git a/docs/Driver/html/Driver__USBH_8h.html b/docs/Driver/html/Driver__USBH_8h.html new file mode 100644 index 0000000..160dde2 --- /dev/null +++ b/docs/Driver/html/Driver__USBH_8h.html @@ -0,0 +1,375 @@ + + + + + +Driver_USBH.h File Reference +CMSIS-Driver: Driver_USBH.h File Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Macros | +Typedefs
+
+
Driver_USBH.h File Reference
+
+
+ + + + + + + + + + + + + + + + + +

+Data Structures

struct  ARM_USBH_PORT_STATE
 USB Host Port State. More...
 
struct  ARM_USBH_CAPABILITIES
 USB Host Driver Capabilities. More...
 
struct  ARM_DRIVER_USBH
 Access structure of USB Host Driver. More...
 
struct  ARM_USBH_HCI_CAPABILITIES
 USB Host HCI (OHCI/EHCI) Driver Capabilities. More...
 
struct  ARM_DRIVER_USBH_HCI
 Access structure of USB Host HCI (OHCI/EHCI) Driver. More...
 
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+Macros

#define ARM_USBH_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */
 
#define ARM_USBH_EP_HANDLE   ARM_USBH_PIPE_HANDLE /* Legacy name */
 
#define ARM_USBH_PACKET_TOKEN_Pos   0
 
#define ARM_USBH_PACKET_TOKEN_Msk   (0x0FUL << ARM_USBH_PACKET_TOKEN_Pos)
 
#define ARM_USBH_PACKET_SETUP   (0x01UL << ARM_USBH_PACKET_TOKEN_Pos)
 SETUP Packet. More...
 
#define ARM_USBH_PACKET_OUT   (0x02UL << ARM_USBH_PACKET_TOKEN_Pos)
 OUT Packet. More...
 
#define ARM_USBH_PACKET_IN   (0x03UL << ARM_USBH_PACKET_TOKEN_Pos)
 IN Packet. More...
 
#define ARM_USBH_PACKET_PING   (0x04UL << ARM_USBH_PACKET_TOKEN_Pos)
 PING Packet. More...
 
#define ARM_USBH_PACKET_DATA_Pos   4
 
#define ARM_USBH_PACKET_DATA_Msk   (0x0FUL << ARM_USBH_PACKET_DATA_Pos)
 
#define ARM_USBH_PACKET_DATA0   (0x01UL << ARM_USBH_PACKET_DATA_Pos)
 DATA0 PID. More...
 
#define ARM_USBH_PACKET_DATA1   (0x02UL << ARM_USBH_PACKET_DATA_Pos)
 DATA1 PID. More...
 
#define ARM_USBH_PACKET_SPLIT_Pos   8
 
#define ARM_USBH_PACKET_SPLIT_Msk   (0x0FUL << ARM_USBH_PACKET_SPLIT_Pos)
 
#define ARM_USBH_PACKET_SSPLIT   (0x08UL << ARM_USBH_PACKET_SPLIT_Pos)
 SSPLIT Packet. More...
 
#define ARM_USBH_PACKET_SSPLIT_S   (0x09UL << ARM_USBH_PACKET_SPLIT_Pos)
 SSPLIT Packet: Data Start. More...
 
#define ARM_USBH_PACKET_SSPLIT_E   (0x0AUL << ARM_USBH_PACKET_SPLIT_Pos)
 SSPLIT Packet: Data End. More...
 
#define ARM_USBH_PACKET_SSPLIT_S_E   (0x0BUL << ARM_USBH_PACKET_SPLIT_Pos)
 SSPLIT Packet: Data All. More...
 
#define ARM_USBH_PACKET_CSPLIT   (0x0CUL << ARM_USBH_PACKET_SPLIT_Pos)
 CSPLIT Packet. More...
 
#define ARM_USBH_PACKET_PRE   (1UL << 12)
 PRE Token. More...
 
#define ARM_USBH_EVENT_CONNECT   (1UL << 0)
 USB Device Connected to Port. More...
 
#define ARM_USBH_EVENT_DISCONNECT   (1UL << 1)
 USB Device Disconnected from Port. More...
 
#define ARM_USBH_EVENT_OVERCURRENT   (1UL << 2)
 USB Device caused Overcurrent. More...
 
#define ARM_USBH_EVENT_RESET   (1UL << 3)
 USB Reset completed. More...
 
#define ARM_USBH_EVENT_SUSPEND   (1UL << 4)
 USB Suspend occurred. More...
 
#define ARM_USBH_EVENT_RESUME   (1UL << 5)
 USB Resume occurred. More...
 
#define ARM_USBH_EVENT_REMOTE_WAKEUP   (1UL << 6)
 USB Device activated Remote Wakeup. More...
 
#define ARM_USBH_EVENT_TRANSFER_COMPLETE   (1UL << 0)
 Transfer completed. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_NAK   (1UL << 1)
 NAK Handshake received. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_NYET   (1UL << 2)
 NYET Handshake received. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_MDATA   (1UL << 3)
 MDATA Handshake received. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_STALL   (1UL << 4)
 STALL Handshake received. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_ERR   (1UL << 5)
 ERR Handshake received. More...
 
#define ARM_USBH_EVENT_BUS_ERROR   (1UL << 6)
 Bus Error detected. More...
 
#define ARM_USBH_SignalEndpointEvent_t   ARM_USBH_SignalPipeEvent_t /* Legacy name */
 
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+Typedefs

typedef uint32_t ARM_USBH_PIPE_HANDLE
 USB Host Pipe Handle. More...
 
typedef void(* ARM_USBH_SignalPortEvent_t )(uint8_t port, uint32_t event)
 Pointer to ARM_USBH_SignalPortEvent : Signal Root HUB Port Event. More...
 
typedef void(* ARM_USBH_SignalPipeEvent_t )(ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t event)
 Pointer to ARM_USBH_SignalPipeEvent : Signal Pipe Event. More...
 
typedef void(* ARM_USBH_HCI_Interrupt_t )(void)
 Pointer to Interrupt Handler Routine. More...
 
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Macro Definition Documentation

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#define ARM_USBH_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(2,2) /* API version */
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#define ARM_USBH_EP_HANDLE   ARM_USBH_PIPE_HANDLE /* Legacy name */
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#define ARM_USBH_PACKET_TOKEN_Pos   0
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#define ARM_USBH_PACKET_TOKEN_Msk   (0x0FUL << ARM_USBH_PACKET_TOKEN_Pos)
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#define ARM_USBH_PACKET_DATA_Pos   4
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#define ARM_USBH_PACKET_DATA_Msk   (0x0FUL << ARM_USBH_PACKET_DATA_Pos)
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#define ARM_USBH_PACKET_SPLIT_Pos   8
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#define ARM_USBH_PACKET_SPLIT_Msk   (0x0FUL << ARM_USBH_PACKET_SPLIT_Pos)
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#define ARM_USBH_SignalEndpointEvent_t   ARM_USBH_SignalPipeEvent_t /* Legacy name */
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+ + + + diff --git a/docs/Driver/html/Driver__USB_8c.html b/docs/Driver/html/Driver__USB_8c.html new file mode 100644 index 0000000..4c0ed73 --- /dev/null +++ b/docs/Driver/html/Driver__USB_8c.html @@ -0,0 +1,129 @@ + + + + + +Driver_USB.c File Reference +CMSIS-Driver: Driver_USB.c File Reference + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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Driver_USB.c File Reference
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+ + + + diff --git a/docs/Driver/html/Driver__USB_8h.html b/docs/Driver/html/Driver__USB_8h.html new file mode 100644 index 0000000..979a090 --- /dev/null +++ b/docs/Driver/html/Driver__USB_8h.html @@ -0,0 +1,620 @@ + + + + + +Driver_USB.h File Reference +CMSIS-Driver: Driver_USB.h File Reference + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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+Macros
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Driver_USB.h File Reference
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+Macros

#define ARM_USB_ROLE_NONE   (0)
 
#define ARM_USB_ROLE_HOST   (1)
 
#define ARM_USB_ROLE_DEVICE   (2)
 
#define ARM_USB_PIN_DP   (1 << 0)
 USB D+ pin. More...
 
#define ARM_USB_PIN_DM   (1 << 1)
 USB D- pin. More...
 
#define ARM_USB_PIN_VBUS   (1 << 2)
 USB VBUS pin. More...
 
#define ARM_USB_PIN_OC   (1 << 3)
 USB OverCurrent pin. More...
 
#define ARM_USB_PIN_ID   (1 << 4)
 USB ID pin. More...
 
#define ARM_USB_SPEED_LOW   (0)
 Low-speed USB. More...
 
#define ARM_USB_SPEED_FULL   (1)
 Full-speed USB. More...
 
#define ARM_USB_SPEED_HIGH   (2)
 High-speed USB. More...
 
#define ARM_USB_PID_OUT   (1)
 
#define ARM_USB_PID_IN   (9)
 
#define ARM_USB_PID_SOF   (5)
 
#define ARM_USB_PID_SETUP   (13)
 
#define ARM_USB_PID_DATA0   (3)
 
#define ARM_USB_PID_DATA1   (11)
 
#define ARM_USB_PID_DATA2   (7)
 
#define ARM_USB_PID_MDATA   (15)
 
#define ARM_USB_PID_ACK   (2)
 
#define ARM_USB_PID_NAK   (10)
 
#define ARM_USB_PID_STALL   (14)
 
#define ARM_USB_PID_NYET   (6)
 
#define ARM_USB_PID_PRE   (12)
 
#define ARM_USB_PID_ERR   (12)
 
#define ARM_USB_PID_SPLIT   (8)
 
#define ARM_USB_PID_PING   (4)
 
#define ARM_USB_PID_RESERVED   (0)
 
#define ARM_USB_ENDPOINT_NUMBER_MASK   (0x0F)
 
#define ARM_USB_ENDPOINT_DIRECTION_MASK   (0x80)
 
#define ARM_USB_ENDPOINT_CONTROL   (0)
 Control Endpoint. More...
 
#define ARM_USB_ENDPOINT_ISOCHRONOUS   (1)
 Isochronous Endpoint. More...
 
#define ARM_USB_ENDPOINT_BULK   (2)
 Bulk Endpoint. More...
 
#define ARM_USB_ENDPOINT_INTERRUPT   (3)
 Interrupt Endpoint. More...
 
#define ARM_USB_ENDPOINT_MAX_PACKET_SIZE_MASK   (0x07FF)
 
#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_MASK   (0x1800)
 
#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_1   (0x0000)
 
#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_2   (0x0800)
 
#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_3   (0x1000)
 
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Macro Definition Documentation

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#define ARM_USB_ROLE_NONE   (0)
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#define ARM_USB_ROLE_HOST   (1)
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#define ARM_USB_ROLE_DEVICE   (2)
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#define ARM_USB_PIN_DP   (1 << 0)
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USB D+ pin.

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#define ARM_USB_PIN_DM   (1 << 1)
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USB D- pin.

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#define ARM_USB_PIN_VBUS   (1 << 2)
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USB VBUS pin.

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#define ARM_USB_PIN_OC   (1 << 3)
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USB OverCurrent pin.

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#define ARM_USB_PIN_ID   (1 << 4)
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USB ID pin.

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#define ARM_USB_PID_OUT   (1)
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#define ARM_USB_PID_IN   (9)
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#define ARM_USB_PID_SOF   (5)
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#define ARM_USB_PID_SETUP   (13)
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#define ARM_USB_PID_DATA0   (3)
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#define ARM_USB_PID_DATA1   (11)
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#define ARM_USB_PID_DATA2   (7)
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#define ARM_USB_PID_MDATA   (15)
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#define ARM_USB_PID_ACK   (2)
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#define ARM_USB_PID_NAK   (10)
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#define ARM_USB_PID_STALL   (14)
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#define ARM_USB_PID_NYET   (6)
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#define ARM_USB_PID_PRE   (12)
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#define ARM_USB_PID_ERR   (12)
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#define ARM_USB_PID_SPLIT   (8)
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#define ARM_USB_PID_PING   (4)
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#define ARM_USB_PID_RESERVED   (0)
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#define ARM_USB_ENDPOINT_NUMBER_MASK   (0x0F)
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#define ARM_USB_ENDPOINT_DIRECTION_MASK   (0x80)
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#define ARM_USB_ENDPOINT_MAX_PACKET_SIZE_MASK   (0x07FF)
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#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_MASK   (0x1800)
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#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_1   (0x0000)
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#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_2   (0x0800)
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#define ARM_USB_ENDPOINT_MICROFRAME_TRANSACTIONS_3   (0x1000)
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+ + + + diff --git a/docs/Driver/html/EthernetSchematic.png b/docs/Driver/html/EthernetSchematic.png new file mode 100644 index 0000000..6db8a03 Binary files /dev/null and b/docs/Driver/html/EthernetSchematic.png differ diff --git a/docs/Driver/html/General_8txt.html b/docs/Driver/html/General_8txt.html new file mode 100644 index 0000000..1b9dde9 --- /dev/null +++ b/docs/Driver/html/General_8txt.html @@ -0,0 +1,129 @@ + + + + + +General.txt File Reference +CMSIS-Driver: General.txt File Reference + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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General.txt File Reference
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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Data Structures
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Here are the data structures with brief descriptions:
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oCARM_CAN_CAPABILITIESCAN Device Driver Capabilities
oCARM_CAN_MSG_INFOCAN Message Information
oCARM_CAN_OBJ_CAPABILITIESCAN Object Capabilities
oCARM_CAN_STATUSCAN Status
oCARM_DRIVER_CANAccess structure of the CAN Driver
oCARM_DRIVER_ETH_MACAccess structure of the Ethernet MAC Driver
oCARM_DRIVER_ETH_PHYAccess structure of the Ethernet PHY Driver
oCARM_DRIVER_FLASHAccess structure of the Flash Driver
oCARM_DRIVER_I2CAccess structure of the I2C Driver
oCARM_DRIVER_MCIAccess structure of the MCI Driver
oCARM_DRIVER_NANDAccess structure of the NAND Driver
oCARM_DRIVER_SAIAccess structure of the SAI Driver
oCARM_DRIVER_SPIAccess structure of the SPI Driver
oCARM_DRIVER_STORAGE
oCARM_DRIVER_USARTAccess structure of the USART Driver
oCARM_DRIVER_USBDAccess structure of the USB Device Driver
oCARM_DRIVER_USBHAccess structure of USB Host Driver
oCARM_DRIVER_USBH_HCIAccess structure of USB Host HCI (OHCI/EHCI) Driver
oCARM_DRIVER_VERSIONDriver Version
oCARM_ETH_LINK_INFOEthernet link information
oCARM_ETH_MAC_ADDREthernet MAC Address
oCARM_ETH_MAC_CAPABILITIESEthernet MAC Capabilities
oCARM_ETH_MAC_TIMEEthernet MAC Time
oCARM_FLASH_CAPABILITIESFlash Driver Capabilities
oCARM_FLASH_INFOFlash information
oCARM_FLASH_SECTORFlash Sector information
oCARM_FLASH_STATUSFlash Status
oCARM_I2C_CAPABILITIESI2C Driver Capabilities
oCARM_I2C_STATUSI2C Status
oCARM_MCI_CAPABILITIESMCI Driver Capabilities
oCARM_MCI_STATUSMCI Status
oCARM_NAND_CAPABILITIESNAND Driver Capabilities
oCARM_NAND_ECC_INFONAND ECC (Error Correction Code) Information
oCARM_NAND_STATUSNAND Status
oCARM_SAI_CAPABILITIESSAI Driver Capabilities
oCARM_SAI_STATUSSAI Status
oCARM_SPI_CAPABILITIESSPI Driver Capabilities
oCARM_SPI_STATUSSPI Status
oCARM_STORAGE_BLOCKA storage block is a range of memory with uniform attributes
oCARM_STORAGE_BLOCK_ATTRIBUTESAttributes of the storage range within a storage block
oCARM_STORAGE_CAPABILITIESStorage Driver API Capabilities
oCARM_STORAGE_INFO
oCARM_STORAGE_SECURITY_FEATURES
oCARM_STORAGE_STATUSOperating status of the storage controller
oCARM_USART_CAPABILITIESUSART Device Driver Capabilities
oCARM_USART_MODEM_STATUSUSART Modem Status
oCARM_USART_STATUSUSART Status
oCARM_USBD_CAPABILITIESUSB Device Driver Capabilities
oCARM_USBD_STATEUSB Device State
oCARM_USBH_CAPABILITIESUSB Host Driver Capabilities
oCARM_USBH_HCI_CAPABILITIESUSB Host HCI (OHCI/EHCI) Driver Capabilities
\CARM_USBH_PORT_STATEUSB Host Port State
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+
+ + + + diff --git a/docs/Driver/html/annotated.js b/docs/Driver/html/annotated.js new file mode 100644 index 0000000..24544ae --- /dev/null +++ b/docs/Driver/html/annotated.js @@ -0,0 +1,55 @@ +var annotated = +[ + [ "ARM_CAN_CAPABILITIES", "group__can__interface__gr.html#structARM__CAN__CAPABILITIES", "group__can__interface__gr_structARM__CAN__CAPABILITIES" ], + [ "ARM_CAN_MSG_INFO", "group__can__interface__gr.html#structARM__CAN__MSG__INFO", "group__can__interface__gr_structARM__CAN__MSG__INFO" ], + [ "ARM_CAN_OBJ_CAPABILITIES", "group__can__interface__gr.html#structARM__CAN__OBJ__CAPABILITIES", "group__can__interface__gr_structARM__CAN__OBJ__CAPABILITIES" ], + [ "ARM_CAN_STATUS", "group__can__interface__gr.html#structARM__CAN__STATUS", "group__can__interface__gr_structARM__CAN__STATUS" ], + [ "ARM_DRIVER_CAN", "group__can__interface__gr.html#structARM__DRIVER__CAN", "group__can__interface__gr_structARM__DRIVER__CAN" ], + [ "ARM_DRIVER_ETH_MAC", "group__eth__mac__interface__gr.html#structARM__DRIVER__ETH__MAC", "group__eth__mac__interface__gr_structARM__DRIVER__ETH__MAC" ], + [ "ARM_DRIVER_ETH_PHY", "group__eth__phy__interface__gr.html#structARM__DRIVER__ETH__PHY", "group__eth__phy__interface__gr_structARM__DRIVER__ETH__PHY" ], + [ "ARM_DRIVER_FLASH", "group__flash__interface__gr.html#structARM__DRIVER__FLASH", "group__flash__interface__gr_structARM__DRIVER__FLASH" ], + [ "ARM_DRIVER_I2C", "group__i2c__interface__gr.html#structARM__DRIVER__I2C", "group__i2c__interface__gr_structARM__DRIVER__I2C" ], + [ "ARM_DRIVER_MCI", "group__mci__interface__gr.html#structARM__DRIVER__MCI", "group__mci__interface__gr_structARM__DRIVER__MCI" ], + [ "ARM_DRIVER_NAND", "group__nand__interface__gr.html#structARM__DRIVER__NAND", "group__nand__interface__gr_structARM__DRIVER__NAND" ], + [ "ARM_DRIVER_SAI", "group__sai__interface__gr.html#structARM__DRIVER__SAI", "group__sai__interface__gr_structARM__DRIVER__SAI" ], + [ "ARM_DRIVER_SPI", "group__spi__interface__gr.html#structARM__DRIVER__SPI", "group__spi__interface__gr_structARM__DRIVER__SPI" ], + [ "ARM_DRIVER_STORAGE", "group__storage__interface__gr.html#structARM__DRIVER__STORAGE", "group__storage__interface__gr_structARM__DRIVER__STORAGE" ], + [ "ARM_DRIVER_USART", "group__usart__interface__gr.html#structARM__DRIVER__USART", "group__usart__interface__gr_structARM__DRIVER__USART" ], + [ "ARM_DRIVER_USBD", "group__usbd__interface__gr.html#structARM__DRIVER__USBD", "group__usbd__interface__gr_structARM__DRIVER__USBD" ], + [ "ARM_DRIVER_USBH", "group__usbh__host__gr.html#structARM__DRIVER__USBH", "group__usbh__host__gr_structARM__DRIVER__USBH" ], + [ "ARM_DRIVER_USBH_HCI", "group__usbh__hci__gr.html#structARM__DRIVER__USBH__HCI", "group__usbh__hci__gr_structARM__DRIVER__USBH__HCI" ], + [ "ARM_DRIVER_VERSION", "group__common__drv__gr.html#structARM__DRIVER__VERSION", "group__common__drv__gr_structARM__DRIVER__VERSION" ], + [ "ARM_ETH_LINK_INFO", "group__eth__interface__gr.html#structARM__ETH__LINK__INFO", "group__eth__interface__gr_structARM__ETH__LINK__INFO" ], + [ "ARM_ETH_MAC_ADDR", "group__eth__interface__gr.html#structARM__ETH__MAC__ADDR", "group__eth__interface__gr_structARM__ETH__MAC__ADDR" ], + [ "ARM_ETH_MAC_CAPABILITIES", "group__eth__mac__interface__gr.html#structARM__ETH__MAC__CAPABILITIES", "group__eth__mac__interface__gr_structARM__ETH__MAC__CAPABILITIES" ], + [ "ARM_ETH_MAC_TIME", "group__eth__mac__interface__gr.html#structARM__ETH__MAC__TIME", "group__eth__mac__interface__gr_structARM__ETH__MAC__TIME" ], + [ "ARM_FLASH_CAPABILITIES", "group__flash__interface__gr.html#structARM__FLASH__CAPABILITIES", "group__flash__interface__gr_structARM__FLASH__CAPABILITIES" ], + [ "ARM_FLASH_INFO", "group__flash__interface__gr.html#structARM__FLASH__INFO", "group__flash__interface__gr_structARM__FLASH__INFO" ], + [ "ARM_FLASH_SECTOR", "group__flash__interface__gr.html#structARM__FLASH__SECTOR", "group__flash__interface__gr_structARM__FLASH__SECTOR" ], + [ "ARM_FLASH_STATUS", "group__flash__interface__gr.html#structARM__FLASH__STATUS", "group__flash__interface__gr_structARM__FLASH__STATUS" ], + [ "ARM_I2C_CAPABILITIES", "group__i2c__interface__gr.html#structARM__I2C__CAPABILITIES", "group__i2c__interface__gr_structARM__I2C__CAPABILITIES" ], + [ "ARM_I2C_STATUS", "group__i2c__interface__gr.html#structARM__I2C__STATUS", "group__i2c__interface__gr_structARM__I2C__STATUS" ], + [ "ARM_MCI_CAPABILITIES", "group__mci__interface__gr.html#structARM__MCI__CAPABILITIES", "group__mci__interface__gr_structARM__MCI__CAPABILITIES" ], + [ "ARM_MCI_STATUS", "group__mci__interface__gr.html#structARM__MCI__STATUS", "group__mci__interface__gr_structARM__MCI__STATUS" ], + [ "ARM_NAND_CAPABILITIES", "group__nand__interface__gr.html#structARM__NAND__CAPABILITIES", "group__nand__interface__gr_structARM__NAND__CAPABILITIES" ], + [ "ARM_NAND_ECC_INFO", "group__nand__interface__gr.html#structARM__NAND__ECC__INFO", "group__nand__interface__gr_structARM__NAND__ECC__INFO" ], + [ "ARM_NAND_STATUS", "group__nand__interface__gr.html#structARM__NAND__STATUS", "group__nand__interface__gr_structARM__NAND__STATUS" ], + [ "ARM_SAI_CAPABILITIES", "group__sai__interface__gr.html#structARM__SAI__CAPABILITIES", "group__sai__interface__gr_structARM__SAI__CAPABILITIES" ], + [ "ARM_SAI_STATUS", "group__sai__interface__gr.html#structARM__SAI__STATUS", "group__sai__interface__gr_structARM__SAI__STATUS" ], + [ "ARM_SPI_CAPABILITIES", "group__spi__interface__gr.html#structARM__SPI__CAPABILITIES", "group__spi__interface__gr_structARM__SPI__CAPABILITIES" ], + [ "ARM_SPI_STATUS", "group__spi__interface__gr.html#structARM__SPI__STATUS", "group__spi__interface__gr_structARM__SPI__STATUS" ], + [ "ARM_STORAGE_BLOCK", "group__storage__interface__gr.html#structARM__STORAGE__BLOCK", "group__storage__interface__gr_structARM__STORAGE__BLOCK" ], + [ "ARM_STORAGE_BLOCK_ATTRIBUTES", "group__storage__interface__gr.html#structARM__STORAGE__BLOCK__ATTRIBUTES", "group__storage__interface__gr_structARM__STORAGE__BLOCK__ATTRIBUTES" ], + [ "ARM_STORAGE_CAPABILITIES", "group__storage__interface__gr.html#structARM__STORAGE__CAPABILITIES", "group__storage__interface__gr_structARM__STORAGE__CAPABILITIES" ], + [ "ARM_STORAGE_INFO", "group__storage__interface__gr.html#structARM__STORAGE__INFO", "group__storage__interface__gr_structARM__STORAGE__INFO" ], + [ "ARM_STORAGE_SECURITY_FEATURES", "Driver__Storage_8h.html#structARM__STORAGE__SECURITY__FEATURES", "Driver__Storage_8h_structARM__STORAGE__SECURITY__FEATURES" ], + [ "ARM_STORAGE_STATUS", "group__storage__interface__gr.html#structARM__STORAGE__STATUS", "group__storage__interface__gr_structARM__STORAGE__STATUS" ], + [ "ARM_USART_CAPABILITIES", "group__usart__interface__gr.html#structARM__USART__CAPABILITIES", "group__usart__interface__gr_structARM__USART__CAPABILITIES" ], + [ "ARM_USART_MODEM_STATUS", "group__usart__interface__gr.html#structARM__USART__MODEM__STATUS", "group__usart__interface__gr_structARM__USART__MODEM__STATUS" ], + [ "ARM_USART_STATUS", "group__usart__interface__gr.html#structARM__USART__STATUS", "group__usart__interface__gr_structARM__USART__STATUS" ], + [ "ARM_USBD_CAPABILITIES", "group__usbd__interface__gr.html#structARM__USBD__CAPABILITIES", "group__usbd__interface__gr_structARM__USBD__CAPABILITIES" ], + [ "ARM_USBD_STATE", "group__usbd__interface__gr.html#structARM__USBD__STATE", "group__usbd__interface__gr_structARM__USBD__STATE" ], + [ "ARM_USBH_CAPABILITIES", "group__usbh__host__gr.html#structARM__USBH__CAPABILITIES", "group__usbh__host__gr_structARM__USBH__CAPABILITIES" ], + [ "ARM_USBH_HCI_CAPABILITIES", "group__usbh__hci__gr.html#structARM__USBH__HCI__CAPABILITIES", "group__usbh__hci__gr_structARM__USBH__HCI__CAPABILITIES" ], + [ "ARM_USBH_PORT_STATE", "group__usbh__host__gr.html#structARM__USBH__PORT__STATE", "group__usbh__host__gr_structARM__USBH__PORT__STATE" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/bc_s.png b/docs/Driver/html/bc_s.png new file mode 100644 index 0000000..224b29a Binary files /dev/null and b/docs/Driver/html/bc_s.png differ diff --git a/docs/Driver/html/bdwn.png b/docs/Driver/html/bdwn.png new file mode 100644 index 0000000..940a0b9 Binary files /dev/null and b/docs/Driver/html/bdwn.png differ diff --git a/docs/Driver/html/classes.html b/docs/Driver/html/classes.html new file mode 100644 index 0000000..8571440 --- /dev/null +++ b/docs/Driver/html/classes.html @@ -0,0 +1,163 @@ + + + + + +Data Structure Index +CMSIS-Driver: Data Structure Index + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Data Structure Index
+
+
+
C | D | E | F | I | M | N | S | U
+ + + + + + + + + + + + + + + + +
  C  
+		ARM_DRIVER_NAND   ARM_ETH_MAC_TIME   ARM_MCI_STATUS   ARM_STORAGE_CAPABILITIES   
ARM_DRIVER_SAI   
  F  
+
  N  
+		ARM_STORAGE_INFO   
ARM_CAN_CAPABILITIES   ARM_DRIVER_SPI   ARM_STORAGE_SECURITY_FEATURES   
ARM_CAN_MSG_INFO   ARM_DRIVER_STORAGE   ARM_FLASH_CAPABILITIES   ARM_NAND_CAPABILITIES   ARM_STORAGE_STATUS   
ARM_CAN_OBJ_CAPABILITIES   ARM_DRIVER_USART   ARM_FLASH_INFO   ARM_NAND_ECC_INFO   
  U  
+
ARM_CAN_STATUS   ARM_DRIVER_USBD   ARM_FLASH_SECTOR   ARM_NAND_STATUS   
  D  
+		ARM_DRIVER_USBH   ARM_FLASH_STATUS   
  S  
+		ARM_USART_CAPABILITIES   
ARM_DRIVER_USBH_HCI   
  I  
+		ARM_USART_MODEM_STATUS   
ARM_DRIVER_CAN   ARM_DRIVER_VERSION   ARM_SAI_CAPABILITIES   ARM_USART_STATUS   
ARM_DRIVER_ETH_MAC   
  E  
+		ARM_I2C_CAPABILITIES   ARM_SAI_STATUS   ARM_USBD_CAPABILITIES   
ARM_DRIVER_ETH_PHY   ARM_I2C_STATUS   ARM_SPI_CAPABILITIES   ARM_USBD_STATE   
ARM_DRIVER_FLASH   ARM_ETH_LINK_INFO   
  M  
+		ARM_SPI_STATUS   ARM_USBH_CAPABILITIES   
ARM_DRIVER_I2C   ARM_ETH_MAC_ADDR   ARM_STORAGE_BLOCK   ARM_USBH_HCI_CAPABILITIES   
ARM_DRIVER_MCI   ARM_ETH_MAC_CAPABILITIES   ARM_MCI_CAPABILITIES   ARM_STORAGE_BLOCK_ATTRIBUTES   ARM_USBH_PORT_STATE   
+
C | D | E | F | I | M | N | S | U
+
+
+ + + + diff --git a/docs/Driver/html/closed.png b/docs/Driver/html/closed.png new file mode 100644 index 0000000..98cc2c9 Binary files /dev/null and b/docs/Driver/html/closed.png differ diff --git a/docs/Driver/html/cmsis.css b/docs/Driver/html/cmsis.css new file mode 100644 index 0000000..bba1010 --- /dev/null +++ b/docs/Driver/html/cmsis.css @@ -0,0 +1,1282 @@ +/* The standard CSS for doxygen */ + +body, table, div, p, dl { + font-family: Lucida Grande, Verdana, Geneva, Arial, sans-serif; + font-size: 13px; + line-height: 1.3; +} + +/* CMSIS styles */ + +.style1 { + text-align: center; +} +.style2 { + color: #0000FF; + font-weight: normal; +} +.style3 { + text-align: left; +} +.style4 { + color: #008000; +} +.style5 { + color: #0000FF; +} +.style6 { + color: #000000; + font-style:italic; +} +.mand { + color: #0000FF; +} +.opt { + color: #008000; +} +.cond { + color: #990000; +} + +.choice +{ + background-color:#F7F9D0; +} +.seq +{ + background-color:#C9DECB; +} +.group1 +{ + background-color:#F8F1F1; +} +.group2 +{ + background-color:#DCEDEA; +} + + +ul ul { + list-style-type: disc; +} + +ul ul ul { + list-style-type: disc; +} + +ul.hierarchy { + color: green; +} + +em { + color: #000000; + font-style:italic; +} + + + +/* CMSIS Tables */ +table.cmtab1 { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A3B4D7; + text-align: justify; + width:70%; +} + +th.cmtab1 { + background: #EBEFF6; + font-weight: bold; + height: 28px; +} + +td.cmtab1 { + padding:1px; + text-align: left; +} + +table.cmtable { + border-collapse:collapse; + text-align: justify; +} + +table.cmtable td, table.cmtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.cmtable th { + background-color: #EBEFF6; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; +} + +td.MonoTxt { + font-family:"Arial monospaced for SAP"; +} + +td.XML-Token +{ + azimuth: 180; + font-style:italic; + color:Maroon; + z-index:20; + +} + +span.XML-Token +{ + azimuth: 180; + font-style:italic; + color:Maroon; + z-index:20; + +} + +span.h2 +{ + font-size: 120%; + font-weight: bold; +} + +div.new +{ + background-color:#ccffcc; /* light green */ +} + +div.mod +{ + background-color:#ffe6cc; /* light amber */ +} + +div.del +{ + background-color:#ffcccc; /* light red */ +} + +/* @group Heading Levels */ + +h1 { + font-size: 150%; +} + +.title { + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2 { + font-size: 120%; +} + +h3 { + font-size: 100%; +} + +h1, h2, h3, h4, h5, h6 { + -webkit-transition: text-shadow 0.5s linear; + -moz-transition: text-shadow 0.5s linear; + -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +div.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; +} + +p.startli, p.startdd, p.starttd { + margin-top: 2px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3A568E; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4464A5; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9AAED5; + color: #ffffff; + border: 1px double #849CCC; +} + +.contents a.qindexHL:visited { + color: #ffffff; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 4px; + margin: 4px; + background-color: #FBFCFD; + border: 1px solid #C3CFE6; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; +} + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +div.ah { + background-color: black; + font-weight: bold; + color: #ffffff; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000); +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C3CFE6; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C3CFE6; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EDF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9AAED5; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A2B4D8; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4769AD; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memItemLeft, .memItemRight, .memTemplParams { + border-top: 1px solid #C3CFE6; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight { + width: 100%; +} + +.memTemplParams { + color: #4464A5; + white-space: nowrap; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtemplate { + font-size: 80%; + color: #4464A5; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A2B4D8; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: bold; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 0px 6px 0px; + color: #233456; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + border-top-left-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + -moz-border-radius-topleft: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + -webkit-border-top-left-radius: 4px; + +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A7B8DA; + border-left: 1px solid #A7B8DA; + border-right: 1px solid #A7B8DA; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #708CC4; + border-top:1px solid #5072B7; + border-left:1px solid #5072B7; + border-right:1px solid #C3CFE6; + border-bottom:1px solid #C3CFE6; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; +} + + + +/* @end */ + +/* these are for tree view when not used as main index */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3A568E; +} + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #293C63; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2B4069; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #EBEFF6; + color: #000000; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + width: 100%; + margin-bottom: 10px; + border: 1px solid #A7B8DA; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A7B8DA; + border-bottom: 1px solid #A7B8DA; + vertical-align: top; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A7B8DA; + width: 100%; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E7F3; + font-size: 90%; + color: #233456; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A7B8DA; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + height:30px; + line-height:30px; + color:#889FCE; + border:solid 1px #C1CDE5; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#344D7E; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; +} + +.navpath li.navelem a:hover +{ + color:#6583BF; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#344D7E; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +div.ingroups +{ + margin-left: 5px; + font-size: 8pt; + padding-left: 5px; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C3CFE6; +} + +div.headertitle +{ + padding: 5px 5px 5px 7px; +} + +dl +{ + padding: 0 0 0 10px; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ +dl.section +{ + margin-left: 0px; + padding-left: 0px; +} + +dl.note +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00D000; +} + +dl.deprecated +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #505050; +} + +dl.todo +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00C0E0; +} + +dl.test +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #3030E0; +} + +dl.bug +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5072B7; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #8EA4D0; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#314877; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D7DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 20px 10px 10px; + width: 200px; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4464A5; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + diff --git a/docs/Driver/html/dir_041cc4048c8229d7729b502626227b03.html b/docs/Driver/html/dir_041cc4048c8229d7729b502626227b03.html new file mode 100644 index 0000000..cb28c14 --- /dev/null +++ b/docs/Driver/html/dir_041cc4048c8229d7729b502626227b03.html @@ -0,0 +1,165 @@ + + + + + +src Directory Reference +CMSIS-Driver: src Directory Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
src Directory Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Files

file  Driver_CAN.c
 
file  Driver_Common.c
 
file  Driver_ETH.c
 
file  Driver_ETH_MAC.c
 
file  Driver_ETH_PHY.c
 
file  Driver_Flash.c
 
file  Driver_I2C.c
 
file  Driver_MCI.c
 
file  Driver_NAND.c
 
file  Driver_SAI.c
 
file  Driver_SPI.c
 
file  Driver_Storage.c
 
file  Driver_USART.c
 
file  Driver_USB.c
 
file  Driver_USBD.c
 
file  Driver_USBH.c
 
+
+
+ + + + diff --git a/docs/Driver/html/dir_7151b3cc910409bb744bd274374c738d.html b/docs/Driver/html/dir_7151b3cc910409bb744bd274374c738d.html new file mode 100644 index 0000000..920aceb --- /dev/null +++ b/docs/Driver/html/dir_7151b3cc910409bb744bd274374c738d.html @@ -0,0 +1,135 @@ + + + + + +Driver Directory Reference +CMSIS-Driver: Driver Directory Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Driver Directory Reference
+
+
+ + + + +

+Directories

directory  Include
 
+
+
+ + + + diff --git a/docs/Driver/html/dir_9c39448ea46a8e15f1aabc7dec307fcf.html b/docs/Driver/html/dir_9c39448ea46a8e15f1aabc7dec307fcf.html new file mode 100644 index 0000000..c8a51f6 --- /dev/null +++ b/docs/Driver/html/dir_9c39448ea46a8e15f1aabc7dec307fcf.html @@ -0,0 +1,165 @@ + + + + + +Include Directory Reference +CMSIS-Driver: Include Directory Reference + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Include Directory Reference
+
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Files

file  Driver_CAN.h
 
file  Driver_Common.h
 
file  Driver_ETH.h
 
file  Driver_ETH_MAC.h
 
file  Driver_ETH_PHY.h
 
file  Driver_Flash.h
 
file  Driver_I2C.h
 
file  Driver_MCI.h
 
file  Driver_NAND.h
 
file  Driver_SAI.h
 
file  Driver_SPI.h
 
file  Driver_Storage.h
 
file  Driver_USART.h
 
file  Driver_USB.h
 
file  Driver_USBD.h
 
file  Driver_USBH.h
 
+
+
+ + + + diff --git a/docs/Driver/html/doxygen.css b/docs/Driver/html/doxygen.css new file mode 100644 index 0000000..f0f36f8 --- /dev/null +++ b/docs/Driver/html/doxygen.css @@ -0,0 +1,1366 @@ +/* The standard CSS for doxygen 1.8.6 */ + +body, table, div, p, dl { + font: 400 14px/22px Roboto,sans-serif; +} + +/* @group Heading Levels */ + +h1.groupheader { + font-size: 150%; +} + +.title { + font: 400 14px/28px Roboto,sans-serif; + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2.groupheader { + border-bottom: 1px solid #879ECB; + color: #354C7B; + font-size: 150%; + font-weight: normal; + margin-top: 1.75em; + padding-top: 8px; + padding-bottom: 4px; + width: 100%; +} + +h3.groupheader { + font-size: 100%; +} + +h1, h2, h3, h4, h5, h6 { + -webkit-transition: text-shadow 0.5s linear; + -moz-transition: text-shadow 0.5s linear; + -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +div.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; +} + +p.startli, p.startdd { + margin-top: 2px; +} + +p.starttd { + margin-top: 0px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3D578C; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4665A2; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9CAFD4; + color: #ffffff; + border: 1px double #869DCA; +} + +.contents a.qindexHL:visited { + color: #ffffff; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited, a.line, a.line:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited, a.lineRef, a.lineRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 4px 6px; + margin: 4px 8px 4px 2px; + background-color: #FBFCFD; + border: 1px solid #C4CFE5; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + min-height: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +div.line.glow { + background-color: cyan; + box-shadow: 0 0 10px cyan; +} + + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +div.ah { + background-color: black; + font-weight: bold; + color: #ffffff; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000); +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C4CFE5; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C4CFE5; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EEF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9CAFD4; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A3B4D7; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4A6AAA; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td, .fieldtable tr { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow, .fieldtable tr.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memSeparator { + border-bottom: 1px solid #DEE4F0; + line-height: 1px; + margin: 0px; + padding: 0px; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight { + width: 100%; +} + +.memTemplParams { + color: #4665A2; + white-space: nowrap; + font-size: 80%; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtemplate { + font-size: 80%; + color: #4665A2; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; + display: table !important; + width: 100%; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: bold; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 0px 6px 0px; + color: #253555; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + border-top-left-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + -moz-border-radius-topleft: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + -webkit-border-top-left-radius: 4px; + +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} +.paramname code { + line-height: 14px; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #728DC1; + border-top:1px solid #5373B4; + border-left:1px solid #5373B4; + border-right:1px solid #C4CFE5; + border-bottom:1px solid #C4CFE5; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; + vertical-align: middle; +} + + + +/* @end */ + +/* these are for tree view when not used as main index */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; + padding-top: 3px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.entry a img { + border: none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + padding-top: 3px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3D578C; +} + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #2A3D61; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + /*width: 100%;*/ + margin-bottom: 10px; + border: 1px solid #A8B8D9; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + vertical-align: top; +} + +.fieldtable td.fieldname { + padding-top: 3px; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A8B8D9; + /*width: 100%;*/ +} + +.fieldtable td.fielddoc p:first-child { + margin-top: 0px; +} + +.fieldtable td.fielddoc p:last-child { + margin-bottom: 2px; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + font-size: 90%; + color: #253555; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A8B8D9; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + background-position: 0 -5px; + height:30px; + line-height:30px; + color:#8AA0CC; + border:solid 1px #C2CDE4; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#364D7C; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #283A5D; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; +} + +.navpath li.navelem a:hover +{ + color:#6884BD; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#364D7C; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +div.ingroups +{ + font-size: 8pt; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C4CFE5; +} + +div.headertitle +{ + padding: 5px 5px 5px 10px; +} + +dl +{ + padding: 0 0 0 10px; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug */ +dl.section +{ + margin-left: 0px; + padding-left: 0px; +} + +dl.note +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #FF0000; +} + +dl.pre, dl.post, dl.invariant +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00D000; +} + +dl.deprecated +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #505050; +} + +dl.todo +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #00C0E0; +} + +dl.test +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #3030E0; +} + +dl.bug +{ + margin-left:-7px; + padding-left: 3px; + border-left:4px solid; + border-color: #C08050; +} + +dl.section dd { + margin-bottom: 6px; +} + + +#projectlogo +{ + text-align: center; + vertical-align: bottom; + border-collapse: separate; +} + +#projectlogo img +{ + border: 0px none; +} + +#projectname +{ + font: 300% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 2px 0px; +} + +#projectbrief +{ + font: 120% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#projectnumber +{ + font: 50% Tahoma, Arial,sans-serif; + margin: 0px; + padding: 0px; +} + +#titlearea +{ + padding: 0px; + margin: 0px; + width: 100%; + border-bottom: 1px solid #5373B4; +} + +.image +{ + text-align: center; +} + +.dotgraph +{ + text-align: center; +} + +.mscgraph +{ + text-align: center; +} + +.diagraph +{ + text-align: center; +} + +.caption +{ + font-weight: bold; +} + +div.zoom +{ + border: 1px solid #90A5CE; +} + +dl.citelist { + margin-bottom:50px; +} + +dl.citelist dt { + color:#334975; + float:left; + font-weight:bold; + margin-right:10px; + padding:5px; +} + +dl.citelist dd { + margin:2px 0; + padding:5px 0; +} + +div.toc { + padding: 14px 25px; + background-color: #F4F6FA; + border: 1px solid #D8DFEE; + border-radius: 7px 7px 7px 7px; + float: right; + height: auto; + margin: 0 20px 10px 10px; + width: 200px; +} + +div.toc li { + background: url("bdwn.png") no-repeat scroll 0 5px transparent; + font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif; + margin-top: 5px; + padding-left: 10px; + padding-top: 2px; +} + +div.toc h3 { + font: bold 12px/1.2 Arial,FreeSans,sans-serif; + color: #4665A2; + border-bottom: 0 none; + margin: 0; +} + +div.toc ul { + list-style: none outside none; + border: medium none; + padding: 0px; +} + +div.toc li.level1 { + margin-left: 0px; +} + +div.toc li.level2 { + margin-left: 15px; +} + +div.toc li.level3 { + margin-left: 30px; +} + +div.toc li.level4 { + margin-left: 45px; +} + +.inherit_header { + font-weight: bold; + color: gray; + cursor: pointer; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +.inherit_header td { + padding: 6px 0px 2px 5px; +} + +.inherit { + display: none; +} + +tr.heading h2 { + margin-top: 12px; + margin-bottom: 4px; +} + +/* tooltip related style info */ + +.ttc { + position: absolute; + display: none; +} + +#powerTip { + cursor: default; + white-space: nowrap; + background-color: white; + border: 1px solid gray; + border-radius: 4px 4px 4px 4px; + box-shadow: 1px 1px 7px gray; + display: none; + font-size: smaller; + max-width: 80%; + opacity: 0.9; + padding: 1ex 1em 1em; + position: absolute; + z-index: 2147483647; +} + +#powerTip div.ttdoc { + color: grey; + font-style: italic; +} + +#powerTip div.ttname a { + font-weight: bold; +} + +#powerTip div.ttname { + font-weight: bold; +} + +#powerTip div.ttdeci { + color: #006318; +} + +#powerTip div { + margin: 0px; + padding: 0px; + font: 12px/16px Roboto,sans-serif; +} + +#powerTip:before, #powerTip:after { + content: ""; + position: absolute; + margin: 0px; +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.s:after, #powerTip.s:before, +#powerTip.w:after, #powerTip.w:before, +#powerTip.e:after, #powerTip.e:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.nw:after, #powerTip.nw:before, +#powerTip.sw:after, #powerTip.sw:before { + border: solid transparent; + content: " "; + height: 0; + width: 0; + position: absolute; +} + +#powerTip.n:after, #powerTip.s:after, +#powerTip.w:after, #powerTip.e:after, +#powerTip.nw:after, #powerTip.ne:after, +#powerTip.sw:after, #powerTip.se:after { + border-color: rgba(255, 255, 255, 0); +} + +#powerTip.n:before, #powerTip.s:before, +#powerTip.w:before, #powerTip.e:before, +#powerTip.nw:before, #powerTip.ne:before, +#powerTip.sw:before, #powerTip.se:before { + border-color: rgba(128, 128, 128, 0); +} + +#powerTip.n:after, #powerTip.n:before, +#powerTip.ne:after, #powerTip.ne:before, +#powerTip.nw:after, #powerTip.nw:before { + top: 100%; +} + +#powerTip.n:after, #powerTip.ne:after, #powerTip.nw:after { + border-top-color: #ffffff; + border-width: 10px; + margin: 0px -10px; +} +#powerTip.n:before { + border-top-color: #808080; + border-width: 11px; + margin: 0px -11px; +} +#powerTip.n:after, #powerTip.n:before { + left: 50%; +} + +#powerTip.nw:after, #powerTip.nw:before { + right: 14px; +} + +#powerTip.ne:after, #powerTip.ne:before { + left: 14px; +} + +#powerTip.s:after, #powerTip.s:before, +#powerTip.se:after, #powerTip.se:before, +#powerTip.sw:after, #powerTip.sw:before { + bottom: 100%; +} + +#powerTip.s:after, #powerTip.se:after, #powerTip.sw:after { + border-bottom-color: #ffffff; + border-width: 10px; + margin: 0px -10px; +} + +#powerTip.s:before, #powerTip.se:before, #powerTip.sw:before { + border-bottom-color: #808080; + border-width: 11px; + margin: 0px -11px; +} + +#powerTip.s:after, #powerTip.s:before { + left: 50%; +} + +#powerTip.sw:after, #powerTip.sw:before { + right: 14px; +} + +#powerTip.se:after, #powerTip.se:before { + left: 14px; +} + +#powerTip.e:after, #powerTip.e:before { + left: 100%; +} +#powerTip.e:after { + border-left-color: #ffffff; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.e:before { + border-left-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +#powerTip.w:after, #powerTip.w:before { + right: 100%; +} +#powerTip.w:after { + border-right-color: #ffffff; + border-width: 10px; + top: 50%; + margin-top: -10px; +} +#powerTip.w:before { + border-right-color: #808080; + border-width: 11px; + top: 50%; + margin-top: -11px; +} + +@media print +{ + #top { display: none; } + #side-nav { display: none; } + #nav-path { display: none; } + body { overflow:visible; } + h1, h2, h3, h4, h5, h6 { page-break-after: avoid; } + .summary { display: none; } + .memitem { page-break-inside: avoid; } + #doc-content + { + margin-left:0 !important; + height:auto !important; + width:auto !important; + overflow:inherit; + display:inline; + } +} + diff --git a/docs/Driver/html/doxygen.png b/docs/Driver/html/doxygen.png new file mode 100644 index 0000000..3ff17d8 Binary files /dev/null and b/docs/Driver/html/doxygen.png differ diff --git a/docs/Driver/html/driverValidation.html b/docs/Driver/html/driverValidation.html new file mode 100644 index 0000000..cb85f8f --- /dev/null +++ b/docs/Driver/html/driverValidation.html @@ -0,0 +1,195 @@ + + + + + +Driver Validation +CMSIS-Driver: Driver Validation + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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Driver Validation
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The Software Pack named ARM::CMSIS-Driver_Validation contains the following:

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  • Source code of a CMSIS-Driver Validation Suite along with configuration file.
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  • Documentation of the CMSIS-Driver Validation Suite.
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  • Examples that shows the usage of the CMSIS-Driver Validation Suite on various target platforms.
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The CMSIS-Driver Validation Suite performs the following tests:

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  • Generic Validation of API function calls
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  • Validation of Configuration Parameters
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  • Validation of Communication with loopback tests
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  • Validation of Communication Parameters such as baudrate
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  • Validation of Event functions
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The following CMSIS-Drivers can be tested with the current release:

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The Driver Validation output can printed to a console, output via ITM printf, or output to a memory buffer.

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+Sample Test Output

+
CMSIS-Driver Test      Aug 24 2015 15:15:14
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+TEST 01: SPI_GetCapabilities          PASSED
+TEST 02: SPI_Initialization
+  DV_SPI.c(142) - Failed
+TEST 03: SPI_PowerControl             NOT EXECUTED
+  :
+  :
+TEST 23: USART_Send 
+  DV_USART.c(335) - Fail to send 1024 bytes 
+  DV_USART.c(335) - Fail to send 2048 bytes 
+  DV_USART.c(341) - Fail to send without callback 2048 bytes 
+  :
+  :
+Test Summary: 52 Tests: 42 Executed, 22 Failed.
+  653 Test Cases: 56 Errors(s), 12 Warning(s).
+

+Setup for Loop Back Communication

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To perform loop back communication tests it is required to connect the input and the output of the peripherals as shown in this table:

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Peripheral Loop Back Configuration
Ethernet Connect TX+ (Pin 1) with RX+ (Pin 3), TX- (Pin 2) with RX- (Pin 6)
SPI Connect MISO to MOSI
USART Connect TX with RX
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The following picture shows the necessary external loop back connections for the Keil MCBSTM32F400 evaluation board:

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  • SPI: PB14 (SPI2_MISO) and PB15 (SPI2_MOSI)
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  • USART: PB6 (USART1_TX) and PB7 (USART1_RX)
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  • Ethernet: Pin 1 (TX+) and Pin 3 (RX+), Pin 2 (TX-) and Pin 6 (RX-)
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+image006.png +
+Connections for Loop Back Communication Tests on Keil MCBSTM32F400
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+ + + + diff --git a/docs/Driver/html/driver_revisionHistory.html b/docs/Driver/html/driver_revisionHistory.html new file mode 100644 index 0000000..b3635d2 --- /dev/null +++ b/docs/Driver/html/driver_revisionHistory.html @@ -0,0 +1,165 @@ + + + + + +Revision History of CMSIS-Driver +CMSIS-Driver: Revision History of CMSIS-Driver + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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Revision History of CMSIS-Driver
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Version Description
2.6.0
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  • Enhanced CAN-Driver API with explicit BUSOFF state.
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  • Enhanced NAND-Driver API for ECC handling.
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2.05 Modifications compared to Version 2.04:
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  • Changed: All typedefs related to status have been made volatile.
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2.04 Modifications compared to Version 2.03:
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  • Added: template files for CAN interface driver.
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2.03 Modifications compared to Version 2.02: +
2.02 Modifications compared to Version 2.00:
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  • Minor API changes, for exact details refer to the header file of each driver.
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  • Added: Flash Interface, NAND interface.
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2.00 API with non-blocking data transfer, independent of CMSIS-RTOS.
1.10 Initial release
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+ + + + diff --git a/docs/Driver/html/driver_sai_i2s.png b/docs/Driver/html/driver_sai_i2s.png new file mode 100644 index 0000000..1f408c1 Binary files /dev/null and b/docs/Driver/html/driver_sai_i2s.png differ diff --git a/docs/Driver/html/driver_sai_lsb.png b/docs/Driver/html/driver_sai_lsb.png new file mode 100644 index 0000000..402198b Binary files /dev/null and b/docs/Driver/html/driver_sai_lsb.png differ diff --git a/docs/Driver/html/driver_sai_msb.png b/docs/Driver/html/driver_sai_msb.png new file mode 100644 index 0000000..7da0b70 Binary files /dev/null and b/docs/Driver/html/driver_sai_msb.png differ diff --git a/docs/Driver/html/driver_sai_pcm.png b/docs/Driver/html/driver_sai_pcm.png new file mode 100644 index 0000000..eed4160 Binary files /dev/null and b/docs/Driver/html/driver_sai_pcm.png differ diff --git a/docs/Driver/html/driver_sai_user.png b/docs/Driver/html/driver_sai_user.png new file mode 100644 index 0000000..41bb8d5 Binary files /dev/null and b/docs/Driver/html/driver_sai_user.png differ diff --git a/docs/Driver/html/dynsections.js b/docs/Driver/html/dynsections.js new file mode 100644 index 0000000..ed092c7 --- /dev/null +++ b/docs/Driver/html/dynsections.js @@ -0,0 +1,97 @@ +function toggleVisibility(linkObj) +{ + var base = $(linkObj).attr('id'); + var summary = $('#'+base+'-summary'); + var content = $('#'+base+'-content'); + var trigger = $('#'+base+'-trigger'); + var src=$(trigger).attr('src'); + if (content.is(':visible')===true) { + content.hide(); + summary.show(); + $(linkObj).addClass('closed').removeClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-8)+'closed.png'); + } else { + content.show(); + summary.hide(); + $(linkObj).removeClass('closed').addClass('opened'); + $(trigger).attr('src',src.substring(0,src.length-10)+'open.png'); + } + return false; +} + +function updateStripes() +{ + $('table.directory tr'). + removeClass('even').filter(':visible:even').addClass('even'); +} +function toggleLevel(level) +{ + $('table.directory tr').each(function(){ + var l = this.id.split('_').length-1; + var i = $('#img'+this.id.substring(3)); + var a = $('#arr'+this.id.substring(3)); + if (l + + + + +File List +CMSIS-Driver: File List + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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File List
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Here is a list of all files with brief descriptions:
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o*Driver_CAN.c
o*Driver_CAN.h
o*Driver_Common.c
o*Driver_Common.h
o*Driver_ETH.c
o*Driver_ETH.h
o*Driver_ETH_MAC.c
o*Driver_ETH_MAC.h
o*Driver_ETH_PHY.c
o*Driver_ETH_PHY.h
o*Driver_Flash.c
o*Driver_Flash.h
o*Driver_I2C.c
o*Driver_I2C.h
o*Driver_MCI.c
o*Driver_MCI.h
o*Driver_NAND.c
o*Driver_NAND.h
o*Driver_SAI.c
o*Driver_SAI.h
o*Driver_SPI.c
o*Driver_SPI.h
o*Driver_Storage.c
o*Driver_Storage.h
o*Driver_USART.c
o*Driver_USART.h
o*Driver_USB.c
o*Driver_USB.h
o*Driver_USBD.c
o*Driver_USBD.h
o*Driver_USBH.c
\*Driver_USBH.h
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+ + + + diff --git a/docs/Driver/html/ftv2blank.png b/docs/Driver/html/ftv2blank.png new file mode 100644 index 0000000..63c605b Binary files /dev/null and b/docs/Driver/html/ftv2blank.png differ diff --git a/docs/Driver/html/ftv2cl.png b/docs/Driver/html/ftv2cl.png new file mode 100644 index 0000000..132f657 Binary files /dev/null and b/docs/Driver/html/ftv2cl.png differ diff --git a/docs/Driver/html/ftv2doc.png b/docs/Driver/html/ftv2doc.png new file mode 100644 index 0000000..17edabf Binary files /dev/null and b/docs/Driver/html/ftv2doc.png differ diff --git a/docs/Driver/html/ftv2folderclosed.png b/docs/Driver/html/ftv2folderclosed.png new file mode 100644 index 0000000..bb8ab35 Binary files /dev/null and b/docs/Driver/html/ftv2folderclosed.png differ diff --git a/docs/Driver/html/ftv2folderopen.png b/docs/Driver/html/ftv2folderopen.png new file mode 100644 index 0000000..d6c7f67 Binary files /dev/null and b/docs/Driver/html/ftv2folderopen.png differ diff --git a/docs/Driver/html/ftv2lastnode.png b/docs/Driver/html/ftv2lastnode.png new file mode 100644 index 0000000..63c605b Binary files /dev/null and b/docs/Driver/html/ftv2lastnode.png differ diff --git a/docs/Driver/html/ftv2link.png b/docs/Driver/html/ftv2link.png new file mode 100644 index 0000000..17edabf Binary files /dev/null and b/docs/Driver/html/ftv2link.png differ diff --git a/docs/Driver/html/ftv2mlastnode.png b/docs/Driver/html/ftv2mlastnode.png new file mode 100644 index 0000000..0b63f6d Binary files /dev/null and b/docs/Driver/html/ftv2mlastnode.png differ diff --git a/docs/Driver/html/ftv2mnode.png b/docs/Driver/html/ftv2mnode.png new file mode 100644 index 0000000..0b63f6d Binary files /dev/null and b/docs/Driver/html/ftv2mnode.png differ diff --git a/docs/Driver/html/ftv2mo.png b/docs/Driver/html/ftv2mo.png new file mode 100644 index 0000000..4bfb80f Binary files /dev/null and b/docs/Driver/html/ftv2mo.png differ diff --git a/docs/Driver/html/ftv2node.png b/docs/Driver/html/ftv2node.png new file mode 100644 index 0000000..63c605b Binary files /dev/null and b/docs/Driver/html/ftv2node.png differ diff --git a/docs/Driver/html/ftv2ns.png b/docs/Driver/html/ftv2ns.png new file mode 100644 index 0000000..72e3d71 Binary files /dev/null and b/docs/Driver/html/ftv2ns.png differ diff --git a/docs/Driver/html/ftv2plastnode.png b/docs/Driver/html/ftv2plastnode.png new file mode 100644 index 0000000..c6ee22f Binary files /dev/null and b/docs/Driver/html/ftv2plastnode.png differ diff --git a/docs/Driver/html/ftv2pnode.png b/docs/Driver/html/ftv2pnode.png new file mode 100644 index 0000000..c6ee22f Binary files /dev/null and b/docs/Driver/html/ftv2pnode.png differ diff --git a/docs/Driver/html/ftv2splitbar.png b/docs/Driver/html/ftv2splitbar.png new file mode 100644 index 0000000..fe895f2 Binary files /dev/null and b/docs/Driver/html/ftv2splitbar.png differ diff --git a/docs/Driver/html/ftv2vertline.png b/docs/Driver/html/ftv2vertline.png new file mode 100644 index 0000000..63c605b Binary files /dev/null and b/docs/Driver/html/ftv2vertline.png differ diff --git a/docs/Driver/html/functions.html b/docs/Driver/html/functions.html new file mode 100644 index 0000000..27765e8 --- /dev/null +++ b/docs/Driver/html/functions.html @@ -0,0 +1,202 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

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+ + + + diff --git a/docs/Driver/html/functions_b.html b/docs/Driver/html/functions_b.html new file mode 100644 index 0000000..d94ede6 --- /dev/null +++ b/docs/Driver/html/functions_b.html @@ -0,0 +1,184 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
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+ + + + diff --git a/docs/Driver/html/functions_c.html b/docs/Driver/html/functions_c.html new file mode 100644 index 0000000..0e8cc26 --- /dev/null +++ b/docs/Driver/html/functions_c.html @@ -0,0 +1,267 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
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+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

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+ + + + diff --git a/docs/Driver/html/functions_d.html b/docs/Driver/html/functions_d.html new file mode 100644 index 0000000..2cbd491 --- /dev/null +++ b/docs/Driver/html/functions_d.html @@ -0,0 +1,248 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
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+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
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+ + + + diff --git a/docs/Driver/html/functions_dup.js b/docs/Driver/html/functions_dup.js new file mode 100644 index 0000000..78575fb --- /dev/null +++ b/docs/Driver/html/functions_dup.js @@ -0,0 +1,23 @@ +var functions_dup = +[ + [ "a", "functions.html", null ], + [ "b", "functions_b.html", null ], + [ "c", "functions_c.html", null ], + [ "d", "functions_d.html", null ], + [ "e", "functions_e.html", null ], + [ "f", "functions_f.html", null ], + [ "g", "functions_g.html", null ], + [ "h", "functions_h.html", null ], + [ "i", "functions_i.html", null ], + [ "l", "functions_l.html", null ], + [ "m", "functions_m.html", null ], + [ "n", "functions_n.html", null ], + [ "o", "functions_o.html", null ], + [ "p", "functions_p.html", null ], + [ "r", "functions_r.html", null ], + [ "s", "functions_s.html", null ], + [ "t", "functions_t.html", null ], + [ "u", "functions_u.html", null ], + [ "v", "functions_v.html", null ], + [ "w", "functions_w.html", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/functions_e.html b/docs/Driver/html/functions_e.html new file mode 100644 index 0000000..d0f040b --- /dev/null +++ b/docs/Driver/html/functions_e.html @@ -0,0 +1,302 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

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+ + + + diff --git a/docs/Driver/html/functions_f.html b/docs/Driver/html/functions_f.html new file mode 100644 index 0000000..170ab01 --- /dev/null +++ b/docs/Driver/html/functions_f.html @@ -0,0 +1,177 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
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+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

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+ + + + diff --git a/docs/Driver/html/functions_g.html b/docs/Driver/html/functions_g.html new file mode 100644 index 0000000..64413ba --- /dev/null +++ b/docs/Driver/html/functions_g.html @@ -0,0 +1,263 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
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+ + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

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+ + + + diff --git a/docs/Driver/html/functions_h.html b/docs/Driver/html/functions_h.html new file mode 100644 index 0000000..e1b558b --- /dev/null +++ b/docs/Driver/html/functions_h.html @@ -0,0 +1,168 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
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+ + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

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+ + + + diff --git a/docs/Driver/html/functions_i.html b/docs/Driver/html/functions_i.html new file mode 100644 index 0000000..4391840 --- /dev/null +++ b/docs/Driver/html/functions_i.html @@ -0,0 +1,196 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
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+ + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

- i -

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+ + + + diff --git a/docs/Driver/html/functions_l.html b/docs/Driver/html/functions_l.html new file mode 100644 index 0000000..5d9dd98 --- /dev/null +++ b/docs/Driver/html/functions_l.html @@ -0,0 +1,168 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

- l -

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+ + + + diff --git a/docs/Driver/html/functions_m.html b/docs/Driver/html/functions_m.html new file mode 100644 index 0000000..17d28d5 --- /dev/null +++ b/docs/Driver/html/functions_m.html @@ -0,0 +1,219 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

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+ + + + diff --git a/docs/Driver/html/functions_n.html b/docs/Driver/html/functions_n.html new file mode 100644 index 0000000..45ccf20 --- /dev/null +++ b/docs/Driver/html/functions_n.html @@ -0,0 +1,171 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

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+ + + + diff --git a/docs/Driver/html/functions_o.html b/docs/Driver/html/functions_o.html new file mode 100644 index 0000000..8a2c021 --- /dev/null +++ b/docs/Driver/html/functions_o.html @@ -0,0 +1,180 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

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+ + + + diff --git a/docs/Driver/html/functions_p.html b/docs/Driver/html/functions_p.html new file mode 100644 index 0000000..b102efa --- /dev/null +++ b/docs/Driver/html/functions_p.html @@ -0,0 +1,279 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

- p -

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+ + + + diff --git a/docs/Driver/html/functions_r.html b/docs/Driver/html/functions_r.html new file mode 100644 index 0000000..dcaa309 --- /dev/null +++ b/docs/Driver/html/functions_r.html @@ -0,0 +1,291 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

- r -

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+ + + + diff --git a/docs/Driver/html/functions_s.html b/docs/Driver/html/functions_s.html new file mode 100644 index 0000000..86ff13c --- /dev/null +++ b/docs/Driver/html/functions_s.html @@ -0,0 +1,274 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
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Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

- s -

+
+
+ + + + diff --git a/docs/Driver/html/functions_t.html b/docs/Driver/html/functions_t.html new file mode 100644 index 0000000..851ef9a --- /dev/null +++ b/docs/Driver/html/functions_t.html @@ -0,0 +1,207 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

- t -

+
+
+ + + + diff --git a/docs/Driver/html/functions_u.html b/docs/Driver/html/functions_u.html new file mode 100644 index 0000000..2ecfb73 --- /dev/null +++ b/docs/Driver/html/functions_u.html @@ -0,0 +1,208 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

- u -

+
+
+ + + + diff --git a/docs/Driver/html/functions_v.html b/docs/Driver/html/functions_v.html new file mode 100644 index 0000000..7924954 --- /dev/null +++ b/docs/Driver/html/functions_v.html @@ -0,0 +1,200 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

- v -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars.html b/docs/Driver/html/functions_vars.html new file mode 100644 index 0000000..4dd7f1f --- /dev/null +++ b/docs/Driver/html/functions_vars.html @@ -0,0 +1,202 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- a -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars.js b/docs/Driver/html/functions_vars.js new file mode 100644 index 0000000..f04dd3c --- /dev/null +++ b/docs/Driver/html/functions_vars.js @@ -0,0 +1,23 @@ +var functions_vars = +[ + [ "a", "functions_vars.html", null ], + [ "b", "functions_vars_b.html", null ], + [ "c", "functions_vars_c.html", null ], + [ "d", "functions_vars_d.html", null ], + [ "e", "functions_vars_e.html", null ], + [ "f", "functions_vars_f.html", null ], + [ "g", "functions_vars_g.html", null ], + [ "h", "functions_vars_h.html", null ], + [ "i", "functions_vars_i.html", null ], + [ "l", "functions_vars_l.html", null ], + [ "m", "functions_vars_m.html", null ], + [ "n", "functions_vars_n.html", null ], + [ "o", "functions_vars_o.html", null ], + [ "p", "functions_vars_p.html", null ], + [ "r", "functions_vars_r.html", null ], + [ "s", "functions_vars_s.html", null ], + [ "t", "functions_vars_t.html", null ], + [ "u", "functions_vars_u.html", null ], + [ "v", "functions_vars_v.html", null ], + [ "w", "functions_vars_w.html", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/functions_vars_b.html b/docs/Driver/html/functions_vars_b.html new file mode 100644 index 0000000..72a9db1 --- /dev/null +++ b/docs/Driver/html/functions_vars_b.html @@ -0,0 +1,184 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- b -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_c.html b/docs/Driver/html/functions_vars_c.html new file mode 100644 index 0000000..e220550 --- /dev/null +++ b/docs/Driver/html/functions_vars_c.html @@ -0,0 +1,267 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- c -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_d.html b/docs/Driver/html/functions_vars_d.html new file mode 100644 index 0000000..d66cb44 --- /dev/null +++ b/docs/Driver/html/functions_vars_d.html @@ -0,0 +1,248 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- d -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_e.html b/docs/Driver/html/functions_vars_e.html new file mode 100644 index 0000000..03f1980 --- /dev/null +++ b/docs/Driver/html/functions_vars_e.html @@ -0,0 +1,302 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- e -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_f.html b/docs/Driver/html/functions_vars_f.html new file mode 100644 index 0000000..573b2e5 --- /dev/null +++ b/docs/Driver/html/functions_vars_f.html @@ -0,0 +1,177 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- f -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_g.html b/docs/Driver/html/functions_vars_g.html new file mode 100644 index 0000000..4223485 --- /dev/null +++ b/docs/Driver/html/functions_vars_g.html @@ -0,0 +1,263 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- g -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_h.html b/docs/Driver/html/functions_vars_h.html new file mode 100644 index 0000000..872624b --- /dev/null +++ b/docs/Driver/html/functions_vars_h.html @@ -0,0 +1,168 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- h -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_i.html b/docs/Driver/html/functions_vars_i.html new file mode 100644 index 0000000..552750a --- /dev/null +++ b/docs/Driver/html/functions_vars_i.html @@ -0,0 +1,196 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- i -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_l.html b/docs/Driver/html/functions_vars_l.html new file mode 100644 index 0000000..6f1b8b3 --- /dev/null +++ b/docs/Driver/html/functions_vars_l.html @@ -0,0 +1,168 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- l -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_m.html b/docs/Driver/html/functions_vars_m.html new file mode 100644 index 0000000..f82fa06 --- /dev/null +++ b/docs/Driver/html/functions_vars_m.html @@ -0,0 +1,219 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- m -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_n.html b/docs/Driver/html/functions_vars_n.html new file mode 100644 index 0000000..1d845ab --- /dev/null +++ b/docs/Driver/html/functions_vars_n.html @@ -0,0 +1,171 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- n -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_o.html b/docs/Driver/html/functions_vars_o.html new file mode 100644 index 0000000..b178a90 --- /dev/null +++ b/docs/Driver/html/functions_vars_o.html @@ -0,0 +1,180 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- o -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_p.html b/docs/Driver/html/functions_vars_p.html new file mode 100644 index 0000000..c43a198 --- /dev/null +++ b/docs/Driver/html/functions_vars_p.html @@ -0,0 +1,279 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- p -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_r.html b/docs/Driver/html/functions_vars_r.html new file mode 100644 index 0000000..1f98c8f --- /dev/null +++ b/docs/Driver/html/functions_vars_r.html @@ -0,0 +1,291 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- r -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_s.html b/docs/Driver/html/functions_vars_s.html new file mode 100644 index 0000000..605640a --- /dev/null +++ b/docs/Driver/html/functions_vars_s.html @@ -0,0 +1,274 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- s -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_t.html b/docs/Driver/html/functions_vars_t.html new file mode 100644 index 0000000..79e403c --- /dev/null +++ b/docs/Driver/html/functions_vars_t.html @@ -0,0 +1,207 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- t -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_u.html b/docs/Driver/html/functions_vars_u.html new file mode 100644 index 0000000..ad3603d --- /dev/null +++ b/docs/Driver/html/functions_vars_u.html @@ -0,0 +1,208 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- u -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_v.html b/docs/Driver/html/functions_vars_v.html new file mode 100644 index 0000000..8a77cae --- /dev/null +++ b/docs/Driver/html/functions_vars_v.html @@ -0,0 +1,200 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- v -

+
+
+ + + + diff --git a/docs/Driver/html/functions_vars_w.html b/docs/Driver/html/functions_vars_w.html new file mode 100644 index 0000000..46f86d4 --- /dev/null +++ b/docs/Driver/html/functions_vars_w.html @@ -0,0 +1,177 @@ + + + + + +Data Fields - Variables +CMSIS-Driver: Data Fields - Variables + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- w -

+
+
+ + + + diff --git a/docs/Driver/html/functions_w.html b/docs/Driver/html/functions_w.html new file mode 100644 index 0000000..b39ef56 --- /dev/null +++ b/docs/Driver/html/functions_w.html @@ -0,0 +1,177 @@ + + + + + +Data Fields +CMSIS-Driver: Data Fields + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
Here is a list of all struct and union fields with links to the structures/unions they belong to:
+ +

- w -

+
+
+ + + + diff --git a/docs/Driver/html/globals.html b/docs/Driver/html/globals.html new file mode 100644 index 0000000..5800d39 --- /dev/null +++ b/docs/Driver/html/globals.html @@ -0,0 +1,166 @@ + + + + + +Globals +CMSIS-Driver: Globals + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
+ +

- _ -

+
+
+ + + + diff --git a/docs/Driver/html/globals_c.html b/docs/Driver/html/globals_c.html new file mode 100644 index 0000000..d8c709c --- /dev/null +++ b/docs/Driver/html/globals_c.html @@ -0,0 +1,424 @@ + + + + + +Globals +CMSIS-Driver: Globals + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
+ +

- c -

+
+
+ + + + diff --git a/docs/Driver/html/globals_d.html b/docs/Driver/html/globals_d.html new file mode 100644 index 0000000..0632cc6 --- /dev/null +++ b/docs/Driver/html/globals_d.html @@ -0,0 +1,190 @@ + + + + + +Globals +CMSIS-Driver: Globals + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:
+ +

- d -

+
+
+ + + + diff --git a/docs/Driver/html/globals_defs.html b/docs/Driver/html/globals_defs.html new file mode 100644 index 0000000..95226b6 --- /dev/null +++ b/docs/Driver/html/globals_defs.html @@ -0,0 +1,165 @@ + + + + + +Globals +CMSIS-Driver: Globals + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- _ -

+
+
+ + + + diff --git a/docs/Driver/html/globals_defs_c.html b/docs/Driver/html/globals_defs_c.html new file mode 100644 index 0000000..9bda5bb --- /dev/null +++ b/docs/Driver/html/globals_defs_c.html @@ -0,0 +1,297 @@ + + + + + +Globals +CMSIS-Driver: Globals + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- c -

+
+
+ + + + diff --git a/docs/Driver/html/globals_defs_d.html b/docs/Driver/html/globals_defs_d.html new file mode 100644 index 0000000..60dcaa9 --- /dev/null +++ b/docs/Driver/html/globals_defs_d.html @@ -0,0 +1,189 @@ + + + + + +Globals +CMSIS-Driver: Globals + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- d -

+
+
+ + + + diff --git a/docs/Driver/html/globals_defs_e.html b/docs/Driver/html/globals_defs_e.html new file mode 100644 index 0000000..824eb6a --- /dev/null +++ b/docs/Driver/html/globals_defs_e.html @@ -0,0 +1,330 @@ + + + + + +Globals +CMSIS-Driver: Globals + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+  + +

- e -

+
+
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+ + + + diff --git a/docs/Driver/html/group__CAN__events.html b/docs/Driver/html/group__CAN__events.html new file mode 100644 index 0000000..59f3eb1 --- /dev/null +++ b/docs/Driver/html/group__CAN__events.html @@ -0,0 +1,196 @@ + + + + + +CAN Object Events +CMSIS-Driver: CAN Object Events + + + + + + + + + + + + + + +
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CAN Object Events
CAN Interface
+
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+ +

Callback objects events notified via ARM_CAN_SignalObjectEvent. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_CAN_EVENT_SEND_COMPLETE   (1UL << 0)
 Send complete. More...
 
#define ARM_CAN_EVENT_RECEIVE   (1UL << 1)
 Message received. More...
 
#define ARM_CAN_EVENT_RECEIVE_OVERRUN   (1UL << 2)
 Received message overrun. More...
 
+

Description

+

Callback objects events notified via ARM_CAN_SignalObjectEvent.

+

The CAN driver generates callback objects events that are notified via the function ARM_CAN_SignalObjectEvent.

+

The following callback notification object events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_CAN_EVENT_SEND_COMPLETE   (1UL << 0)
+
+ +

Send complete.

+
See Also
ARM_CAN_SignalObjectEvent
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_EVENT_RECEIVE   (1UL << 1)
+
+ +

Message received.

+
See Also
ARM_CAN_SignalObjectEvent
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_EVENT_RECEIVE_OVERRUN   (1UL << 2)
+
+ +

Received message overrun.

+
See Also
ARM_CAN_SignalObjectEvent
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__CAN__events.js b/docs/Driver/html/group__CAN__events.js new file mode 100644 index 0000000..6a96156 --- /dev/null +++ b/docs/Driver/html/group__CAN__events.js @@ -0,0 +1,6 @@ +var group__CAN__events = +[ + [ "ARM_CAN_EVENT_SEND_COMPLETE", "group__CAN__events.html#ga486f0f35ebc7e3b5931ee68b56703503", null ], + [ "ARM_CAN_EVENT_RECEIVE", "group__CAN__events.html#ga2c1082561eeae3b2b8132e81fc241e47", null ], + [ "ARM_CAN_EVENT_RECEIVE_OVERRUN", "group__CAN__events.html#ga6c2d29b5c49d5cd18e97f5931157a94c", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__CAN__unit__events.html b/docs/Driver/html/group__CAN__unit__events.html new file mode 100644 index 0000000..eaa47b3 --- /dev/null +++ b/docs/Driver/html/group__CAN__unit__events.html @@ -0,0 +1,232 @@ + + + + + +CAN Unit Events +CMSIS-Driver: CAN Unit Events + + + + + + + + + + + + + + +
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CAN Unit Events
CAN Interface
+
+
+ +

Callback unit events notified via ARM_CAN_SignalUnitEvent. +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_CAN_EVENT_UNIT_INACTIVE   (0U)
 Unit entered Inactive state. More...
 
#define ARM_CAN_EVENT_UNIT_ACTIVE   (1U)
 Unit entered Error Active state. More...
 
#define ARM_CAN_EVENT_UNIT_WARNING   (2U)
 Unit entered Error Warning state (one or both error counters >= 96) More...
 
#define ARM_CAN_EVENT_UNIT_PASSIVE   (3U)
 Unit entered Error Passive state. More...
 
#define ARM_CAN_EVENT_UNIT_BUS_OFF   (4U)
 Unit entered Bus-off state. More...
 
+

Description

+

Callback unit events notified via ARM_CAN_SignalUnitEvent.

+

The CAN driver generates callback unit events that are notified via the function ARM_CAN_SignalUnitEvent.

+

The following callback notification unit events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_CAN_EVENT_UNIT_INACTIVE   (0U)
+
+ +

Unit entered Inactive state.

+
See Also
ARM_CAN_SignalUnitEvent
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_EVENT_UNIT_ACTIVE   (1U)
+
+ +

Unit entered Error Active state.

+
See Also
ARM_CAN_SignalUnitEvent
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_EVENT_UNIT_WARNING   (2U)
+
+ +

Unit entered Error Warning state (one or both error counters >= 96)

+
See Also
ARM_CAN_SignalUnitEvent
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_EVENT_UNIT_PASSIVE   (3U)
+
+ +

Unit entered Error Passive state.

+
See Also
ARM_CAN_SignalUnitEvent
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_EVENT_UNIT_BUS_OFF   (4U)
+
+ +

Unit entered Bus-off state.

+
See Also
ARM_CAN_SignalUnitEvent
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__CAN__unit__events.js b/docs/Driver/html/group__CAN__unit__events.js new file mode 100644 index 0000000..66dbab4 --- /dev/null +++ b/docs/Driver/html/group__CAN__unit__events.js @@ -0,0 +1,8 @@ +var group__CAN__unit__events = +[ + [ "ARM_CAN_EVENT_UNIT_INACTIVE", "group__CAN__unit__events.html#gaa2347c172c8a8f42ac66cb42cd7a08db", null ], + [ "ARM_CAN_EVENT_UNIT_ACTIVE", "group__CAN__unit__events.html#ga0e65231ccb20684d7c8eac80385f8c18", null ], + [ "ARM_CAN_EVENT_UNIT_WARNING", "group__CAN__unit__events.html#ga3690f864edd2e124f4f9875fdde9a2eb", null ], + [ "ARM_CAN_EVENT_UNIT_PASSIVE", "group__CAN__unit__events.html#ga9c529d6697fe21e69639224322f8c4b4", null ], + [ "ARM_CAN_EVENT_UNIT_BUS_OFF", "group__CAN__unit__events.html#gafa4f992a97b4ca0f079aec2990a69bed", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__ETH__MAC__events.html b/docs/Driver/html/group__ETH__MAC__events.html new file mode 100644 index 0000000..dafe5c0 --- /dev/null +++ b/docs/Driver/html/group__ETH__MAC__events.html @@ -0,0 +1,210 @@ + + + + + +Ethernet MAC Events +CMSIS-Driver: Ethernet MAC Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Ethernet MAC Events
Ethernet MAC Interface
+
+
+ +

The Ethernet MAC driver generates call back events that are notified via the function ARM_ETH_MAC_SignalEvent. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_ETH_MAC_EVENT_RX_FRAME   (1UL << 0)
 Frame Received. More...
 
#define ARM_ETH_MAC_EVENT_TX_FRAME   (1UL << 1)
 Frame Transmitted. More...
 
#define ARM_ETH_MAC_EVENT_WAKEUP   (1UL << 2)
 Wake-up (on Magic Packet) More...
 
#define ARM_ETH_MAC_EVENT_TIMER_ALARM   (1UL << 3)
 Timer Alarm. More...
 
+

Description

+

The Ethernet MAC driver generates call back events that are notified via the function ARM_ETH_MAC_SignalEvent.

+

This section provides the event values for the ARM_ETH_MAC_SignalEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_MAC_EVENT_RX_FRAME   (1UL << 0)
+
+ +

Frame Received.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_EVENT_TX_FRAME   (1UL << 1)
+
+ +

Frame Transmitted.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_EVENT_WAKEUP   (1UL << 2)
+
+ +

Wake-up (on Magic Packet)

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_EVENT_TIMER_ALARM   (1UL << 3)
+
+ +

Timer Alarm.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__ETH__MAC__events.js b/docs/Driver/html/group__ETH__MAC__events.js new file mode 100644 index 0000000..72ff2d7 --- /dev/null +++ b/docs/Driver/html/group__ETH__MAC__events.js @@ -0,0 +1,7 @@ +var group__ETH__MAC__events = +[ + [ "ARM_ETH_MAC_EVENT_RX_FRAME", "group__ETH__MAC__events.html#ga76943471a4a3e9e8c1ff9fe83e43bd47", null ], + [ "ARM_ETH_MAC_EVENT_TX_FRAME", "group__ETH__MAC__events.html#ga0c0328ff7cf886d5fdb53bb84ec03c1b", null ], + [ "ARM_ETH_MAC_EVENT_WAKEUP", "group__ETH__MAC__events.html#ga1f3bdb219afa8f2a121b58cc84f5761c", null ], + [ "ARM_ETH_MAC_EVENT_TIMER_ALARM", "group__ETH__MAC__events.html#ga4afc71ecac964f195e27be4acdbe7c61", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__Flash__events.html b/docs/Driver/html/group__Flash__events.html new file mode 100644 index 0000000..b480ba2 --- /dev/null +++ b/docs/Driver/html/group__Flash__events.html @@ -0,0 +1,176 @@ + + + + + +Flash Events +CMSIS-Driver: Flash Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Flash Events
Flash Interface
+
+
+ +

The Flash driver generates call back events that are notified via the function ARM_Flash_SignalEvent. +More...

+ + + + + + + + +

+Macros

#define ARM_FLASH_EVENT_READY   (1UL << 0)
 Flash Ready. More...
 
#define ARM_FLASH_EVENT_ERROR   (1UL << 1)
 Read/Program/Erase Error. More...
 
+

Description

+

The Flash driver generates call back events that are notified via the function ARM_Flash_SignalEvent.

+

This section provides the event values for the ARM_Flash_SignalEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_FLASH_EVENT_READY   (1UL << 0)
+
+ +

Flash Ready.

+ +
+
+ +
+
+ + + + +
#define ARM_FLASH_EVENT_ERROR   (1UL << 1)
+
+ +

Read/Program/Erase Error.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__Flash__events.js b/docs/Driver/html/group__Flash__events.js new file mode 100644 index 0000000..f03639c --- /dev/null +++ b/docs/Driver/html/group__Flash__events.js @@ -0,0 +1,5 @@ +var group__Flash__events = +[ + [ "ARM_FLASH_EVENT_READY", "group__Flash__events.html#gaf7a9c4ad125ee90df35907d861151e23", null ], + [ "ARM_FLASH_EVENT_ERROR", "group__Flash__events.html#ga0dfea52761c0eed83e5d73e7a7f69962", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__I2C__events.html b/docs/Driver/html/group__I2C__events.html new file mode 100644 index 0000000..5ed356a --- /dev/null +++ b/docs/Driver/html/group__I2C__events.html @@ -0,0 +1,295 @@ + + + + + +I2C Events +CMSIS-Driver: I2C Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
I2C Events
I2C Interface
+
+
+ +

The I2C driver generates call back events that are notified via the function ARM_I2C_SignalEvent. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_I2C_EVENT_TRANSFER_DONE   (1UL << 0)
 Master/Slave Transmit/Receive finished. More...
 
#define ARM_I2C_EVENT_TRANSFER_INCOMPLETE   (1UL << 1)
 Master/Slave Transmit/Receive incomplete transfer. More...
 
#define ARM_I2C_EVENT_SLAVE_TRANSMIT   (1UL << 2)
 Addressed as Slave Transmitter but transmit operation is not set. More...
 
#define ARM_I2C_EVENT_SLAVE_RECEIVE   (1UL << 3)
 Addressed as Slave Receiver but receive operation is not set. More...
 
#define ARM_I2C_EVENT_ADDRESS_NACK   (1UL << 4)
 Address not acknowledged from Slave. More...
 
#define ARM_I2C_EVENT_GENERAL_CALL   (1UL << 5)
 Slave addressed with general call address. More...
 
#define ARM_I2C_EVENT_ARBITRATION_LOST   (1UL << 6)
 Master lost arbitration. More...
 
#define ARM_I2C_EVENT_BUS_ERROR   (1UL << 7)
 Bus error detected (START/STOP at illegal position) More...
 
#define ARM_I2C_EVENT_BUS_CLEAR   (1UL << 8)
 Bus clear finished. More...
 
+

Description

+

The I2C driver generates call back events that are notified via the function ARM_I2C_SignalEvent.

+

This section provides the event values for the ARM_I2C_SignalEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_I2C_EVENT_TRANSFER_DONE   (1UL << 0)
+
+ +

Master/Slave Transmit/Receive finished.

+ +
+
+ +
+
+ + + + +
#define ARM_I2C_EVENT_TRANSFER_INCOMPLETE   (1UL << 1)
+
+ +

Master/Slave Transmit/Receive incomplete transfer.

+ +
+
+ +
+
+ + + + +
#define ARM_I2C_EVENT_SLAVE_TRANSMIT   (1UL << 2)
+
+ +

Addressed as Slave Transmitter but transmit operation is not set.

+ +
+
+ +
+
+ + + + +
#define ARM_I2C_EVENT_SLAVE_RECEIVE   (1UL << 3)
+
+ +

Addressed as Slave Receiver but receive operation is not set.

+ +
+
+ +
+
+ + + + +
#define ARM_I2C_EVENT_ADDRESS_NACK   (1UL << 4)
+
+ +

Address not acknowledged from Slave.

+ +
+
+ +
+
+ + + + +
#define ARM_I2C_EVENT_GENERAL_CALL   (1UL << 5)
+
+ +

Slave addressed with general call address.

+ +
+
+ +
+
+ + + + +
#define ARM_I2C_EVENT_ARBITRATION_LOST   (1UL << 6)
+
+ +

Master lost arbitration.

+ +
+
+ +
+
+ + + + +
#define ARM_I2C_EVENT_BUS_ERROR   (1UL << 7)
+
+ +

Bus error detected (START/STOP at illegal position)

+ +
+
+ +
+
+ + + + +
#define ARM_I2C_EVENT_BUS_CLEAR   (1UL << 8)
+
+ +

Bus clear finished.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__I2C__events.js b/docs/Driver/html/group__I2C__events.js new file mode 100644 index 0000000..571f229 --- /dev/null +++ b/docs/Driver/html/group__I2C__events.js @@ -0,0 +1,12 @@ +var group__I2C__events = +[ + [ "ARM_I2C_EVENT_TRANSFER_DONE", "group__I2C__events.html#ga5992dc0f6e839c4d066cfa83d535f30d", null ], + [ "ARM_I2C_EVENT_TRANSFER_INCOMPLETE", "group__I2C__events.html#gafac3989c7b57727e1bed4ee9f2496ac9", null ], + [ "ARM_I2C_EVENT_SLAVE_TRANSMIT", "group__I2C__events.html#gacfbbec9af083d35e8ea87ad16e9c6ec2", null ], + [ "ARM_I2C_EVENT_SLAVE_RECEIVE", "group__I2C__events.html#gabd875b57ce39dadd849c53b885ad6661", null ], + [ "ARM_I2C_EVENT_ADDRESS_NACK", "group__I2C__events.html#ga98b815769634d9578526b43589caa017", null ], + [ "ARM_I2C_EVENT_GENERAL_CALL", "group__I2C__events.html#ga3ab54410b6410ed3a58762ff0c0d68b9", null ], + [ "ARM_I2C_EVENT_ARBITRATION_LOST", "group__I2C__events.html#gac9000f44a578e2117d64dbc2093cec6d", null ], + [ "ARM_I2C_EVENT_BUS_ERROR", "group__I2C__events.html#gaeef542840355131c18b53fd9ed1904a8", null ], + [ "ARM_I2C_EVENT_BUS_CLEAR", "group__I2C__events.html#ga81ca21fad73dac1ffaff58921f848ea9", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__NAND__events.html b/docs/Driver/html/group__NAND__events.html new file mode 100644 index 0000000..b9bf187 --- /dev/null +++ b/docs/Driver/html/group__NAND__events.html @@ -0,0 +1,210 @@ + + + + + +NAND Events +CMSIS-Driver: NAND Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
NAND Events
NAND Interface
+
+
+ +

The NAND driver generates call back events that are notified via the function ARM_NAND_SignalEvent. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_NAND_EVENT_DEVICE_READY   (1UL << 0)
 Device Ready: R/Bn rising edge. More...
 
#define ARM_NAND_EVENT_DRIVER_READY   (1UL << 1)
 Driver Ready. More...
 
#define ARM_NAND_EVENT_DRIVER_DONE   (1UL << 2)
 Driver operation done. More...
 
#define ARM_NAND_EVENT_ECC_ERROR   (1UL << 3)
 ECC could not correct data. More...
 
+

Description

+

The NAND driver generates call back events that are notified via the function ARM_NAND_SignalEvent.

+

This section provides the event values for the ARM_NAND_SignalEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_NAND_EVENT_DEVICE_READY   (1UL << 0)
+
+ +

Device Ready: R/Bn rising edge.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_EVENT_DRIVER_READY   (1UL << 1)
+
+ +

Driver Ready.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_EVENT_DRIVER_DONE   (1UL << 2)
+
+ +

Driver operation done.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_EVENT_ECC_ERROR   (1UL << 3)
+
+ +

ECC could not correct data.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__NAND__events.js b/docs/Driver/html/group__NAND__events.js new file mode 100644 index 0000000..2c3bcfb --- /dev/null +++ b/docs/Driver/html/group__NAND__events.js @@ -0,0 +1,7 @@ +var group__NAND__events = +[ + [ "ARM_NAND_EVENT_DEVICE_READY", "group__NAND__events.html#gae0be7e1b41188def905de0a1568d442d", null ], + [ "ARM_NAND_EVENT_DRIVER_READY", "group__NAND__events.html#ga7b390a906db42c5ea4db38e0e85bb9e9", null ], + [ "ARM_NAND_EVENT_DRIVER_DONE", "group__NAND__events.html#gac774a334871789d24107b843d1ebd00c", null ], + [ "ARM_NAND_EVENT_ECC_ERROR", "group__NAND__events.html#ga7bee0c32528ab991c0c064f895f80664", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__SAI__events.html b/docs/Driver/html/group__SAI__events.html new file mode 100644 index 0000000..539f2aa --- /dev/null +++ b/docs/Driver/html/group__SAI__events.html @@ -0,0 +1,227 @@ + + + + + +SAI Events +CMSIS-Driver: SAI Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Events
SAI Interface
+
+
+ +

The SAI driver generates call back events that are notified via the function ARM_SAI_SignalEvent. +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SAI_EVENT_SEND_COMPLETE   (1U << 0)
 Send completed. More...
 
#define ARM_SAI_EVENT_RECEIVE_COMPLETE   (1U << 1)
 Receive completed. More...
 
#define ARM_SAI_EVENT_TX_UNDERFLOW   (1U << 2)
 Transmit data not available. More...
 
#define ARM_SAI_EVENT_RX_OVERFLOW   (1U << 3)
 Receive data overflow. More...
 
#define ARM_SAI_EVENT_FRAME_ERROR   (1U << 4)
 Sync Frame error in Slave mode (optional) More...
 
+

Description

+

The SAI driver generates call back events that are notified via the function ARM_SAI_SignalEvent.

+

This section provides the event values for the ARM_SAI_SignalEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_EVENT_SEND_COMPLETE   (1U << 0)
+
+ +

Send completed.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_EVENT_RECEIVE_COMPLETE   (1U << 1)
+
+ +

Receive completed.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_EVENT_TX_UNDERFLOW   (1U << 2)
+
+ +

Transmit data not available.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_EVENT_RX_OVERFLOW   (1U << 3)
+
+ +

Receive data overflow.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_EVENT_FRAME_ERROR   (1U << 4)
+
+ +

Sync Frame error in Slave mode (optional)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__SAI__events.js b/docs/Driver/html/group__SAI__events.js new file mode 100644 index 0000000..248d974 --- /dev/null +++ b/docs/Driver/html/group__SAI__events.js @@ -0,0 +1,8 @@ +var group__SAI__events = +[ + [ "ARM_SAI_EVENT_SEND_COMPLETE", "group__SAI__events.html#ga3dfa64375859f40d157c224187d2885e", null ], + [ "ARM_SAI_EVENT_RECEIVE_COMPLETE", "group__SAI__events.html#ga5a9bde0b096aafe53279529a0adbef55", null ], + [ "ARM_SAI_EVENT_TX_UNDERFLOW", "group__SAI__events.html#ga6a0be7aaf9d700e5259f741641bc37ca", null ], + [ "ARM_SAI_EVENT_RX_OVERFLOW", "group__SAI__events.html#gac83e9df0238803ef2c88f16605f73bf5", null ], + [ "ARM_SAI_EVENT_FRAME_ERROR", "group__SAI__events.html#ga6ffcf96fe404b48421a57fbd122b26bc", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__SPI__control.html b/docs/Driver/html/group__SPI__control.html new file mode 100644 index 0000000..bdf5a4b --- /dev/null +++ b/docs/Driver/html/group__SPI__control.html @@ -0,0 +1,167 @@ + + + + + +SPI Control Codes +CMSIS-Driver: SPI Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
SPI Control Codes
SPI Interface
+
+
+ +

Many parameters of the SPI driver are configured using the ARM_SPI_Control function. +More...

+ + + + + + + + + + + + + + + + + + + + +

+Content

 SPI Mode Controls
 Specifies SPI mode.
 
 SPI Frame Format
 Defines the frame format.
 
 SPI Data Bits
 Defines the number of data bits.
 
 SPI Bit Order
 Defines the bit order.
 
 SPI Slave Select Mode
 Specifies SPI slave select mode.
 
 SPI Miscellaneous Controls
 Specifies additional miscellaneous controls.
 
+

Description

+

Many parameters of the SPI driver are configured using the ARM_SPI_Control function.

+

The various SPI control codes define:

+ +

Refer to the ARM_SPI_Control function for further details.

+
+
+ + + + diff --git a/docs/Driver/html/group__SPI__control.js b/docs/Driver/html/group__SPI__control.js new file mode 100644 index 0000000..98b531a --- /dev/null +++ b/docs/Driver/html/group__SPI__control.js @@ -0,0 +1,9 @@ +var group__SPI__control = +[ + [ "SPI Mode Controls", "group__spi__mode__ctrls.html", "group__spi__mode__ctrls" ], + [ "SPI Frame Format", "group__spi__frame__format__ctrls.html", "group__spi__frame__format__ctrls" ], + [ "SPI Data Bits", "group__spi__data__bits__ctrls.html", "group__spi__data__bits__ctrls" ], + [ "SPI Bit Order", "group__spi__bit__order__ctrls.html", "group__spi__bit__order__ctrls" ], + [ "SPI Slave Select Mode", "group__spi__slave__select__mode__ctrls.html", "group__spi__slave__select__mode__ctrls" ], + [ "SPI Miscellaneous Controls", "group__spi__misc__ctrls.html", "group__spi__misc__ctrls" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__SPI__events.html b/docs/Driver/html/group__SPI__events.html new file mode 100644 index 0000000..eacb3f0 --- /dev/null +++ b/docs/Driver/html/group__SPI__events.html @@ -0,0 +1,193 @@ + + + + + +SPI Events +CMSIS-Driver: SPI Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SPI Events
SPI Interface
+
+
+ +

The SPI driver generates call back events that are notified via the function ARM_SPI_SignalEvent. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_SPI_EVENT_TRANSFER_COMPLETE   (1UL << 0)
 Data Transfer completed. More...
 
#define ARM_SPI_EVENT_DATA_LOST   (1UL << 1)
 Data lost: Receive overflow / Transmit underflow. More...
 
#define ARM_SPI_EVENT_MODE_FAULT   (1UL << 2)
 Master Mode Fault (SS deactivated when Master) More...
 
+

Description

+

The SPI driver generates call back events that are notified via the function ARM_SPI_SignalEvent.

+

This section provides the event values for the ARM_SPI_SignalEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SPI_EVENT_TRANSFER_COMPLETE   (1UL << 0)
+
+ +

Data Transfer completed.

+ +
+
+ +
+
+ + + + +
#define ARM_SPI_EVENT_DATA_LOST   (1UL << 1)
+
+ +

Data lost: Receive overflow / Transmit underflow.

+ +
+
+ +
+
+ + + + +
#define ARM_SPI_EVENT_MODE_FAULT   (1UL << 2)
+
+ +

Master Mode Fault (SS deactivated when Master)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__SPI__events.js b/docs/Driver/html/group__SPI__events.js new file mode 100644 index 0000000..8565a88 --- /dev/null +++ b/docs/Driver/html/group__SPI__events.js @@ -0,0 +1,6 @@ +var group__SPI__events = +[ + [ "ARM_SPI_EVENT_TRANSFER_COMPLETE", "group__SPI__events.html#gaabdfc9e17641144cd50d36d15511a1b8", null ], + [ "ARM_SPI_EVENT_DATA_LOST", "group__SPI__events.html#ga8e63d99c80ea56de596a8d0a51fd8244", null ], + [ "ARM_SPI_EVENT_MODE_FAULT", "group__SPI__events.html#ga7eaa229003689aa18598273490b3e630", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__SampleUseOfStorageDriver.html b/docs/Driver/html/group__SampleUseOfStorageDriver.html new file mode 100644 index 0000000..5761485 --- /dev/null +++ b/docs/Driver/html/group__SampleUseOfStorageDriver.html @@ -0,0 +1,279 @@ + + + + + +Sample Use of Storage Driver +CMSIS-Driver: Sample Use of Storage Driver + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Sample Use of Storage Driver
Storage Interface
+
+
+

Example Code:

+

The following is a generic algorithm to erase and program one ARM_STORAGE_BLOCK_ATTRIBUTES::erase_unit worth of storage and then read it back to be verified. It handles both synchronous and asynchronous driver implementations.

+
// Copyright (c) 2006-2016, Arm Limited, All Rights Reserved
+
// SPDX-License-Identifier: Apache-2.0
+
//
+
// Licensed under the Apache License, Version 2.0 (the "License"); you may
+
// not use this file except in compliance with the License.
+
// You may obtain a copy of the License at
+
//
+
// http:// www.apache.org/licenses/LICENSE-2.0
+
//
+
// Unless required by applicable law or agreed to in writing, software
+
// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+
// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+
// See the License for the specific language governing permissions and
+
// limitations under the License.
+
+
#include "Driver_Storage.h"
+
#include <stdio.h>
+
#include <string.h>
+
+
#define TEST_ASSERT(Expr) if (!(Expr)) { printf("%s:%u: assertion failure\n", __FUNCTION__, __LINE__); while (1) ;}
+
#define TEST_ASSERT_EQUAL(expected, actual) if ((expected) != (actual)) {printf("%s:%u: assertion failure\n", __FUNCTION__, __LINE__); while (1) ;}
+
#define TEST_ASSERT_NOT_EQUAL(expected, actual) if ((expected) == (actual)) {printf("%s:%u: assertion failure\n", __FUNCTION__, __LINE__); while (1) ;}
+
+
// forward declarations
+
void callbackHandler(int32_t status, ARM_STORAGE_OPERATION operation);
+
void progressStateMachine(void);
+
+
static enum {
+
NEEDS_INITIALIZATION,
+
NEEDS_ERASE,
+
NEEDS_PROGRAMMING,
+
NEEDS_READ,
+
NEEDS_VERIFICATION_FOLLOWING_READ,
+
FINISHED
+
} state;
+
+
extern ARM_DRIVER_STORAGE ARM_Driver_Storage_(0);
+
ARM_DRIVER_STORAGE *drv = &ARM_Driver_Storage_(0);
+
+
static const unsigned BUFFER_SIZE = 16384;
+
static uint8_t buffer[BUFFER_SIZE];
+
+
void main(int argc __unused, char** argv __unused)
+
{
+
state = NEEDS_INITIALIZATION;
+
+
progressStateMachine();
+
while (true) {
+
// WFE(); // optional low-power sleep
+
}
+
}
+
+
void progressStateMachine(void)
+
{
+
int32_t rc;
+
+
static ARM_STORAGE_BLOCK firstBlock;
+
if (!ARM_STORAGE_VALID_BLOCK(&firstBlock)) {
+
// Get the first block. This block is entered only once.
+
rc = drv->GetNextBlock(NULL, &firstBlock); // get first block
+
TEST_ASSERT_EQUAL(ARM_DRIVER_OK, rc);
+
}
+
TEST_ASSERT(ARM_STORAGE_VALID_BLOCK(&firstBlock));
+
TEST_ASSERT(firstBlock.size > 0);
+
+
switch (state) {
+
case NEEDS_INITIALIZATION:
+
rc = drv->Initialize(callbackHandler);
+
TEST_ASSERT(rc >= ARM_DRIVER_OK);
+
if (rc == ARM_DRIVER_OK) {
+
TEST_ASSERT_EQUAL(1, drv->GetCapabilities().asynchronous_ops);
+
state = NEEDS_ERASE;
+
return; // there is pending asynchronous activity which will lead to a completion callback later.
+
}
+
TEST_ASSERT_EQUAL(1, rc); // synchronous completion
+
+
// intentional fall-through
+
+
case NEEDS_ERASE:
+
TEST_ASSERT(firstBlock.attributes.erase_unit > 0);
+
rc = drv->Erase(firstBlock.addr, firstBlock.attributes.erase_unit);
+
TEST_ASSERT(rc >= ARM_DRIVER_OK);
+
if (rc == ARM_DRIVER_OK) {
+
TEST_ASSERT_EQUAL(1, drv->GetCapabilities().asynchronous_ops);
+
state = NEEDS_PROGRAMMING;
+
return; // there is pending asynchronous activity which will lead to a completion callback later.
+
}
+
TEST_ASSERT_EQUAL(firstBlock.attributes.erase_unit, (uint32_t)rc); // synchronous completion
+
+
// intentional fall-through
+
+
case NEEDS_PROGRAMMING:
+
TEST_ASSERT(BUFFER_SIZE >= firstBlock.attributes.erase_unit);
+
#define PATTERN 0xAA
+
memset(buffer, PATTERN, firstBlock.attributes.erase_unit);
+
rc = drv->ProgramData(firstBlock.addr, buffer, firstBlock.attributes.erase_unit);
+
TEST_ASSERT(rc >= ARM_DRIVER_OK);
+
if (rc == ARM_DRIVER_OK) {
+
TEST_ASSERT_EQUAL(1, drv->GetCapabilities().asynchronous_ops);
+
state = NEEDS_READ;
+
return; // there is pending asynchronous activity which will lead to a completion callback later.
+
}
+
TEST_ASSERT_EQUAL(firstBlock.attributes.erase_unit, (uint32_t)rc); // synchronous completion
+
+
// intentional fall-through
+
+
case NEEDS_READ:
+
rc = drv->ReadData(firstBlock.addr, buffer, firstBlock.attributes.erase_unit);
+
TEST_ASSERT(rc >= ARM_DRIVER_OK);
+
if (rc == ARM_DRIVER_OK) {
+
TEST_ASSERT_EQUAL(1, drv->GetCapabilities().asynchronous_ops);
+
state = NEEDS_VERIFICATION_FOLLOWING_READ;
+
return; // there is pending asynchronous activity which will lead to a completion callback later.
+
}
+
TEST_ASSERT_EQUAL(firstBlock.attributes.erase_unit, (uint32_t)rc);
+
+
// intentional fall-through
+
+
case NEEDS_VERIFICATION_FOLLOWING_READ:
+
printf("verifying data\r\n");
+
for (unsigned i = 0; i < firstBlock.attributes.erase_unit; i++) {
+
TEST_ASSERT_EQUAL(PATTERN, buffer[i]);
+
}
+
state = FINISHED;
+
printf("done\r\n");
+
break;
+
+
case FINISHED:
+
break;
+
} // switch (state)
+
}
+
+
void callbackHandler(int32_t status, ARM_STORAGE_OPERATION operation)
+
{
+
(void)status;
+
(void)operation;
+
switch (operation) {
+
case ARM_STORAGE_OPERATION_INITIALIZE:
+
case ARM_STORAGE_OPERATION_READ_DATA:
+
case ARM_STORAGE_OPERATION_PROGRAM_DATA:
+
case ARM_STORAGE_OPERATION_ERASE:
+
progressStateMachine();
+
break;
+
+
default:
+
printf("callbackHandler: unexpected callback for opcode %u with status %ld\r\n", operation, status);
+
break;
+
}
+
}
+
+
+ + + + diff --git a/docs/Driver/html/group__StorageDriverFunctions.html b/docs/Driver/html/group__StorageDriverFunctions.html new file mode 100644 index 0000000..1c86a7d --- /dev/null +++ b/docs/Driver/html/group__StorageDriverFunctions.html @@ -0,0 +1,169 @@ + + + + + +Use of Storage APIs +CMSIS-Driver: Use of Storage APIs + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Use of Storage APIs
Storage Interface
+
+
+

Function pointers within ARM_DRIVER_STORAGE form the set of operations constituting the Storage driver. Their implementation is platform-specific, and needs to be supplied by the porting effort.

+

Some of these APIs will always operate synchronously:

+ +

This means that control returns to the caller with a relevant status code only after the completion of the operation (or the discovery of a failure condition).

+

The remainder of the APIs:

+ +

can function asynchronously if the underlying controller supports it; that is if ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. In the case of asynchronous operation, the invocation returns early (with ARM_DRIVER_OK) and results in a completion callback later. If ARM_STORAGE_CAPABILITIES::asynchronous_ops is not set, then all such APIs execute synchronously, and control returns to the caller with a status code only after the completion of the operation (or the discovery of a failure condition).

+

If ARM_STORAGE_CAPABILITIES::asynchronous_ops is set, a storage driver may still choose to execute asynchronous operations in a synchronous manner. If so, the driver returns a positive value to indicate successful synchronous completion (or an error code in case of failure) and no further invocation of completion callback should be expected. The expected return value for synchronous completion of such asynchronous operations varies depending on the operation. For operations involving data access, it often equals the amount of data transferred or affected. For non data-transfer operations, such as EraseAll or Initialize, it is usually 1.

+

Here's a code snippet to suggest how asynchronous APIs might be used by callers to handle both synchronous and asynchronous execution by the underlying storage driver:

+
ASSERT(ARM_DRIVER_OK == 0); // this is a precondition; it doesn't need to be put in code
+
+
int32_t returnValue = drv->asynchronousAPI(...);
+
+
if (returnValue < ARM_DRIVER_OK) {
+
// handle error.
+
+
} else if (returnValue == ARM_DRIVER_OK) {
+
ASSERT(drv->GetCapabilities().asynchronous_ops == 1);
+
// handle early return from asynchronous execution; remainder of the work is done in the callback handler.
+
+
} else {
+
ASSERT(returnValue == EXPECTED_RETURN_VALUE_FOR_SYNCHRONOUS_COMPLETION);
+
// handle synchronous completion.
+
}
+

THis example is mixing synchronous and asynchronous APIs: Sample Use of Storage Driver

+
+
+ + + + diff --git a/docs/Driver/html/group__USART__control.html b/docs/Driver/html/group__USART__control.html new file mode 100644 index 0000000..42eb948 --- /dev/null +++ b/docs/Driver/html/group__USART__control.html @@ -0,0 +1,175 @@ + + + + + +USART Control Codes +CMSIS-Driver: USART Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
USART Control Codes
USART Interface
+
+
+ +

Many parameters of the USART driver are configured using the ARM_USART_Control function. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + +

+Content

 USART Mode Control
 Specify USART mode.
 
 USART Miscellaneous Control
 Specifies additional miscellaneous controls.
 
 USART Data Bits
 Defines the number of data bits.
 
 USART Parity Bit
 Defines the parity bit.
 
 USART Stop Bits
 Defines the number of stop bits.
 
 USART Flow Control
 Specifies RTS/CTS flow control.
 
 USART Clock Polarity
 Defines the clock polarity for the synchronous mode.
 
 USART Clock Phase
 Defines the clock phase for the synchronous mode.
 
+

Description

+

Many parameters of the USART driver are configured using the ARM_USART_Control function.

+

The various USART control codes define:

+ +

Refer to the ARM_USART_Control function for further details.

+
+
+ + + + diff --git a/docs/Driver/html/group__USART__control.js b/docs/Driver/html/group__USART__control.js new file mode 100644 index 0000000..0929874 --- /dev/null +++ b/docs/Driver/html/group__USART__control.js @@ -0,0 +1,11 @@ +var group__USART__control = +[ + [ "USART Mode Control", "group__usart__mode__control.html", "group__usart__mode__control" ], + [ "USART Miscellaneous Control", "group__usart__misc__control.html", "group__usart__misc__control" ], + [ "USART Data Bits", "group__usart__data__bits.html", "group__usart__data__bits" ], + [ "USART Parity Bit", "group__usart__parity__bit.html", "group__usart__parity__bit" ], + [ "USART Stop Bits", "group__usart__stop__bits.html", "group__usart__stop__bits" ], + [ "USART Flow Control", "group__usart__flow__control.html", "group__usart__flow__control" ], + [ "USART Clock Polarity", "group__usart__clock__polarity.html", "group__usart__clock__polarity" ], + [ "USART Clock Phase", "group__usart__clock__phase.html", "group__usart__clock__phase" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__USART__events.html b/docs/Driver/html/group__USART__events.html new file mode 100644 index 0000000..4f079dc --- /dev/null +++ b/docs/Driver/html/group__USART__events.html @@ -0,0 +1,380 @@ + + + + + +USART Events +CMSIS-Driver: USART Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USART Events
USART Interface
+
+
+ +

The USART driver generates call back events that are notified via the function ARM_USART_SignalEvent. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USART_EVENT_SEND_COMPLETE   (1UL << 0)
 Send completed; however USART may still transmit data. More...
 
#define ARM_USART_EVENT_RECEIVE_COMPLETE   (1UL << 1)
 Receive completed. More...
 
#define ARM_USART_EVENT_TRANSFER_COMPLETE   (1UL << 2)
 Transfer completed. More...
 
#define ARM_USART_EVENT_TX_COMPLETE   (1UL << 3)
 Transmit completed (optional) More...
 
#define ARM_USART_EVENT_TX_UNDERFLOW   (1UL << 4)
 Transmit data not available (Synchronous Slave) More...
 
#define ARM_USART_EVENT_RX_OVERFLOW   (1UL << 5)
 Receive data overflow. More...
 
#define ARM_USART_EVENT_RX_TIMEOUT   (1UL << 6)
 Receive character timeout (optional) More...
 
#define ARM_USART_EVENT_RX_BREAK   (1UL << 7)
 Break detected on receive. More...
 
#define ARM_USART_EVENT_RX_FRAMING_ERROR   (1UL << 8)
 Framing error detected on receive. More...
 
#define ARM_USART_EVENT_RX_PARITY_ERROR   (1UL << 9)
 Parity error detected on receive. More...
 
#define ARM_USART_EVENT_CTS   (1UL << 10)
 CTS state changed (optional) More...
 
#define ARM_USART_EVENT_DSR   (1UL << 11)
 DSR state changed (optional) More...
 
#define ARM_USART_EVENT_DCD   (1UL << 12)
 DCD state changed (optional) More...
 
#define ARM_USART_EVENT_RI   (1UL << 13)
 RI state changed (optional) More...
 
+

Description

+

The USART driver generates call back events that are notified via the function ARM_USART_SignalEvent.

+

This section provides the event values for the ARM_USART_SignalEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_EVENT_SEND_COMPLETE   (1UL << 0)
+
+ +

Send completed; however USART may still transmit data.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_RECEIVE_COMPLETE   (1UL << 1)
+
+ +

Receive completed.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_TRANSFER_COMPLETE   (1UL << 2)
+
+ +

Transfer completed.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_TX_COMPLETE   (1UL << 3)
+
+ +

Transmit completed (optional)

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_TX_UNDERFLOW   (1UL << 4)
+
+ +

Transmit data not available (Synchronous Slave)

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_RX_OVERFLOW   (1UL << 5)
+
+ +

Receive data overflow.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_RX_TIMEOUT   (1UL << 6)
+
+ +

Receive character timeout (optional)

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_RX_BREAK   (1UL << 7)
+
+ +

Break detected on receive.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_RX_FRAMING_ERROR   (1UL << 8)
+
+ +

Framing error detected on receive.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_RX_PARITY_ERROR   (1UL << 9)
+
+ +

Parity error detected on receive.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_CTS   (1UL << 10)
+
+ +

CTS state changed (optional)

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_DSR   (1UL << 11)
+
+ +

DSR state changed (optional)

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_DCD   (1UL << 12)
+
+ +

DCD state changed (optional)

+ +
+
+ +
+
+ + + + +
#define ARM_USART_EVENT_RI   (1UL << 13)
+
+ +

RI state changed (optional)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__USART__events.js b/docs/Driver/html/group__USART__events.js new file mode 100644 index 0000000..0f70fde --- /dev/null +++ b/docs/Driver/html/group__USART__events.js @@ -0,0 +1,17 @@ +var group__USART__events = +[ + [ "ARM_USART_EVENT_SEND_COMPLETE", "group__USART__events.html#gaae1c626192b16ccace93f3546e7884bf", null ], + [ "ARM_USART_EVENT_RECEIVE_COMPLETE", "group__USART__events.html#ga08b165fd8525e44e3ce42ed6183cd30a", null ], + [ "ARM_USART_EVENT_TRANSFER_COMPLETE", "group__USART__events.html#ga0599793e6aa531d56ff9f81ff12605d7", null ], + [ "ARM_USART_EVENT_TX_COMPLETE", "group__USART__events.html#ga12872a3b04343f97d9535b5b0d37286d", null ], + [ "ARM_USART_EVENT_TX_UNDERFLOW", "group__USART__events.html#gae57b9977bd338bf8bef86978843fa443", null ], + [ "ARM_USART_EVENT_RX_OVERFLOW", "group__USART__events.html#ga43a0869daf83abb3fea96926a97047ad", null ], + [ "ARM_USART_EVENT_RX_TIMEOUT", "group__USART__events.html#ga66ee2256571450a3fc3c530344ea9bd7", null ], + [ "ARM_USART_EVENT_RX_BREAK", "group__USART__events.html#gaa1d19e48faf2bdc2a976de448928288e", null ], + [ "ARM_USART_EVENT_RX_FRAMING_ERROR", "group__USART__events.html#ga2d97495c650220fbfe9d6977d0953127", null ], + [ "ARM_USART_EVENT_RX_PARITY_ERROR", "group__USART__events.html#gadb4fec2530fc5ae3ad2b056741883451", null ], + [ "ARM_USART_EVENT_CTS", "group__USART__events.html#ga4cd807ca131bdcb1a7eb4f223fa70476", null ], + [ "ARM_USART_EVENT_DSR", "group__USART__events.html#ga5afef591c2e8dd9bc4332b7bc8d96309", null ], + [ "ARM_USART_EVENT_DCD", "group__USART__events.html#ga1628b951feba1c851f424ce89da409a4", null ], + [ "ARM_USART_EVENT_RI", "group__USART__events.html#gac17fe5723d4c5923656dadd9d1302154", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__USBD__dev__events.html b/docs/Driver/html/group__USBD__dev__events.html new file mode 100644 index 0000000..3b747e9 --- /dev/null +++ b/docs/Driver/html/group__USBD__dev__events.html @@ -0,0 +1,244 @@ + + + + + +USBD Device Events +CMSIS-Driver: USBD Device Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USBD Device Events
USB Device Interface
+
+
+ +

The USB Device driver generates Device call back events that are notified via the function ARM_USBD_SignalDeviceEvent. +More...

+ + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USBD_EVENT_VBUS_ON   (1UL << 0)
 USB Device VBUS On. More...
 
#define ARM_USBD_EVENT_VBUS_OFF   (1UL << 1)
 USB Device VBUS Off. More...
 
#define ARM_USBD_EVENT_RESET   (1UL << 2)
 USB Reset occurred. More...
 
#define ARM_USBD_EVENT_HIGH_SPEED   (1UL << 3)
 USB switch to High Speed occurred. More...
 
#define ARM_USBD_EVENT_SUSPEND   (1UL << 4)
 USB Suspend occurred. More...
 
#define ARM_USBD_EVENT_RESUME   (1UL << 5)
 USB Resume occurred. More...
 
+

Description

+

The USB Device driver generates Device call back events that are notified via the function ARM_USBD_SignalDeviceEvent.

+

This section provides the event values for the ARM_USBD_SignalDeviceEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USBD_EVENT_VBUS_ON   (1UL << 0)
+
+ +

USB Device VBUS On.

+ +
+
+ +
+
+ + + + +
#define ARM_USBD_EVENT_VBUS_OFF   (1UL << 1)
+
+ +

USB Device VBUS Off.

+ +
+
+ +
+
+ + + + +
#define ARM_USBD_EVENT_RESET   (1UL << 2)
+
+ +

USB Reset occurred.

+ +
+
+ +
+
+ + + + +
#define ARM_USBD_EVENT_HIGH_SPEED   (1UL << 3)
+
+ +

USB switch to High Speed occurred.

+ +
+
+ +
+
+ + + + +
#define ARM_USBD_EVENT_SUSPEND   (1UL << 4)
+
+ +

USB Suspend occurred.

+ +
+
+ +
+
+ + + + +
#define ARM_USBD_EVENT_RESUME   (1UL << 5)
+
+ +

USB Resume occurred.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__USBD__dev__events.js b/docs/Driver/html/group__USBD__dev__events.js new file mode 100644 index 0000000..ebc4978 --- /dev/null +++ b/docs/Driver/html/group__USBD__dev__events.js @@ -0,0 +1,9 @@ +var group__USBD__dev__events = +[ + [ "ARM_USBD_EVENT_VBUS_ON", "group__USBD__dev__events.html#ga32546413cfe55154351f74fb56de1045", null ], + [ "ARM_USBD_EVENT_VBUS_OFF", "group__USBD__dev__events.html#ga6810c08a6e6a46ba443899e5ba9c3aec", null ], + [ "ARM_USBD_EVENT_RESET", "group__USBD__dev__events.html#ga489e1b88f7b0361494ca3a8dc73c227a", null ], + [ "ARM_USBD_EVENT_HIGH_SPEED", "group__USBD__dev__events.html#ga689d1e031013d0e66aeef4243490d843", null ], + [ "ARM_USBD_EVENT_SUSPEND", "group__USBD__dev__events.html#ga74dc7c0ba71baf285400d5a555224653", null ], + [ "ARM_USBD_EVENT_RESUME", "group__USBD__dev__events.html#ga5b1c9884b237ba7778f79761e5db9f45", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__USBD__ep__events.html b/docs/Driver/html/group__USBD__ep__events.html new file mode 100644 index 0000000..9c4b148 --- /dev/null +++ b/docs/Driver/html/group__USBD__ep__events.html @@ -0,0 +1,193 @@ + + + + + +USBD Endpoint Events +CMSIS-Driver: USBD Endpoint Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USBD Endpoint Events
USB Device Interface
+
+
+ +

The USB Device driver generates Endpoint call back events that are notified via the function ARM_USBD_SignalEndpointEvent. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_USBD_EVENT_SETUP   (1UL << 0)
 SETUP Packet. More...
 
#define ARM_USBD_EVENT_OUT   (1UL << 1)
 OUT Packet(s) More...
 
#define ARM_USBD_EVENT_IN   (1UL << 2)
 IN Packet(s) More...
 
+

Description

+

The USB Device driver generates Endpoint call back events that are notified via the function ARM_USBD_SignalEndpointEvent.

+

This section provides the event values for the ARM_USBD_SignalEndpointEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USBD_EVENT_SETUP   (1UL << 0)
+
+ +

SETUP Packet.

+ +
+
+ +
+
+ + + + +
#define ARM_USBD_EVENT_OUT   (1UL << 1)
+
+ +

OUT Packet(s)

+ +
+
+ +
+
+ + + + +
#define ARM_USBD_EVENT_IN   (1UL << 2)
+
+ +

IN Packet(s)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__USBD__ep__events.js b/docs/Driver/html/group__USBD__ep__events.js new file mode 100644 index 0000000..2e78bca --- /dev/null +++ b/docs/Driver/html/group__USBD__ep__events.js @@ -0,0 +1,6 @@ +var group__USBD__ep__events = +[ + [ "ARM_USBD_EVENT_SETUP", "group__USBD__ep__events.html#gaa0814f6880f4c0ac302ac9ebc8170739", null ], + [ "ARM_USBD_EVENT_OUT", "group__USBD__ep__events.html#ga35f7340508acb5fe7a5f43bbcac1887a", null ], + [ "ARM_USBD_EVENT_IN", "group__USBD__ep__events.html#ga375d3d8f363a056ff607c5ab3b92a864", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__USBH__packets.html b/docs/Driver/html/group__USBH__packets.html new file mode 100644 index 0000000..aa4a73e --- /dev/null +++ b/docs/Driver/html/group__USBH__packets.html @@ -0,0 +1,358 @@ + + + + + +USBH Packet Information +CMSIS-Driver: USBH Packet Information + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USBH Packet Information
USB Host
+
+
+ +

Specify USB packet information used by the function ARM_USBH_PipeTransfer. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USBH_PACKET_SETUP   (0x01UL << ARM_USBH_PACKET_TOKEN_Pos)
 SETUP Packet. More...
 
#define ARM_USBH_PACKET_OUT   (0x02UL << ARM_USBH_PACKET_TOKEN_Pos)
 OUT Packet. More...
 
#define ARM_USBH_PACKET_IN   (0x03UL << ARM_USBH_PACKET_TOKEN_Pos)
 IN Packet. More...
 
#define ARM_USBH_PACKET_PING   (0x04UL << ARM_USBH_PACKET_TOKEN_Pos)
 PING Packet. More...
 
#define ARM_USBH_PACKET_DATA0   (0x01UL << ARM_USBH_PACKET_DATA_Pos)
 DATA0 PID. More...
 
#define ARM_USBH_PACKET_DATA1   (0x02UL << ARM_USBH_PACKET_DATA_Pos)
 DATA1 PID. More...
 
#define ARM_USBH_PACKET_SSPLIT   (0x08UL << ARM_USBH_PACKET_SPLIT_Pos)
 SSPLIT Packet. More...
 
#define ARM_USBH_PACKET_SSPLIT_S   (0x09UL << ARM_USBH_PACKET_SPLIT_Pos)
 SSPLIT Packet: Data Start. More...
 
#define ARM_USBH_PACKET_SSPLIT_E   (0x0AUL << ARM_USBH_PACKET_SPLIT_Pos)
 SSPLIT Packet: Data End. More...
 
#define ARM_USBH_PACKET_SSPLIT_S_E   (0x0BUL << ARM_USBH_PACKET_SPLIT_Pos)
 SSPLIT Packet: Data All. More...
 
#define ARM_USBH_PACKET_CSPLIT   (0x0CUL << ARM_USBH_PACKET_SPLIT_Pos)
 CSPLIT Packet. More...
 
#define ARM_USBH_PACKET_PRE   (1UL << 12)
 PRE Token. More...
 
+

Description

+

Specify USB packet information used by the function ARM_USBH_PipeTransfer.

+

This section provides the packet information values (parameter packet) for the ARM_USBH_PipeTransfer function.

+

The following values are defined:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USBH_PACKET_SETUP   (0x01UL << ARM_USBH_PACKET_TOKEN_Pos)
+
+ +

SETUP Packet.

+

Generate SETUP transaction.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_OUT   (0x02UL << ARM_USBH_PACKET_TOKEN_Pos)
+
+ +

OUT Packet.

+

Generate OUT transaction.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_IN   (0x03UL << ARM_USBH_PACKET_TOKEN_Pos)
+
+ +

IN Packet.

+

Generate IN transaction.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_PING   (0x04UL << ARM_USBH_PACKET_TOKEN_Pos)
+
+ +

PING Packet.

+

Generate PING transaction (no data packet).

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_DATA0   (0x01UL << ARM_USBH_PACKET_DATA_Pos)
+
+ +

DATA0 PID.

+

Force DATA0 PID (Packet Identifier) for the initial data packet. When not specified than the driver provides the initial value according to the current state.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_DATA1   (0x02UL << ARM_USBH_PACKET_DATA_Pos)
+
+ +

DATA1 PID.

+

Force DATA1 PID (Packet Identifier) for the initial data packet. When not specified than the driver provides the initial value according to the current state.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_SSPLIT   (0x08UL << ARM_USBH_PACKET_SPLIT_Pos)
+
+ +

SSPLIT Packet.

+

Used when driver does not support automatic handling of SPLIT packets and indicates Start-Split packet. For isochronous OUT it indicates that the High-speed data is in the middle of the Full-speed data payload.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_SSPLIT_S   (0x09UL << ARM_USBH_PACKET_SPLIT_Pos)
+
+ +

SSPLIT Packet: Data Start.

+

Used when driver does not support automatic handling of SPLIT packets and indicates Start-Split packet. Valid only for isochronous OUT and indicates that the High-speed data is the start of the Full-speed data payload.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_SSPLIT_E   (0x0AUL << ARM_USBH_PACKET_SPLIT_Pos)
+
+ +

SSPLIT Packet: Data End.

+

Used when driver does not support automatic handling of SPLIT packets and indicates Start-Split packet. Valid only for isochronous OUT and indicates that the High-speed data is the end of the Full-speed data payload.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_SSPLIT_S_E   (0x0BUL << ARM_USBH_PACKET_SPLIT_Pos)
+
+ +

SSPLIT Packet: Data All.

+

Used when driver does not support automatic handling of SPLIT packets and indicates Start-Split packet. Valid only for isochronous OUT and indicates that the High-speed data is all of the Full-speed data payload.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_CSPLIT   (0x0CUL << ARM_USBH_PACKET_SPLIT_Pos)
+
+ +

CSPLIT Packet.

+

Used when driver does not support automatic handling of SPLIT packets and indicates Complete-Split packet.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_PACKET_PRE   (1UL << 12)
+
+ +

PRE Token.

+

Generate PRE (Preamble) for low-speed devices within a full/low-speed signaling environment.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__USBH__packets.js b/docs/Driver/html/group__USBH__packets.js new file mode 100644 index 0000000..6e682f8 --- /dev/null +++ b/docs/Driver/html/group__USBH__packets.js @@ -0,0 +1,15 @@ +var group__USBH__packets = +[ + [ "ARM_USBH_PACKET_SETUP", "group__USBH__packets.html#gafb0bcfee8abd4ada7f789aec2993048a", null ], + [ "ARM_USBH_PACKET_OUT", "group__USBH__packets.html#ga409b2ae6503e738eb86e35652f9ebf8d", null ], + [ "ARM_USBH_PACKET_IN", "group__USBH__packets.html#ga08d60ec20c091b5e7e252d137268cb76", null ], + [ "ARM_USBH_PACKET_PING", "group__USBH__packets.html#ga2eeab58cebb4556214c021ff02c36b16", null ], + [ "ARM_USBH_PACKET_DATA0", "group__USBH__packets.html#ga40075aa1d3eff6d4b94dfe28d7745873", null ], + [ "ARM_USBH_PACKET_DATA1", "group__USBH__packets.html#ga34014ff212b26e3ee8c8670a180846e2", null ], + [ "ARM_USBH_PACKET_SSPLIT", "group__USBH__packets.html#gaf47930d994c53fc1772caed129aee921", null ], + [ "ARM_USBH_PACKET_SSPLIT_S", "group__USBH__packets.html#ga3b8fa0d3aa083718b4f5d60e92394b47", null ], + [ "ARM_USBH_PACKET_SSPLIT_E", "group__USBH__packets.html#gaf99ee84befc6522fef56b21df870df72", null ], + [ "ARM_USBH_PACKET_SSPLIT_S_E", "group__USBH__packets.html#ga8d2b46fbc04d871abe0661f8acd18a94", null ], + [ "ARM_USBH_PACKET_CSPLIT", "group__USBH__packets.html#gadbfbbf7b4709f3ee4c3610da8402cfec", null ], + [ "ARM_USBH_PACKET_PRE", "group__USBH__packets.html#ga6dd82c7b96bc1339d725a6133a32a62f", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__USBH__pipe__events.html b/docs/Driver/html/group__USBH__pipe__events.html new file mode 100644 index 0000000..100950c --- /dev/null +++ b/docs/Driver/html/group__USBH__pipe__events.html @@ -0,0 +1,261 @@ + + + + + +USBH Pipe Events +CMSIS-Driver: USBH Pipe Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USBH Pipe Events
USB Host
+
+
+ +

The USB Host driver generates Pipe call back events that are notified via the function ARM_USBH_SignalPipeEvent. +More...

+ + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USBH_EVENT_TRANSFER_COMPLETE   (1UL << 0)
 Transfer completed. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_NAK   (1UL << 1)
 NAK Handshake received. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_NYET   (1UL << 2)
 NYET Handshake received. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_MDATA   (1UL << 3)
 MDATA Handshake received. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_STALL   (1UL << 4)
 STALL Handshake received. More...
 
#define ARM_USBH_EVENT_HANDSHAKE_ERR   (1UL << 5)
 ERR Handshake received. More...
 
#define ARM_USBH_EVENT_BUS_ERROR   (1UL << 6)
 Bus Error detected. More...
 
+

Description

+

The USB Host driver generates Pipe call back events that are notified via the function ARM_USBH_SignalPipeEvent.

+

This section provides the event values for the ARM_USBH_SignalPipeEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USBH_EVENT_TRANSFER_COMPLETE   (1UL << 0)
+
+ +

Transfer completed.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_HANDSHAKE_NAK   (1UL << 1)
+
+ +

NAK Handshake received.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_HANDSHAKE_NYET   (1UL << 2)
+
+ +

NYET Handshake received.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_HANDSHAKE_MDATA   (1UL << 3)
+
+ +

MDATA Handshake received.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_HANDSHAKE_STALL   (1UL << 4)
+
+ +

STALL Handshake received.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_HANDSHAKE_ERR   (1UL << 5)
+
+ +

ERR Handshake received.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_BUS_ERROR   (1UL << 6)
+
+ +

Bus Error detected.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__USBH__pipe__events.js b/docs/Driver/html/group__USBH__pipe__events.js new file mode 100644 index 0000000..f8d109a --- /dev/null +++ b/docs/Driver/html/group__USBH__pipe__events.js @@ -0,0 +1,10 @@ +var group__USBH__pipe__events = +[ + [ "ARM_USBH_EVENT_TRANSFER_COMPLETE", "group__USBH__pipe__events.html#gab161955b1ab0b7928befe446ef78634b", null ], + [ "ARM_USBH_EVENT_HANDSHAKE_NAK", "group__USBH__pipe__events.html#ga3895b82193855d9a6f0b7e8a9b65e2c0", null ], + [ "ARM_USBH_EVENT_HANDSHAKE_NYET", "group__USBH__pipe__events.html#ga62ae214576c923ce737a16098e9836e5", null ], + [ "ARM_USBH_EVENT_HANDSHAKE_MDATA", "group__USBH__pipe__events.html#ga681ce0983f8c77c41f3cc5df1af8d010", null ], + [ "ARM_USBH_EVENT_HANDSHAKE_STALL", "group__USBH__pipe__events.html#ga4fdc44fc78f342576dd11ad7cb84b4b8", null ], + [ "ARM_USBH_EVENT_HANDSHAKE_ERR", "group__USBH__pipe__events.html#gac7cc573f879fbab678dc7d1347c68614", null ], + [ "ARM_USBH_EVENT_BUS_ERROR", "group__USBH__pipe__events.html#ga7bd871b1e5c059bee398c32429370724", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__USBH__port__events.html b/docs/Driver/html/group__USBH__port__events.html new file mode 100644 index 0000000..0757a90 --- /dev/null +++ b/docs/Driver/html/group__USBH__port__events.html @@ -0,0 +1,261 @@ + + + + + +USBH Port Events +CMSIS-Driver: USBH Port Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USBH Port Events
USB Host
+
+
+ +

The USB Host driver generates Port call back events that are notified via the function ARM_USBH_SignalPortEvent. +More...

+ + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USBH_EVENT_CONNECT   (1UL << 0)
 USB Device Connected to Port. More...
 
#define ARM_USBH_EVENT_DISCONNECT   (1UL << 1)
 USB Device Disconnected from Port. More...
 
#define ARM_USBH_EVENT_OVERCURRENT   (1UL << 2)
 USB Device caused Overcurrent. More...
 
#define ARM_USBH_EVENT_RESET   (1UL << 3)
 USB Reset completed. More...
 
#define ARM_USBH_EVENT_SUSPEND   (1UL << 4)
 USB Suspend occurred. More...
 
#define ARM_USBH_EVENT_RESUME   (1UL << 5)
 USB Resume occurred. More...
 
#define ARM_USBH_EVENT_REMOTE_WAKEUP   (1UL << 6)
 USB Device activated Remote Wakeup. More...
 
+

Description

+

The USB Host driver generates Port call back events that are notified via the function ARM_USBH_SignalPortEvent.

+

This section provides the event values for the ARM_USBH_SignalPortEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USBH_EVENT_CONNECT   (1UL << 0)
+
+ +

USB Device Connected to Port.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_DISCONNECT   (1UL << 1)
+
+ +

USB Device Disconnected from Port.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_OVERCURRENT   (1UL << 2)
+
+ +

USB Device caused Overcurrent.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_RESET   (1UL << 3)
+
+ +

USB Reset completed.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_SUSPEND   (1UL << 4)
+
+ +

USB Suspend occurred.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_RESUME   (1UL << 5)
+
+ +

USB Resume occurred.

+ +
+
+ +
+
+ + + + +
#define ARM_USBH_EVENT_REMOTE_WAKEUP   (1UL << 6)
+
+ +

USB Device activated Remote Wakeup.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__USBH__port__events.js b/docs/Driver/html/group__USBH__port__events.js new file mode 100644 index 0000000..6dbe8ba --- /dev/null +++ b/docs/Driver/html/group__USBH__port__events.js @@ -0,0 +1,10 @@ +var group__USBH__port__events = +[ + [ "ARM_USBH_EVENT_CONNECT", "group__USBH__port__events.html#ga71bfd8b8cd41b8aa6303d5d3a91597e6", null ], + [ "ARM_USBH_EVENT_DISCONNECT", "group__USBH__port__events.html#gaba67919f64e9a08ba1264363b2710d20", null ], + [ "ARM_USBH_EVENT_OVERCURRENT", "group__USBH__port__events.html#ga0955fdc2aedd2c5aa2be6cd782b3f2a8", null ], + [ "ARM_USBH_EVENT_RESET", "group__USBH__port__events.html#ga70ae1e0a7872556d302a7f7840843c4a", null ], + [ "ARM_USBH_EVENT_SUSPEND", "group__USBH__port__events.html#gae1f91db7d31bcebbf60a23fb04cf7eb5", null ], + [ "ARM_USBH_EVENT_RESUME", "group__USBH__port__events.html#ga42f62bdf6dd639f9f3dffc6c127456e3", null ], + [ "ARM_USBH_EVENT_REMOTE_WAKEUP", "group__USBH__port__events.html#ga2b61e9df3c63fd78fc08f79280a7066e", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__USB__endpoint__type.html b/docs/Driver/html/group__USB__endpoint__type.html new file mode 100644 index 0000000..f10e5e7 --- /dev/null +++ b/docs/Driver/html/group__USB__endpoint__type.html @@ -0,0 +1,209 @@ + + + + + +USB Endpoint Type +CMSIS-Driver: USB Endpoint Type + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USB Endpoint Type
USB Interface
+
+
+ +

USB Endpoint Type definitions. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_USB_ENDPOINT_CONTROL   (0)
 Control Endpoint. More...
 
#define ARM_USB_ENDPOINT_ISOCHRONOUS   (1)
 Isochronous Endpoint. More...
 
#define ARM_USB_ENDPOINT_BULK   (2)
 Bulk Endpoint. More...
 
#define ARM_USB_ENDPOINT_INTERRUPT   (3)
 Interrupt Endpoint. More...
 
+

Description

+

USB Endpoint Type definitions.

+

The following USB Endpoint Type values are defined:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USB_ENDPOINT_CONTROL   (0)
+
+ +

Control Endpoint.

+ +
+
+ +
+
+ + + + +
#define ARM_USB_ENDPOINT_ISOCHRONOUS   (1)
+
+ +

Isochronous Endpoint.

+ +
+
+ +
+
+ + + + +
#define ARM_USB_ENDPOINT_BULK   (2)
+
+ +

Bulk Endpoint.

+ +
+
+ +
+
+ + + + +
#define ARM_USB_ENDPOINT_INTERRUPT   (3)
+
+ +

Interrupt Endpoint.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__USB__endpoint__type.js b/docs/Driver/html/group__USB__endpoint__type.js new file mode 100644 index 0000000..880f5a0 --- /dev/null +++ b/docs/Driver/html/group__USB__endpoint__type.js @@ -0,0 +1,7 @@ +var group__USB__endpoint__type = +[ + [ "ARM_USB_ENDPOINT_CONTROL", "group__USB__endpoint__type.html#gaf8df4a353e829cf41a9f712e1b3c93a1", null ], + [ "ARM_USB_ENDPOINT_ISOCHRONOUS", "group__USB__endpoint__type.html#gabb5913e9d1434240588ec43722d3eb16", null ], + [ "ARM_USB_ENDPOINT_BULK", "group__USB__endpoint__type.html#gac80fcc73aada5562e35e4bf2c21b7b2d", null ], + [ "ARM_USB_ENDPOINT_INTERRUPT", "group__USB__endpoint__type.html#ga9375cd3a2735e7d5c8c359a1cdbc7d95", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__USB__speed.html b/docs/Driver/html/group__USB__speed.html new file mode 100644 index 0000000..93c7a7c --- /dev/null +++ b/docs/Driver/html/group__USB__speed.html @@ -0,0 +1,192 @@ + + + + + +USB Speed +CMSIS-Driver: USB Speed + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USB Speed
USB Interface
+
+
+ +

USB Speed definitions. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_USB_SPEED_LOW   (0)
 Low-speed USB. More...
 
#define ARM_USB_SPEED_FULL   (1)
 Full-speed USB. More...
 
#define ARM_USB_SPEED_HIGH   (2)
 High-speed USB. More...
 
+

Description

+

USB Speed definitions.

+

The following USB speed values are defined:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USB_SPEED_LOW   (0)
+
+ +

Low-speed USB.

+ +
+
+ +
+
+ + + + +
#define ARM_USB_SPEED_FULL   (1)
+
+ +

Full-speed USB.

+ +
+
+ +
+
+ + + + +
#define ARM_USB_SPEED_HIGH   (2)
+
+ +

High-speed USB.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__USB__speed.js b/docs/Driver/html/group__USB__speed.js new file mode 100644 index 0000000..3599cb2 --- /dev/null +++ b/docs/Driver/html/group__USB__speed.js @@ -0,0 +1,6 @@ +var group__USB__speed = +[ + [ "ARM_USB_SPEED_LOW", "group__USB__speed.html#gae44fe8958474cd90f2288ea27752df27", null ], + [ "ARM_USB_SPEED_FULL", "group__USB__speed.html#ga0d1b465db654b651dcf588c8b59899d5", null ], + [ "ARM_USB_SPEED_HIGH", "group__USB__speed.html#ga13fa1e1934021f744dba837776205c89", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__bus__mode__ctrls.html b/docs/Driver/html/group__can__bus__mode__ctrls.html new file mode 100644 index 0000000..1c171f5 --- /dev/null +++ b/docs/Driver/html/group__can__bus__mode__ctrls.html @@ -0,0 +1,192 @@ + + + + + +CAN Bus Communication Mode +CMSIS-Driver: CAN Bus Communication Mode + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Enumerations
+
+
CAN Bus Communication Mode
CAN Control Codes
+
+
+ +

Set or initialize the CAN bus. +More...

+ + + + +

+Enumerations

enum  ARM_CAN_MODE {
+  ARM_CAN_MODE_INITIALIZATION, +
+  ARM_CAN_MODE_NORMAL, +
+  ARM_CAN_MODE_RESTRICTED, +
+  ARM_CAN_MODE_MONITOR, +
+  ARM_CAN_MODE_LOOPBACK_INTERNAL, +
+  ARM_CAN_MODE_LOOPBACK_EXTERNAL +
+ }
 
+

Description

+

Set or initialize the CAN bus.

+

Enumeration Type Documentation

+ +
+
+ + + + +
enum ARM_CAN_MODE
+
+

The enumerations below initialize and set the bus communication mode.

+

Parameter for:

+ + + + + + + + +
Enumerator
ARM_CAN_MODE_INITIALIZATION  +

Initialization mode.

+
ARM_CAN_MODE_NORMAL  +

Normal operation mode.

+
ARM_CAN_MODE_RESTRICTED  +

Restricted operation mode.

+
ARM_CAN_MODE_MONITOR  +

Bus monitoring mode.

+
ARM_CAN_MODE_LOOPBACK_INTERNAL  +

Loopback internal mode.

+
ARM_CAN_MODE_LOOPBACK_EXTERNAL  +

Loopback external mode.

+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__can__bus__mode__ctrls.js b/docs/Driver/html/group__can__bus__mode__ctrls.js new file mode 100644 index 0000000..a66b56c --- /dev/null +++ b/docs/Driver/html/group__can__bus__mode__ctrls.js @@ -0,0 +1,11 @@ +var group__can__bus__mode__ctrls = +[ + [ "ARM_CAN_MODE", "group__can__bus__mode__ctrls.html#gabbca99c46d478bcf822eee71cdf75dcd", [ + [ "ARM_CAN_MODE_INITIALIZATION", "Driver__CAN_8h.html#gabbca99c46d478bcf822eee71cdf75dcda9967a5ebaa045afe54d75e5629676ddc", null ], + [ "ARM_CAN_MODE_NORMAL", "Driver__CAN_8h.html#gabbca99c46d478bcf822eee71cdf75dcdaa3190344bdf3452462e5c0518ac3cdc4", null ], + [ "ARM_CAN_MODE_RESTRICTED", "Driver__CAN_8h.html#gabbca99c46d478bcf822eee71cdf75dcda22a9bb26e68c2a04f641d466040d755d", null ], + [ "ARM_CAN_MODE_MONITOR", "Driver__CAN_8h.html#gabbca99c46d478bcf822eee71cdf75dcda904f68f08c84c4b85c763f5d98c574ab", null ], + [ "ARM_CAN_MODE_LOOPBACK_INTERNAL", "Driver__CAN_8h.html#gabbca99c46d478bcf822eee71cdf75dcda8579315576baa43860a398a30fd527d8", null ], + [ "ARM_CAN_MODE_LOOPBACK_EXTERNAL", "Driver__CAN_8h.html#gabbca99c46d478bcf822eee71cdf75dcda5ee1ba60abcf39d575e7cb309e641b9b", null ] + ] ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__control.html b/docs/Driver/html/group__can__control.html new file mode 100644 index 0000000..325ff90 --- /dev/null +++ b/docs/Driver/html/group__can__control.html @@ -0,0 +1,166 @@ + + + + + +CAN Control Codes +CMSIS-Driver: CAN Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
CAN Control Codes
CAN Interface
+
+
+ +

Codes to configure the CAN driver. +More...

+ + + + + + + + + + + + + + + + + + + + +

+Content

 CAN Identifier
 Set object to standard or extended.
 
 CAN Operation Codes
 Set CAN operation modes.
 
 CAN Bus Communication Mode
 Set or initialize the CAN bus.
 
 CAN Bit Timing Codes
 Set bit timing.
 
 CAN Filter Operation Codes
 Set CAN filter manipulation codes.
 
 CAN Object Configuration Codes
 CAN Object Configuration codes.
 
+

Description

+

Codes to configure the CAN driver.

+

The various CAN control codes define:

+ +
+
+ + + + diff --git a/docs/Driver/html/group__can__control.js b/docs/Driver/html/group__can__control.js new file mode 100644 index 0000000..e75d588 --- /dev/null +++ b/docs/Driver/html/group__can__control.js @@ -0,0 +1,9 @@ +var group__can__control = +[ + [ "CAN Identifier", "group__can__identifer__ctrls.html", "group__can__identifer__ctrls" ], + [ "CAN Operation Codes", "group__can__mode__ctrls.html", "group__can__mode__ctrls" ], + [ "CAN Bus Communication Mode", "group__can__bus__mode__ctrls.html", "group__can__bus__mode__ctrls" ], + [ "CAN Bit Timing Codes", "group__can__timeseg__ctrls.html", "group__can__timeseg__ctrls" ], + [ "CAN Filter Operation Codes", "group__can__filter__operation__ctrls.html", "group__can__filter__operation__ctrls" ], + [ "CAN Object Configuration Codes", "group__can__obj__config__ctrls.html", "group__can__obj__config__ctrls" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__filter__operation__ctrls.html b/docs/Driver/html/group__can__filter__operation__ctrls.html new file mode 100644 index 0000000..acd1079 --- /dev/null +++ b/docs/Driver/html/group__can__filter__operation__ctrls.html @@ -0,0 +1,192 @@ + + + + + +CAN Filter Operation Codes +CMSIS-Driver: CAN Filter Operation Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Enumerations
+
+
CAN Filter Operation Codes
CAN Control Codes
+
+
+ +

Set CAN filter manipulation codes. +More...

+ + + + +

+Enumerations

enum  ARM_CAN_FILTER_OPERATION {
+  ARM_CAN_FILTER_ID_EXACT_ADD, +
+  ARM_CAN_FILTER_ID_EXACT_REMOVE, +
+  ARM_CAN_FILTER_ID_RANGE_ADD, +
+  ARM_CAN_FILTER_ID_RANGE_REMOVE, +
+  ARM_CAN_FILTER_ID_MASKABLE_ADD, +
+  ARM_CAN_FILTER_ID_MASKABLE_REMOVE +
+ }
 
+

Description

+

Set CAN filter manipulation codes.

+

Enumeration Type Documentation

+ +
+
+ + + + +
enum ARM_CAN_FILTER_OPERATION
+
+

ARM_CAN_FILTER_OPERATION provides the controls for setting the filter type. Refer to CAN Message Filtering for details.

+

Parameter for:

+ + + + + + + + +
Enumerator
ARM_CAN_FILTER_ID_EXACT_ADD  +

Add exact id filter.

+
ARM_CAN_FILTER_ID_EXACT_REMOVE  +

Remove exact id filter.

+
ARM_CAN_FILTER_ID_RANGE_ADD  +

Add range id filter.

+
ARM_CAN_FILTER_ID_RANGE_REMOVE  +

Remove range id filter.

+
ARM_CAN_FILTER_ID_MASKABLE_ADD  +

Add maskable id filter.

+
ARM_CAN_FILTER_ID_MASKABLE_REMOVE  +

Remove maskable id filter.

+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__can__filter__operation__ctrls.js b/docs/Driver/html/group__can__filter__operation__ctrls.js new file mode 100644 index 0000000..e7bb72a --- /dev/null +++ b/docs/Driver/html/group__can__filter__operation__ctrls.js @@ -0,0 +1,11 @@ +var group__can__filter__operation__ctrls = +[ + [ "ARM_CAN_FILTER_OPERATION", "group__can__filter__operation__ctrls.html#gacb04d0f8b3969ee69362ff2b62941d75", [ + [ "ARM_CAN_FILTER_ID_EXACT_ADD", "Driver__CAN_8h.html#gacb04d0f8b3969ee69362ff2b62941d75aa734058b50573de3b0cc49311997806b", null ], + [ "ARM_CAN_FILTER_ID_EXACT_REMOVE", "Driver__CAN_8h.html#gacb04d0f8b3969ee69362ff2b62941d75a6fdaecf3fa244ef1e4d1069d9c6c95f8", null ], + [ "ARM_CAN_FILTER_ID_RANGE_ADD", "Driver__CAN_8h.html#gacb04d0f8b3969ee69362ff2b62941d75a22123bef8e773844fce604c553bf2ed5", null ], + [ "ARM_CAN_FILTER_ID_RANGE_REMOVE", "Driver__CAN_8h.html#gacb04d0f8b3969ee69362ff2b62941d75a17fea7d388dc702bb3318ecae911f50d", null ], + [ "ARM_CAN_FILTER_ID_MASKABLE_ADD", "Driver__CAN_8h.html#gacb04d0f8b3969ee69362ff2b62941d75ac4ad302fa9b762c1d14964141e234ba9", null ], + [ "ARM_CAN_FILTER_ID_MASKABLE_REMOVE", "Driver__CAN_8h.html#gacb04d0f8b3969ee69362ff2b62941d75ad9573d5d0e112aece7abc0bc24aa92fb", null ] + ] ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__identifer__ctrls.html b/docs/Driver/html/group__can__identifer__ctrls.html new file mode 100644 index 0000000..9e76720 --- /dev/null +++ b/docs/Driver/html/group__can__identifer__ctrls.html @@ -0,0 +1,184 @@ + + + + + +CAN Identifier +CMSIS-Driver: CAN Identifier + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
CAN Identifier
CAN Control Codes
+
+
+ +

Set object to standard or extended. +More...

+ + + + + + + + +

+Macros

#define ARM_CAN_STANDARD_ID(id)   (id & 0x000007FFUL)
 CAN identifier in standard format (11-bits) More...
 
#define ARM_CAN_EXTENDED_ID(id)   ((id & 0x1FFFFFFFUL) | ARM_CAN_ID_IDE_Msk)
 CAN identifier in extended format (29-bits) More...
 
+

Description

+

Set object to standard or extended.

+

Macro Definition Documentation

+ +
+
+ + + + + + + + +
#define ARM_CAN_STANDARD_ID( id)   (id & 0x000007FFUL)
+
+ +

CAN identifier in standard format (11-bits)

+
See Also
ARM_CAN_ObjectConfigure
+ +
+
+ +
+
+ + + + + + + + +
#define ARM_CAN_EXTENDED_ID( id)   ((id & 0x1FFFFFFFUL) | ARM_CAN_ID_IDE_Msk)
+
+ +

CAN identifier in extended format (29-bits)

+
See Also
ARM_CAN_ObjectConfigure
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__can__identifer__ctrls.js b/docs/Driver/html/group__can__identifer__ctrls.js new file mode 100644 index 0000000..17fd946 --- /dev/null +++ b/docs/Driver/html/group__can__identifer__ctrls.js @@ -0,0 +1,5 @@ +var group__can__identifer__ctrls = +[ + [ "ARM_CAN_STANDARD_ID", "group__can__identifer__ctrls.html#ga561635b816ddaf5fb87377155fc692c7", null ], + [ "ARM_CAN_EXTENDED_ID", "group__can__identifer__ctrls.html#gae7d4efb6fb49e1ec47c2b12e22f37cae", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__interface__gr.html b/docs/Driver/html/group__can__interface__gr.html new file mode 100644 index 0000000..a10bd4e --- /dev/null +++ b/docs/Driver/html/group__can__interface__gr.html @@ -0,0 +1,1960 @@ + + + + + +CAN Interface +CMSIS-Driver: CAN Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
CAN Interface
+
+
+ +

Driver API for CAN Bus Peripheral (Driver_CAN.h) +More...

+ + + + + + + + + + + + + + +

+Content

 Status Error Codes
 Status codes of the CAN driver.
 
 CAN Unit Events
 Callback unit events notified via ARM_CAN_SignalUnitEvent.
 
 CAN Object Events
 Callback objects events notified via ARM_CAN_SignalObjectEvent.
 
 CAN Control Codes
 Codes to configure the CAN driver.
 
+ + + + + + + + + + + + + + + + +

+Data Structures

struct  ARM_DRIVER_CAN
 Access structure of the CAN Driver. More...
 
struct  ARM_CAN_CAPABILITIES
 CAN Device Driver Capabilities. More...
 
struct  ARM_CAN_STATUS
 CAN Status. More...
 
struct  ARM_CAN_MSG_INFO
 CAN Message Information. More...
 
struct  ARM_CAN_OBJ_CAPABILITIES
 CAN Object Capabilities. More...
 
+ + + + + + + +

+Typedefs

typedef void(* ARM_CAN_SignalUnitEvent_t )(uint32_t event)
 Pointer to ARM_CAN_SignalUnitEvent : Signal CAN Unit Event. More...
 
typedef void(* ARM_CAN_SignalObjectEvent_t )(uint32_t obj_idx, uint32_t event)
 Pointer to ARM_CAN_SignalObjectEvent : Signal CAN Object Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_CAN_GetVersion (void)
 Get driver version. More...
 
ARM_CAN_CAPABILITIES ARM_CAN_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_CAN_Initialize (ARM_CAN_SignalUnitEvent_t cb_unit_event, ARM_CAN_SignalObjectEvent_t cb_object_event)
 Initialize CAN interface and register signal (callback) functions. More...
 
int32_t ARM_CAN_Uninitialize (void)
 De-initialize CAN interface. More...
 
int32_t ARM_CAN_PowerControl (ARM_POWER_STATE state)
 Control CAN interface power. More...
 
uint32_t ARM_CAN_GetClock (void)
 Retrieve CAN base clock frequency. More...
 
int32_t ARM_CAN_SetBitrate (ARM_CAN_BITRATE_SELECT select, uint32_t bitrate, uint32_t bit_segments)
 Set bitrate for CAN interface. More...
 
int32_t ARM_CAN_SetMode (ARM_CAN_MODE mode)
 Set operating mode for CAN interface. More...
 
ARM_CAN_OBJ_CAPABILITIES ARM_CAN_ObjectGetCapabilities (uint32_t obj_idx)
 Retrieve capabilities of an object. More...
 
int32_t ARM_CAN_ObjectSetFilter (uint32_t obj_idx, ARM_CAN_FILTER_OPERATION operation, uint32_t id, uint32_t arg)
 Add or remove filter for message reception. More...
 
int32_t ARM_CAN_ObjectConfigure (uint32_t obj_idx, ARM_CAN_OBJ_CONFIG obj_cfg)
 Configure object. More...
 
int32_t ARM_CAN_MessageSend (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, const uint8_t *data, uint8_t size)
 Send message on CAN bus. More...
 
int32_t ARM_CAN_MessageRead (uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, uint8_t *data, uint8_t size)
 Read message received on CAN bus. More...
 
int32_t ARM_CAN_Control (uint32_t control, uint32_t arg)
 Control CAN interface. More...
 
ARM_CAN_STATUS ARM_CAN_GetStatus (void)
 Get CAN status. More...
 
void ARM_CAN_SignalUnitEvent (uint32_t event)
 Signal CAN unit event. More...
 
void ARM_CAN_SignalObjectEvent (uint32_t obj_idx, uint32_t event)
 Signal CAN object event. More...
 
+

Description

+

Driver API for CAN Bus Peripheral (Driver_CAN.h)

+

The Controller Area Network Interface Bus (CAN) implements a multi-master serial bus for connecting microcontrollers and devices, also known as nodes, to communicate with each other in applications without a host computer. CAN is a message-based protocol, designed originally for automotive applications, but meanwhile used also in many other surroundings. The complexity of the node can range from a simple I/O device up to an embedded computer with a CAN interface and sophisticated software. The node may also be a gateway allowing a standard computer to communicate over a USB or Ethernet port to the devices on a CAN network. Devices are connected to the bus through a host processor, a CAN controller, and a CAN transceiver.

+

The CAN Driver API allows to implement CAN Interfaces that conform to the CAN specifications available from BOSCH:

+
    +
  • CAN 2.0B: CAN Specification 2.0B (released Sep. 1991) which is now superseded by ISO 11898-1.
    • +
  • CAN FD: CAN with Flexible Data Rate introduced in 2012 (released April 17th, 2012).
    • +
+

Wikipedia offers more information about the CAN Bus.

+

CAN 2.0B** Every CAN CMSIS-Driver supports the CAN 2.0B standard

+

CAN 2.0B supports:

+
    +
  • message can contain up to 8 data bytes
    • +
  • bitrates of up to 1Mbits/s
    • +
  • Remote Frame requests
    • +
+

CAN FD

+

Support for CAN FD depends on the hardware. A CMSIS-Driver that supports CAN FD has the capability ARM_CAN_CAPABILITIES data field fd_mode = 1, which can be retrieved with the function ARM_CAN_GetCapabilities.

+

CAN FD supports:

+
    +
  • message can contain up to 64 data bytes
    • +
  • faster data transfers with faster bitrate used during the data phase
    • +
+

CAN FD does not support Remote Frame requests.

+

Block Diagram

+

The CAN Driver API defines a CAN interface for middleware components. The CAN Driver supports multiple nodes, which are able to send and receive messages, but not simultaneously.

+
+CAN_Node.png +
+CAN Node Schematic
+

CAN API

+

The following header files define the Application Programming Interface (API) for the CAN interface:

+
    +
  • Driver_CAN.h : Driver API for CAN Bus Peripheral
    • +
+

The driver implementation is a typical part of the Device Family Pack (DFP) that supports the peripherals of the microcontroller family.

+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +

Example Code

+

The following example code shows the usage of the CAN interface.

+
#include <stdio.h>
+
#include <string.h>
+
#include "cmsis_os.h"
+
+
#include "Driver_CAN.h"
+
+
// CAN Driver Controller selector
+
#define CAN_CONTROLLER 1 // CAN Controller number
+
+
#define _CAN_Driver_(n) Driver_CAN##n
+
#define CAN_Driver_(n) _CAN_Driver_(n)
+
extern ARM_DRIVER_CAN CAN_Driver_(CAN_CONTROLLER);
+
#define ptrCAN (&CAN_Driver_(CAN_CONTROLLER))
+
+
uint32_t rx_obj_idx = 0xFFFFFFFFU;
+
uint8_t rx_data[8];
+
ARM_CAN_MSG_INFO rx_msg_info;
+
uint32_t tx_obj_idx = 0xFFFFFFFFU;
+
uint8_t tx_data[8];
+
ARM_CAN_MSG_INFO tx_msg_info;
+
+
static void Error_Handler (void) { while (1); }
+
+
void CAN_SignalUnitEvent (uint32_t event) {}
+
+
void CAN_SignalObjectEvent (uint32_t obj_idx, uint32_t event) {
+
+
if (obj_idx == rx_obj_idx) { // If receive object event
+
if (event == ARM_CAN_EVENT_RECEIVE) { // If message was received successfully
+
if (ptrCAN->MessageRead(rx_obj_idx, &rx_msg_info, rx_data, 8U) > 0U) {
+
// Read received message
+
// process received message ...
+
}
+
}
+
}
+
if (obj_idx == tx_obj_idx) { // If transmit object event
+
if (event == ARM_CAN_EVENT_SEND_COMPLETE) { // If message was sent successfully
+
// acknowledge sent message ...
+
}
+
}
+
}
+
+
int main (void) {
+
ARM_CAN_CAPABILITIES can_cap;
+
ARM_CAN_OBJ_CAPABILITIES can_obj_cap;
+
int32_t status;
+
uint32_t i, num_objects;
+
+
can_cap = ptrCAN->GetCapabilities (); // Get CAN driver capabilities
+
num_objects = can_cap.num_objects; // Number of receive/transmit objects
+
+
status = ptrCAN->Initialize (CAN_SignalUnitEvent, CAN_SignalObjectEvent); // Initialize CAN driver
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
status = ptrCAN->PowerControl (ARM_POWER_FULL); // Power-up CAN controller
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
status = ptrCAN->SetMode (ARM_CAN_MODE_INITIALIZATION); // Activate initialization mode
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
status = ptrCAN->SetBitrate (ARM_CAN_BITRATE_NOMINAL, // Set nominal bitrate
+
100000U, // Set bitrate to 100 kbit/s
+
ARM_CAN_BIT_PROP_SEG(5U) | // Set propagation segment to 5 time quanta
+
ARM_CAN_BIT_PHASE_SEG1(1U) | // Set phase segment 1 to 1 time quantum (sample point at 87.5% of bit time)
+
ARM_CAN_BIT_PHASE_SEG2(1U) | // Set phase segment 2 to 1 time quantum (total bit is 8 time quanta long)
+
ARM_CAN_BIT_SJW(1U)); // Resynchronization jump width is same as phase segment 2
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
for (i = 0U; i < num_objects; i++) { // Find first available object for receive and transmit
+
can_obj_cap = ptrCAN->ObjectGetCapabilities (i); // Get object capabilities
+
if ((rx_obj_idx == 0xFFFFFFFFU) && (can_obj_cap.rx == 1U)) { rx_obj_idx = i; }
+
else if ((tx_obj_idx == 0xFFFFFFFFU) && (can_obj_cap.tx == 1U)) { tx_obj_idx = i; break; }
+
}
+
if ((rx_obj_idx == 0xFFFFFFFFU) || (tx_obj_idx == 0xFFFFFFFFU)) { Error_Handler(); }
+
+
// Set filter to receive messages with extended ID 0x12345678 to receive object
+
status = ptrCAN->ObjectSetFilter(rx_obj_idx, ARM_CAN_FILTER_ID_EXACT_ADD, ARM_CAN_EXTENDED_ID(0x12345678U), 0U);
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
status = ptrCAN->ObjectConfigure(tx_obj_idx, ARM_CAN_OBJ_TX); // Configure transmit object
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
status = ptrCAN->ObjectConfigure(rx_obj_idx, ARM_CAN_OBJ_RX); // Configure receive object
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
status = ptrCAN->SetMode (ARM_CAN_MODE_NORMAL); // Activate normal operation mode
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
memset(&tx_msg_info, 0U, sizeof(ARM_CAN_MSG_INFO)); // Clear message info structure
+
tx_msg_info.id = ARM_CAN_EXTENDED_ID(0x12345678U); // Set extended ID for transmit message
+
tx_data[0] = 0xFFU; // Initialize transmit data
+
while (1) {
+
tx_data[0]++; // Increment transmit data
+
status = ptrCAN->MessageSend(tx_obj_idx, &tx_msg_info, tx_data, 1U); // Send data message with 1 data byte
+
if (status != 1U) { Error_Handler(); }
+
for (i = 0U; i < 1000000U; i++) { __nop(); } // Wait a little while
+
}
+
}
+

+CAN Message Objects

+

The CMSIS-Driver for the CAN interface provides multiple CAN message objects, which can be seen as individual communication channels. The number of available CAN message objects depends on the CAN peripheral. The function ARM_CAN_GetCapabilities returns the maximum number of available CAN message objects. The number is encoded in the structure ARM_CAN_CAPABILITIES in the data field num_objects. CAN message objects are addressed with the functions listed below, whereby the parameter obj_idx addresses an individual object. The valid range for obj_idx is [0 .. (num_objects - 1)].

+ + + + + + + + + + + + + + + +
Function Description
ARM_CAN_ObjectGetCapabilities Retrieves message object capabilities such as receive, transmit, Remote Frame automatic handling and CAN Message Filtering.
ARM_CAN_ObjectSetFilter Allows to set-up CAN ID filtering for the message object.
ARM_CAN_ObjectConfigure Allows to configure the message object for receive, transmit or Remote Frame automatic handling.
ARM_CAN_MessageRead Read received message from the message object.
ARM_CAN_MessageSend Send CAN message or send Remote Frame or set CAN message to be sent automatically on reception of matching Remote Frame on the message object.
ARM_CAN_SignalObjectEvent Callback function that signals a message transfer or a received message overrun.
+

Each CAN message object may have different capabilities. Before using a CAN message object, call the function ARM_CAN_ObjectGetCapabilities to verify the available features.

+

+CAN Message Filtering

+

The CMSIS-Driver for the CAN interface supports ID filtering for the receiving message objects. The receiving CAN node examines the identifier to decide if it was relevant. This filtering is done by the CAN peripheral according the settings configured with the function ARM_CAN_ObjectSetFilter.

+

The function ARM_CAN_ObjectGetCapabilities retrieves the filter capabilities of the CAN message objects stored in ARM_CAN_OBJ_CAPABILITIES.

+ + + + + + + + + + + +
Data Fields CAN Messages Object can be filtered with ...
exact_filtering an exact ID value set by using the function ARM_CAN_ObjectSetFilter with control = ARM_CAN_FILTER_ID_EXACT_ADD.
range_filtering a range ID value set by using the function ARM_CAN_ObjectSetFilter with control = ARM_CAN_FILTER_ID_RANGE_ADD.
mask_filtering a mask ID value set by as using the function ARM_CAN_ObjectSetFilter with control = ARM_CAN_FILTER_ID_MASKABLE_ADD.
multiple_filters ... several filters to capture multiple ID values, or ID value ranges.
+

CAN message filtering using an exact ID

+

Example: accept in message object #1 only frames with extended ID = 0x1567.

+
status = ptrCAN->ObjectSetFilter (1, ARM_CAN_FILTER_ID_EXACT_ADD, ARM_CAN_EXTENDED_ID(0x1567), 0);
+
if (status != ARM_DRIVER_OK) ... // error handling
+

Example: accept in message object #2 frames with extended ID = 0x3167 and extended ID = 0x42123.

+
status = ptrCAN->ObjectSetFilter (2, ARM_CAN_FILTER_ID_EXACT_ADD, ARM_CAN_EXTENDED_ID(0x3167), 0);
+
if (status != ARM_DRIVER_OK) ... // error handling
+
status = ptrCAN->ObjectSetFilter (2, ARM_CAN_FILTER_ID_EXACT_ADD, ARM_CAN_EXTENDED_ID(0x42123), 0);
+
if (status != ARM_DRIVER_OK) ... // error handling
+

CAN message filtering using a range ID

+

Example: accept in message object #3 only frames with extended ID >= 0x1567 and extended ID <= 0x1577.

+
status = ptrCAN->ObjectSetFilter (3, ARM_CAN_FILTER_ID_RANGE_ADD, ARM_CAN_EXTENDED_ID(0x1567), ARM_CAN_EXTENDED_ID(0x1577));
+
if (status != ARM_DRIVER_OK) ... // error handling
+

CAN message filtering using a mask ID

+

Using the function ARM_CAN_ObjectSetFilter with control = ARM_CAN_FILTER_ID_MASKABLE_ADD allows to specify with arg a mask value.

+
    +
  • if a mask bit is 0, the corresponding ID bit will be accepted, regardless of the value.
    • +
  • if a mask bit is 1, the corresponding ID bit will be compared with the value of the ID filter bit; if they match the message will be accepted otherwise the frame is rejected.
    • +
+

Example: accept in message object #0 only frames with extended IDs 0x1560 to 0x156F.

+
status = ptrCAN->ObjectSetFilter (0, ARM_CAN_FILTER_ID_MASKABLE_ADD, ARM_CAN_EXTENDED_ID(0x1560), 0x1FFFFFF0);
+
if (status != ARM_DRIVER_OK) ... // error handling
+

Example: accept in message object #2 only frames with extended IDs 0x35603, 0x35613, 0x35623, and 0x35633.

+
status = ptrCAN->ObjectSetFilter (2, ARM_CAN_FILTER_ID_MASKABLE_ADD, ARM_CAN_EXTENDED_ID(0x35603), 0x1FFFFFCF);
+
if (status != ARM_DRIVER_OK) ... // error handling
+

Example: accept any message in object #4 regardless of the ID.

+
status = ptrCAN->ObjectSetFilter (4, ARM_CAN_FILTER_ID_MASKABLE_ADD, ARM_CAN_EXTENDED_ID(0), 0);
+
if (status != ARM_DRIVER_OK) ... // error handling
+

+Remote Frame

+

In general, data transmission is performed on an autonomous basis with the data source node sending out Data Frames.

+

However, sending a Remote Frame allows a destination node to request the data from the source node. The examples below shows the data exchange using a Remote Transmission Request (RTR).

+

Example for automatic Data Message response on RTR

+

For automatic data message response on an RTR, the object is configured with the function ARM_CAN_ObjectConfigure obj_cfg = ARM_CAN_OBJ_RX_RTR_TX_DATA.

+

In this case, the function ARM_CAN_MessageSend sets a data message that is transmitted when an RTR with a matching CAN ID is received. If ARM_CAN_MessageSend was not called before the RTR is received, the response is hardware dependent (either last data message is repeated or no data message is sent until ARM_CAN_MessageSend is called).

+

After data transmission is completed, the driver calls a callback function ARM_CAN_SignalObjectEvent with event = ARM_CAN_EVENT_SEND_COMPLETE and the related obj_idx.

+

Example:

+
status = ptrCAN->ObjectSetFilter(0, ARM_CAN_FILTER_ID_EXACT_ADD, ARM_CAN_EXTENDED_ID(0x12345678U), 0U);
+
if (status != ARM_DRIVER_OK) ... // error handling
+
status = trCAN->ObjectConfigure(0, ARM_CAN_OBJ_RX_RTR_TX_DATA);
+
if (status != ARM_DRIVER_OK) ... // error handling
+
+
memset(&tx_msg_info, 0, sizeof(ARM_CAN_MSG_INFO)); // Clear transmit message structure
+
tx_msg_info.id = ARM_CAN_EXTENDED_ID(0x12345678U); // Set ID of message
+
data_buf[0] = '1'; data_buf[1] = '2'; // Prepare data to transmit
+
data_buf[2] = '3'; data_buf[3] = '4';
+
data_buf[4] = '5'; data_buf[5] = '6';
+
data_buf[6] = '7'; data_buf[7] = '8';
+
ptrCAN->MessageSend(0, &tx_msg_info, data_buf, 8); // Start send message that will be triggered on RTR reception
+

Example for automatic Data Message reception using RTR

+

For automatic data message reception on an RTR, the object is configured with the function ARM_CAN_ObjectConfigure obj_cfg = ARM_CAN_OBJ_TX_RTR_RX_DATA.

+

The receiver or consumer requests data with transmission of an RTR with the ARM_CAN_MessageSend. This RTR requests from the transmitter or producer to send the data message. Once the data message is received, the driver calls a callback function ARM_CAN_SignalObjectEvent with event = ARM_CAN_EVENT_RECEIVE and the related obj_idx. The received data message can then be read with the function ARM_CAN_MessageRead.

+

Example:

+
status = ptrCAN->ObjectSetFilter(0, ARM_CAN_FILTER_ID_EXACT_ADD, ARM_CAN_EXTENDED_ID(0x12345678U), 0U);
+
if (status != ARM_DRIVER_OK) ... // error handling
+
status = ptrCAN->ObjectConfigure(0, ARM_CAN_OBJ_TX_RTR_RX_DATA);
+
if (status != ARM_DRIVER_OK) ... // error handling
+
memset(&tx_msg_info, 0, sizeof(ARM_CAN_MSG_INFO)); // Clear transmit message structure
+
tx_msg_info.id = ARM_CAN_EXTENDED_ID(0x12345678U); // Set ID of message
+
tx_msg_info.rtr = 1; // Set RTR flag of message to send RTR
+
tx_msg_info.dlc = 1; // Set data length code of message to 1 to request 1 data byte
+
ptrCAN->MesageSend(0, &tx_msg_info, 0, 0); // Send RTR
+
+
// Wait for ARM_CAN_EVENT_RECEIVE
+
ptrCAN->MessageRead(0, &rx_msg_info, data_buf, 8); // Read received message
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_CAN
+
+

Access structure of the CAN Driver.

+

The functions of the CAN are accessed by function pointers exposed by this structure. Refer to Common Driver Functions for overview information.

+

Each instance of a CAN provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:

+
    +
  • Driver_CAN0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_CAN1 is the name of the access struct of the second instance (no. 1).
    • +
+

A configuration setting in the middleware allows you to connect the middleware to a specific driver instance Driver_CANn.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_CAN_GetVersion : Get driver version. More...
 
ARM_CAN_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_CAN_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_CAN_SignalUnitEvent_t cb_unit_event, ARM_CAN_SignalObjectEvent_t cb_object_event)
 Pointer to ARM_CAN_Initialize : Initialize CAN interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_CAN_Uninitialize : De-initialize CAN interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_CAN_PowerControl : Control CAN interface power. More...
 
uint32_t(* GetClock )(void)
 Pointer to ARM_CAN_GetClock : Retrieve CAN base clock frequency. More...
 
int32_t(* SetBitrate )(ARM_CAN_BITRATE_SELECT select, uint32_t bitrate, uint32_t bit_segments)
 Pointer to ARM_CAN_SetBitrate : Set bitrate for CAN interface. More...
 
int32_t(* SetMode )(ARM_CAN_MODE mode)
 Pointer to ARM_CAN_SetMode : Set operating mode for CAN interface. More...
 
ARM_CAN_OBJ_CAPABILITIES(* ObjectGetCapabilities )(uint32_t obj_idx)
 Pointer to ARM_CAN_ObjectGetCapabilities : Retrieve capabilities of an object. More...
 
int32_t(* ObjectSetFilter )(uint32_t obj_idx, ARM_CAN_FILTER_OPERATION operation, uint32_t id, uint32_t arg)
 Pointer to ARM_CAN_ObjectSetFilter : Add or remove filter for message reception. More...
 
int32_t(* ObjectConfigure )(uint32_t obj_idx, ARM_CAN_OBJ_CONFIG obj_cfg)
 Pointer to ARM_CAN_ObjectConfigure : Configure object. More...
 
int32_t(* MessageSend )(uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, const uint8_t *data, uint8_t size)
 Pointer to ARM_CAN_MessageSend : Send message on CAN bus. More...
 
int32_t(* MessageRead )(uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, uint8_t *data, uint8_t size)
 Pointer to ARM_CAN_MessageRead : Read message received on CAN bus. More...
 
int32_t(* Control )(uint32_t control, uint32_t arg)
 Pointer to ARM_CAN_Control : Control CAN interface. More...
 
ARM_CAN_STATUS(* GetStatus )(void)
 Pointer to ARM_CAN_GetStatus : Get CAN status. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_CAN_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_CAN_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_CAN_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_CAN_SignalUnitEvent_t cb_unit_event, ARM_CAN_SignalObjectEvent_t cb_object_event)
+
+ +

Pointer to ARM_CAN_Initialize : Initialize CAN interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_CAN_Uninitialize : De-initialize CAN interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_CAN_PowerControl : Control CAN interface power.

+ +
+
+ +
+
+ + + + +
uint32_t(* GetClock)(void)
+
+ +

Pointer to ARM_CAN_GetClock : Retrieve CAN base clock frequency.

+ +
+
+ +
+
+ + + + +
int32_t(* SetBitrate)(ARM_CAN_BITRATE_SELECT select, uint32_t bitrate, uint32_t bit_segments)
+
+ +

Pointer to ARM_CAN_SetBitrate : Set bitrate for CAN interface.

+ +
+
+ +
+
+ + + + +
int32_t(* SetMode)(ARM_CAN_MODE mode)
+
+ +

Pointer to ARM_CAN_SetMode : Set operating mode for CAN interface.

+ +
+
+ +
+
+ + + + +
ARM_CAN_OBJ_CAPABILITIES(* ObjectGetCapabilities)(uint32_t obj_idx)
+
+ +

Pointer to ARM_CAN_ObjectGetCapabilities : Retrieve capabilities of an object.

+ +
+
+ +
+
+ + + + +
int32_t(* ObjectSetFilter)(uint32_t obj_idx, ARM_CAN_FILTER_OPERATION operation, uint32_t id, uint32_t arg)
+
+ +

Pointer to ARM_CAN_ObjectSetFilter : Add or remove filter for message reception.

+ +
+
+ +
+
+ + + + +
int32_t(* ObjectConfigure)(uint32_t obj_idx, ARM_CAN_OBJ_CONFIG obj_cfg)
+
+ +

Pointer to ARM_CAN_ObjectConfigure : Configure object.

+ +
+
+ +
+
+ + + + +
int32_t(* MessageSend)(uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, const uint8_t *data, uint8_t size)
+
+ +

Pointer to ARM_CAN_MessageSend : Send message on CAN bus.

+ +
+
+ +
+
+ + + + +
int32_t(* MessageRead)(uint32_t obj_idx, ARM_CAN_MSG_INFO *msg_info, uint8_t *data, uint8_t size)
+
+ +

Pointer to ARM_CAN_MessageRead : Read message received on CAN bus.

+ +
+
+ +
+
+ + + + +
int32_t(* Control)(uint32_t control, uint32_t arg)
+
+ +

Pointer to ARM_CAN_Control : Control CAN interface.

+ +
+
+ +
+
+ + + + +
ARM_CAN_STATUS(* GetStatus)(void)
+
+ +

Pointer to ARM_CAN_GetStatus : Get CAN status.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_CAN_CAPABILITIES
+
+

CAN Device Driver Capabilities.

+

A CAN driver can be implemented with different capabilities encoded in the data fields of this structure.

+

Returned by:

+ +
See Also
ARM_CAN_OBJ_CAPABILITIES for information about CAN objects.
+
+ + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +num_objects: 8 +Number of CAN Message Objects available.
+uint32_t +reentrant_operation: 1 +Support for reentrant calls to ARM_CAN_MessageSend, ARM_CAN_MessageRead, ARM_CAN_ObjectConfigure and abort message sending used by ARM_CAN_Control.
+uint32_t +fd_mode: 1 +Support for CAN with flexible data-rate mode (CAN_FD) (set by ARM_CAN_Control)
+uint32_t +restricted_mode: 1 +Support for restricted operation mode (set by ARM_CAN_SetMode)
+uint32_t +monitor_mode: 1 +Support for bus monitoring mode (set by ARM_CAN_SetMode)
+uint32_t +internal_loopback: 1 +Support for internal loopback mode (set by ARM_CAN_SetMode)
+uint32_t +external_loopback: 1 +Support for external loopback mode (set by ARM_CAN_SetMode)
+uint32_t +reserved: 18 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_CAN_STATUS
+
+

CAN Status.

+

Structure with information about the status of the CAN unit state and errors. The data fields encode the unit bus state, last error code, transmitter error count, and receiver error count.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +unit_state: 4 +Unit bus state.
+uint32_t +last_error_code: 4 +Last error code.
+uint32_t +tx_error_count: 8 +Transmitter error count.
+uint32_t +rx_error_count: 8 +Receiver error count.
+uint32_t +reserved: 8 +
+ +
+
+ +
+
+ + + + +
struct ARM_CAN_MSG_INFO
+
+

CAN Message Information.

+

Structure with information about the CAN message.

+

In CAN mode, the following ARM_CAN_MSG_INFO data fields are ignored: edl, brs, esi.
+In CAN FD mode, the following ARM_CAN_MSG_INFO data field is ignored: rtr.

+

Parameter for:

+ +
See Also
CAN Message Filtering
+
+Remote Frame
+
+ + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +id +CAN identifier with frame format specifier (bit 31)
+uint32_t +rtr: 1 +Remote transmission request frame.
+uint32_t +edl: 1 +Flexible data-rate format extended data length.
+uint32_t +brs: 1 +Flexible data-rate format with bitrate switch.
+uint32_t +esi: 1 +Flexible data-rate format error state indicator.
+uint32_t +dlc: 4 +Data length code.
+uint32_t +reserved: 24 +
+ +
+
+ +
+
+ + + + +
struct ARM_CAN_OBJ_CAPABILITIES
+
+

CAN Object Capabilities.

+

A CAN object can be implemented with different capabilities encoded in the data fields of this structure.

+

Returned by:

+ +
See Also
ARM_CAN_ObjectConfigure
+
+ARM_CAN_MessageSend
+
+ARM_CAN_MessageRead
+
+ARM_CAN_MSG_INFO
+
+CAN Message Filtering
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +tx: 1 +Object supports transmission.
+uint32_t +rx: 1 +Object supports reception.
+uint32_t +rx_rtr_tx_data: 1 +Object supports RTR reception and automatic Data Frame transmission.
+uint32_t +tx_rtr_rx_data: 1 +Object supports RTR transmission and automatic Data Frame reception.
+uint32_t +multiple_filters: 1 +Object allows assignment of multiple filters to it.
+uint32_t +exact_filtering: 1 +Object supports exact identifier filtering.
+uint32_t +range_filtering: 1 +Object supports range identifier filtering.
+uint32_t +mask_filtering: 1 +Object supports mask identifier filtering.
+uint32_t +message_depth: 8 +Number of messages buffers (FIFO) for that object.
+uint32_t +reserved: 16 +Reserved (must be zero)
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_CAN_SignalUnitEvent_t
+
+ +

Pointer to ARM_CAN_SignalUnitEvent : Signal CAN Unit Event.

+

Provides the typedef for the callback function ARM_CAN_SignalUnitEvent.

+

Parameter for:

+ + +
+
+ +
+
+ + + + +
ARM_CAN_SignalObjectEvent_t
+
+ +

Pointer to ARM_CAN_SignalObjectEvent : Signal CAN Object Event.

+

Provides the typedef for the callback function ARM_CAN_SignalObjectEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_CAN_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_CAN_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_CAN Driver_CAN0;
+
ARM_DRIVER_CAN *drv_info;
+
+
void setup_can (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_CAN0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_CAN_CAPABILITIES ARM_CAN_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_CAN_CAPABILITIES
+

The function ARM_CAN_GetCapabilities returns information about the capabilities in this driver implementation. The data fields of the structure ARM_CAN_CAPABILITIES encode various capabilities.

+

Example:

+
extern ARM_DRIVER_CAN Driver_CAN0;
+
ARM_DRIVER_CAN *drv_info;
+
+
void read_capabilities (void) {
+
ARM_CAN_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_CAN0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_CAN_Initialize (ARM_CAN_SignalUnitEvent_t cb_unit_event,
ARM_CAN_SignalObjectEvent_t cb_object_event 
)
+
+ +

Initialize CAN interface and register signal (callback) functions.

+
Parameters
+ + + +
[in]cb_unit_eventPointer to ARM_CAN_SignalUnitEvent callback function
[in]cb_object_eventPointer to ARM_CAN_SignalObjectEvent callback function
+
+
+
Returns
Status Error Codes
+

The function initializes the CAN interface.

+

The function performs the following operations:

+
    +
  • Initializes the resources needed for the CAN interface, for example dynamic memory allocation, RTOS object allocation, and possibly hardware pin configuration.
    • +
  • Registers the ARM_CAN_SignalUnitEvent callback function.
    • +
  • Registers the ARM_CAN_SignalObjectEvent callback function.
    • +
+

The parameter cb_unit_event is a pointer to the ARM_CAN_SignalUnitEvent callback function; use a NULL pointer when no callback signals are required.

+

The parameter cb_object_event is a pointer to the ARM_CAN_SignalObjectEvent callback function; use a NULL pointer when no callback signals are required.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_CAN_Uninitialize (void )
+
+ +

De-initialize CAN interface.

+
Returns
Status Error Codes
+

The function ARM_CAN_Uninitialize de-initializes the resources of the CAN interface. It is called to release the software resources used by the interface such as deallocate any RTOS objects, dynamic memory and pin de-configuration.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_CAN_PowerControl (ARM_POWER_STATE state)
+
+ +

Control CAN interface power.

+
Parameters
+ + +
[in]statePower state +
+
+
+
Returns
Status Error Codes
+

The function ARM_CAN_PowerControl controls the power modes of the CAN interface.

+

The parameter state can be:

+
    +
  • ARM_POWER_FULL: Activate clocks and driver functionality as if peripheral was reset.
    • +
  • ARM_POWER_OFF: Unconditionally put peripheral into non-functional (reset) state.
    • +
  • ARM_POWER_LOW: Put peripheral into low power consumption state ready to wake up on bus event.
    • +
+ +
+
+ +
+
+ + + + + + + + +
uint32_t ARM_CAN_GetClock (void )
+
+ +

Retrieve CAN base clock frequency.

+
Returns
base clock frequency
+

The function ARM_CAN_GetClock returns the CAN base clock frequency in [Hz]. This value may be used to validate the bitrate for the function ARM_CAN_SetBitrate.

+

Example:

+
CAN_clock = ARM_CAN_GetClock(); // CAN base clock frequency
+
+
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_CAN_SetBitrate (ARM_CAN_BITRATE_SELECT select,
uint32_t bitrate,
uint32_t bit_segments 
)
+
+ +

Set bitrate for CAN interface.

+
Parameters
+ + + + +
[in]selectBitrate selection +
[in]bitrateBitrate
[in]bit_segmentsBit segments settings +
+
+
+
Returns
Status Error Codes
+

The function ARM_CAN_SetBitrate sets the CAN communication bit rate.

+

The parameter select selects the bit rate affected by function call as defined in ARM_CAN_BITRATE_SELECT and listed in the table below.

+ + + + + + + +
Parameter select CAN Mode Bit Rate
ARM_CAN_BITRATE_NOMINAL Select nominal (flexible data-rate arbitration) bitrate (CAN 2.0B)
ARM_CAN_BITRATE_FD_DATA Select flexible data-rate data bitrate (CAN_FD)
+

The parameter bitrate is the bit rate for the selected CAN mode.

+

The parameter bit_segments is used to setup the time quanta for sampling (see picture below). The values listed in the table below are ORed and specify the various sampling segments. The CAN controller samples each bit on the bus at the Sample Point.

+ + + + + + + + + + + + + + + +
Parameter bit_segments Bit for select = ARM_CAN_BITRATE_NOMINAL
+ (CAN specification) 		for select = ARM_CAN_BITRATE_NOMINAL
+ (CAN FD specification) 		for select = ARM_CAN_BITRATE_FD_DATA
+ (CAN FD specification)
ARM_CAN_BIT_PROP_SEG(x)
+ Propagation Time Segment
+ (PROP_SEG) 		0..7 x = [1..8] x = [1..32] or more x = [0..8]
ARM_CAN_BIT_PHASE_SEG1(x)
+ Phase Buffer Segment 1
+ (PHASE_SEG1) 		8..15 x = [1..8] x = [1..32] or more x = [1..8]
ARM_CAN_BIT_PHASE_SEG2(x)
+ Phase Buffer Segment 2
+ (PHASE_SEG2) 		16..23 x = [1..8] x = [1..32] or more x = [1..8]
The maximum allowed value is x = MAX (PHASE_SEG1, IPT). IPT = Information Processing Time. Usually, IPT = 2. Exceptions apply. Read the specifications of your CAN controller.
ARM_CAN_BIT_SJW(x)
+ (Re-)Synchronization Jump Width
+ (SJW). 		24..31 x = [1..4] x = [1..4] x = [1..4]
The maximum allowed value is x = MIN (MIN (PHASE_SEG1, PHASE_SEG2), 4). SJW is not allowed to be greater than either PHASE segment.
+

The picture shows a Nominal Bit Time with 10 time quanta.

+
+CAN_Bit_Timing.png +
+CAN Bit Timing
+

The time quanta (N) per bit is:

+
N = 1 + PROP_SEG + PHASE_SEG1 + PHASE_SEG2; // note SYNC_SEG is always 1
+

The driver uses this value and the CAN clock to calculate a suitable prescaler value (P). If the driver cannot achieve the requested bitrate it returns with ARM_CAN_INVALID_BITRATE. The formula for the bitrate is:

+
bitrate = (CAN_Clock / P) / N;
+

Example:

+
status = ptrCAN->SetBitrate (ARM_CAN_BITRATE_NOMINAL, // Set nominal bitrate
+
125000U, // Set bitrate to 125 kbit/s
+
ARM_CAN_BIT_PROP_SEG(5U) | // Set propagation segment to 5 time quanta
+
ARM_CAN_BIT_PHASE_SEG1(1U) | // Set phase segment 1 to 1 time quantum (sample point at 87.5% of bit time)
+
ARM_CAN_BIT_PHASE_SEG2(1U) | // Set phase segment 2 to 1 time quantum (total bit is 8 time quanta long)
+
ARM_CAN_BIT_SJW(1U)); // Resynchronization jump width is same as phase segment 2
+

In this example, N = 8 and with a CAN_Clock = 8MHz the prescaler (P) is calculated by the driver to 8.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_CAN_SetMode (ARM_CAN_MODE mode)
+
+ +

Set operating mode for CAN interface.

+
Parameters
+ + +
[in]modeOperating mode +
+
+
+
Returns
Status Error Codes
+

The function ARM_CAN_SetMode sets the CAN bus communication mode using the parameter mode.

+

The table lists the values for mode.

+ + + + + + + + + + + + + + + +
Parameter mode Bus Communication Mode supported when ARM_CAN_OBJ_CAPABILITIES data field
ARM_CAN_MODE_INITIALIZATION Initialization mode; Used to setup communication parameters for the reception objects and global filtering, while peripheral is not active on the bus. Refer to CAN Message Filtering for details. always supported
ARM_CAN_MODE_NORMAL Normal operation mode. Used when peripheral is in active mode to receive, transmit, and acknowledge messages on the bus. Depending on the current unit state, it can generate error or overload messages. Verify the unit state with ARM_CAN_GetStatus. always supported
ARM_CAN_MODE_RESTRICTED Restricted operation mode. Used for monitoring the bus communication non-intrusively without transmitting. restricted_mode = 1
ARM_CAN_MODE_MONITOR Bus monitoring mode. monitor_mode = 1
ARM_CAN_MODE_LOOPBACK_INTERNAL Test mode; loopback of CAN transmission to its receiver. No transmission visible on CAN bus. internal_loopback = 1
ARM_CAN_MODE_LOOPBACK_EXTERNAL Test mode; loopback of CAN transmission to its receiver. Transmission is visible on CAN bus. external_loopback = 1
+ +
+
+ +
+
+ + + + + + + + +
ARM_CAN_OBJ_CAPABILITIES ARM_CAN_ObjectGetCapabilities (uint32_t obj_idx)
+
+ +

Retrieve capabilities of an object.

+
Parameters
+ + +
[in]obj_idxObject index
+
+
+
Returns
ARM_CAN_OBJ_CAPABILITIES
+

The function ARM_CAN_ObjectGetCapabilities retrieves the capabilities of a CAN object. The structure ARM_CAN_OBJ_CAPABILITIES stores the values.

+

The parameter obj_idx is the message object index.

+
See Also
ARM_CAN_ObjectConfigure
+
+ARM_CAN_ObjectSetFilter
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_CAN_ObjectSetFilter (uint32_t obj_idx,
ARM_CAN_FILTER_OPERATION operation,
uint32_t id,
uint32_t arg 
)
+
+ +

Add or remove filter for message reception.

+
Parameters
+ + + + + +
[in]obj_idxObject index of object that filter should be or is assigned to
[in]operationOperation on filter +
[in]idID or start of ID range (depending on filter type)
[in]argMask or end of ID range (depending on filter type)
+
+
+
Returns
Status Error Codes
+

The function ARM_CAN_ObjectSetFilter sets or removes the filter for message reception. Refer to CAN Message Filtering for details on filtering.

+

The parameter obj_idx is the message object index.
+The parameter operation is the operation on the filter as listed in the table below and which are defined in the structure ARM_CAN_FILTER_OPERATION.

+ + + + + + + + + + + + + + + +
Parameter operation Operation on Filter supported when ARM_CAN_OBJ_CAPABILITIES data field
ARM_CAN_FILTER_ID_EXACT_ADD Add exact ID filter exact_filtering = 1
ARM_CAN_FILTER_ID_EXACT_REMOVE Remove exact ID filter exact_filtering = 1
ARM_CAN_FILTER_ID_RANGE_ADD Add range ID filter range_filtering = 1
ARM_CAN_FILTER_ID_RANGE_REMOVE Remove range ID filter range_filtering = 1
ARM_CAN_FILTER_ID_MASKABLE_ADD Add maskable ID filter mask_filtering = 1
ARM_CAN_FILTER_ID_MASKABLE_REMOVE Remove maskable ID filter mask_filtering = 1
+

The parameter id is the identifier of the filter or defines the start of the filter range (depends on the filter operation).
+The parameter arg is the mask of the filter or defines the end of the filter range (depends on the filter operation).

+
See Also
ARM_CAN_ObjectConfigure
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_CAN_ObjectConfigure (uint32_t obj_idx,
ARM_CAN_OBJ_CONFIG obj_cfg 
)
+
+ +

Configure object.

+
Parameters
+ + + +
[in]obj_idxObject index
[in]obj_cfgObject configuration state +
+
+
+
Returns
Status Error Codes
+

The function ARM_CAN_ObjectConfigure configures the message object, which can be a mailbox or FIFO. Refer to CAN Message Filtering for details.

+

The parameter obj_idx specifies the message object index.
+The parameter obj_cfg configures the object with values as shown in the following table.

+ + + + + + + + + + + + + +
Parameter obj_cfg Object Configuration supported when ARM_CAN_OBJ_CAPABILITIES data field
ARM_CAN_OBJ_INACTIVE Deactivate object (default after ARM_CAN_Initialize) always supported
ARM_CAN_OBJ_RX Receive object; read received message with ARM_CAN_MessageRead. rx = 1
ARM_CAN_OBJ_TX Transmit object; send message with ARM_CAN_MessageSend. tx = 1
ARM_CAN_OBJ_RX_RTR_TX_DATA Remote Frame Receive; when RTR is received data message is transmitted; set data message with ARM_CAN_MessageSend. rx_rtr_tx_data = 1
ARM_CAN_OBJ_TX_RTR_RX_DATA Remote Frame Transmit; a RTR is sent with ARM_CAN_MessageSend to trigger object reception; read received data message with ARM_CAN_MessageRead. tx_rtr_rx_data = 1
+

When the object is deactivated, it is not used for data communication.

+
See Also
ARM_CAN_ObjectSetFilter
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_CAN_MessageSend (uint32_t obj_idx,
ARM_CAN_MSG_INFO * msg_info,
const uint8_t * data,
uint8_t size 
)
+
+ +

Send message on CAN bus.

+
Parameters
+ + + + + +
[in]obj_idxObject index
[in]msg_infoPointer to CAN message information
[in]dataPointer to data buffer
[in]sizeNumber of data bytes to send
+
+
+
Returns
value >= 0 number of data bytes accepted to send
+
+value < 0 Status Error Codes
+

The function ARM_CAN_MessageSend sends a CAN message on the CAN bus, or sets data message that will be automatically returned upon RTR reception with matching CAN ID.

+

Only one message can be sent with a call to this function (for CAN up to 8 bytes; for CAN FD up to 64 bytes of data). A message transmission can be terminated with a call to the function ARM_CAN_Control with control = ARM_CAN_ABORT_MESSAGE_SEND.

+

The parameter obj_idx specifies the message object index.

+

The parameter msg_info is a pointer to the structure ARM_CAN_MSG_INFO, which contains the following relevant data fields for sending message:

+
    +
  • id: Identifier of the message; bit 31 specifies if this is an 11-bit or 29-bit identifier.
    • +
  • rtr: Specifies if Remote Transmission Request should be sent (dlc is used for number of requested bytes), otherwise the data message will be sent. Refer to Remote Frame for details.
    • +
  • edl: Specifies if Extended Data Length is used; for CAN FD, message can contain up to 64 data bytes.
    • +
  • brs: Specifies if Bit Rate Switching is to be used; for CAN FD, the bit rate can be increased during data phase.
    • +
  • dlc: Data Length Code of requested data bytes when sending Remote Transmission Request.
    • +
+

The parameter data is a pointer to the data buffer.
+The parameter size is the number of data bytes to send.
+ The function returns the number of bytes accepted to be sent or ARM_DRIVER_ERROR_BUSY if the hardware is not ready to accept a new message for transmission.

+

When the message is sent, the callback function ARM_CAN_SignalObjectEvent is called signalling ARM_CAN_EVENT_SEND_COMPLETE on specified object.

+
See Also
CAN Message Filtering
+

Example:

+
status = ptrCAN->ObjectConfigure(0, ARM_CAN_OBJ_TX);
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
memset(&tx_msg_info, 0, sizeof(ARM_CAN_MSG_INFO)); // Clear transmit message structure
+
tx_msg_info.id = ARM_CAN_EXTENDED_ID(0x12345678U); // Set ID of message
+
data_buf[0] = '1'; data_buf[1] = '2'; // Prepare data to transmit
+
data_buf[2] = '3'; data_buf[3] = '4';
+
data_buf[4] = '5'; data_buf[5] = '6';
+
data_buf[6] = '7'; data_buf[7] = '8';
+
status = ptrCAN->MesageSend(0, &tx_msg_info, data_buf, 8); // Send message
+
if (status != ARM_DRIVER_OK ) { Error_Handler(); }
+
+
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_CAN_MessageRead (uint32_t obj_idx,
ARM_CAN_MSG_INFO * msg_info,
uint8_t * data,
uint8_t size 
)
+
+ +

Read message received on CAN bus.

+
Parameters
+ + + + + +
[in]obj_idxObject index
[out]msg_infoPointer to read CAN message information
[out]dataPointer to data buffer for read data
[in]sizeMaximum number of data bytes to read
+
+
+
Returns
value >= 0 number of data bytes read
+
+value < 0 Status Error Codes
+

The function ARM_CAN_MessageRead reads the message received on the CAN bus, if obj_idx was configured for reception or for automatic Data Message reception using RTR and the callback function ARM_CAN_SignalObjectEvent was called signalling ARM_CAN_EVENT_RECEIVE. If the message was overrun by another received message, then the callback function ARM_CAN_SignalObjectEvent will be called signalling ARM_CAN_EVENT_RECEIVE_OVERRUN.

+

The function can read a maximum of 8 data bytes for CAN and 64 bytes for CAN FD.

+

The parameter obj_idx specifies the message object index.
+The parameter msg_info is a pointer to the CAN information structure.
+The parameter data is a pointer to the data buffer for reading data.
+The parameter size is data buffer size in bytes and indicates the maximum number of bytes that can be read.

+

The function returns the number of read data in bytes or the Status Error Codes.

+

All data fields of the structure ARM_CAN_MSG_INFO are updated as described below:

+
    +
  • id: Identifier of the message that was received, bit 31 specifies if it is a 11-bit identifier or 29-bit identifier.
    • +
  • rtr: 1 = Remote Frame Request was received (dlc is number of requested bytes). 0 = data message
    • +
  • edl: 1 = CAN FD Extended Data Length message was received. 0 = not Extended Data Length message.
    • +
  • brs: 1 = CAN FD Bit Rate Switching was used for message transfer. 0 = no Bit Rate Switching was used.
    • +
  • esi: 1 = CAN FD Error State Indicator is active for received message. 0 = Error State Indicator is not active.
    • +
  • dlc: Data Length Code is the number of data bytes in the received message or number of data bytes requested by RTR.
    • +
+

Message reception can be disabled by de-configuring the receive object with the function ARM_CAN_ObjectConfigure.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_CAN_Control (uint32_t control,
uint32_t arg 
)
+
+ +

Control CAN interface.

+
Parameters
+ + + +
[in]controlOperation +
[in]argArgument of operation
+
+
+
Returns
Status Error Codes
+

The function ARM_CAN_Control controls the CAN interface settings and executes various operations.

+

The parameter control specifies various operations that are listed in the table below.

+

The parameters arg provides, depending on the control value, additional information or set values.

+ + + + + + + + + + + +
Parameter control Operation
ARM_CAN_SET_FD_MODE Select CAN FD mode; arg : 0 = CAN 2.0B; 1 = CAN FD.
ARM_CAN_ABORT_MESSAGE_SEND Abort sending of CAN message; arg : object index
ARM_CAN_CONTROL_RETRANSMISSION Enable/disable automatic retransmission; arg : 0 = disable, 1 = enable (default state)
ARM_CAN_SET_TRANSCEIVER_DELAY Set transceiver delay; arg : delay in time quanta
+

Verify the CAN interface capabilities with ARM_CAN_GetCapabilities.

+ +
+
+ +
+
+ + + + + + + + +
ARM_CAN_STATUS ARM_CAN_GetStatus (void )
+
+ +

Get CAN status.

+
Returns
CAN status ARM_CAN_STATUS
+

The function ARM_CAN_GetStatus retrieves runtime information on CAN bus and CAN unit state.

+

The following defines give information about the current unit involvement in bus communication:

+ + + + + + + + + + + +
Unit State Description
ARM_CAN_UNIT_STATE_INACTIVE Unit state: Not active on the bus. Unit is in initialization state.
ARM_CAN_UNIT_STATE_ACTIVE Unit state: Active on the bus. Unit can generate active error frames.
ARM_CAN_UNIT_STATE_PASSIVE Unit state: Error passive. Unit is interacting on the bus but does not send active error frames.
ARM_CAN_UNIT_STATE_BUS_OFF Unit state: Bus-off. Unit does not participate on the bus but monitors it and can recover to active state.
+

The following defines are error codes of the last error that happened on the bus:

+ + + + + + + + + + + + + + + +
Last Error Code Description
ARM_CAN_LEC_NO_ERROR No error. There was no error since last read of status or last successful transmit or receive.
ARM_CAN_LEC_BIT_ERROR Bit error. The bit monitored is different than the bit sent (except during arbitration phase).
ARM_CAN_LEC_STUFF_ERROR Bit stuffing error. There were 6 consecutive same bit levels on the bus.
ARM_CAN_LEC_CRC_ERROR CRC error. CRC of received data is not as expected.
ARM_CAN_LEC_FORM_ERROR Illegal fixed-form bit. Error in fixed form bits.
ARM_CAN_LEC_ACK_ERROR Acknowledgment error. Message was not acknowledged by any receiver on the bus.
+ +
+
+ +
+
+ + + + + + + + +
void ARM_CAN_SignalUnitEvent (uint32_t event)
+
+ +

Signal CAN unit event.

+
Parameters
+ + +
[in]eventCAN Unit Events
+
+
+
Returns
none
+

The function ARM_CAN_SignalUnitEvent is a callback function registered by the function ARM_CAN_Initialize.

+

The parameter event indicates unit event that occurred during driver operation.

+

The following callback notifications are generated:

+ + + + + + + + + + + + + +
Parameter event Value Description
ARM_CAN_EVENT_UNIT_INACTIVE 0 Unit entered Inactive state.
ARM_CAN_EVENT_UNIT_ACTIVE 1 Unit entered Error Active state.
ARM_CAN_EVENT_UNIT_WARNING 2 Unit entered Error Warning state (one or both error counters >= 96).
ARM_CAN_EVENT_UNIT_PASSIVE 3 Unit entered Error Passive state.
ARM_CAN_EVENT_UNIT_BUS_OFF 4 Unit entered Bus-off state.
+
See Also
ARM_CAN_GetStatus
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
void ARM_CAN_SignalObjectEvent (uint32_t obj_idx,
uint32_t event 
)
+
+ +

Signal CAN object event.

+
Parameters
+ + + +
[in]obj_idxObject index
[in]eventCAN Object Events
+
+
+
Returns
none
+

The function ARM_CAN_SignalObjectEvent is a callback function registered by the function ARM_CAN_Initialize and signals a CAN message object event.

+

The parameter obj_idx is the index of the message object.
+The parameter event indicates object event that occurred during driver operation.

+

The following events can be generated:

+ + + + + + + + + +
Parameter event Bit Description
ARM_CAN_EVENT_SEND_COMPLETE 0 Message was sent successfully by the obj_idx object.
ARM_CAN_EVENT_RECEIVE 1 Message was received successfully by the obj_idx object.
ARM_CAN_EVENT_RECEIVE_OVERRUN 2 Message was overwritten before it was read on the obj_idx object.
+
See Also
ARM_CAN_MessageSend
+
+ARM_CAN_MessageRead
+
+ARM_CAN_ObjectConfigure
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__can__interface__gr.js b/docs/Driver/html/group__can__interface__gr.js new file mode 100644 index 0000000..88033df --- /dev/null +++ b/docs/Driver/html/group__can__interface__gr.js @@ -0,0 +1,81 @@ +var group__can__interface__gr = +[ + [ "Status Error Codes", "group__can__status__code__ctrls.html", "group__can__status__code__ctrls" ], + [ "CAN Unit Events", "group__CAN__unit__events.html", "group__CAN__unit__events" ], + [ "CAN Object Events", "group__CAN__events.html", "group__CAN__events" ], + [ "CAN Control Codes", "group__can__control.html", "group__can__control" ], + [ "ARM_DRIVER_CAN", "group__can__interface__gr.html#structARM__DRIVER__CAN", [ + [ "GetVersion", "group__can__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__can__interface__gr.html#a62c0c62c2bf482c000b1b2a2c817a96f", null ], + [ "Initialize", "group__can__interface__gr.html#a322b44b8e757887616b75035a8fd7027", null ], + [ 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"group__can__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_CAN_STATUS", "group__can__interface__gr.html#structARM__CAN__STATUS", [ + [ "unit_state", "group__can__interface__gr.html#a96ec94acab56690b3801e3c5fbd09fa2", null ], + [ "last_error_code", "group__can__interface__gr.html#a2171ea8dff5e4b54e84728aa134854b6", null ], + [ "tx_error_count", "group__can__interface__gr.html#a8941505f6f3ebd69825c4382184c580f", null ], + [ "rx_error_count", "group__can__interface__gr.html#ab7e8b863b379b786ad1af935aa3ef2e8", null ], + [ "reserved", "group__can__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_CAN_MSG_INFO", "group__can__interface__gr.html#structARM__CAN__MSG__INFO", [ + [ "id", "group__can__interface__gr.html#abaabdc509cdaba7df9f56c6c76f3ae19", null ], + [ "rtr", "group__can__interface__gr.html#a1f32fc9e5d3b33babf5905140e7a53af", null ], + [ "edl", "group__can__interface__gr.html#ab6883964c9d4bdf60616684e8d2459df", null ], + [ "brs", "group__can__interface__gr.html#a3539c043c5868c59f76c736fe2bcadf4", null ], + [ "esi", "group__can__interface__gr.html#ada78e3124de6adf5a5d212f9ebc4bbe0", null ], + [ "dlc", "group__can__interface__gr.html#a811fbb0cb2c2263b1a7440a7e9d78239", null ], + [ "reserved", "group__can__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_CAN_OBJ_CAPABILITIES", "group__can__interface__gr.html#structARM__CAN__OBJ__CAPABILITIES", [ + [ "tx", "group__can__interface__gr.html#a9706173b2ed538efeb5ee4a952e2272f", null ], + [ "rx", "group__can__interface__gr.html#a895532773c3204e1538191f155c7bac8", null ], + [ "rx_rtr_tx_data", "group__can__interface__gr.html#a8a41139926d7c032247458d055071fda", null ], + [ "tx_rtr_rx_data", "group__can__interface__gr.html#a1debac19545140bdfe3c5fa8d53f1863", null ], + [ "multiple_filters", "group__can__interface__gr.html#a3662fb9a8fb81212043cadd90da704af", null ], + [ "exact_filtering", "group__can__interface__gr.html#a886337af58da4f995529eba228fb9b7a", null ], + [ "range_filtering", "group__can__interface__gr.html#a96dcf869f4adc9cec686630082c7c60a", null ], + [ "mask_filtering", "group__can__interface__gr.html#a2aa0e772d6cb8c30bb76ce1324423464", null ], + [ "message_depth", "group__can__interface__gr.html#a5a782fc223b0ea5034c6676eaec6f2d4", null ], + [ "reserved", "group__can__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_CAN_SignalUnitEvent_t", "group__can__interface__gr.html#gaac07b9fdf614bf439414f5417aaa376e", null ], + [ "ARM_CAN_SignalObjectEvent_t", "group__can__interface__gr.html#ga7ceceac3e9aa0981c5cacfab88efb4eb", null ], + [ "ARM_CAN_GetVersion", "group__can__interface__gr.html#ga4256d5b23ffcb27759a05f8e6b854f13", null ], + [ "ARM_CAN_GetCapabilities", "group__can__interface__gr.html#ga35f21cabe1637b1be964024a8f77721c", null ], + [ "ARM_CAN_Initialize", "group__can__interface__gr.html#gaa72ceb25ba67e279d7432404632deb44", null ], + [ "ARM_CAN_Uninitialize", "group__can__interface__gr.html#ga1e3e364b64f2ab277399e3279cce5ef8", null ], + [ "ARM_CAN_PowerControl", "group__can__interface__gr.html#ga6f634f126ac97daef2f3115aa7bfed7c", null ], + [ "ARM_CAN_GetClock", "group__can__interface__gr.html#ga1fe6cc207415de604975ae251e269361", null ], + [ "ARM_CAN_SetBitrate", "group__can__interface__gr.html#ga88bb27a8525503a250cca7a2c4a5d07a", null ], + [ "ARM_CAN_SetMode", "group__can__interface__gr.html#ga28226a6e223f9b95b4dafb7c2f48a855", null ], + [ "ARM_CAN_ObjectGetCapabilities", "group__can__interface__gr.html#ga45ab314f5121cf5a1b32d9adc600e0f7", null ], + [ "ARM_CAN_ObjectSetFilter", "group__can__interface__gr.html#ga4f9bc7088704483388e14872c9d5385d", null ], + [ "ARM_CAN_ObjectConfigure", "group__can__interface__gr.html#ga00ec0715f6755a49dae5b60dca182630", null ], + [ "ARM_CAN_MessageSend", "group__can__interface__gr.html#ga0dcffd362b4093043442a030eaebbcfe", null ], + [ "ARM_CAN_MessageRead", "group__can__interface__gr.html#gafc37084df5eab32f593c2744d35cf647", null ], + [ "ARM_CAN_Control", "group__can__interface__gr.html#ga8d9f0c5f03a8a81ab062b5aa57e5dea4", null ], + [ "ARM_CAN_GetStatus", "group__can__interface__gr.html#ga676d6b567fc4ab3d44f5d7a50ec9419c", null ], + [ "ARM_CAN_SignalUnitEvent", "group__can__interface__gr.html#ga38795d1ed135ce3bd87f31ef1596bccf", null ], + [ "ARM_CAN_SignalObjectEvent", "group__can__interface__gr.html#gabfcaeac9e2ca25936ba5a29f2d594e7e", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__interface__gr_structARM__CAN__CAPABILITIES.js b/docs/Driver/html/group__can__interface__gr_structARM__CAN__CAPABILITIES.js new file mode 100644 index 0000000..a643789 --- /dev/null +++ b/docs/Driver/html/group__can__interface__gr_structARM__CAN__CAPABILITIES.js @@ -0,0 +1,11 @@ +var group__can__interface__gr_structARM__CAN__CAPABILITIES = +[ + [ "num_objects", "group__can__interface__gr.html#a69bd1a164443cf6f501489f4d31f4681", null ], + [ "reentrant_operation", "group__can__interface__gr.html#ae0514834750c7452431717a881471e2b", null ], + [ "fd_mode", "group__can__interface__gr.html#a15d22d5906d419ed1a7ca0968be00a04", null ], + [ "restricted_mode", "group__can__interface__gr.html#a93008ac105806db484e78e0582ca118c", null ], + [ "monitor_mode", "group__can__interface__gr.html#a176f42e68d9cba86b3594c40044b86c6", null ], + [ "internal_loopback", "group__can__interface__gr.html#af19cdbb26d3496ed7dd63a59a7c7711f", null ], + [ "external_loopback", "group__can__interface__gr.html#a2b76df7e4bfbdd9866cc906415e626c9", null ], + [ "reserved", "group__can__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__interface__gr_structARM__CAN__MSG__INFO.js b/docs/Driver/html/group__can__interface__gr_structARM__CAN__MSG__INFO.js new file mode 100644 index 0000000..4aa939e --- /dev/null +++ b/docs/Driver/html/group__can__interface__gr_structARM__CAN__MSG__INFO.js @@ -0,0 +1,10 @@ +var group__can__interface__gr_structARM__CAN__MSG__INFO = +[ + [ "id", "group__can__interface__gr.html#abaabdc509cdaba7df9f56c6c76f3ae19", null ], + [ "rtr", "group__can__interface__gr.html#a1f32fc9e5d3b33babf5905140e7a53af", null ], + [ "edl", "group__can__interface__gr.html#ab6883964c9d4bdf60616684e8d2459df", null ], + [ "brs", "group__can__interface__gr.html#a3539c043c5868c59f76c736fe2bcadf4", null ], + [ "esi", "group__can__interface__gr.html#ada78e3124de6adf5a5d212f9ebc4bbe0", null ], + [ "dlc", "group__can__interface__gr.html#a811fbb0cb2c2263b1a7440a7e9d78239", null ], + [ "reserved", "group__can__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__interface__gr_structARM__CAN__OBJ__CAPABILITIES.js b/docs/Driver/html/group__can__interface__gr_structARM__CAN__OBJ__CAPABILITIES.js new file mode 100644 index 0000000..03b2356 --- /dev/null +++ b/docs/Driver/html/group__can__interface__gr_structARM__CAN__OBJ__CAPABILITIES.js @@ -0,0 +1,13 @@ +var group__can__interface__gr_structARM__CAN__OBJ__CAPABILITIES = +[ + [ "tx", "group__can__interface__gr.html#a9706173b2ed538efeb5ee4a952e2272f", null ], + [ "rx", "group__can__interface__gr.html#a895532773c3204e1538191f155c7bac8", null ], + [ "rx_rtr_tx_data", "group__can__interface__gr.html#a8a41139926d7c032247458d055071fda", null ], + [ "tx_rtr_rx_data", "group__can__interface__gr.html#a1debac19545140bdfe3c5fa8d53f1863", null ], + [ "multiple_filters", "group__can__interface__gr.html#a3662fb9a8fb81212043cadd90da704af", null ], + [ "exact_filtering", "group__can__interface__gr.html#a886337af58da4f995529eba228fb9b7a", null ], + [ "range_filtering", "group__can__interface__gr.html#a96dcf869f4adc9cec686630082c7c60a", null ], + [ "mask_filtering", "group__can__interface__gr.html#a2aa0e772d6cb8c30bb76ce1324423464", null ], + [ "message_depth", "group__can__interface__gr.html#a5a782fc223b0ea5034c6676eaec6f2d4", null ], + [ "reserved", "group__can__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__interface__gr_structARM__CAN__STATUS.js b/docs/Driver/html/group__can__interface__gr_structARM__CAN__STATUS.js new file mode 100644 index 0000000..5eeb502 --- /dev/null +++ b/docs/Driver/html/group__can__interface__gr_structARM__CAN__STATUS.js @@ -0,0 +1,8 @@ +var group__can__interface__gr_structARM__CAN__STATUS = +[ + [ "unit_state", "group__can__interface__gr.html#a96ec94acab56690b3801e3c5fbd09fa2", null ], + [ "last_error_code", "group__can__interface__gr.html#a2171ea8dff5e4b54e84728aa134854b6", null ], + [ "tx_error_count", "group__can__interface__gr.html#a8941505f6f3ebd69825c4382184c580f", null ], + [ "rx_error_count", "group__can__interface__gr.html#ab7e8b863b379b786ad1af935aa3ef2e8", null ], + [ "reserved", "group__can__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__interface__gr_structARM__DRIVER__CAN.js b/docs/Driver/html/group__can__interface__gr_structARM__DRIVER__CAN.js new file mode 100644 index 0000000..b3aacf7 --- /dev/null +++ b/docs/Driver/html/group__can__interface__gr_structARM__DRIVER__CAN.js @@ -0,0 +1,18 @@ +var group__can__interface__gr_structARM__DRIVER__CAN = +[ + [ "GetVersion", "group__can__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__can__interface__gr.html#a62c0c62c2bf482c000b1b2a2c817a96f", null ], + [ "Initialize", "group__can__interface__gr.html#a322b44b8e757887616b75035a8fd7027", null ], + [ "Uninitialize", "group__can__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__can__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "GetClock", "group__can__interface__gr.html#a21063f38e762cf29dfd3f5991ee936e2", null ], + [ "SetBitrate", "group__can__interface__gr.html#a360a314665607fc2d866c24e1608fd06", null ], + [ "SetMode", "group__can__interface__gr.html#a0fa2edbde052011604addec816782b4e", null ], + [ "ObjectGetCapabilities", "group__can__interface__gr.html#a7239c03265659edcaf69dc9ea5e29ce3", null ], + [ "ObjectSetFilter", "group__can__interface__gr.html#a2bfa264f66c84606ebf9f9e8dc45b907", null ], + [ "ObjectConfigure", "group__can__interface__gr.html#a24cfe29d7f6a29dfbac3c7011fc5b652", null ], + [ "MessageSend", "group__can__interface__gr.html#a3e6eb8bae2b7f8af99a3ca3cbbacce22", null ], + [ "MessageRead", "group__can__interface__gr.html#ace17a0046cf2c6cdbcb0fd3202e460a0", null ], + [ "Control", "group__can__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "GetStatus", "group__can__interface__gr.html#ad60ff24982cdb3ce38b8c17e0b4f0acc", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__mode__ctrls.html b/docs/Driver/html/group__can__mode__ctrls.html new file mode 100644 index 0000000..06e79b9 --- /dev/null +++ b/docs/Driver/html/group__can__mode__ctrls.html @@ -0,0 +1,213 @@ + + + + + +CAN Operation Codes +CMSIS-Driver: CAN Operation Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
CAN Operation Codes
CAN Control Codes
+
+
+ +

Set CAN operation modes. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_CAN_SET_FD_MODE   (1UL << ARM_CAN_CONTROL_Pos)
 Set FD operation mode; arg: 0 = disable, 1 = enable. More...
 
#define ARM_CAN_ABORT_MESSAGE_SEND   (2UL << ARM_CAN_CONTROL_Pos)
 Abort sending of CAN message; arg = object. More...
 
#define ARM_CAN_CONTROL_RETRANSMISSION   (3UL << ARM_CAN_CONTROL_Pos)
 Enable/disable automatic retransmission; arg: 0 = disable, 1 = enable (default state) More...
 
#define ARM_CAN_SET_TRANSCEIVER_DELAY   (4UL << ARM_CAN_CONTROL_Pos)
 Set transceiver delay; arg = delay in time quanta. More...
 
+

Description

+

Set CAN operation modes.

+

These controls set the CAN operation using the function ARM_CAN_Control.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_CAN_SET_FD_MODE   (1UL << ARM_CAN_CONTROL_Pos)
+
+ +

Set FD operation mode; arg: 0 = disable, 1 = enable.

+
See Also
ARM_CAN_Control
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_ABORT_MESSAGE_SEND   (2UL << ARM_CAN_CONTROL_Pos)
+
+ +

Abort sending of CAN message; arg = object.

+
See Also
ARM_CAN_Control
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_CONTROL_RETRANSMISSION   (3UL << ARM_CAN_CONTROL_Pos)
+
+ +

Enable/disable automatic retransmission; arg: 0 = disable, 1 = enable (default state)

+
See Also
ARM_CAN_Control
+ +
+
+ +
+
+ + + + +
#define ARM_CAN_SET_TRANSCEIVER_DELAY   (4UL << ARM_CAN_CONTROL_Pos)
+
+ +

Set transceiver delay; arg = delay in time quanta.

+
See Also
ARM_CAN_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__can__mode__ctrls.js b/docs/Driver/html/group__can__mode__ctrls.js new file mode 100644 index 0000000..407ee41 --- /dev/null +++ b/docs/Driver/html/group__can__mode__ctrls.js @@ -0,0 +1,7 @@ +var group__can__mode__ctrls = +[ + [ "ARM_CAN_SET_FD_MODE", "group__can__mode__ctrls.html#ga978ab3e8860f644dea780e87b3478ff4", null ], + [ "ARM_CAN_ABORT_MESSAGE_SEND", "group__can__mode__ctrls.html#gae051a548bf785104a934908360529438", null ], + [ "ARM_CAN_CONTROL_RETRANSMISSION", "group__can__mode__ctrls.html#ga0453b8900ca3a0d5210ffd6a918a78e6", null ], + [ "ARM_CAN_SET_TRANSCEIVER_DELAY", "group__can__mode__ctrls.html#ga398dd25256e644cd8d6506495a06bde8", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__obj__config__ctrls.html b/docs/Driver/html/group__can__obj__config__ctrls.html new file mode 100644 index 0000000..536194f --- /dev/null +++ b/docs/Driver/html/group__can__obj__config__ctrls.html @@ -0,0 +1,187 @@ + + + + + +CAN Object Configuration Codes +CMSIS-Driver: CAN Object Configuration Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Enumerations
+
+
CAN Object Configuration Codes
CAN Control Codes
+
+
+ +

CAN Object Configuration codes. +More...

+ + + + +

+Enumerations

enum  ARM_CAN_OBJ_CONFIG {
+  ARM_CAN_OBJ_INACTIVE, +
+  ARM_CAN_OBJ_TX, +
+  ARM_CAN_OBJ_RX, +
+  ARM_CAN_OBJ_RX_RTR_TX_DATA, +
+  ARM_CAN_OBJ_TX_RTR_RX_DATA +
+ }
 
+

Description

+

CAN Object Configuration codes.

+

Enumeration Type Documentation

+ +
+
+ + + + +
enum ARM_CAN_OBJ_CONFIG
+
+

Provides defined values for the configuration of CAN objects.

+

Parameter for:

+ + + + + + + +
Enumerator
ARM_CAN_OBJ_INACTIVE  +

CAN object inactive.

+
ARM_CAN_OBJ_TX  +

CAN transmit object.

+
ARM_CAN_OBJ_RX  +

CAN receive object.

+
ARM_CAN_OBJ_RX_RTR_TX_DATA  +

CAN object that on RTR reception automatically transmits Data Frame.

+
ARM_CAN_OBJ_TX_RTR_RX_DATA  +

CAN object that transmits RTR and automatically receives Data Frame.

+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__can__obj__config__ctrls.js b/docs/Driver/html/group__can__obj__config__ctrls.js new file mode 100644 index 0000000..708ae8e --- /dev/null +++ b/docs/Driver/html/group__can__obj__config__ctrls.js @@ -0,0 +1,10 @@ +var group__can__obj__config__ctrls = +[ + [ "ARM_CAN_OBJ_CONFIG", "group__can__obj__config__ctrls.html#gaa9488554de0575bc821c9f65213c4cd0", [ + [ "ARM_CAN_OBJ_INACTIVE", "Driver__CAN_8h.html#gaa9488554de0575bc821c9f65213c4cd0aebbd0da59658805af30203be66d80249", null ], + [ "ARM_CAN_OBJ_TX", "Driver__CAN_8h.html#gaa9488554de0575bc821c9f65213c4cd0a3e20952f92855298cd0a39a7f47b3f3c", null ], + [ "ARM_CAN_OBJ_RX", "Driver__CAN_8h.html#gaa9488554de0575bc821c9f65213c4cd0a14780ac7274831ee94f427cbbf67c003", null ], + [ "ARM_CAN_OBJ_RX_RTR_TX_DATA", "Driver__CAN_8h.html#gaa9488554de0575bc821c9f65213c4cd0ac5d28d180ea9e4328974ffcb8b928a0c", null ], + [ "ARM_CAN_OBJ_TX_RTR_RX_DATA", "Driver__CAN_8h.html#gaa9488554de0575bc821c9f65213c4cd0a396d7a6cd2353e1a2936405ace6417f5", null ] + ] ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__status__code__ctrls.html b/docs/Driver/html/group__can__status__code__ctrls.html new file mode 100644 index 0000000..e41b0d7 --- /dev/null +++ b/docs/Driver/html/group__can__status__code__ctrls.html @@ -0,0 +1,311 @@ + + + + + +Status Error Codes +CMSIS-Driver: Status Error Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Status Error Codes
CAN Interface
+
+
+ +

Status codes of the CAN driver. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_CAN_UNIT_STATE_INACTIVE   (0U)
 Unit state: Not active on bus (initialization) More...
 
#define ARM_CAN_UNIT_STATE_ACTIVE   (1U)
 Unit state: Active on bus (can generate active error frame) More...
 
#define ARM_CAN_UNIT_STATE_PASSIVE   (2U)
 Unit state: Error passive (can not generate active error frame) More...
 
#define ARM_CAN_UNIT_STATE_BUS_OFF   (3U)
 Unit state: Bus-off (can recover to active state) More...
 
#define ARM_CAN_LEC_NO_ERROR   (0U)
 Last error code: No error. More...
 
#define ARM_CAN_LEC_BIT_ERROR   (1U)
 Last error code: Bit error. More...
 
#define ARM_CAN_LEC_STUFF_ERROR   (2U)
 Last error code: Bit stuffing error. More...
 
#define ARM_CAN_LEC_CRC_ERROR   (3U)
 Last error code: CRC error. More...
 
#define ARM_CAN_LEC_FORM_ERROR   (4U)
 Last error code: Illegal fixed-form bit. More...
 
#define ARM_CAN_LEC_ACK_ERROR   (5U)
 Last error code: Acknowledgment error. More...
 
+

Description

+

Status codes of the CAN driver.

+

The following callback notification unit events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_CAN_UNIT_STATE_INACTIVE   (0U)
+
+ +

Unit state: Not active on bus (initialization)

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_UNIT_STATE_ACTIVE   (1U)
+
+ +

Unit state: Active on bus (can generate active error frame)

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_UNIT_STATE_PASSIVE   (2U)
+
+ +

Unit state: Error passive (can not generate active error frame)

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_UNIT_STATE_BUS_OFF   (3U)
+
+ +

Unit state: Bus-off (can recover to active state)

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_LEC_NO_ERROR   (0U)
+
+ +

Last error code: No error.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_LEC_BIT_ERROR   (1U)
+
+ +

Last error code: Bit error.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_LEC_STUFF_ERROR   (2U)
+
+ +

Last error code: Bit stuffing error.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_LEC_CRC_ERROR   (3U)
+
+ +

Last error code: CRC error.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_LEC_FORM_ERROR   (4U)
+
+ +

Last error code: Illegal fixed-form bit.

+ +
+
+ +
+
+ + + + +
#define ARM_CAN_LEC_ACK_ERROR   (5U)
+
+ +

Last error code: Acknowledgment error.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__can__status__code__ctrls.js b/docs/Driver/html/group__can__status__code__ctrls.js new file mode 100644 index 0000000..4234073 --- /dev/null +++ b/docs/Driver/html/group__can__status__code__ctrls.js @@ -0,0 +1,13 @@ +var group__can__status__code__ctrls = +[ + [ "ARM_CAN_UNIT_STATE_INACTIVE", "group__can__status__code__ctrls.html#ga911a65cc31304d57d283a21476d9ade7", null ], + [ "ARM_CAN_UNIT_STATE_ACTIVE", "group__can__status__code__ctrls.html#ga5f72c295ee2b829a8ae33b96466cc0e8", null ], + [ "ARM_CAN_UNIT_STATE_PASSIVE", "group__can__status__code__ctrls.html#gace2db0f930f935054c21242f735e1922", null ], + [ "ARM_CAN_UNIT_STATE_BUS_OFF", "group__can__status__code__ctrls.html#gadd78b515410235cd77d0a10213ff4192", null ], + [ "ARM_CAN_LEC_NO_ERROR", "group__can__status__code__ctrls.html#ga5332a311f44caec256d59087c705e1e9", null ], + [ "ARM_CAN_LEC_BIT_ERROR", "group__can__status__code__ctrls.html#ga0571c3c3e341ac0579aa713fdfdae77e", null ], + [ "ARM_CAN_LEC_STUFF_ERROR", "group__can__status__code__ctrls.html#ga33cbda311f4c2f2464e4070dee78b2f2", null ], + [ "ARM_CAN_LEC_CRC_ERROR", "group__can__status__code__ctrls.html#ga1380f80b709ca921634aecdaf34a24e5", null ], + [ "ARM_CAN_LEC_FORM_ERROR", "group__can__status__code__ctrls.html#ga9f753ba50045b28653fb3215ec2e4b8a", null ], + [ "ARM_CAN_LEC_ACK_ERROR", "group__can__status__code__ctrls.html#gaae6e827242137bc4d8976cd4ba73015f", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__can__timeseg__ctrls.html b/docs/Driver/html/group__can__timeseg__ctrls.html new file mode 100644 index 0000000..493c3e3 --- /dev/null +++ b/docs/Driver/html/group__can__timeseg__ctrls.html @@ -0,0 +1,257 @@ + + + + + +CAN Bit Timing Codes +CMSIS-Driver: CAN Bit Timing Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros | +Enumerations
+
+
CAN Bit Timing Codes
CAN Control Codes
+
+
+ +

Set bit timing. +More...

+ + + + + + + + + + +

+Macros

#define ARM_CAN_BIT_PROP_SEG(x)   (((x) << ARM_CAN_BIT_PROP_SEG_Pos) & ARM_CAN_BIT_PROP_SEG_Msk)
 
#define ARM_CAN_BIT_PHASE_SEG1(x)   (((x) << ARM_CAN_BIT_PHASE_SEG1_Pos) & ARM_CAN_BIT_PHASE_SEG1_Msk)
 
#define ARM_CAN_BIT_PHASE_SEG2(x)   (((x) << ARM_CAN_BIT_PHASE_SEG2_Pos) & ARM_CAN_BIT_PHASE_SEG2_Msk)
 
#define ARM_CAN_BIT_SJW(x)   (((x) << ARM_CAN_BIT_SJW_Pos) & ARM_CAN_BIT_SJW_Msk)
 
+ + + + +

+Enumerations

enum  ARM_CAN_BITRATE_SELECT {
+  ARM_CAN_BITRATE_NOMINAL, +
+  ARM_CAN_BITRATE_FD_DATA +
+ }
 Set the bit rate. More...
 
+

Description

+

Set bit timing.

+

The following codes are used with the function ARM_CAN_SetBitrate.

+

Macro Definition Documentation

+ +
+
+ + + + + + + + +
#define ARM_CAN_BIT_PROP_SEG( x)   (((x) << ARM_CAN_BIT_PROP_SEG_Pos) & ARM_CAN_BIT_PROP_SEG_Msk)
+
+
See Also
ARM_CAN_SetBitrate
+ +
+
+ +
+
+ + + + + + + + +
#define ARM_CAN_BIT_PHASE_SEG1( x)   (((x) << ARM_CAN_BIT_PHASE_SEG1_Pos) & ARM_CAN_BIT_PHASE_SEG1_Msk)
+
+
See Also
ARM_CAN_SetBitrate
+ +
+
+ +
+
+ + + + + + + + +
#define ARM_CAN_BIT_PHASE_SEG2( x)   (((x) << ARM_CAN_BIT_PHASE_SEG2_Pos) & ARM_CAN_BIT_PHASE_SEG2_Msk)
+
+
See Also
ARM_CAN_SetBitrate
+ +
+
+ +
+
+ + + + + + + + +
#define ARM_CAN_BIT_SJW( x)   (((x) << ARM_CAN_BIT_SJW_Pos) & ARM_CAN_BIT_SJW_Msk)
+
+
See Also
ARM_CAN_SetBitrate
+ +
+
+

Enumeration Type Documentation

+ +
+
+ + + + +
enum ARM_CAN_BITRATE_SELECT
+
+ +

Set the bit rate.

+

Provides the typedef for setting the bit rate.

+

Parameter for:

+ + + + +
Enumerator
ARM_CAN_BITRATE_NOMINAL  +

Select nominal (flexible data-rate arbitration) bitrate.

+
ARM_CAN_BITRATE_FD_DATA  +

Select flexible data-rate data bitrate.

+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__can__timeseg__ctrls.js b/docs/Driver/html/group__can__timeseg__ctrls.js new file mode 100644 index 0000000..7840611 --- /dev/null +++ b/docs/Driver/html/group__can__timeseg__ctrls.js @@ -0,0 +1,11 @@ +var group__can__timeseg__ctrls = +[ + [ "ARM_CAN_BIT_PROP_SEG", "group__can__timeseg__ctrls.html#ga01183319a5a899eafea9ffe7af73d5ea", null ], + [ "ARM_CAN_BIT_PHASE_SEG1", "group__can__timeseg__ctrls.html#ga03f1921ee97a7ebf5d767b6cacf40792", null ], + [ "ARM_CAN_BIT_PHASE_SEG2", "group__can__timeseg__ctrls.html#ga76de056d56803cb7a0d01978ee981e80", null ], + [ "ARM_CAN_BIT_SJW", "group__can__timeseg__ctrls.html#gab32e97fa4edf497c111dd3f0d8779269", null ], + [ "ARM_CAN_BITRATE_SELECT", "group__can__timeseg__ctrls.html#ga11c12020b81a63a73a8b53e96a7e3dea", [ + [ "ARM_CAN_BITRATE_NOMINAL", "Driver__CAN_8h.html#ga11c12020b81a63a73a8b53e96a7e3deaa3b6d191c99f1eba4f01bcc5fbfaf67f3", null ], + [ "ARM_CAN_BITRATE_FD_DATA", "Driver__CAN_8h.html#ga11c12020b81a63a73a8b53e96a7e3deaaa6c9996de0cdf42da5c02086cd8f16dc", null ] + ] ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__common__drv__gr.html b/docs/Driver/html/group__common__drv__gr.html new file mode 100644 index 0000000..ed11ff3 --- /dev/null +++ b/docs/Driver/html/group__common__drv__gr.html @@ -0,0 +1,232 @@ + + + + + +Common Driver Definitions +CMSIS-Driver: Common Driver Definitions + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Enumerations
+
+
Common Driver Definitions
+
+
+ +

Definitions common in all driver interfaces (Driver_Common.h) +More...

+ + + + + +

+Content

 Status Error Codes
 Negative return values of functions indicate errors occurred during execution.
 
+ + + + +

+Data Structures

struct  ARM_DRIVER_VERSION
 Driver Version. More...
 
+ + + + +

+Enumerations

enum  ARM_POWER_STATE {
+  ARM_POWER_OFF, +
+  ARM_POWER_LOW, +
+  ARM_POWER_FULL +
+ }
 General power states. More...
 
+

Description

+

Definitions common in all driver interfaces (Driver_Common.h)

+

The following definitions are common in all CMSIS-Driver interfaces. Refer to Common Driver Functions for a general overview.

+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_VERSION
+
+

Driver Version.

+

The access structure of each CMSIS-Driver provides the function GetVersion, which returns in the struct ARM_DRIVER_VERSION:

+
    +
  • API version, which is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version, which is the source code version of the actual driver implementation.
    • +
+

The version is encoded as 16-bit unsigned value (uint16_t) with:

+
    +
  • high-byte: major version.
    • +
  • low-byte: minor version.
    • +
+

For example, version 1.12 is encoded as 0x10C.

+
+ + + + + + + +
Data Fields
+uint16_t +api +API version.
+uint16_t +drv +Driver version.
+ +
+
+

Enumeration Type Documentation

+ +
+
+ + + + +
enum ARM_POWER_STATE
+
+ +

General power states.

+

The access structure of each CMSIS-Driver provides the function PowerControl, which handles the power profile for a peripheral using the parameter ARM_POWER_STATE. Depending on this parameter, the peripheral will operate at full speed, detect just events, or is completely un-powered.

+

Refer to Function Call Sequence for more information.

+ + + + +
Enumerator
ARM_POWER_OFF  +

Power off: no operation possible.

+
ARM_POWER_LOW  +

Low Power mode: retain state, detect and signal wake-up events.

+
ARM_POWER_FULL  +

Power on: full operation at maximum performance.

+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__common__drv__gr.js b/docs/Driver/html/group__common__drv__gr.js new file mode 100644 index 0000000..ba4b38f --- /dev/null +++ b/docs/Driver/html/group__common__drv__gr.js @@ -0,0 +1,13 @@ +var group__common__drv__gr = +[ + [ "Status Error Codes", "group__execution__status.html", "group__execution__status" ], + [ "ARM_DRIVER_VERSION", "group__common__drv__gr.html#structARM__DRIVER__VERSION", [ + [ "api", "group__common__drv__gr.html#ad180da20fbde1d3dafc074af87c19540", null ], + [ "drv", "group__common__drv__gr.html#adcd153bc4507926c792e86ebe74e6455", null ] + ] ], + [ "ARM_POWER_STATE", "group__common__drv__gr.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5", [ + [ "ARM_POWER_OFF", "Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5ab6f5becc85ebd51c3dd2524a95d2ca35", null ], + [ "ARM_POWER_LOW", "Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5a9ef9e57cbcc948d0e22314e73dc8c434", null ], + [ "ARM_POWER_FULL", "Driver__Common_8h.html#ga47d6d7c31f88f3b8ae4aaf9d8444afa5abed52b77a9ce4775570e44a842b1295e", null ] + ] ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__common__drv__gr_structARM__DRIVER__VERSION.js b/docs/Driver/html/group__common__drv__gr_structARM__DRIVER__VERSION.js new file mode 100644 index 0000000..ee2bbab --- /dev/null +++ b/docs/Driver/html/group__common__drv__gr_structARM__DRIVER__VERSION.js @@ -0,0 +1,5 @@ +var group__common__drv__gr_structARM__DRIVER__VERSION = +[ + [ "api", "group__common__drv__gr.html#ad180da20fbde1d3dafc074af87c19540", null ], + [ "drv", "group__common__drv__gr.html#adcd153bc4507926c792e86ebe74e6455", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__interface__gr.html b/docs/Driver/html/group__eth__interface__gr.html new file mode 100644 index 0000000..9f29afe --- /dev/null +++ b/docs/Driver/html/group__eth__interface__gr.html @@ -0,0 +1,363 @@ + + + + + +Ethernet Interface +CMSIS-Driver: Ethernet Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Enumerations
+
+
Ethernet Interface
+
+
+ +

Ethernet common definitions (Driver_ETH.h) +More...

+ + + + + + + + + + + +

+Content

 Media Interface Types
 Ethernet Media Interface type.
 
 Ethernet MAC Interface
 Driver API for Ethernet MAC Peripheral (Driver_ETH_MAC.h)
 
 Ethernet PHY Interface
 Driver API for Ethernet PHY Peripheral (Driver_ETH_PHY.h)
 
+ + + + + + + +

+Data Structures

struct  ARM_ETH_LINK_INFO
 Ethernet link information. More...
 
struct  ARM_ETH_MAC_ADDR
 Ethernet MAC Address. More...
 
+ + + + +

+Enumerations

enum  ARM_ETH_LINK_STATE {
+  ARM_ETH_LINK_DOWN, +
+  ARM_ETH_LINK_UP +
+ }
 Ethernet link state. More...
 
+

Description

+

Ethernet common definitions (Driver_ETH.h)

+

Ethernet is a networking technology for exchanging data packages between computer systems. Several microcontrollers integrate an Ethernet MAC (Media Access Control) data-link layer that interfaces to an Ethernet PHY (Physical Interface Transceiver).

+

Wikipedia offers more information about the Ethernet.

+

Block Diagram

+

The Ethernet PHY connects typically to the Ethernet MAC using an MII (Media Independent Interface) or RMII (Reduced Media Independent Interface).

+


+

+
+EthernetSchematic.png +
+Block Diagram of a typical Ethernet Interface
+

Ethernet API

+

The following header files define the Application Programming Interface (API) for the Ethernet interface:

+
    +
  • Driver_ETH.h : Common definitions of the Ethernet PHY and MAC part
    • +
  • Driver_ETH_MAC.h : API for the Ethernet MAC
    • +
  • Driver_ETH_PHY.h : API for the Ethernet PHY
    • +
+

The driver implementation of the Ethernet MAC is a typical part of a Device Family Pack (DFP) that supports the peripherals of the microcontroller family. The driver implementation of the Ethernet PHY is a typical part of a Network Software Pack, since PHY is typically not integrated into the microcontroller.

+
Note
For parameters, the value marked with (default) is the setting after the driver initialization.
+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +

Both drivers are used in combination and usually the Ethernet MAC provides a media interface to the Ethernet PHY. A typical setup sequence for the drivers is shown below:

+

Example Code

+

The following example code shows the usage of the Ethernet interface.

+
extern ARM_DRIVER_ETH_MAC Driver_ETH_MAC0;
+
extern ARM_DRIVER_ETH_PHY Driver_ETH_PHY0;
+
+
static ARM_DRIVER_ETH_MAC *mac;
+
static ARM_DRIVER_ETH_PHY *phy;
+
static ARM_ETH_MAC_ADDR own_mac_address;
+
static ARM_ETH_MAC_CAPABILITIES capabilities;
+
+
void ethernet_mac_notify (uint32_t event) {
+
switch (event) {
+
:
+
}
+
}
+
+
+
void initialize_ethernet_interface (void) {
+
mac = &Driver_ETH_MAC0;
+
phy = &Driver_ETH_PHY0;
+
+
// Initialize Media Access Controller
+
capabilities = mac->GetCapabilities ();
+
+
mac->Initialize (ethernet_mac_notify);
+
mac->PowerControl (ARM_POWER_FULL);
+
+
if (capabilities.mac_address == 0) {
+
// populate own_mac_address with the address to use
+
mac->SetMacAddress(&own_mac_address);
+
}
+
else {
+
mac->GetMacAddress(&own_mac_address);
+
}
+
+
// Initialize Physical Media Interface
+
if (phy->Initialize (mac->PHY_Read, mac->PHY_Write) == ARM_DRIVER_OK) {
+
phy->PowerControl (ARM_POWER_FULL);
+
phy->SetInterface (capabilities.media_interface);
+
phy->SetMode (ARM_ETH_PHY_AUTO_NEGOTIATE);
+
}
+
:
+
:
+
}
+
+
+
static ARM_ETH_LINK_STATE ethernet_link; // current link status
+
+
void ethernet_check_link_status (void) {
+
ARM_ETH_LINK_STATE link;
+
+
link = phy->GetLinkState ();
+
if (link == ethernet_link) {
+
return; // link state unchanged
+
}
+
// link state changed
+
ethernet_link = link;
+
if (link == ARM_ETH_LINK_UP) { // start transfer
+
ARM_ETH_LINK_INFO info = phy->GetLinkInfo ();
+
mac->Control(ARM_ETH_MAC_CONFIGURE,
+
info.speed << ARM_ETH_MAC_SPEED_Pos |
+
info.duplex << ARM_ETH_MAC_DUPLEX_Pos |
+
ARM_ETH_MAC_ADDRESS_BROADCAST);
+
mac->Control(ARM_ETH_MAC_CONTROL_TX, 1);
+
mac->Control(ARM_ETH_MAC_CONTROL_RX, 1);
+
}
+
else { // stop transfer
+
mac->Control(ARM_ETH_MAC_FLUSH, ARM_ETH_MAC_FLUSH_TX | ARM_ETH_MAC_FLUSH_RX);
+
mac->Control(ARM_ETH_MAC_CONTROL_TX, 0);
+
mac->Control(ARM_ETH_MAC_CONTROL_RX, 0);
+
}
+
}
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_ETH_LINK_INFO
+
+

Ethernet link information.

+

The Ethernet Link information provides parameters about the current established communication.

+

Returned by:

+ +
+ + + + + + + + + + +
Data Fields
+uint32_t +speed: 2 +Link speed: 0= 10 MBit, 1= 100 MBit, 2= 1 GBit.
+uint32_t +duplex: 1 +Duplex mode: 0= Half, 1= Full.
+uint32_t +reserved: 29 +
+ +
+
+ +
+
+ + + + +
struct ARM_ETH_MAC_ADDR
+
+

Ethernet MAC Address.

+

Stores the MAC Address of the Ethernet interface as defined by IEEE 802. Wikipedia offers more information about the MAC Address.

+

Parameter for:

+ +
+ + + + +
Data Fields
+uint8_t +b[6] +MAC Address (6 bytes), MSB first.
+ +
+
+

Enumeration Type Documentation

+ +
+
+ + + + +
enum ARM_ETH_LINK_STATE
+
+ +

Ethernet link state.

+

The Ethernet Link status shows if the communication is currently established (up) or interrupted (down).

+

Returned by:

+ + + + +
Enumerator
ARM_ETH_LINK_DOWN  +

Link is down.

+
ARM_ETH_LINK_UP  +

Link is up.

+
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__interface__gr.js b/docs/Driver/html/group__eth__interface__gr.js new file mode 100644 index 0000000..ae67e3e --- /dev/null +++ b/docs/Driver/html/group__eth__interface__gr.js @@ -0,0 +1,18 @@ +var group__eth__interface__gr = +[ + [ "Media Interface Types", "group__eth__interface__types1.html", "group__eth__interface__types1" ], + [ "Ethernet MAC Interface", "group__eth__mac__interface__gr.html", "group__eth__mac__interface__gr" ], + [ "Ethernet PHY Interface", "group__eth__phy__interface__gr.html", "group__eth__phy__interface__gr" ], + [ "ARM_ETH_LINK_INFO", "group__eth__interface__gr.html#structARM__ETH__LINK__INFO", [ + [ "speed", "group__eth__interface__gr.html#a220859a8b5da0232739a11cbe7f79fc5", null ], + [ "duplex", "group__eth__interface__gr.html#a44b6cae894d7311dcdae7e93969c3c09", null ], + [ "reserved", "group__eth__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_ETH_MAC_ADDR", "group__eth__interface__gr.html#structARM__ETH__MAC__ADDR", [ + [ "b", "group__eth__interface__gr.html#ab590318ac859d0e57e15c3dd6c62a605", null ] + ] ], + [ "ARM_ETH_LINK_STATE", "group__eth__interface__gr.html#gacf7db5320eb841b462a4af3c56cc9291", [ + [ "ARM_ETH_LINK_DOWN", "Driver__ETH_8h.html#gacf7db5320eb841b462a4af3c56cc9291a5f635c9352db6cb6fa9ad95660850487", null ], + [ "ARM_ETH_LINK_UP", "Driver__ETH_8h.html#gacf7db5320eb841b462a4af3c56cc9291ab5e5b02c3c8a5a0fefcf69f3be7e31c1", null ] + ] ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__interface__gr_structARM__ETH__LINK__INFO.js b/docs/Driver/html/group__eth__interface__gr_structARM__ETH__LINK__INFO.js new file mode 100644 index 0000000..5721722 --- /dev/null +++ b/docs/Driver/html/group__eth__interface__gr_structARM__ETH__LINK__INFO.js @@ -0,0 +1,6 @@ +var group__eth__interface__gr_structARM__ETH__LINK__INFO = +[ + [ "speed", "group__eth__interface__gr.html#a220859a8b5da0232739a11cbe7f79fc5", null ], + [ "duplex", "group__eth__interface__gr.html#a44b6cae894d7311dcdae7e93969c3c09", null ], + [ "reserved", "group__eth__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__interface__gr_structARM__ETH__MAC__ADDR.js b/docs/Driver/html/group__eth__interface__gr_structARM__ETH__MAC__ADDR.js new file mode 100644 index 0000000..6268ccb --- /dev/null +++ b/docs/Driver/html/group__eth__interface__gr_structARM__ETH__MAC__ADDR.js @@ -0,0 +1,4 @@ +var group__eth__interface__gr_structARM__ETH__MAC__ADDR = +[ + [ "b", "group__eth__interface__gr.html#ab590318ac859d0e57e15c3dd6c62a605", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__interface__types1.html b/docs/Driver/html/group__eth__interface__types1.html new file mode 100644 index 0000000..ab29047 --- /dev/null +++ b/docs/Driver/html/group__eth__interface__types1.html @@ -0,0 +1,200 @@ + + + + + +Media Interface Types +CMSIS-Driver: Media Interface Types + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Media Interface Types
Ethernet Interface
+
+
+ +

Ethernet Media Interface type. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_ETH_INTERFACE_MII   (0)
 Ethernet Media Interface type. More...
 
#define ARM_ETH_INTERFACE_RMII   (1)
 Reduced Media Independent Interface (RMII) More...
 
#define ARM_ETH_INTERFACE_SMII   (2)
 Serial Media Independent Interface (SMII) More...
 
+

Description

+

Ethernet Media Interface type.

+

Encodes the supported media interface between Ethernet MAC and Ethernet PHY. The function ARM_ETH_MAC_GetCapabilities retrieves the media interface type encoded in the data field media_interface of the struct ARM_ETH_MAC_CAPABILITIES.

+

Parameter for:

+ +

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_INTERFACE_MII   (0)
+
+ +

Ethernet Media Interface type.

+

Media Independent Interface (MII)

+
See Also
ARM_ETH_PHY_SetInterface
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_INTERFACE_RMII   (1)
+
+ +

Reduced Media Independent Interface (RMII)

+
See Also
ARM_ETH_PHY_SetInterface
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_INTERFACE_SMII   (2)
+
+ +

Serial Media Independent Interface (SMII)

+
See Also
ARM_ETH_PHY_SetInterface
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__interface__types1.js b/docs/Driver/html/group__eth__interface__types1.js new file mode 100644 index 0000000..14102a5 --- /dev/null +++ b/docs/Driver/html/group__eth__interface__types1.js @@ -0,0 +1,6 @@ +var group__eth__interface__types1 = +[ + [ "ARM_ETH_INTERFACE_MII", "group__eth__interface__types1.html#ga468c848ddf75d7925130171af1ec2ac7", null ], + [ "ARM_ETH_INTERFACE_RMII", "group__eth__interface__types1.html#gac0361b34fbec9c19840ad0349e4c388b", null ], + [ "ARM_ETH_INTERFACE_SMII", "group__eth__interface__types1.html#ga24047d142be48bbc241e8d6eacb5cf7a", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__configuration__ctrls.html b/docs/Driver/html/group__eth__mac__configuration__ctrls.html new file mode 100644 index 0000000..9cd1474 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__configuration__ctrls.html @@ -0,0 +1,328 @@ + + + + + +Ethernet MAC Configuration +CMSIS-Driver: Ethernet MAC Configuration + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Ethernet MAC Configuration
Ethernet MAC Control Codes
+
+
+ +

Specifies speed mode, link mode, checksum, and frame filtering modes. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_ETH_MAC_SPEED_10M   (ARM_ETH_SPEED_10M << ARM_ETH_MAC_SPEED_Pos)
 10 Mbps link speed More...
 
#define ARM_ETH_MAC_SPEED_100M   (ARM_ETH_SPEED_100M << ARM_ETH_MAC_SPEED_Pos)
 100 Mbps link speed More...
 
#define ARM_ETH_MAC_SPEED_1G   (ARM_ETH_SPEED_1G << ARM_ETH_MAC_SPEED_Pos)
 1 Gpbs link speed More...
 
#define ARM_ETH_MAC_DUPLEX_HALF   (ARM_ETH_DUPLEX_HALF << ARM_ETH_MAC_DUPLEX_Pos)
 Half duplex link. More...
 
#define ARM_ETH_MAC_DUPLEX_FULL   (ARM_ETH_DUPLEX_FULL << ARM_ETH_MAC_DUPLEX_Pos)
 Full duplex link. More...
 
#define ARM_ETH_MAC_LOOPBACK   (1UL << 4)
 Loop-back test mode. More...
 
#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX   (1UL << 5)
 Receiver Checksum offload. More...
 
#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX   (1UL << 6)
 Transmitter Checksum offload. More...
 
#define ARM_ETH_MAC_ADDRESS_BROADCAST   (1UL << 7)
 Accept frames with Broadcast address. More...
 
#define ARM_ETH_MAC_ADDRESS_MULTICAST   (1UL << 8)
 Accept frames with any Multicast address. More...
 
#define ARM_ETH_MAC_ADDRESS_ALL   (1UL << 9)
 Accept frames with any address (Promiscuous Mode) More...
 
+

Description

+

Specifies speed mode, link mode, checksum, and frame filtering modes.

+

The function ARM_ETH_MAC_Control with control = ARM_ETH_MAC_CONFIGURE configures the Ethernet MAC interface as specified with arg listed bellow.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_MAC_SPEED_10M   (ARM_ETH_SPEED_10M << ARM_ETH_MAC_SPEED_Pos)
+
+ +

10 Mbps link speed

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_SPEED_100M   (ARM_ETH_SPEED_100M << ARM_ETH_MAC_SPEED_Pos)
+
+ +

100 Mbps link speed

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_SPEED_1G   (ARM_ETH_SPEED_1G << ARM_ETH_MAC_SPEED_Pos)
+
+ +

1 Gpbs link speed

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_DUPLEX_HALF   (ARM_ETH_DUPLEX_HALF << ARM_ETH_MAC_DUPLEX_Pos)
+
+ +

Half duplex link.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_DUPLEX_FULL   (ARM_ETH_DUPLEX_FULL << ARM_ETH_MAC_DUPLEX_Pos)
+
+ +

Full duplex link.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_LOOPBACK   (1UL << 4)
+
+ +

Loop-back test mode.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX   (1UL << 5)
+
+ +

Receiver Checksum offload.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX   (1UL << 6)
+
+ +

Transmitter Checksum offload.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_ADDRESS_BROADCAST   (1UL << 7)
+
+ +

Accept frames with Broadcast address.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_ADDRESS_MULTICAST   (1UL << 8)
+
+ +

Accept frames with any Multicast address.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_ADDRESS_ALL   (1UL << 9)
+
+ +

Accept frames with any address (Promiscuous Mode)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__mac__configuration__ctrls.js b/docs/Driver/html/group__eth__mac__configuration__ctrls.js new file mode 100644 index 0000000..f75a65a --- /dev/null +++ b/docs/Driver/html/group__eth__mac__configuration__ctrls.js @@ -0,0 +1,14 @@ +var group__eth__mac__configuration__ctrls = +[ + [ "ARM_ETH_MAC_SPEED_10M", "group__eth__mac__configuration__ctrls.html#ga8c5b40d018ecfad05fe2546ba717c1d4", null ], + [ "ARM_ETH_MAC_SPEED_100M", "group__eth__mac__configuration__ctrls.html#ga29160c83a7b0952c64053d86789c6490", null ], + [ "ARM_ETH_MAC_SPEED_1G", "group__eth__mac__configuration__ctrls.html#ga8acefed744d8397a1777b9fd0e6230d2", null ], + [ "ARM_ETH_MAC_DUPLEX_HALF", "group__eth__mac__configuration__ctrls.html#gadb0fe2c5a1e21b0656d39c788ae22f36", null ], + [ "ARM_ETH_MAC_DUPLEX_FULL", "group__eth__mac__configuration__ctrls.html#gad5a7d4b5b8a31825eff1504e3828d8f6", null ], + [ "ARM_ETH_MAC_LOOPBACK", "group__eth__mac__configuration__ctrls.html#gab32765f35c35b672ee476278fe24a24e", null ], + [ "ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX", "group__eth__mac__configuration__ctrls.html#ga281dfed993b5666ed999709b9f28578f", null ], + [ "ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX", "group__eth__mac__configuration__ctrls.html#ga7272d2c55aeeeadbb95c591cbf6c1a2e", null ], + [ "ARM_ETH_MAC_ADDRESS_BROADCAST", "group__eth__mac__configuration__ctrls.html#ga43792feab641c3c87eafb943351ab0f4", null ], + [ "ARM_ETH_MAC_ADDRESS_MULTICAST", "group__eth__mac__configuration__ctrls.html#ga1d3ff8c63362b385548fe91730f20588", null ], + [ "ARM_ETH_MAC_ADDRESS_ALL", "group__eth__mac__configuration__ctrls.html#gab29ab9e295807f4c59ddd1c4642086d1", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__control.html b/docs/Driver/html/group__eth__mac__control.html new file mode 100644 index 0000000..bfe4258 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__control.html @@ -0,0 +1,160 @@ + + + + + +Ethernet MAC Control Codes +CMSIS-Driver: Ethernet MAC Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
Ethernet MAC Control Codes
Ethernet MAC Interface
+
+
+ +

Configure and control the Ethernet MAC using the ARM_ETH_MAC_Control. +More...

+ + + + + + + + + + + + + + +

+Content

 Ethernet MAC Controls
 Configure and control the Ethernet MAC interface.
 
 Ethernet MAC Configuration
 Specifies speed mode, link mode, checksum, and frame filtering modes.
 
 Ethernet MAC Flush Flags
 Specify controls to flush a buffer.
 
 Ethernet MAC VLAN Filter Flag
 Specify whether to compare only the VLAN Identifier.
 
+

Description

+

Configure and control the Ethernet MAC using the ARM_ETH_MAC_Control.

+

Many parameters of the Ethernet MAC driver are configured using the ARM_ETH_MAC_Control function.

+

The various Ethernet MAC control codes define:

+ +

Refer to the ARM_ETH_MAC_Control function for further details.

+
+
+ + + + diff --git a/docs/Driver/html/group__eth__mac__control.js b/docs/Driver/html/group__eth__mac__control.js new file mode 100644 index 0000000..42da044 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__control.js @@ -0,0 +1,7 @@ +var group__eth__mac__control = +[ + [ "Ethernet MAC Controls", "group__eth__mac__ctrls.html", "group__eth__mac__ctrls" ], + [ "Ethernet MAC Configuration", "group__eth__mac__configuration__ctrls.html", "group__eth__mac__configuration__ctrls" ], + [ "Ethernet MAC Flush Flags", "group__eth__mac__flush__flag__ctrls.html", "group__eth__mac__flush__flag__ctrls" ], + [ "Ethernet MAC VLAN Filter Flag", "group__eth__mac__vlan__filter__ctrls.html", "group__eth__mac__vlan__filter__ctrls" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__ctrls.html b/docs/Driver/html/group__eth__mac__ctrls.html new file mode 100644 index 0000000..8c585bc --- /dev/null +++ b/docs/Driver/html/group__eth__mac__ctrls.html @@ -0,0 +1,248 @@ + + + + + +Ethernet MAC Controls +CMSIS-Driver: Ethernet MAC Controls + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Ethernet MAC Controls
Ethernet MAC Control Codes
+
+
+ +

Configure and control the Ethernet MAC interface. +More...

+ + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_ETH_MAC_CONFIGURE   (0x01)
 Configure MAC; arg = configuration. More...
 
#define ARM_ETH_MAC_CONTROL_TX   (0x02)
 Transmitter; arg: 0=disabled (default), 1=enabled. More...
 
#define ARM_ETH_MAC_CONTROL_RX   (0x03)
 Receiver; arg: 0=disabled (default), 1=enabled. More...
 
#define ARM_ETH_MAC_FLUSH   (0x04)
 Flush buffer; arg = ARM_ETH_MAC_FLUSH_... More...
 
#define ARM_ETH_MAC_SLEEP   (0x05)
 Sleep mode; arg: 1=enter and wait for Magic packet, 0=exit. More...
 
#define ARM_ETH_MAC_VLAN_FILTER   (0x06)
 VLAN Filter for received frames; arg15..0: VLAN Tag; arg16: optional ARM_ETH_MAC_VLAN_FILTER_ID_ONLY; 0=disabled (default) More...
 
+

Description

+

Configure and control the Ethernet MAC interface.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_MAC_CONFIGURE   (0x01)
+
+ +

Configure MAC; arg = configuration.

+
See Also
ARM_ETH_MAC_Control
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_CONTROL_TX   (0x02)
+
+ +

Transmitter; arg: 0=disabled (default), 1=enabled.

+
See Also
ARM_ETH_MAC_Control
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_CONTROL_RX   (0x03)
+
+ +

Receiver; arg: 0=disabled (default), 1=enabled.

+
See Also
ARM_ETH_MAC_Control
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_FLUSH   (0x04)
+
+ +

Flush buffer; arg = ARM_ETH_MAC_FLUSH_...

+
See Also
ARM_ETH_MAC_Control
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_SLEEP   (0x05)
+
+ +

Sleep mode; arg: 1=enter and wait for Magic packet, 0=exit.

+
See Also
ARM_ETH_MAC_Control
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_VLAN_FILTER   (0x06)
+
+ +

VLAN Filter for received frames; arg15..0: VLAN Tag; arg16: optional ARM_ETH_MAC_VLAN_FILTER_ID_ONLY; 0=disabled (default)

+
See Also
ARM_ETH_MAC_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__mac__ctrls.js b/docs/Driver/html/group__eth__mac__ctrls.js new file mode 100644 index 0000000..05d57b1 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__ctrls.js @@ -0,0 +1,9 @@ +var group__eth__mac__ctrls = +[ + [ "ARM_ETH_MAC_CONFIGURE", "group__eth__mac__ctrls.html#ga7819c7a1aa7bbc13dc42d0fd7e75a23c", null ], + [ "ARM_ETH_MAC_CONTROL_TX", "group__eth__mac__ctrls.html#ga3a98c8a7ee5ed4b1ffd250eecaeefe5c", null ], + [ "ARM_ETH_MAC_CONTROL_RX", "group__eth__mac__ctrls.html#gae0964364b81b38b6e1fbf7196f3be869", null ], + [ "ARM_ETH_MAC_FLUSH", "group__eth__mac__ctrls.html#ga530812ef349a2e297f23de72e660fe27", null ], + [ "ARM_ETH_MAC_SLEEP", "group__eth__mac__ctrls.html#ga4afe66589216f566f529af52f9075fdf", null ], + [ "ARM_ETH_MAC_VLAN_FILTER", "group__eth__mac__ctrls.html#gab332b58ba320e73864830dc42ad74181", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__flush__flag__ctrls.html b/docs/Driver/html/group__eth__mac__flush__flag__ctrls.html new file mode 100644 index 0000000..5e64db3 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__flush__flag__ctrls.html @@ -0,0 +1,175 @@ + + + + + +Ethernet MAC Flush Flags +CMSIS-Driver: Ethernet MAC Flush Flags + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Ethernet MAC Flush Flags
Ethernet MAC Control Codes
+
+
+ +

Specify controls to flush a buffer. +More...

+ + + + + + + + +

+Macros

#define ARM_ETH_MAC_FLUSH_RX   (1UL << 0)
 Flush Receive buffer. More...
 
#define ARM_ETH_MAC_FLUSH_TX   (1UL << 1)
 Flush Transmit buffer. More...
 
+

Description

+

Specify controls to flush a buffer.

+

The function ARM_ETH_MAC_Control with control = ARM_ETH_MAC_FLUSH flushes the buffer which is specified with arg listed bellow.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_MAC_FLUSH_RX   (1UL << 0)
+
+ +

Flush Receive buffer.

+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_FLUSH_TX   (1UL << 1)
+
+ +

Flush Transmit buffer.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__mac__flush__flag__ctrls.js b/docs/Driver/html/group__eth__mac__flush__flag__ctrls.js new file mode 100644 index 0000000..0b243ba --- /dev/null +++ b/docs/Driver/html/group__eth__mac__flush__flag__ctrls.js @@ -0,0 +1,5 @@ +var group__eth__mac__flush__flag__ctrls = +[ + [ "ARM_ETH_MAC_FLUSH_RX", "group__eth__mac__flush__flag__ctrls.html#gac18950811038319960756f063e1ef6d4", null ], + [ "ARM_ETH_MAC_FLUSH_TX", "group__eth__mac__flush__flag__ctrls.html#ga2d10ff33f4f4927820c6a17a2262b120", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.html b/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.html new file mode 100644 index 0000000..f621f71 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.html @@ -0,0 +1,194 @@ + + + + + +Ethernet MAC Frame Transmit Flags +CMSIS-Driver: Ethernet MAC Frame Transmit Flags + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Ethernet MAC Frame Transmit Flags
Ethernet MAC Interface
+
+
+ +

Specify frame transmit flags. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_ETH_MAC_TX_FRAME_FRAGMENT   (1UL << 0)
 Indicate frame fragment. More...
 
#define ARM_ETH_MAC_TX_FRAME_EVENT   (1UL << 1)
 Generate event when frame is transmitted. More...
 
#define ARM_ETH_MAC_TX_FRAME_TIMESTAMP   (1UL << 2)
 Capture frame time stamp. More...
 
+

Description

+

Specify frame transmit flags.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_MAC_TX_FRAME_FRAGMENT   (1UL << 0)
+
+ +

Indicate frame fragment.

+
See Also
ARM_ETH_MAC_SendFrame
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_TX_FRAME_EVENT   (1UL << 1)
+
+ +

Generate event when frame is transmitted.

+
See Also
ARM_ETH_MAC_SendFrame
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_TX_FRAME_TIMESTAMP   (1UL << 2)
+
+ +

Capture frame time stamp.

+
See Also
ARM_ETH_MAC_SendFrame
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.js b/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.js new file mode 100644 index 0000000..0d72d74 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__frame__transmit__ctrls.js @@ -0,0 +1,6 @@ +var group__eth__mac__frame__transmit__ctrls = +[ + [ "ARM_ETH_MAC_TX_FRAME_FRAGMENT", "group__eth__mac__frame__transmit__ctrls.html#gab7bd6dea5bb57240291db71e95c99d9c", null ], + [ "ARM_ETH_MAC_TX_FRAME_EVENT", "group__eth__mac__frame__transmit__ctrls.html#ga91a923680ea0dad758b8950a3fbd237e", null ], + [ "ARM_ETH_MAC_TX_FRAME_TIMESTAMP", "group__eth__mac__frame__transmit__ctrls.html#gade137f65dd345ae40e93c77d495f9b54", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__interface__gr.html b/docs/Driver/html/group__eth__mac__interface__gr.html new file mode 100644 index 0000000..d4f2016 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__interface__gr.html @@ -0,0 +1,1493 @@ + + + + + +Ethernet MAC Interface +CMSIS-Driver: Ethernet MAC Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
Ethernet MAC Interface
Ethernet Interface
+
+
+ +

Driver API for Ethernet MAC Peripheral (Driver_ETH_MAC.h) +More...

+ + + + + + + + + + + + + + +

+Content

 Ethernet MAC Events
 The Ethernet MAC driver generates call back events that are notified via the function ARM_ETH_MAC_SignalEvent.
 
 Ethernet MAC Control Codes
 Configure and control the Ethernet MAC using the ARM_ETH_MAC_Control.
 
 Ethernet MAC Timer Control Codes
 Control codes for ARM_ETH_MAC_ControlTimer function.
 
 Ethernet MAC Frame Transmit Flags
 Specify frame transmit flags.
 
+ + + + + + + + + + +

+Data Structures

struct  ARM_ETH_MAC_CAPABILITIES
 Ethernet MAC Capabilities. More...
 
struct  ARM_DRIVER_ETH_MAC
 Access structure of the Ethernet MAC Driver. More...
 
struct  ARM_ETH_MAC_TIME
 Ethernet MAC Time. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_ETH_MAC_SignalEvent_t )(uint32_t event)
 Pointer to ARM_ETH_MAC_SignalEvent : Signal Ethernet Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion (void)
 Get driver version. More...
 
ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event)
 Initialize Ethernet MAC Device. More...
 
int32_t ARM_ETH_MAC_Uninitialize (void)
 De-initialize Ethernet MAC Device. More...
 
int32_t ARM_ETH_MAC_PowerControl (ARM_POWER_STATE state)
 Control Ethernet MAC Device Power. More...
 
int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR *ptr_addr)
 Get Ethernet MAC Address. More...
 
int32_t ARM_ETH_MAC_SetMacAddress (const ARM_ETH_MAC_ADDR *ptr_addr)
 Set Ethernet MAC Address. More...
 
int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr)
 Configure Address Filter. More...
 
int32_t ARM_ETH_MAC_SendFrame (const uint8_t *frame, uint32_t len, uint32_t flags)
 Send Ethernet frame. More...
 
int32_t ARM_ETH_MAC_ReadFrame (uint8_t *frame, uint32_t len)
 Read data of received Ethernet frame. More...
 
uint32_t ARM_ETH_MAC_GetRxFrameSize (void)
 Get size of received Ethernet frame. More...
 
int32_t ARM_ETH_MAC_GetRxFrameTime (ARM_ETH_MAC_TIME *time)
 Get time of received Ethernet frame. More...
 
int32_t ARM_ETH_MAC_GetTxFrameTime (ARM_ETH_MAC_TIME *time)
 Get time of transmitted Ethernet frame. More...
 
int32_t ARM_ETH_MAC_Control (uint32_t control, uint32_t arg)
 Control Ethernet Interface. More...
 
int32_t ARM_ETH_MAC_ControlTimer (uint32_t control, ARM_ETH_MAC_TIME *time)
 Control Precision Timer. More...
 
int32_t ARM_ETH_MAC_PHY_Read (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
 Read Ethernet PHY Register through Management Interface. More...
 
int32_t ARM_ETH_MAC_PHY_Write (uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
 Write Ethernet PHY Register through Management Interface. More...
 
void ARM_ETH_MAC_SignalEvent (uint32_t event)
 Callback function that signals a Ethernet Event. More...
 
+

Description

+

Driver API for Ethernet MAC Peripheral (Driver_ETH_MAC.h)

+

The following section describes the Ethernet MAC Interface as defined in the Driver_ETH_MAC.h header file.

+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_ETH_MAC_CAPABILITIES
+
+

Ethernet MAC Capabilities.

+

An Ethernet MAC driver can be implemented with different capabilities. The data fields of this struct encode the capabilities implemented by this driver.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +checksum_offload_rx_ip4: 1 +1 = IPv4 header checksum verified on receive
+uint32_t +checksum_offload_rx_ip6: 1 +1 = IPv6 checksum verification supported on receive
+uint32_t +checksum_offload_rx_udp: 1 +1 = UDP payload checksum verified on receive
+uint32_t +checksum_offload_rx_tcp: 1 +1 = TCP payload checksum verified on receive
+uint32_t +checksum_offload_rx_icmp: 1 +1 = ICMP payload checksum verified on receive
+uint32_t +checksum_offload_tx_ip4: 1 +1 = IPv4 header checksum generated on transmit
+uint32_t +checksum_offload_tx_ip6: 1 +1 = IPv6 checksum generation supported on transmit
+uint32_t +checksum_offload_tx_udp: 1 +1 = UDP payload checksum generated on transmit
+uint32_t +checksum_offload_tx_tcp: 1 +1 = TCP payload checksum generated on transmit
+uint32_t +checksum_offload_tx_icmp: 1 +1 = ICMP payload checksum generated on transmit
+uint32_t +media_interface: 2 +Ethernet Media Interface type.
+uint32_t +mac_address: 1 +1 = driver provides initial valid MAC address
+uint32_t +event_rx_frame: 1 +1 = callback event ARM_ETH_MAC_EVENT_RX_FRAME generated
+uint32_t +event_tx_frame: 1 +1 = callback event ARM_ETH_MAC_EVENT_TX_FRAME generated
+uint32_t +event_wakeup: 1 +1 = wakeup event ARM_ETH_MAC_EVENT_WAKEUP generated
+uint32_t +precision_timer: 1 +1 = Precision Timer supported
+uint32_t +reserved: 15 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_DRIVER_ETH_MAC
+
+

Access structure of the Ethernet MAC Driver.

+

The functions of the Ethernet MAC are accessed by function pointers. Refer to Common Driver Functions for overview information.

+

Each instance of an Ethernet MAC provides such an access struct. The instance is indicated by a postfix in the symbol name of the access struct, for example:

+
    +
  • Driver_ETH_MAC0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_ETH_MAC1 is the name of the access struct of the second instance (no. 1).
    • +
+

A configuration setting in the middleware allows connecting the middleware to a specific driver instance Driver_ETH_MACn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_ETH_MAC_GetVersion : Get driver version. More...
 
ARM_ETH_MAC_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_ETH_MAC_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_ETH_MAC_SignalEvent_t cb_event)
 Pointer to ARM_ETH_MAC_Initialize : Initialize Ethernet MAC Device. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_ETH_MAC_Uninitialize : De-initialize Ethernet MAC Device. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_ETH_MAC_PowerControl : Control Ethernet MAC Device Power. More...
 
int32_t(* GetMacAddress )(ARM_ETH_MAC_ADDR *ptr_addr)
 Pointer to ARM_ETH_MAC_GetMacAddress : Get Ethernet MAC Address. More...
 
int32_t(* SetMacAddress )(const ARM_ETH_MAC_ADDR *ptr_addr)
 Pointer to ARM_ETH_MAC_SetMacAddress : Set Ethernet MAC Address. More...
 
int32_t(* SetAddressFilter )(const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr)
 Pointer to ARM_ETH_MAC_SetAddressFilter : Configure Address Filter. More...
 
int32_t(* SendFrame )(const uint8_t *frame, uint32_t len, uint32_t flags)
 Pointer to ARM_ETH_MAC_SendFrame : Send Ethernet frame. More...
 
int32_t(* ReadFrame )(uint8_t *frame, uint32_t len)
 Pointer to ARM_ETH_MAC_ReadFrame : Read data of received Ethernet frame. More...
 
uint32_t(* GetRxFrameSize )(void)
 Pointer to ARM_ETH_MAC_GetRxFrameSize : Get size of received Ethernet frame. More...
 
int32_t(* GetRxFrameTime )(ARM_ETH_MAC_TIME *time)
 Pointer to ARM_ETH_MAC_GetRxFrameTime : Get time of received Ethernet frame. More...
 
int32_t(* GetTxFrameTime )(ARM_ETH_MAC_TIME *time)
 Pointer to ARM_ETH_MAC_GetTxFrameTime : Get time of transmitted Ethernet frame. More...
 
int32_t(* ControlTimer )(uint32_t control, ARM_ETH_MAC_TIME *time)
 Pointer to ARM_ETH_MAC_ControlTimer : Control Precision Timer. More...
 
int32_t(* Control )(uint32_t control, uint32_t arg)
 Pointer to ARM_ETH_MAC_Control : Control Ethernet Interface. More...
 
int32_t(* PHY_Read )(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
 Pointer to ARM_ETH_MAC_PHY_Read : Read Ethernet PHY Register through Management Interface. More...
 
int32_t(* PHY_Write )(uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
 Pointer to ARM_ETH_MAC_PHY_Write : Write Ethernet PHY Register through Management Interface. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_ETH_MAC_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_ETH_MAC_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_ETH_MAC_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_ETH_MAC_SignalEvent_t cb_event)
+
+ +

Pointer to ARM_ETH_MAC_Initialize : Initialize Ethernet MAC Device.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_ETH_MAC_Uninitialize : De-initialize Ethernet MAC Device.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_ETH_MAC_PowerControl : Control Ethernet MAC Device Power.

+ +
+
+ +
+
+ + + + +
int32_t(* GetMacAddress)(ARM_ETH_MAC_ADDR *ptr_addr)
+
+ +

Pointer to ARM_ETH_MAC_GetMacAddress : Get Ethernet MAC Address.

+ +
+
+ +
+
+ + + + +
int32_t(* SetMacAddress)(const ARM_ETH_MAC_ADDR *ptr_addr)
+
+ +

Pointer to ARM_ETH_MAC_SetMacAddress : Set Ethernet MAC Address.

+ +
+
+ +
+
+ + + + +
int32_t(* SetAddressFilter)(const ARM_ETH_MAC_ADDR *ptr_addr, uint32_t num_addr)
+
+ +

Pointer to ARM_ETH_MAC_SetAddressFilter : Configure Address Filter.

+ +
+
+ +
+
+ + + + +
int32_t(* SendFrame)(const uint8_t *frame, uint32_t len, uint32_t flags)
+
+ +

Pointer to ARM_ETH_MAC_SendFrame : Send Ethernet frame.

+ +
+
+ +
+
+ + + + +
int32_t(* ReadFrame)(uint8_t *frame, uint32_t len)
+
+ +

Pointer to ARM_ETH_MAC_ReadFrame : Read data of received Ethernet frame.

+ +
+
+ +
+
+ + + + +
uint32_t(* GetRxFrameSize)(void)
+
+ +

Pointer to ARM_ETH_MAC_GetRxFrameSize : Get size of received Ethernet frame.

+ +
+
+ +
+
+ + + + +
int32_t(* GetRxFrameTime)(ARM_ETH_MAC_TIME *time)
+
+ +

Pointer to ARM_ETH_MAC_GetRxFrameTime : Get time of received Ethernet frame.

+ +
+
+ +
+
+ + + + +
int32_t(* GetTxFrameTime)(ARM_ETH_MAC_TIME *time)
+
+ +

Pointer to ARM_ETH_MAC_GetTxFrameTime : Get time of transmitted Ethernet frame.

+ +
+
+ +
+
+ + + + +
int32_t(* ControlTimer)(uint32_t control, ARM_ETH_MAC_TIME *time)
+
+ +

Pointer to ARM_ETH_MAC_ControlTimer : Control Precision Timer.

+ +
+
+ +
+
+ + + + +
int32_t(* Control)(uint32_t control, uint32_t arg)
+
+ +

Pointer to ARM_ETH_MAC_Control : Control Ethernet Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PHY_Read)(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
+
+ +

Pointer to ARM_ETH_MAC_PHY_Read : Read Ethernet PHY Register through Management Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PHY_Write)(uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
+
+ +

Pointer to ARM_ETH_MAC_PHY_Write : Write Ethernet PHY Register through Management Interface.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_ETH_MAC_TIME
+
+

Ethernet MAC Time.

+

The two members of this struct provide fields to encode time values in the order Nano seconds and seconds.

+

The member ns is also used as a correction factor for ARM_ETH_MAC_TIMER_ADJUST_CLOCK.

+

Used in:

+ +
+ + + + + + + +
Data Fields
+uint32_t +ns +Nano seconds.
+uint32_t +sec +Seconds.
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_ETH_MAC_SignalEvent_t
+
+ +

Pointer to ARM_ETH_MAC_SignalEvent : Signal Ethernet Event.

+

Provides the typedef for the callback function ARM_ETH_MAC_SignalEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_ETH_MAC_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_ETH_MAC_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_ETH_MAC Driver_ETH_MAC0;
+
ARM_DRIVER_ETH_MAC *mac;
+
+
void setup_ethernet (void) {
+
ARM_DRIVER_VERSION version;
+
+
mac = &Driver_ETH_MAC0;
+
version = mac->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_ETH_MAC_CAPABILITIES ARM_ETH_MAC_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_ETH_MAC_CAPABILITIES
+

The function ARM_ETH_MAC_GetCapabilities retrieves information about capabilities in this driver implementation. The data fields of the struct ARM_ETH_MAC_CAPABILITIES encode various capabilities, for example if a hardware is capable to create checksums in hardware or signal events using the ARM_ETH_MAC_SignalEvent callback function.

+

Example:

+
extern ARM_DRIVER_ETH_MAC Driver_ETH_MAC0;
+
ARM_DRIVER_ETH_MAC *mac;
+
+
void read_capabilities (void) {
+
ARM_ETH_MAC_CAPABILITIES mac_capabilities;
+
+
mac = &Driver_ETH_MAC0;
+
mac_capabilities = mac->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_MAC_Initialize (ARM_ETH_MAC_SignalEvent_t cb_event)
+
+ +

Initialize Ethernet MAC Device.

+
Parameters
+ + +
[in]cb_eventPointer to ARM_ETH_MAC_SignalEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_Initialize initializes the Ethernet MAC interface. It is called when the middleware component starts operation.

+

The ARM_ETH_MAC_Initialize function performs the following operations:

+
    +
  • Initializes the resources needed for the Ethernet MAC peripheral.
    • +
  • Registers the ARM_ETH_MAC_SignalEvent callback function.
    • +
+

The parameter cb_event is a pointer to the ARM_ETH_MAC_SignalEvent callback function; use a NULL pointer when no callback signals are required.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_MAC_Uninitialize (void )
+
+ +

De-initialize Ethernet MAC Device.

+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_Uninitialize de-initializes the resources of Ethernet MAC interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_MAC_PowerControl (ARM_POWER_STATE state)
+
+ +

Control Ethernet MAC Device Power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_PowerControl allows you to configure the power modes of the Ethernet MAC interface.

+

The parameter state can be:

+
    +
  • ARM_POWER_OFF: Ethernet MAC peripheral is turned off.
    • +
  • ARM_POWER_FULL: Ethernet MAC peripheral is turned on and fully operational.
    • +
+

If power state specifies an unsupported mode, the function returns ARM_DRIVER_ERROR_UNSUPPORTED as status information and the previous power state of the peripheral is unchanged. Multiple calls with the same state generate no error.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_MAC_GetMacAddress (ARM_ETH_MAC_ADDR * ptr_addr)
+
+ +

Get Ethernet MAC Address.

+
Parameters
+ + +
[in]ptr_addrPointer to address
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_GetMacAddress retrieves the Ethernet MAC own address from the driver.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_MAC_SetMacAddress (const ARM_ETH_MAC_ADDR * ptr_addr)
+
+ +

Set Ethernet MAC Address.

+
Parameters
+ + +
[in]ptr_addrPointer to address
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_SetMacAddress configures Ethernet MAC own address. The Ethernet MAC accepts packets Ethernet frames which contains a MAC destination address that matches the address specified with ptr_addr.

+

The Ethernet MAC receiver will accept also packets with addresses configured by ARM_ETH_MAC_SetAddressFilter function.

+

MAC receiver can be configured to accept also packets with broadcast address, any multicast address or even all packets regardless of address (Promiscuity Mode). This is configured by function ARM_ETH_MAC_Control with ARM_ETH_MAC_CONFIGURE as control parameter.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_ETH_MAC_SetAddressFilter (const ARM_ETH_MAC_ADDR * ptr_addr,
uint32_t num_addr 
)
+
+ +

Configure Address Filter.

+
Parameters
+ + + +
[in]ptr_addrPointer to addresses
[in]num_addrNumber of addresses to configure
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_SetAddressFilter configures Ethernet MAC receiver address filtering. The Ethernet MAC accepts packets Ethernet frames which contains a MAC destination address of the list supplied with ptr_addr. The parameter ptr_addr provides and array of Ethernet MAC addresses. The number of addresses is supplied by num_addr. Specifying num_adr = 0 disables address filtering previously set with this function.

+

The Ethernet MAC receiver will accept packets addressed to its own address and packets with addresses configured by this function.

+

MAC receiver can be configured to accept also packets with broadcast address, any multicast address or even all packets regardless of address (Promiscuity Mode). This is configured by function ARM_ETH_MAC_Control with ARM_ETH_MAC_CONFIGURE as control parameter.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_ETH_MAC_SendFrame (const uint8_t * frame,
uint32_t len,
uint32_t flags 
)
+
+ +

Send Ethernet frame.

+
Parameters
+ + + + +
[in]framePointer to frame buffer with data to send
[in]lenFrame buffer length in bytes
[in]flagsFrame transmit flags (see ARM_ETH_MAC_TX_FRAME_...)
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_SendFrame writes an Ethernet frame to the Ethernet MAC transmit buffer.

+

The Ethernet MAC transmit engine must be enabled by using the function ARM_ETH_MAC_Control (ARM_ETH_MAC_CONTROL_TX, 1) before a call to this function.

+

The frame data addressed by buf starts with MAC destination and ends with the last Payload data byte. The frame data is copied into the transmit buffer of the Ethernet MAC interface. The function does not wait until the transmission over the Ethernet is complete, however the memory addressed by buf is available for the next Ethernet frame after return.

+

The maximum value for len is implied by the size restrictions of the Ethernet frame but is not verified. Using an invalid value for len may generate unpredicted results.

+

The parameter flags specifies additional attributes for the function as shown in the following table. Multiple flags can be combined, for example: ARM_ETH_MAC_TX_FRAME_EVENT | ARM_ETH_MAC_TX_FRAME_TIMESTAMP.

+ + + + + + + + + +
Flag bit Description
ARM_ETH_MAC_TX_FRAME_FRAGMENT Indicates that it is a fragment of the frame. allows you to collect multiple fragments before the frame is sent.
ARM_ETH_MAC_TX_FRAME_EVENT ARM_ETH_MAC_SignalEvent with event bit ARM_ETH_MAC_EVENT_TX_FRAME set will be called when frame send is complete.
ARM_ETH_MAC_TX_FRAME_TIMESTAMP Capture the time stamp of the frame. The time stamp can be obtained using the function ARM_ETH_MAC_GetTxFrameTime.
+

Example:

+
status = mac->SendFrame (&frame->data[0], frame->length, 0);
+
if (status != ARM_DRIVER_OK) {
+
// error handling
+
}
+
+
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_ETH_MAC_ReadFrame (uint8_t * frame,
uint32_t len 
)
+
+ +

Read data of received Ethernet frame.

+
Parameters
+ + + +
[in]framePointer to frame buffer for data to read into
[in]lenFrame buffer length in bytes
+
+
+
Returns
number of data bytes read or execution status
    +
  • value >= 0: number of data bytes read
    • +
  • value < 0: error occurred, value is execution status as defined with Status Error Codes
    • +
+
+

The function ARM_ETH_MAC_ReadFrame reads an Ethernet frame from the Ethernet MAC receive buffer.

+

The Ethernet MAC receive engine must be enabled using the function ARM_ETH_MAC_Control (ARM_ETH_MAC_CONTROL_RX , 1) before a call to this function. The len of the Ethernet frame can be checked using the function ARM_ETH_MAC_GetRxFrameSize.

+

The frame data addressed by buf starts with MAC destination and ends with the last Payload data byte. The frame data is read from the receive buffer of the Ethernet MAC interface and the number of bytes written into the memory addressed by buf is returned. A negative return value indicates an error whereby the status code is defined with driver common return codes.

+

The function ARM_ETH_MAC_ReadFrame may be called with buf = NULL and len = 0 to discard or release an frame. This is useful when an incorrect frame has been received or no memory is available to hold the Ethernet frame.

+

Example:

+
size = mac->GetRxFrameSize ();
+
if ((size < 14) || (size > 1514)) { // frame excludes CRC
+
mac->ReadFrame (NULL, 0); // Frame error, release it
+
}
+
len = mac->ReadFrame (&frame->data[0], size);
+
if (len < 0) {
+
// error handling
+
}
+
+
+
+ +
+
+ + + + + + + + +
uint32_t ARM_ETH_MAC_GetRxFrameSize (void )
+
+ +

Get size of received Ethernet frame.

+
Returns
number of bytes in received frame
+

The function ARM_ETH_MAC_GetRxFrameSize returns the size of a received Ethernet frame. This function is called before ARM_ETH_MAC_ReadFrame and supplies the value len.

+

The frame size includes MAC destination and ends with the last Payload data byte. Value 0 indicates that no Ethernet frame is available in the receive buffer. Values smaller than minimum size of Ethernet frame or larger than maximum size of Ethernet frame indicate an invalid frame which needs to be discarded by calling ARM_ETH_MAC_ReadFrame.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_MAC_GetRxFrameTime (ARM_ETH_MAC_TIME * time)
+
+ +

Get time of received Ethernet frame.

+
Parameters
+ + +
[in]timePointer to time structure for data to read into
+
+
+
Returns
Status Error Codes
+

Retrieve time stamp of a received Ethernet frame. This function must be called before the frame is read using ARM_ETH_MAC_ReadFrame.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_MAC_GetTxFrameTime (ARM_ETH_MAC_TIME * time)
+
+ +

Get time of transmitted Ethernet frame.

+
Parameters
+ + +
[in]timePointer to time structure for data to read into
+
+
+
Returns
Status Error Codes
+

The function returns the time stamp of a transmitted Ethernet frame.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_ETH_MAC_Control (uint32_t control,
uint32_t arg 
)
+
+ +

Control Ethernet Interface.

+
Parameters
+ + + +
[in]controlOperation
[in]argArgument of operation (optional)
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_Control controls the Ethernet MAC interface and executes various operations. After initialization, the Ethernet transceiver and receiver are disabled.

+

The parameter control specifies an operation as defined in the table Parameter control.
+The parameter arg provides, depending on the operation, additional information or values.

+

The table lists values for the parameter control.

+ + + + + + + + + + + + + + + +
Parameter control Operation
ARM_ETH_MAC_CONFIGURE Configure the Ethernet MAC interface; For arg values, see table Parameter arg for CONFIGURE
ARM_ETH_MAC_CONTROL_TX Enable or disable the transmitter; arg : 0=disable; 1=enable
ARM_ETH_MAC_CONTROL_RX Enable or disable the receiver; arg : 0=disable; 1=enable
ARM_ETH_MAC_FLUSH Flush a buffer; arg : see table Parameter arg for FLUSH
ARM_ETH_MAC_SLEEP Exit/Enter Sleep mode; arg : 0=exit; 1=enter and wait for Magic packet
ARM_ETH_MAC_VLAN_FILTER Configure VLAN Filter for received frames; arg : See table Parameter arg for VLAN Filter
+

The table Parameter arg for CONFIGURE lists the arg values for the control ARM_ETH_MAC_CONFIGURE. The values can be ORed in the following way:

+
mac->Control(ARM_ETH_MAC_CONFIGURE, ARM_ETH_MAC_SPEED_100M | ARM_ETH_MAC_DUPLEX_FULL | ARM_ETH_MAC_LOOPBACK);
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Parameter arg CONFIGURE
Parameter arg Bit Category Description
ARM_ETH_MAC_SPEED_10M 0..1 Link Speed Set the link speed to 10 [Mbps]
ARM_ETH_MAC_SPEED_100M Set the link speed to 100 [Mbps]
ARM_ETH_MAC_SPEED_1G Set the link speed to 1 [Gbps]
ARM_ETH_MAC_DUPLEX_HALF 2 Link Mode Set the link mode to half duplex
ARM_ETH_MAC_DUPLEX_FULL Set the link mode to full duplex
n.a. 3 n.a. reserved
ARM_ETH_MAC_LOOPBACK 4 Loopback Test Mode Set the interface into a Loop-back test mode
ARM_ETH_MAC_CHECKSUM_OFFLOAD_RX5 Receiver Checksum offloadEnable Receiver Checksum offload
ARM_ETH_MAC_CHECKSUM_OFFLOAD_TX6 Transmitter Checksum offloadEnable Transmitter Checksum offload
ARM_ETH_MAC_ADDRESS_BROADCAST 7 Broadcast Frame address Accept frames with Broadcast address
ARM_ETH_MAC_ADDRESS_MULTICAST 8 Multicast Frame address Accept frames with any Multicast address
ARM_ETH_MAC_ADDRESS_ALL 9 Any Frame address Accept frames with any address (Promiscuous Mode)
+

The table Parameter arg for FLUSH lists the arg values for the control ARM_ETH_MAC_FLUSH. The arg values can be ORed.

+ + + + + + + + + +
Parameter arg for FLUSH
Parameter arg Bit Category Description
ARM_ETH_MAC_FLUSH_RX 1 Receive buffer Flush the Receive buffer
ARM_ETH_MAC_FLUSH_TX 2 Transmit buffer Flush the Transmit buffer
+

The table Parameter arg for VLAN Filter lists the arg values for the control ARM_ETH_MAC_VLAN_FILTER. The arg values can be ORed.

+ + + + + + + + + + + + + +
Parameter arg for VLAN Filter
Parameter arg Bit Category Description
value 0..15 VLAN Tag Set VLAN Tag value
0 16 Use of VLAN Compare the complete 16-bit VLAN Tag value
ARM_ETH_MAC_VLAN_FILTER_ID_ONLY Compare only the 12-bit VLAN Identifier
0 0..16 Disable Disable the VLAN Filter
+

Example:

+
...
+
// start transfer
+
mac->Control(ARM_ETH_MAC_CONFIGURE, ARM_ETH_MAC_SPEED_100M | ARM_ETH_MAC_DUPLEX_FULL | ARM_ETH_MAC_ADDRESS_BROADCAST);
+
mac->Control(ARM_ETH_MAC_CONTROL_TX, 1);
+
mac->Control(ARM_ETH_MAC_CONTROL_RX, 1);
+
+
... // stop transfer
+
mac->Control(ARM_ETH_MAC_FLUSH, ARM_ETH_MAC_FLUSH_TX | ARM_ETH_MAC_FLUSH_RX);
+
mac->Control(ARM_ETH_MAC_CONTROL_TX, 0);
+
mac->Control(ARM_ETH_MAC_CONTROL_RX, 0);
+
}
+
}
+

For a complete example, refer to Ethernet Interface - Driver Functions.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_ETH_MAC_ControlTimer (uint32_t control,
ARM_ETH_MAC_TIME * time 
)
+
+ +

Control Precision Timer.

+
Parameters
+ + + +
[in]controlOperation
[in]timePointer to time structure
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_ControlTimer controls the timer required for PTP (Precision Time Protocol).

+

The parameter control receives ARM_ETH_MAC_TIMER_xxx codes to manage the timer for a PTP enabled Ethernet MAC interface.
+The parameter time is pointer to a structure that holds time information.

+ + + + + + + + + + + + + + + +
Mode Parameters: Timer Controls Description
ARM_ETH_MAC_TIMER_GET_TIME Retrieve the current time and update the content ARM_ETH_MAC_TIME *time.
ARM_ETH_MAC_TIMER_SET_TIME Set the new time using the values provided with ARM_ETH_MAC_TIME *time.
ARM_ETH_MAC_TIMER_INC_TIME Increment the current time by using the values provided with ARM_ETH_MAC_TIME *time.
ARM_ETH_MAC_TIMER_DEC_TIME Decrement the current time by using the values provided with ARM_ETH_MAC_TIME *time.
ARM_ETH_MAC_TIMER_SET_ALARM Set the alarm time to the values provided with ARM_ETH_MAC_TIME *time.
ARM_ETH_MAC_TIMER_ADJUST_CLOCK Set the clock frequency; the value in time->ns is the correction factor in fractional format q31.
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_ETH_MAC_PHY_Read (uint8_t phy_addr,
uint8_t reg_addr,
uint16_t * data 
)
+
+ +

Read Ethernet PHY Register through Management Interface.

+
Parameters
+ + + + +
[in]phy_addr5-bit device address
[in]reg_addr5-bit register address
[out]dataPointer where the result is written to
+
+
+
Returns
Status Error Codes
+

Read Ethernet PHY Register through the Management Interface. The function is passed to ARM_ETH_PHY_Initialize. The Ethernet PHY driver uses this function to read the value of PHY registers.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_ETH_MAC_PHY_Write (uint8_t phy_addr,
uint8_t reg_addr,
uint16_t data 
)
+
+ +

Write Ethernet PHY Register through Management Interface.

+
Parameters
+ + + + +
[in]phy_addr5-bit device address
[in]reg_addr5-bit register address
[in]data16-bit data to write
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_MAC_PHY_Write writes to a Ethernet PHY register through the Management Interface. The function is passed to ARM_ETH_PHY_Initialize. The Ethernet PHY driver uses this function to write data to PHY registers.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
void ARM_ETH_MAC_SignalEvent (uint32_t event)
+
+ +

Callback function that signals a Ethernet Event.

+
Parameters
+ + +
[in]eventevent notification mask
+
+
+
Returns
none
+

The function ARM_ETH_MAC_SignalEvent is a callback function registered by the function ARM_ETH_MAC_Initialize. This function is typically called from interrupt service routines (ISR) to indicate that a frame is processed or a special event occurred.

+

The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the data fields of the structure ARM_ETH_MAC_CAPABILITIES, which can be retrieved with the function ARM_ETH_MAC_GetCapabilities.

+

The following events can be generated:

+ + + + + + + + + + + +
Parameter event Bit Description
ARM_ETH_MAC_EVENT_RX_FRAME 0 Occurs after a frame is received. Frame can be read by calling ARM_ETH_MAC_ReadFrame.
ARM_ETH_MAC_EVENT_TX_FRAME 1 Occurs after call to ARM_ETH_MAC_SendFrame to indicate that the frame is transmitted.
ARM_ETH_MAC_EVENT_WAKEUP 2 Indicates that a Magic Packet is received while the driver is in Sleep mode (set by ARM_ETH_MAC_SLEEP using ARM_ETH_MAC_Control).
ARM_ETH_MAC_EVENT_TIMER_ALARM 3 Indicates that a Timer Alarm occurred that was set with ARM_ETH_MAC_TIMER_SET_ALARM using ARM_ETH_MAC_ControlTimer.
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__mac__interface__gr.js b/docs/Driver/html/group__eth__mac__interface__gr.js new file mode 100644 index 0000000..ee92e44 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__interface__gr.js @@ -0,0 +1,68 @@ +var group__eth__mac__interface__gr = +[ + [ "Ethernet MAC Events", "group__ETH__MAC__events.html", "group__ETH__MAC__events" ], + [ "Ethernet MAC Control Codes", "group__eth__mac__control.html", "group__eth__mac__control" ], + [ "Ethernet MAC Timer Control Codes", "group__eth__mac__time__control.html", "group__eth__mac__time__control" ], + [ "Ethernet MAC Frame Transmit Flags", "group__eth__mac__frame__transmit__ctrls.html", "group__eth__mac__frame__transmit__ctrls" ], + [ "ARM_ETH_MAC_CAPABILITIES", "group__eth__mac__interface__gr.html#structARM__ETH__MAC__CAPABILITIES", [ + [ "checksum_offload_rx_ip4", "group__eth__mac__interface__gr.html#a0051111be2e389c3161da1c444746216", null ], + [ "checksum_offload_rx_ip6", "group__eth__mac__interface__gr.html#a674b2306c64901e924b3cb7bb882f32f", null ], + [ "checksum_offload_rx_udp", "group__eth__mac__interface__gr.html#a5a447f05a5fbfd35896aad9cd769511c", null ], + [ "checksum_offload_rx_tcp", "group__eth__mac__interface__gr.html#a730d6be6a7b868e0690d9548e77b7aae", null ], + [ "checksum_offload_rx_icmp", "group__eth__mac__interface__gr.html#a142179445bfdbaaaf0d451f277fb0e96", null ], + [ "checksum_offload_tx_ip4", "group__eth__mac__interface__gr.html#ac787d70407ce70e28724932fb32ef0ba", null ], + [ "checksum_offload_tx_ip6", "group__eth__mac__interface__gr.html#a8f7a154565e652d976b9e65bf3516504", null ], + [ "checksum_offload_tx_udp", "group__eth__mac__interface__gr.html#ab3f9560668a087606c40cd81b935396b", null ], + [ "checksum_offload_tx_tcp", "group__eth__mac__interface__gr.html#a6c2b80bbfe520f3e7808cf3d4aaedb45", null ], + [ "checksum_offload_tx_icmp", "group__eth__mac__interface__gr.html#a7b701bac9d66886b5c6964b20c6ca55a", null ], + [ "media_interface", "group__eth__mac__interface__gr.html#a3c5cb74e086417a01d0079f847a3fc8d", null ], + [ "mac_address", "group__eth__mac__interface__gr.html#a7fdea04bacd9c0e12792751055ef6238", null ], + [ "event_rx_frame", "group__eth__mac__interface__gr.html#a8c8f1ac2bf053a9bac98c476646a6018", null ], + [ "event_tx_frame", "group__eth__mac__interface__gr.html#a1b4af3590d59ea4f8e845b4239a4e445", null ], + [ "event_wakeup", "group__eth__mac__interface__gr.html#a7536d9b9818b20b6974a712e0449439b", null ], + [ "precision_timer", "group__eth__mac__interface__gr.html#a881a863974d32f95d7829f768ac47aa2", null ], + [ "reserved", "group__eth__mac__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_DRIVER_ETH_MAC", "group__eth__mac__interface__gr.html#structARM__DRIVER__ETH__MAC", [ + [ "GetVersion", "group__eth__mac__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__eth__mac__interface__gr.html#a9fd725bb058c584a9ced9c579561cdf1", null ], + [ "Initialize", "group__eth__mac__interface__gr.html#aa34417c70cb8b43567c59aa530866cc7", null ], + [ "Uninitialize", "group__eth__mac__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__eth__mac__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "GetMacAddress", "group__eth__mac__interface__gr.html#a02837059933cd04b04bf795a7138f218", null ], + [ "SetMacAddress", "group__eth__mac__interface__gr.html#ac640f929dc4d5bde3e4282c75b25c00d", null ], + [ "SetAddressFilter", "group__eth__mac__interface__gr.html#a45b879a6df608f582d1866daff715798", null ], + [ "SendFrame", "group__eth__mac__interface__gr.html#ac095aea379f23e30a0e51b1f3518ad37", null ], + [ "ReadFrame", "group__eth__mac__interface__gr.html#a466b724be2167ea7d9a14569062a8fa8", null ], + [ "GetRxFrameSize", "group__eth__mac__interface__gr.html#a3286cc9c7624168b162aa3ce3cbe135e", null ], + [ "GetRxFrameTime", "group__eth__mac__interface__gr.html#a8ae5a588bf4055bba3de73cfba78f7e8", null ], + [ "GetTxFrameTime", "group__eth__mac__interface__gr.html#acf081f5020f4ef1435bcff7333a70b93", null ], + [ "ControlTimer", "group__eth__mac__interface__gr.html#ab6bdbdc7fdfcc52e027201738b88b431", null ], + [ "Control", "group__eth__mac__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "PHY_Read", "group__eth__mac__interface__gr.html#a0f2ddb734e4242077275761400b26e35", null ], + [ "PHY_Write", "group__eth__mac__interface__gr.html#ac3efe9bdc31c3b1d7fd8eb82bbfb4c13", null ] + ] ], + [ "ARM_ETH_MAC_TIME", "group__eth__mac__interface__gr.html#structARM__ETH__MAC__TIME", [ + [ "ns", "group__eth__mac__interface__gr.html#a048317f84621fb38ed0bf8c8255e26f0", null ], + [ "sec", "group__eth__mac__interface__gr.html#aaf5f5a3fa5d596a9136b4331f2b54bfc", null ] + ] ], + [ "ARM_ETH_MAC_SignalEvent_t", "group__eth__mac__interface__gr.html#gadfc95cb09c541a29a72da86963668726", null ], + [ "ARM_ETH_MAC_GetVersion", "group__eth__mac__interface__gr.html#ga86b15062c297384ad5842dd57b9d6b1d", null ], + [ "ARM_ETH_MAC_GetCapabilities", "group__eth__mac__interface__gr.html#ga2b13b230502736d8c7679b359dff20d0", null ], + [ "ARM_ETH_MAC_Initialize", "group__eth__mac__interface__gr.html#gacf42d11b171cd032f0ec1de6db2b6832", null ], + [ "ARM_ETH_MAC_Uninitialize", "group__eth__mac__interface__gr.html#gacb2c2ae06f32328775bffbdeaaabfb5d", null ], + [ "ARM_ETH_MAC_PowerControl", "group__eth__mac__interface__gr.html#ga346fef040a0e9bac5762a04a306b1be7", null ], + [ "ARM_ETH_MAC_GetMacAddress", "group__eth__mac__interface__gr.html#ga66308c1e791952047e974bd653037fae", null ], + [ "ARM_ETH_MAC_SetMacAddress", "group__eth__mac__interface__gr.html#ga7cc3d17c7312c5032202dfd9a915f24a", null ], + [ "ARM_ETH_MAC_SetAddressFilter", "group__eth__mac__interface__gr.html#ga150fe30290275a4b32756f94208124e8", null ], + [ "ARM_ETH_MAC_SendFrame", "group__eth__mac__interface__gr.html#ga5bf58defdb239ed7dc948f1da147a1c3", null ], + [ "ARM_ETH_MAC_ReadFrame", "group__eth__mac__interface__gr.html#ga4b79f57d8624bb4410ee12c73a483993", null ], + [ "ARM_ETH_MAC_GetRxFrameSize", "group__eth__mac__interface__gr.html#ga5ee86d6b0efab5329b9bc191c23a466d", null ], + [ "ARM_ETH_MAC_GetRxFrameTime", "group__eth__mac__interface__gr.html#gaa7c6865fb09754be869778142466c5e4", null ], + [ "ARM_ETH_MAC_GetTxFrameTime", "group__eth__mac__interface__gr.html#ga115b5c7e149aec2b181de760f5d83f60", null ], + [ "ARM_ETH_MAC_Control", "group__eth__mac__interface__gr.html#gac3e90c66058d20077f04ac8e8b8d0536", null ], + [ "ARM_ETH_MAC_ControlTimer", "group__eth__mac__interface__gr.html#ga85d9dc865af3702b71a514b18a588643", null ], + [ "ARM_ETH_MAC_PHY_Read", "group__eth__mac__interface__gr.html#gaded29ad58366e9222487db9944373c29", null ], + [ "ARM_ETH_MAC_PHY_Write", "group__eth__mac__interface__gr.html#ga79dd38672749aeebd28f39d9b4f813ce", null ], + [ "ARM_ETH_MAC_SignalEvent", "group__eth__mac__interface__gr.html#gae0697be4c4229601f3bfc17e2978ada6", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__interface__gr_structARM__DRIVER__ETH__MAC.js b/docs/Driver/html/group__eth__mac__interface__gr_structARM__DRIVER__ETH__MAC.js new file mode 100644 index 0000000..82b975d --- /dev/null +++ b/docs/Driver/html/group__eth__mac__interface__gr_structARM__DRIVER__ETH__MAC.js @@ -0,0 +1,20 @@ +var group__eth__mac__interface__gr_structARM__DRIVER__ETH__MAC = +[ + [ "GetVersion", "group__eth__mac__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__eth__mac__interface__gr.html#a9fd725bb058c584a9ced9c579561cdf1", null ], + [ "Initialize", "group__eth__mac__interface__gr.html#aa34417c70cb8b43567c59aa530866cc7", null ], + [ "Uninitialize", "group__eth__mac__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__eth__mac__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "GetMacAddress", "group__eth__mac__interface__gr.html#a02837059933cd04b04bf795a7138f218", null ], + [ "SetMacAddress", "group__eth__mac__interface__gr.html#ac640f929dc4d5bde3e4282c75b25c00d", null ], + [ "SetAddressFilter", "group__eth__mac__interface__gr.html#a45b879a6df608f582d1866daff715798", null ], + [ "SendFrame", "group__eth__mac__interface__gr.html#ac095aea379f23e30a0e51b1f3518ad37", null ], + [ "ReadFrame", "group__eth__mac__interface__gr.html#a466b724be2167ea7d9a14569062a8fa8", null ], + [ "GetRxFrameSize", "group__eth__mac__interface__gr.html#a3286cc9c7624168b162aa3ce3cbe135e", null ], + [ "GetRxFrameTime", "group__eth__mac__interface__gr.html#a8ae5a588bf4055bba3de73cfba78f7e8", null ], + [ "GetTxFrameTime", "group__eth__mac__interface__gr.html#acf081f5020f4ef1435bcff7333a70b93", null ], + [ "ControlTimer", "group__eth__mac__interface__gr.html#ab6bdbdc7fdfcc52e027201738b88b431", null ], + [ "Control", "group__eth__mac__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "PHY_Read", "group__eth__mac__interface__gr.html#a0f2ddb734e4242077275761400b26e35", null ], + [ "PHY_Write", "group__eth__mac__interface__gr.html#ac3efe9bdc31c3b1d7fd8eb82bbfb4c13", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__interface__gr_structARM__ETH__MAC__CAPABILITIES.js b/docs/Driver/html/group__eth__mac__interface__gr_structARM__ETH__MAC__CAPABILITIES.js new file mode 100644 index 0000000..c2b33cf --- /dev/null +++ b/docs/Driver/html/group__eth__mac__interface__gr_structARM__ETH__MAC__CAPABILITIES.js @@ -0,0 +1,20 @@ +var group__eth__mac__interface__gr_structARM__ETH__MAC__CAPABILITIES = +[ + [ "checksum_offload_rx_ip4", "group__eth__mac__interface__gr.html#a0051111be2e389c3161da1c444746216", null ], + [ "checksum_offload_rx_ip6", "group__eth__mac__interface__gr.html#a674b2306c64901e924b3cb7bb882f32f", null ], + [ "checksum_offload_rx_udp", "group__eth__mac__interface__gr.html#a5a447f05a5fbfd35896aad9cd769511c", null ], + [ "checksum_offload_rx_tcp", "group__eth__mac__interface__gr.html#a730d6be6a7b868e0690d9548e77b7aae", null ], + [ "checksum_offload_rx_icmp", "group__eth__mac__interface__gr.html#a142179445bfdbaaaf0d451f277fb0e96", null ], + [ "checksum_offload_tx_ip4", "group__eth__mac__interface__gr.html#ac787d70407ce70e28724932fb32ef0ba", null ], + [ "checksum_offload_tx_ip6", "group__eth__mac__interface__gr.html#a8f7a154565e652d976b9e65bf3516504", null ], + [ "checksum_offload_tx_udp", "group__eth__mac__interface__gr.html#ab3f9560668a087606c40cd81b935396b", null ], + [ "checksum_offload_tx_tcp", "group__eth__mac__interface__gr.html#a6c2b80bbfe520f3e7808cf3d4aaedb45", null ], + [ "checksum_offload_tx_icmp", "group__eth__mac__interface__gr.html#a7b701bac9d66886b5c6964b20c6ca55a", null ], + [ "media_interface", "group__eth__mac__interface__gr.html#a3c5cb74e086417a01d0079f847a3fc8d", null ], + [ "mac_address", "group__eth__mac__interface__gr.html#a7fdea04bacd9c0e12792751055ef6238", null ], + [ "event_rx_frame", "group__eth__mac__interface__gr.html#a8c8f1ac2bf053a9bac98c476646a6018", null ], + [ "event_tx_frame", "group__eth__mac__interface__gr.html#a1b4af3590d59ea4f8e845b4239a4e445", null ], + [ "event_wakeup", "group__eth__mac__interface__gr.html#a7536d9b9818b20b6974a712e0449439b", null ], + [ "precision_timer", "group__eth__mac__interface__gr.html#a881a863974d32f95d7829f768ac47aa2", null ], + [ "reserved", "group__eth__mac__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__interface__gr_structARM__ETH__MAC__TIME.js b/docs/Driver/html/group__eth__mac__interface__gr_structARM__ETH__MAC__TIME.js new file mode 100644 index 0000000..e6aa5cb --- /dev/null +++ b/docs/Driver/html/group__eth__mac__interface__gr_structARM__ETH__MAC__TIME.js @@ -0,0 +1,5 @@ +var group__eth__mac__interface__gr_structARM__ETH__MAC__TIME = +[ + [ "ns", "group__eth__mac__interface__gr.html#a048317f84621fb38ed0bf8c8255e26f0", null ], + [ "sec", "group__eth__mac__interface__gr.html#aaf5f5a3fa5d596a9136b4331f2b54bfc", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__time__control.html b/docs/Driver/html/group__eth__mac__time__control.html new file mode 100644 index 0000000..06d39df --- /dev/null +++ b/docs/Driver/html/group__eth__mac__time__control.html @@ -0,0 +1,249 @@ + + + + + +Ethernet MAC Timer Control Codes +CMSIS-Driver: Ethernet MAC Timer Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Ethernet MAC Timer Control Codes
Ethernet MAC Interface
+
+
+ +

Control codes for ARM_ETH_MAC_ControlTimer function. +More...

+ + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_ETH_MAC_TIMER_GET_TIME   (0x01)
 Get current time. More...
 
#define ARM_ETH_MAC_TIMER_SET_TIME   (0x02)
 Set new time. More...
 
#define ARM_ETH_MAC_TIMER_INC_TIME   (0x03)
 Increment current time. More...
 
#define ARM_ETH_MAC_TIMER_DEC_TIME   (0x04)
 Decrement current time. More...
 
#define ARM_ETH_MAC_TIMER_SET_ALARM   (0x05)
 Set alarm time. More...
 
#define ARM_ETH_MAC_TIMER_ADJUST_CLOCK   (0x06)
 Adjust clock frequency; time->ns: correction factor * 2^31. More...
 
+

Description

+

Control codes for ARM_ETH_MAC_ControlTimer function.

+

The following timer controls are used as parameter control for the ARM_ETH_MAC_ControlTimer function:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_MAC_TIMER_GET_TIME   (0x01)
+
+ +

Get current time.

+
See Also
ARM_ETH_MAC_ControlTimer
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_TIMER_SET_TIME   (0x02)
+
+ +

Set new time.

+
See Also
ARM_ETH_MAC_ControlTimer
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_TIMER_INC_TIME   (0x03)
+
+ +

Increment current time.

+
See Also
ARM_ETH_MAC_ControlTimer
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_TIMER_DEC_TIME   (0x04)
+
+ +

Decrement current time.

+
See Also
ARM_ETH_MAC_ControlTimer
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_TIMER_SET_ALARM   (0x05)
+
+ +

Set alarm time.

+
See Also
ARM_ETH_MAC_ControlTimer
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_MAC_TIMER_ADJUST_CLOCK   (0x06)
+
+ +

Adjust clock frequency; time->ns: correction factor * 2^31.

+
See Also
ARM_ETH_MAC_ControlTimer
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__mac__time__control.js b/docs/Driver/html/group__eth__mac__time__control.js new file mode 100644 index 0000000..03232e3 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__time__control.js @@ -0,0 +1,9 @@ +var group__eth__mac__time__control = +[ + [ "ARM_ETH_MAC_TIMER_GET_TIME", "group__eth__mac__time__control.html#gad9a439b9727c032a7d851df2a7a622c2", null ], + [ "ARM_ETH_MAC_TIMER_SET_TIME", "group__eth__mac__time__control.html#ga5e867a003c06046d7944bcb5723e6049", null ], + [ "ARM_ETH_MAC_TIMER_INC_TIME", "group__eth__mac__time__control.html#ga3c57b3150717fb1a8cbbbac6a9b7ff69", null ], + [ "ARM_ETH_MAC_TIMER_DEC_TIME", "group__eth__mac__time__control.html#gaca9f1c4259d0342e9717a362de1ccf41", null ], + [ "ARM_ETH_MAC_TIMER_SET_ALARM", "group__eth__mac__time__control.html#ga04c2469ba027b020bc6b5baf3b51cf74", null ], + [ "ARM_ETH_MAC_TIMER_ADJUST_CLOCK", "group__eth__mac__time__control.html#ga85cb862eba0934e958a8552022588db7", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.html b/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.html new file mode 100644 index 0000000..4b158e5 --- /dev/null +++ b/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.html @@ -0,0 +1,160 @@ + + + + + +Ethernet MAC VLAN Filter Flag +CMSIS-Driver: Ethernet MAC VLAN Filter Flag + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Ethernet MAC VLAN Filter Flag
Ethernet MAC Control Codes
+
+
+ +

Specify whether to compare only the VLAN Identifier. +More...

+ + + + + +

+Macros

#define ARM_ETH_MAC_VLAN_FILTER_ID_ONLY   (1UL << 16)
 Compare only the VLAN Identifier (12-bit) More...
 
+

Description

+

Specify whether to compare only the VLAN Identifier.

+

The function ARM_ETH_MAC_Control with control = ARM_ETH_MAC_VLAN_FILTER configures the VLAN Filter for received frames as specified with arg.

+

By default the complete VLAN Tag (16-bit) is compared. When ARM_ETH_MAC_VLAN_FILTER_ID_ONLY is specified then only the VLAN Identifier (12-bit) is compared.

+

Specifying arg=0 disables the VLAN Filter.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_MAC_VLAN_FILTER_ID_ONLY   (1UL << 16)
+
+ +

Compare only the VLAN Identifier (12-bit)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.js b/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.js new file mode 100644 index 0000000..a2d8ddd --- /dev/null +++ b/docs/Driver/html/group__eth__mac__vlan__filter__ctrls.js @@ -0,0 +1,4 @@ +var group__eth__mac__vlan__filter__ctrls = +[ + [ "ARM_ETH_MAC_VLAN_FILTER_ID_ONLY", "group__eth__mac__vlan__filter__ctrls.html#ga2511c9e4c22a2b351ce2e454be1c9427", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__phy__interface__gr.html b/docs/Driver/html/group__eth__phy__interface__gr.html new file mode 100644 index 0000000..b6e875b --- /dev/null +++ b/docs/Driver/html/group__eth__phy__interface__gr.html @@ -0,0 +1,711 @@ + + + + + +Ethernet PHY Interface +CMSIS-Driver: Ethernet PHY Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
Ethernet PHY Interface
Ethernet Interface
+
+
+ +

Driver API for Ethernet PHY Peripheral (Driver_ETH_PHY.h) +More...

+ + + + + +

+Content

 Ethernet PHY Mode
 Specify operation modes of the Ethernet PHY interface.
 
+ + + + +

+Data Structures

struct  ARM_DRIVER_ETH_PHY
 Access structure of the Ethernet PHY Driver. More...
 
+ + + + + + + +

+Typedefs

typedef int32_t(* ARM_ETH_PHY_Read_t )(uint8_t phy_addr, uint8_t reg_addr, uint16_t *data)
 Pointer to ARM_ETH_MAC_PHY_Read : Read Ethernet PHY Register. More...
 
typedef int32_t(* ARM_ETH_PHY_Write_t )(uint8_t phy_addr, uint8_t reg_addr, uint16_t data)
 Pointer to ARM_ETH_MAC_PHY_Write : Write Ethernet PHY Register. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_ETH_PHY_GetVersion (void)
 Get driver version. More...
 
int32_t ARM_ETH_PHY_Initialize (ARM_ETH_PHY_Read_t fn_read, ARM_ETH_PHY_Write_t fn_write)
 Initialize Ethernet PHY Device. More...
 
int32_t ARM_ETH_PHY_Uninitialize (void)
 De-initialize Ethernet PHY Device. More...
 
int32_t ARM_ETH_PHY_PowerControl (ARM_POWER_STATE state)
 Control Ethernet PHY Device Power. More...
 
int32_t ARM_ETH_PHY_SetInterface (uint32_t interface)
 Set Ethernet Media Interface. More...
 
int32_t ARM_ETH_PHY_SetMode (uint32_t mode)
 Set Ethernet PHY Device Operation mode. More...
 
ARM_ETH_LINK_STATE ARM_ETH_PHY_GetLinkState (void)
 Get Ethernet PHY Device Link state. More...
 
ARM_ETH_LINK_INFO ARM_ETH_PHY_GetLinkInfo (void)
 Get Ethernet PHY Device Link information. More...
 
+

Description

+

Driver API for Ethernet PHY Peripheral (Driver_ETH_PHY.h)

+

The following section describes the Ethernet PHY Interface as defined in the Driver_ETH_PHY.h header file.

+

The Driver_ETH_PHY.h contains two #defines that are used to configure the connection between the PHY and the microcontroller device:

+
    +
  • ETH_PHY_NUM and
    • +
  • ETH_PHY_ADDR
    • +
+

Usually, the Serial Management Interface (SMI) (using MDC and MDIO) is used to access the PHY’s internal registers to read the state of the link (up/down), duplex mode, speed, and to restart auto-negotiation etc. SMI is a serial bus, which allows to connect up to 32 devices. Devices on the bus are accessed using a 5-bit device address. A default device address is hardware configurable by pin-strapping on the device (some pins are sampled when a reset is asserted or at power-up).

+

The device’s internal weak pull-up or pull-down resistors define a default device address. This address can be changed by connecting strong pull-up or pull-down resistors externally. In this case, the ETH_PHY_ADDR needs to be defined by the user.

+

If a microcontroller device offers more than one Ethernet PHY driver, the user needs to set the correct ETH_PHY_NUM in his application.

+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_ETH_PHY
+
+

Access structure of the Ethernet PHY Driver.

+

The functions of the Ethernet PHY are accessed by function pointers exposed by this structure. Refer to Common Driver Functions for overview information.

+

Each instance of an Ethernet PHY provides such an access struct. The instance is identified by a postfix number in the symbol name of the access struct, for example:

+
    +
  • Driver_ETH_PHY0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_ETH_PHY1 is the name of the access struct of the second instance (no. 1).
    • +
+

A configuration setting in the middleware allows connecting the middleware to a specific driver instance Driver_ETH_PHYn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_ETH_PHY_GetVersion : Get driver version. More...
 
int32_t(* Initialize )(ARM_ETH_PHY_Read_t fn_read, ARM_ETH_PHY_Write_t fn_write)
 Pointer to ARM_ETH_PHY_Initialize : Initialize PHY Device. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_ETH_PHY_Uninitialize : De-initialize PHY Device. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_ETH_PHY_PowerControl : Control PHY Device Power. More...
 
int32_t(* SetInterface )(uint32_t interface)
 Pointer to ARM_ETH_PHY_SetInterface : Set Ethernet Media Interface. More...
 
int32_t(* SetMode )(uint32_t mode)
 Pointer to ARM_ETH_PHY_SetMode : Set Ethernet PHY Device Operation mode. More...
 
ARM_ETH_LINK_STATE(* GetLinkState )(void)
 Pointer to ARM_ETH_PHY_GetLinkState : Get Ethernet PHY Device Link state. More...
 
ARM_ETH_LINK_INFO(* GetLinkInfo )(void)
 Pointer to ARM_ETH_PHY_GetLinkInfo : Get Ethernet PHY Device Link information. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_ETH_PHY_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_ETH_PHY_Read_t fn_read, ARM_ETH_PHY_Write_t fn_write)
+
+ +

Pointer to ARM_ETH_PHY_Initialize : Initialize PHY Device.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_ETH_PHY_Uninitialize : De-initialize PHY Device.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_ETH_PHY_PowerControl : Control PHY Device Power.

+ +
+
+ +
+
+ + + + +
int32_t(* SetInterface)(uint32_t interface)
+
+ +

Pointer to ARM_ETH_PHY_SetInterface : Set Ethernet Media Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* SetMode)(uint32_t mode)
+
+ +

Pointer to ARM_ETH_PHY_SetMode : Set Ethernet PHY Device Operation mode.

+ +
+
+ +
+
+ + + + +
ARM_ETH_LINK_STATE(* GetLinkState)(void)
+
+ +

Pointer to ARM_ETH_PHY_GetLinkState : Get Ethernet PHY Device Link state.

+ +
+
+ +
+
+ + + + +
ARM_ETH_LINK_INFO(* GetLinkInfo)(void)
+
+ +

Pointer to ARM_ETH_PHY_GetLinkInfo : Get Ethernet PHY Device Link information.

+ +
+
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_ETH_PHY_Read_t
+
+ +

Pointer to ARM_ETH_MAC_PHY_Read : Read Ethernet PHY Register.

+

Provides the typedef for the register read function ARM_ETH_MAC_PHY_Read.

+

Parameter for:

+ + +
+
+ +
+
+ + + + +
ARM_ETH_PHY_Write_t
+
+ +

Pointer to ARM_ETH_MAC_PHY_Write : Write Ethernet PHY Register.

+

Provides the typedef for the register write function ARM_ETH_MAC_PHY_Write.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_ETH_PHY_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_ETH_PHY_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_ETH_PHY Driver_ETH_PHY0;
+
ARM_DRIVER_ETH_PHY *drv_info;
+
+
void setup_ethernet_phy (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_ETH_PHY0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_ETH_PHY_Initialize (ARM_ETH_PHY_Read_t fn_read,
ARM_ETH_PHY_Write_t fn_write 
)
+
+ +

Initialize Ethernet PHY Device.

+
Parameters
+ + + +
[in]fn_readPointer to ARM_ETH_MAC_PHY_Read
[in]fn_writePointer to ARM_ETH_MAC_PHY_Write
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_PHY_Initialize initializes the Ethernet PHY interface. It is called when the middleware component starts operation.

+

The ARM_ETH_PHY_Initialize function performs the following operations:

+ +

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_PHY_Uninitialize (void )
+
+ +

De-initialize Ethernet PHY Device.

+
Returns
Status Error Codes
+

The function ARM_ETH_PHY_Uninitialize de-initializes the resources of Ethernet PHY interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_PHY_PowerControl (ARM_POWER_STATE state)
+
+ +

Control Ethernet PHY Device Power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_PHY_PowerControl operates the power modes of the Ethernet PHY interface.

+

The parameter state sets the operation and can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_PHY_SetInterface (uint32_t interface)
+
+ +

Set Ethernet Media Interface.

+
Parameters
+ + +
[in]interfaceMedia Interface type
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_PHY_SetInterface specifies the Media Interface Types that links the Ethernet MAC and Ethernet PHY. After initialization of the PHY interface, you can set the media type. The function ARM_ETH_MAC_GetCapabilities retrieves the media interface type encoded in the data field media_interface of the structure ARM_ETH_MAC_CAPABILITIES.

+

The parameter interface can have the following values:

+ + + + + + + + + +
Parameter interface Media Type
ARM_ETH_INTERFACE_MII Media Independent Interface (MII)
ARM_ETH_INTERFACE_RMII Reduced Media Independent Interface (RMII)
ARM_ETH_INTERFACE_SMII Serial Media Independent Interface (SMII);
+
Note
Some interface values may be unsupported by a driver implementation. For example ARM_ETH_INTERFACE_SMII may return ARM_DRIVER_ERROR_UNSUPPORTED.
+

Example:

+
static ARM_ETH_MAC_CAPABILITIES capabilities;
+
static ARM_DRIVER_ETH_MAC *mac;
+
static ARM_DRIVER_ETH_PHY *phy;
+
+
mac = &Driver_ETH_MAC0;
+
phy = &Driver_ETH_PHY0;
+
+
// Initialize Media Access Controller
+
capabilities = mac->GetCapabilities ();
+
...
+
status = phy->SetInterface (capabilities.media_interface);
+
if (status != ARM_DRIVER_OK) ... // error handling
+
status = phy->SetMode (ARM_ETH_PHY_AUTO_NEGOTIATE);
+
if (status != ARM_DRIVER_OK) ... // error handling
+
...
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_ETH_PHY_SetMode (uint32_t mode)
+
+ +

Set Ethernet PHY Device Operation mode.

+
Parameters
+ + +
[in]modeOperation Mode
+
+
+
Returns
Status Error Codes
+

The function ARM_ETH_PHY_SetMode sets the operation mode parameters for the Ethernet PHY.

+

The table below lists the possible values for the parameter mode. Values from different categories can be ORed as shown in this example code:

+
phy->SetMode (ARM_ETH_PHY_SPEED_100M | ARM_ETH_PHY_LOOPBACK | ARM_ETH_PHY_DUPLEX_HALF );
+


+

+ + + + + + + + + + + + + + + + + + + +
Parameter mode bit Category Description
ARM_ETH_PHY_SPEED_10M 0..1 Link Speed Set the link speed to 10 [Mbps]
ARM_ETH_PHY_SPEED_100M Set the link speed to 100 [Mbps]
ARM_ETH_PHY_SPEED_1G Set the link speed to 1 [Gbps]
ARM_ETH_PHY_DUPLEX_HALF 2 Link Mode Set the link mode to half duplex
ARM_ETH_PHY_DUPLEX_FULL Set the link mode to full duplex
ARM_ETH_PHY_AUTO_NEGOTIATE 3 Autonegotiation Set the interface to Auto Negotiation mode of transmission parameters
ARM_ETH_PHY_LOOPBACK 4 Loopback Set the interface into a Loop-back test mode
ARM_ETH_PHY_ISOLATE 5 Isolation Set to indicate electrical isolation of PHY interface from MII/RMII interface
+
Note
Some settings may be also taken from configuration pins (example ARM_ETH_PHY_ISOLATE). Check the effect of mode settings in the actual driver implementation.
+
+Some mode values may be unsupported by a driver implementation. For example ARM_ETH_PHY_SPEED_1G may return ARM_DRIVER_ERROR_UNSUPPORTED.
+

Example:

+
static ARM_ETH_MAC_CAPABILITIES capabilities;
+
static ARM_DRIVER_ETH_MAC *mac;
+
static ARM_DRIVER_ETH_PHY *phy;
+
+
mac = &Driver_ETH_MAC0;
+
phy = &Driver_ETH_PHY0;
+
+
// Initialize Media Access Controller
+
capabilities = mac->GetCapabilities ();
+
...
+
status = phy->SetInterface (capabilities.media_interface);
+
if (status != ARM_DRIVER_OK) ... // error handling
+
status = phy->SetMode (ARM_ETH_PHY_SPEED_100M | ARM_ETH_PHY_DUPLEX_FULL | ARM_ETH_PHY_ISOLATE);
+
if (status != ARM_DRIVER_OK) ... // error handling
+
...
+
+
+
+ +
+
+ + + + + + + + +
ARM_ETH_LINK_STATE ARM_ETH_PHY_GetLinkState (void )
+
+ +

Get Ethernet PHY Device Link state.

+
Returns
current link status ARM_ETH_LINK_STATE
+

The function ARM_ETH_PHY_GetLinkState retrieves the connection status of the physical Ethernet link.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
ARM_ETH_LINK_INFO ARM_ETH_PHY_GetLinkInfo (void )
+
+ +

Get Ethernet PHY Device Link information.

+
Returns
current link parameters ARM_ETH_LINK_INFO
+

The function ARM_ETH_PHY_GetLinkInfo retrieves information about the current established communication mode (half/full duplex) and communication speed. Information is only valid when link is up (see ARM_ETH_PHY_GetLinkState).

+

Example:

+ + +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__phy__interface__gr.js b/docs/Driver/html/group__eth__phy__interface__gr.js new file mode 100644 index 0000000..dc37868 --- /dev/null +++ b/docs/Driver/html/group__eth__phy__interface__gr.js @@ -0,0 +1,24 @@ +var group__eth__phy__interface__gr = +[ + [ "Ethernet PHY Mode", "group__eth__phy__mode__ctrls.html", "group__eth__phy__mode__ctrls" ], + [ "ARM_DRIVER_ETH_PHY", "group__eth__phy__interface__gr.html#structARM__DRIVER__ETH__PHY", [ + [ "GetVersion", "group__eth__phy__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "Initialize", "group__eth__phy__interface__gr.html#a9f9e7173bf8fed4d774fa48da53739ba", null ], + [ "Uninitialize", "group__eth__phy__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__eth__phy__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "SetInterface", "group__eth__phy__interface__gr.html#a7dfc7cf346c80e7fdb2fe4cea2c61161", null ], + [ "SetMode", "group__eth__phy__interface__gr.html#ae6686344f4d6afa0881d1e545c898a3d", null ], + [ "GetLinkState", "group__eth__phy__interface__gr.html#a0e25b2f267edc874f1bd785175fcf08a", null ], + [ "GetLinkInfo", "group__eth__phy__interface__gr.html#ac162bfaf93512fa0966bfbb923c45463", null ] + ] ], + [ "ARM_ETH_PHY_Read_t", "group__eth__phy__interface__gr.html#ga987d5dd36f179192721c03df37d93e87", null ], + [ "ARM_ETH_PHY_Write_t", "group__eth__phy__interface__gr.html#gaf690fde16281b25f2ffa07f9c4e8e240", null ], + [ "ARM_ETH_PHY_GetVersion", "group__eth__phy__interface__gr.html#ga6850d33d699d9deee4e983a2c99e9734", null ], + [ "ARM_ETH_PHY_Initialize", "group__eth__phy__interface__gr.html#gacf2332a7fa2d84694b8e5f0838135589", null ], + [ "ARM_ETH_PHY_Uninitialize", "group__eth__phy__interface__gr.html#ga26ea7e1e9825b959284241ebff6eea3f", null ], + [ "ARM_ETH_PHY_PowerControl", "group__eth__phy__interface__gr.html#gaba0f92561754dad8f8f03feb1cf2855e", null ], + [ "ARM_ETH_PHY_SetInterface", "group__eth__phy__interface__gr.html#gaedd8b5650a1259d572a1f303d3e2c01c", null ], + [ "ARM_ETH_PHY_SetMode", "group__eth__phy__interface__gr.html#ga9aa688c951f01ed9ca7c88cf51be8a09", null ], + [ "ARM_ETH_PHY_GetLinkState", "group__eth__phy__interface__gr.html#ga4085cd24ebe33b78d51a3c003da4a5ba", null ], + [ "ARM_ETH_PHY_GetLinkInfo", "group__eth__phy__interface__gr.html#ga8c79dcd7a12656403f3befab3c8605a2", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__phy__interface__gr_structARM__DRIVER__ETH__PHY.js b/docs/Driver/html/group__eth__phy__interface__gr_structARM__DRIVER__ETH__PHY.js new file mode 100644 index 0000000..585cec6 --- /dev/null +++ b/docs/Driver/html/group__eth__phy__interface__gr_structARM__DRIVER__ETH__PHY.js @@ -0,0 +1,11 @@ +var group__eth__phy__interface__gr_structARM__DRIVER__ETH__PHY = +[ + [ "GetVersion", "group__eth__phy__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "Initialize", "group__eth__phy__interface__gr.html#a9f9e7173bf8fed4d774fa48da53739ba", null ], + [ "Uninitialize", "group__eth__phy__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__eth__phy__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "SetInterface", "group__eth__phy__interface__gr.html#a7dfc7cf346c80e7fdb2fe4cea2c61161", null ], + [ "SetMode", "group__eth__phy__interface__gr.html#ae6686344f4d6afa0881d1e545c898a3d", null ], + [ "GetLinkState", "group__eth__phy__interface__gr.html#a0e25b2f267edc874f1bd785175fcf08a", null ], + [ "GetLinkInfo", "group__eth__phy__interface__gr.html#ac162bfaf93512fa0966bfbb923c45463", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__eth__phy__mode__ctrls.html b/docs/Driver/html/group__eth__phy__mode__ctrls.html new file mode 100644 index 0000000..3f32b67 --- /dev/null +++ b/docs/Driver/html/group__eth__phy__mode__ctrls.html @@ -0,0 +1,284 @@ + + + + + +Ethernet PHY Mode +CMSIS-Driver: Ethernet PHY Mode + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Ethernet PHY Mode
Ethernet PHY Interface
+
+
+ +

Specify operation modes of the Ethernet PHY interface. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_ETH_PHY_SPEED_10M   (ARM_ETH_SPEED_10M << ARM_ETH_PHY_SPEED_Pos)
 10 Mbps link speed More...
 
#define ARM_ETH_PHY_SPEED_100M   (ARM_ETH_SPEED_100M << ARM_ETH_PHY_SPEED_Pos)
 100 Mbps link speed More...
 
#define ARM_ETH_PHY_SPEED_1G   (ARM_ETH_SPEED_1G << ARM_ETH_PHY_SPEED_Pos)
 1 Gpbs link speed More...
 
#define ARM_ETH_PHY_DUPLEX_HALF   (ARM_ETH_DUPLEX_HALF << ARM_ETH_PHY_DUPLEX_Pos)
 Half duplex link. More...
 
#define ARM_ETH_PHY_DUPLEX_FULL   (ARM_ETH_DUPLEX_FULL << ARM_ETH_PHY_DUPLEX_Pos)
 Full duplex link. More...
 
#define ARM_ETH_PHY_AUTO_NEGOTIATE   (1UL << 3)
 Auto Negotiation mode. More...
 
#define ARM_ETH_PHY_LOOPBACK   (1UL << 4)
 Loop-back test mode. More...
 
#define ARM_ETH_PHY_ISOLATE   (1UL << 5)
 Isolate PHY from MII/RMII interface. More...
 
+

Description

+

Specify operation modes of the Ethernet PHY interface.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_ETH_PHY_SPEED_10M   (ARM_ETH_SPEED_10M << ARM_ETH_PHY_SPEED_Pos)
+
+ +

10 Mbps link speed

+
See Also
ARM_ETH_PHY_SetMode
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_SPEED_100M   (ARM_ETH_SPEED_100M << ARM_ETH_PHY_SPEED_Pos)
+
+ +

100 Mbps link speed

+
See Also
ARM_ETH_PHY_SetMode
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_SPEED_1G   (ARM_ETH_SPEED_1G << ARM_ETH_PHY_SPEED_Pos)
+
+ +

1 Gpbs link speed

+
See Also
ARM_ETH_PHY_SetMode
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_DUPLEX_HALF   (ARM_ETH_DUPLEX_HALF << ARM_ETH_PHY_DUPLEX_Pos)
+
+ +

Half duplex link.

+
See Also
ARM_ETH_PHY_SetMode
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_DUPLEX_FULL   (ARM_ETH_DUPLEX_FULL << ARM_ETH_PHY_DUPLEX_Pos)
+
+ +

Full duplex link.

+
See Also
ARM_ETH_PHY_SetMode
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_AUTO_NEGOTIATE   (1UL << 3)
+
+ +

Auto Negotiation mode.

+
See Also
ARM_ETH_PHY_SetMode
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_LOOPBACK   (1UL << 4)
+
+ +

Loop-back test mode.

+
See Also
ARM_ETH_PHY_SetMode
+ +
+
+ +
+
+ + + + +
#define ARM_ETH_PHY_ISOLATE   (1UL << 5)
+
+ +

Isolate PHY from MII/RMII interface.

+
See Also
ARM_ETH_PHY_SetMode
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__eth__phy__mode__ctrls.js b/docs/Driver/html/group__eth__phy__mode__ctrls.js new file mode 100644 index 0000000..35cd9e6 --- /dev/null +++ b/docs/Driver/html/group__eth__phy__mode__ctrls.js @@ -0,0 +1,11 @@ +var group__eth__phy__mode__ctrls = +[ + [ "ARM_ETH_PHY_SPEED_10M", "group__eth__phy__mode__ctrls.html#gabc7acc4ebe828c3d0825400e14ad20f0", null ], + [ "ARM_ETH_PHY_SPEED_100M", "group__eth__phy__mode__ctrls.html#gad1e8b2c8c210fa36949db9a34a993657", null ], + [ "ARM_ETH_PHY_SPEED_1G", "group__eth__phy__mode__ctrls.html#ga046605398ceae99a176e6f82432ae710", null ], + [ "ARM_ETH_PHY_DUPLEX_HALF", "group__eth__phy__mode__ctrls.html#gace797b3cd143be22f47c3ef61b20e14d", null ], + [ "ARM_ETH_PHY_DUPLEX_FULL", "group__eth__phy__mode__ctrls.html#ga5d06a94867c89cd311b6e279669321e3", null ], + [ "ARM_ETH_PHY_AUTO_NEGOTIATE", "group__eth__phy__mode__ctrls.html#ga6a8c54f8fed3e5f68bd04eb715d10ab9", null ], + [ "ARM_ETH_PHY_LOOPBACK", "group__eth__phy__mode__ctrls.html#ga5f7e46cda8ab3c774fe7ce0a8a1ba3ec", null ], + [ "ARM_ETH_PHY_ISOLATE", "group__eth__phy__mode__ctrls.html#ga8d68719e07c7af449b57c5df802376c8", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__execution__status.html b/docs/Driver/html/group__execution__status.html new file mode 100644 index 0000000..a5b9e95 --- /dev/null +++ b/docs/Driver/html/group__execution__status.html @@ -0,0 +1,271 @@ + + + + + +Status Error Codes +CMSIS-Driver: Status Error Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Status Error Codes
Common Driver Definitions
+
+
+ +

Negative return values of functions indicate errors occurred during execution. +More...

+ + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_DRIVER_OK   0
 Operation succeeded. More...
 
#define ARM_DRIVER_ERROR   -1
 Unspecified error. More...
 
#define ARM_DRIVER_ERROR_BUSY   -2
 Driver is busy. More...
 
#define ARM_DRIVER_ERROR_TIMEOUT   -3
 Timeout occurred. More...
 
#define ARM_DRIVER_ERROR_UNSUPPORTED   -4
 Operation not supported. More...
 
#define ARM_DRIVER_ERROR_PARAMETER   -5
 Parameter error. More...
 
#define ARM_DRIVER_ERROR_SPECIFIC   -6
 Start of driver specific errors. More...
 
+

Description

+

Negative return values of functions indicate errors occurred during execution.

+

Most functions return a status information using negative return values. The following list provides the status error codes that are common in all drivers. The drivers may return also status error codes that are specific to the peripheral.

+
See Also
Status Error Codes for SPI driver; Status Error Codes for USART driver; Status Error Codes for NAND driver;
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_DRIVER_OK   0
+
+ +

Operation succeeded.

+

The value 0 or positive values indicate that the function execution is completed without any errors. Note that positive values are used to provide for example the number of data items.

+ +

Referenced by ARM_CAN_Control(), ARM_CAN_GetClock(), ARM_CAN_GetStatus(), ARM_CAN_Initialize(), ARM_CAN_MessageRead(), ARM_CAN_MessageSend(), ARM_CAN_ObjectConfigure(), ARM_CAN_ObjectSetFilter(), ARM_CAN_PowerControl(), ARM_CAN_SetBitrate(), ARM_CAN_SetMode(), ARM_CAN_Uninitialize(), ARM_I2C_Control(), ARM_I2C_Initialize(), ARM_I2C_MasterReceive(), ARM_I2C_MasterTransmit(), ARM_I2C_PowerControl(), ARM_I2C_SlaveReceive(), ARM_I2C_SlaveTransmit(), ARM_I2C_Uninitialize(), ARM_MCI_AbortTransfer(), ARM_MCI_CardPower(), ARM_MCI_Control(), ARM_MCI_GetStatus(), ARM_MCI_Initialize(), ARM_MCI_PowerControl(), ARM_MCI_SendCommand(), ARM_MCI_SetupTransfer(), ARM_MCI_Uninitialize(), ARM_SAI_Control(), ARM_SAI_Initialize(), ARM_SAI_PowerControl(), ARM_SAI_Receive(), ARM_SAI_Send(), ARM_SAI_Uninitialize(), ARM_SPI_Control(), ARM_SPI_Initialize(), ARM_SPI_PowerControl(), ARM_SPI_Receive(), ARM_SPI_Send(), ARM_SPI_Transfer(), ARM_SPI_Uninitialize(), ARM_USART_Control(), ARM_USART_Initialize(), ARM_USART_PowerControl(), ARM_USART_Receive(), ARM_USART_Send(), ARM_USART_SetModemControl(), ARM_USART_Transfer(), ARM_USART_Uninitialize(), ARM_USBD_DeviceConnect(), ARM_USBD_DeviceDisconnect(), ARM_USBD_DeviceGetState(), ARM_USBD_DeviceRemoteWakeup(), ARM_USBD_DeviceSetAddress(), ARM_USBD_EndpointConfigure(), ARM_USBD_EndpointStall(), ARM_USBD_EndpointTransfer(), ARM_USBD_EndpointTransferAbort(), ARM_USBD_EndpointUnconfigure(), ARM_USBD_Initialize(), ARM_USBD_PowerControl(), ARM_USBD_ReadSetupPacket(), ARM_USBD_Uninitialize(), ARM_USBH_HCI_Initialize(), ARM_USBH_HCI_PortVbusOnOff(), ARM_USBH_HCI_PowerControl(), ARM_USBH_HCI_Uninitialize(), ARM_USBH_Initialize(), ARM_USBH_PipeDelete(), ARM_USBH_PipeModify(), ARM_USBH_PipeReset(), ARM_USBH_PipeTransfer(), ARM_USBH_PipeTransferAbort(), ARM_USBH_PortReset(), ARM_USBH_PortResume(), ARM_USBH_PortSuspend(), ARM_USBH_PortVbusOnOff(), ARM_USBH_PowerControl(), and ARM_USBH_Uninitialize().

+ +
+
+ +
+
+ + + + +
#define ARM_DRIVER_ERROR   -1
+
+ +

Unspecified error.

+

The function did not execute correct and an unspecified error occurred during execution.

+ +
+
+ +
+
+ + + + +
#define ARM_DRIVER_ERROR_BUSY   -2
+
+ +

Driver is busy.

+

The function cannot be executed because the driver is busy with the execution of a conflicting operation.

+ +
+
+ +
+
+ + + + +
#define ARM_DRIVER_ERROR_TIMEOUT   -3
+
+ +

Timeout occurred.

+

The function execution is terminated because a peripheral did not react within a specific timeout limit.

+ +
+
+ +
+
+ + + + +
#define ARM_DRIVER_ERROR_UNSUPPORTED   -4
+
+ +

Operation not supported.

+

The function requested an operation (for example by using an illegal control code) that is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_DRIVER_ERROR_PARAMETER   -5
+
+ +

Parameter error.

+

A function parameter is incorrect.

+ +
+
+ +
+
+ + + + +
#define ARM_DRIVER_ERROR_SPECIFIC   -6
+
+ +

Start of driver specific errors.

+

This value indicates the start of status error codes that are specific to the peripheral driver.

+
See Also
Status Error Codes for SPI driver; Status Error Codes for USART driver;
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__execution__status.js b/docs/Driver/html/group__execution__status.js new file mode 100644 index 0000000..7a73ebd --- /dev/null +++ b/docs/Driver/html/group__execution__status.js @@ -0,0 +1,10 @@ +var group__execution__status = +[ + [ "ARM_DRIVER_OK", "group__execution__status.html#ga85752c5de59e8adeb001e35ff5be6be7", null ], + [ "ARM_DRIVER_ERROR", "group__execution__status.html#ga2f627075447749bb368d3b768be107cb", null ], + [ "ARM_DRIVER_ERROR_BUSY", "group__execution__status.html#ga13c1123319c7b9a4735d63447f35116b", null ], + [ "ARM_DRIVER_ERROR_TIMEOUT", "group__execution__status.html#ga0bac892205bb2d586b822e8b178ab310", null ], + [ "ARM_DRIVER_ERROR_UNSUPPORTED", "group__execution__status.html#ga2efa59e480d82697795439220e6884e4", null ], + [ "ARM_DRIVER_ERROR_PARAMETER", "group__execution__status.html#gac781d4b70ce17c4c2efe2db045be751c", null ], + [ "ARM_DRIVER_ERROR_SPECIFIC", "group__execution__status.html#ga5a2b5d68f6649598d099b88c0eaee3e5", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__flash__interface__gr.html b/docs/Driver/html/group__flash__interface__gr.html new file mode 100644 index 0000000..1e8d93f --- /dev/null +++ b/docs/Driver/html/group__flash__interface__gr.html @@ -0,0 +1,1093 @@ + + + + + +Flash Interface +CMSIS-Driver: Flash Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
Flash Interface
+
+
+ +

Driver API for Flash Device Interface (Driver_Flash.h) +More...

+ + + + + +

+Content

 Flash Events
 The Flash driver generates call back events that are notified via the function ARM_Flash_SignalEvent.
 
+ + + + + + + + + + + + + + + + +

+Data Structures

struct  ARM_FLASH_SECTOR
 Flash Sector information. More...
 
struct  ARM_FLASH_INFO
 Flash information. More...
 
struct  ARM_DRIVER_FLASH
 Access structure of the Flash Driver. More...
 
struct  ARM_FLASH_CAPABILITIES
 Flash Driver Capabilities. More...
 
struct  ARM_FLASH_STATUS
 Flash Status. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_Flash_SignalEvent_t )(uint32_t event)
 Pointer to ARM_Flash_SignalEvent : Signal Flash Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_Flash_GetVersion (void)
 Get driver version. More...
 
ARM_FLASH_CAPABILITIES ARM_Flash_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_Flash_Initialize (ARM_Flash_SignalEvent_t cb_event)
 Initialize the Flash Interface. More...
 
int32_t ARM_Flash_Uninitialize (void)
 De-initialize the Flash Interface. More...
 
int32_t ARM_Flash_PowerControl (ARM_POWER_STATE state)
 Control the Flash interface power. More...
 
int32_t ARM_Flash_ReadData (uint32_t addr, void *data, uint32_t cnt)
 Read data from Flash. More...
 
int32_t ARM_Flash_ProgramData (uint32_t addr, const void *data, uint32_t cnt)
 Program data to Flash. More...
 
int32_t ARM_Flash_EraseSector (uint32_t addr)
 Erase Flash Sector. More...
 
int32_t ARM_Flash_EraseChip (void)
 Erase complete Flash. Optional function for faster full chip erase. More...
 
ARM_FLASH_STATUS ARM_Flash_GetStatus (void)
 Get Flash status. More...
 
ARM_FLASH_INFO * ARM_Flash_GetInfo (void)
 Get Flash information. More...
 
void ARM_Flash_SignalEvent (uint32_t event)
 Signal Flash event. More...
 
+

Description

+

Driver API for Flash Device Interface (Driver_Flash.h)

+

Flash devices based on NOR memory cells are the preferred technology for embedded applications requiring a discrete non-volatile memory device. The low read latency characteristic of these Flash devices allow a direct code execution (XIP) and data storage in a single memory product.

+

Flash API

+

The Flash API provides a generic API suitable for Flashes with NOR memory cells independent from the actual interface to the MCU (memory bus, SPI, ...). SPI flashes are typically not named NOR flashes but have usually same flash cell properties.

+

The following header files define the Application Programming Interface (API) for the Flash interface:

+
    +
  • Driver_Flash.h : Driver API for Flash Device Interface
    • +
+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +

A typical setup sequence for the driver is shown below:

+

Example Code:

+
#include "Driver_Flash.h"
+
#include "cmsis_os2.h" // ARM::CMSIS:RTOS2:Keil RTX5
+
+
/* Flash driver instance */
+
extern ARM_DRIVER_FLASH Driver_Flash0;
+
static ARM_DRIVER_FLASH * flashDev = &Driver_Flash0;
+
+
/* CMSIS-RTOS2 Thread Id */
+
osThreadId_t Flash_Thread_Id;
+
+
/* Flash signal event */
+
void Flash_Callback(uint32_t event)
+
{
+
if (event & ARM_FLASH_EVENT_READY) {
+
/* The read/program/erase operation is completed */
+
osThreadFlagsSet(Flash_Thread_Id, 1U);
+
}
+
if (event & ARM_FLASH_EVENT_ERROR) {
+
/* The read/program/erase operation is completed with errors */
+
/* Call debugger or replace with custom error handling */
+
__breakpoint(0);
+
}
+
}
+
+
/* CMSIS-RTOS2 Thread */
+
void Flash_Thread (void *argument)
+
{
+
/* Query drivers capabilities */
+
const ARM_FLASH_CAPABILITIES capabilities = flashDev->GetCapabilities();
+
+
/* Initialize Flash device */
+
if (capabilities.event_ready) {
+
flashDev->Initialize (&Flash_Callback);
+
} else {
+
flashDev->Initialize (NULL);
+
}
+
+
/* Power-on Flash device */
+
flashDev->PowerControl (ARM_POWER_FULL);
+
+
/* Read data taking data_width into account */
+
uint8_t buf[256U];
+
flashDev->ReadData (0x1000U, buf, sizeof(buf)>>capabilities.data_width);
+
+
/* Wait operation to be completed */
+
if (capabilities.event_ready) {
+
osThreadFlagsWait (1U, osFlagsWaitAny, 100U);
+
} else {
+
osDelay(100U);
+
}
+
+
/* Switch off gracefully */
+
flashDev->PowerControl (ARM_POWER_OFF);
+
flashDev->Uninitialize ();
+
}
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_FLASH_SECTOR
+
+

Flash Sector information.

+

Specifies sector start and end address.

+

Element of:

+ +
+ + + + + + + +
Data Fields
+uint32_t +start +Sector Start address.
+uint32_t +end +Sector End address (start+size-1)
+ +
+
+ +
+
+ + + + +
struct ARM_FLASH_INFO
+
+

Flash information.

+

Stores the characteristics of a Flash device. This includes sector layout, programming size and a default value for erased memory. This information can be obtained from the Flash device datasheet and is used by the middleware in order to properly interact with the Flash device.

+

Sector layout is described by specifying the sector_info which points to an array of sector information (start and end address) and by specifying the sector_count which defines the number of sectors. The element sector_size is not used in this case and needs to be 0. Flash sectors need not to be aligned continuously. Gaps are allowed in the device memory space in order to reserve sectors for other usage (for example application code).

+

When the device has uniform sector size than the sector layout can be described by specifying the sector_size which defines the size of a single sector and by specifying the sector_count which defines the number of sectors. The element sector_info is not used in this case and needs to be NULL.

+

The smallest programmable unit within a sector is specified by the program_unit. It defines the granularity for programming data.

+

Optimal programming page size is specified by the page_size and defines the amount of data that should be programmed in one step to achieve maximum programming speed.

+

Contents of erased memory is specified by the erased_value and is typically 0xFF. This value can be used before erasing a sector to check if the sector is blank and erase can be skipped.

+
+ + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+ARM_FLASH_SECTOR * +sector_info +Sector layout information (NULL=Uniform sectors)
+uint32_t +sector_count +Number of sectors.
+uint32_t +sector_size +Uniform sector size in bytes (0=sector_info used)
+uint32_t +page_size +Optimal programming page size in bytes.
+uint32_t +program_unit +Smallest programmable unit in bytes.
+uint8_t +erased_value +Contents of erased memory (usually 0xFF)
+uint8_t +reserved[3] +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_DRIVER_FLASH
+
+

Access structure of the Flash Driver.

+

The functions of the Flash driver are accessed by function pointers exposed by this structure. Refer to Common Driver Functions for overview information.

+

Each instance of a Flash interface provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:

+
    +
  • Driver_Flash0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_Flash1 is the name of the access struct of the second instance (no. 1).
    • +
+

A middleware configuration setting allows connecting the middleware to a specific driver instance Driver_Flashn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_Flash_GetVersion : Get driver version. More...
 
ARM_FLASH_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_Flash_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_Flash_SignalEvent_t cb_event)
 Pointer to ARM_Flash_Initialize : Initialize Flash Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_Flash_Uninitialize : De-initialize Flash Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_Flash_PowerControl : Control Flash Interface Power. More...
 
int32_t(* ReadData )(uint32_t addr, void *data, uint32_t cnt)
 Pointer to ARM_Flash_ReadData : Read data from Flash. More...
 
int32_t(* ProgramData )(uint32_t addr, const void *data, uint32_t cnt)
 Pointer to ARM_Flash_ProgramData : Program data to Flash. More...
 
int32_t(* EraseSector )(uint32_t addr)
 Pointer to ARM_Flash_EraseSector : Erase Flash Sector. More...
 
int32_t(* EraseChip )(void)
 Pointer to ARM_Flash_EraseChip : Erase complete Flash. More...
 
ARM_FLASH_STATUS(* GetStatus )(void)
 Pointer to ARM_Flash_GetStatus : Get Flash status. More...
 
ARM_FLASH_INFO *(* GetInfo )(void)
 Pointer to ARM_Flash_GetInfo : Get Flash information. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_Flash_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_FLASH_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_Flash_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_Flash_SignalEvent_t cb_event)
+
+ +

Pointer to ARM_Flash_Initialize : Initialize Flash Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_Flash_Uninitialize : De-initialize Flash Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_Flash_PowerControl : Control Flash Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* ReadData)(uint32_t addr, void *data, uint32_t cnt)
+
+ +

Pointer to ARM_Flash_ReadData : Read data from Flash.

+ +
+
+ +
+
+ + + + +
int32_t(* ProgramData)(uint32_t addr, const void *data, uint32_t cnt)
+
+ +

Pointer to ARM_Flash_ProgramData : Program data to Flash.

+ +
+
+ +
+
+ + + + +
int32_t(* EraseSector)(uint32_t addr)
+
+ +

Pointer to ARM_Flash_EraseSector : Erase Flash Sector.

+ +
+
+ +
+
+ + + + +
int32_t(* EraseChip)(void)
+
+ +

Pointer to ARM_Flash_EraseChip : Erase complete Flash.

+ +
+
+ +
+
+ + + + +
ARM_FLASH_STATUS(* GetStatus)(void)
+
+ +

Pointer to ARM_Flash_GetStatus : Get Flash status.

+ +
+
+ +
+
+ + + + +
ARM_FLASH_INFO*(* GetInfo)(void)
+
+ +

Pointer to ARM_Flash_GetInfo : Get Flash information.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_FLASH_CAPABILITIES
+
+

Flash Driver Capabilities.

+

A Flash driver can be implemented with different capabilities. The data fields of this struct encode the capabilities implemented by this driver.

+

The element event_ready indicates that the driver is able to generate the ARM_FLASH_EVENT_READY event. In case that this event is not available it is possible to poll the driver status by calling the ARM_Flash_GetStatus and check the busy flag.

+

The element data_width specifies the data access size and also defines the data type (uint8_t, uint16_t or uint32_t) for the data parameter in ARM_Flash_ReadData and ARM_Flash_ProgramData functions.

+

The element erase_chip specifies that the ARM_Flash_EraseChip function is supported. Typically full chip erase is much faster than erasing the whole device sector per sector.

+

Returned by:

+ +
+ + + + + + + + + + + + + +
Data Fields
+uint32_t +event_ready: 1 +Signal Flash Ready event.
+uint32_t +data_width: 2 +Data width: 0=8-bit, 1=16-bit, 2=32-bit.
+uint32_t +erase_chip: 1 +Supports EraseChip operation.
+uint32_t +reserved: 28 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_FLASH_STATUS
+
+

Flash Status.

+

Structure with information about the status of the Flash.

+

The flag busy indicates that the driver is busy executing read/program/erase operation.

+

The flag error flag is cleared on start of read/program/erase operation and is set at the end of the current operation in case of error.

+

Returned by:

+ +
+ + + + + + + + + + +
Data Fields
+uint32_t +busy: 1 +Flash busy flag.
+uint32_t +error: 1 +Read/Program/Erase error flag (cleared on start of next operation)
+uint32_t +reserved: 30 +
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_Flash_SignalEvent_t
+
+ +

Pointer to ARM_Flash_SignalEvent : Signal Flash Event.

+

Provides the typedef for the callback function ARM_Flash_SignalEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_Flash_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_Flash_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_FLASH Driver_Flash0;
+
ARM_DRIVER_FLASH *drv_info;
+
+
void read_version (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_Flash0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_FLASH_CAPABILITIES ARM_Flash_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_FLASH_CAPABILITIES
+

The function ARM_Flash_GetCapabilities returns information about capabilities in this driver implementation. The data fields of the struct ARM_FLASH_CAPABILITIES encode various capabilities, for example if a hardware is able to create signal events using the ARM_Flash_SignalEvent callback function.

+

Example:

+
extern ARM_DRIVER_FLASH Driver_Flash0;
+
ARM_DRIVER_FLASH *drv_info;
+
+
void read_capabilities (void) {
+
ARM_FLASH_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_Flash0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_Flash_Initialize (ARM_Flash_SignalEvent_t cb_event)
+
+ +

Initialize the Flash Interface.

+
Parameters
+ + +
[in]cb_eventPointer to ARM_Flash_SignalEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_Flash_Initialize initializes the Flash interface. It is called when the middleware component starts operation.

+

The function performs the following operations:

+
    +
  • Initializes the resources needed for the Flash interface.
    • +
  • Registers the ARM_Flash_SignalEvent callback function.
    • +
+

The parameter cb_event is a pointer to the ARM_Flash_SignalEvent callback function; use a NULL pointer when no callback signals are required.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_Flash_Uninitialize (void )
+
+ +

De-initialize the Flash Interface.

+
Returns
Status Error Codes
+

The function ARM_Flash_Uninitialize de-initializes the resources of Flash interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_Flash_PowerControl (ARM_POWER_STATE state)
+
+ +

Control the Flash interface power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_Flash_PowerControl operates the power modes of the Flash interface.

+

The parameter state can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode, then the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_Flash_ReadData (uint32_t addr,
void * data,
uint32_t cnt 
)
+
+ +

Read data from Flash.

+
Parameters
+ + + + +
[in]addrData address.
[out]dataPointer to a buffer storing the data read from Flash.
[in]cntNumber of data items to read.
+
+
+
Returns
number of data items read or Status Error Codes
+

This function ARM_Flash_ReadData reads data from the Flash device.

+

The parameter addr specifies the address from where to read data (needs to be aligned to data type size).
+The parameter data specifies the pointer to a buffer storing the data read. The data type is uint8_t, uint16_t or uint32_t and is specified by the data_width in ARM_FLASH_CAPABILITIES.
+The parameter cnt specifies the number of data items to read.

+

The function executes in the following ways:

+
    +
  • When the operation is non-blocking (typical for SPI Flash) then the function only starts the operation and returns with zero number of data items read. When the operation is completed the ARM_FLASH_EVENT_READY event is generated (if supported and reported by ARM_Flash_GetCapabilities). In case of errors the ARM_FLASH_EVENT_ERROR event is generated at the same time. Progress of the operation can also be monitored by calling the ARM_Flash_GetStatus function and checking the busy flag.
    • +
  • When the operation is blocking (typical for memory mapped Flash) then the function returns after the data is read and returns the number of data items read.
    • +
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_Flash_ProgramData (uint32_t addr,
const void * data,
uint32_t cnt 
)
+
+ +

Program data to Flash.

+
Parameters
+ + + + +
[in]addrData address.
[in]dataPointer to a buffer containing the data to be programmed to Flash.
[in]cntNumber of data items to program.
+
+
+
Returns
number of data items programmed or Status Error Codes
+

This function ARM_Flash_ProgramData programs data to the Flash device.

+

The parameter addr specifies the address to where to program data (needs to be aligned to program_unit specified in ARM_FLASH_INFO).
+The parameter data specifies the pointer to a buffer containing data to be programmed. The data type is uint8_t, uint16_t or uint32_t and is specified by the data_width in ARM_FLASH_CAPABILITIES.
+The parameter cnt specifies the number of data items to program (data size needs to be a multiple of program_unit).

+

The function executes in the following ways:

+
    +
  • When the operation is non-blocking (typically) then the function only starts the operation and returns with zero number of data items programmed. When the operation is completed the ARM_FLASH_EVENT_READY event is generated (if supported and reported by ARM_Flash_GetCapabilities). In case of errors the ARM_FLASH_EVENT_ERROR event is generated at the same time. Progress of the operation can also be monitored by calling the ARM_Flash_GetStatus function and checking the busy flag.
    • +
  • When the operation is blocking then the function returns after the data is programmed and returns the number of data items programmed.
    • +
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_Flash_EraseSector (uint32_t addr)
+
+ +

Erase Flash Sector.

+
Parameters
+ + +
[in]addrSector address
+
+
+
Returns
Status Error Codes
+

This function ARM_Flash_EraseSector erases a flash sector specified by the parameter adr (points to start of the sector).

+

The function is non-blocking and returns as soon as the driver has started the operation. When the operation is completed the ARM_FLASH_EVENT_READY event is generated (if supported and reported by ARM_Flash_GetCapabilities). In case of errors the ARM_FLASH_EVENT_ERROR event is generated at the same time. Progress of the operation can also be monitored by calling the ARM_Flash_GetStatus function and checking the busy flag.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_Flash_EraseChip (void )
+
+ +

Erase complete Flash. Optional function for faster full chip erase.

+
Returns
Status Error Codes
+

The optional function ARM_Flash_EraseChip erases the complete device. If the device does not support global erase or only a portion of the Flash memory space is used for storing files, then the functions returns the error value ARM_DRIVER_ERROR_UNSUPPORTED. The data field eras_chip = 1 of the structure ARM_FLASH_CAPABILITIES encodes that ARM_Flash_EraseChip is supported. The field can be verified with the function ARM_Flash_GetCapabilities.

+

The function is non-blocking and returns as soon as the driver has started the operation. When the operation is completed, the ARM_FLASH_EVENT_READY event is generated (if supported and reported by ARM_Flash_GetCapabilities). In case of errors, the ARM_FLASH_EVENT_ERROR event is generated at the same time. Progress of the operation can also be monitored by calling the ARM_Flash_GetStatus function and checking the busy flag.

+

See also:

+
    +
  • ARM_Flash_SignalEvent
    • +
+ +
+
+ +
+
+ + + + + + + + +
ARM_FLASH_STATUS ARM_Flash_GetStatus (void )
+
+ +

Get Flash status.

+
Returns
Flash status ARM_FLASH_STATUS
+

The function ARM_Flash_GetStatus returns the current Flash interface status stored in the structure ARM_FLASH_STATUS.

+ +
+
+ +
+
+ + + + + + + + +
ARM_FLASH_INFO * ARM_Flash_GetInfo (void )
+
+ +

Get Flash information.

+
Returns
Pointer to Flash information ARM_FLASH_INFO
+

The function ARM_Flash_GetInfo returns information about the Flash device.

+ +
+
+ +
+
+ + + + + + + + +
void ARM_Flash_SignalEvent (uint32_t event)
+
+ +

Signal Flash event.

+
Parameters
+ + +
[in]eventEvent notification mask
+
+
+
Returns
none
+

The function ARM_Flash_SignalEvent is a callback function registered by the function ARM_Flash_Initialize. The function is called automatically after read/program/erase operation completes.

+

The parameter event indicates one or more events that occurred during driver operation. Each event is coded in a separate bit and therefore it is possible to signal multiple events in the event call back function.

+

Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the data fields of the structure ARM_FLASH_CAPABILITIES, which can be retrieved with the function ARM_Flash_GetCapabilities.

+

The following events can be generated:

+ + + + + + + +
Parameter event Bit Description
ARM_FLASH_EVENT_READY 0 Occurs after read/program/erase operation completes.
ARM_FLASH_EVENT_ERROR 1 Occurs together with ARM_FLASH_EVENT_READY when operation completes with errors.
+

See also:

+ + +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__flash__interface__gr.js b/docs/Driver/html/group__flash__interface__gr.js new file mode 100644 index 0000000..749deb7 --- /dev/null +++ b/docs/Driver/html/group__flash__interface__gr.js @@ -0,0 +1,54 @@ +var group__flash__interface__gr = +[ + [ "Flash Events", "group__Flash__events.html", "group__Flash__events" ], + [ "ARM_FLASH_SECTOR", "group__flash__interface__gr.html#structARM__FLASH__SECTOR", [ + [ "start", "group__flash__interface__gr.html#a61eb63d26b2fa6c2971603ceccffb14b", null ], + [ "end", "group__flash__interface__gr.html#a204a3f4fa39b9c007f9784d3e4af4667", null ] + ] ], + [ "ARM_FLASH_INFO", "group__flash__interface__gr.html#structARM__FLASH__INFO", [ + [ "sector_info", "group__flash__interface__gr.html#a8dfb9d5160358e45293bba527762238d", null ], + [ "sector_count", "group__flash__interface__gr.html#a50947f9a42bbaa2d68d6e5079150d7bf", null ], + [ "sector_size", "group__flash__interface__gr.html#a7d37def484362c6e97a2d75144080b1d", null ], + [ "page_size", "group__flash__interface__gr.html#a9dd3e47e968a8f6beb5d88c6d1b7ebe9", null ], + [ "program_unit", "group__flash__interface__gr.html#a483c41066757e2865bf3a27a2a627a54", null ], + [ "erased_value", "group__flash__interface__gr.html#a85c3826bf20669d38e466dfd376994db", null ], + [ "reserved", "group__flash__interface__gr.html#a72aca6ea6d8153b28ea8f139b932ec3e", null ] + ] ], + [ "ARM_DRIVER_FLASH", "group__flash__interface__gr.html#structARM__DRIVER__FLASH", [ + [ "GetVersion", "group__flash__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__flash__interface__gr.html#a25076bd7274af5d3b0af6380ed1f0331", null ], + [ "Initialize", "group__flash__interface__gr.html#a2d1eb2b5c3ee21ba5c92c37e89412567", null ], + [ "Uninitialize", "group__flash__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__flash__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "ReadData", "group__flash__interface__gr.html#adec45569a2f6f0d915a206f8f19107bd", null ], + [ "ProgramData", "group__flash__interface__gr.html#a429fc193f1ec62858219ab8749c563ae", null ], + [ "EraseSector", "group__flash__interface__gr.html#ad9d78f9fe07aabf12b23b95239818b55", null ], + [ "EraseChip", "group__flash__interface__gr.html#ae873705c743d94572fb6500421e15760", null ], + [ "GetStatus", "group__flash__interface__gr.html#afc1db6f33f777784f3c95efc816d4856", null ], + [ "GetInfo", "group__flash__interface__gr.html#ae64d4ee61b7a7ee0b38a0ef2b61f1db2", null ] + ] ], + [ "ARM_FLASH_CAPABILITIES", "group__flash__interface__gr.html#structARM__FLASH__CAPABILITIES", [ + [ "event_ready", "group__flash__interface__gr.html#add296ba516c8fc17ba51e30f2a00f0a9", null ], + [ "data_width", "group__flash__interface__gr.html#a04c173610dd0a545ecae308e342aafb0", null ], + [ "erase_chip", "group__flash__interface__gr.html#af5ec2b569c193fc5024c2739f46b328a", null ], + [ "reserved", "group__flash__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_FLASH_STATUS", "group__flash__interface__gr.html#structARM__FLASH__STATUS", [ + [ "busy", "group__flash__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a", null ], + [ "error", "group__flash__interface__gr.html#aa8d183302fdfa4a6892f1d80300cdb32", null ], + [ "reserved", "group__flash__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_Flash_SignalEvent_t", "group__flash__interface__gr.html#gabeb4ad43b1e6fa4ed956cd5c9371d327", null ], + [ "ARM_Flash_GetVersion", "group__flash__interface__gr.html#ga1cfe24b2ffa571ee50ae544bd922b604", null ], + [ "ARM_Flash_GetCapabilities", "group__flash__interface__gr.html#ga27c23c998032cd47cb47293c0185ee5d", null ], + [ "ARM_Flash_Initialize", "group__flash__interface__gr.html#gaa5b4bbe529d620d4ad4825588a4c4cf0", null ], + [ "ARM_Flash_Uninitialize", "group__flash__interface__gr.html#gae23af293e9f8a67cdb19c7d0d562d415", null ], + [ "ARM_Flash_PowerControl", "group__flash__interface__gr.html#gaa8baa4618ea33568f8b3752afb2ab5a2", null ], + [ "ARM_Flash_ReadData", "group__flash__interface__gr.html#ga223138342383219896ed7e255faeb99a", null ], + [ "ARM_Flash_ProgramData", "group__flash__interface__gr.html#ga947f24ea4042093fdb5605a68ae74f9d", null ], + [ "ARM_Flash_EraseSector", "group__flash__interface__gr.html#ga0b2b4fe5a7be579cf3644995a765ea20", null ], + [ "ARM_Flash_EraseChip", "group__flash__interface__gr.html#ga6cbaebe069d31d56c70b1f8f847e2d55", null ], + [ "ARM_Flash_GetStatus", "group__flash__interface__gr.html#ga06885c0d4587d5a23f97614a8b849ef1", null ], + [ "ARM_Flash_GetInfo", "group__flash__interface__gr.html#gac047b7509356e888502e0424a9d189ae", null ], + [ "ARM_Flash_SignalEvent", "group__flash__interface__gr.html#ga97b75555b5433b268add81f2e60f095a", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__flash__interface__gr_structARM__DRIVER__FLASH.js b/docs/Driver/html/group__flash__interface__gr_structARM__DRIVER__FLASH.js new file mode 100644 index 0000000..125888a --- /dev/null +++ b/docs/Driver/html/group__flash__interface__gr_structARM__DRIVER__FLASH.js @@ -0,0 +1,14 @@ +var group__flash__interface__gr_structARM__DRIVER__FLASH = +[ + [ "GetVersion", "group__flash__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__flash__interface__gr.html#a25076bd7274af5d3b0af6380ed1f0331", null ], + [ "Initialize", "group__flash__interface__gr.html#a2d1eb2b5c3ee21ba5c92c37e89412567", null ], + [ "Uninitialize", "group__flash__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__flash__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "ReadData", "group__flash__interface__gr.html#adec45569a2f6f0d915a206f8f19107bd", null ], + [ "ProgramData", "group__flash__interface__gr.html#a429fc193f1ec62858219ab8749c563ae", null ], + [ "EraseSector", "group__flash__interface__gr.html#ad9d78f9fe07aabf12b23b95239818b55", null ], + [ "EraseChip", "group__flash__interface__gr.html#ae873705c743d94572fb6500421e15760", null ], + [ "GetStatus", "group__flash__interface__gr.html#afc1db6f33f777784f3c95efc816d4856", null ], + [ "GetInfo", "group__flash__interface__gr.html#ae64d4ee61b7a7ee0b38a0ef2b61f1db2", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__CAPABILITIES.js b/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__CAPABILITIES.js new file mode 100644 index 0000000..9270323 --- /dev/null +++ b/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__CAPABILITIES.js @@ -0,0 +1,7 @@ +var group__flash__interface__gr_structARM__FLASH__CAPABILITIES = +[ + [ "event_ready", "group__flash__interface__gr.html#add296ba516c8fc17ba51e30f2a00f0a9", null ], + [ "data_width", "group__flash__interface__gr.html#a04c173610dd0a545ecae308e342aafb0", null ], + [ "erase_chip", "group__flash__interface__gr.html#af5ec2b569c193fc5024c2739f46b328a", null ], + [ "reserved", "group__flash__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__INFO.js b/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__INFO.js new file mode 100644 index 0000000..a35d72c --- /dev/null +++ b/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__INFO.js @@ -0,0 +1,10 @@ +var group__flash__interface__gr_structARM__FLASH__INFO = +[ + [ "sector_info", "group__flash__interface__gr.html#a8dfb9d5160358e45293bba527762238d", null ], + [ "sector_count", "group__flash__interface__gr.html#a50947f9a42bbaa2d68d6e5079150d7bf", null ], + [ "sector_size", "group__flash__interface__gr.html#a7d37def484362c6e97a2d75144080b1d", null ], + [ "page_size", "group__flash__interface__gr.html#a9dd3e47e968a8f6beb5d88c6d1b7ebe9", null ], + [ "program_unit", "group__flash__interface__gr.html#a483c41066757e2865bf3a27a2a627a54", null ], + [ "erased_value", "group__flash__interface__gr.html#a85c3826bf20669d38e466dfd376994db", null ], + [ "reserved", "group__flash__interface__gr.html#a72aca6ea6d8153b28ea8f139b932ec3e", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__SECTOR.js b/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__SECTOR.js new file mode 100644 index 0000000..bc331a1 --- /dev/null +++ b/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__SECTOR.js @@ -0,0 +1,5 @@ +var group__flash__interface__gr_structARM__FLASH__SECTOR = +[ + [ "start", "group__flash__interface__gr.html#a61eb63d26b2fa6c2971603ceccffb14b", null ], + [ "end", "group__flash__interface__gr.html#a204a3f4fa39b9c007f9784d3e4af4667", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__STATUS.js b/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__STATUS.js new file mode 100644 index 0000000..967138e --- /dev/null +++ b/docs/Driver/html/group__flash__interface__gr_structARM__FLASH__STATUS.js @@ -0,0 +1,6 @@ +var group__flash__interface__gr_structARM__FLASH__STATUS = +[ + [ "busy", "group__flash__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a", null ], + [ "error", "group__flash__interface__gr.html#aa8d183302fdfa4a6892f1d80300cdb32", null ], + [ "reserved", "group__flash__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__i2c__address__flags.html b/docs/Driver/html/group__i2c__address__flags.html new file mode 100644 index 0000000..dbd3358 --- /dev/null +++ b/docs/Driver/html/group__i2c__address__flags.html @@ -0,0 +1,181 @@ + + + + + +I2C Address Flags +CMSIS-Driver: I2C Address Flags + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
I2C Address Flags
I2C Interface
+
+
+ +

Specify address flags. +More...

+ + + + + + + + +

+Macros

#define ARM_I2C_ADDRESS_10BIT   (0x0400)
 10-bit address flag More...
 
#define ARM_I2C_ADDRESS_GC   (0x8000)
 General Call flag. More...
 
+

Description

+

Specify address flags.

+

Specifies the address type for the functions ARM_I2C_MasterReceive, ARM_I2C_MasterTransmit and ARM_I2C_OWN_ADDRESS.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_I2C_ADDRESS_10BIT   (0x0400)
+
+ +

10-bit address flag

+
See Also
ARM_I2C_OWN_ADDRESS
+
+ARM_I2C_MasterTransmit
+
+ARM_I2C_MasterReceive
+ +
+
+ +
+
+ + + + +
#define ARM_I2C_ADDRESS_GC   (0x8000)
+
+ +

General Call flag.

+
See Also
ARM_I2C_OWN_ADDRESS
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__i2c__address__flags.js b/docs/Driver/html/group__i2c__address__flags.js new file mode 100644 index 0000000..b47bc88 --- /dev/null +++ b/docs/Driver/html/group__i2c__address__flags.js @@ -0,0 +1,5 @@ +var group__i2c__address__flags = +[ + [ "ARM_I2C_ADDRESS_10BIT", "group__i2c__address__flags.html#ga16be1861b90774bf062feab2dbb829a4", null ], + [ "ARM_I2C_ADDRESS_GC", "group__i2c__address__flags.html#ga337f4f1aa082e9b593b2dcd43c50134e", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__i2c__bus__speed__ctrls.html b/docs/Driver/html/group__i2c__bus__speed__ctrls.html new file mode 100644 index 0000000..0724391 --- /dev/null +++ b/docs/Driver/html/group__i2c__bus__speed__ctrls.html @@ -0,0 +1,212 @@ + + + + + +I2C Bus Speed +CMSIS-Driver: I2C Bus Speed + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
I2C Bus Speed
I2C Control Codes
+
+
+ +

Specify the I2C bus speed. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_I2C_BUS_SPEED_STANDARD   (0x01)
 Standard Speed (100kHz) More...
 
#define ARM_I2C_BUS_SPEED_FAST   (0x02)
 Fast Speed (400kHz) More...
 
#define ARM_I2C_BUS_SPEED_FAST_PLUS   (0x03)
 Fast+ Speed ( 1MHz) More...
 
#define ARM_I2C_BUS_SPEED_HIGH   (0x04)
 High Speed (3.4MHz) More...
 
+

Description

+

Specify the I2C bus speed.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_I2C_BUS_SPEED_STANDARD   (0x01)
+
+ +

Standard Speed (100kHz)

+
See Also
ARM_I2C_Control
+ +
+
+ +
+
+ + + + +
#define ARM_I2C_BUS_SPEED_FAST   (0x02)
+
+ +

Fast Speed (400kHz)

+
See Also
ARM_I2C_Control
+ +
+
+ +
+
+ + + + +
#define ARM_I2C_BUS_SPEED_FAST_PLUS   (0x03)
+
+ +

Fast+ Speed ( 1MHz)

+
See Also
ARM_I2C_Control
+ +
+
+ +
+
+ + + + +
#define ARM_I2C_BUS_SPEED_HIGH   (0x04)
+
+ +

High Speed (3.4MHz)

+
See Also
ARM_I2C_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__i2c__bus__speed__ctrls.js b/docs/Driver/html/group__i2c__bus__speed__ctrls.js new file mode 100644 index 0000000..dde177a --- /dev/null +++ b/docs/Driver/html/group__i2c__bus__speed__ctrls.js @@ -0,0 +1,7 @@ +var group__i2c__bus__speed__ctrls = +[ + [ "ARM_I2C_BUS_SPEED_STANDARD", "group__i2c__bus__speed__ctrls.html#ga0aaa6398280fdd7ad651d7d6d44c863f", null ], + [ "ARM_I2C_BUS_SPEED_FAST", "group__i2c__bus__speed__ctrls.html#ga39f49ef4cd1100a8d9dc9003329e5ecd", null ], + [ "ARM_I2C_BUS_SPEED_FAST_PLUS", "group__i2c__bus__speed__ctrls.html#ga2615262062e0327ab478ec85675ca649", null ], + [ "ARM_I2C_BUS_SPEED_HIGH", "group__i2c__bus__speed__ctrls.html#ga10aae5a8c7fcc90e514c5fb7393056ec", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__i2c__control__codes.html b/docs/Driver/html/group__i2c__control__codes.html new file mode 100644 index 0000000..e000b20 --- /dev/null +++ b/docs/Driver/html/group__i2c__control__codes.html @@ -0,0 +1,213 @@ + + + + + +I2C Control Codes +CMSIS-Driver: I2C Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
I2C Control Codes
I2C Control Codes
+
+
+ +

Specify operation parameters and various controls. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_I2C_OWN_ADDRESS   (0x01)
 Set Own Slave Address; arg = address. More...
 
#define ARM_I2C_BUS_SPEED   (0x02)
 Set Bus Speed; arg = speed. More...
 
#define ARM_I2C_BUS_CLEAR   (0x03)
 Execute Bus clear: send nine clock pulses. More...
 
#define ARM_I2C_ABORT_TRANSFER   (0x04)
 Abort Master/Slave Transmit/Receive. More...
 
+

Description

+

Specify operation parameters and various controls.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_I2C_OWN_ADDRESS   (0x01)
+
+ +

Set Own Slave Address; arg = address.

+
See Also
ARM_I2C_Control
+ +
+
+ +
+
+ + + + +
#define ARM_I2C_BUS_SPEED   (0x02)
+
+ +

Set Bus Speed; arg = speed.

+

Speed is specified using the following values: I2C Bus Speed

+
See Also
ARM_I2C_Control
+ +
+
+ +
+
+ + + + +
#define ARM_I2C_BUS_CLEAR   (0x03)
+
+ +

Execute Bus clear: send nine clock pulses.

+
See Also
ARM_I2C_Control
+ +
+
+ +
+
+ + + + +
#define ARM_I2C_ABORT_TRANSFER   (0x04)
+
+ +

Abort Master/Slave Transmit/Receive.

+
See Also
ARM_I2C_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__i2c__control__codes.js b/docs/Driver/html/group__i2c__control__codes.js new file mode 100644 index 0000000..7a852aa --- /dev/null +++ b/docs/Driver/html/group__i2c__control__codes.js @@ -0,0 +1,7 @@ +var group__i2c__control__codes = +[ + [ "ARM_I2C_OWN_ADDRESS", "group__i2c__control__codes.html#ga69d130b9f8aa34d6df5334ab67c74307", null ], + [ "ARM_I2C_BUS_SPEED", "group__i2c__control__codes.html#ga35733133237d65146abd9449f5353a7f", null ], + [ "ARM_I2C_BUS_CLEAR", "group__i2c__control__codes.html#gadacf04578770faca4b3eaae34b2c5f03", null ], + [ "ARM_I2C_ABORT_TRANSFER", "group__i2c__control__codes.html#ga661e91aaa642d10ba80e3cc72f263040", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__i2c__control__gr.html b/docs/Driver/html/group__i2c__control__gr.html new file mode 100644 index 0000000..97229d9 --- /dev/null +++ b/docs/Driver/html/group__i2c__control__gr.html @@ -0,0 +1,151 @@ + + + + + +I2C Control Codes +CMSIS-Driver: I2C Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
I2C Control Codes
I2C Interface
+
+
+ +

Many parameters of the I2C driver are configured using the ARM_I2C_Control function. +More...

+ + + + + + + + +

+Content

 I2C Control Codes
 Specify operation parameters and various controls.
 
 I2C Bus Speed
 Specify the I2C bus speed.
 
+

Description

+

Many parameters of the I2C driver are configured using the ARM_I2C_Control function.

+

The various I2C control codes define:

+ +

Refer to the ARM_I2C_Control function for further details.

+
+
+ + + + diff --git a/docs/Driver/html/group__i2c__control__gr.js b/docs/Driver/html/group__i2c__control__gr.js new file mode 100644 index 0000000..035cd69 --- /dev/null +++ b/docs/Driver/html/group__i2c__control__gr.js @@ -0,0 +1,5 @@ +var group__i2c__control__gr = +[ + [ "I2C Control Codes", "group__i2c__control__codes.html", "group__i2c__control__codes" ], + [ "I2C Bus Speed", "group__i2c__bus__speed__ctrls.html", "group__i2c__bus__speed__ctrls" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__i2c__interface__gr.html b/docs/Driver/html/group__i2c__interface__gr.html new file mode 100644 index 0000000..53b75ba --- /dev/null +++ b/docs/Driver/html/group__i2c__interface__gr.html @@ -0,0 +1,1366 @@ + + + + + +I2C Interface +CMSIS-Driver: I2C Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
I2C Interface
+
+
+ +

Driver API for I2C Bus Peripheral (Driver_I2C.h) +More...

+ + + + + + + + + + + +

+Content

 I2C Events
 The I2C driver generates call back events that are notified via the function ARM_I2C_SignalEvent.
 
 I2C Control Codes
 Many parameters of the I2C driver are configured using the ARM_I2C_Control function.
 
 I2C Address Flags
 Specify address flags.
 
+ + + + + + + + + + +

+Data Structures

struct  ARM_DRIVER_I2C
 Access structure of the I2C Driver. More...
 
struct  ARM_I2C_CAPABILITIES
 I2C Driver Capabilities. More...
 
struct  ARM_I2C_STATUS
 I2C Status. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_I2C_SignalEvent_t )(uint32_t event)
 Pointer to ARM_I2C_SignalEvent : Signal I2C Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_I2C_GetVersion (void)
 Get driver version. More...
 
ARM_I2C_CAPABILITIES ARM_I2C_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_I2C_Initialize (ARM_I2C_SignalEvent_t cb_event)
 Initialize I2C Interface. More...
 
int32_t ARM_I2C_Uninitialize (void)
 De-initialize I2C Interface. More...
 
int32_t ARM_I2C_PowerControl (ARM_POWER_STATE state)
 Control I2C Interface Power. More...
 
int32_t ARM_I2C_MasterTransmit (uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
 Start transmitting data as I2C Master. More...
 
int32_t ARM_I2C_MasterReceive (uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
 Start receiving data as I2C Master. More...
 
int32_t ARM_I2C_SlaveTransmit (const uint8_t *data, uint32_t num)
 Start transmitting data as I2C Slave. More...
 
int32_t ARM_I2C_SlaveReceive (uint8_t *data, uint32_t num)
 Start receiving data as I2C Slave. More...
 
int32_t ARM_I2C_GetDataCount (void)
 Get transferred data count. More...
 
int32_t ARM_I2C_Control (uint32_t control, uint32_t arg)
 Control I2C Interface. More...
 
ARM_I2C_STATUS ARM_I2C_GetStatus (void)
 Get I2C status. More...
 
void ARM_I2C_SignalEvent (uint32_t event)
 Signal I2C Events. More...
 
+

Description

+

Driver API for I2C Bus Peripheral (Driver_I2C.h)

+

I2C (Inter-Integrated Circuit, referred to as I-squared-C, I-two-C, or IIC) is a multi-master serial single-ended bus and is mostly used on single boards, but can also connect to components which are linked via cable.

+

Most significant features of the I2C bus include:

+
    +
  • Only two bus lines are required
    • +
  • I2C is a true multi-master bus. Simple master/slave relationships exist between all components
    • +
  • A baud rate is not required; the master device determines a bus clock
    • +
  • Each connected device is addressable by a unique address
    • +
  • Providing arbitration and collision detection
    • +
+

For more information about I2C refer to the following web pages:

+ +

Devices can operation in Master or Slave mode:

+ +

I2C Slave Address

+

Depending on the device, I2C supports 7-bit and 10-bit Slaves addresses. The element address_10_bit in ARM_I2C_CAPABILITIES indicates that the driver is able to handle 10-bit addresses. A 10-bit Slave address is ORed with ARM_I2C_ADDRESS_10BIT.

+

I2C also supports a General Call to all Slaves by using the slave address value 0. A General Call is recognized by Slaves have a slave address value ARM_I2C_ADDRESS_GC registered with the function ARM_I2C_Control.

+

Block Diagram

+

The I2C driver allows you to connect low-speed peripherals to a motherboard, embedded system, cellphone, or other electronic device.

+
+I2C_BlockDiagram.png +
+Master/Slave connected via I2C interface
+

I2C API

+

The following header files define the Application Programming Interface (API) for the I2C interface:

+
    +
  • Driver_I2C.h : Driver API for I2C Bus Peripheral
    • +
+

The driver implementation is a typical part of the Device Family Pack (DFP) that supports the peripherals of the microcontroller family.

+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +

Example Code

+

The following example code shows the usage of the I2C interface in Master mode.

+
#include "Driver_I2C.h"
+
+
#define EEPROM_I2C_ADDR 0x51 /* EEPROM I2C address */
+
+
/* I2C driver instance */
+
extern ARM_DRIVER_I2C Driver_I2C0;
+
static ARM_DRIVER_I2C *I2Cdrv = &Driver_I2C0;
+
+
static volatile uint32_t I2C_Event;
+
+
/* I2C Signal Event function callback */
+
void I2C_SignalEvent (uint32_t event) {
+
+
/* Save received events */
+
I2C_Event |= event;
+
+
/* Optionally, user can define specific actions for an event */
+
+
if (event & ARM_I2C_EVENT_TRANSFER_INCOMPLETE) {
+
/* Less data was transferred than requested */
+
}
+
+
if (event & ARM_I2C_EVENT_TRANSFER_DONE) {
+
/* Transfer or receive is finished */
+
}
+
+
if (event & ARM_I2C_EVENT_ADDRESS_NACK) {
+
/* Slave address was not acknowledged */
+
}
+
+
if (event & ARM_I2C_EVENT_ARBITRATION_LOST) {
+
/* Master lost bus arbitration */
+
}
+
+
if (event & ARM_I2C_EVENT_BUS_ERROR) {
+
/* Invalid start/stop position detected */
+
}
+
+
if (event & ARM_I2C_EVENT_BUS_CLEAR) {
+
/* Bus clear operation completed */
+
}
+
+
if (event & ARM_I2C_EVENT_GENERAL_CALL) {
+
/* Slave was addressed with a general call address */
+
}
+
+
if (event & ARM_I2C_EVENT_SLAVE_RECEIVE) {
+
/* Slave addressed as receiver but SlaveReceive operation is not started */
+
}
+
+
if (event & ARM_I2C_EVENT_SLAVE_TRANSMIT) {
+
/* Slave addressed as transmitter but SlaveTransmit operation is not started */
+
}
+
}
+
+
/* Read I2C connected EEPROM (event driven example) */
+
int32_t EEPROM_Read_Event (uint16_t addr, uint8_t *buf, uint32_t len) {
+
uint8_t a[2];
+
+
a[0] = (uint8_t)(addr >> 8);
+
a[1] = (uint8_t)(addr & 0xFF);
+
+
/* Clear event flags before new transfer */
+
I2C_Event = 0U;
+
+
I2Cdrv->MasterTransmit (EEPROM_I2C_ADDR, a, 2, true);
+
+
/* Wait until transfer completed */
+
while ((I2C_Event & ARM_I2C_EVENT_TRANSFER_DONE) == 0U);
+
/* Check if all data transferred */
+
if ((I2C_Event & ARM_I2C_EVENT_TRANSFER_INCOMPLETE) != 0U) return -1;
+
+
/* Clear event flags before new transfer */
+
I2C_Event = 0U;
+
+
I2Cdrv->MasterReceive (EEPROM_I2C_ADDR, buf, len, false);
+
+
/* Wait until transfer completed */
+
while ((I2C_Event & ARM_I2C_EVENT_TRANSFER_DONE) == 0U);
+
/* Check if all data transferred */
+
if ((I2C_Event & ARM_I2C_EVENT_TRANSFER_INCOMPLETE) != 0U) return -1;
+
+
return 0;
+
}
+
+
/* Read I2C connected EEPROM (pooling example) */
+
int32_t EEPROM_Read_Pool (uint16_t addr, uint8_t *buf, uint32_t len) {
+
uint8_t a[2];
+
+
a[0] = (uint8_t)(addr >> 8);
+
a[1] = (uint8_t)(addr & 0xFF);
+
+
I2Cdrv->MasterTransmit (EEPROM_I2C_ADDR, a, 2, true);
+
+
/* Wait until transfer completed */
+
while (I2Cdrv->GetStatus().busy);
+
/* Check if all data transferred */
+
if (I2Cdrv->GetDataCount () != len) return -1;
+
+
I2Cdrv->MasterReceive (EEPROM_I2C_ADDR, buf, len, false);
+
+
/* Wait until transfer completed */
+
while (I2Cdrv->GetStatus().busy);
+
/* Check if all data transferred */
+
if (I2Cdrv->GetDataCount () != len) return -1;
+
+
return 0;
+
}
+
+
/* Initialize I2C connected EEPROM */
+
int32_t EEPROM_Initialize (bool pooling) {
+
int32_t status;
+
uint8_t val;
+
+
if (pooling == true) {
+
I2Cdrv->Initialize (NULL);
+
} else {
+
I2Cdrv->Initialize (I2C_SignalEvent);
+
}
+
I2Cdrv->PowerControl (ARM_POWER_FULL);
+
I2Cdrv->Control (ARM_I2C_BUS_SPEED, ARM_I2C_BUS_SPEED_FAST);
+
I2Cdrv->Control (ARM_I2C_BUS_CLEAR, 0);
+
+
/* Check if EEPROM can be accessed */
+
if (pooling == true) {
+
status = EEPROM_Read_Pool (0x00, &val, 1);
+
} else {
+
status = EEPROM_Read_Event (0x00, &val, 1);
+
}
+
+
return (status);
+
}
+

The following example code shows the usage of the I2C interface in Slave mode.

+
#include "Driver_I2C.h"
+
+
/* I2C driver instance */
+
extern ARM_DRIVER_I2C Driver_I2C0;
+
static ARM_DRIVER_I2C *I2Cdrv = &Driver_I2C0;
+
+
static volatile uint32_t I2C_Event;
+
+
/* I2C Signal Event function callback */
+
static void I2C_SignalEvent (uint32_t event) {
+
I2C_Event |= event;
+
}
+
+
int main (void) {
+
uint8_t cnt = 0;
+
+
/* Initialize I2C peripheral */
+
I2Cdrv->Initialize(I2C_SignalEvent);
+
+
/* Power-on I2C peripheral */
+
I2Cdrv->PowerControl(ARM_POWER_FULL);
+
+
/* Configure I2C bus */
+
I2Cdrv->Control(ARM_I2C_OWN_ADDRESS, 0x78);
+
+
I2C_Event = 0;
+
+
while (1) {
+
/* Receive chunk */
+
I2Cdrv->SlaveReceive(&cnt, 1);
+
while ((I2C_Event & ARM_I2C_EVENT_TRANSFER_DONE) == 0);
+
/* Clear transfer done flag */
+
I2C_Event &= ~ARM_I2C_EVENT_TRANSFER_DONE;
+
+
/* Transmit chunk back */
+
I2Cdrv->SlaveTransmit(&cnt, 1);
+
while ((I2C_Event & ARM_I2C_EVENT_TRANSFER_DONE) == 0);
+
/* Clear transfer done flag */
+
I2C_Event &= ~ARM_I2C_EVENT_TRANSFER_DONE;
+
}
+
}
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_I2C
+
+

Access structure of the I2C Driver.

+

The functions of the I2C interface are accessed by function pointers exposed by this structure. Refer to Common Driver Functions for overview information.

+

Each instance of an I2C provides such an access structure. The instance is indicated by a postfix in the symbol name of the access structure, for example:

+
    +
  • Driver_I2C0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_I2C1 is the name of the access struct of the second instance (no. 1).
    • +
+

A configuration setting in the middleware allows connecting the middleware to a specific driver instance Driver_I2Cn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_I2C_GetVersion : Get driver version. More...
 
ARM_I2C_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_I2C_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_I2C_SignalEvent_t cb_event)
 Pointer to ARM_I2C_Initialize : Initialize I2C Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_I2C_Uninitialize : De-initialize I2C Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_I2C_PowerControl : Control I2C Interface Power. More...
 
int32_t(* MasterTransmit )(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
 Pointer to ARM_I2C_MasterTransmit : Start transmitting data as I2C Master. More...
 
int32_t(* MasterReceive )(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
 Pointer to ARM_I2C_MasterReceive : Start receiving data as I2C Master. More...
 
int32_t(* SlaveTransmit )(const uint8_t *data, uint32_t num)
 Pointer to ARM_I2C_SlaveTransmit : Start transmitting data as I2C Slave. More...
 
int32_t(* SlaveReceive )(uint8_t *data, uint32_t num)
 Pointer to ARM_I2C_SlaveReceive : Start receiving data as I2C Slave. More...
 
int32_t(* GetDataCount )(void)
 Pointer to ARM_I2C_GetDataCount : Get transferred data count. More...
 
int32_t(* Control )(uint32_t control, uint32_t arg)
 Pointer to ARM_I2C_Control : Control I2C Interface. More...
 
ARM_I2C_STATUS(* GetStatus )(void)
 Pointer to ARM_I2C_GetStatus : Get I2C status. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_I2C_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_I2C_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_I2C_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_I2C_SignalEvent_t cb_event)
+
+ +

Pointer to ARM_I2C_Initialize : Initialize I2C Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_I2C_Uninitialize : De-initialize I2C Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_I2C_PowerControl : Control I2C Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* MasterTransmit)(uint32_t addr, const uint8_t *data, uint32_t num, bool xfer_pending)
+
+ +

Pointer to ARM_I2C_MasterTransmit : Start transmitting data as I2C Master.

+ +
+
+ +
+
+ + + + +
int32_t(* MasterReceive)(uint32_t addr, uint8_t *data, uint32_t num, bool xfer_pending)
+
+ +

Pointer to ARM_I2C_MasterReceive : Start receiving data as I2C Master.

+ +
+
+ +
+
+ + + + +
int32_t(* SlaveTransmit)(const uint8_t *data, uint32_t num)
+
+ +

Pointer to ARM_I2C_SlaveTransmit : Start transmitting data as I2C Slave.

+ +
+
+ +
+
+ + + + +
int32_t(* SlaveReceive)(uint8_t *data, uint32_t num)
+
+ +

Pointer to ARM_I2C_SlaveReceive : Start receiving data as I2C Slave.

+ +
+
+ +
+
+ + + + +
int32_t(* GetDataCount)(void)
+
+ +

Pointer to ARM_I2C_GetDataCount : Get transferred data count.

+ +
+
+ +
+
+ + + + +
int32_t(* Control)(uint32_t control, uint32_t arg)
+
+ +

Pointer to ARM_I2C_Control : Control I2C Interface.

+ +
+
+ +
+
+ + + + +
ARM_I2C_STATUS(* GetStatus)(void)
+
+ +

Pointer to ARM_I2C_GetStatus : Get I2C status.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_I2C_CAPABILITIES
+
+

I2C Driver Capabilities.

+

An I2C driver can be implemented with different capabilities. The data fields of this struct encode the capabilities implemented by this driver.

+

The element address_10_bit indicates that the driver is able to handle 10-bit addressing natively. User can still emulate the 10-bit addressing in software if the driver does not support it.

+

Returned by:

+ +
+ + + + + + + +
Data Fields
+uint32_t +address_10_bit: 1 +supports 10-bit addressing
+uint32_t +reserved: 31 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_I2C_STATUS
+
+

I2C Status.

+

Structure with information about the status of the I2C.

+

The flag busy indicates that the driver is busy executing Master/Slave Transmit/Receive operation.

+

It is set:

+ +

It is cleared when Master/Slave operation has finished.

+

The flag mode indicates the current mode which is Master when Master Transmit/Receive is active or Slave otherwise.

+

The flag direction indicates either Transmitter or Receiver mode. It is updated during Master/Slave operation when the Slave is addressed by a Master.

+

The flag general_call indicates a General call (address 0) when in Slave mode.

+

The flag arbitration_lost indicates that the Master has lost arbitration. The current Master operation is aborted.

+

The flag bus_error indicates that a bus error has been detected. The current Master/Slave operation is aborted.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +busy: 1 +Busy flag.
+uint32_t +mode: 1 +Mode: 0=Slave, 1=Master.
+uint32_t +direction: 1 +Direction: 0=Transmitter, 1=Receiver.
+uint32_t +general_call: 1 +General Call indication (cleared on start of next Slave operation)
+uint32_t +arbitration_lost: 1 +Master lost arbitration (cleared on start of next Master operation)
+uint32_t +bus_error: 1 +Bus error detected (cleared on start of next Master/Slave operation)
+uint32_t +reserved: 26 +
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_I2C_SignalEvent_t
+
+ +

Pointer to ARM_I2C_SignalEvent : Signal I2C Event.

+

Provides the typedef for the callback function ARM_I2C_SignalEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_I2C_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_I2C_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_I2C Driver_I2C0;
+
ARM_DRIVER_I2C *drv_info;
+
+
void setup_i2c (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_I2C0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_I2C_CAPABILITIES ARM_I2C_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_I2C_CAPABILITIES
+

The function ARM_I2C_GetCapabilities returns information about capabilities of this driver implementation. The data fields of the struct ARM_I2C_CAPABILITIES encodes the driver capabilities.

+

Example:

+
extern ARM_DRIVER_I2C Driver_I2C0;
+
ARM_DRIVER_I2C *drv_info;
+
+
void read_capabilities (void) {
+
ARM_I2C_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_I2C0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_I2C_Initialize (ARM_I2C_SignalEvent_t cb_event)
+
+ +

Initialize I2C Interface.

+
Parameters
+ + +
[in]cb_eventPointer to ARM_I2C_SignalEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_I2C_Initialize initializes the I2C interface. It is called when the middleware component starts operation.

+

The function performs the following operations:

+
    +
  • Initializes and the I/O resources for the I2C interface.
    • +
  • Registers the ARM_I2C_SignalEvent callback function.
    • +
+

The parameter cb_event is a pointer to the ARM_I2C_SignalEvent callback function. Use a NULL pointer when no callback events are required.

+

Can be called multiple times. If the peripheral is already initialized the function performs no operation and returns with ARM_DRIVER_OK. Refer to Function Call Sequence for more information.

+
See Also
ARM_I2C_PowerControl
+
+ARM_I2C_Uninitialize
+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_I2C_Uninitialize (void )
+
+ +

De-initialize I2C Interface.

+
Returns
Status Error Codes
+

The function ARM_I2C_Uninitialize releases the I/O resources of I2C interface.

+

It is called when the middleware component stops operation and releases the I/O resources used by the I2C interface. Refer to Function Call Sequence for more information.

+
See Also
ARM_I2C_Initialize
+
+ARM_I2C_PowerControl
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_I2C_PowerControl (ARM_POWER_STATE state)
+
+ +

Control I2C Interface Power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_I2C_PowerControl operates the power modes of the I2C interface.

+

The parameter state can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode, then the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+
See Also
ARM_I2C_Initialize
+
+ARM_I2C_Uninitialize
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_I2C_MasterTransmit (uint32_t addr,
const uint8_t * data,
uint32_t num,
bool xfer_pending 
)
+
+ +

Start transmitting data as I2C Master.

+
Parameters
+ + + + + +
[in]addrSlave address (7-bit or 10-bit)
[in]dataPointer to buffer with data to transmit to I2C Slave
[in]numNumber of data bytes to transmit
[in]xfer_pendingTransfer operation is pending - Stop condition will not be generated
+
+
+
Returns
Status Error Codes
+

This function ARM_I2C_MasterTransmit transmits data as Master to the selected Slave.

+

The operation consists of:

+
    +
  • Master generates START condition
    • +
  • Master addresses the Slave as Master Transmitter
    • +
  • Master transmits data to the addressed Slave
    • +
  • Master generates STOP condition (if xfer_pending is "false")
    • +
+

The parameter addr is the address of the slave to transmit the data to. The value can be ORed with ARM_I2C_ADDRESS_10BIT to identify a 10-bit address value.
+The parameter data and num specify the address of a data buffer and the number of bytes to transmit.
+Set the parameter xfer_pending to 'true' if another transfer operation follows. With xfer_pending set to 'false' a STOP condition is generated.

+

The function is non-blocking and returns as soon as the driver has started the operation. During the operation it is not allowed to call any Master function again. Also the data buffer must stay allocated and the contents of data must not be modified. When transmit operation has finished the ARM_I2C_EVENT_TRANSFER_DONE event is generated. When not all the data is transferred then the ARM_I2C_EVENT_TRANSFER_INCOMPLETE flag is set at the same time.

+

Number of data bytes transmitted and acknowledged is returned by the function ARM_I2C_GetDataCount during and after the operation has finished.

+

The operation is aborted in the following cases (ARM_I2C_EVENT_TRANSFER_DONE event is generated together with):

+ +

Status can be monitored by calling the ARM_I2C_GetStatus and checking the flags.

+

Transmit operation can be aborted also by calling ARM_I2C_Control with the parameter control ARM_I2C_ABORT_TRANSFER.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_I2C_MasterReceive (uint32_t addr,
uint8_t * data,
uint32_t num,
bool xfer_pending 
)
+
+ +

Start receiving data as I2C Master.

+
Parameters
+ + + + + +
[in]addrSlave address (7-bit or 10-bit)
[out]dataPointer to buffer for data to receive from I2C Slave
[in]numNumber of data bytes to receive
[in]xfer_pendingTransfer operation is pending - Stop condition will not be generated
+
+
+
Returns
Status Error Codes
+

This function ARM_I2C_MasterReceive is used to receive data as Master from the selected Slave.

+

The operation consists of:

+
    +
  • Master generates START condition
    • +
  • Master addresses the Slave as Master Receiver
    • +
  • Master receives data from the addressed Slave
    • +
  • Master generates STOP condition (if xfer_pending is "false")
    • +
+

The parameter addr is the address of the slave to receive the data from. The value can be ORed with ARM_I2C_ADDRESS_10BIT to identify a 10-bit address value.
+The parameter data and num specify the address of a data buffer and the number of bytes to receive.
+Set the parameter xfer_pending to 'true' if another transfer operation follows. With xfer_pending set to 'false' a STOP condition is generated.

+

The function is non-blocking and returns as soon as the driver has started the operation. During the operation it is not allowed to call any Master function again. Also the data buffer must stay allocated. When receive operation has finished the ARM_I2C_EVENT_TRANSFER_DONE event is generated. When not all the data is transferred then the ARM_I2C_EVENT_TRANSFER_INCOMPLETE flag is set at the same time.

+

Number of data bytes received is returned by the function ARM_I2C_GetDataCount during and after the operation has finished.

+

The operation is aborted in the following cases (ARM_I2C_EVENT_TRANSFER_DONE event is generated together with):

+ +

Status can be monitored by calling the ARM_I2C_GetStatus and checking the flags.

+

Receive operation can be aborted also by calling ARM_I2C_Control with the parameter control = ARM_I2C_ABORT_TRANSFER.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_I2C_SlaveTransmit (const uint8_t * data,
uint32_t num 
)
+
+ +

Start transmitting data as I2C Slave.

+
Parameters
+ + + +
[in]dataPointer to buffer with data to transmit to I2C Master
[in]numNumber of data bytes to transmit
+
+
+
Returns
Status Error Codes
+

This function ARM_I2C_SlaveTransmit is used to transmit data as Slave to the Master.

+

The parameter data is a pointer to the data to transmit.
+The parameter num specifies the number of bytes to transmit.

+

The function is non-blocking and returns as soon as the driver has registered the operation. The actual operation will start after being addressed by the master as a Slave Transmitter. If the operation has not been registered at that point the ARM_I2C_EVENT_SLAVE_TRANSMIT event is generated. The same event is also generated if the operation has finished (specified number of bytes transmitted) but more data is requested by the master.

+

It is not allowed to call this function again if the operation has started until it finishes. Also the data buffer must stay allocated and the contents of data must not be modified. When transmit operation has finished the ARM_I2C_EVENT_TRANSFER_DONE event is generated. When not all the data is transferred then the ARM_I2C_EVENT_TRANSFER_INCOMPLETE flag is set at the same time.

+

Number of data bytes transmitted is returned by the function ARM_I2C_GetDataCount during and after the operation has finished.

+

In case that a General call has been detected the ARM_I2C_EVENT_GENERAL_CALL flag is indicated together with the ARM_I2C_EVENT_TRANSFER_DONE event (also with ARM_I2C_EVENT_SLAVE_TRANSMIT event).

+

In case that bus error has been detected then the operation is aborted and the ARM_I2C_EVENT_BUS_ERROR event is generated together with ARM_I2C_EVENT_TRANSFER_DONE.

+

Slave will only respond to its own address (or General call if enabled) that is specified by calling ARM_I2C_Control with ARM_I2C_OWN_ADDRESS as control parameter. Using address 0 disables the slave.

+

Status can be monitored by calling the ARM_I2C_GetStatus and checking the flags.

+

Transmit operation can be canceled or aborted by calling ARM_I2C_Control with the parameter control = ARM_I2C_ABORT_TRANSFER.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_I2C_SlaveReceive (uint8_t * data,
uint32_t num 
)
+
+ +

Start receiving data as I2C Slave.

+
Parameters
+ + + +
[out]dataPointer to buffer for data to receive from I2C Master
[in]numNumber of data bytes to receive
+
+
+
Returns
Status Error Codes
+

This function ARM_I2C_SlaveReceive receives data as Slave from the Master.

+

The parameter data is a pointer to the data to receive.
+The parameter num specifies the number of bytes to receive.

+

The function is non-blocking and returns as soon as the driver has registered the operation. The actual operation will start after being addressed by the master as a Slave Receiver. If the operation has not been registered at that point the ARM_I2C_EVENT_SLAVE_RECEIVE event is generated.

+

It is not allowed to call this function again if the operation has started until it finishes. Also the data buffer must stay allocated. When receive operation has finished the ARM_I2C_EVENT_TRANSFER_DONE event is generated. When not all the data is transferred then the ARM_I2C_EVENT_TRANSFER_INCOMPLETE flag is set at the same time.

+

Number of data bytes received and acknowledged is returned by the function ARM_I2C_GetDataCount during and after the operation has finished.

+

In case that a General call has been detected the ARM_I2C_EVENT_GENERAL_CALL flag is indicated together with the ARM_I2C_EVENT_TRANSFER_DONE event (also with ARM_I2C_EVENT_SLAVE_RECEIVE event).

+

In case that bus error has been detected then the operation is aborted and the ARM_I2C_EVENT_BUS_ERROR event is generated together with ARM_I2C_EVENT_TRANSFER_DONE.

+

Slave will only respond to its own address (or General call if enabled) that is specified by calling ARM_I2C_Control with ARM_I2C_OWN_ADDRESS as control parameter. Using address 0 disables the slave.

+

Status can be monitored by calling the ARM_I2C_GetStatus and checking the flags.

+

Receive operation can be canceled or aborted by calling ARM_I2C_Control with the parameter control = ARM_I2C_ABORT_TRANSFER.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_I2C_GetDataCount (void )
+
+ +

Get transferred data count.

+
Returns
number of data bytes transferred; -1 when Slave is not addressed by Master
+

The function ARM_I2C_GetDataCount returns the number of currently transferred data bytes during and after:

+ +

When the Slave is not yet addressed by the Master then -1 is returned.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_I2C_Control (uint32_t control,
uint32_t arg 
)
+
+ +

Control I2C Interface.

+
Parameters
+ + + +
[in]controlOperation
[in]argArgument of operation (optional)
+
+
+
Returns
Status Error Codes
+

The function ARM_I2C_Control operates the I2C interface and executes various operations.

+

The parameter control specifies various operations as listed in the table below.
+The parameter arg provides, depending on the operation, additional information.
+

+ + + + + + + + + + + +
Parameter control Operation
ARM_I2C_OWN_ADDRESS Set Own Slave Address; arg = slave address
ARM_I2C_BUS_SPEED Set Bus Speed; arg = bus speed
ARM_I2C_BUS_CLEAR Clear the bus by sending nine clock pulses
ARM_I2C_ABORT_TRANSFER Aborts the data transfer between Master and Slave for Transmit or Receive
+

Set Own Slave Address

+

After initialization, the I2C Device has no slave address assigned and does not accept any requests from an I2C Master.

+

The control operation ARM_I2C_OWN_ADDRESS sets the slave address with the parameter arg. The slave address can be ORed with ARM_I2C_ADDRESS_10BIT to indicate a 10-bit address.

+

The slave address can be ORed with ARM_I2C_ADDRESS_GC to indicate that the slave accepts a General Call. If the slave address value is only ARM_I2C_ADDRESS_GC, then the slave only accepts a General Call.

+

The slave address value 0 disables Slave mode and clears any assigned slave address.

+

Examples:**

+

Set the Slave address value 0x45 as 7-bit address.

+
I2Cdrv->Control (ARM_I2C_OWN_ADDRESS, 0x45);
+

Set the Slave address value 0x135 as 10-bit address and accept a General Call.

+
I2Cdrv->Control (ARM_I2C_OWN_ADDRESS, 0x135 | ARM_I2C_ADDRESS_10BIT | ARM_I2C_ADDRESS_GC);
+

Bus Speed

+

The control operation ARM_I2C_BUS_SPEED sets the bus speed using the parameter arg.

+ + + + + + + + + + + +
Parameter arg Bus Speed
ARM_I2C_BUS_SPEED_STANDARD Standard Speed to (100 kHz)
ARM_I2C_BUS_SPEED_FAST Fast Speed (400kHz)
ARM_I2C_BUS_SPEED_FAST_PLUS Fast + Speed (1MHz)
ARM_I2C_BUS_SPEED_HIGH High Speed (3.4MHz)
+

Example:**

+
I2Cdrv->Control (ARM_I2C_BUS_SPEED, I2C_BUS_SPEED_FAST);
+
+
+
+ +
+
+ + + + + + + + +
ARM_I2C_STATUS ARM_I2C_GetStatus (void )
+
+ +

Get I2C status.

+
Returns
I2C status ARM_I2C_STATUS
+

The function ARM_I2C_GetStatus returns the current I2C interface status.

+

Refer to ARM_I2C_STATUS for details.

+ +
+
+ +
+
+ + + + + + + + +
void ARM_I2C_SignalEvent (uint32_t event)
+
+ +

Signal I2C Events.

+
Parameters
+ + +
[in]eventI2C Events notification mask
+
+
+

The function ARM_I2C_SignalEvent is a callback function registered by the function ARM_I2C_Initialize.. It is called by the I2C driver to notify the application about I2C Events occured during operation.

+

The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

The following events can be generated:

+ + + + + + + + + + + + + + + + + + + + + +
Parameter event Bit Description
ARM_I2C_EVENT_TRANSFER_DONE 1UL << 0 Occurs after Master/Slave Transmit/Receive operation has finished.
ARM_I2C_EVENT_TRANSFER_INCOMPLETE 1UL << 1 Occurs together with ARM_I2C_EVENT_TRANSFER_DONE when less data is transferred then requested.
ARM_I2C_EVENT_SLAVE_TRANSMIT 1UL << 2 Occurs when addressed as Slave Transmitter and ARM_I2C_SlaveTransmit has not been started.
ARM_I2C_EVENT_SLAVE_RECEIVE 1UL << 3 Occurs when addressed as Slave Receiver and ARM_I2C_SlaveReceive has not been started.
ARM_I2C_EVENT_ADDRESS_NACK 1UL << 4 Occurs in master mode when address is not acknowledged from slave.
ARM_I2C_EVENT_GENERAL_CALL 1UL << 5 Indicates General Call in slave mode together with ARM_I2C_EVENT_TRANSFER_DONE, ARM_I2C_EVENT_SLAVE_TRANSMIT and ARM_I2C_EVENT_SLAVE_RECEIVE.
ARM_I2C_EVENT_ARBITRATION_LOST 1UL << 6 Occurs in master mode when arbitration is lost.
ARM_I2C_EVENT_BUS_ERROR 1UL << 7 Occurs when bus error is detected.
ARM_I2C_EVENT_BUS_CLEAR 1UL << 8 Occurs after ARM_I2C_BUS_CLEAR Control operation has finished.
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__i2c__interface__gr.js b/docs/Driver/html/group__i2c__interface__gr.js new file mode 100644 index 0000000..2bab577 --- /dev/null +++ b/docs/Driver/html/group__i2c__interface__gr.js @@ -0,0 +1,47 @@ +var group__i2c__interface__gr = +[ + [ "I2C Events", "group__I2C__events.html", "group__I2C__events" ], + [ "I2C Control Codes", "group__i2c__control__gr.html", "group__i2c__control__gr" ], + [ "I2C Address Flags", "group__i2c__address__flags.html", "group__i2c__address__flags" ], + [ "ARM_DRIVER_I2C", "group__i2c__interface__gr.html#structARM__DRIVER__I2C", [ + [ "GetVersion", "group__i2c__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__i2c__interface__gr.html#a5dfa74ca82e0af995d43da61e08c3103", null ], + [ "Initialize", "group__i2c__interface__gr.html#ab0480980f67e0ebe0461ccea7873a65b", null ], + [ "Uninitialize", "group__i2c__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__i2c__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "MasterTransmit", "group__i2c__interface__gr.html#a9e58f7ea5fd9476e06b45c70b6696b95", null ], + [ "MasterReceive", "group__i2c__interface__gr.html#aa135ff2f4832d35ceb5d7e248159b981", null ], + [ "SlaveTransmit", "group__i2c__interface__gr.html#ae9e3b81b352d4564fd2337fdf0e5488c", null ], + [ "SlaveReceive", "group__i2c__interface__gr.html#a12d2689d6e93985e64b9561a8e4e917b", null ], + [ "GetDataCount", "group__i2c__interface__gr.html#ad421a9b9b07fd6d3e6537396c2b98788", null ], + [ "Control", "group__i2c__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "GetStatus", "group__i2c__interface__gr.html#ad4b47653bc47cdb02965dd311e88b96a", null ] + ] ], + [ "ARM_I2C_CAPABILITIES", "group__i2c__interface__gr.html#structARM__I2C__CAPABILITIES", [ + [ "address_10_bit", "group__i2c__interface__gr.html#a4ffaaf168a9f43e98d710abff5861ed5", null ], + [ "reserved", "group__i2c__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_I2C_STATUS", "group__i2c__interface__gr.html#structARM__I2C__STATUS", [ + [ "busy", "group__i2c__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a", null ], + [ "mode", "group__i2c__interface__gr.html#a6b29e4f37f4482274af785ad5ffe96a7", null ], + [ "direction", "group__i2c__interface__gr.html#a2148ffb99828aeaced6a5655502434ac", null ], + [ "general_call", "group__i2c__interface__gr.html#ab65804439f6f5beda8da30381b0ad22d", null ], + [ "arbitration_lost", "group__i2c__interface__gr.html#ab3e3c8eeeae7fbe3c51dcb3d4104af24", null ], + [ "bus_error", "group__i2c__interface__gr.html#a43b1d210c48f4361c5054ba69bcae702", null ], + [ "reserved", "group__i2c__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_I2C_SignalEvent_t", "group__i2c__interface__gr.html#ga24277c48248a09b0dd7f12bbe22ce13c", null ], + [ "ARM_I2C_GetVersion", "group__i2c__interface__gr.html#ga956bd87590c7fb6e23609a0abfb5412c", null ], + [ "ARM_I2C_GetCapabilities", "group__i2c__interface__gr.html#gad20e6731f627aa7b9d6e99a50806122e", null ], + [ "ARM_I2C_Initialize", "group__i2c__interface__gr.html#ga79d2f7d01b3a681d1cf0d70ac6692696", null ], + [ "ARM_I2C_Uninitialize", "group__i2c__interface__gr.html#ga30d8bf600b6b3182a1f867407b3d6e75", null ], + [ "ARM_I2C_PowerControl", "group__i2c__interface__gr.html#ga734a69200e063fdbfb5110062afe9329", null ], + [ "ARM_I2C_MasterTransmit", "group__i2c__interface__gr.html#ga8bf4214580149d5a5d2360f71f0feb94", null ], + [ "ARM_I2C_MasterReceive", "group__i2c__interface__gr.html#gafa22504bcf88a85584dfe6e0dd270ad5", null ], + [ "ARM_I2C_SlaveTransmit", "group__i2c__interface__gr.html#gafe164f30eba78f066272373b98a62cd4", null ], + [ "ARM_I2C_SlaveReceive", "group__i2c__interface__gr.html#gae3c9abccd1d377385d3d4cfe29035164", null ], + [ "ARM_I2C_GetDataCount", "group__i2c__interface__gr.html#ga19db20ad8d7fde84d07f6db4d75f4b7c", null ], + [ "ARM_I2C_Control", "group__i2c__interface__gr.html#ga828f5fa289d065675ef78a9a73d129dc", null ], + [ "ARM_I2C_GetStatus", "group__i2c__interface__gr.html#gaba4e0f3eb4018e7dafd51b675c465f3e", null ], + [ "ARM_I2C_SignalEvent", "group__i2c__interface__gr.html#gad4f93d2895794b416dc8d8e9de91c05e", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__i2c__interface__gr_structARM__DRIVER__I2C.js b/docs/Driver/html/group__i2c__interface__gr_structARM__DRIVER__I2C.js new file mode 100644 index 0000000..379c4d8 --- /dev/null +++ b/docs/Driver/html/group__i2c__interface__gr_structARM__DRIVER__I2C.js @@ -0,0 +1,15 @@ +var group__i2c__interface__gr_structARM__DRIVER__I2C = +[ + [ "GetVersion", "group__i2c__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__i2c__interface__gr.html#a5dfa74ca82e0af995d43da61e08c3103", null ], + [ "Initialize", "group__i2c__interface__gr.html#ab0480980f67e0ebe0461ccea7873a65b", null ], + [ "Uninitialize", "group__i2c__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__i2c__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "MasterTransmit", "group__i2c__interface__gr.html#a9e58f7ea5fd9476e06b45c70b6696b95", null ], + [ "MasterReceive", "group__i2c__interface__gr.html#aa135ff2f4832d35ceb5d7e248159b981", null ], + [ "SlaveTransmit", "group__i2c__interface__gr.html#ae9e3b81b352d4564fd2337fdf0e5488c", null ], + [ "SlaveReceive", "group__i2c__interface__gr.html#a12d2689d6e93985e64b9561a8e4e917b", null ], + [ "GetDataCount", "group__i2c__interface__gr.html#ad421a9b9b07fd6d3e6537396c2b98788", null ], + [ "Control", "group__i2c__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "GetStatus", "group__i2c__interface__gr.html#ad4b47653bc47cdb02965dd311e88b96a", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__i2c__interface__gr_structARM__I2C__CAPABILITIES.js b/docs/Driver/html/group__i2c__interface__gr_structARM__I2C__CAPABILITIES.js new file mode 100644 index 0000000..624a381 --- /dev/null +++ b/docs/Driver/html/group__i2c__interface__gr_structARM__I2C__CAPABILITIES.js @@ -0,0 +1,5 @@ +var group__i2c__interface__gr_structARM__I2C__CAPABILITIES = +[ + [ "address_10_bit", "group__i2c__interface__gr.html#a4ffaaf168a9f43e98d710abff5861ed5", null ], + [ "reserved", "group__i2c__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__i2c__interface__gr_structARM__I2C__STATUS.js b/docs/Driver/html/group__i2c__interface__gr_structARM__I2C__STATUS.js new file mode 100644 index 0000000..c3fb255 --- /dev/null +++ b/docs/Driver/html/group__i2c__interface__gr_structARM__I2C__STATUS.js @@ -0,0 +1,10 @@ +var group__i2c__interface__gr_structARM__I2C__STATUS = +[ + [ "busy", "group__i2c__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a", null ], + [ "mode", "group__i2c__interface__gr.html#a6b29e4f37f4482274af785ad5ffe96a7", null ], + [ "direction", "group__i2c__interface__gr.html#a2148ffb99828aeaced6a5655502434ac", null ], + [ "general_call", "group__i2c__interface__gr.html#ab65804439f6f5beda8da30381b0ad22d", null ], + [ "arbitration_lost", "group__i2c__interface__gr.html#ab3e3c8eeeae7fbe3c51dcb3d4104af24", null ], + [ "bus_error", "group__i2c__interface__gr.html#a43b1d210c48f4361c5054ba69bcae702", null ], + [ "reserved", "group__i2c__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__bus__data__width__ctrls.html b/docs/Driver/html/group__mci__bus__data__width__ctrls.html new file mode 100644 index 0000000..dab9a2a --- /dev/null +++ b/docs/Driver/html/group__mci__bus__data__width__ctrls.html @@ -0,0 +1,228 @@ + + + + + +MCI Bus Data Width +CMSIS-Driver: MCI Bus Data Width + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
MCI Bus Data Width
MCI Control Codes
+
+
+ +

Specify the data bus width. +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_MCI_BUS_DATA_WIDTH_1   (0x00)
 Bus data width: 1 bit (default) More...
 
#define ARM_MCI_BUS_DATA_WIDTH_4   (0x01)
 Bus data width: 4 bits. More...
 
#define ARM_MCI_BUS_DATA_WIDTH_8   (0x02)
 Bus data width: 8 bits. More...
 
#define ARM_MCI_BUS_DATA_WIDTH_4_DDR   (0x03)
 Bus data width: 4 bits, DDR (Dual Data Rate) - MMC only. More...
 
#define ARM_MCI_BUS_DATA_WIDTH_8_DDR   (0x04)
 Bus data width: 8 bits, DDR (Dual Data Rate) - MMC only. More...
 
+

Description

+

Specify the data bus width.

+

The function ARM_MCI_Control with control = ARM_MCI_BUS_DATA_WIDTH specifies with arg the number of data I/O pins on the SD/MMC interface.

+

For high-speed memory cards, a 4-bit bus data width should be used (or 8-bit for eMMC). The data fields data_width_4 and data_width_8 of the structure ARM_MCI_CAPABILITIES encode whether the driver supports a specific bus data with.

+

The following codes are defined:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_BUS_DATA_WIDTH_1   (0x00)
+
+ +

Bus data width: 1 bit (default)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_DATA_WIDTH_4   (0x01)
+
+ +

Bus data width: 4 bits.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_DATA_WIDTH_8   (0x02)
+
+ +

Bus data width: 8 bits.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_DATA_WIDTH_4_DDR   (0x03)
+
+ +

Bus data width: 4 bits, DDR (Dual Data Rate) - MMC only.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_DATA_WIDTH_8_DDR   (0x04)
+
+ +

Bus data width: 8 bits, DDR (Dual Data Rate) - MMC only.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__bus__data__width__ctrls.js b/docs/Driver/html/group__mci__bus__data__width__ctrls.js new file mode 100644 index 0000000..e91c333 --- /dev/null +++ b/docs/Driver/html/group__mci__bus__data__width__ctrls.js @@ -0,0 +1,8 @@ +var group__mci__bus__data__width__ctrls = +[ + [ "ARM_MCI_BUS_DATA_WIDTH_1", "group__mci__bus__data__width__ctrls.html#gaa09a00d810a4dfd1d1824311ee290585", null ], + [ "ARM_MCI_BUS_DATA_WIDTH_4", "group__mci__bus__data__width__ctrls.html#gaa28150d8c3789e8cf1bcda318f74a28c", null ], + [ "ARM_MCI_BUS_DATA_WIDTH_8", "group__mci__bus__data__width__ctrls.html#ga3bb99a2d98ba9fb8c5bc97fa2b8ef469", null ], + [ "ARM_MCI_BUS_DATA_WIDTH_4_DDR", "group__mci__bus__data__width__ctrls.html#gaccb174bd131f8fd8cd9a56439a8ebb60", null ], + [ "ARM_MCI_BUS_DATA_WIDTH_8_DDR", "group__mci__bus__data__width__ctrls.html#ga7b31f81ae703229095fe9efcfbe80b47", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__bus__speed__ctrls.html b/docs/Driver/html/group__mci__bus__speed__ctrls.html new file mode 100644 index 0000000..1510aa8 --- /dev/null +++ b/docs/Driver/html/group__mci__bus__speed__ctrls.html @@ -0,0 +1,267 @@ + + + + + +MCI Bus Speed Mode +CMSIS-Driver: MCI Bus Speed Mode + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
MCI Bus Speed Mode
MCI Control Codes
+
+
+ +

Specify the bus speed mode. +More...

+ + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_MCI_BUS_DEFAULT_SPEED   (0x00)
 SD/MMC: Default Speed mode up to 25/26MHz. More...
 
#define ARM_MCI_BUS_HIGH_SPEED   (0x01)
 SD/MMC: High Speed mode up to 50/52MHz. More...
 
#define ARM_MCI_BUS_UHS_SDR12   (0x02)
 SD: SDR12 (Single Data Rate) up to 25MHz, 12.5MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
#define ARM_MCI_BUS_UHS_SDR25   (0x03)
 SD: SDR25 (Single Data Rate) up to 50MHz, 25 MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
#define ARM_MCI_BUS_UHS_SDR50   (0x04)
 SD: SDR50 (Single Data Rate) up to 100MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
#define ARM_MCI_BUS_UHS_SDR104   (0x05)
 SD: SDR104 (Single Data Rate) up to 208MHz, 104 MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
#define ARM_MCI_BUS_UHS_DDR50   (0x06)
 SD: DDR50 (Dual Data Rate) up to 50MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling. More...
 
+

Description

+

Specify the bus speed mode.

+

The function ARM_MCI_Control with control = ARM_MCI_BUS_SPEED configures the bus speed of the MCI to the requested bits/s specified with arg.

+

The function ARM_MCI_Control with control = ARM_MCI_BUS_SPEED_MODE configures the bus speed mode of the MCI as specified with arg listed bellow.

+

The function ARM_MCI_GetCapabilities lists the supported bus speed modes. Initially, all SD cards use a 3.3 volt electrical interface. Some SD cards can switch to 1.8 volt operation. For example, the use of ultra-high-speed (UHS) SD cards requires 1.8 volt operation and a 4-bit bus data width. The data field uhs_signaling of the structure ARM_MCI_CAPABILITIES encodes whether the driver supports 1.8 volt UHS signaling.

+
See Also
+
+

The following codes are defined:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_BUS_DEFAULT_SPEED   (0x00)
+
+ +

SD/MMC: Default Speed mode up to 25/26MHz.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_HIGH_SPEED   (0x01)
+
+ +

SD/MMC: High Speed mode up to 50/52MHz.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_UHS_SDR12   (0x02)
+
+ +

SD: SDR12 (Single Data Rate) up to 25MHz, 12.5MB/s: UHS-I (Ultra High Speed) 1.8V signaling.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_UHS_SDR25   (0x03)
+
+ +

SD: SDR25 (Single Data Rate) up to 50MHz, 25 MB/s: UHS-I (Ultra High Speed) 1.8V signaling.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_UHS_SDR50   (0x04)
+
+ +

SD: SDR50 (Single Data Rate) up to 100MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_UHS_SDR104   (0x05)
+
+ +

SD: SDR104 (Single Data Rate) up to 208MHz, 104 MB/s: UHS-I (Ultra High Speed) 1.8V signaling.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_UHS_DDR50   (0x06)
+
+ +

SD: DDR50 (Dual Data Rate) up to 50MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signaling.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__bus__speed__ctrls.js b/docs/Driver/html/group__mci__bus__speed__ctrls.js new file mode 100644 index 0000000..1cb041a --- /dev/null +++ b/docs/Driver/html/group__mci__bus__speed__ctrls.js @@ -0,0 +1,10 @@ +var group__mci__bus__speed__ctrls = +[ + [ "ARM_MCI_BUS_DEFAULT_SPEED", "group__mci__bus__speed__ctrls.html#ga601fa8b27ab2e5f6d90c93d54c8f412d", null ], + [ "ARM_MCI_BUS_HIGH_SPEED", "group__mci__bus__speed__ctrls.html#gaabda746ac7d6b4497358ff655a8ea6be", null ], + [ "ARM_MCI_BUS_UHS_SDR12", "group__mci__bus__speed__ctrls.html#ga0473c44a7b65044b3c6a8e7012009a4a", null ], + [ "ARM_MCI_BUS_UHS_SDR25", "group__mci__bus__speed__ctrls.html#gae32422631052307b3c4d269b25415907", null ], + [ "ARM_MCI_BUS_UHS_SDR50", "group__mci__bus__speed__ctrls.html#ga9f326c02391d965918ae619b912b81e7", null ], + [ "ARM_MCI_BUS_UHS_SDR104", "group__mci__bus__speed__ctrls.html#gad2bab563e7bbb4bcf6bdabe6a13dadf4", null ], + [ "ARM_MCI_BUS_UHS_DDR50", "group__mci__bus__speed__ctrls.html#ga04da920a5cac99eab9784527057f1b9c", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__card__power__ctrls.html b/docs/Driver/html/group__mci__card__power__ctrls.html new file mode 100644 index 0000000..0587e2c --- /dev/null +++ b/docs/Driver/html/group__mci__card__power__ctrls.html @@ -0,0 +1,261 @@ + + + + + +MCI Card Power Controls +CMSIS-Driver: MCI Card Power Controls + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
MCI Card Power Controls
MCI Interface
+
+
+ +

Specify Memory Card Power supply voltage. +More...

+ + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_MCI_POWER_VDD_OFF   (0x01UL << ARM_MCI_POWER_VDD_Pos)
 VDD (VCC) turned off. More...
 
#define ARM_MCI_POWER_VDD_3V3   (0x02UL << ARM_MCI_POWER_VDD_Pos)
 VDD (VCC) = 3.3V. More...
 
#define ARM_MCI_POWER_VDD_1V8   (0x03UL << ARM_MCI_POWER_VDD_Pos)
 VDD (VCC) = 1.8V. More...
 
#define ARM_MCI_POWER_VCCQ_OFF   (0x01UL << ARM_MCI_POWER_VCCQ_Pos)
 eMMC VCCQ turned off More...
 
#define ARM_MCI_POWER_VCCQ_3V3   (0x02UL << ARM_MCI_POWER_VCCQ_Pos)
 eMMC VCCQ = 3.3V More...
 
#define ARM_MCI_POWER_VCCQ_1V8   (0x03UL << ARM_MCI_POWER_VCCQ_Pos)
 eMMC VCCQ = 1.8V More...
 
#define ARM_MCI_POWER_VCCQ_1V2   (0x04UL << ARM_MCI_POWER_VCCQ_Pos)
 eMMC VCCQ = 1.2V More...
 
+

Description

+

Specify Memory Card Power supply voltage.

+

Specifies the power supply volatge for a memory card. Used with the function ARM_MCI_CardPower as the parameter voltage.

+

The following codes are defined:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_POWER_VDD_OFF   (0x01UL << ARM_MCI_POWER_VDD_Pos)
+
+ +

VDD (VCC) turned off.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VDD_3V3   (0x02UL << ARM_MCI_POWER_VDD_Pos)
+
+ +

VDD (VCC) = 3.3V.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VDD_1V8   (0x03UL << ARM_MCI_POWER_VDD_Pos)
+
+ +

VDD (VCC) = 1.8V.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VCCQ_OFF   (0x01UL << ARM_MCI_POWER_VCCQ_Pos)
+
+ +

eMMC VCCQ turned off

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VCCQ_3V3   (0x02UL << ARM_MCI_POWER_VCCQ_Pos)
+
+ +

eMMC VCCQ = 3.3V

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VCCQ_1V8   (0x03UL << ARM_MCI_POWER_VCCQ_Pos)
+
+ +

eMMC VCCQ = 1.8V

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_POWER_VCCQ_1V2   (0x04UL << ARM_MCI_POWER_VCCQ_Pos)
+
+ +

eMMC VCCQ = 1.2V

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__card__power__ctrls.js b/docs/Driver/html/group__mci__card__power__ctrls.js new file mode 100644 index 0000000..7cee951 --- /dev/null +++ b/docs/Driver/html/group__mci__card__power__ctrls.js @@ -0,0 +1,10 @@ +var group__mci__card__power__ctrls = +[ + [ "ARM_MCI_POWER_VDD_OFF", "group__mci__card__power__ctrls.html#ga288fbd80b384739a80e8f3ec31205cf5", null ], + [ "ARM_MCI_POWER_VDD_3V3", "group__mci__card__power__ctrls.html#ga565ecd36c8d0379fb4172da577cc540d", null ], + [ "ARM_MCI_POWER_VDD_1V8", "group__mci__card__power__ctrls.html#ga2ce8e379c3691da3b51c9c97d61770ef", null ], + [ "ARM_MCI_POWER_VCCQ_OFF", "group__mci__card__power__ctrls.html#ga6929c98a6bc8d898939a95111509220b", null ], + [ "ARM_MCI_POWER_VCCQ_3V3", "group__mci__card__power__ctrls.html#ga91a7201173cc092eaf7f0bcee028871e", null ], + [ "ARM_MCI_POWER_VCCQ_1V8", "group__mci__card__power__ctrls.html#gaaf389e0a139d5808dff8ebb6897d4c7b", null ], + [ "ARM_MCI_POWER_VCCQ_1V2", "group__mci__card__power__ctrls.html#ga5304b3b6cadc5113f841c3d526ab5db6", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__cmd__line__ctrls.html b/docs/Driver/html/group__mci__cmd__line__ctrls.html new file mode 100644 index 0000000..1f8c06b --- /dev/null +++ b/docs/Driver/html/group__mci__cmd__line__ctrls.html @@ -0,0 +1,175 @@ + + + + + +MCI CMD Line Mode +CMSIS-Driver: MCI CMD Line Mode + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
MCI CMD Line Mode
MCI Control Codes
+
+
+ +

Specify the CMD line mode (Push-Pull or Open Drain). +More...

+ + + + + + + + +

+Macros

#define ARM_MCI_BUS_CMD_PUSH_PULL   (0x00)
 Push-Pull CMD line (default) More...
 
#define ARM_MCI_BUS_CMD_OPEN_DRAIN   (0x01)
 Open Drain CMD line (MMC only) More...
 
+

Description

+

Specify the CMD line mode (Push-Pull or Open Drain).

+

Set the CMD line type with the function ARM_MCI_Control. The CMD line mode is push-pull (default) or open drain (needed for older MMC).

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_BUS_CMD_PUSH_PULL   (0x00)
+
+ +

Push-Pull CMD line (default)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_CMD_OPEN_DRAIN   (0x01)
+
+ +

Open Drain CMD line (MMC only)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__cmd__line__ctrls.js b/docs/Driver/html/group__mci__cmd__line__ctrls.js new file mode 100644 index 0000000..fb7a89e --- /dev/null +++ b/docs/Driver/html/group__mci__cmd__line__ctrls.js @@ -0,0 +1,5 @@ +var group__mci__cmd__line__ctrls = +[ + [ "ARM_MCI_BUS_CMD_PUSH_PULL", "group__mci__cmd__line__ctrls.html#gaaed404312d9bc073e3489779a911c7dc", null ], + [ "ARM_MCI_BUS_CMD_OPEN_DRAIN", "group__mci__cmd__line__ctrls.html#gaadf8667985731964d57d1ed672e90fd3", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__control__gr.html b/docs/Driver/html/group__mci__control__gr.html new file mode 100644 index 0000000..5ecb0fe --- /dev/null +++ b/docs/Driver/html/group__mci__control__gr.html @@ -0,0 +1,164 @@ + + + + + +MCI Control Codes +CMSIS-Driver: MCI Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
MCI Control Codes
MCI Interface
+
+
+ +

Configure and control the MCI using the ARM_MCI_Control. +More...

+ + + + + + + + + + + + + + + + + +

+Content

 MCI Controls
 Configure and control the MCI interface.
 
 MCI Bus Speed Mode
 Specify the bus speed mode.
 
 MCI Bus Data Width
 Specify the data bus width.
 
 MCI CMD Line Mode
 Specify the CMD line mode (Push-Pull or Open Drain).
 
 MCI Driver Strength
 Specify the driver strength.
 
+

Description

+

Configure and control the MCI using the ARM_MCI_Control.

+

Many parameters of the MCI driver are configured using the ARM_MCI_Control function.

+

The various MCI control codes define:

+ +

Refer to the function ARM_MCI_Control for further details.

+
+
+ + + + diff --git a/docs/Driver/html/group__mci__control__gr.js b/docs/Driver/html/group__mci__control__gr.js new file mode 100644 index 0000000..d162169 --- /dev/null +++ b/docs/Driver/html/group__mci__control__gr.js @@ -0,0 +1,8 @@ +var group__mci__control__gr = +[ + [ "MCI Controls", "group__mci__mode__ctrls.html", "group__mci__mode__ctrls" ], + [ "MCI Bus Speed Mode", "group__mci__bus__speed__ctrls.html", "group__mci__bus__speed__ctrls" ], + [ "MCI Bus Data Width", "group__mci__bus__data__width__ctrls.html", "group__mci__bus__data__width__ctrls" ], + [ "MCI CMD Line Mode", "group__mci__cmd__line__ctrls.html", "group__mci__cmd__line__ctrls" ], + [ "MCI Driver Strength", "group__mci__driver__strength__ctrls.html", "group__mci__driver__strength__ctrls" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__driver__strength__ctrls.html b/docs/Driver/html/group__mci__driver__strength__ctrls.html new file mode 100644 index 0000000..3378517 --- /dev/null +++ b/docs/Driver/html/group__mci__driver__strength__ctrls.html @@ -0,0 +1,214 @@ + + + + + +MCI Driver Strength +CMSIS-Driver: MCI Driver Strength + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
MCI Driver Strength
MCI Control Codes
+
+
+ +

Specify the driver strength. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_MCI_DRIVER_TYPE_A   (0x01)
 SD UHS-I Driver Type A. More...
 
#define ARM_MCI_DRIVER_TYPE_B   (0x00)
 SD UHS-I Driver Type B (default) More...
 
#define ARM_MCI_DRIVER_TYPE_C   (0x02)
 SD UHS-I Driver Type C. More...
 
#define ARM_MCI_DRIVER_TYPE_D   (0x03)
 SD UHS-I Driver Type D. More...
 
+

Description

+

Specify the driver strength.

+

The function ARM_MCI_Control with control = ARM_MCI_DRIVER_STRENGTH specifies with arg the driver type of the SD interface.

+
See Also
+
+

The following codes are defined:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_DRIVER_TYPE_A   (0x01)
+
+ +

SD UHS-I Driver Type A.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_DRIVER_TYPE_B   (0x00)
+
+ +

SD UHS-I Driver Type B (default)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_DRIVER_TYPE_C   (0x02)
+
+ +

SD UHS-I Driver Type C.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_DRIVER_TYPE_D   (0x03)
+
+ +

SD UHS-I Driver Type D.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__driver__strength__ctrls.js b/docs/Driver/html/group__mci__driver__strength__ctrls.js new file mode 100644 index 0000000..0df57f6 --- /dev/null +++ b/docs/Driver/html/group__mci__driver__strength__ctrls.js @@ -0,0 +1,7 @@ +var group__mci__driver__strength__ctrls = +[ + [ "ARM_MCI_DRIVER_TYPE_A", "group__mci__driver__strength__ctrls.html#ga64eb1c4847711a262f084c361b60a912", null ], + [ "ARM_MCI_DRIVER_TYPE_B", "group__mci__driver__strength__ctrls.html#ga078d3c3bc7c9335b92e6445a0abafc46", null ], + [ "ARM_MCI_DRIVER_TYPE_C", "group__mci__driver__strength__ctrls.html#ga3da11696d1fcd3930eb7e70fe097d747", null ], + [ "ARM_MCI_DRIVER_TYPE_D", "group__mci__driver__strength__ctrls.html#ga8185f82b1d8857a3f0eb461d664f2b3d", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__event__gr.html b/docs/Driver/html/group__mci__event__gr.html new file mode 100644 index 0000000..f2ced56 --- /dev/null +++ b/docs/Driver/html/group__mci__event__gr.html @@ -0,0 +1,340 @@ + + + + + +MCI Events +CMSIS-Driver: MCI Events + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
MCI Events
MCI Interface
+
+
+ +

The MCI driver generates call back events that are notified via the function ARM_MCI_SignalEvent. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_MCI_EVENT_CARD_INSERTED   (1UL << 0)
 Memory Card inserted. More...
 
#define ARM_MCI_EVENT_CARD_REMOVED   (1UL << 1)
 Memory Card removed. More...
 
#define ARM_MCI_EVENT_COMMAND_COMPLETE   (1UL << 2)
 Command completed. More...
 
#define ARM_MCI_EVENT_COMMAND_TIMEOUT   (1UL << 3)
 Command timeout. More...
 
#define ARM_MCI_EVENT_COMMAND_ERROR   (1UL << 4)
 Command response error (CRC error or invalid response) More...
 
#define ARM_MCI_EVENT_TRANSFER_COMPLETE   (1UL << 5)
 Data transfer completed. More...
 
#define ARM_MCI_EVENT_TRANSFER_TIMEOUT   (1UL << 6)
 Data transfer timeout. More...
 
#define ARM_MCI_EVENT_TRANSFER_ERROR   (1UL << 7)
 Data transfer CRC failed. More...
 
#define ARM_MCI_EVENT_SDIO_INTERRUPT   (1UL << 8)
 SD I/O Interrupt. More...
 
#define ARM_MCI_EVENT_CCS   (1UL << 9)
 Command Completion Signal (CCS) More...
 
#define ARM_MCI_EVENT_CCS_TIMEOUT   (1UL << 10)
 Command Completion Signal (CCS) Timeout. More...
 
+

Description

+

The MCI driver generates call back events that are notified via the function ARM_MCI_SignalEvent.

+

This section provides the event values for the ARM_MCI_SignalEvent callback function.

+

The following call back notification events are generated:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_EVENT_CARD_INSERTED   (1UL << 0)
+
+ +

Memory Card inserted.

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_CARD_REMOVED   (1UL << 1)
+
+ +

Memory Card removed.

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_COMMAND_COMPLETE   (1UL << 2)
+
+ +

Command completed.

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_COMMAND_TIMEOUT   (1UL << 3)
+
+ +

Command timeout.

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_COMMAND_ERROR   (1UL << 4)
+
+ +

Command response error (CRC error or invalid response)

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_TRANSFER_COMPLETE   (1UL << 5)
+
+ +

Data transfer completed.

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_TRANSFER_TIMEOUT   (1UL << 6)
+
+ +

Data transfer timeout.

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_TRANSFER_ERROR   (1UL << 7)
+
+ +

Data transfer CRC failed.

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_SDIO_INTERRUPT   (1UL << 8)
+
+ +

SD I/O Interrupt.

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_CCS   (1UL << 9)
+
+ +

Command Completion Signal (CCS)

+
See Also
ARM_MCI_SignalEvent
+ +
+
+ +
+
+ + + + +
#define ARM_MCI_EVENT_CCS_TIMEOUT   (1UL << 10)
+
+ +

Command Completion Signal (CCS) Timeout.

+
See Also
ARM_MCI_SignalEvent
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__event__gr.js b/docs/Driver/html/group__mci__event__gr.js new file mode 100644 index 0000000..e092b98 --- /dev/null +++ b/docs/Driver/html/group__mci__event__gr.js @@ -0,0 +1,14 @@ +var group__mci__event__gr = +[ + [ "ARM_MCI_EVENT_CARD_INSERTED", "group__mci__event__gr.html#gae2cf8ef238c092e94e96a01602f3a23c", null ], + [ "ARM_MCI_EVENT_CARD_REMOVED", "group__mci__event__gr.html#ga92ba748f9324ec13898f10456f17c8cc", null ], + [ "ARM_MCI_EVENT_COMMAND_COMPLETE", "group__mci__event__gr.html#gae69356c75d55103d93ef91ac1bc02b49", null ], + [ "ARM_MCI_EVENT_COMMAND_TIMEOUT", "group__mci__event__gr.html#gab79b3ab4dcd03c38df1e173fa903d822", null ], + [ "ARM_MCI_EVENT_COMMAND_ERROR", "group__mci__event__gr.html#ga373aeb3eca0e4c6d159312488a130442", null ], + [ "ARM_MCI_EVENT_TRANSFER_COMPLETE", "group__mci__event__gr.html#gabc3c468dedaed890683360f2c5c65bea", null ], + [ "ARM_MCI_EVENT_TRANSFER_TIMEOUT", "group__mci__event__gr.html#ga614e7c7226adbaa8ec4165bf8b87ef27", null ], + [ "ARM_MCI_EVENT_TRANSFER_ERROR", "group__mci__event__gr.html#ga5d2cee5ba6d0e40ad505983155706c29", null ], + [ "ARM_MCI_EVENT_SDIO_INTERRUPT", "group__mci__event__gr.html#ga75a050fdfe04e6816e96c938d6a6c197", null ], + [ "ARM_MCI_EVENT_CCS", "group__mci__event__gr.html#ga8161f3960ddf2a3cdc3c4c83148c6099", null ], + [ "ARM_MCI_EVENT_CCS_TIMEOUT", "group__mci__event__gr.html#gafa8cbcd597a05c64901eeb777cc0b74f", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__interface__gr.html b/docs/Driver/html/group__mci__interface__gr.html new file mode 100644 index 0000000..4f28689 --- /dev/null +++ b/docs/Driver/html/group__mci__interface__gr.html @@ -0,0 +1,1776 @@ + + + + + +MCI Interface +CMSIS-Driver: MCI Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
MCI Interface
+
+
+ +

Driver API for Memory Card Interface using SD/MMC interface (Driver_MCI.h) +More...

+ + + + + + + + + + + + + + + + + +

+Content

 MCI Events
 The MCI driver generates call back events that are notified via the function ARM_MCI_SignalEvent.
 
 MCI Control Codes
 Configure and control the MCI using the ARM_MCI_Control.
 
 MCI Send Command Flags
 Specify various options for sending commands to the card and the expected response.
 
 MCI Transfer Controls
 Specify data transfer mode.
 
 MCI Card Power Controls
 Specify Memory Card Power supply voltage.
 
+ + + + + + + + + + +

+Data Structures

struct  ARM_DRIVER_MCI
 Access structure of the MCI Driver. More...
 
struct  ARM_MCI_CAPABILITIES
 MCI Driver Capabilities. More...
 
struct  ARM_MCI_STATUS
 MCI Status. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_MCI_SignalEvent_t )(uint32_t event)
 Pointer to ARM_MCI_SignalEvent : Signal MCI Card Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_MCI_GetVersion (void)
 Get driver version. More...
 
ARM_MCI_CAPABILITIES ARM_MCI_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_MCI_Initialize (ARM_MCI_SignalEvent_t cb_event)
 Initialize the Memory Card Interface. More...
 
int32_t ARM_MCI_Uninitialize (void)
 De-initialize Memory Card Interface. More...
 
int32_t ARM_MCI_PowerControl (ARM_POWER_STATE state)
 Control Memory Card Interface Power. More...
 
int32_t ARM_MCI_CardPower (uint32_t voltage)
 Set Memory Card Power supply voltage. More...
 
int32_t ARM_MCI_ReadCD (void)
 Read Card Detect (CD) state. More...
 
int32_t ARM_MCI_ReadWP (void)
 Read Write Protect (WP) state. More...
 
int32_t ARM_MCI_SendCommand (uint32_t cmd, uint32_t arg, uint32_t flags, uint32_t *response)
 Send Command to card and get the response. More...
 
int32_t ARM_MCI_SetupTransfer (uint8_t *data, uint32_t block_count, uint32_t block_size, uint32_t mode)
 Setup read or write transfer operation. More...
 
int32_t ARM_MCI_AbortTransfer (void)
 Abort current read/write data transfer. More...
 
int32_t ARM_MCI_Control (uint32_t control, uint32_t arg)
 Control MCI Interface. More...
 
ARM_MCI_STATUS ARM_MCI_GetStatus (void)
 Get MCI status. More...
 
void ARM_MCI_SignalEvent (uint32_t event)
 Callback function that signals a MCI Card Event. More...
 
+

Description

+

Driver API for Memory Card Interface using SD/MMC interface (Driver_MCI.h)

+

The Memory Card Interface (MCI) implements the hardware abstraction layer for Secure Digital (SD) and Multi Media Card (MMC) memory that is typically used as file storage. For embedded systems, SD/MMC devices are available as memory cards in several forms (SD, miniSD, microSD, MMC, MMCmicro) or as non-removable devic es that are directly soldered to the PCB (eMMC).

+

References:

+
    +
  • Wikipedia offers more information about the Secure Digital memory.
    • +
  • Wikipedia offers more information about the MultiMediaCard.
    • +
  • The SD Association provides detailed documentation under www.sdcard.org.
    • +
  • The MultiMediaCard Association (merged with JEDEC) provides detailed documentation under www.jedec.org.
    • +
+

Block Diagram

+

The MCI driver allows you to exchange data of the SD/MMC memory via SD/MMC interface.

+

The following modes are supported by SD/MMC memory cards:

+
    +
  • SPI bus mode: Serial Peripheral Interface Bus supported by most microcontrollers.
    • +
  • 1-bit SD/MMC Bus mode: proprietary data transfer protocol supported by SD/MMC interfaces.
    • +
  • 4-bit SD/MMC Bus mode: high-speed version of the SD/MMC interface using 4 data I/O pins.
    • +
  • 8-bit SD/MMC Bus mode: high-speed version of the SD/MMC interface using 8 data I/O pins.
    • +
+
+SPI_BusMode.png +
+SD memory connected via SPI interface
+

 

+
+SD_1BitBusMode.png +
+SD memory connected via 1-bit SD Bus Mode
+

 

+
+SD_4BitBusMode.png +
+SD memory connected via 4-bit SD Bus Mode
+

MCI API

+

The following header files define the Application Programming Interface (API) for the MCI interface:

+
    +
  • Driver_MCI.h : Driver API for Memory Card Interface using SD/MMC interface
    • +
+

The driver implementation is a typical part of the Device Family Pack (DFP) that supports the peripherals of the microcontroller family.

+
Note
For parameters, the value marked with (default) is the setting after the driver initialization.
+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +

Example Code

+

The following example code shows the usage of the MCI interface.

+
+
#include "Driver_MCI.h"
+
+
+
/* Usage example: ARM_MCI_Initialize ----------------------------------------*/
+
+
// ARM_MCI_SignalEvent callback function prototype
+
void MCI_SignalEvent_Callback (uint32_t event);
+
+
void init_driver (ARM_DRIVER_MCI *drv) {
+
int32_t status;
+
+
status = drv->Initialize (&MCI_SignalEvent_Callback);
+
+
if (status != ARM_DRIVER_OK) {
+
// Initialization and event callback registration failed
+
}
+
}
+
+
/* Usage example: ARM_MCI_Uninitialize --------------------------------------*/
+
+
void uninit_driver (ARM_DRIVER_MCI *drv) {
+
int32_t status;
+
+
status = drv->Uninitialize ();
+
+
if (status == ARM_DRIVER_OK) {
+
// Driver successfully uninitialized
+
}
+
}
+
+
/* Usage example: ARM_MCI_PowerControl --------------------------------------*/
+
+
void control_driver_power (ARM_DRIVER_MCI *drv, bool enable) {
+
int32_t status;
+
+
if (enable == true) {
+
status = drv->PowerControl (ARM_POWER_FULL);
+
}
+
else {
+
status = drv->PowerControl (ARM_POWER_OFF);
+
}
+
+
if (status == ARM_DRIVER_OK) {
+
// Driver power enabled/disabled
+
}
+
}
+
+
/* Usage example: ARM_MCI_CardPower -----------------------------------------*/
+
+
ARM_MCI_CAPABILITIES drv_capabilities;
+
+
void set_card_vdd_3v3 (ARM_DRIVER_MCI *drv) {
+
int32_t status;
+
+
if (drv_capabilities.vdd == 1U) {
+
// Power switching to 3.3V supported
+
status = drv->CardPower (ARM_MCI_POWER_VDD_3V3);
+
+
if (status == ARM_DRIVER_OK) {
+
// Card power set to 3.3V
+
}
+
}
+
}
+
+
/* Usage example: ARM_MCI_ReadCD --------------------------------------------*/
+
+
void read_card_detect_state (ARM_DRIVER_MCI *drv) {
+
int32_t status;
+
+
status = drv->ReadCD();
+
+
if (status == 1) {
+
// Memory card is detected
+
}
+
else {
+
if (status == 0) {
+
// Memory card is not detected
+
}
+
else {
+
// Error reading card detect pin state
+
}
+
}
+
}
+
+
/* Usage example: ARM_MCI_ReadWP --------------------------------------------*/
+
+
void read_write_protect_state (ARM_DRIVER_MCI *drv) {
+
int32_t status;
+
+
status = drv->ReadWP();
+
+
if (status == 1) {
+
// Memory card write protection is enabled
+
}
+
else {
+
if (status == 0) {
+
// Memory card write protection is disabled
+
}
+
else {
+
// Error reading write protect pin state
+
}
+
}
+
}
+
+
/* Usage example: ARM_MCI_SendCommand ---------------------------------------*/
+
+
volatile uint32_t MCI_Events;
+
+
void MCI_SignalEvent_Callback (uint32_t event) {
+
// Save current event
+
MCI_Events |= event;
+
}
+
+
void send_CMD0 (ARM_DRIVER_MCI *drv) {
+
int32_t status;
+
uint32_t cmd;
+
+
MCI_Events = 0U; //Clear MCI driver event flags
+
cmd = 0U; // Set GO_IDLE_STATE command code
+
+
status = drv->SendCommand (cmd, 0U, ARM_MCI_CARD_INITIALIZE | ARM_MCI_RESPONSE_NONE, NULL);
+
+
if (status == ARM_DRIVER_OK) {
+
/* Wait for event */
+
while ((MCI_Events & ARM_MCI_EVENT_COMMAND_COMPLETE) == 0U);
+
// Command was successfully sent to memory card
+
// ..
+
}
+
else {
+
// Error
+
}
+
}
+
+
/* Usage example: ARM_MCI_SetupTransfer -------------------------------------*/
+
+
volatile uint32_t MCI_Events;
+
+
void MCI_SignalEvent_Callback (uint32_t event) {
+
MCI_Events |= event; // Save current event
+
}
+
+
void read_sector (ARM_DRIVER_MCI *drv, uint8_t *buf, uint32_t sz) {
+
int32_t status;
+
uint32_t cmd, arg;
+
uint32_t resp;
+
+
if (sz < 512U) {
+
// Invalid buffer size, sector consists of 512 bytes
+
//...
+
}
+
+
status = drv->SetupTransfer (buf, 1U, 512U, ARM_MCI_TRANSFER_READ | ARM_MCI_TRANSFER_BLOCK);
+
+
if (status == ARM_DRIVER_OK) {
+
MCI_Events = 0U; //Clear MCI driver event flags
+
+
cmd = 17U; // Set READ_SINGLE_BLOCK command
+
arg = 0U; // Set sector number
+
+
status = drv->SendCommand (cmd, arg, ARM_MCI_RESPONSE_SHORT | ARM_MCI_RESPONSE_CRC | ARM_MCI_TRANSFER_DATA, &resp);
+
+
if (status == ARM_DRIVER_OK) {
+
/* Wait for event */
+
while ((MCI_Events & ARM_MCI_EVENT_COMMAND_COMPLETE) == 0U);
+
// Command was successfully sent to memory card
+
if ((resp & 0x03U) == 0U) {
+
// Sector number is valid, wait until data transfer completes
+
while ((MCI_Events & ARM_MCI_EVENT_TRANSFER_COMPLETE) == 0U);
+
// Data was successfully read from memory card
+
// ...
+
}
+
}
+
}
+
}
+
+
/* Usage example: ARM_MCI_AbortTransfer -------------------------------------*/
+
+
void abort_data_transfer (ARM_DRIVER_MCI *drv) {
+
ARM_MCI_STATUS drv_status;
+
+
drv_status = drv->GetStatus();
+
+
if (drv_status.transfer_active == 1U) {
+
// Data transfer is active, abort the transfer
+
if (drv->AbortTransfer() == ARM_DRIVER_OK) {
+
// Transfer aborted
+
// ...
+
}
+
}
+
}
+
+
/* Usage example: ARM_MCI_GetStatus -----------------------------------------*/
+
+
void check_transfer_status (ARM_DRIVER_MCI *drv) {
+
ARM_MCI_STATUS drv_status;
+
+
drv_status = drv->GetStatus();
+
+
if (drv_status.transfer_active == 1U) {
+
// Data transfer is active
+
}
+
+
if (drv_status.transfer_timeout == 1U) {
+
// Data not received, timeout expired
+
}
+
+
if (drv_status.transfer_error == 1U) {
+
// Data transfer ended with error
+
}
+
}
+
+
/* Usage example: ARM_MCI_SignalEvent ---------------------------------------*/
+
+
void MCI_SignalEvent_Callback (uint32_t event) {
+
if ((event & ARM_MCI_EVENT_CARD_INSERTED) != 0U) {
+
// Memory card was inserted into socket
+
}
+
if ((event & ARM_MCI_EVENT_CARD_REMOVED) != 0U) {
+
// Memory card was removed from socket
+
}
+
+
if ((event & ARM_MCI_EVENT_COMMAND_COMPLETE) != 0U) {
+
// Command was successfully sent to memory card
+
}
+
if ((event & ARM_MCI_EVENT_COMMAND_TIMEOUT) != 0U) {
+
// Command response was not received in time
+
}
+
if ((event & ARM_MCI_EVENT_COMMAND_ERROR) != 0U) {
+
// Command response was invalid
+
}
+
+
if ((event & ARM_MCI_EVENT_TRANSFER_COMPLETE) != 0U) {
+
// Data successfully transferred from/to memory card
+
}
+
if ((event & ARM_MCI_EVENT_TRANSFER_TIMEOUT) != 0U) {
+
// Data not transferred from/to memory card, timeout expired
+
}
+
if ((event & ARM_MCI_EVENT_TRANSFER_ERROR) != 0U) {
+
// Data transfer ended with errors
+
}
+
+
if ((event & ARM_MCI_EVENT_SDIO_INTERRUPT) != 0U) {
+
// SD I/O card sent interrupt request
+
}
+
+
if ((event & ARM_MCI_EVENT_CCS) != 0U) {
+
// CE-ATA command completion signal received
+
}
+
if ((event & ARM_MCI_EVENT_CCS_TIMEOUT) != 0U) {
+
// CE-ATA command completion signal wait timeout expired
+
}
+
}
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_MCI
+
+

Access structure of the MCI Driver.

+

The functions of the MCI are accessed by function pointers exposed by this structure. Refer to Common Driver Functions for overview information.

+

Each instance of an MCI provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:

+
    +
  • Driver_MCI0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_MCI1 is the name of the access struct of the second instance (no. 1).
    • +
+

A configuration setting in the middleware allows connecting the middleware to a specific driver instance Driver_MCIn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_MCI_GetVersion : Get driver version. More...
 
ARM_MCI_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_MCI_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_MCI_SignalEvent_t cb_event)
 Pointer to ARM_MCI_Initialize : Initialize MCI Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_MCI_Uninitialize : De-initialize MCI Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_MCI_PowerControl : Control MCI Interface Power. More...
 
int32_t(* CardPower )(uint32_t voltage)
 Pointer to ARM_MCI_CardPower : Set card power supply voltage. More...
 
int32_t(* ReadCD )(void)
 Pointer to ARM_MCI_ReadCD : Read Card Detect (CD) state. More...
 
int32_t(* ReadWP )(void)
 Pointer to ARM_MCI_ReadWP : Read Write Protect (WP) state. More...
 
int32_t(* SendCommand )(uint32_t cmd, uint32_t arg, uint32_t flags, uint32_t *response)
 Pointer to ARM_MCI_SendCommand : Send Command to card and get the response. More...
 
int32_t(* SetupTransfer )(uint8_t *data, uint32_t block_count, uint32_t block_size, uint32_t mode)
 Pointer to ARM_MCI_SetupTransfer : Setup data transfer operation. More...
 
int32_t(* AbortTransfer )(void)
 Pointer to ARM_MCI_AbortTransfer : Abort current data transfer. More...
 
int32_t(* Control )(uint32_t control, uint32_t arg)
 Pointer to ARM_MCI_Control : Control MCI Interface. More...
 
ARM_MCI_STATUS(* GetStatus )(void)
 Pointer to ARM_MCI_GetStatus : Get MCI status. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_MCI_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_MCI_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_MCI_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_MCI_SignalEvent_t cb_event)
+
+ +

Pointer to ARM_MCI_Initialize : Initialize MCI Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_MCI_Uninitialize : De-initialize MCI Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_MCI_PowerControl : Control MCI Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* CardPower)(uint32_t voltage)
+
+ +

Pointer to ARM_MCI_CardPower : Set card power supply voltage.

+ +
+
+ +
+
+ + + + +
int32_t(* ReadCD)(void)
+
+ +

Pointer to ARM_MCI_ReadCD : Read Card Detect (CD) state.

+ +
+
+ +
+
+ + + + +
int32_t(* ReadWP)(void)
+
+ +

Pointer to ARM_MCI_ReadWP : Read Write Protect (WP) state.

+ +
+
+ +
+
+ + + + +
int32_t(* SendCommand)(uint32_t cmd, uint32_t arg, uint32_t flags, uint32_t *response)
+
+ +

Pointer to ARM_MCI_SendCommand : Send Command to card and get the response.

+ +
+
+ +
+
+ + + + +
int32_t(* SetupTransfer)(uint8_t *data, uint32_t block_count, uint32_t block_size, uint32_t mode)
+
+ +

Pointer to ARM_MCI_SetupTransfer : Setup data transfer operation.

+ +
+
+ +
+
+ + + + +
int32_t(* AbortTransfer)(void)
+
+ +

Pointer to ARM_MCI_AbortTransfer : Abort current data transfer.

+ +
+
+ +
+
+ + + + +
int32_t(* Control)(uint32_t control, uint32_t arg)
+
+ +

Pointer to ARM_MCI_Control : Control MCI Interface.

+ +
+
+ +
+
+ + + + +
ARM_MCI_STATUS(* GetStatus)(void)
+
+ +

Pointer to ARM_MCI_GetStatus : Get MCI status.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_MCI_CAPABILITIES
+
+

MCI Driver Capabilities.

+

A MCI driver can be implemented with different capabilities. The data fields of this struct encode the capabilities implemented by this driver.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +cd_state: 1 +Card Detect State available.
+uint32_t +cd_event: 1 +Signal Card Detect change event.
+uint32_t +wp_state: 1 +Write Protect State available.
+uint32_t +vdd: 1 +Supports VDD Card Power Supply Control.
+uint32_t +vdd_1v8: 1 +Supports 1.8 VDD Card Power Supply.
+uint32_t +vccq: 1 +Supports VCCQ Card Power Supply Control (eMMC)
+uint32_t +vccq_1v8: 1 +Supports 1.8 VCCQ Card Power Supply (eMMC)
+uint32_t +vccq_1v2: 1 +Supports 1.2 VCCQ Card Power Supply (eMMC)
+uint32_t +data_width_4: 1 +Supports 4-bit data.
+uint32_t +data_width_8: 1 +Supports 8-bit data.
+uint32_t +data_width_4_ddr: 1 +Supports 4-bit data, DDR (Dual Data Rate) - MMC only.
+uint32_t +data_width_8_ddr: 1 +Supports 8-bit data, DDR (Dual Data Rate) - MMC only.
+uint32_t +high_speed: 1 +Supports SD/MMC High Speed Mode.
+uint32_t +uhs_signaling: 1 +Supports SD UHS-I (Ultra High Speed) 1.8V signaling.
+uint32_t +uhs_tuning: 1 +Supports SD UHS-I tuning.
+uint32_t +uhs_sdr50: 1 +Supports SD UHS-I SDR50 (Single Data Rate) up to 50MB/s.
+uint32_t +uhs_sdr104: 1 +Supports SD UHS-I SDR104 (Single Data Rate) up to 104MB/s.
+uint32_t +uhs_ddr50: 1 +Supports SD UHS-I DDR50 (Dual Data Rate) up to 50MB/s.
+uint32_t +uhs_driver_type_a: 1 +Supports SD UHS-I Driver Type A.
+uint32_t +uhs_driver_type_c: 1 +Supports SD UHS-I Driver Type C.
+uint32_t +uhs_driver_type_d: 1 +Supports SD UHS-I Driver Type D.
+uint32_t +sdio_interrupt: 1 +Supports SD I/O Interrupt.
+uint32_t +read_wait: 1 +Supports Read Wait (SD I/O)
+uint32_t +suspend_resume: 1 +Supports Suspend/Resume (SD I/O)
+uint32_t +mmc_interrupt: 1 +Supports MMC Interrupt.
+uint32_t +mmc_boot: 1 +Supports MMC Boot.
+uint32_t +rst_n: 1 +Supports RST_n Pin Control (eMMC)
+uint32_t +ccs: 1 +Supports Command Completion Signal (CCS) for CE-ATA.
+uint32_t +ccs_timeout: 1 +Supports Command Completion Signal (CCS) timeout for CE-ATA.
+uint32_t +reserved: 3 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_MCI_STATUS
+
+

MCI Status.

+

Structure with information about the status of the MCI.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +command_active: 1 +Command active flag.
+uint32_t +command_timeout: 1 +Command timeout flag (cleared on start of next command)
+uint32_t +command_error: 1 +Command error flag (cleared on start of next command)
+uint32_t +transfer_active: 1 +Transfer active flag.
+uint32_t +transfer_timeout: 1 +Transfer timeout flag (cleared on start of next command)
+uint32_t +transfer_error: 1 +Transfer error flag (cleared on start of next command)
+uint32_t +sdio_interrupt: 1 +SD I/O Interrupt flag (cleared on start of monitoring)
+uint32_t +ccs: 1 +CCS flag (cleared on start of next command)
+uint32_t +reserved: 24 +
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_MCI_SignalEvent_t
+
+ +

Pointer to ARM_MCI_SignalEvent : Signal MCI Card Event.

+

Provides the typedef for the callback function ARM_MCI_SignalEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_MCI_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_MCI_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_MCI Driver_MCI0;
+
ARM_DRIVER_MCI *drv_info;
+
+
void setup_mci (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_MCI0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_MCI_CAPABILITIES ARM_MCI_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_MCI_CAPABILITIES
+

The function ARM_MCI_GetCapabilities returns information about capabilities in this driver implementation. The data fields of the structure ARM_MCI_CAPABILITIES encode various capabilities, for example supported bus modes ...

+

Example:

+
extern ARM_DRIVER_MCI Driver_MCI0;
+
ARM_DRIVER_MCI *drv_info;
+
+
void read_capabilities (void) {
+
ARM_MCI_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_MCI0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_MCI_Initialize (ARM_MCI_SignalEvent_t cb_event)
+
+ +

Initialize the Memory Card Interface.

+
Parameters
+ + +
[in]cb_eventPointer to ARM_MCI_SignalEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_MCI_Initialize initializes the MCI interface. It is called when the middleware component starts operation.

+

The function performs the following operations:

+
    +
  • Initializes the resources needed for the MCI interface.
    • +
  • Registers the ARM_MCI_SignalEvent callback function.
    • +
+

The parameter cb_event is a pointer to the ARM_MCI_SignalEvent callback function; use a NULL pointer when no callback signals are required.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_MCI_Uninitialize (void )
+
+ +

De-initialize Memory Card Interface.

+
Returns
Status Error Codes
+

The function ARM_MCI_Uninitialize de-initializes the resources of I2C interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_MCI_PowerControl (ARM_POWER_STATE state)
+
+ +

Control Memory Card Interface Power.

+
Parameters
+ + +
[in]statePower state ARM_POWER_STATE
+
+
+
Returns
Status Error Codes
+

The function ARM_MCI_PowerControl operates the power modes of the MCI interface.

+

The parameter state can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode, then the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_MCI_CardPower (uint32_t voltage)
+
+ +

Set Memory Card Power supply voltage.

+
Parameters
+ + +
[in]voltageMemory Card Power supply voltage
+
+
+
Returns
Status Error Codes
+

The function ARM_MCI_CardPower operates the memory card power supply voltage.

+

The parameter voltage sets the voltage. Not every voltage might be supported by the driver implementation. The structure ARM_MCI_CAPABILITIES encodes the supported voltage. Retrieve the information with the function ARM_MCI_GetCapabilities and verify the data fields.

+

The following values:

+ + + + + + + + + + + + + + + + + +
Parameter voltage Description supported when ARM_MCI_CAPABILITIES
ARM_MCI_POWER_VDD_OFF VDD (VCC) turned off allways supported
ARM_MCI_POWER_VDD_3V3 VDD (VCC) = 3.3V data field vdd = 1
ARM_MCI_POWER_VDD_1V8 VDD (VCC) = 1.8V data field vdd_1v8 = 1
ARM_MCI_POWER_VCCQ_OFF eMMC VCCQ turned off allways supported
ARM_MCI_POWER_VCCQ_3V3 eMMC VCCQ = 3.3V data field vccq = 1
ARM_MCI_POWER_VCCQ_1V8 eMMC VCCQ = 1.8V data field vccq_1v8 = 1
ARM_MCI_POWER_VCCQ_1V2 eMMC VCCQ = 1.2V data field vccq_1v2 = 1
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_MCI_ReadCD (void )
+
+ +

Read Card Detect (CD) state.

+
Returns
1:card detected, 0:card not detected, or error
+

The function ARM_MCI_ReadCD reads the status of the Card Detect (CD) pin.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_MCI_ReadWP (void )
+
+ +

Read Write Protect (WP) state.

+
Returns
1:write protected, 0:not write protected, or error
+

The function ARM_MCI_ReadWP reads the status of the Write Protect (WP) pin.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_MCI_SendCommand (uint32_t cmd,
uint32_t arg,
uint32_t flags,
uint32_t * response 
)
+
+ +

Send Command to card and get the response.

+
Parameters
+ + + + + +
[in]cmdMemory Card command
[in]argCommand argument
[in]flagsCommand flags
[out]responsePointer to buffer for response
+
+
+
Returns
Status Error Codes
+

The function ARM_MCI_SendCommand

+
    +
  • sends commands to the memory card
    • +
  • retrieve the response from the card
    • +
  • optionally, start the data transfer.
    • +
+

The parameter cmd is the command sent to the card.
+The parameter arg contains arguments for the command cmd.
+The parameter flags controls the behavior of the operation and takes predefined values listed in the table below.
+The parameter response is a pointer to receive data.

+

The parameter flags can have the following values:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Parameter flags Description
ARM_MCI_RESPONSE_NONE No response expected (default)
ARM_MCI_RESPONSE_SHORT Short response (48-bit) expected
ARM_MCI_RESPONSE_SHORT_BUSY Short response with busy signal (48-bit) expected
ARM_MCI_RESPONSE_LONG Long response (136-bit) expected
ARM_MCI_RESPONSE_INDEX Check command index in response
ARM_MCI_RESPONSE_CRC Check CRC in response
ARM_MCI_WAIT_BUSY Wait until busy before sending the command
ARM_MCI_TRANSFER_DATA Activate Data transfer
ARM_MCI_CARD_INITIALIZE Execute Memory Card initialization sequence
ARM_MCI_INTERRUPT_COMMAND Send Interrupt command (CMD40 - MMC only)
ARM_MCI_INTERRUPT_RESPONSE Send Interrupt response (CMD40 - MMC only)
ARM_MCI_BOOT_OPERATION Execute Boot operation (MMC only)
ARM_MCI_BOOT_ALTERNATIVE Execute Alternative Boot operation (MMC only)
ARM_MCI_BOOT_ACK Expect Boot Acknowledge (MMC only)
ARM_MCI_CCSD Send Command Completion Signal Disable (CCSD) for CE-ATA device
ARM_MCI_CCS Expect Command Completion Signal (CCS) for CE-ATA device
+

Calling the function ARM_MCI_SendCommand only starts the operation. The function is non-blocking and returns as soon as the driver has started the operation. It is not allowed to call this function again until the operation is in progress.

+

After the command is sent the response is retrieved if specified with ARM_MCI_RESPONSE_xxx flags. When the command completes successfully (requested response is received without errors) the ARM_MCI_EVENT_COMMAND_COMPLETE event is generated. In case that response is requested but not received the ARM_MCI_EVENT_COMMAND_TIMEOUT event is generated instead. In case of invalid response (or CRC error) the ARM_MCI_EVENT_COMMAND_ERROR event is generated instead. Progress of command operation can be monitored by calling the ARM_MCI_GetStatus and checking the command_active flag.

+

After the command operation the data transfer operation is started if specified with ARM_MCI_TRANSFER_DATA flag. The data transfer needs to be configured before that by calling the ARM_MCI_SetupTransfer. When the data transfer completes successfully the ARM_MCI_EVENT_TRANSFER_COMPLETE event is generated. In case that data transfer is not completed in-time (specified by ARM_MCI_DATA_TIMEOUT) the ARM_MCI_EVENT_TRANSFER_TIMEOUT event is generated instead. In case of CRC errors the ARM_MCI_EVENT_TRANSFER_ERROR event is generated instead. Progress of data transfer operation can be monitored by calling the ARM_MCI_GetStatus and checking the transfer_active flag.

+

See also:

+ + +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_MCI_SetupTransfer (uint8_t * data,
uint32_t block_count,
uint32_t block_size,
uint32_t mode 
)
+
+ +

Setup read or write transfer operation.

+
Parameters
+ + + + + +
[in,out]dataPointer to data block(s) to be written or read
[in]block_countNumber of blocks
[in]block_sizeSize of a block in bytes
[in]modeTransfer mode
+
+
+
Returns
Status Error Codes
+

The function ARM_MCI_SetupTransfer prepares the data transfer operation that is initiated by calling the function ARM_MCI_SendCommand with the parameter flags = ARM_MCI_TRANSFER_DATA.

+

The parameter data is a pointer to the data to transfer.
+The parameter block_count is the number of blocks to transfer.
+The parameter block_size is the size of a block.
+The parameter mode sets the transfer mode and can have the values liste in the table below:

+ + + + + + + + + + + +
Transfer Directions Description
ARM_MCI_TRANSFER_READ Read data from MCI
ARM_MCI_TRANSFER_WRITE Write data to MCI
ARM_MCI_TRANSFER_BLOCK (default) Block Data transfer
ARM_MCI_TRANSFER_STREAM Stream Data transfer (MMC only)
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_MCI_AbortTransfer (void )
+
+ +

Abort current read/write data transfer.

+
Returns
Status Error Codes
+

The function ARM_MCI_AbortTransfer aborts the active data transfer operation initiated with ARM_MCI_SendCommand.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_MCI_Control (uint32_t control,
uint32_t arg 
)
+
+ +

Control MCI Interface.

+
Parameters
+ + + +
[in]controlOperation
[in]argArgument of operation (optional)
+
+
+
Returns
Status Error Codes
+

Th function ARM_MCI_Control controls the MCI interface and executes various operations.

+

The parameter control specifies the operation. Values for control cannot be ORed, but must be called separately in the code.
+The parameter arg provides, depending on the operation, additional information or sets values.

+
Note
For parameters, the values marked with (default) are the setting after the driver initialization.
+

The table lists values for the parameter control.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Parameter control Operation
ARM_MCI_BUS_SPEED Set the Bus Speed. The parameter arg specifies the speed in bits/s; The function returns the bus speed configured in bits/s.
ARM_MCI_BUS_SPEED_MODE Set the Bus Speed Mode. Predefined values for arg are listed in the table Bus Speed Mode.
ARM_MCI_BUS_CMD_MODE Set the CMD Line Mode. Predefined values for arg are listed in the table Bus CMD Line Mode.
ARM_MCI_BUS_DATA_WIDTH Set data bus width. Predefined values for arg are encoded in Bus Data Width.
ARM_MCI_DRIVER_STRENGTH Set driver strength. Predefined values for arg are listed in the table Driver Type
ARM_MCI_CONTROL_RESET Control optional RST_n Pin (eMMC). The parameter arg can have the values [0:inactive(default); 1:active]
ARM_MCI_CONTROL_CLOCK_IDLE Control clock generation on CLK Pin when idle. The parameter arg can have the values [0:disabled; 1:enabled]
ARM_MCI_UHS_TUNING_OPERATION Sampling clock Tuning operation (SD UHS-I). The parameter arg can have the values [0:reset; 1:execute]
ARM_MCI_UHS_TUNING_RESULT Sampling clock Tuning result (SD UHS-I). Returns [0:done; 1:in progress; -1:error]
ARM_MCI_DATA_TIMEOUT Set Data timeout; The parameter arg sets the timeout in bus cycles.
ARM_MCI_CSS_TIMEOUT Set Command Completion Signal (CCS) timeout. The parameter arg sets timeout in bus cycles.
ARM_MCI_MONITOR_SDIO_INTERRUPT Monitor SD I/O interrupt. The parameter arg can have the values [0:disabled(default); 1:enabled]. Monitoring is automatically disabled when an interrupt is recognized.
ARM_MCI_CONTROL_READ_WAIT Control Read/Wait states for SD I/O. The parameter arg can have the values [0:disabled(default); 1:enabled].
ARM_MCI_SUSPEND_TRANSFER Suspend Data transfer (SD I/O). Returns the number of remaining bytes to transfer.
ARM_MCI_RESUME_TRANSFER Resume Data transfer (SD I/O).
+

Bus Speed Mode

+

The function ARM_MCI_GetCapabilities lists the supported bus speed modes. Initially, all SD cards use a 3.3 volt electrical interface. Some SD cards can switch to 1.8 volt operation. For example, the use of ultra-high-speed (UHS) SD cards requires 1.8 volt operation and a 4-bit bus data width. The bit field ARM_MCI_CAPABILITIES.uhs_signaling encodes whether the driver supports 1.8 volt UHS signaling.

+

The control operation ARM_MCI_BUS_SPEED_MODE sets the bus speed mode using the parameter arg.

+ + + + + + + + + + + + + + + + + +
Parameter arg Bus Speed Mode
ARM_MCI_BUS_DEFAULT_SPEED (default) Set the bus speed for SD/MMC cards: Default Speed mode up to [25;26]MHz
ARM_MCI_BUS_HIGH_SPEED Set the bus speed for SD/MMC: High Speed mode up to [50;52]MHz
ARM_MCI_BUS_UHS_SDR12 Set the bus speed for SD: SDR12 (Single Data Rate) up to 25MHz, 12.5MB/s: UHS-I (Ultra High Speed) 1.8V signalling
ARM_MCI_BUS_UHS_SDR25 Set the bus speed for SD: SDR25 (Single Data Rate) up to 50MHz, 25 MB/s: UHS-I (Ultra High Speed) 1.8V signalling
ARM_MCI_BUS_UHS_SDR50 Set the bus speed for SD: SDR50 (Single Data Rate) up to 100MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signalling
ARM_MCI_BUS_UHS_SDR104 Set the bus speed for SD: SDR104 (Single Data Rate) up to 208MHz, 104 MB/s: UHS-I (Ultra High Speed) 1.8V signalling
ARM_MCI_BUS_UHS_DDR50 Set the bus speed for SD: DDR50 (Dual Data Rate) up to 50MHz, 50 MB/s: UHS-I (Ultra High Speed) 1.8V signalling
+

Bus CMD Line Mode

+

The control operation ARM_MCI_BUS_CMD_MODE sets the bus command line mode using the parameter arg.

+ + + + + + + +
Parameter arg Bus CMD Line Mode
ARM_MCI_BUS_CMD_PUSH_PULL (default) Set the Push-Pull CMD line
ARM_MCI_BUS_CMD_OPEN_DRAIN Set the Open Drain CMD line (MMC only)
+

Bus Data Width

+

Specifies the bus data width (the number of data I/O pins on the SD/MMC interface).

+

For high speed memory cards, a 4-bit bus data width should be used (or 8-bit for eMMC). The bit fields ARM_MCI_CAPABILITIES.data_width_4 and ARM_MCI_CAPABILITIES.data_width_8 encode whether the driver supports a specific bus data with.

+

The control operation ARM_MCI_BUS_DATA_WIDTH sets the bus data width using the parameter arg.

+ + + + + + + + + + + + + +
Parameter arg Bus Data Width
ARM_MCI_BUS_DATA_WIDTH_1 (default) Set the Bus data width to 1 bit
ARM_MCI_BUS_DATA_WIDTH_4 Set the Bus data width to 4 bits
ARM_MCI_BUS_DATA_WIDTH_8 Set the Bus data width to 8 bits
ARM_MCI_BUS_DATA_WIDTH_4_DDR Set the Bus data width to 4 bits, DDR (Dual Data Rate) - MMC only
ARM_MCI_BUS_DATA_WIDTH_8_DDR Set the Bus data width to 8 bits, DDR (Dual Data Rate) - MMC only
+

Driver Type

+

Specifies the interface driver type.

+

The control operation ARM_MCI_DRIVER_STRENGTH sets the interface driver type using the parameter arg.

+ + + + + + + + + + + +
Parameter arg Driver Type
ARM_MCI_DRIVER_TYPE_A Set the interface to SD UHS-I Driver Type A
ARM_MCI_DRIVER_TYPE_B (default) Set the interface to SD UHS-I Driver Type B
ARM_MCI_DRIVER_TYPE_C Set the interface to SD UHS-I Driver Type C
ARM_MCI_DRIVER_TYPE_D Set the interface to SD UHS-I Driver Type D
+

Examples:

+
// Set Bus Speed to 25MHz
+
MCIdrv->Control(ARM_MCI_BUS_SPEED, 25000000);
+
+
// Set High Speed mode
+
MCIdrv->Control(ARM_MCI_BUS_SPEED_MODE, ARM_MCI_BUS_HIGH_SPEED);
+
+
// Configure CMD line as Open Drain (MMC only)
+
MCIdrv->Control(ARM_MCI_BUS_CMD_MODE, ARM_MCI_BUS_CMD_OPEN_DRAIN);
+
+
// Set Bus Data Width = 4bits
+
MCIdrv->Control(ARM_MCI_BUS_DATA_WIDTH, ARM_MCI_BUS_DATA_WIDTH_4);
+
+
// Set SD UHS-I Driver Type B
+
MCIdrv->Control(ARM_MCI_DRIVER_STRENGTH, ARM_MCI_DRIVER_TYPE_B);
+
+
// RTS_n Pin is not active by default
+
// Assert RTS_n Pin (eMMC)
+
MCIdrv->Control(ARM_MCI_CONTROL_RESET, 1);
+
// De-assert RTS_n Pin (eMMC)
+
MCIdrv->Control(ARM_MCI_CONTROL_RESET, 0);
+
+
// Clock generation on CLK when Idle: hardware specific default behavior
+
// Enable Clock generation on CLK when Idle
+
MCIdrv->Control(ARM_MCI_CONTROL_CLOCK_IDLE, 1);
+
// Disable Clock generation on CLK when Idle
+
MCIdrv->Control(ARM_MCI_CONTROL_CLOCK_IDLE, 0);
+
+
// UHS Tuning
+
MCIdrv->Control(ARM_MCI_UHS_TUNING_OPERATION, 1); // start tuning
+
do {
+
status = MCIdrv->Control(ARM_MCI_UHS_TUNING_RESULT, 0/*argument not used*/);
+
if (status == -1) { break; /* tuning failed */ }
+
} while (status == 1);
+
+
// Set Data Timeout to 12500000 bus cycles (0.5s @25MHz Bus Speed)
+
// Default value is hardware specific (typically 2^32-1)
+
MCIdrv->Control(ARM_MCI_DATA_TIMEOUT, 12500000);
+
+
// Set CSS Timeout to 1000000 bus cycles
+
// Default value is hardware specific
+
MCIdrv->Control(ARM_MCI_CSS_TIMEOUT, 1000000);
+
+
// SD I/O Interrupt Monitoring is disabled by default
+
// Enable SD I/O Interrupt Monitoring
+
MCIdrv->Control(ARM_MCI_MONITOR_SDIO_INTERRUPT, 1);
+
// Disable SD I/O Interrupt Monitoring
+
MCIdrv->Control(ARM_MCI_MONITOR_SDIO_INTERRUPT, 0);
+
+
// Read/Wait for SD I/O is disabled by default
+
// Enable Read/Wait for SD I/O
+
MCIdrv->Control(ARM_MCI_CONTROL_READ_WAIT, 1);
+
// Disable Read/Wait for SD I/O
+
MCIdrv->Control(ARM_MCI_CONTROL_READ_WAIT, 0);
+
+
// Suspend Data transfer (SD I/O)
+
MCIdrv->Control(ARM_MCI_SUSPEND_TRANSFER, 0/*argument not used*/);
+
+
// Resume Data transfer (SD I/O)
+
MCIdrv->Control(ARM_MCI_RESUME_TRANSFER, 0/*argument not used*/);
+
+
+
+ +
+
+ + + + + + + + +
ARM_MCI_STATUS ARM_MCI_GetStatus (void )
+
+ +

Get MCI status.

+
Returns
MCI status ARM_MCI_STATUS
+

The function ARM_MCI_GetStatus returns the current MCI interface status.

+ +
+
+ +
+
+ + + + + + + + +
void ARM_MCI_SignalEvent (uint32_t event)
+
+ +

Callback function that signals a MCI Card Event.

+
Parameters
+ + +
[in]eventMCI Events
+
+
+
Returns
none
+

The function ARM_MCI_SignalEvent is a callback function registered by the function ARM_MCI_Initialize.

+

The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the data fields of the structure ARM_NAND_CAPABILITIES, which can be retrieved with the function ARM_NAND_GetCapabilities.

+

The following events can be generated:

+ + + + + + + + + + + + + + + + + + + + + + + + + +
Parameter event Bit Description supported when ARM_NAND_CAPABILITIES
ARM_MCI_EVENT_CARD_INSERTED 0 Occurs after Memory Card inserted always supported
ARM_MCI_EVENT_CARD_REMOVED 1 Occurs after Memory Card removal always supported
ARM_MCI_EVENT_COMMAND_COMPLETE 2 Occurs after command completed successfully always supported
ARM_MCI_EVENT_COMMAND_TIMEOUT 3 Occurs after command timeout always supported
ARM_MCI_EVENT_COMMAND_ERROR 4 Occurs after command response error (CRC error or invalid response) always supported
ARM_MCI_EVENT_TRANSFER_COMPLETE 5 Occurs after data transfer completed successfully always supported
ARM_MCI_EVENT_TRANSFER_TIMEOUT 6 Occurs after data transfer timeout always supported
ARM_MCI_EVENT_TRANSFER_ERROR 7 Occurs after data transfer error (CRC failed) always supported
ARM_MCI_EVENT_SDIO_INTERRUPT 8 Indicates SD I/O Interrupt data field sdio_interrupt = 1
ARM_MCI_EVENT_CCS 9 Indicates a Command Completion Signal (CCS) data field ccs = 1
ARM_MCI_EVENT_CCS_TIMEOUT 10 Indicates a Command Completion Signal (CCS) Timeout data field css_timeout = 1
+

See also:

+ + +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__interface__gr.js b/docs/Driver/html/group__mci__interface__gr.js new file mode 100644 index 0000000..0e142e6 --- /dev/null +++ b/docs/Driver/html/group__mci__interface__gr.js @@ -0,0 +1,81 @@ +var group__mci__interface__gr = +[ + [ "MCI Events", "group__mci__event__gr.html", "group__mci__event__gr" ], + [ "MCI Control Codes", "group__mci__control__gr.html", "group__mci__control__gr" ], + [ "MCI Send Command Flags", "group__mci__send__command__flags__ctrls.html", "group__mci__send__command__flags__ctrls" ], + [ "MCI Transfer Controls", "group__mci__transfer__ctrls.html", "group__mci__transfer__ctrls" ], + [ "MCI Card Power Controls", "group__mci__card__power__ctrls.html", "group__mci__card__power__ctrls" ], + [ "ARM_DRIVER_MCI", "group__mci__interface__gr.html#structARM__DRIVER__MCI", [ + [ "GetVersion", "group__mci__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__mci__interface__gr.html#a5648b4224e0346ba5e20fefc7e83aee8", null ], + [ "Initialize", "group__mci__interface__gr.html#ae51ec82c310aff0edda6220f9ebfd822", null ], + [ "Uninitialize", "group__mci__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__mci__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "CardPower", "group__mci__interface__gr.html#a73334c737658b227ef3097343d5c78bb", null ], + [ "ReadCD", "group__mci__interface__gr.html#aa4285dd6b0f9b8ca41b6710a478ad641", null ], + [ "ReadWP", "group__mci__interface__gr.html#aee6f8b38f83a51ac05cc4841524b708d", null ], + [ "SendCommand", "group__mci__interface__gr.html#affefb5c1d352082933c2fb0620b37212", null ], + [ "SetupTransfer", "group__mci__interface__gr.html#adc63bab660e8304d78faa1ac429e792b", null ], + [ "AbortTransfer", "group__mci__interface__gr.html#afa8103cc20ba96420b7471455bbb87e4", null ], + [ "Control", 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"group__mci__interface__gr.html#a13c956ba993083f1e59379968e2badbe", null ], + [ "reserved", "group__mci__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_MCI_SignalEvent_t", "group__mci__interface__gr.html#ga0d14651f6788c1ffd81544602565faf1", null ], + [ "ARM_MCI_GetVersion", "group__mci__interface__gr.html#ga3418183015dbf3025b94eebaedb00ab1", null ], + [ "ARM_MCI_GetCapabilities", "group__mci__interface__gr.html#ga7e5a78b6e6409189833a0b72a0a3c48a", null ], + [ "ARM_MCI_Initialize", "group__mci__interface__gr.html#ga6f34d4ab362e596ddaf23aac093268cf", null ], + [ "ARM_MCI_Uninitialize", "group__mci__interface__gr.html#gaef8183e77797e74997551d03646d42c2", null ], + [ "ARM_MCI_PowerControl", "group__mci__interface__gr.html#ga19752749d04ed22dc91c4294645e0244", null ], + [ "ARM_MCI_CardPower", "group__mci__interface__gr.html#gab161f80e0eda2815f3e0ebbba1314ff0", null ], + [ "ARM_MCI_ReadCD", "group__mci__interface__gr.html#ga012fca8f1ce5366fce14b708c771c635", null ], + [ "ARM_MCI_ReadWP", "group__mci__interface__gr.html#ga3d70286918405ac81fa795c7d09dc6fd", null ], + [ "ARM_MCI_SendCommand", "group__mci__interface__gr.html#ga5a431da89feabc2b4bc0c27943dff6f2", null ], + [ "ARM_MCI_SetupTransfer", "group__mci__interface__gr.html#gaaec681bcd8e6811c5743e33ee0f35ed1", null ], + [ "ARM_MCI_AbortTransfer", "group__mci__interface__gr.html#ga3dfcf7b7186b711f9b63a096be816fe5", null ], + [ "ARM_MCI_Control", "group__mci__interface__gr.html#gaec0506a2aa4ae75cf6bc02528f36fe30", null ], + [ "ARM_MCI_GetStatus", "group__mci__interface__gr.html#ga8d61aa42ce78d1864fa928c1f273cbd9", null ], + [ "ARM_MCI_SignalEvent", "group__mci__interface__gr.html#gaac2dbd1c1a98436938c5d0d6248cb700", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__interface__gr_structARM__DRIVER__MCI.js b/docs/Driver/html/group__mci__interface__gr_structARM__DRIVER__MCI.js new file mode 100644 index 0000000..198dae3 --- /dev/null +++ b/docs/Driver/html/group__mci__interface__gr_structARM__DRIVER__MCI.js @@ -0,0 +1,16 @@ +var group__mci__interface__gr_structARM__DRIVER__MCI = +[ + [ "GetVersion", "group__mci__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__mci__interface__gr.html#a5648b4224e0346ba5e20fefc7e83aee8", null ], + [ "Initialize", "group__mci__interface__gr.html#ae51ec82c310aff0edda6220f9ebfd822", null ], + [ "Uninitialize", "group__mci__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__mci__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "CardPower", "group__mci__interface__gr.html#a73334c737658b227ef3097343d5c78bb", null ], + [ "ReadCD", "group__mci__interface__gr.html#aa4285dd6b0f9b8ca41b6710a478ad641", null ], + [ "ReadWP", "group__mci__interface__gr.html#aee6f8b38f83a51ac05cc4841524b708d", null ], + [ "SendCommand", "group__mci__interface__gr.html#affefb5c1d352082933c2fb0620b37212", null ], + [ "SetupTransfer", "group__mci__interface__gr.html#adc63bab660e8304d78faa1ac429e792b", null ], + [ "AbortTransfer", "group__mci__interface__gr.html#afa8103cc20ba96420b7471455bbb87e4", null ], + [ "Control", "group__mci__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "GetStatus", "group__mci__interface__gr.html#a2dc63353d6869c0ea2d3d29155c88b49", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__interface__gr_structARM__MCI__CAPABILITIES.js b/docs/Driver/html/group__mci__interface__gr_structARM__MCI__CAPABILITIES.js new file mode 100644 index 0000000..7d123a0 --- /dev/null +++ b/docs/Driver/html/group__mci__interface__gr_structARM__MCI__CAPABILITIES.js @@ -0,0 +1,33 @@ +var group__mci__interface__gr_structARM__MCI__CAPABILITIES = +[ + [ "cd_state", "group__mci__interface__gr.html#af47e73979b028c86c7c1fbe39b095140", null ], + [ "cd_event", "group__mci__interface__gr.html#abcabfa504d3226c723d9bf5debe2f164", null ], + [ "wp_state", "group__mci__interface__gr.html#a02df0162d3a653c36158a7b6a76f6175", null ], + [ "vdd", "group__mci__interface__gr.html#a414baec222a72be862e262f02b821dce", null ], + [ "vdd_1v8", "group__mci__interface__gr.html#abeb0330f882ebed8cabde782652233dd", null ], + [ "vccq", "group__mci__interface__gr.html#ab1cdfce6eb051bed7b904e0fd1719afa", null ], + [ "vccq_1v8", "group__mci__interface__gr.html#a1896a7548bb6fab285f23cc0d0b23d7d", null ], + [ "vccq_1v2", "group__mci__interface__gr.html#af4f95215005e38700ef527714932b361", null ], + [ "data_width_4", "group__mci__interface__gr.html#a950669a8c88b49c8da4c56163b45a79d", null ], + [ "data_width_8", "group__mci__interface__gr.html#a808703d6c70a501464e156e55f5cabd2", null ], + [ "data_width_4_ddr", "group__mci__interface__gr.html#abb1a604b0ee4f7e3510409747890e41e", null ], + [ "data_width_8_ddr", "group__mci__interface__gr.html#acd5f6dce3a548d12c292e8cd17e4e9e2", null ], + [ "high_speed", "group__mci__interface__gr.html#a83ecf7d4472c55362750ef72d8f8f47d", null ], + [ "uhs_signaling", "group__mci__interface__gr.html#a084188480d589cdc8d3e164b9f41bea9", null ], + [ "uhs_tuning", "group__mci__interface__gr.html#a617bf7fb73b49a20398b90098ecc3ec0", null ], + [ "uhs_sdr50", "group__mci__interface__gr.html#a5c3dcb2f8aa6f65408d9a6741abb7b3e", null ], + [ "uhs_sdr104", "group__mci__interface__gr.html#ae07ceef1800252495a79f225142740e7", null ], + [ "uhs_ddr50", "group__mci__interface__gr.html#a1ee73c19020d5f1bedf7c013d0e5f730", null ], + [ "uhs_driver_type_a", "group__mci__interface__gr.html#afe5de4fdc6657aa19fa87577a8d460e5", null ], + [ "uhs_driver_type_c", "group__mci__interface__gr.html#a3c3df9641e7216dd20d3bc395dc4948f", null ], + [ "uhs_driver_type_d", "group__mci__interface__gr.html#a639bebbcb9a3a743f4f232fec82e2bfc", null ], + [ "sdio_interrupt", "group__mci__interface__gr.html#a61e2a440b27d7d22c866ad4427f4b825", null ], + [ "read_wait", "group__mci__interface__gr.html#a5e38e4ee9cebcc99904e287adc8e6217", null ], + [ "suspend_resume", "group__mci__interface__gr.html#abb03f0187e4658f417b5a24cac33eed9", null ], + [ "mmc_interrupt", "group__mci__interface__gr.html#a3303194ea68bd1094841d4f958f6dbbf", null ], + [ "mmc_boot", "group__mci__interface__gr.html#a072a194948489d4dbd2409b94fdca56b", null ], + [ "rst_n", "group__mci__interface__gr.html#a2e8bd27f2c5c3093c4fec557890b97d4", null ], + [ "ccs", "group__mci__interface__gr.html#a13c956ba993083f1e59379968e2badbe", null ], + [ "ccs_timeout", "group__mci__interface__gr.html#a9739c230a13b46482feb5475d257e482", null ], + [ "reserved", "group__mci__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__interface__gr_structARM__MCI__STATUS.js b/docs/Driver/html/group__mci__interface__gr_structARM__MCI__STATUS.js new file mode 100644 index 0000000..4a6ed9d --- /dev/null +++ b/docs/Driver/html/group__mci__interface__gr_structARM__MCI__STATUS.js @@ -0,0 +1,12 @@ +var group__mci__interface__gr_structARM__MCI__STATUS = +[ + [ "command_active", "group__mci__interface__gr.html#aa22ef7c7597e90835bd67d5795ba757e", null ], + [ "command_timeout", "group__mci__interface__gr.html#a56e426979c3872254c156e9ae7eead5b", null ], + [ "command_error", "group__mci__interface__gr.html#afca11cd2ce661c67455a6d75328848cc", null ], + [ "transfer_active", "group__mci__interface__gr.html#a2655d3422b720097b091a28e8bbcea8f", null ], + [ "transfer_timeout", "group__mci__interface__gr.html#a598ae4a196316d6dcb97d07fd337ecdd", null ], + [ "transfer_error", "group__mci__interface__gr.html#a21d4bc1a03e161bd33693619039a6afa", null ], + [ "sdio_interrupt", "group__mci__interface__gr.html#a61e2a440b27d7d22c866ad4427f4b825", null ], + [ "ccs", "group__mci__interface__gr.html#a13c956ba993083f1e59379968e2badbe", null ], + [ "reserved", "group__mci__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__mode__ctrls.html b/docs/Driver/html/group__mci__mode__ctrls.html new file mode 100644 index 0000000..a796623 --- /dev/null +++ b/docs/Driver/html/group__mci__mode__ctrls.html @@ -0,0 +1,396 @@ + + + + + +MCI Controls +CMSIS-Driver: MCI Controls + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
MCI Controls
MCI Control Codes
+
+
+ +

Configure and control the MCI interface. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_MCI_BUS_SPEED   (0x01)
 Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s. More...
 
#define ARM_MCI_BUS_SPEED_MODE   (0x02)
 Set Bus Speed Mode as specified with arg. More...
 
#define ARM_MCI_BUS_CMD_MODE   (0x03)
 Set CMD Line Mode as specified with arg. More...
 
#define ARM_MCI_BUS_DATA_WIDTH   (0x04)
 Set Bus Data Width as specified with arg. More...
 
#define ARM_MCI_DRIVER_STRENGTH   (0x05)
 Set SD UHS-I Driver Strength as specified with arg. More...
 
#define ARM_MCI_CONTROL_RESET   (0x06)
 Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active. More...
 
#define ARM_MCI_CONTROL_CLOCK_IDLE   (0x07)
 Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled. More...
 
#define ARM_MCI_UHS_TUNING_OPERATION   (0x08)
 Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute. More...
 
#define ARM_MCI_UHS_TUNING_RESULT   (0x09)
 Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error. More...
 
#define ARM_MCI_DATA_TIMEOUT   (0x0A)
 Set Data timeout; arg = timeout in bus cycles. More...
 
#define ARM_MCI_CSS_TIMEOUT   (0x0B)
 Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles. More...
 
#define ARM_MCI_MONITOR_SDIO_INTERRUPT   (0x0C)
 Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled. More...
 
#define ARM_MCI_CONTROL_READ_WAIT   (0x0D)
 Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled. More...
 
#define ARM_MCI_SUSPEND_TRANSFER   (0x0E)
 Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer. More...
 
#define ARM_MCI_RESUME_TRANSFER   (0x0F)
 Resume Data transfer (SD I/O) More...
 
+

Description

+

Configure and control the MCI interface.

+

The following codes are used as values for the parameter control of the function ARM_MCI_Control to setup the MCI interface.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_BUS_SPEED   (0x01)
+
+ +

Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_SPEED_MODE   (0x02)
+
+ +

Set Bus Speed Mode as specified with arg.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_CMD_MODE   (0x03)
+
+ +

Set CMD Line Mode as specified with arg.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BUS_DATA_WIDTH   (0x04)
+
+ +

Set Bus Data Width as specified with arg.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_DRIVER_STRENGTH   (0x05)
+
+ +

Set SD UHS-I Driver Strength as specified with arg.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_CONTROL_RESET   (0x06)
+
+ +

Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_CONTROL_CLOCK_IDLE   (0x07)
+
+ +

Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_UHS_TUNING_OPERATION   (0x08)
+
+ +

Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_UHS_TUNING_RESULT   (0x09)
+
+ +

Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_DATA_TIMEOUT   (0x0A)
+
+ +

Set Data timeout; arg = timeout in bus cycles.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_CSS_TIMEOUT   (0x0B)
+
+ +

Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_MONITOR_SDIO_INTERRUPT   (0x0C)
+
+ +

Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_CONTROL_READ_WAIT   (0x0D)
+
+ +

Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_SUSPEND_TRANSFER   (0x0E)
+
+ +

Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_RESUME_TRANSFER   (0x0F)
+
+ +

Resume Data transfer (SD I/O)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__mode__ctrls.js b/docs/Driver/html/group__mci__mode__ctrls.js new file mode 100644 index 0000000..3960852 --- /dev/null +++ b/docs/Driver/html/group__mci__mode__ctrls.js @@ -0,0 +1,18 @@ +var group__mci__mode__ctrls = +[ + [ "ARM_MCI_BUS_SPEED", "group__mci__mode__ctrls.html#ga7f982d2e5aec768307d35a83c65fb3ef", null ], + [ "ARM_MCI_BUS_SPEED_MODE", "group__mci__mode__ctrls.html#gaf7ede525eabc618fbbb9f7a294c8ed96", null ], + [ "ARM_MCI_BUS_CMD_MODE", "group__mci__mode__ctrls.html#ga8b7571e37520c07d8ef4f697f3886715", null ], + [ "ARM_MCI_BUS_DATA_WIDTH", "group__mci__mode__ctrls.html#ga876d964d0eeacdb16e93f7558a544587", null ], + [ "ARM_MCI_DRIVER_STRENGTH", "group__mci__mode__ctrls.html#ga78068f519139f2ae7b09e0608070aaf6", null ], + [ "ARM_MCI_CONTROL_RESET", "group__mci__mode__ctrls.html#ga21e403e8c3fa8cc75431a513813f0a16", null ], + [ "ARM_MCI_CONTROL_CLOCK_IDLE", "group__mci__mode__ctrls.html#ga889473fbfbdcb89aab4d53cc8a13f615", null ], + [ "ARM_MCI_UHS_TUNING_OPERATION", "group__mci__mode__ctrls.html#ga98853f60bdc085aeeccd66f7bdf22d3d", null ], + [ "ARM_MCI_UHS_TUNING_RESULT", "group__mci__mode__ctrls.html#gabd3af448e26da5657c1c5a03330476b7", null ], + [ "ARM_MCI_DATA_TIMEOUT", "group__mci__mode__ctrls.html#ga09a58821e42595f0c2e55f8cc2d32ceb", null ], + [ "ARM_MCI_CSS_TIMEOUT", "group__mci__mode__ctrls.html#gae97b1a819a5d326b1f1009b0d6d48b5a", null ], + [ "ARM_MCI_MONITOR_SDIO_INTERRUPT", "group__mci__mode__ctrls.html#ga19fd7d3b74ac48ca74a2e138b3ee9963", null ], + [ "ARM_MCI_CONTROL_READ_WAIT", "group__mci__mode__ctrls.html#gaaa10c5aa7a8108aa59c3734b3eec2e3a", null ], + [ "ARM_MCI_SUSPEND_TRANSFER", "group__mci__mode__ctrls.html#ga04cf174b0ef13240f26225bf8e45a4a0", null ], + [ "ARM_MCI_RESUME_TRANSFER", "group__mci__mode__ctrls.html#gac4907319499072fddf61f2f83b0dd966", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__send__command__flags__ctrls.html b/docs/Driver/html/group__mci__send__command__flags__ctrls.html new file mode 100644 index 0000000..68969f8 --- /dev/null +++ b/docs/Driver/html/group__mci__send__command__flags__ctrls.html @@ -0,0 +1,414 @@ + + + + + +MCI Send Command Flags +CMSIS-Driver: MCI Send Command Flags + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
MCI Send Command Flags
MCI Interface
+
+
+ +

Specify various options for sending commands to the card and the expected response. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_MCI_RESPONSE_NONE   (0UL << ARM_MCI_RESPONSE_Pos)
 No response expected (default) More...
 
#define ARM_MCI_RESPONSE_SHORT   (1UL << ARM_MCI_RESPONSE_Pos)
 Short response (48-bit) More...
 
#define ARM_MCI_RESPONSE_SHORT_BUSY   (2UL << ARM_MCI_RESPONSE_Pos)
 Short response with busy signal (48-bit) More...
 
#define ARM_MCI_RESPONSE_LONG   (3UL << ARM_MCI_RESPONSE_Pos)
 Long response (136-bit) More...
 
#define ARM_MCI_RESPONSE_INDEX   (1UL << 2)
 Check command index in response. More...
 
#define ARM_MCI_RESPONSE_CRC   (1UL << 3)
 Check CRC in response. More...
 
#define ARM_MCI_WAIT_BUSY   (1UL << 4)
 Wait until busy before sending the command. More...
 
#define ARM_MCI_TRANSFER_DATA   (1UL << 5)
 Activate Data transfer. More...
 
#define ARM_MCI_CARD_INITIALIZE   (1UL << 6)
 Execute Memory Card initialization sequence. More...
 
#define ARM_MCI_INTERRUPT_COMMAND   (1UL << 7)
 Send Interrupt command (CMD40 - MMC only) More...
 
#define ARM_MCI_INTERRUPT_RESPONSE   (1UL << 8)
 Send Interrupt response (CMD40 - MMC only) More...
 
#define ARM_MCI_BOOT_OPERATION   (1UL << 9)
 Execute Boot operation (MMC only) More...
 
#define ARM_MCI_BOOT_ALTERNATIVE   (1UL << 10)
 Execute Alternative Boot operation (MMC only) More...
 
#define ARM_MCI_BOOT_ACK   (1UL << 11)
 Expect Boot Acknowledge (MMC only) More...
 
#define ARM_MCI_CCSD   (1UL << 12)
 Send Command Completion Signal Disable (CCSD) for CE-ATA device. More...
 
#define ARM_MCI_CCS   (1UL << 13)
 Expect Command Completion Signal (CCS) for CE-ATA device. More...
 
+

Description

+

Specify various options for sending commands to the card and the expected response.

+

ARM_MCI_xxx flags are sent with the function ARM_MCI_SendCommand as the parameter flag. It controls the behavior of the command sent to the card and provides information about the expected response from the card.

+

The following codes are defined:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_RESPONSE_NONE   (0UL << ARM_MCI_RESPONSE_Pos)
+
+ +

No response expected (default)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_RESPONSE_SHORT   (1UL << ARM_MCI_RESPONSE_Pos)
+
+ +

Short response (48-bit)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_RESPONSE_SHORT_BUSY   (2UL << ARM_MCI_RESPONSE_Pos)
+
+ +

Short response with busy signal (48-bit)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_RESPONSE_LONG   (3UL << ARM_MCI_RESPONSE_Pos)
+
+ +

Long response (136-bit)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_RESPONSE_INDEX   (1UL << 2)
+
+ +

Check command index in response.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_RESPONSE_CRC   (1UL << 3)
+
+ +

Check CRC in response.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_WAIT_BUSY   (1UL << 4)
+
+ +

Wait until busy before sending the command.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_TRANSFER_DATA   (1UL << 5)
+
+ +

Activate Data transfer.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_CARD_INITIALIZE   (1UL << 6)
+
+ +

Execute Memory Card initialization sequence.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_INTERRUPT_COMMAND   (1UL << 7)
+
+ +

Send Interrupt command (CMD40 - MMC only)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_INTERRUPT_RESPONSE   (1UL << 8)
+
+ +

Send Interrupt response (CMD40 - MMC only)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BOOT_OPERATION   (1UL << 9)
+
+ +

Execute Boot operation (MMC only)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BOOT_ALTERNATIVE   (1UL << 10)
+
+ +

Execute Alternative Boot operation (MMC only)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_BOOT_ACK   (1UL << 11)
+
+ +

Expect Boot Acknowledge (MMC only)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_CCSD   (1UL << 12)
+
+ +

Send Command Completion Signal Disable (CCSD) for CE-ATA device.

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_CCS   (1UL << 13)
+
+ +

Expect Command Completion Signal (CCS) for CE-ATA device.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__send__command__flags__ctrls.js b/docs/Driver/html/group__mci__send__command__flags__ctrls.js new file mode 100644 index 0000000..91c5e54 --- /dev/null +++ b/docs/Driver/html/group__mci__send__command__flags__ctrls.js @@ -0,0 +1,19 @@ +var group__mci__send__command__flags__ctrls = +[ + [ "ARM_MCI_RESPONSE_NONE", "group__mci__send__command__flags__ctrls.html#ga70934cef80884e8c75fb4eebf8452118", null ], + [ "ARM_MCI_RESPONSE_SHORT", "group__mci__send__command__flags__ctrls.html#gaa5ddf1cf772b234e3c247039effd0e7b", null ], + [ "ARM_MCI_RESPONSE_SHORT_BUSY", "group__mci__send__command__flags__ctrls.html#gaa1d541b0edf32ec05e68d623c727ef9c", null ], + [ "ARM_MCI_RESPONSE_LONG", "group__mci__send__command__flags__ctrls.html#gac49c7b39a7c51bd2193e048835bec2fb", null ], + [ "ARM_MCI_RESPONSE_INDEX", "group__mci__send__command__flags__ctrls.html#ga497abf878c6e12f54cc7ddb92da76c4a", null ], + [ "ARM_MCI_RESPONSE_CRC", "group__mci__send__command__flags__ctrls.html#ga6ab3f4c1a2bf0fdb81fbcf7a5698f2de", null ], + [ "ARM_MCI_WAIT_BUSY", "group__mci__send__command__flags__ctrls.html#ga68e879799bb27a1b13baf57ed19d719d", null ], + [ "ARM_MCI_TRANSFER_DATA", "group__mci__send__command__flags__ctrls.html#ga8aa566f69aa74ed416213df6ca3267bd", null ], + [ "ARM_MCI_CARD_INITIALIZE", "group__mci__send__command__flags__ctrls.html#ga81606bd94ce782e2c3764b913f929f60", null ], + [ "ARM_MCI_INTERRUPT_COMMAND", "group__mci__send__command__flags__ctrls.html#gab2bfeedf1dc2df1872ebbcc559a7385a", null ], + [ "ARM_MCI_INTERRUPT_RESPONSE", "group__mci__send__command__flags__ctrls.html#gabc31b6b26988998c84c92a9a698fd5dc", null ], + [ "ARM_MCI_BOOT_OPERATION", "group__mci__send__command__flags__ctrls.html#gae04254f51dfd9838583206cae0a5f8f7", null ], + [ "ARM_MCI_BOOT_ALTERNATIVE", "group__mci__send__command__flags__ctrls.html#ga30bd304652d4f870ee7ce61c266a9348", null ], + [ "ARM_MCI_BOOT_ACK", "group__mci__send__command__flags__ctrls.html#ga8c55bc0a310630d49810802ccd1bb10d", null ], + [ "ARM_MCI_CCSD", "group__mci__send__command__flags__ctrls.html#gab9df5169b37621764f8bb0f93db5281a", null ], + [ "ARM_MCI_CCS", "group__mci__send__command__flags__ctrls.html#gab82c472e4ca3fca12ae3291e25997f00", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__mci__transfer__ctrls.html b/docs/Driver/html/group__mci__transfer__ctrls.html new file mode 100644 index 0000000..257855f --- /dev/null +++ b/docs/Driver/html/group__mci__transfer__ctrls.html @@ -0,0 +1,210 @@ + + + + + +MCI Transfer Controls +CMSIS-Driver: MCI Transfer Controls + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
MCI Transfer Controls
MCI Interface
+
+
+ +

Specify data transfer mode. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_MCI_TRANSFER_READ   (0UL << 0)
 Data Read Transfer (from MCI) More...
 
#define ARM_MCI_TRANSFER_WRITE   (1UL << 0)
 Data Write Transfer (to MCI) More...
 
#define ARM_MCI_TRANSFER_BLOCK   (0UL << 1)
 Block Data transfer (default) More...
 
#define ARM_MCI_TRANSFER_STREAM   (1UL << 1)
 Stream Data transfer (MMC only) More...
 
+

Description

+

Specify data transfer mode.

+

Data transfer codes specifies the transfer direction and type and are used with the function ARM_MCI_SetupTransfer as the parameter mode.

+

The following codes are defined:

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_MCI_TRANSFER_READ   (0UL << 0)
+
+ +

Data Read Transfer (from MCI)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_TRANSFER_WRITE   (1UL << 0)
+
+ +

Data Write Transfer (to MCI)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_TRANSFER_BLOCK   (0UL << 1)
+
+ +

Block Data transfer (default)

+ +
+
+ +
+
+ + + + +
#define ARM_MCI_TRANSFER_STREAM   (1UL << 1)
+
+ +

Stream Data transfer (MMC only)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__mci__transfer__ctrls.js b/docs/Driver/html/group__mci__transfer__ctrls.js new file mode 100644 index 0000000..8238ec6 --- /dev/null +++ b/docs/Driver/html/group__mci__transfer__ctrls.js @@ -0,0 +1,7 @@ +var group__mci__transfer__ctrls = +[ + [ "ARM_MCI_TRANSFER_READ", "group__mci__transfer__ctrls.html#gaa6f3be235a9dce5c66be8fe64f399846", null ], + [ "ARM_MCI_TRANSFER_WRITE", "group__mci__transfer__ctrls.html#gaddc60aab15f75993a99f98f71ddbd50c", null ], + [ "ARM_MCI_TRANSFER_BLOCK", "group__mci__transfer__ctrls.html#ga4ced782e7c0c70d5f0edbddd1e48323b", null ], + [ "ARM_MCI_TRANSFER_STREAM", "group__mci__transfer__ctrls.html#gac7db0cffd571e60758627d889ba7a432", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__bus__mode__codes.html b/docs/Driver/html/group__nand__bus__mode__codes.html new file mode 100644 index 0000000..0fdadbc --- /dev/null +++ b/docs/Driver/html/group__nand__bus__mode__codes.html @@ -0,0 +1,515 @@ + + + + + +NAND Bus Modes +CMSIS-Driver: NAND Bus Modes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
NAND Bus Modes
NAND Control Codes
+
+
+ +

Specify bus mode of the NAND interface. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_NAND_BUS_SDR   (0x00UL << ARM_NAND_BUS_INTERFACE_Pos)
 Data Interface: SDR (Single Data Rate) - Traditional interface (default) More...
 
#define ARM_NAND_BUS_DDR   (0x01UL << ARM_NAND_BUS_INTERFACE_Pos)
 Data Interface: NV-DDR (Double Data Rate) More...
 
#define ARM_NAND_BUS_DDR2   (0x02UL << ARM_NAND_BUS_INTERFACE_Pos)
 Data Interface: NV-DDR2 (Double Data Rate) More...
 
#define ARM_NAND_BUS_TIMING_MODE_0   (0x00UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 0 (default) More...
 
#define ARM_NAND_BUS_TIMING_MODE_1   (0x01UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 1. More...
 
#define ARM_NAND_BUS_TIMING_MODE_2   (0x02UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 2. More...
 
#define ARM_NAND_BUS_TIMING_MODE_3   (0x03UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 3. More...
 
#define ARM_NAND_BUS_TIMING_MODE_4   (0x04UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 4 (SDR EDO capable) More...
 
#define ARM_NAND_BUS_TIMING_MODE_5   (0x05UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 5 (SDR EDO capable) More...
 
#define ARM_NAND_BUS_TIMING_MODE_6   (0x06UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 6 (NV-DDR2 only) More...
 
#define ARM_NAND_BUS_TIMING_MODE_7   (0x07UL << ARM_NAND_BUS_TIMING_MODE_Pos)
 Timing Mode 7 (NV-DDR2 only) More...
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_0   (0x00UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
 DDR2 Data Output Warm-up cycles: 0 (default) More...
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_1   (0x01UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
 DDR2 Data Output Warm-up cycles: 1. More...
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_2   (0x02UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
 DDR2 Data Output Warm-up cycles: 2. More...
 
#define ARM_NAND_BUS_DDR2_DO_WCYC_4   (0x03UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
 DDR2 Data Output Warm-up cycles: 4. More...
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_0   (0x00UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
 DDR2 Data Input Warm-up cycles: 0 (default) More...
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_1   (0x01UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
 DDR2 Data Input Warm-up cycles: 1. More...
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_2   (0x02UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
 DDR2 Data Input Warm-up cycles: 2. More...
 
#define ARM_NAND_BUS_DDR2_DI_WCYC_4   (0x03UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
 DDR2 Data Input Warm-up cycles: 4. More...
 
#define ARM_NAND_BUS_DDR2_VEN   (1UL << 16)
 DDR2 Enable external VREFQ as reference. More...
 
#define ARM_NAND_BUS_DDR2_CMPD   (1UL << 17)
 DDR2 Enable complementary DQS (DQS_c) signal. More...
 
#define ARM_NAND_BUS_DDR2_CMPR   (1UL << 18)
 DDR2 Enable complementary RE_n (RE_c) signal. More...
 
+

Description

+

Specify bus mode of the NAND interface.

+

The defines can be used in the function ARM_NAND_Control for the parameter arg and with the ARM_NAND_BUS_MODE as the control code.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_NAND_BUS_SDR   (0x00UL << ARM_NAND_BUS_INTERFACE_Pos)
+
+ +

Data Interface: SDR (Single Data Rate) - Traditional interface (default)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR   (0x01UL << ARM_NAND_BUS_INTERFACE_Pos)
+
+ +

Data Interface: NV-DDR (Double Data Rate)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2   (0x02UL << ARM_NAND_BUS_INTERFACE_Pos)
+
+ +

Data Interface: NV-DDR2 (Double Data Rate)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_TIMING_MODE_0   (0x00UL << ARM_NAND_BUS_TIMING_MODE_Pos)
+
+ +

Timing Mode 0 (default)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_TIMING_MODE_1   (0x01UL << ARM_NAND_BUS_TIMING_MODE_Pos)
+
+ +

Timing Mode 1.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_TIMING_MODE_2   (0x02UL << ARM_NAND_BUS_TIMING_MODE_Pos)
+
+ +

Timing Mode 2.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_TIMING_MODE_3   (0x03UL << ARM_NAND_BUS_TIMING_MODE_Pos)
+
+ +

Timing Mode 3.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_TIMING_MODE_4   (0x04UL << ARM_NAND_BUS_TIMING_MODE_Pos)
+
+ +

Timing Mode 4 (SDR EDO capable)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_TIMING_MODE_5   (0x05UL << ARM_NAND_BUS_TIMING_MODE_Pos)
+
+ +

Timing Mode 5 (SDR EDO capable)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_TIMING_MODE_6   (0x06UL << ARM_NAND_BUS_TIMING_MODE_Pos)
+
+ +

Timing Mode 6 (NV-DDR2 only)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_TIMING_MODE_7   (0x07UL << ARM_NAND_BUS_TIMING_MODE_Pos)
+
+ +

Timing Mode 7 (NV-DDR2 only)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_DO_WCYC_0   (0x00UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
+
+ +

DDR2 Data Output Warm-up cycles: 0 (default)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_DO_WCYC_1   (0x01UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
+
+ +

DDR2 Data Output Warm-up cycles: 1.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_DO_WCYC_2   (0x02UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
+
+ +

DDR2 Data Output Warm-up cycles: 2.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_DO_WCYC_4   (0x03UL << ARM_NAND_BUS_DDR2_DO_WCYC_Pos)
+
+ +

DDR2 Data Output Warm-up cycles: 4.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_DI_WCYC_0   (0x00UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
+
+ +

DDR2 Data Input Warm-up cycles: 0 (default)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_DI_WCYC_1   (0x01UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
+
+ +

DDR2 Data Input Warm-up cycles: 1.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_DI_WCYC_2   (0x02UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
+
+ +

DDR2 Data Input Warm-up cycles: 2.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_DI_WCYC_4   (0x03UL << ARM_NAND_BUS_DDR2_DI_WCYC_Pos)
+
+ +

DDR2 Data Input Warm-up cycles: 4.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_VEN   (1UL << 16)
+
+ +

DDR2 Enable external VREFQ as reference.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_CMPD   (1UL << 17)
+
+ +

DDR2 Enable complementary DQS (DQS_c) signal.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DDR2_CMPR   (1UL << 18)
+
+ +

DDR2 Enable complementary RE_n (RE_c) signal.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__nand__bus__mode__codes.js b/docs/Driver/html/group__nand__bus__mode__codes.js new file mode 100644 index 0000000..6761cf0 --- /dev/null +++ b/docs/Driver/html/group__nand__bus__mode__codes.js @@ -0,0 +1,25 @@ +var group__nand__bus__mode__codes = +[ + [ "ARM_NAND_BUS_SDR", "group__nand__bus__mode__codes.html#gac7743aeb6411b97f9fc6a24b556f4963", null ], + [ "ARM_NAND_BUS_DDR", "group__nand__bus__mode__codes.html#ga82b8261b3d0d85881535adada318a7df", null ], + [ "ARM_NAND_BUS_DDR2", "group__nand__bus__mode__codes.html#ga13c102201d6021db184a2f068656c518", null ], + [ "ARM_NAND_BUS_TIMING_MODE_0", "group__nand__bus__mode__codes.html#ga971e574ac412bbba445055e9afc384ba", null ], + [ "ARM_NAND_BUS_TIMING_MODE_1", "group__nand__bus__mode__codes.html#ga475a339e929eca46e11bc8a7b330aa45", null ], + [ "ARM_NAND_BUS_TIMING_MODE_2", "group__nand__bus__mode__codes.html#gaed6154fb03b5516faf0bfd11d7a46309", null ], + [ "ARM_NAND_BUS_TIMING_MODE_3", "group__nand__bus__mode__codes.html#gacbc4e07e1af6ef0e4c656428e81464a9", null ], + [ "ARM_NAND_BUS_TIMING_MODE_4", "group__nand__bus__mode__codes.html#ga709d51a5215cd23ce2d85aec57141456", null ], + [ "ARM_NAND_BUS_TIMING_MODE_5", "group__nand__bus__mode__codes.html#gaee3cad14ce2b8b9af69149bf74597791", null ], + [ "ARM_NAND_BUS_TIMING_MODE_6", "group__nand__bus__mode__codes.html#ga4a3524e0eba994b3a66e06cde877f0f6", null ], + [ "ARM_NAND_BUS_TIMING_MODE_7", "group__nand__bus__mode__codes.html#gaa63d75f5f2b48a7345a066d58de1bd23", null ], + [ "ARM_NAND_BUS_DDR2_DO_WCYC_0", "group__nand__bus__mode__codes.html#ga77348df5f5c2c96bcaeec60b6da02c1b", null ], + [ "ARM_NAND_BUS_DDR2_DO_WCYC_1", "group__nand__bus__mode__codes.html#ga5839be0b4b2eb930ec039a3403b5e89e", null ], + [ "ARM_NAND_BUS_DDR2_DO_WCYC_2", "group__nand__bus__mode__codes.html#ga10a1ef3be69bfa7e6cc657bee751a077", null ], + [ "ARM_NAND_BUS_DDR2_DO_WCYC_4", "group__nand__bus__mode__codes.html#ga7f9e8416c4a4e20c4a04323e39f2100d", null ], + [ "ARM_NAND_BUS_DDR2_DI_WCYC_0", "group__nand__bus__mode__codes.html#gaeee1853dea5e96cb19d2596cc0e70169", null ], + [ "ARM_NAND_BUS_DDR2_DI_WCYC_1", "group__nand__bus__mode__codes.html#ga42560a1f046e20cc4956276156c4ce25", null ], + [ "ARM_NAND_BUS_DDR2_DI_WCYC_2", "group__nand__bus__mode__codes.html#gaad2e7807292d84a5070143626f5c2756", null ], + [ "ARM_NAND_BUS_DDR2_DI_WCYC_4", "group__nand__bus__mode__codes.html#ga3ebb54a1ae971cd34f3c8fc9ff3ab6d5", null ], + [ "ARM_NAND_BUS_DDR2_VEN", "group__nand__bus__mode__codes.html#ga465ae06a6e097959620346304182e273", null ], + [ "ARM_NAND_BUS_DDR2_CMPD", "group__nand__bus__mode__codes.html#gad38354e4a34adbf881afc7f89ff06e89", null ], + [ "ARM_NAND_BUS_DDR2_CMPR", "group__nand__bus__mode__codes.html#ga8a2d599082b9fe56cee1c6454bb3c6a1", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__control__codes.html b/docs/Driver/html/group__nand__control__codes.html new file mode 100644 index 0000000..82c654a --- /dev/null +++ b/docs/Driver/html/group__nand__control__codes.html @@ -0,0 +1,226 @@ + + + + + +NAND Mode Controls +CMSIS-Driver: NAND Mode Controls + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
NAND Mode Controls
NAND Control Codes
+
+
+ +

Specify operation modes of the NAND interface. +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_NAND_BUS_MODE   (0x01)
 Set Bus Mode as specified with arg. More...
 
#define ARM_NAND_BUS_DATA_WIDTH   (0x02)
 Set Bus Data Width as specified with arg. More...
 
#define ARM_NAND_DRIVER_STRENGTH   (0x03)
 Set Driver Strength as specified with arg. More...
 
#define ARM_NAND_DEVICE_READY_EVENT   (0x04)
 Generate ARM_NAND_EVENT_DEVICE_READY; arg: 0=disabled (default), 1=enabled. More...
 
#define ARM_NAND_DRIVER_READY_EVENT   (0x05)
 Generate ARM_NAND_EVENT_DRIVER_READY; arg: 0=disabled (default), 1=enabled. More...
 
+

Description

+

Specify operation modes of the NAND interface.

+

These controls can be used in the function ARM_NAND_Control for the parameter control.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_NAND_BUS_MODE   (0x01)
+
+ +

Set Bus Mode as specified with arg.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DATA_WIDTH   (0x02)
+
+ +

Set Bus Data Width as specified with arg.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_DRIVER_STRENGTH   (0x03)
+
+ +

Set Driver Strength as specified with arg.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_DEVICE_READY_EVENT   (0x04)
+
+ +

Generate ARM_NAND_EVENT_DEVICE_READY; arg: 0=disabled (default), 1=enabled.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_DRIVER_READY_EVENT   (0x05)
+
+ +

Generate ARM_NAND_EVENT_DRIVER_READY; arg: 0=disabled (default), 1=enabled.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__nand__control__codes.js b/docs/Driver/html/group__nand__control__codes.js new file mode 100644 index 0000000..63d6130 --- /dev/null +++ b/docs/Driver/html/group__nand__control__codes.js @@ -0,0 +1,8 @@ +var group__nand__control__codes = +[ + [ "ARM_NAND_BUS_MODE", "group__nand__control__codes.html#ga9b063c3078e86b50d4aa892518b2e2d8", null ], + [ "ARM_NAND_BUS_DATA_WIDTH", "group__nand__control__codes.html#ga2d3356f5b47871c465ae7136a2c533f4", null ], + [ "ARM_NAND_DRIVER_STRENGTH", "group__nand__control__codes.html#ga5d1d46198404fe115b013bdae7af2a2f", null ], + [ "ARM_NAND_DEVICE_READY_EVENT", "group__nand__control__codes.html#ga1bffc9f341e704ee0e845d86a2989921", null ], + [ "ARM_NAND_DRIVER_READY_EVENT", "group__nand__control__codes.html#gaab6dea1b565aeb53e360876a4e50783c", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__control__gr.html b/docs/Driver/html/group__nand__control__gr.html new file mode 100644 index 0000000..fb9da67 --- /dev/null +++ b/docs/Driver/html/group__nand__control__gr.html @@ -0,0 +1,152 @@ + + + + + +NAND Control Codes +CMSIS-Driver: NAND Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
NAND Control Codes
NAND Interface
+
+
+ +

Many parameters of the NAND driver are configured using the ARM_NAND_Control function. +More...

+ + + + + + + + + + + + + + +

+Content

 NAND Mode Controls
 Specify operation modes of the NAND interface.
 
 NAND Bus Modes
 Specify bus mode of the NAND interface.
 
 NAND Data Bus Width
 Specify data bus width of the NAND interface.
 
 NAND Driver Strength
 Specify driver strength of the NAND interface.
 
+

Description

+

Many parameters of the NAND driver are configured using the ARM_NAND_Control function.

+

Refer to the function ARM_NAND_Control for further details.

+
+
+ + + + diff --git a/docs/Driver/html/group__nand__control__gr.js b/docs/Driver/html/group__nand__control__gr.js new file mode 100644 index 0000000..1788dfd --- /dev/null +++ b/docs/Driver/html/group__nand__control__gr.js @@ -0,0 +1,7 @@ +var group__nand__control__gr = +[ + [ "NAND Mode Controls", "group__nand__control__codes.html", "group__nand__control__codes" ], + [ "NAND Bus Modes", "group__nand__bus__mode__codes.html", "group__nand__bus__mode__codes" ], + [ "NAND Data Bus Width", "group__nand__data__bus__width__codes.html", "group__nand__data__bus__width__codes" ], + [ "NAND Driver Strength", "group__nand__driver__strength__codes.html", "group__nand__driver__strength__codes" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__data__bus__width__codes.html b/docs/Driver/html/group__nand__data__bus__width__codes.html new file mode 100644 index 0000000..dbb849b --- /dev/null +++ b/docs/Driver/html/group__nand__data__bus__width__codes.html @@ -0,0 +1,175 @@ + + + + + +NAND Data Bus Width +CMSIS-Driver: NAND Data Bus Width + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
NAND Data Bus Width
NAND Control Codes
+
+
+ +

Specify data bus width of the NAND interface. +More...

+ + + + + + + + +

+Macros

#define ARM_NAND_BUS_DATA_WIDTH_8   (0x00)
 Bus Data Width: 8 bit (default) More...
 
#define ARM_NAND_BUS_DATA_WIDTH_16   (0x01)
 Bus Data Width: 16 bit. More...
 
+

Description

+

Specify data bus width of the NAND interface.

+

The defines can be used in the function ARM_NAND_Control for the parameter arg and with the ARM_NAND_BUS_DATA_WIDTH as the control code.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_NAND_BUS_DATA_WIDTH_8   (0x00)
+
+ +

Bus Data Width: 8 bit (default)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_BUS_DATA_WIDTH_16   (0x01)
+
+ +

Bus Data Width: 16 bit.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__nand__data__bus__width__codes.js b/docs/Driver/html/group__nand__data__bus__width__codes.js new file mode 100644 index 0000000..3371e54 --- /dev/null +++ b/docs/Driver/html/group__nand__data__bus__width__codes.js @@ -0,0 +1,5 @@ +var group__nand__data__bus__width__codes = +[ + [ "ARM_NAND_BUS_DATA_WIDTH_8", "group__nand__data__bus__width__codes.html#ga578051cc193ae0b7125aec8007071d21", null ], + [ "ARM_NAND_BUS_DATA_WIDTH_16", "group__nand__data__bus__width__codes.html#ga49e0e3a946a4d9f26dbd5b32ccc3b2f3", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__driver__ecc__codes.html b/docs/Driver/html/group__nand__driver__ecc__codes.html new file mode 100644 index 0000000..daa00fd --- /dev/null +++ b/docs/Driver/html/group__nand__driver__ecc__codes.html @@ -0,0 +1,196 @@ + + + + + +NAND ECC Codes +CMSIS-Driver: NAND ECC Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
NAND ECC Codes
NAND Interface
+
+
+ +

Specify ECC codes. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_NAND_ECC(n)   ((n) & ARM_NAND_ECC_INDEX_Msk)
 Select ECC. More...
 
#define ARM_NAND_ECC0   (1UL << 8)
 Use ECC0 of selected ECC. More...
 
#define ARM_NAND_ECC1   (1UL << 9)
 Use ECC1 of selected ECC. More...
 
+

Description

+

Specify ECC codes.

+

The defines can be used in the function ARM_NAND_ReadData and ARM_NAND_WriteData for the parameter mode and in the function ARM_NAND_ExecuteSequence for the parameter code.

+

Macro Definition Documentation

+ +
+
+ + + + + + + + +
#define ARM_NAND_ECC( n)   ((n) & ARM_NAND_ECC_INDEX_Msk)
+
+ +

Select ECC.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_ECC0   (1UL << 8)
+
+ +

Use ECC0 of selected ECC.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_ECC1   (1UL << 9)
+
+ +

Use ECC1 of selected ECC.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__nand__driver__ecc__codes.js b/docs/Driver/html/group__nand__driver__ecc__codes.js new file mode 100644 index 0000000..6fb0ddd --- /dev/null +++ b/docs/Driver/html/group__nand__driver__ecc__codes.js @@ -0,0 +1,6 @@ +var group__nand__driver__ecc__codes = +[ + [ "ARM_NAND_ECC", "group__nand__driver__ecc__codes.html#gac2eb4475f12a443209165d29fe200030", null ], + [ "ARM_NAND_ECC0", "group__nand__driver__ecc__codes.html#ga15c79a12200c16f953936635f930df1d", null ], + [ "ARM_NAND_ECC1", "group__nand__driver__ecc__codes.html#gaee653288a88318ee33d1db81baa69bbc", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__driver__flag__codes.html b/docs/Driver/html/group__nand__driver__flag__codes.html new file mode 100644 index 0000000..d2a0553 --- /dev/null +++ b/docs/Driver/html/group__nand__driver__flag__codes.html @@ -0,0 +1,158 @@ + + + + + +NAND Flags +CMSIS-Driver: NAND Flags + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
NAND Flags
NAND Interface
+
+
+ +

Specify Flag codes. +More...

+ + + + + +

+Macros

#define ARM_NAND_DRIVER_DONE_EVENT   (1UL << 16)
 Generate ARM_NAND_EVENT_DRIVER_DONE. More...
 
+

Description

+

Specify Flag codes.

+

The defines can be used in the function ARM_NAND_ReadData and ARM_NAND_WriteData for the parameter mode and in the function ARM_NAND_ExecuteSequence for the parameter code.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_NAND_DRIVER_DONE_EVENT   (1UL << 16)
+
+ +

Generate ARM_NAND_EVENT_DRIVER_DONE.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__nand__driver__flag__codes.js b/docs/Driver/html/group__nand__driver__flag__codes.js new file mode 100644 index 0000000..e132f2e --- /dev/null +++ b/docs/Driver/html/group__nand__driver__flag__codes.js @@ -0,0 +1,4 @@ +var group__nand__driver__flag__codes = +[ + [ "ARM_NAND_DRIVER_DONE_EVENT", "group__nand__driver__flag__codes.html#gaf40631ba62411e0ac06c3a945d608581", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__driver__seq__exec__codes.html b/docs/Driver/html/group__nand__driver__seq__exec__codes.html new file mode 100644 index 0000000..70bd570 --- /dev/null +++ b/docs/Driver/html/group__nand__driver__seq__exec__codes.html @@ -0,0 +1,362 @@ + + + + + +NAND Sequence Execution Codes +CMSIS-Driver: NAND Sequence Execution Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
NAND Sequence Execution Codes
NAND Interface
+
+
+ +

Specify execution codes. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_NAND_CODE_SEND_CMD1   (1UL << 17)
 Send Command 1. More...
 
#define ARM_NAND_CODE_SEND_ADDR_COL1   (1UL << 18)
 Send Column Address 1. More...
 
#define ARM_NAND_CODE_SEND_ADDR_COL2   (1UL << 19)
 Send Column Address 2. More...
 
#define ARM_NAND_CODE_SEND_ADDR_ROW1   (1UL << 20)
 Send Row Address 1. More...
 
#define ARM_NAND_CODE_SEND_ADDR_ROW2   (1UL << 21)
 Send Row Address 2. More...
 
#define ARM_NAND_CODE_SEND_ADDR_ROW3   (1UL << 22)
 Send Row Address 3. More...
 
#define ARM_NAND_CODE_INC_ADDR_ROW   (1UL << 23)
 Auto-increment Row Address. More...
 
#define ARM_NAND_CODE_WRITE_DATA   (1UL << 24)
 Write Data. More...
 
#define ARM_NAND_CODE_SEND_CMD2   (1UL << 25)
 Send Command 2. More...
 
#define ARM_NAND_CODE_WAIT_BUSY   (1UL << 26)
 Wait while R/Bn busy. More...
 
#define ARM_NAND_CODE_READ_DATA   (1UL << 27)
 Read Data. More...
 
#define ARM_NAND_CODE_SEND_CMD3   (1UL << 28)
 Send Command 3. More...
 
#define ARM_NAND_CODE_READ_STATUS   (1UL << 29)
 Read Status byte and check FAIL bit (bit 0) More...
 
+

Description

+

Specify execution codes.

+

The defines can be used in the function ARM_NAND_ExecuteSequence for the parameter code.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_NAND_CODE_SEND_CMD1   (1UL << 17)
+
+ +

Send Command 1.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_SEND_ADDR_COL1   (1UL << 18)
+
+ +

Send Column Address 1.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_SEND_ADDR_COL2   (1UL << 19)
+
+ +

Send Column Address 2.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_SEND_ADDR_ROW1   (1UL << 20)
+
+ +

Send Row Address 1.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_SEND_ADDR_ROW2   (1UL << 21)
+
+ +

Send Row Address 2.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_SEND_ADDR_ROW3   (1UL << 22)
+
+ +

Send Row Address 3.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_INC_ADDR_ROW   (1UL << 23)
+
+ +

Auto-increment Row Address.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_WRITE_DATA   (1UL << 24)
+
+ +

Write Data.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_SEND_CMD2   (1UL << 25)
+
+ +

Send Command 2.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_WAIT_BUSY   (1UL << 26)
+
+ +

Wait while R/Bn busy.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_READ_DATA   (1UL << 27)
+
+ +

Read Data.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_SEND_CMD3   (1UL << 28)
+
+ +

Send Command 3.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_CODE_READ_STATUS   (1UL << 29)
+
+ +

Read Status byte and check FAIL bit (bit 0)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__nand__driver__seq__exec__codes.js b/docs/Driver/html/group__nand__driver__seq__exec__codes.js new file mode 100644 index 0000000..1843f23 --- /dev/null +++ b/docs/Driver/html/group__nand__driver__seq__exec__codes.js @@ -0,0 +1,16 @@ +var group__nand__driver__seq__exec__codes = +[ + [ "ARM_NAND_CODE_SEND_CMD1", "group__nand__driver__seq__exec__codes.html#gaef90c96cd4f2309044d7d438c6b0930a", null ], + [ "ARM_NAND_CODE_SEND_ADDR_COL1", "group__nand__driver__seq__exec__codes.html#ga891bcba60ebb1195ec80c00c9bec748a", null ], + [ "ARM_NAND_CODE_SEND_ADDR_COL2", "group__nand__driver__seq__exec__codes.html#ga62a3f6ddcfb9ee317655bbec9e09bc10", null ], + [ "ARM_NAND_CODE_SEND_ADDR_ROW1", "group__nand__driver__seq__exec__codes.html#gadc001e69d1e81dc28a542237c6fe11ff", null ], + [ "ARM_NAND_CODE_SEND_ADDR_ROW2", "group__nand__driver__seq__exec__codes.html#ga5e55628cb59f5d7d35c529f04ebfcd10", null ], + [ "ARM_NAND_CODE_SEND_ADDR_ROW3", "group__nand__driver__seq__exec__codes.html#gaeb5d1be9c13b7ad2ad246d5db10cd419", null ], + [ "ARM_NAND_CODE_INC_ADDR_ROW", "group__nand__driver__seq__exec__codes.html#ga959522c98183036da32984dd5e07979b", null ], + [ "ARM_NAND_CODE_WRITE_DATA", "group__nand__driver__seq__exec__codes.html#ga1b40fc5fbf22dc4fa8130f5836e30d12", null ], + [ "ARM_NAND_CODE_SEND_CMD2", "group__nand__driver__seq__exec__codes.html#gacffafbbbca74f7ffa4cd3bb6b067c4ef", null ], + [ "ARM_NAND_CODE_WAIT_BUSY", "group__nand__driver__seq__exec__codes.html#ga0f4a8b1e97656e09f1c383852f290a37", null ], + [ "ARM_NAND_CODE_READ_DATA", "group__nand__driver__seq__exec__codes.html#gab524d840ab57c720ce8560144651dc9d", null ], + [ "ARM_NAND_CODE_SEND_CMD3", "group__nand__driver__seq__exec__codes.html#ga20f96743ab77bda14ba391dc0c3cdba5", null ], + [ "ARM_NAND_CODE_READ_STATUS", "group__nand__driver__seq__exec__codes.html#ga2250f6a532d2c0834bfdc618761ddc86", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__driver__strength__codes.html b/docs/Driver/html/group__nand__driver__strength__codes.html new file mode 100644 index 0000000..7130c1e --- /dev/null +++ b/docs/Driver/html/group__nand__driver__strength__codes.html @@ -0,0 +1,209 @@ + + + + + +NAND Driver Strength +CMSIS-Driver: NAND Driver Strength + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
NAND Driver Strength
NAND Control Codes
+
+
+ +

Specify driver strength of the NAND interface. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_NAND_DRIVER_STRENGTH_18   (0x00)
 Driver Strength 2.0x = 18 Ohms. More...
 
#define ARM_NAND_DRIVER_STRENGTH_25   (0x01)
 Driver Strength 1.4x = 25 Ohms. More...
 
#define ARM_NAND_DRIVER_STRENGTH_35   (0x02)
 Driver Strength 1.0x = 35 Ohms (default) More...
 
#define ARM_NAND_DRIVER_STRENGTH_50   (0x03)
 Driver Strength 0.7x = 50 Ohms. More...
 
+

Description

+

Specify driver strength of the NAND interface.

+

The defines can be used in the function ARM_NAND_Control for the parameter arg and with the ARM_NAND_DRIVER_STRENGTH as the control code.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_NAND_DRIVER_STRENGTH_18   (0x00)
+
+ +

Driver Strength 2.0x = 18 Ohms.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_DRIVER_STRENGTH_25   (0x01)
+
+ +

Driver Strength 1.4x = 25 Ohms.

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_DRIVER_STRENGTH_35   (0x02)
+
+ +

Driver Strength 1.0x = 35 Ohms (default)

+ +
+
+ +
+
+ + + + +
#define ARM_NAND_DRIVER_STRENGTH_50   (0x03)
+
+ +

Driver Strength 0.7x = 50 Ohms.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__nand__driver__strength__codes.js b/docs/Driver/html/group__nand__driver__strength__codes.js new file mode 100644 index 0000000..137a9e2 --- /dev/null +++ b/docs/Driver/html/group__nand__driver__strength__codes.js @@ -0,0 +1,7 @@ +var group__nand__driver__strength__codes = +[ + [ "ARM_NAND_DRIVER_STRENGTH_18", "group__nand__driver__strength__codes.html#ga942e20df12022f3bbd0e9a558ec1c7a0", null ], + [ "ARM_NAND_DRIVER_STRENGTH_25", "group__nand__driver__strength__codes.html#ga17188e039f5f87c581033327399a057d", null ], + [ "ARM_NAND_DRIVER_STRENGTH_35", "group__nand__driver__strength__codes.html#ga33562a66a5bf328eea82b2f1893a7874", null ], + [ "ARM_NAND_DRIVER_STRENGTH_50", "group__nand__driver__strength__codes.html#gaa502e2c995447037d266f939faa43223", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__execution__status.html b/docs/Driver/html/group__nand__execution__status.html new file mode 100644 index 0000000..0a3e0c9 --- /dev/null +++ b/docs/Driver/html/group__nand__execution__status.html @@ -0,0 +1,159 @@ + + + + + +Status Error Codes +CMSIS-Driver: Status Error Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Status Error Codes
NAND Interface
+
+
+ +

Negative values indicate errors (NAND has specific codes in addition to common Status Error Codes). +More...

+ + + + + +

+Macros

#define ARM_NAND_ERROR_ECC   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 ECC generation/correction failed. More...
 
+

Description

+

Negative values indicate errors (NAND has specific codes in addition to common Status Error Codes).

+

The NAND driver has additional status error codes that are listed below. Note that the NAND driver also returns the common Status Error Codes.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_NAND_ERROR_ECC   (ARM_DRIVER_ERROR_SPECIFIC - 1)
+
+ +

ECC generation/correction failed.

+

ECC generation or correction failed during ARM_NAND_ReadData, ARM_NAND_WriteData or ARM_NAND_ExecuteSequence.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__nand__execution__status.js b/docs/Driver/html/group__nand__execution__status.js new file mode 100644 index 0000000..c9cfd5e --- /dev/null +++ b/docs/Driver/html/group__nand__execution__status.js @@ -0,0 +1,4 @@ +var group__nand__execution__status = +[ + [ "ARM_NAND_ERROR_ECC", "group__nand__execution__status.html#gafebec6ac091750a47b1d59bc843c15b0", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__interface__gr.html b/docs/Driver/html/group__nand__interface__gr.html new file mode 100644 index 0000000..d6d8460 --- /dev/null +++ b/docs/Driver/html/group__nand__interface__gr.html @@ -0,0 +1,2141 @@ + + + + + +NAND Interface +CMSIS-Driver: NAND Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
NAND Interface
+
+
+ +

Driver API for NAND Flash Device Interface (Driver_NAND.h). +More...

+ + + + + + + + + + + + + + + + + + + + +

+Content

 Status Error Codes
 Negative values indicate errors (NAND has specific codes in addition to common Status Error Codes).
 
 NAND Events
 The NAND driver generates call back events that are notified via the function ARM_NAND_SignalEvent.
 
 NAND Flags
 Specify Flag codes.
 
 NAND Control Codes
 Many parameters of the NAND driver are configured using the ARM_NAND_Control function.
 
 NAND ECC Codes
 Specify ECC codes.
 
 NAND Sequence Execution Codes
 Specify execution codes.
 
+ + + + + + + + + + + + + +

+Data Structures

struct  ARM_NAND_STATUS
 NAND Status. More...
 
struct  ARM_DRIVER_NAND
 Access structure of the NAND Driver. More...
 
struct  ARM_NAND_CAPABILITIES
 NAND Driver Capabilities. More...
 
struct  ARM_NAND_ECC_INFO
 NAND ECC (Error Correction Code) Information. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_NAND_SignalEvent_t )(uint32_t dev_num, uint32_t event)
 Pointer to ARM_NAND_SignalEvent : Signal NAND Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_NAND_GetVersion (void)
 Get driver version. More...
 
ARM_NAND_CAPABILITIES ARM_NAND_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_NAND_Initialize (ARM_NAND_SignalEvent_t cb_event)
 Initialize the NAND Interface. More...
 
int32_t ARM_NAND_Uninitialize (void)
 De-initialize the NAND Interface. More...
 
int32_t ARM_NAND_PowerControl (ARM_POWER_STATE state)
 Control the NAND interface power. More...
 
int32_t ARM_NAND_DevicePower (uint32_t voltage)
 Set device power supply voltage. More...
 
int32_t ARM_NAND_WriteProtect (uint32_t dev_num, bool enable)
 Control WPn (Write Protect). More...
 
int32_t ARM_NAND_ChipEnable (uint32_t dev_num, bool enable)
 Control CEn (Chip Enable). More...
 
int32_t ARM_NAND_GetDeviceBusy (uint32_t dev_num)
 Get Device Busy pin state. More...
 
int32_t ARM_NAND_SendCommand (uint32_t dev_num, uint8_t cmd)
 Send command to NAND device. More...
 
int32_t ARM_NAND_SendAddress (uint32_t dev_num, uint8_t addr)
 Send address to NAND device. More...
 
int32_t ARM_NAND_ReadData (uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode)
 Read data from NAND device. More...
 
int32_t ARM_NAND_WriteData (uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode)
 Write data to NAND device. More...
 
int32_t ARM_NAND_ExecuteSequence (uint32_t dev_num, uint32_t code, uint32_t cmd, uint32_t addr_col, uint32_t addr_row, void *data, uint32_t data_cnt, uint8_t *status, uint32_t *count)
 Execute sequence of operations. More...
 
int32_t ARM_NAND_AbortSequence (uint32_t dev_num)
 Abort sequence execution. More...
 
int32_t ARM_NAND_Control (uint32_t dev_num, uint32_t control, uint32_t arg)
 Control NAND Interface. More...
 
ARM_NAND_STATUS ARM_NAND_GetStatus (uint32_t dev_num)
 Get NAND status. More...
 
int32_t ARM_NAND_InquireECC (int32_t index, ARM_NAND_ECC_INFO *info)
 Inquire about available ECC. More...
 
void ARM_NAND_SignalEvent (uint32_t dev_num, uint32_t event)
 Signal NAND event. More...
 
+

Description

+

Driver API for NAND Flash Device Interface (Driver_NAND.h).

+

NAND devices are a type of non-volatile storage and do not require power to hold data. Wikipedia offers more information about the Flash Memories, including NAND.

+

Block Diagram

+

 

+
+NAND_Schematics.png +
+Simplified NAND Flash Schematic
+

 

+

NAND API

+

The following header files define the Application Programming Interface (API) for the NAND interface:

+
    +
  • Driver_NAND.h : Driver API for NAND Flash Device Interface
    • +
+

The driver implementation is a typical part of the Device Family Pack (DFP) that supports the peripherals of the microcontroller family.

+

NAND Flash is organized in pages, grouped into blocks as the smallest erasable unit. The addressing of data is archieved by byte_address = block * block_size + page_in_block * page_size + offset_in_page. In terms of this NAND API blocks and pages are referrd to as row and the byte offset within the page as col. Thus one can calculate the byte_address = row * page_size + col. The parameters page_size and block_size are device specific and must be handled by the driver user appropriately.

+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +

Example Code:

+
#include "Driver_NAND.h"
+
+
/* ONFI commands */
+
#define ONFI_CMD_READ_1ST 0x00 ///< Read 1st Cycle
+
#define ONFI_CMD_PROGRAM_2ND 0x10 ///< Page Program 2nd Cycle
+
#define ONFI_CMD_READ_2ND 0x30 ///< Read 2nd Cycle
+
#define ONFI_CMD_PROGRAM_1ST 0x80 ///< Page Program 1st Cycle
+
#define ONFI_CMD_RESET 0xFF ///< Reset Command
+
+
/* NAND Signal Event callback function */
+
volatile uint32_t NAND_Events;
+
void NAND_SignalEventCallback (uint32_t dev_num, uint32_t event) {
+
if (dev_num == 0) {
+
NAND_Events |= event;
+
}
+
else {
+
// ..
+
}
+
}
+
+
/* NAND device Power ON */
+
void PowerOn (ARM_DRIVER_NAND *drv, uint32_t dev_num) {
+
ARM_NAND_CAPABILITIES capabilities;
+
+
// Query drivers capabilities
+
capabilities = drv->GetCapabilities();
+
+
// Initialize NAND device
+
drv->Initialize (NAND_SignalEventCallback);
+
+
// Power-on NAND driver
+
drv->PowerControl (ARM_POWER_FULL);
+
+
// Turn ON device power
+
uint32_t volt = 0U;
+
+
if (capabilities.vcc) { volt |= ARM_NAND_POWER_VCC_3V3; }
+
if (capabilities.vcc_1v8) { volt |= ARM_NAND_POWER_VCC_1V8; }
+
if (capabilities.vccq) { volt |= ARM_NAND_POWER_VCCQ_3V3; }
+
if (capabilities.vccq_1v8) { volt |= ARM_NAND_POWER_VCCQ_1V8; }
+
+
if (volt != 0U) {
+
drv->DevicePower (volt);
+
}
+
+
// Setting bus mode
+
drv->Control (0U, ARM_NAND_BUS_MODE, ARM_NAND_BUS_SDR);
+
+
// Setting bus data width
+
drv->Control (0U, ARM_NAND_BUS_DATA_WIDTH, ARM_NAND_BUS_DATA_WIDTH_8);
+
+
// Enable chip manually if needed
+
if (capabilities.ce_manual) {
+
drv->ChipEnable (dev_num, true);
+
}
+
+
// Send ONFI Reset command */
+
drv->SendCommand (dev_num, ONFI_CMD_RESET);
+
}
+
+
/* NAND device Power OFF */
+
void PowerOff (ARM_DRIVER_NAND *drv, uint32_t dev_num) {
+
ARM_NAND_CAPABILITIES capabilities;
+
+
// Query drivers capabilities
+
capabilities = drv->GetCapabilities();
+
+
// Disable chip manually if needed
+
if (capabilities.ce_manual) {
+
drv->ChipEnable (0U, false);
+
}
+
+
// Switch OFF gracefully
+
uint32_t volt = 0U;
+
+
if (capabilities.vcc) { volt |= ARM_NAND_POWER_VCC_OFF; }
+
if (capabilities.vccq) { volt |= ARM_NAND_POWER_VCCQ_OFF; }
+
if (volt) {
+
drv->DevicePower (volt);
+
}
+
drv->PowerControl (ARM_POWER_OFF);
+
drv->Uninitialize ();
+
}
+
+
/* Read NAND page. */
+
void ReadPage (ARM_DRIVER_NAND *drv, uint32_t row, uint8_t *data, uint32_t cnt) {
+
uint32_t dev_num = 0; // Device number
+
uint32_t mode;
+
+
// Send Read 1st command
+
drv->SendCommand (dev_num, ONFI_CMD_READ_1ST);
+
+
// Send address (column: 2 cycles, row: 3 cycles)
+
drv->SendAddress (dev_num, 0x00);
+
drv->SendAddress (dev_num, 0x00);
+
drv->SendAddress (dev_num, (uint8_t)(row));
+
drv->SendAddress (dev_num, (uint8_t)(row >> 8));
+
drv->SendAddress (dev_num, (uint8_t)(row >> 16));
+
+
// Send Read 2nd command
+
drv->SendCommand (dev_num, ONFI_CMD_READ_2ND);
+
+
// Wait until device ready
+
while (drv->GetDeviceBusy(dev_num) == 1) { ; }
+
+
// Use ECC algorithm number 2, ECC0 (ECC over main+spare)
+
mode = ARM_NAND_ECC(2) | ARM_NAND_ECC0;
+
+
// Transfer data from the NAND chip
+
if (drv->ReadData (dev_num, data, cnt, mode | ARM_NAND_DRIVER_DONE_EVENT) != cnt) {
+
// Wait until driver done event received
+
while ((NAND_Events & ARM_NAND_DRIVER_DONE_EVENT) == 0) { ; }
+
// Read page completed
+
+
if ((NAND_Events & ARM_NAND_EVENT_ECC_ERROR) != 0) {
+
// ECC correction failed
+
}
+
}
+
}
+
+
/* Write NAND page (ExecuteSequence interface). */
+
void WritePage_Seq (ARM_DRIVER_NAND *drv, uint32_t row, const uint8_t *data, uint32_t cnt) {
+
uint32_t dev_num = 0; // Device number
+
uint32_t cmd;
+
uint32_t code;
+
uint32_t seq;
+
+
// Prepare commands to send
+
cmd = ONFI_CMD_PROGRAM_1ST | (ONFI_CMD_PROGRAM_2ND << 8);
+
+
// Construct sequence code:
+
// - Send command 1
+
// - Send 2 cycles of column address and 3 cycles of row address
+
// - Write data from memory to device
+
// - Send command 2
+
code = ARM_NAND_CODE_SEND_CMD1 |
+
ARM_NAND_CODE_SEND_ADDR_COL1 |
+
ARM_NAND_CODE_SEND_ADDR_COL2 |
+
ARM_NAND_CODE_SEND_ADDR_ROW1 |
+
ARM_NAND_CODE_SEND_ADDR_ROW2 |
+
ARM_NAND_CODE_SEND_ADDR_ROW3 |
+
ARM_NAND_CODE_WRITE_DATA |
+
ARM_NAND_CODE_SEND_CMD2 ;
+
+
// - Use ECC algorithm number 2, ECC0 (ECC over main+spare)
+
code |= ARM_NAND_ECC(2) | ARM_NAND_ECC0;
+
+
// Number of iterations in a sequence
+
seq = 1;
+
+
drv->ExecuteSequence (dev_num, // Device number
+
code, // Sequence code
+
cmd, // Command(s)
+
0, // Column address
+
row, // Row address
+
(void *)data, // Data buffer
+
cnt, // Number of data items (per iteration)
+
NULL, // Device status will not be read
+
&seq); // Number of iterations
+
+
// Wait until done
+
while (drv->GetStatus(dev_num).busy != 0) { ; }
+
+
// Page write completed
+
}
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_NAND_STATUS
+
+

NAND Status.

+

Structure with information about the status of a NAND. The data fields encode flags for the driver.

+

Returned by:

+ +
+ + + + + + + + + + +
Data Fields
+uint32_t +busy: 1 +Driver busy flag.
+uint32_t +ecc_error: 1 +ECC error detected (cleared on next Read/WriteData or ExecuteSequence)
+uint32_t +reserved: 30 +
+ +
+
+ +
+
+ + + + +
struct ARM_DRIVER_NAND
+
+

Access structure of the NAND Driver.

+

The functions of the NAND driver are accessed by function pointers exposed by this structure. Refer to Common Driver Functions for overview information.

+

Each instance of a NAND interface provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:

+
    +
  • Driver_NAND0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_NAND1 is the name of the access struct of the second instance (no. 1).
    • +
+

A middleware configuration setting allows connecting the middleware to a specific driver instance Driver_NANDn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_NAND_GetVersion : Get driver version. More...
 
ARM_NAND_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_NAND_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_NAND_SignalEvent_t cb_event)
 Pointer to ARM_NAND_Initialize : Initialize NAND Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_NAND_Uninitialize : De-initialize NAND Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_NAND_PowerControl : Control NAND Interface Power. More...
 
int32_t(* DevicePower )(uint32_t voltage)
 Pointer to ARM_NAND_DevicePower : Set device power supply voltage. More...
 
int32_t(* WriteProtect )(uint32_t dev_num, bool enable)
 Pointer to ARM_NAND_WriteProtect : Control WPn (Write Protect). More...
 
int32_t(* ChipEnable )(uint32_t dev_num, bool enable)
 Pointer to ARM_NAND_ChipEnable : Control CEn (Chip Enable). More...
 
int32_t(* GetDeviceBusy )(uint32_t dev_num)
 Pointer to ARM_NAND_GetDeviceBusy : Get Device Busy pin state. More...
 
int32_t(* SendCommand )(uint32_t dev_num, uint8_t cmd)
 Pointer to ARM_NAND_SendCommand : Send command to NAND device. More...
 
int32_t(* SendAddress )(uint32_t dev_num, uint8_t addr)
 Pointer to ARM_NAND_SendAddress : Send address to NAND device. More...
 
int32_t(* ReadData )(uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode)
 Pointer to ARM_NAND_ReadData : Read data from NAND device. More...
 
int32_t(* WriteData )(uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode)
 Pointer to ARM_NAND_WriteData : Write data to NAND device. More...
 
int32_t(* ExecuteSequence )(uint32_t dev_num, uint32_t code, uint32_t cmd, uint32_t addr_col, uint32_t addr_row, void *data, uint32_t data_cnt, uint8_t *status, uint32_t *count)
 Pointer to ARM_NAND_ExecuteSequence : Execute sequence of operations. More...
 
int32_t(* AbortSequence )(uint32_t dev_num)
 Pointer to ARM_NAND_AbortSequence : Abort sequence execution. More...
 
int32_t(* Control )(uint32_t dev_num, uint32_t control, uint32_t arg)
 Pointer to ARM_NAND_Control : Control NAND Interface. More...
 
ARM_NAND_STATUS(* GetStatus )(uint32_t dev_num)
 Pointer to ARM_NAND_GetStatus : Get NAND status. More...
 
int32_t(* InquireECC )(int32_t index, ARM_NAND_ECC_INFO *info)
 Pointer to ARM_NAND_InquireECC : Inquire about available ECC. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_NAND_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_NAND_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_NAND_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_NAND_SignalEvent_t cb_event)
+
+ +

Pointer to ARM_NAND_Initialize : Initialize NAND Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_NAND_Uninitialize : De-initialize NAND Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_NAND_PowerControl : Control NAND Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* DevicePower)(uint32_t voltage)
+
+ +

Pointer to ARM_NAND_DevicePower : Set device power supply voltage.

+ +
+
+ +
+
+ + + + +
int32_t(* WriteProtect)(uint32_t dev_num, bool enable)
+
+ +

Pointer to ARM_NAND_WriteProtect : Control WPn (Write Protect).

+ +
+
+ +
+
+ + + + +
int32_t(* ChipEnable)(uint32_t dev_num, bool enable)
+
+ +

Pointer to ARM_NAND_ChipEnable : Control CEn (Chip Enable).

+ +
+
+ +
+
+ + + + +
int32_t(* GetDeviceBusy)(uint32_t dev_num)
+
+ +

Pointer to ARM_NAND_GetDeviceBusy : Get Device Busy pin state.

+ +
+
+ +
+
+ + + + +
int32_t(* SendCommand)(uint32_t dev_num, uint8_t cmd)
+
+ +

Pointer to ARM_NAND_SendCommand : Send command to NAND device.

+ +
+
+ +
+
+ + + + +
int32_t(* SendAddress)(uint32_t dev_num, uint8_t addr)
+
+ +

Pointer to ARM_NAND_SendAddress : Send address to NAND device.

+ +
+
+ +
+
+ + + + +
int32_t(* ReadData)(uint32_t dev_num, void *data, uint32_t cnt, uint32_t mode)
+
+ +

Pointer to ARM_NAND_ReadData : Read data from NAND device.

+ +
+
+ +
+
+ + + + +
int32_t(* WriteData)(uint32_t dev_num, const void *data, uint32_t cnt, uint32_t mode)
+
+ +

Pointer to ARM_NAND_WriteData : Write data to NAND device.

+ +
+
+ +
+
+ + + + +
int32_t(* ExecuteSequence)(uint32_t dev_num, uint32_t code, uint32_t cmd, uint32_t addr_col, uint32_t addr_row, void *data, uint32_t data_cnt, uint8_t *status, uint32_t *count)
+
+ +

Pointer to ARM_NAND_ExecuteSequence : Execute sequence of operations.

+ +
+
+ +
+
+ + + + +
int32_t(* AbortSequence)(uint32_t dev_num)
+
+ +

Pointer to ARM_NAND_AbortSequence : Abort sequence execution.

+ +
+
+ +
+
+ + + + +
int32_t(* Control)(uint32_t dev_num, uint32_t control, uint32_t arg)
+
+ +

Pointer to ARM_NAND_Control : Control NAND Interface.

+ +
+
+ +
+
+ + + + +
ARM_NAND_STATUS(* GetStatus)(uint32_t dev_num)
+
+ +

Pointer to ARM_NAND_GetStatus : Get NAND status.

+ +
+
+ +
+
+ + + + +
int32_t(* InquireECC)(int32_t index, ARM_NAND_ECC_INFO *info)
+
+ +

Pointer to ARM_NAND_InquireECC : Inquire about available ECC.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_NAND_CAPABILITIES
+
+

NAND Driver Capabilities.

+

A NAND driver can be implemented with different capabilities. The data fields of this struct encode the capabilities implemented by this driver.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +event_device_ready: 1 +Signal Device Ready event (R/Bn rising edge)
+uint32_t +reentrant_operation: 1 +Supports re-entrant operation (SendCommand/Address, Read/WriteData)
+uint32_t +sequence_operation: 1 +Supports Sequence operation (ExecuteSequence, AbortSequence)
+uint32_t +vcc: 1 +Supports VCC Power Supply Control.
+uint32_t +vcc_1v8: 1 +Supports 1.8 VCC Power Supply.
+uint32_t +vccq: 1 +Supports VCCQ I/O Power Supply Control.
+uint32_t +vccq_1v8: 1 +Supports 1.8 VCCQ I/O Power Supply.
+uint32_t +vpp: 1 +Supports VPP High Voltage Power Supply Control.
+uint32_t +wp: 1 +Supports WPn (Write Protect) Control.
+uint32_t +ce_lines: 4 +Number of CEn (Chip Enable) lines: ce_lines + 1.
+uint32_t +ce_manual: 1 +Supports manual CEn (Chip Enable) Control.
+uint32_t +rb_monitor: 1 +Supports R/Bn (Ready/Busy) Monitoring.
+uint32_t +data_width_16: 1 +Supports 16-bit data.
+uint32_t +ddr: 1 +Supports NV-DDR Data Interface (ONFI)
+uint32_t +ddr2: 1 +Supports NV-DDR2 Data Interface (ONFI)
+uint32_t +sdr_timing_mode: 3 +Fastest (highest) SDR Timing Mode supported (ONFI)
+uint32_t +ddr_timing_mode: 3 +Fastest (highest) NV_DDR Timing Mode supported (ONFI)
+uint32_t +ddr2_timing_mode: 3 +Fastest (highest) NV_DDR2 Timing Mode supported (ONFI)
+uint32_t +driver_strength_18: 1 +Supports Driver Strength 2.0x = 18 Ohms.
+uint32_t +driver_strength_25: 1 +Supports Driver Strength 1.4x = 25 Ohms.
+uint32_t +driver_strength_50: 1 +Supports Driver Strength 0.7x = 50 Ohms.
+uint32_t +reserved: 2 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_NAND_ECC_INFO
+
+

NAND ECC (Error Correction Code) Information.

+

Stores the characteristics of a ECC (Error Correction Code) algorithm and provides the information about necessary application data handling in order to protect stored data from NAND bit errors.

+

ECC algorithms applied on NAND memory typically operate on NAND device page level which is virtually divided to multiple main and spare areas. Data from main and spare area is taken into account when generating ECC data which is also stored into spare area. ECC codeword defines how much data will be protected and how much ECC data will be generated.

+

To describe how application data must be organized, ECC information structure specifies protection type which defines the protected part of data. As main and spare are of different size, two different algorithms could be provided, we can describe them as ECC0 and ECC1. Type can then have the following values:

+ + + + + + + + + + + +
TypeDescription
0 ECC algorithm not used
1 ECC0 algorithm protects main data
2 ECC0 algorithm protects main and spare data
3 ECC0 algorithm protects main and ECC1 algorithm protects spare data
+

Virtual page division is described with page layout (page_layout), number of pages (page_count) and virtual page size (page_size or virtual_page_size). Virtual page size used by ECC algorithm can be defined by either page_size or virtual_page_size, depending on the page_size values:

+ + + + + + + + + + + + + + + + + + + + + + + + + +
ValueMain + Spare size
0 512 + 16
1 1024 + 32
2 2048 + 64
3 4096 + 128
4 8192 + 256
8 512 + 28
9 1024 + 56
10 2048 + 112
11 4096 + 224
12 8192 + 448
15 Not used, use virtual_page_size
+

Structure member virtual_page_size is an array of two 16-bit values. First field of array (i.e. virtual_page_size[0]) contains main area size while second (i.e. virtual_page_size[1]) contains spare area size. Number of virtual pages N is defined with page_count and must be calculated as N = 2 ^ page_count.

+

Page layout defines main and spare ordering and two different page layouts are possible. First ordering assumes that spare area follows after every main area, while in second case all main areas build one contiguous region followed by contiguous region of spare areas. This is defined by member page_layout:

+ + + + + + + +
LayoutDescription
0 Single spare follows after single main: Main0,Spare0 ... MainN-1,SpareN-1
1 Contiguous spare follows after contiguous main: Main0 ... MainN-1,Spare0 ... SpareN-1
+

ECC codeword size defines the size of data that is protected by ECC algorithm and is different for main and spare area. All structure members that define the codeword are therefore arrays of two 16-bit values. Codeword offset defines where ECC protected data starts in main (codeword_offset[0]) or spare (codeword_offset[1]) area, codeword size (codeword_size) defines the number of data that is protected i.e. data over which ECC is calculated and codeword gap (codeword_gap) defines the space between two consecutive codeword regions.

+

Generated ECC data is stored into spare area and is described similar as codeword, with offset from start of spare area (ecc_offset), size of generated data (ecc_size) and gap (ecc_gap) between two consecutive ECC data regions.

+

Number of bits that ECC algorithm can correct per codeword is defined with correctable_bits.

+

Parameter for:

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +type: 2 +Type: 1=ECC0 over Main, 2=ECC0 over Main+Spare, 3=ECC0 over Main and ECC1 over Spare.
+uint32_t +page_layout: 1 +Page layout: 0=|Main0|Spare0|...|MainN-1|SpareN-1|, 1=|Main0|...|MainN-1|Spare0|...|SpareN-1|.
+uint32_t +page_count: 3 +Number of virtual pages: N = 2 ^ page_count.
+uint32_t +page_size: 4 +Virtual Page size (Main+Spare): 0=512+16, 1=1k+32, 2=2k+64, 3=4k+128, 4=8k+256, 8=512+28, 9=1k+56, 10=2k+112, 11=4k+224, 12=8k+448, 15=Not used (extended description)
+uint32_t +reserved: 14 +Reserved (must be zero)
+uint32_t +correctable_bits: 8 +Number of correctable bits (based on 512 byte codeword size)
+uint16_t +codeword_size[2] +Number of bytes over which ECC is calculated.
+uint16_t +ecc_size[2] +ECC size in bytes (rounded up)
+uint16_t +ecc_offset[2] +ECC offset in bytes (where ECC starts in Spare)
+uint16_t +virtual_page_size[2] +Virtual Page size in bytes (Main/Spare)
+uint16_t +codeword_offset[2] +Codeword offset in bytes (where ECC protected data starts in Main/Spare)
+uint16_t +codeword_gap[2] +Codeword gap in bytes till next protected data.
+uint16_t +ecc_gap[2] +ECC gap in bytes till next generated ECC.
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_NAND_SignalEvent_t
+
+ +

Pointer to ARM_NAND_SignalEvent : Signal NAND Event.

+

Provides the typedef for the callback function ARM_NAND_SignalEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_NAND_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_NAND_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_NAND Driver_NAND0;
+
ARM_DRIVER_NAND *drv_info;
+
+
void setup_nand (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_NAND0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_NAND_CAPABILITIES ARM_NAND_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_NAND_CAPABILITIES
+

The function ARM_NAND_GetCapabilities retrieves information about capabilities in this driver implementation. The data fields of the structure ARM_NAND_CAPABILITIES encode various capabilities, for example if a hardware is able to create signal events using the ARM_NAND_SignalEvent callback function.

+

Example:

+
extern ARM_DRIVER_NAND Driver_NAND0;
+
ARM_DRIVER_NAND *drv_info;
+
+
void read_capabilities (void) {
+
ARM_NAND_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_NAND0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_NAND_Initialize (ARM_NAND_SignalEvent_t cb_event)
+
+ +

Initialize the NAND Interface.

+
Parameters
+ + +
[in]cb_eventPointer to ARM_NAND_SignalEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_Initialize initializes the NAND interface. It is called when the middleware component starts operation.

+

The function performs the following operations:

+
    +
  • Initializes the resources needed for the NAND interface.
    • +
  • Registers the ARM_NAND_SignalEvent callback function.
    • +
+

The parameter cb_event is a pointer to the ARM_NAND_SignalEvent callback function; use a NULL pointer when no callback signals are required.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_NAND_Uninitialize (void )
+
+ +

De-initialize the NAND Interface.

+
Returns
Status Error Codes
+

The function ARM_NAND_Uninitialize de-initializes the resources of NAND interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_NAND_PowerControl (ARM_POWER_STATE state)
+
+ +

Control the NAND interface power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_PowerControl controls the power modes of the NAND interface.

+

The parameter state sets the operation and can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_NAND_DevicePower (uint32_t voltage)
+
+ +

Set device power supply voltage.

+
Parameters
+ + +
[in]voltageNAND Device supply voltage
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_DevicePower controls the power supply of the NAND device.

+

The parameter voltage sets the device supply voltage as defined in the table.

+

AMR_NAND_POWER_xxx_xxx specifies power settings.

+ + + + + + + + + + + + + + + + + + + +
Device Power Bits Description
ARM_NAND_POWER_VCC_OFF Set VCC Power off
ARM_NAND_POWER_VCC_3V3 Set VCC = 3.3V
ARM_NAND_POWER_VCC_1V8 Set VCC = 1.8V
ARM_NAND_POWER_VCCQ_OFF Set VCCQ I/O Power off
ARM_NAND_POWER_VCCQ_3V3 Set VCCQ = 3.3V
ARM_NAND_POWER_VCCQ_1V8 Set VCCQ = 1.8V
ARM_NAND_POWER_VPP_OFF Set VPP off
ARM_NAND_POWER_VPP_ON Set VPP on
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_NAND_WriteProtect (uint32_t dev_num,
bool enable 
)
+
+ +

Control WPn (Write Protect).

+
Parameters
+ + + +
[in]dev_numDevice number
[in]enable
    +
  • false Write Protect off
    • +
  • true Write Protect on
    • +
+
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_WriteProtect controls the Write Protect (WPn) pin of a NAND device.

+

The parameter dev_num is the device number.
+ The parameter enable specifies whether to enable or disable write protection.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_NAND_ChipEnable (uint32_t dev_num,
bool enable 
)
+
+ +

Control CEn (Chip Enable).

+
Parameters
+ + + +
[in]dev_numDevice number
[in]enable
    +
  • false Chip Enable off
    • +
  • true Chip Enable on
    • +
+
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_ChipEnable control the Chip Enable (CEn) pin of a NAND device.

+

The parameter dev_num is the device number.
+ The parameter enable specifies whether to enable or disable the device.

+

This function is optional and supported only when the data field ce_manual = 1 in the structure ARM_NAND_CAPABILITIES. Otherwise, the Chip Enable (CEn) signal is controlled automatically by SendCommand/Address, Read/WriteData and ExecuteSequence (for example when the NAND device is connected to a memory bus).

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_NAND_GetDeviceBusy (uint32_t dev_num)
+
+ +

Get Device Busy pin state.

+
Parameters
+ + +
[in]dev_numDevice number
+
+
+
Returns
1=busy, 0=not busy, or error
+

The function ARM_NAND_GetDeviceBusy returns the status of the Device Busy pin: [1=busy; 0=not busy or error].

+

The parameter dev_num is the device number.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_NAND_SendCommand (uint32_t dev_num,
uint8_t cmd 
)
+
+ +

Send command to NAND device.

+
Parameters
+ + + +
[in]dev_numDevice number
[in]cmdCommand
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_SendCommand sends a command to the NAND device.

+

The parameter dev_num is the device number.
+The parameter cmd is the command sent to the NAND device.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_NAND_SendAddress (uint32_t dev_num,
uint8_t addr 
)
+
+ +

Send address to NAND device.

+
Parameters
+ + + +
[in]dev_numDevice number
[in]addrAddress
+
+
+
Returns
Status Error Codes
+

Send an address to the NAND device. The parameter dev_num is the device number. The parameter addr is the address.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_NAND_ReadData (uint32_t dev_num,
void * data,
uint32_t cnt,
uint32_t mode 
)
+
+ +

Read data from NAND device.

+
Parameters
+ + + + + +
[in]dev_numDevice number
[out]dataPointer to buffer for data to read from NAND device
[in]cntNumber of data items to read
[in]modeOperation mode
+
+
+
Returns
number of data items read or Status Error Codes
+

The function ARM_NAND_ReadData reads data from a NAND device.

+

The parameter dev_num is the device number.
+The parameter data is a pointer to the buffer that stores the data read from a NAND device.
+The parameter cnt is the number of data items to read.
+The parameter mode defines the operation mode as listed in the table below.

+ + + + + + + + + + + +
Read Data Mode Description
ARM_NAND_ECC(n) Select ECC
ARM_NAND_ECC0 Use ECC0 of selected ECC
ARM_NAND_ECC1 Use ECC1 of selected ECC
ARM_NAND_DRIVER_DONE_EVENT Generate ARM_NAND_EVENT_DRIVER_DONE
+

The data item size is defined by the data type, which depends on the configured data bus width.

+

Data type is:

+
    +
  • uint8_t for 8-bit data bus
    • +
  • uint16_t for 16-bit data bus
    • +
+

The function executes in the following ways:

+
    +
  • When the operation is blocking (typical for devices connected to memory bus when not using DMA), then the function returns after all data is read and returns the number of data items read.
    • +
  • When the operation is non-blocking (typical for NAND controllers), then the function only starts the operation and returns with zero number of data items read. After the operation is completed, the ARM_NAND_EVENT_DRIVER_DONE event is generated (if enabled by ARM_NAND_DRIVER_DONE_EVENT). Progress of the operation can also be monitored by calling the ARM_NAND_GetStatus function and checking the busy data field. Operation is automatically aborted if ECC is used and ECC correction fails, which generates the ARM_NAND_EVENT_ECC_ERROR event (together with ARM_NAND_DRIVER_DONE_EVENT if enabled).
    • +
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_NAND_WriteData (uint32_t dev_num,
const void * data,
uint32_t cnt,
uint32_t mode 
)
+
+ +

Write data to NAND device.

+
Parameters
+ + + + + +
[in]dev_numDevice number
[out]dataPointer to buffer with data to write to NAND device
[in]cntNumber of data items to write
[in]modeOperation mode
+
+
+
Returns
number of data items written or Status Error Codes
+

The function ARM_NAND_WriteData writes data to a NAND device.

+

The parameter dev_num is the device number.
+The parameter data is a pointer to the buffer with data to write.
+The parameter cnt is the number of data items to write.
+The parameter mode defines the operation mode as listed in the table below.

+ + + + + + + + + + + +
Write Data Mode Description
ARM_NAND_ECC(n) Select ECC
ARM_NAND_ECC0 Use ECC0 of selected ECC
ARM_NAND_ECC1 Use ECC1 of selected ECC
ARM_NAND_DRIVER_DONE_EVENT Generate ARM_NAND_EVENT_DRIVER_DONE
+

The data item size is defined by the data type, which depends on the configured data bus width.

+

Data type is:

+
    +
  • uint8_t for 8-bit data bus
    • +
  • uint16_t for 16-bit data bus
    • +
+

The function executes in the following ways:

+
    +
  • When the operation is blocking (typical for devices connected to memory bus when not using DMA), then the function returns after all data is written and returns the number of data items written.
    • +
  • When the operation is non-blocking (typical for NAND controllers), then the function only starts the operation and returns with zero number of data items written. After the operation is completed, the ARM_NAND_EVENT_DRIVER_DONE event is generated (if enabled by ARM_NAND_DRIVER_DONE_EVENT). Progress of the operation can also be monitored by calling the ARM_NAND_GetStatus function and checking the busy data field. Operation is automatically aborted if ECC is used and ECC generation fails, which generates the ARM_NAND_EVENT_ECC_ERROR event (together with ARM_NAND_DRIVER_DONE_EVENT if enabled).
    • +
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_NAND_ExecuteSequence (uint32_t dev_num,
uint32_t code,
uint32_t cmd,
uint32_t addr_col,
uint32_t addr_row,
void * data,
uint32_t data_cnt,
uint8_t * status,
uint32_t * count 
)
+
+ +

Execute sequence of operations.

+
Parameters
+ + + + + + + + + + +
[in]dev_numDevice number
[in]codeSequence code
[in]cmdCommand(s)
[in]addr_colColumn address
[in]addr_rowRow address
[in,out]dataPointer to data to be written or read
[in]data_cntNumber of data items in one iteration
[out]statusPointer to status read
[in,out]countNumber of iterations
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_ExecuteSequence executes a sequence of operations for a NAND device.

+

The parameter dev_num is the device number.
+The parameter code is the sequence encoding as defined in the table Sequence execution Code.
+The parameter cmd is the command or a series of commands.
+The parameter addr_col is the column address.
+The parameter addr_row is the row address.
+The parameter data is a pointer to the buffer that stores the data to or loads the data from.
+The parameter data_cnt is the number of data items to read or write in one iteration.
+The parameter status is a pointer to the buffer that stores the status read.
+The parameter count is a pointer to the number of iterations.
+ ARM_NAND_CODE_xxx specifies sequence execution codes.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Sequence Execution Code Description
ARM_NAND_CODE_SEND_CMD1 Send Command 1 (cmd[7..0])
ARM_NAND_CODE_SEND_ADDR_COL1 Send Column Address 1 (addr_col[7..0])
ARM_NAND_CODE_SEND_ADDR_COL2 Send Column Address 2 (addr_col[15..8])
ARM_NAND_CODE_SEND_ADDR_ROW1 Send Row Address 1 (addr_row[7..0])
ARM_NAND_CODE_SEND_ADDR_ROW2 Send Row Address 2 (addr_row[15..8])
ARM_NAND_CODE_SEND_ADDR_ROW3 Send Row Address 3 (addr_row[23..16])
ARM_NAND_CODE_INC_ADDR_ROW Auto-increment Row Address
ARM_NAND_CODE_WRITE_DATA Write Data
ARM_NAND_CODE_SEND_CMD2 Send Command 2 (cmd[15..8])
ARM_NAND_CODE_WAIT_BUSY Wait while R/Bn busy
ARM_NAND_CODE_READ_DATA Read Data
ARM_NAND_CODE_SEND_CMD3 Send Command 3 (cmd[23..16])
ARM_NAND_CODE_READ_STATUS Read Status byte and check FAIL bit (bit 0)
ARM_NAND_ECC(n) Select ECC
ARM_NAND_ECC0 Use ECC0 of selected ECC
ARM_NAND_ECC1 Use ECC1 of selected ECC
ARM_NAND_DRIVER_DONE_EVENT Generate ARM_NAND_EVENT_DRIVER_DONE
+

The data item size is defined by the data type, which depends on the configured data bus width.

+

Data type is:

+
    +
  • uint8_t for 8-bit data bus
    • +
  • uint16_t for 16-bit data bus
    • +
+

The function is non-blocking and returns as soon as the driver has started executing the specified sequence. When the operation is completed, the ARM_NAND_EVENT_DRIVER_DONE event is generated (if enabled by ARM_NAND_DRIVER_DONE_EVENT). Progress of the operation can also be monitored by calling the ARM_NAND_GetStatus function and checking the busy data field.

+

Driver executes the number of specified iterations where in each iteration items specified by ARM_NAND_CODE_xxx are executed in the order as listed in the table Sequence execution Code. The parameter count is holding the current number of iterations left.

+

Execution is automatically aborted and ARM_NAND_EVENT_DRIVER_DONE event is generated (if enabled by ARM_NAND_DRIVER_DONE_EVENT):

+
    +
  • if Read Status is enabled and the FAIL bit (bit 0) is set
    • +
  • if ECC is used and ECC fails (also sets ARM_NAND_EVENT_ECC_ERROR event)
    • +
+
Note
ARM_NAND_CODE_WAIT_BUSY can only be specified if the Device Ready event can be generated (reported by event_device_ready in ARM_NAND_CAPABILITIES). The event ARM_NAND_EVENT_DEVICE_READY is not generated during sequence execution but rather used internally by the driver.
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_NAND_AbortSequence (uint32_t dev_num)
+
+ +

Abort sequence execution.

+
Parameters
+ + +
[in]dev_numDevice number
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_AbortSequence aborts execution of the current sequence for a NAND device.

+

The parameter dev_num is the device number.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_NAND_Control (uint32_t dev_num,
uint32_t control,
uint32_t arg 
)
+
+ +

Control NAND Interface.

+
Parameters
+ + + + +
[in]dev_numDevice number
[in]controlOperation
[in]argArgument of operation
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_Control controls the NAND interface and executes operations.

+

The parameter dev_num is the device number.
+The parameter control specifies the operation.
+The parameter arg provides (depending on the control) additional information or sets values.

+

The table lists the operations for the parameter control.

+ + + + + + + + + + + + + +
Parameter control Operation
ARM_NAND_BUS_MODE Set the bus mode. The parameter arg sets the Bus Mode.
ARM_NAND_BUS_DATA_WIDTH Set the data bus width. The parameter arg sets the Bus Data Width.
ARM_NAND_DRIVER_STRENGTH Set the driver strength. The parameter arg sets the Driver Strength.
ARM_NAND_DRIVER_READY_EVENT Control generation of callback event ARM_NAND_EVENT_DRIVER_READY. Enable: arg = 1. Disable: arg = 0.
ARM_NAND_DEVICE_READY_EVENT Control generation of callback event ARM_NAND_EVENT_DEVICE_READY; Enable: arg = 1. Disable: arg = 0.
+

See Also

+ +

The table lists values for the parameter arg used with the control operation ARM_NAND_BUS_MODE, ARM_NAND_BUS_DATA_WIDTH, and ARM_NAND_DRIVER_STRENGTH. Values from different categories can be ORed.

+

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Parameter arg
+ for control = ARM_NAND_BUS_MODE 		Bit Category Description Supported when ARM_NAND_CAPABILITIES
ARM_NAND_BUS_TIMING_MODE_0 (default) 0..3 Bus Timing Mode 0 The maximum timing mode that can be applied to a specific Bus Data Interface is stored in the data fields:
+
+ sdr_timing_mode - for SDR
+ ddr_timing_mode - for NV-DDR
+ ddr2_timing_mode - for NV_DDR2
ARM_NAND_BUS_TIMING_MODE_1 1
ARM_NAND_BUS_TIMING_MODE_2 2
ARM_NAND_BUS_TIMING_MODE_3 3
ARM_NAND_BUS_TIMING_MODE_4 4 (SDR EDO capable)
ARM_NAND_BUS_TIMING_MODE_5 5 (SDR EDO capable)
ARM_NAND_BUS_TIMING_MODE_6 6 (NV-DDR2 only)
ARM_NAND_BUS_TIMING_MODE_7 7 (NV-DDR2 only)
ARM_NAND_BUS_SDR (default) 4..7 Bus Data Interface SDR (Single Data Rate) - Traditional interface always supported
ARM_NAND_BUS_DDR NV-DDR (Double Data Rate) data field ddr = 1
ARM_NAND_BUS_DDR2 NV-DDR2 (Double Data Rate) data field ddr2 = 1
ARM_NAND_BUS_DDR2_DO_WCYC_0 (default) 8..11 Data Output Warm-up Set the DDR2 Data Output Warm-up to 0 cycles Data Output Warm-up cycles are dummy cycles for interface calibration with no incremental data transfer and apply to NV-DDR2 of the Bus Data Interface.
ARM_NAND_BUS_DDR2_DO_WCYC_1 Set the DDR2 Data Output Warm-up to 1 cycles
ARM_NAND_BUS_DDR2_DO_WCYC_2 Set the DDR2 Data Output Warm-up to 2 cycles
ARM_NAND_BUS_DDR2_DO_WCYC_4 Set the DDR2 Data Output Warm-up to 4 cycles
ARM_NAND_BUS_DDR2_DI_WCYC_0 (default) 12..15 Data Input Warm-up Set the DDR2 Data Input Warm-up to 0 cycles Data Input Warm-up cycles are dummy cycles for interface calibration with no incremental data transfer and apply to NV-DDR2 of the Bus Data Interface.
ARM_NAND_BUS_DDR2_DI_WCYC_1 Set the DDR2 Data Input Warm-up to 1 cycles
ARM_NAND_BUS_DDR2_DI_WCYC_2 Set the DDR2 Data Input Warm-up to 2 cycles
ARM_NAND_BUS_DDR2_DI_WCYC_4 Set the DDR2 Data Input Warm-up to 4 cycles
ARM_NAND_BUS_DDR2_VEN 16 Miscellaneous Set the DDR2 Enable external VREFQ as reference  
ARM_NAND_BUS_DDR2_CMPD 17 Set the DDR2 Enable complementary DQS (DQS_c) signal
ARM_NAND_BUS_DDR2_CMPR 18 Set the DDR2 Enable complementary RE_n (RE_c) signal
Parameter arg
+ for control = ARM_NAND_BUS_DATA_WIDTH 		Bit Category Description Supported when ARM_NAND_CAPABILITIES
ARM_NAND_BUS_DATA_WIDTH_8 (default) 0..1 Bus Data Width Set to 8 bit always supported
ARM_NAND_BUS_DATA_WIDTH_16 Set to 16 bit data field data_width_16 = 1
Parameter arg
+ for control = ARM_NAND_DRIVER_STRENGTH 		Bit Category Description Supported when ARM_NAND_CAPABILITIES
ARM_NAND_DRIVER_STRENGTH_18 0..3 Driver Strength Set the Driver Strength 2.0x = 18 Ohms data field driver_strength_18 = 1
ARM_NAND_DRIVER_STRENGTH_25 Set the Driver Strength 1.4x = 25 Ohms data field driver_strength_25 = 1
ARM_NAND_DRIVER_STRENGTH_35 (default) Set the Driver Strength 1.0x = 35 Ohms always supported
ARM_NAND_DRIVER_STRENGTH_50 Set the Driver Strength 0.7x = 50 Ohms data field driver_strength_50 = 1
+

Example

+
extern ARM_DRIVER_NAND Driver_NAND0;
+
+
status = Driver_NAND0.Control (0, ARM_NAND_BUS_MODE, ARM_NAND_BUS_TIMING_MODE_5 |
+
ARM_NAND_BUS_DDR2 |
+
ARM_NAND_BUS_DDR2_VEN);
+
+
status = Driver_NAND0.Control (0, ARM_NAND_BUS_DATA_WIDTH, ARM_NAND_BUS_DATA_WIDTH_16);
+
+
status = Driver_NAND0.Control (0, ARM_NAND_DRIVER_STRENGTH, ARM_NAND_DRIVER_STRENGTH_50);
+
+
+
+ +
+
+ + + + + + + + +
ARM_NAND_STATUS ARM_NAND_GetStatus (uint32_t dev_num)
+
+ +

Get NAND status.

+
Parameters
+ + +
[in]dev_numDevice number
+
+
+
Returns
NAND status ARM_NAND_STATUS
+

The function ARM_NAND_GetStatus returns the current NAND device status.

+

The parameter dev_num is the device number.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_NAND_InquireECC (int32_t index,
ARM_NAND_ECC_INFO * info 
)
+
+ +

Inquire about available ECC.

+
Parameters
+ + + +
[in]indexInquire ECC index
[out]infoPointer to ECC information ARM_NAND_ECC_INFO retrieved
+
+
+
Returns
Status Error Codes
+

The function ARM_NAND_InquireECC reads error correction code information.

+

The parameter index is the ECC index and is used to retrieve different ECC configurations.
+The parameter info is a pointer of type ARM_NAND_ECC_INFO. The data fields store the information.

+

When multiple different ECC configurations exist, ARM_NAND_ECC_INFO structure exists for each configuration. Parameter index denotes which configuration will be retrieved. Value of index should start with zero to retrieve first ECC configuration and should be incremented in order to retrieve next ECC configuration. When index is out of range function ARM_NAND_InquireECC returns with error.

+

Parameter index is used by ARM_NAND_ECC(n) in ARM_NAND_ReadData, ARM_NAND_WriteData and ARM_NAND_ExecuteSequence to select suitable ECC configuration.

+

Example

+
extern ARM_DRIVER_NAND Driver_NAND0;
+
+
ARM_NAND_ECC_INFO ecc;
+
int32_t idx;
+
+
idx = 0;
+
while (Driver_NAND0.InquireECC (idx, &ecc) == ARM_DRIVER_OK) {
+
// Examine retrieved ECC configuration
+
if (ecc.type == 2) {
+
// Algorithm ECC0 protects Main+Spare
+
}
+
// ..
+
idx++;
+
}
+
+
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
void ARM_NAND_SignalEvent (uint32_t dev_num,
uint32_t event 
)
+
+ +

Signal NAND event.

+
Parameters
+ + + +
[in]dev_numDevice number
[in]eventEvent notification mask
+
+
+
Returns
none
+

The function ARM_NAND_SignalEvent is a callback function registered by the function ARM_NAND_Initialize.

+

The parameter dev_num is the device number.
+The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the data fields of the structure ARM_NAND_CAPABILITIES, which can be retrieved with the function ARM_NAND_GetCapabilities.

+

The following events can be generated:

+ + + + + + + + + + + +
Parameter event Bit Description
ARM_NAND_EVENT_DEVICE_READY 0 Occurs when rising edge is detected on R/Bn (Ready/Busy) pin indicating that the device is ready.
ARM_NAND_EVENT_DRIVER_READY 1 Occurs to indicate that commands can be executed (after previously being busy and not able to start the requested operation).
ARM_NAND_EVENT_DRIVER_DONE 2 Occurs after an operation completes. An operation was successfully started before with ARM_NAND_ReadData, ARM_NAND_WriteData, ARM_NAND_ExecuteSequence.
ARM_NAND_EVENT_ECC_ERROR 3 Occurs when ECC generation failed or ECC correction failed. An operation was successfully started before with ARM_NAND_ReadData, ARM_NAND_WriteData, ARM_NAND_ExecuteSequence.
+

The event ARM_NAND_EVENT_DEVICE_READY occurs after complete execution of commands (initiated with the functions ARM_NAND_SendCommand, ARM_NAND_SendAddress, ARM_NAND_ReadData, ARM_NAND_WriteData, ARM_NAND_ExecuteSequence). It is useful to indicate completion of complex operations (such as erase). The event is only generated when ARM_NAND_GetCapabilities returns data field event_device_ready = 1 and was enabled by calling ARM_NAND_Control (ARM_NAND_DEVICE_READY_EVENT, 1). If the event is not available, poll the busy data field using the function ARM_NAND_GetStatus.

+

The event ARM_NAND_EVENT_DRIVER_READY occurs when previously a function (ARM_NAND_SendCommand, ARM_NAND_SendAddress, ARM_NAND_ReadData, ARM_NAND_WriteData, ARM_NAND_ExecuteSequence) returned with ARM_DRIVER_ERROR_BUSY. It is useful when functions are called simultaneously from independent threads (for example to control multiple devices) and the threads have no knowledge about each other (driver rejects reentrant calls with return of ARM_DRIVER_ERROR_BUSY). dev_num indicates the device that returned previously busy.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__nand__interface__gr.js b/docs/Driver/html/group__nand__interface__gr.js new file mode 100644 index 0000000..a016f70 --- /dev/null +++ b/docs/Driver/html/group__nand__interface__gr.js @@ -0,0 +1,93 @@ +var group__nand__interface__gr = +[ + [ "Status Error Codes", "group__nand__execution__status.html", "group__nand__execution__status" ], + [ "NAND Events", "group__NAND__events.html", "group__NAND__events" ], + [ "NAND Flags", "group__nand__driver__flag__codes.html", "group__nand__driver__flag__codes" ], + [ "NAND Control Codes", "group__nand__control__gr.html", "group__nand__control__gr" ], + [ "NAND ECC Codes", "group__nand__driver__ecc__codes.html", "group__nand__driver__ecc__codes" ], + [ "NAND Sequence Execution Codes", "group__nand__driver__seq__exec__codes.html", "group__nand__driver__seq__exec__codes" ], + [ "ARM_NAND_STATUS", "group__nand__interface__gr.html#structARM__NAND__STATUS", [ + [ "busy", "group__nand__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a", null ], + [ "ecc_error", "group__nand__interface__gr.html#a7707d2200a3bf8f49b148ffc8ded7636", null ], + [ "reserved", "group__nand__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_DRIVER_NAND", "group__nand__interface__gr.html#structARM__DRIVER__NAND", [ + [ "GetVersion", "group__nand__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__nand__interface__gr.html#adab9d081aee3e5d1f83c6911e45ceaa6", null ], + [ "Initialize", "group__nand__interface__gr.html#a28b29ab7b6114bb97175bd40d18854ac", null ], + [ "Uninitialize", "group__nand__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__nand__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "DevicePower", "group__nand__interface__gr.html#a9ba6f3066cda5c8d781c309a17315a58", null ], + [ "WriteProtect", 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"group__nand__interface__gr.html#aa43ee108ee5bf29e40485ca89b34188b", null ], + [ "InquireECC", "group__nand__interface__gr.html#aecd239806e9f08b77ce0d00f61e78cf8", null ] + ] ], + [ "ARM_NAND_CAPABILITIES", "group__nand__interface__gr.html#structARM__NAND__CAPABILITIES", [ + [ "event_device_ready", "group__nand__interface__gr.html#a5f347e9b63764bbb657f52dc20682128", null ], + [ "reentrant_operation", "group__nand__interface__gr.html#ae0514834750c7452431717a881471e2b", null ], + [ "sequence_operation", "group__nand__interface__gr.html#afa4b798731b1154878c26dda3f090acf", null ], + [ "vcc", "group__nand__interface__gr.html#a35cfa22b2140b109fe24b97c42d5a5ed", null ], + [ "vcc_1v8", "group__nand__interface__gr.html#a0e7d3b9258d468492b22de55d855a06e", null ], + [ "vccq", "group__nand__interface__gr.html#ab1cdfce6eb051bed7b904e0fd1719afa", null ], + [ "vccq_1v8", "group__nand__interface__gr.html#a1896a7548bb6fab285f23cc0d0b23d7d", null ], + [ "vpp", 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"group__nand__interface__gr.html#a6d9b66da0e56d04d545e0bb6841891b2", null ], + [ "driver_strength_18", "group__nand__interface__gr.html#ae672b2a65dd3d0b93812c088491c4552", null ], + [ "driver_strength_25", "group__nand__interface__gr.html#ae87c19872b838dac7d3136a3fd466f6a", null ], + [ "driver_strength_50", "group__nand__interface__gr.html#aef3d6e1522a6cf7fb87fd113dcd43ad5", null ], + [ "reserved", "group__nand__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_NAND_ECC_INFO", "group__nand__interface__gr.html#structARM__NAND__ECC__INFO", [ + [ "type", "group__nand__interface__gr.html#ad44b615021ed3ccb734fcaf583ef4a03", null ], + [ "page_layout", "group__nand__interface__gr.html#a5952ba4313bda7833fefd358f5aff979", null ], + [ "page_count", "group__nand__interface__gr.html#aa993bc236650aa405b01d00b7ca72904", null ], + [ "page_size", "group__nand__interface__gr.html#a9dd3e47e968a8f6beb5d88c6d1b7ebe9", null ], + [ "reserved", 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"group__nand__interface__gr.html#ga01255fd4f15e7fa4751c7ea59648ef5a", null ], + [ "ARM_NAND_GetCapabilities", "group__nand__interface__gr.html#ga9f2609975c2008d21b9ae28f15daf147", null ], + [ "ARM_NAND_Initialize", "group__nand__interface__gr.html#ga74ad34718a595e7a4375b90f33e72750", null ], + [ "ARM_NAND_Uninitialize", "group__nand__interface__gr.html#gaa788b638ab696b166fee2f4a4bc8d97a", null ], + [ "ARM_NAND_PowerControl", "group__nand__interface__gr.html#ga9c9975637980b5d42db7baba0191fda1", null ], + [ "ARM_NAND_DevicePower", "group__nand__interface__gr.html#ga11adcbaaace09746581a36befbd563c9", null ], + [ "ARM_NAND_WriteProtect", "group__nand__interface__gr.html#ga1987e65a4e756d748db86332c9fb1cec", null ], + [ "ARM_NAND_ChipEnable", "group__nand__interface__gr.html#ga1c0cba87cb7b706ad5986dc67c831ad1", null ], + [ "ARM_NAND_GetDeviceBusy", "group__nand__interface__gr.html#ga43011066306bd716b580e6aa9a80cf65", null ], + [ "ARM_NAND_SendCommand", "group__nand__interface__gr.html#ga9f70b89ba478eadfe7f5dee7453a4fb7", null ], + [ "ARM_NAND_SendAddress", "group__nand__interface__gr.html#ga00e195031e03d364db7595858a7e76f3", null ], + [ "ARM_NAND_ReadData", "group__nand__interface__gr.html#gae1899a20ef107400c8bf84fad477a8ce", null ], + [ "ARM_NAND_WriteData", "group__nand__interface__gr.html#ga1fa497dd51a86fc308e946b4419fd006", null ], + [ "ARM_NAND_ExecuteSequence", "group__nand__interface__gr.html#ga8a0108dba757a4610475151144b52825", null ], + [ "ARM_NAND_AbortSequence", "group__nand__interface__gr.html#ga00832861f018db0d8368900b099ecd30", null ], + [ "ARM_NAND_Control", "group__nand__interface__gr.html#ga83061d6d53ffb148853efbc87a864607", null ], + [ "ARM_NAND_GetStatus", "group__nand__interface__gr.html#ga4578642f37a556b58b0bba0ad5d42641", null ], + [ "ARM_NAND_InquireECC", "group__nand__interface__gr.html#gac21425454d586ef48fdfc35e7bd78947", null ], + [ "ARM_NAND_SignalEvent", "group__nand__interface__gr.html#gaf4ce80b0fd6717de7ddfb1cfaf7dd754", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__interface__gr_structARM__DRIVER__NAND.js b/docs/Driver/html/group__nand__interface__gr_structARM__DRIVER__NAND.js new file mode 100644 index 0000000..6dfa4a9 --- /dev/null +++ b/docs/Driver/html/group__nand__interface__gr_structARM__DRIVER__NAND.js @@ -0,0 +1,21 @@ +var group__nand__interface__gr_structARM__DRIVER__NAND = +[ + [ "GetVersion", "group__nand__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__nand__interface__gr.html#adab9d081aee3e5d1f83c6911e45ceaa6", null ], + [ "Initialize", "group__nand__interface__gr.html#a28b29ab7b6114bb97175bd40d18854ac", null ], + [ "Uninitialize", "group__nand__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__nand__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "DevicePower", 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null ], + [ "ddr2", "group__nand__interface__gr.html#ae086693990cbd5d628014c0fcc7c1f2c", null ], + [ "sdr_timing_mode", "group__nand__interface__gr.html#a21036f2047273d90c0af0e97031df5a9", null ], + [ "ddr_timing_mode", "group__nand__interface__gr.html#a00c1f5db7d7c4abe7556733c36da7783", null ], + [ "ddr2_timing_mode", "group__nand__interface__gr.html#a6d9b66da0e56d04d545e0bb6841891b2", null ], + [ "driver_strength_18", "group__nand__interface__gr.html#ae672b2a65dd3d0b93812c088491c4552", null ], + [ "driver_strength_25", "group__nand__interface__gr.html#ae87c19872b838dac7d3136a3fd466f6a", null ], + [ "driver_strength_50", "group__nand__interface__gr.html#aef3d6e1522a6cf7fb87fd113dcd43ad5", null ], + [ "reserved", "group__nand__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__interface__gr_structARM__NAND__ECC__INFO.js b/docs/Driver/html/group__nand__interface__gr_structARM__NAND__ECC__INFO.js new file mode 100644 index 0000000..9dae9a0 --- /dev/null +++ b/docs/Driver/html/group__nand__interface__gr_structARM__NAND__ECC__INFO.js @@ -0,0 +1,16 @@ +var group__nand__interface__gr_structARM__NAND__ECC__INFO = +[ + [ "type", "group__nand__interface__gr.html#ad44b615021ed3ccb734fcaf583ef4a03", null ], + [ "page_layout", "group__nand__interface__gr.html#a5952ba4313bda7833fefd358f5aff979", null ], + [ "page_count", "group__nand__interface__gr.html#aa993bc236650aa405b01d00b7ca72904", null ], + [ "page_size", "group__nand__interface__gr.html#a9dd3e47e968a8f6beb5d88c6d1b7ebe9", null ], + [ "reserved", "group__nand__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ], + [ "correctable_bits", "group__nand__interface__gr.html#ae65f920c4ad99fd0c6bdf5fd8c4d161a", null ], + [ "codeword_size", "group__nand__interface__gr.html#ae8cff208d9efb5067d38ced675916c66", null ], + [ "ecc_size", "group__nand__interface__gr.html#a22365f6a2af1171a1c3629c8ae5fe001", null ], + [ "ecc_offset", "group__nand__interface__gr.html#a22d6a1813a47a7044f7acb478f8e9eb8", null ], + [ "virtual_page_size", "group__nand__interface__gr.html#aa270f95e67fdf1e9137c61f2045b7636", null ], + [ "codeword_offset", "group__nand__interface__gr.html#a31c5b0e899b2d60adb6cdef971633db0", null ], + [ "codeword_gap", "group__nand__interface__gr.html#ae0a2b8415bddd99dade9cbcf8c52186a", null ], + [ "ecc_gap", "group__nand__interface__gr.html#a94d6b62b24d96ff83c985325d8825dd3", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__nand__interface__gr_structARM__NAND__STATUS.js b/docs/Driver/html/group__nand__interface__gr_structARM__NAND__STATUS.js new file mode 100644 index 0000000..6609ad5 --- /dev/null +++ b/docs/Driver/html/group__nand__interface__gr_structARM__NAND__STATUS.js @@ -0,0 +1,6 @@ +var group__nand__interface__gr_structARM__NAND__STATUS = +[ + [ "busy", "group__nand__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a", null ], + [ "ecc_error", "group__nand__interface__gr.html#a7707d2200a3bf8f49b148ffc8ded7636", null ], + [ "reserved", "group__nand__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__bit__order__control.html b/docs/Driver/html/group__sai__bit__order__control.html new file mode 100644 index 0000000..83e505a --- /dev/null +++ b/docs/Driver/html/group__sai__bit__order__control.html @@ -0,0 +1,174 @@ + + + + + +SAI Bit Order +CMSIS-Driver: SAI Bit Order + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Bit Order
SAI Configuration
+
+
+ +

Defines the bit order. +More...

+ + + + + + + + +

+Macros

#define ARM_SAI_MSB_FIRST   (0U << ARM_SAI_BIT_ORDER_Pos)
 Data is transferred with MSB first (default) More...
 
#define ARM_SAI_LSB_FIRST   (1U << ARM_SAI_BIT_ORDER_Pos)
 Data is transferred with LSB first; User Protocol only (ignored otherwise) More...
 
+

Description

+

Defines the bit order.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_MSB_FIRST   (0U << ARM_SAI_BIT_ORDER_Pos)
+
+ +

Data is transferred with MSB first (default)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_LSB_FIRST   (1U << ARM_SAI_BIT_ORDER_Pos)
+
+ +

Data is transferred with LSB first; User Protocol only (ignored otherwise)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__bit__order__control.js b/docs/Driver/html/group__sai__bit__order__control.js new file mode 100644 index 0000000..8bf62f6 --- /dev/null +++ b/docs/Driver/html/group__sai__bit__order__control.js @@ -0,0 +1,5 @@ +var group__sai__bit__order__control = +[ + [ "ARM_SAI_MSB_FIRST", "group__sai__bit__order__control.html#gaf74bfe9c3005bf3b80d69f112ea9e62b", null ], + [ "ARM_SAI_LSB_FIRST", "group__sai__bit__order__control.html#ga19b51b75537b030b975efcf68f3db78b", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__clock__pol__control.html b/docs/Driver/html/group__sai__clock__pol__control.html new file mode 100644 index 0000000..8f996f6 --- /dev/null +++ b/docs/Driver/html/group__sai__clock__pol__control.html @@ -0,0 +1,174 @@ + + + + + +SAI Clock Polarity +CMSIS-Driver: SAI Clock Polarity + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Clock Polarity
SAI Configuration
+
+
+ +

Defines clock polarity. +More...

+ + + + + + + + +

+Macros

#define ARM_SAI_CLOCK_POLARITY_0   (0U << ARM_SAI_CLOCK_POLARITY_Pos)
 Drive on falling edge, Capture on rising edge (default) More...
 
#define ARM_SAI_CLOCK_POLARITY_1   (1U << ARM_SAI_CLOCK_POLARITY_Pos)
 Drive on rising edge, Capture on falling edge. More...
 
+

Description

+

Defines clock polarity.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_CLOCK_POLARITY_0   (0U << ARM_SAI_CLOCK_POLARITY_Pos)
+
+ +

Drive on falling edge, Capture on rising edge (default)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_CLOCK_POLARITY_1   (1U << ARM_SAI_CLOCK_POLARITY_Pos)
+
+ +

Drive on rising edge, Capture on falling edge.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__clock__pol__control.js b/docs/Driver/html/group__sai__clock__pol__control.js new file mode 100644 index 0000000..8929a61 --- /dev/null +++ b/docs/Driver/html/group__sai__clock__pol__control.js @@ -0,0 +1,5 @@ +var group__sai__clock__pol__control = +[ + [ "ARM_SAI_CLOCK_POLARITY_0", "group__sai__clock__pol__control.html#ga4311b6b6fd937d6ac37aa2d031a5d5ee", null ], + [ "ARM_SAI_CLOCK_POLARITY_1", "group__sai__clock__pol__control.html#gae4c9b9abd3b7390810a5494363875a53", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__companding__control.html b/docs/Driver/html/group__sai__companding__control.html new file mode 100644 index 0000000..de41894 --- /dev/null +++ b/docs/Driver/html/group__sai__companding__control.html @@ -0,0 +1,191 @@ + + + + + +SAI Companding +CMSIS-Driver: SAI Companding + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Companding
SAI Configuration
+
+
+ +

Defines companding. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_SAI_COMPANDING_NONE   (0U << ARM_SAI_COMPANDING_Pos)
 No compading (default) More...
 
#define ARM_SAI_COMPANDING_A_LAW   (2U << ARM_SAI_COMPANDING_Pos)
 A-Law companding. More...
 
#define ARM_SAI_COMPANDING_U_LAW   (3U << ARM_SAI_COMPANDING_Pos)
 u-Law companding More...
 
+

Description

+

Defines companding.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_COMPANDING_NONE   (0U << ARM_SAI_COMPANDING_Pos)
+
+ +

No compading (default)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_COMPANDING_A_LAW   (2U << ARM_SAI_COMPANDING_Pos)
+
+ +

A-Law companding.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_COMPANDING_U_LAW   (3U << ARM_SAI_COMPANDING_Pos)
+
+ +

u-Law companding

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__companding__control.js b/docs/Driver/html/group__sai__companding__control.js new file mode 100644 index 0000000..078fadc --- /dev/null +++ b/docs/Driver/html/group__sai__companding__control.js @@ -0,0 +1,6 @@ +var group__sai__companding__control = +[ + [ "ARM_SAI_COMPANDING_NONE", "group__sai__companding__control.html#ga185919d553cf9204e514136eb375ef08", null ], + [ "ARM_SAI_COMPANDING_A_LAW", "group__sai__companding__control.html#gacfd6c74148c0ae90aa6eaaf8e69da3a9", null ], + [ "ARM_SAI_COMPANDING_U_LAW", "group__sai__companding__control.html#ga7b571406bcce383140198e53312faee5", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__configure__control.html b/docs/Driver/html/group__sai__configure__control.html new file mode 100644 index 0000000..7b490b8 --- /dev/null +++ b/docs/Driver/html/group__sai__configure__control.html @@ -0,0 +1,197 @@ + + + + + +SAI Configuration +CMSIS-Driver: SAI Configuration + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
SAI Configuration
SAI Control Codes
+
+
+ +

Specify Transmitter/Receiver configuration. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Content

 SAI Mode
 Defines Transmitter/Receiver mode.
 
 SAI Synchronization
 Defines Transmitter/Receiver synchronization.
 
 SAI Protocol
 Defines Transmitter/Receiver protocol.
 
 SAI Data Size
 Defines data size in bits (per channel/slot).
 
 SAI Bit Order
 Defines the bit order.
 
 SAI Mono Mode
 Defines mono mode.
 
 SAI Companding
 Defines companding.
 
 SAI Clock Polarity
 Defines clock polarity.
 
 SAI Frame
 Defines frame.
 
 SAI Slot
 Defines data slots.
 
 SAI Master Clock Pin
 Defines MCLK pin.
 
 SAI Master Clock Prescaler
 Defines MCLK prescaler.
 
+

Description

+

Specify Transmitter/Receiver configuration.

+

Configuration is specified by ORing ARM_SAI_CONFIGURE_x with the following parameters:

+ +

Additional configuration specified by arg1:

+ +

Additional configuration specified by arg2:

+ +
+
+ + + + diff --git a/docs/Driver/html/group__sai__configure__control.js b/docs/Driver/html/group__sai__configure__control.js new file mode 100644 index 0000000..6c4c32c --- /dev/null +++ b/docs/Driver/html/group__sai__configure__control.js @@ -0,0 +1,15 @@ +var group__sai__configure__control = +[ + [ "SAI Mode", "group__sai__mode__control.html", "group__sai__mode__control" ], + [ "SAI Synchronization", "group__sai__sync__control.html", "group__sai__sync__control" ], + [ "SAI Protocol", "group__sai__protocol__control.html", "group__sai__protocol__control" ], + [ "SAI Data Size", "group__sai__data__bits__control.html", "group__sai__data__bits__control" ], + [ "SAI Bit Order", "group__sai__bit__order__control.html", "group__sai__bit__order__control" ], + [ "SAI Mono Mode", "group__sai__mono__control.html", "group__sai__mono__control" ], + [ "SAI Companding", "group__sai__companding__control.html", "group__sai__companding__control" ], + [ "SAI Clock Polarity", "group__sai__clock__pol__control.html", "group__sai__clock__pol__control" ], + [ "SAI Frame", "group__sai__frame__control.html", "group__sai__frame__control" ], + [ "SAI Slot", "group__sai__slot__control.html", "group__sai__slot__control" ], + [ "SAI Master Clock Pin", "group__sai__mclk__pin__control.html", "group__sai__mclk__pin__control" ], + [ "SAI Master Clock Prescaler", "group__sai__mclk__pres__control.html", "group__sai__mclk__pres__control" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__control.html b/docs/Driver/html/group__sai__control.html new file mode 100644 index 0000000..daff04a --- /dev/null +++ b/docs/Driver/html/group__sai__control.html @@ -0,0 +1,151 @@ + + + + + +SAI Control Codes +CMSIS-Driver: SAI Control Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
SAI Control Codes
SAI Interface
+
+
+ +

Many parameters of the SAI driver are configured using the ARM_SAI_Control function. +More...

+ + + + + + + + +

+Content

 SAI Configuration
 Specify Transmitter/Receiver configuration.
 
 SAI Controls
 Specifies controls.
 
+

Description

+

Many parameters of the SAI driver are configured using the ARM_SAI_Control function.

+

The various SAI control codes define:

+ +

Refer to the ARM_SAI_Control function for further details.

+
+
+ + + + diff --git a/docs/Driver/html/group__sai__control.js b/docs/Driver/html/group__sai__control.js new file mode 100644 index 0000000..2d79614 --- /dev/null +++ b/docs/Driver/html/group__sai__control.js @@ -0,0 +1,5 @@ +var group__sai__control = +[ + [ "SAI Configuration", "group__sai__configure__control.html", "group__sai__configure__control" ], + [ "SAI Controls", "group__sai__controls.html", "group__sai__controls" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__controls.html b/docs/Driver/html/group__sai__controls.html new file mode 100644 index 0000000..69f4076 --- /dev/null +++ b/docs/Driver/html/group__sai__controls.html @@ -0,0 +1,284 @@ + + + + + +SAI Controls +CMSIS-Driver: SAI Controls + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Controls
SAI Control Codes
+
+
+ +

Specifies controls. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SAI_CONFIGURE_TX   (0x01U)
 Configure Transmitter; arg1 and arg2 provide additional configuration. More...
 
#define ARM_SAI_CONFIGURE_RX   (0x02U)
 Configure Receiver; arg1 and arg2 provide additional configuration. More...
 
#define ARM_SAI_CONTROL_TX   (0x03U)
 Control Transmitter; arg1.0: 0=disable (default), 1=enable; arg1.1: mute. More...
 
#define ARM_SAI_CONTROL_RX   (0x04U)
 Control Receiver; arg1.0: 0=disable (default), 1=enable. More...
 
#define ARM_SAI_MASK_SLOTS_TX   (0x05U)
 Mask Transmitter slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default. More...
 
#define ARM_SAI_MASK_SLOTS_RX   (0x06U)
 Mask Receiver slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default. More...
 
#define ARM_SAI_ABORT_SEND   (0x07U)
 Abort ARM_SAI_Send. More...
 
#define ARM_SAI_ABORT_RECEIVE   (0x08U)
 Abort ARM_SAI_Receive. More...
 
+

Description

+

Specifies controls.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_CONFIGURE_TX   (0x01U)
+
+ +

Configure Transmitter; arg1 and arg2 provide additional configuration.

+
See Also
ARM_SAI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SAI_CONFIGURE_RX   (0x02U)
+
+ +

Configure Receiver; arg1 and arg2 provide additional configuration.

+
See Also
ARM_SAI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SAI_CONTROL_TX   (0x03U)
+
+ +

Control Transmitter; arg1.0: 0=disable (default), 1=enable; arg1.1: mute.

+
See Also
ARM_SAI_Control; ARM_SAI_Send
+ +
+
+ +
+
+ + + + +
#define ARM_SAI_CONTROL_RX   (0x04U)
+
+ +

Control Receiver; arg1.0: 0=disable (default), 1=enable.

+
See Also
ARM_SAI_Control; ARM_SAI_Receive
+ +
+
+ +
+
+ + + + +
#define ARM_SAI_MASK_SLOTS_TX   (0x05U)
+
+ +

Mask Transmitter slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default.

+
See Also
ARM_SAI_Control; ARM_SAI_Send
+ +
+
+ +
+
+ + + + +
#define ARM_SAI_MASK_SLOTS_RX   (0x06U)
+
+ +

Mask Receiver slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default.

+
See Also
ARM_SAI_Control; ARM_SAI_Receive
+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ABORT_SEND   (0x07U)
+
+ +

Abort ARM_SAI_Send.

+
See Also
ARM_SAI_Control; ARM_SAI_Send
+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ABORT_RECEIVE   (0x08U)
+
+ +

Abort ARM_SAI_Receive.

+
See Also
ARM_SAI_Control; ARM_SAI_Receive
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__controls.js b/docs/Driver/html/group__sai__controls.js new file mode 100644 index 0000000..ea327d0 --- /dev/null +++ b/docs/Driver/html/group__sai__controls.js @@ -0,0 +1,11 @@ +var group__sai__controls = +[ + [ "ARM_SAI_CONFIGURE_TX", "group__sai__controls.html#ga14ac7775060e731b26bc5b3acd2f317a", null ], + [ "ARM_SAI_CONFIGURE_RX", "group__sai__controls.html#gaba3e824e022fe2a5736de5dcbbd3d291", null ], + [ "ARM_SAI_CONTROL_TX", "group__sai__controls.html#ga74d7850973c095bb8dbffa880b4af1bc", null ], + [ "ARM_SAI_CONTROL_RX", "group__sai__controls.html#gaa40390b6dd0df3b140fdc45bb7b1439d", null ], + [ "ARM_SAI_MASK_SLOTS_TX", "group__sai__controls.html#ga8675b9776189caf4df7d558b3e18fcba", null ], + [ "ARM_SAI_MASK_SLOTS_RX", "group__sai__controls.html#ga84302d372185665852c9ed941c6545e0", null ], + [ "ARM_SAI_ABORT_SEND", "group__sai__controls.html#gab3ec8ef9e5e5a190bd2131ac8c99a240", null ], + [ "ARM_SAI_ABORT_RECEIVE", "group__sai__controls.html#ga2b8d3d85c1e60f137f8c433f319244cb", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__data__bits__control.html b/docs/Driver/html/group__sai__data__bits__control.html new file mode 100644 index 0000000..2688db1 --- /dev/null +++ b/docs/Driver/html/group__sai__data__bits__control.html @@ -0,0 +1,161 @@ + + + + + +SAI Data Size +CMSIS-Driver: SAI Data Size + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Data Size
SAI Configuration
+
+
+ +

Defines data size in bits (per channel/slot). +More...

+ + + + + +

+Macros

#define ARM_SAI_DATA_SIZE(n)   ((((n)-1)&0x1FU) << ARM_SAI_DATA_SIZE_Pos)
 Data size in bits (8..32) More...
 
+

Description

+

Defines data size in bits (per channel/slot).

+

Macro Definition Documentation

+ +
+
+ + + + + + + + +
#define ARM_SAI_DATA_SIZE( n)   ((((n)-1)&0x1FU) << ARM_SAI_DATA_SIZE_Pos)
+
+ +

Data size in bits (8..32)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__data__bits__control.js b/docs/Driver/html/group__sai__data__bits__control.js new file mode 100644 index 0000000..b70fd57 --- /dev/null +++ b/docs/Driver/html/group__sai__data__bits__control.js @@ -0,0 +1,4 @@ +var group__sai__data__bits__control = +[ + [ "ARM_SAI_DATA_SIZE", "group__sai__data__bits__control.html#ga1a7529e4b46d69dbd57ccef84552a3f4", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__execution__status.html b/docs/Driver/html/group__sai__execution__status.html new file mode 100644 index 0000000..7d1a260 --- /dev/null +++ b/docs/Driver/html/group__sai__execution__status.html @@ -0,0 +1,453 @@ + + + + + +Status Error Codes +CMSIS-Driver: Status Error Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Status Error Codes
SAI Interface
+
+
+ +

Negative values indicate errors (SAI has specific codes in addition to common Status Error Codes). +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SAI_ERROR_SYNCHRONIZATION   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 Specified Synchronization not supported. More...
 
#define ARM_SAI_ERROR_PROTOCOL   (ARM_DRIVER_ERROR_SPECIFIC - 2)
 Specified Protocol not supported. More...
 
#define ARM_SAI_ERROR_DATA_SIZE   (ARM_DRIVER_ERROR_SPECIFIC - 3)
 Specified Data size not supported. More...
 
#define ARM_SAI_ERROR_BIT_ORDER   (ARM_DRIVER_ERROR_SPECIFIC - 4)
 Specified Bit order not supported. More...
 
#define ARM_SAI_ERROR_MONO_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 5)
 Specified Mono mode not supported. More...
 
#define ARM_SAI_ERROR_COMPANDING   (ARM_DRIVER_ERROR_SPECIFIC - 6)
 Specified Companding not supported. More...
 
#define ARM_SAI_ERROR_CLOCK_POLARITY   (ARM_DRIVER_ERROR_SPECIFIC - 7)
 Specified Clock polarity not supported. More...
 
#define ARM_SAI_ERROR_AUDIO_FREQ   (ARM_DRIVER_ERROR_SPECIFIC - 8)
 Specified Audio frequency not supported. More...
 
#define ARM_SAI_ERROR_MCLK_PIN   (ARM_DRIVER_ERROR_SPECIFIC - 9)
 Specified MCLK Pin setting not supported. More...
 
#define ARM_SAI_ERROR_MCLK_PRESCALER   (ARM_DRIVER_ERROR_SPECIFIC - 10)
 Specified MCLK Prescaler not supported. More...
 
#define ARM_SAI_ERROR_FRAME_LENGHT   (ARM_DRIVER_ERROR_SPECIFIC - 11)
 Specified Frame length not supported. More...
 
#define ARM_SAI_ERROR_FRAME_SYNC_WIDTH   (ARM_DRIVER_ERROR_SPECIFIC - 12)
 Specified Frame Sync width not supported. More...
 
#define ARM_SAI_ERROR_FRAME_SYNC_POLARITY   (ARM_DRIVER_ERROR_SPECIFIC - 13)
 Specified Frame Sync polarity not supported. More...
 
#define ARM_SAI_ERROR_FRAME_SYNC_EARLY   (ARM_DRIVER_ERROR_SPECIFIC - 14)
 Specified Frame Sync early not supported. More...
 
#define ARM_SAI_ERROR_SLOT_COUNT   (ARM_DRIVER_ERROR_SPECIFIC - 15)
 Specified Slot count not supported. More...
 
#define ARM_SAI_ERROR_SLOT_SIZE   (ARM_DRIVER_ERROR_SPECIFIC - 16)
 Specified Slot size not supported. More...
 
#define ARM_SAI_ERROR_SLOT_OFFESET   (ARM_DRIVER_ERROR_SPECIFIC - 17)
 Specified Slot offset not supported. More...
 
+

Description

+

Negative values indicate errors (SAI has specific codes in addition to common Status Error Codes).

+

The SAI driver has additional status error codes that are listed below.

+
Note
    +
  • In case multiple errors exist, only the first encountered error will be reported.
    • +
  • errors ARM_SAI_ERROR_BIT_ORDER, ARM_SAI_ERROR_FRAME_SYNC_xxx, ARM_SAI_ERROR_SLOT_xxx will only be reported in User Defined Protocol mode.
    • +
  • The SAI driver also returns the common Status Error Codes.
    • +
+
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_ERROR_SYNCHRONIZATION   (ARM_DRIVER_ERROR_SPECIFIC - 1)
+
+ +

Specified Synchronization not supported.

+

The synchronization requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_PROTOCOL   (ARM_DRIVER_ERROR_SPECIFIC - 2)
+
+ +

Specified Protocol not supported.

+

The protocol requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_DATA_SIZE   (ARM_DRIVER_ERROR_SPECIFIC - 3)
+
+ +

Specified Data size not supported.

+

The data size requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_BIT_ORDER   (ARM_DRIVER_ERROR_SPECIFIC - 4)
+
+ +

Specified Bit order not supported.

+

The bit order requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_MONO_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 5)
+
+ +

Specified Mono mode not supported.

+

The mono mode requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_COMPANDING   (ARM_DRIVER_ERROR_SPECIFIC - 6)
+
+ +

Specified Companding not supported.

+

The companding requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_CLOCK_POLARITY   (ARM_DRIVER_ERROR_SPECIFIC - 7)
+
+ +

Specified Clock polarity not supported.

+

The clock polarity requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_AUDIO_FREQ   (ARM_DRIVER_ERROR_SPECIFIC - 8)
+
+ +

Specified Audio frequency not supported.

+

The audio frequency requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_MCLK_PIN   (ARM_DRIVER_ERROR_SPECIFIC - 9)
+
+ +

Specified MCLK Pin setting not supported.

+

The MCLK pin setting requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_MCLK_PRESCALER   (ARM_DRIVER_ERROR_SPECIFIC - 10)
+
+ +

Specified MCLK Prescaler not supported.

+

The MCLK prescaler requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_FRAME_LENGHT   (ARM_DRIVER_ERROR_SPECIFIC - 11)
+
+ +

Specified Frame length not supported.

+

The frame length requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_FRAME_SYNC_WIDTH   (ARM_DRIVER_ERROR_SPECIFIC - 12)
+
+ +

Specified Frame Sync width not supported.

+

The frame sync width requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_FRAME_SYNC_POLARITY   (ARM_DRIVER_ERROR_SPECIFIC - 13)
+
+ +

Specified Frame Sync polarity not supported.

+

The frame sync polarity requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_FRAME_SYNC_EARLY   (ARM_DRIVER_ERROR_SPECIFIC - 14)
+
+ +

Specified Frame Sync early not supported.

+

The frame sync early requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_SLOT_COUNT   (ARM_DRIVER_ERROR_SPECIFIC - 15)
+
+ +

Specified Slot count not supported.

+

The slot count requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_SLOT_SIZE   (ARM_DRIVER_ERROR_SPECIFIC - 16)
+
+ +

Specified Slot size not supported.

+

The slot size requested with the function ARM_SAI_Control is not supported.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_ERROR_SLOT_OFFESET   (ARM_DRIVER_ERROR_SPECIFIC - 17)
+
+ +

Specified Slot offset not supported.

+

The slot offset requested with the function ARM_SAI_Control is not supported.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__execution__status.js b/docs/Driver/html/group__sai__execution__status.js new file mode 100644 index 0000000..58c62a2 --- /dev/null +++ b/docs/Driver/html/group__sai__execution__status.js @@ -0,0 +1,20 @@ +var group__sai__execution__status = +[ + [ "ARM_SAI_ERROR_SYNCHRONIZATION", "group__sai__execution__status.html#ga711cd889b4209df3f8fb01e4f2413c61", null ], + [ "ARM_SAI_ERROR_PROTOCOL", "group__sai__execution__status.html#gaf4892425930608ad7a41fa5b49603b10", null ], + [ "ARM_SAI_ERROR_DATA_SIZE", "group__sai__execution__status.html#ga5c51cbd8c2d2fe4baae110d390cefdc2", null ], + [ "ARM_SAI_ERROR_BIT_ORDER", "group__sai__execution__status.html#gadcd0d44f0f6b691c4e84b30960c096e4", null ], + [ "ARM_SAI_ERROR_MONO_MODE", "group__sai__execution__status.html#ga912bf004fce3a37709bbf69734802b4a", null ], + [ "ARM_SAI_ERROR_COMPANDING", "group__sai__execution__status.html#ga4683468c258e1a8706afcce1e81356d1", null ], + [ "ARM_SAI_ERROR_CLOCK_POLARITY", "group__sai__execution__status.html#ga7810e77ec599b0f86073a8711c0655df", null ], + [ "ARM_SAI_ERROR_AUDIO_FREQ", "group__sai__execution__status.html#ga5021651816da0aa92561eed634ba7578", null ], + [ "ARM_SAI_ERROR_MCLK_PIN", "group__sai__execution__status.html#ga0d910d4a638433e3b2326fc776da0f53", null ], + [ "ARM_SAI_ERROR_MCLK_PRESCALER", "group__sai__execution__status.html#gabab9495d6c57e56604cb1a2ac7e75431", null ], + [ "ARM_SAI_ERROR_FRAME_LENGHT", "group__sai__execution__status.html#gaf0448bdd6d1ae33511d170b9ecc1e2d6", null ], + [ "ARM_SAI_ERROR_FRAME_SYNC_WIDTH", "group__sai__execution__status.html#ga993da1bc0f6745795b364d84dec24e99", null ], + [ "ARM_SAI_ERROR_FRAME_SYNC_POLARITY", "group__sai__execution__status.html#ga0561b0cc9577d944e0d39b582612e061", null ], + [ "ARM_SAI_ERROR_FRAME_SYNC_EARLY", "group__sai__execution__status.html#ga09fe9b65d2be54ee1441606523291011", null ], + [ "ARM_SAI_ERROR_SLOT_COUNT", "group__sai__execution__status.html#gaf52ee0cd13b6cb9c63acfe767ed5dfde", null ], + [ "ARM_SAI_ERROR_SLOT_SIZE", "group__sai__execution__status.html#ga7bf825043ba857950a89817ff9b853d1", null ], + [ "ARM_SAI_ERROR_SLOT_OFFESET", "group__sai__execution__status.html#ga4658a3143c891d8972446630b6a978cd", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__frame__control.html b/docs/Driver/html/group__sai__frame__control.html new file mode 100644 index 0000000..9fe367b --- /dev/null +++ b/docs/Driver/html/group__sai__frame__control.html @@ -0,0 +1,233 @@ + + + + + +SAI Frame +CMSIS-Driver: SAI Frame + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Frame
SAI Configuration
+
+
+ +

Defines frame. +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SAI_FRAME_LENGTH(n)   ((((n)-1)&0x3FFU) << ARM_SAI_FRAME_LENGTH_Pos)
 Frame length in bits (8..1024); default depends on protocol and data. More...
 
#define ARM_SAI_FRAME_SYNC_WIDTH(n)   ((((n)-1)&0xFFU) << ARM_SAI_FRAME_SYNC_WIDTH_Pos)
 Frame Sync width in bits (1..256); default=1; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_FRAME_SYNC_POLARITY_HIGH   (0U << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
 Frame Sync is active high (default); User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_FRAME_SYNC_POLARITY_LOW   (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
 Frame Sync is active low; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_FRAME_SYNC_EARLY   (1U << 19)
 Frame Sync one bit before the first bit of the frame; User Protocol only (ignored otherwise) More...
 
+

Description

+

Defines frame.

+

Macro Definition Documentation

+ +
+
+ + + + + + + + +
#define ARM_SAI_FRAME_LENGTH( n)   ((((n)-1)&0x3FFU) << ARM_SAI_FRAME_LENGTH_Pos)
+
+ +

Frame length in bits (8..1024); default depends on protocol and data.

+ +
+
+ +
+
+ + + + + + + + +
#define ARM_SAI_FRAME_SYNC_WIDTH( n)   ((((n)-1)&0xFFU) << ARM_SAI_FRAME_SYNC_WIDTH_Pos)
+
+ +

Frame Sync width in bits (1..256); default=1; User Protocol only (ignored otherwise)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_FRAME_SYNC_POLARITY_HIGH   (0U << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
+
+ +

Frame Sync is active high (default); User Protocol only (ignored otherwise)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_FRAME_SYNC_POLARITY_LOW   (1U << ARM_SAI_FRAME_SYNC_POLARITY_Pos)
+
+ +

Frame Sync is active low; User Protocol only (ignored otherwise)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_FRAME_SYNC_EARLY   (1U << 19)
+
+ +

Frame Sync one bit before the first bit of the frame; User Protocol only (ignored otherwise)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__frame__control.js b/docs/Driver/html/group__sai__frame__control.js new file mode 100644 index 0000000..695cfc1 --- /dev/null +++ b/docs/Driver/html/group__sai__frame__control.js @@ -0,0 +1,8 @@ +var group__sai__frame__control = +[ + [ "ARM_SAI_FRAME_LENGTH", "group__sai__frame__control.html#ga4c557aa02c83b8595be23a6c58d284e9", null ], + [ "ARM_SAI_FRAME_SYNC_WIDTH", "group__sai__frame__control.html#gae165fd96e6a5b06b362954fadeabcb7a", null ], + [ "ARM_SAI_FRAME_SYNC_POLARITY_HIGH", "group__sai__frame__control.html#ga7be0326e15d61d6c67febb22f5b14d58", null ], + [ "ARM_SAI_FRAME_SYNC_POLARITY_LOW", "group__sai__frame__control.html#gaf3d6bdbc05379ac30905cecf1b2d917e", null ], + [ "ARM_SAI_FRAME_SYNC_EARLY", "group__sai__frame__control.html#gabec3992447436a2a8ed99108908ae208", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__interface__gr.html b/docs/Driver/html/group__sai__interface__gr.html new file mode 100644 index 0000000..ac49204 --- /dev/null +++ b/docs/Driver/html/group__sai__interface__gr.html @@ -0,0 +1,1267 @@ + + + + + +SAI Interface +CMSIS-Driver: SAI Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
SAI Interface
+
+
+ +

Driver API for Serial Audio Interface (Driver_SAI.h) +More...

+ + + + + + + + + + + +

+Content

 Status Error Codes
 Negative values indicate errors (SAI has specific codes in addition to common Status Error Codes).
 
 SAI Events
 The SAI driver generates call back events that are notified via the function ARM_SAI_SignalEvent.
 
 SAI Control Codes
 Many parameters of the SAI driver are configured using the ARM_SAI_Control function.
 
+ + + + + + + + + + +

+Data Structures

struct  ARM_DRIVER_SAI
 Access structure of the SAI Driver. More...
 
struct  ARM_SAI_CAPABILITIES
 SAI Driver Capabilities. More...
 
struct  ARM_SAI_STATUS
 SAI Status. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_SAI_SignalEvent_t )(uint32_t event)
 Pointer to ARM_SAI_SignalEvent : Signal SAI Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_SAI_GetVersion (void)
 Get driver version. More...
 
ARM_SAI_CAPABILITIES ARM_SAI_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_SAI_Initialize (ARM_SAI_SignalEvent_t cb_event)
 Initialize SAI Interface. More...
 
int32_t ARM_SAI_Uninitialize (void)
 De-initialize SAI Interface. More...
 
int32_t ARM_SAI_PowerControl (ARM_POWER_STATE state)
 Control SAI Interface Power. More...
 
int32_t ARM_SAI_Send (const void *data, uint32_t num)
 Start sending data to SAI transmitter. More...
 
int32_t ARM_SAI_Receive (void *data, uint32_t num)
 Start receiving data from SAI receiver. More...
 
uint32_t ARM_SAI_GetTxCount (void)
 Get transmitted data count. More...
 
uint32_t ARM_SAI_GetRxCount (void)
 Get received data count. More...
 
int32_t ARM_SAI_Control (uint32_t control, uint32_t arg1, uint32_t arg2)
 Control SAI Interface. More...
 
ARM_SAI_STATUS ARM_SAI_GetStatus (void)
 Get SAI status. More...
 
void ARM_SAI_SignalEvent (uint32_t event)
 Signal SAI Events. More...
 
+

Description

+

Driver API for Serial Audio Interface (Driver_SAI.h)

+

The Serial Audio Interface (SAI) implements a synchronous serial bus interface for connecting digital audio devices. It is by far the most common mechanism used to transfer two channels of audio data between devices within a system. SAI can transfer digital audio using various protocols:

+ +

Block Diagram

+

 

+
+SAI_Schematics.png +
+Simplified SAI Schematic
+

 

+

SAI API

+

The following header files define the Application Programming Interface (API) for the SAI interface:

+
    +
  • Driver_SAI.h : Driver API for Serial Audio Interface
    • +
+

The driver implementation is a typical part of the Device Family Pack (DFP) that supports the peripherals of the microcontroller family.

+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +

+I2S

+

Integrated Interchip Sound (I2S) is a serial bus interface that connects digital audio devices together. It was introduced by Philips (now NXP) in the late 80's and last revised 1996. It uses pulse code modulation to exchange the audio data between the devices. The following timing diagram explains the operation:

+
+driver_sai_i2s.png +
+

I2S separates the clock (SCK) from the serial data (SD), resulting in a lower jitter. A complete audio data frame consists of two slots, one for the left channel and one for the right. The slot size equals the data size. The word select (WS) line lets the device know whether the left channel (WS is low) or the right channel (WS is high) is currently being transmitted. WS has a 50% duty-cycle signal that has the same frequency as the sample frequency. It is an early signal, meaning that the WS line changes one clock cycle before the actual data (SD) is transmitted (left or right). The data on SD is always transmitted MSB first and can have a data size of 8 up to 32 bits.

+

In terms of the CMSIS-Driver for SAI, the I2S protocol can be described as follows:

+
    +
  • Data Size: 8..32 (MSB first)
    • +
  • Clock Polarity: Drive on falling edge, Capture on rising edge
    • +
  • Frame Length: 2 * Data Size = 2 * Slot Size
    • +
  • Frame Sync Width: Frame Length / 2
    • +
  • Frame Sync Polarity: Active Low
    • +
  • Frame Sync Early
    • +
  • Slot Count: 2 (L R)
    • +
  • Slot Size: Data Size
    • +
  • Slot Offset: 0
    • +
+

+MSB Justified

+

MSB Justified is much like I2S, with a few differences:

+
+driver_sai_msb.png +
+

Unlike I2S, in MSB Justified the word select (WS) signals the left channel when it is active high and the right channel, when it is active low. The signal changes when the first actual SD data is available. It might happen that a frame (left or right) is not fully filled with data. In this case, all data after the LSB is forced to zero.

+

In terms of the CMSIS-Driver for SAI, the MSB Justified protocol can be described as follows:

+
    +
  • Data Size: 8..32 (MSB first)
    • +
  • Clock Polarity: Drive on falling edge, Capture on rising edge
    • +
  • Frame Length: 2 * Slot Size
    • +
  • Frame Sync Width: Frame Length / 2
    • +
  • Frame Sync Polarity: Active High
    • +
  • Slot Count: 2 (L R)
    • +
  • Slot Size: Data Size or higher (16/32)
    • +
  • Slot Offset: 0 (Zero padding after Data: Slot Size - Data Size)
    • +
+

+LSB Justified

+

LSB Justified is much like MSB Justified, with the single difference that the padding 0's are sent before the first actual data (MSB on SD):

+
+driver_sai_lsb.png +
+

In terms of the CMSIS-Driver for SAI, the LSB Justified protocol can be described as follows:

+
    +
  • Data Size: 8..32 (MSB first)
    • +
  • Clock Polarity: Drive on falling edge, Capture on rising edge
    • +
  • Frame Length: 2*Slot Size
    • +
  • Frame Sync Width: Frame Length / 2
    • +
  • Frame Sync Polarity: Active High
    • +
  • Slot Count: 2
    • +
  • Slot Size: Data Size or higher (16/32)
    • +
  • Slot Offset: Slot Size - Data Size (Zero padding before Data: Slot Size - Data Size)
    • +
+

+PCM

+

Pulse Code Modulation (PCM) differs to the previous protocols in a few ways:

+
+driver_sai_pcm.png +
+
    +
  • Only one channel is transferred.
    • +
  • There are two types of synchronization modes available:
      +
    • In short frame sync mode, the falling edge of Frame Sync indicates the start of the serial data SD. Frame Sync is always one clock cycle long.
      • +
    • In long frame sync mode, the rising edge of Frame Sync indicates the start of the serial data SD. Frame Sync stays active high for 13 clock cycles.
      • +
    +
    • +
+

In terms of the CMSIS-Driver for SAI, the PCM protocol can be described as follows:
+PCM Short Frame

+
    +
  • Data Size: 8..32 (MSB first)
    • +
  • Clock Polarity: Drive on falling edge, Capture on rising edge
    • +
  • Frame Length: Slot Size
    • +
  • Frame Sync Width: 1
    • +
  • Frame Sync Polarity: Active High
    • +
  • Frame Sync Early
    • +
  • Slot Count: 1
    • +
  • Slot Size: Data Size or higher (16/32)
    • +
  • Slot Offset: 0
    • +
+

PCM Long Frame

+
    +
  • Data Size: 16..32 (MSB first)
    • +
  • Clock Polarity: Drive on falling edge, Capture on rising edge
    • +
  • Frame Length: Slot Size
    • +
  • Frame Sync Width: 13
    • +
  • Frame Sync Polarity: Active High
    • +
  • Slot Count: 1
    • +
  • Slot Size: Data Size or higher (32)
    • +
  • Slot Offset: 0
    • +
+

+AC'97

+

Audio Codec '97 was developed by Intel. It is composed of five wires: the clock (12.288 MHz), a sync signal, a reset signal, and two data wires: sdata_out (contains the AC97 output) and sdata_in (contains the CODEC output). For more information, consult the standard documentation.

+

+User Defined Protocol

+

Using the control structs of the CMSIS-Driver SAI, it is possible to create support for nearly all serial audio protocols that are available today.

+
+driver_sai_user.png +
+

The following properties can be configured for a user protocol:

+
    +
  • Data Size in bits (8..32)
    • +
  • Data Bit Order: MSB first (default) or LSB first
    • +
  • Clock Polarity:
      +
    • Driver on falling edge, Capture on rising edge (default)
      • +
    • Driver on rising edge, Capture on falling edge
      • +
    +
    • +
  • Frame Length in bits
    • +
  • Frame Sync Width in bits (default=1)
    • +
  • Frame Sync Polarity: active high (default) or low
    • +
  • Frame Sync Early: Sync signal one bit before the first bit of frame
    • +
  • Slot Count: number of slots in frame (default=1)
    • +
  • Slot Size: equal to data size (default) or 16 or 32-bit
    • +
  • Slot Offset: offset of first data bit in slot (default=0)
    • +
+

For more information, refer to ARM_SAI_Control that explains the different configuration options in more detail.

+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_SAI
+
+

Access structure of the SAI Driver.

+

The functions of the SAI driver are accessed by function pointers exposed by this structure. Refer to Common Driver Functions for overview information.

+

Each instance of an SAI interface provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:

+
    +
  • Driver_SAI0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_SAI1 is the name of the access struct of the second instance (no. 1).
    • +
+

A middleware configuration setting allows connecting the middleware to a specific driver instance Driver_SAIn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_SAI_GetVersion : Get driver version. More...
 
ARM_SAI_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_SAI_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_SAI_SignalEvent_t cb_event)
 Pointer to ARM_SAI_Initialize : Initialize SAI Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_SAI_Uninitialize : De-initialize SAI Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_SAI_PowerControl : Control SAI Interface Power. More...
 
int32_t(* Send )(const void *data, uint32_t num)
 Pointer to ARM_SAI_Send : Start sending data to SAI Interface. More...
 
int32_t(* Receive )(void *data, uint32_t num)
 Pointer to ARM_SAI_Receive : Start receiving data from SAI Interface. More...
 
uint32_t(* GetTxCount )(void)
 Pointer to ARM_SAI_GetTxCount : Get transmitted data count. More...
 
uint32_t(* GetRxCount )(void)
 Pointer to ARM_SAI_GetRxCount : Get received data count. More...
 
int32_t(* Control )(uint32_t control, uint32_t arg1, uint32_t arg2)
 Pointer to ARM_SAI_Control : Control SAI Interface. More...
 
ARM_SAI_STATUS(* GetStatus )(void)
 Pointer to ARM_SAI_GetStatus : Get SAI status. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_SAI_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_SAI_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_SAI_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_SAI_SignalEvent_t cb_event)
+
+ +

Pointer to ARM_SAI_Initialize : Initialize SAI Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_SAI_Uninitialize : De-initialize SAI Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_SAI_PowerControl : Control SAI Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* Send)(const void *data, uint32_t num)
+
+ +

Pointer to ARM_SAI_Send : Start sending data to SAI Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Receive)(void *data, uint32_t num)
+
+ +

Pointer to ARM_SAI_Receive : Start receiving data from SAI Interface.

+ +
+
+ +
+
+ + + + +
uint32_t(* GetTxCount)(void)
+
+ +

Pointer to ARM_SAI_GetTxCount : Get transmitted data count.

+ +
+
+ +
+
+ + + + +
uint32_t(* GetRxCount)(void)
+
+ +

Pointer to ARM_SAI_GetRxCount : Get received data count.

+ +
+
+ +
+
+ + + + +
int32_t(* Control)(uint32_t control, uint32_t arg1, uint32_t arg2)
+
+ +

Pointer to ARM_SAI_Control : Control SAI Interface.

+ +
+
+ +
+
+ + + + +
ARM_SAI_STATUS(* GetStatus)(void)
+
+ +

Pointer to ARM_SAI_GetStatus : Get SAI status.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_SAI_CAPABILITIES
+
+

SAI Driver Capabilities.

+

An SAI driver can be implemented with different capabilities (for example protocol support). The data fields of this structure encode the capabilities implemented by this driver. If a certain hardware peripheral is not able to handle one of the protocols directly (not advertised using ARM_SAI_CAPABILITIES), then it might be possible to implement it using the User Defined Protocol (if supported).

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +asynchronous: 1 +supports asynchronous Transmit/Receive
+uint32_t +synchronous: 1 +supports synchronous Transmit/Receive
+uint32_t +protocol_user: 1 +supports user defined Protocol
+uint32_t +protocol_i2s: 1 +supports I2S Protocol
+uint32_t +protocol_justified: 1 +supports MSB/LSB justified Protocol
+uint32_t +protocol_pcm: 1 +supports PCM short/long frame Protocol
+uint32_t +protocol_ac97: 1 +supports AC'97 Protocol
+uint32_t +mono_mode: 1 +supports Mono mode
+uint32_t +companding: 1 +supports Companding
+uint32_t +mclk_pin: 1 +supports MCLK (Master Clock) pin
+uint32_t +event_frame_error: 1 +supports Frame error event: ARM_SAI_EVENT_FRAME_ERROR
+uint32_t +reserved: 21 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_SAI_STATUS
+
+

SAI Status.

+

Structure with information about the status of the SAI. The data fields encode busy flags and error flags.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +tx_busy: 1 +Transmitter busy flag.
+uint32_t +rx_busy: 1 +Receiver busy flag.
+uint32_t +tx_underflow: 1 +Transmit data underflow detected (cleared on start of next send operation)
+uint32_t +rx_overflow: 1 +Receive data overflow detected (cleared on start of next receive operation)
+uint32_t +frame_error: 1 +Sync Frame error detected (cleared on start of next send/receive operation)
+uint32_t +reserved: 27 +
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_SAI_SignalEvent_t
+
+ +

Pointer to ARM_SAI_SignalEvent : Signal SAI Event.

+

Provides the typedef for the callback function ARM_SAI_SignalEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_SAI_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_SAI_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_SAI Driver_SAI0;
+
ARM_DRIVER_SAI *drv_info;
+
+
void setup_sai (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_SAI0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_SAI_CAPABILITIES ARM_SAI_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_SAI_CAPABILITIES
+

The function ARM_SAI_GetCapabilities retrieves information about the capabilities in this driver implementation. The data fields of the struct ARM_SAI_CAPABILITIES encode various capabilities, for example supported protocols, or if a hardware is capable to create signal events using the ARM_SAI_SignalEvent callback function.

+

Example:

+
extern ARM_DRIVER_SAI Driver_SAI0;
+
ARM_DRIVER_SAI *drv_info;
+
+
void read_capabilities (void) {
+
ARM_SAI_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_SAI0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_SAI_Initialize (ARM_SAI_SignalEvent_t cb_event)
+
+ +

Initialize SAI Interface.

+
Parameters
+ + +
[in]cb_eventPointer to ARM_SAI_SignalEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_SAI_Initialize initializes the SAI interface. It is called when the middleware component starts operation.

+

The function performs the following operations:

+
    +
  • Initializes the required resources of the SAI interface.
    • +
  • Registers the ARM_SAI_SignalEvent callback function.
    • +
+

The parameter cb_event is a pointer to the ARM_SAI_SignalEvent callback function; use a NULL pointer when no callback signals are required.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_SAI_Uninitialize (void )
+
+ +

De-initialize SAI Interface.

+
Returns
Status Error Codes
+

The function ARM_SAI_Uninitialize de-initializes the resources of SAI interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_SAI_PowerControl (ARM_POWER_STATE state)
+
+ +

Control SAI Interface Power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_SAI_PowerControl allows you to control the power modes of the SAI interface.

+

The parameter state sets the operation and can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_SAI_Send (const void * data,
uint32_t num 
)
+
+ +

Start sending data to SAI transmitter.

+
Parameters
+ + + +
[in]dataPointer to buffer with data to send to SAI transmitter
[in]numNumber of data items to send
+
+
+
Returns
Status Error Codes
+

The function ARM_SAI_Send sends data to the SAI transmitter.

+

The function parameters specify the buffer with data and the number num of items to send. The item size is defined by the data type which depends on the configured number of data bits.

+

Data type is:

+
    +
  • uint8_t when configured for 8 data bits
    • +
  • uint16_t when configured for 9..16 data bits
    • +
  • uint32_t when configured for 17..32 data bits
    • +
+

Transmitter is enabled by calling ARM_SAI_Control with ARM_SAI_CONTROL_TX as the control parameter and 1 as an argument. This starts the transmit engine which, generates a clock and frame sync signal in master mode and transmits the data. In slave mode, clock and frame sync are generated by the external master. When mute is active, data is discarded and zero values are transmitted.

+

Calling the function ARM_SAI_Send only starts the send operation. The function is non-blocking and returns as soon as the driver has started the operation (the driver typically configures DMA or the interrupt system for continuous transfer). During the operation it is not allowed to call this function again. Also, the data buffer must stay allocated and the contents of unsent data must not be modified. When the send operation is completed (requested number of items have been sent), the event ARM_SAI_EVENT_SEND_COMPLETE is generated. Progress of the send operation can be monitored by reading the number of already sent items by calling the function ARM_SAI_GetTxCount.

+

The status of the transmitter can also be monitored by calling the function ARM_SAI_GetStatus and checking the tx_busy flag, which indicates if a transmission is still in progress.

+

If the transmitter is enabled and data is to be sent but the send operation has not been started yet, then the event ARM_SAI_EVENT_TX_UNDERFLOW is generated.

+

If an invalid synchronization frame is detected in slave mode, then the event ARM_SAI_EVENT_FRAME_ERROR is generated (if supported and reported by event_frame_error in ARM_SAI_CAPABILITIES).

+

The send operation can be aborted by calling the function ARM_SAI_Control with the control parameter ARM_SAI_ABORT_SEND.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_SAI_Receive (void * data,
uint32_t num 
)
+
+ +

Start receiving data from SAI receiver.

+
Parameters
+ + + +
[out]dataPointer to buffer for data to receive from SAI receiver
[in]numNumber of data items to receive
+
+
+
Returns
Status Error Codes
+

The function ARM_SAI_Receive is used to receive data from the SAI receiver. The function parameters specify the buffer for data and the number num of items to receive. The item size is defined by the data type, which depends on the configured number of data bits.

+

Data type is:

+
    +
  • uint8_t when configured for 8 data bits
    • +
  • uint16_t when configured for 9..16 data bits
    • +
  • uint32_t when configured for 17..32 data bits
    • +
+

The receiver is enabled by calling the function ARM_SAI_Control with the control parameter ARM_SAI_CONTROL_RX and the value 1 for the parameter arg1. This starts the receive engine, which generates a clock and frame sync signal in master mode and receives data. In slave mode, clock and frame sync are generated by the external master.

+

Calling the function ARM_SAI_Receive only starts the receive operation. The function is non-blocking and returns as soon as the driver has started the operation (the driver typically configures DMA or the interrupt system for continuous transfer). During the operation, it is not allowed to call this function again. The data buffer must also stay allocated. When receive operation is completed (the requested number of items have been received), the ARM_SAI_EVENT_RECEIVE_COMPLETE event is generated. Progress of the receive operation can also be monitored by reading the number of items already received by calling the function ARM_SAI_GetRxCount.

+

The status of the receiver can also be monitored by calling the function ARM_SAI_GetStatus and checking the rx_busy flag, which indicates whether a reception is still in progress.

+

When the receiver is enabled and data is received but the receive operation has not been started yet, then the event ARM_SAI_EVENT_RX_OVERFLOW is generated.

+

If an invalid synchronization frame is detected in slave mode, then the event ARM_SAI_EVENT_FRAME_ERROR is generated (if supported and reported by event_frame_error in ARM_SAI_CAPABILITIES).

+

The receive operation can be aborted by calling the function ARM_SAI_Control with the control parameter ARM_SAI_ABORT_RECEIVE.

+ +
+
+ +
+
+ + + + + + + + +
uint32_t ARM_SAI_GetTxCount (void )
+
+ +

Get transmitted data count.

+
Returns
number of data items transmitted
+

The function ARM_SAI_GetTxCount returns the number of the currently transmitted data items during an ARM_SAI_Send operation.

+ +
+
+ +
+
+ + + + + + + + +
uint32_t ARM_SAI_GetRxCount (void )
+
+ +

Get received data count.

+
Returns
number of data items received
+

The function ARM_SAI_GetRxCount returns the number of the currently received data items during an ARM_SAI_Receive operation.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_SAI_Control (uint32_t control,
uint32_t arg1,
uint32_t arg2 
)
+
+ +

Control SAI Interface.

+
Parameters
+ + + + +
[in]controlOperation
[in]arg1Argument 1 of operation (optional)
[in]arg2Argument 2 of operation (optional)
+
+
+
Returns
common Status Error Codes and driver specific Status Error Codes
+

The function ARM_SAI_Control controls the SAI interface and executes various operations.

+

The parameter control specifies the operation. Values are listed in the table Parameter control.
+The parameter arg1 provides, depending on the operation, additional information or sets values. Refer to table Parameter arg1.
+The parameter arg2 provides, depending on the operation and/or arg1, additional information or sets values.

+

The driver provides a receiver/transmitter pair of signals. In asynchronous operation mode, they operate completely independent from each other. In synchronous operation mode, the synchronous channel uses the Clock (SCK) and Frame Sync (WS) signal from the asynchronous one (control category Synchronization).

+

The clock polarity can be set for every protocol, regardless whether it is already predefined for I2S, MSB/LSB Jusitified (control category Clock Polarity).

+

A master clock provides a faster clock from which the frame can be derived (usually 256 x faster than the normal frame clock). You can use a master clock only in master mode. A slave will always have only one clock (control category Master Clock pin (MCLK)).

+

The table lists the operation values for control. Values from different categories can be ORed.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Parameter control Bit Category Description
ARM_SAI_CONFIGURE_TX 0..7 Operation Configure transmitter. arg1 (see Parameter arg1) and arg2 provide additional configuration.
ARM_SAI_CONFIGURE_TX Configure transmitter. arg1 (see Parameter arg1) and arg2 provide additional configuration.
ARM_SAI_CONFIGURE_RX Configure transmitter. arg1 and arg2 provide additional configuration.
ARM_SAI_CONTROL_TX Enable or disable transmitter and control mute; arg1.0 : 0=disable (default); 1=enable; arg1.1 : mute (see ARM_SAI_Send)
ARM_SAI_CONTROL_RX Enable or disable receiver; arg1.0 : 0=disable (default); 1=enable (see ARM_SAI_Receive)
ARM_SAI_MASK_SLOTS_TX Mask transmitter slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default.
ARM_SAI_MASK_SLOTS_RX Mask receiver slots; arg1 = mask (bit: 0=active, 1=inactive); all configured slots are active by default.
ARM_SAI_ABORT_SEND Abort send operation (see ARM_SAI_Send).
ARM_SAI_ABORT_RECEIVE Abort receive operation (see ARM_SAI_Receive).
ARM_SAI_MODE_MASTER 8 Mode Master mode. arg2 specifies the audio frequency in [Hz]. You can also set the Master Clock pin.
ARM_SAI_MODE_SLAVE (default) Slave mode.
ARM_SAI_ASYNCHRONOUS (default)9 Synchronization Asynchronous operation using own clock and sync signal.
ARM_SAI_SYNCHRONOUS Synchronous operation using clock and sync signal from other transmitter/receiver.
ARM_SAI_PROTOCOL_USER (default) 10..12 Protocol User defined
ARM_SAI_PROTOCOL_I2S I2C
ARM_SAI_PROTOCOL_MSB_JUSTIFIED MSB (left) justified
ARM_SAI_PROTOCOL_LSB_JUSTIFIED LSB (right) justified
ARM_SAI_PROTOCOL_PCM_SHORT PCM with short frame
ARM_SAI_PROTOCOL_PCM_LONG PCM with long frame
ARM_SAI_PROTOCOL_AC97 AC'97
ARM_SAI_DATA_SIZE(n) 13..17 Data Size Data size in bits; the range for n is 8..32. See also: Frame Slot Size.
ARM_SAI_MSB_FIRST 18 Bit Order Data is transferred with MSB first.
ARM_SAI_LSB_FIRST Data is transferred with LSB first (User protocol only, ignored otherwise).
ARM_SAI_MONO_MODE 19 Mono Mode Only for I2S, MSB/LSB justified. When using I2S in mono mode, only data for a single channel is sent to and received from the driver. Hardware will duplicate the data for the second channel on transmit and ignore the second channel on receive.
ARM_SAI_COMPANDING_NONE (default) 20..22 Companding No companding
ARM_SAI_COMPANDING_A_LAW A-Law companding (8-bit data)
ARM_SAI_COMPANDING_U_LAW u-Law companding (8-bit data)
ARM_SAI_CLOCK_POLARITY_0 (default)> 23 Clock Polarity Drive on falling edge, capture on rising edge.
ARM_SAI_CLOCK_POLARITY_1 Drive on rising edge, capture on falling edge.
ARM_SAI_MCLK_PIN_INACTIVE (default) 24..26 Master Clock pin (MCLK) MCLK not used.
ARM_SAI_MCLK_PIN_OUTPUT MCLK is output (Master mode only).
ARM_SAI_MCLK_PIN_INPUT MCLK is input (Master mode only).
+

The parameter arg1 provides frame-specific values depending on the control operation. Values from different categories can be ORed.

+ + + + + + + + + + + + + + + + + + + + + + + +
Parameter arg1 Bit Category Description
ARM_SAI_FRAME_LENGTH(n) 0..9 Frame Length Frame length in bits; the possible range for n is 8..1024; default depends on protocol and data.
ARM_SAI_FRAME_SYNC_WIDTH(n) 10..17 Frame Sync Width Frame Sync width in bits; the possible range for n is 1..256; default=1; User protocol only, ignored otherwise.
ARM_SAI_FRAME_SYNC_POLARITY_HIGH 18 Frame Sync Polarity Frame Sync is active high (default).
ARM_SAI_FRAME_SYNC_POLARITY_LOW Frame Sync is active low (User protocol only, ignored otherwise).
ARM_SAI_FRAME_SYNC_EARLY 19 Frame Sync Early Frame Sync one bit before the first bit of the frame (User protocol only, ignored otherwise).
ARM_SAI_SLOT_COUNT(n) 20..24 Frame Sync Count Number of slots in frame; the possible range for n is 1..32; default=1; User protocol only, ignored otherwise.
ARM_SAI_SLOT_SIZE_DEFAULT 25..26 Frame Slot Size Slot size is equal to data size (default).
ARM_SAI_SLOT_SIZE_16 Slot size is 16 bits (User protocol only, ignored otherwise).
ARM_SAI_SLOT_SIZE_32 Slot size is 32 bits (User protocol only, ignored otherwise).
ARM_SAI_SLOT_OFFSET(n) 27..31 Frame Slot Offset Offset of first data bit in slot; The range for n is 0..31; default=0; User protocol only, ignored otherwise.
+

Depending on the control operation, the parameter arg2 specifies the Master Clock (MCLK) prescaler and calculates the audio frequency automatically.

+ + + + + +
Parameter arg2 MCLK Prescaler
ARM_SAI_MCLK_PRESCALER(n) MCLK prescaler; Audio frequency = MCLK/n; the range for n is 1..4096; default=1.
+

Example

+
extern ARM_DRIVER_SAI Driver_SAI0;
+
+
// configure Transmitter to Asynchronous Master: I2S Protocol, 16-bit data, 16kHz Audio frequency
+
status = Driver_SAI0.Control(ARM_SAI_CONFIGURE_TX |
+
ARM_SAI_MODE_MASTER |
+
ARM_SAI_ASYNCHRONOUS |
+
ARM_SAI_PROTOCOL_I2S |
+
ARM_SAI_DATA_SIZE(16), 0, 16000);
+
+
// configure Receiver to Asynchronous Master: I2S Protocol, 16-bit data, 16kHz Audio frequency
+
status = Driver_SAI0.Control(ARM_SAI_CONFIGURE_RX |
+
ARM_SAI_MODE_MASTER |
+
ARM_SAI_ASYNCHRONOUS |
+
ARM_SAI_PROTOCOL_I2S |
+
ARM_SAI_DATA_SIZE(16), 0, 16000);
+
+
// enable Transmitter
+
status = Driver_SAI0.Control(ARM_SAI_CONTROL_TX, 1, 0);
+
+
// enable Receiver
+
status = Driver_SAI0.Control(ARM_SAI_CONTROL_RX, 1, 0);
+
+
+
+ +
+
+ + + + + + + + +
ARM_SAI_STATUS ARM_SAI_GetStatus (void )
+
+ +

Get SAI status.

+
Returns
SAI status ARM_SAI_STATUS
+

The function ARM_SAI_GetStatus retrieves the current SAI interface status.

+ +
+
+ +
+
+ + + + + + + + +
void ARM_SAI_SignalEvent (uint32_t event)
+
+ +

Signal SAI Events.

+
Parameters
+ + +
[in]eventSAI Events notification mask
+
+
+
Returns
none
+

The function ARM_SAI_SignalEvent is a callback function registered by the function ARM_SAI_Initialize.

+

The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

The following events can be generated:

+ + + + + + + + + + + + + +
Parameter event Bit Description
ARM_SAI_EVENT_SEND_COMPLETE 0 Occurs after call to ARM_SAI_Send to indicate that all the data has been sent (or queued in transmit buffers). The driver is ready for the next call to ARM_SAI_Send.
ARM_SAI_EVENT_RECEIVE_COMPLETE 1 Occurs after call to ARM_SAI_Receive to indicate that all the data has been received. The driver is ready for the next call to ARM_SAI_Receive.
ARM_SAI_EVENT_TX_UNDERFLOW 2 Occurs when data is to be sent but send operation has not been started. Data field tx_underflow = 1 of ARM_SAI_STATUS.
ARM_SAI_EVENT_RX_OVERFLOW 3 Occurs when data is received but receive operation has not been started. Data field rx_underflow = 1 of ARM_SAI_STATUS.
ARM_SAI_EVENT_FRAME_ERROR 4 Occurs in slave mode when invalid synchronization frame is detected. Data field event_frame_error = 1 of ARM_SAI_STATUS.
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__interface__gr.js b/docs/Driver/html/group__sai__interface__gr.js new file mode 100644 index 0000000..546bb9b --- /dev/null +++ b/docs/Driver/html/group__sai__interface__gr.js @@ -0,0 +1,54 @@ +var group__sai__interface__gr = +[ + [ "Status Error Codes", "group__sai__execution__status.html", "group__sai__execution__status" ], + [ "SAI Events", "group__SAI__events.html", "group__SAI__events" ], + [ "SAI Control Codes", "group__sai__control.html", "group__sai__control" ], + [ "ARM_DRIVER_SAI", "group__sai__interface__gr.html#structARM__DRIVER__SAI", [ + [ "GetVersion", "group__sai__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__sai__interface__gr.html#a7e230744b9898cabf80ee6f2595569f6", null ], + [ "Initialize", "group__sai__interface__gr.html#a54a38e78d5fd7ca0d37174c81ec01731", null ], + [ "Uninitialize", "group__sai__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__sai__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "Send", "group__sai__interface__gr.html#a44eedddf4428cf4b98883b6c27d31922", null ], + [ "Receive", "group__sai__interface__gr.html#adb9224a35fe16c92eb0dd103638e4cf3", null ], + [ "GetTxCount", "group__sai__interface__gr.html#a0b28b2c21016702f50c28655653099df", null ], + [ "GetRxCount", "group__sai__interface__gr.html#a758c7822edf6ac18f82eb33c9dc09d71", null ], + [ "Control", "group__sai__interface__gr.html#a80455fc2c7355b1850098710fd66a244", null ], + [ "GetStatus", "group__sai__interface__gr.html#a310d55d55bd7c6b0393d43bb994db708", null ] + ] ], + [ "ARM_SAI_CAPABILITIES", "group__sai__interface__gr.html#structARM__SAI__CAPABILITIES", [ + [ "asynchronous", "group__sai__interface__gr.html#a75ba2507ea29601a309393e794f4413d", null ], + [ "synchronous", "group__sai__interface__gr.html#a9fa4f850b8ce2be2c7ffa2e3ec70ae20", null ], + [ "protocol_user", "group__sai__interface__gr.html#a808b1f9e0abc3fa67945899cfc9fccc1", null ], + [ "protocol_i2s", "group__sai__interface__gr.html#a6fcb9d68c4999860ce162c0ef44c4c97", null ], + [ "protocol_justified", "group__sai__interface__gr.html#a5363ec1fc0042620cb8aeeee4f98691b", null ], + [ "protocol_pcm", "group__sai__interface__gr.html#a0b2c79bd96ecb47d801fc5389819314a", null ], + [ "protocol_ac97", "group__sai__interface__gr.html#a5255f8d78a18ace0a959f604f9c065dd", null ], + [ "mono_mode", "group__sai__interface__gr.html#a8d92817d8662211abda2d747c52ff4a9", null ], + [ "companding", "group__sai__interface__gr.html#a77e4d8466d2bde30e6583b9ad8ba8c82", null ], + [ "mclk_pin", "group__sai__interface__gr.html#a12554e2522a0c611e8a26c9e536554eb", null ], + [ "event_frame_error", "group__sai__interface__gr.html#acc06ba75f18af9862d171426abc3273e", null ], + [ "reserved", "group__sai__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_SAI_STATUS", "group__sai__interface__gr.html#structARM__SAI__STATUS", [ + [ "tx_busy", "group__sai__interface__gr.html#a2c6d2b67fba3f3e084e96a6bc7fcac6b", null ], + [ "rx_busy", "group__sai__interface__gr.html#a9f5baee58ed41b382628a82a0b1cbcb4", null ], + [ "tx_underflow", "group__sai__interface__gr.html#a048f45e9d2257a21821f81d9edd17b72", null ], + [ "rx_overflow", "group__sai__interface__gr.html#ac403aefd9bce8b0172e1996c0f3dd8aa", null ], + [ "frame_error", "group__sai__interface__gr.html#a1b4f69a2caf19ef9fd75cf27ae3932f9", null ], + [ "reserved", "group__sai__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_SAI_SignalEvent_t", "group__sai__interface__gr.html#gad8ca8e2459e540928f6315b3df6da0ee", null ], + [ "ARM_SAI_GetVersion", "group__sai__interface__gr.html#ga786b1970a788a4dfc6156b42364e52f8", null ], + [ "ARM_SAI_GetCapabilities", "group__sai__interface__gr.html#gac6c636757944eaf25aebf312a67665aa", null ], + [ "ARM_SAI_Initialize", "group__sai__interface__gr.html#ga89622a02ca1e7affb1a01eefacb6f54c", null ], + [ "ARM_SAI_Uninitialize", "group__sai__interface__gr.html#gabdefafaba6f072cfd7ed6f8f132422b6", null ], + [ "ARM_SAI_PowerControl", "group__sai__interface__gr.html#gacdec50a3dd5902de601caa7397c1dabc", null ], + [ "ARM_SAI_Send", "group__sai__interface__gr.html#ga8bb6866c535adeb930bc4a847d476fcd", null ], + [ "ARM_SAI_Receive", "group__sai__interface__gr.html#ga2d55f506cef9d2849cbe418146086d98", null ], + [ "ARM_SAI_GetTxCount", "group__sai__interface__gr.html#gaa9805f9d32aee205f787e625a58e8898", null ], + [ "ARM_SAI_GetRxCount", "group__sai__interface__gr.html#ga2c571fcc8b9632c25a64043bc2b2baec", null ], + [ "ARM_SAI_Control", "group__sai__interface__gr.html#ga405a0769c33da6801055db0fb9b6c869", null ], + [ "ARM_SAI_GetStatus", "group__sai__interface__gr.html#ga6a202b57697f0f7a9742e76b33d5eeec", null ], + [ "ARM_SAI_SignalEvent", "group__sai__interface__gr.html#gaedf3347cb25d6bf2faad1bbb35ad79f4", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__interface__gr_structARM__DRIVER__SAI.js b/docs/Driver/html/group__sai__interface__gr_structARM__DRIVER__SAI.js new file mode 100644 index 0000000..39578c3 --- /dev/null +++ b/docs/Driver/html/group__sai__interface__gr_structARM__DRIVER__SAI.js @@ -0,0 +1,14 @@ +var group__sai__interface__gr_structARM__DRIVER__SAI = +[ + [ "GetVersion", "group__sai__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__sai__interface__gr.html#a7e230744b9898cabf80ee6f2595569f6", null ], + [ "Initialize", "group__sai__interface__gr.html#a54a38e78d5fd7ca0d37174c81ec01731", null ], + [ "Uninitialize", "group__sai__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__sai__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "Send", "group__sai__interface__gr.html#a44eedddf4428cf4b98883b6c27d31922", null ], + [ "Receive", "group__sai__interface__gr.html#adb9224a35fe16c92eb0dd103638e4cf3", null ], + [ "GetTxCount", "group__sai__interface__gr.html#a0b28b2c21016702f50c28655653099df", null ], + [ "GetRxCount", "group__sai__interface__gr.html#a758c7822edf6ac18f82eb33c9dc09d71", null ], + [ "Control", "group__sai__interface__gr.html#a80455fc2c7355b1850098710fd66a244", null ], + [ "GetStatus", "group__sai__interface__gr.html#a310d55d55bd7c6b0393d43bb994db708", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__interface__gr_structARM__SAI__CAPABILITIES.js b/docs/Driver/html/group__sai__interface__gr_structARM__SAI__CAPABILITIES.js new file mode 100644 index 0000000..c1a2ec4 --- /dev/null +++ b/docs/Driver/html/group__sai__interface__gr_structARM__SAI__CAPABILITIES.js @@ -0,0 +1,15 @@ +var group__sai__interface__gr_structARM__SAI__CAPABILITIES = +[ + [ "asynchronous", "group__sai__interface__gr.html#a75ba2507ea29601a309393e794f4413d", null ], + [ "synchronous", "group__sai__interface__gr.html#a9fa4f850b8ce2be2c7ffa2e3ec70ae20", null ], + [ "protocol_user", "group__sai__interface__gr.html#a808b1f9e0abc3fa67945899cfc9fccc1", null ], + [ "protocol_i2s", "group__sai__interface__gr.html#a6fcb9d68c4999860ce162c0ef44c4c97", null ], + [ "protocol_justified", "group__sai__interface__gr.html#a5363ec1fc0042620cb8aeeee4f98691b", null ], + [ "protocol_pcm", "group__sai__interface__gr.html#a0b2c79bd96ecb47d801fc5389819314a", null ], + [ "protocol_ac97", "group__sai__interface__gr.html#a5255f8d78a18ace0a959f604f9c065dd", null ], + [ "mono_mode", "group__sai__interface__gr.html#a8d92817d8662211abda2d747c52ff4a9", null ], + [ "companding", "group__sai__interface__gr.html#a77e4d8466d2bde30e6583b9ad8ba8c82", null ], + [ "mclk_pin", "group__sai__interface__gr.html#a12554e2522a0c611e8a26c9e536554eb", null ], + [ "event_frame_error", "group__sai__interface__gr.html#acc06ba75f18af9862d171426abc3273e", null ], + [ "reserved", "group__sai__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__interface__gr_structARM__SAI__STATUS.js b/docs/Driver/html/group__sai__interface__gr_structARM__SAI__STATUS.js new file mode 100644 index 0000000..5bf3298 --- /dev/null +++ b/docs/Driver/html/group__sai__interface__gr_structARM__SAI__STATUS.js @@ -0,0 +1,9 @@ +var group__sai__interface__gr_structARM__SAI__STATUS = +[ + [ "tx_busy", "group__sai__interface__gr.html#a2c6d2b67fba3f3e084e96a6bc7fcac6b", null ], + [ "rx_busy", "group__sai__interface__gr.html#a9f5baee58ed41b382628a82a0b1cbcb4", null ], + [ "tx_underflow", "group__sai__interface__gr.html#a048f45e9d2257a21821f81d9edd17b72", null ], + [ "rx_overflow", "group__sai__interface__gr.html#ac403aefd9bce8b0172e1996c0f3dd8aa", null ], + [ "frame_error", "group__sai__interface__gr.html#a1b4f69a2caf19ef9fd75cf27ae3932f9", null ], + [ "reserved", "group__sai__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__mclk__pin__control.html b/docs/Driver/html/group__sai__mclk__pin__control.html new file mode 100644 index 0000000..3932955 --- /dev/null +++ b/docs/Driver/html/group__sai__mclk__pin__control.html @@ -0,0 +1,191 @@ + + + + + +SAI Master Clock Pin +CMSIS-Driver: SAI Master Clock Pin + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Master Clock Pin
SAI Configuration
+
+
+ +

Defines MCLK pin. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_SAI_MCLK_PIN_INACTIVE   (0U << ARM_SAI_MCLK_PIN_Pos)
 MCLK not used (default) More...
 
#define ARM_SAI_MCLK_PIN_OUTPUT   (1U << ARM_SAI_MCLK_PIN_Pos)
 MCLK is output (Master only) More...
 
#define ARM_SAI_MCLK_PIN_INPUT   (2U << ARM_SAI_MCLK_PIN_Pos)
 MCLK is input (Master only) More...
 
+

Description

+

Defines MCLK pin.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_MCLK_PIN_INACTIVE   (0U << ARM_SAI_MCLK_PIN_Pos)
+
+ +

MCLK not used (default)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_MCLK_PIN_OUTPUT   (1U << ARM_SAI_MCLK_PIN_Pos)
+
+ +

MCLK is output (Master only)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_MCLK_PIN_INPUT   (2U << ARM_SAI_MCLK_PIN_Pos)
+
+ +

MCLK is input (Master only)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__mclk__pin__control.js b/docs/Driver/html/group__sai__mclk__pin__control.js new file mode 100644 index 0000000..de9029e --- /dev/null +++ b/docs/Driver/html/group__sai__mclk__pin__control.js @@ -0,0 +1,6 @@ +var group__sai__mclk__pin__control = +[ + [ "ARM_SAI_MCLK_PIN_INACTIVE", "group__sai__mclk__pin__control.html#ga7654bffb42e96d48df57c598323337d6", null ], + [ "ARM_SAI_MCLK_PIN_OUTPUT", "group__sai__mclk__pin__control.html#ga24d99edf05699eff32da02742fb04ced", null ], + [ "ARM_SAI_MCLK_PIN_INPUT", "group__sai__mclk__pin__control.html#ga2cd610be9ba9532b2926376deaacf5ad", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__mclk__pres__control.html b/docs/Driver/html/group__sai__mclk__pres__control.html new file mode 100644 index 0000000..6c022e3 --- /dev/null +++ b/docs/Driver/html/group__sai__mclk__pres__control.html @@ -0,0 +1,161 @@ + + + + + +SAI Master Clock Prescaler +CMSIS-Driver: SAI Master Clock Prescaler + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Master Clock Prescaler
SAI Configuration
+
+
+ +

Defines MCLK prescaler. +More...

+ + + + + +

+Macros

#define ARM_SAI_MCLK_PRESCALER(n)   ((((n)-1)&0xFFFU) << ARM_SAI_MCLK_PRESCALER_Pos)
 MCLK prescaler; Audio_frequency = MCLK/n; n = 1..4096 (default=1) More...
 
+

Description

+

Defines MCLK prescaler.

+

Macro Definition Documentation

+ +
+
+ + + + + + + + +
#define ARM_SAI_MCLK_PRESCALER( n)   ((((n)-1)&0xFFFU) << ARM_SAI_MCLK_PRESCALER_Pos)
+
+ +

MCLK prescaler; Audio_frequency = MCLK/n; n = 1..4096 (default=1)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__mclk__pres__control.js b/docs/Driver/html/group__sai__mclk__pres__control.js new file mode 100644 index 0000000..f2a4b45 --- /dev/null +++ b/docs/Driver/html/group__sai__mclk__pres__control.js @@ -0,0 +1,4 @@ +var group__sai__mclk__pres__control = +[ + [ "ARM_SAI_MCLK_PRESCALER", "group__sai__mclk__pres__control.html#ga2afa85cd335e75d8b9b06c9f47f3f4b0", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__mode__control.html b/docs/Driver/html/group__sai__mode__control.html new file mode 100644 index 0000000..8f0fd35 --- /dev/null +++ b/docs/Driver/html/group__sai__mode__control.html @@ -0,0 +1,174 @@ + + + + + +SAI Mode +CMSIS-Driver: SAI Mode + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Mode
SAI Configuration
+
+
+ +

Defines Transmitter/Receiver mode. +More...

+ + + + + + + + +

+Macros

#define ARM_SAI_MODE_MASTER   (1U << ARM_SAI_MODE_Pos)
 Master Mode. More...
 
#define ARM_SAI_MODE_SLAVE   (0U << ARM_SAI_MODE_Pos)
 Slave Mode (default) More...
 
+

Description

+

Defines Transmitter/Receiver mode.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_MODE_MASTER   (1U << ARM_SAI_MODE_Pos)
+
+ +

Master Mode.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_MODE_SLAVE   (0U << ARM_SAI_MODE_Pos)
+
+ +

Slave Mode (default)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__mode__control.js b/docs/Driver/html/group__sai__mode__control.js new file mode 100644 index 0000000..5af2bd5 --- /dev/null +++ b/docs/Driver/html/group__sai__mode__control.js @@ -0,0 +1,5 @@ +var group__sai__mode__control = +[ + [ "ARM_SAI_MODE_MASTER", "group__sai__mode__control.html#ga5bedff714ea0f90139665b72d44daddc", null ], + [ "ARM_SAI_MODE_SLAVE", "group__sai__mode__control.html#ga5956c12a24a506754ecc7999f0660bb5", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__mono__control.html b/docs/Driver/html/group__sai__mono__control.html new file mode 100644 index 0000000..cfabcd5 --- /dev/null +++ b/docs/Driver/html/group__sai__mono__control.html @@ -0,0 +1,157 @@ + + + + + +SAI Mono Mode +CMSIS-Driver: SAI Mono Mode + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Mono Mode
SAI Configuration
+
+
+ +

Defines mono mode. +More...

+ + + + + +

+Macros

#define ARM_SAI_MONO_MODE   (1U << 19)
 Mono Mode (only for I2S, MSB/LSB justified) More...
 
+

Description

+

Defines mono mode.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_MONO_MODE   (1U << 19)
+
+ +

Mono Mode (only for I2S, MSB/LSB justified)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__mono__control.js b/docs/Driver/html/group__sai__mono__control.js new file mode 100644 index 0000000..f3733e3 --- /dev/null +++ b/docs/Driver/html/group__sai__mono__control.js @@ -0,0 +1,4 @@ +var group__sai__mono__control = +[ + [ "ARM_SAI_MONO_MODE", "group__sai__mono__control.html#ga0adcd27875d92add813b9664e9cb0b4b", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__protocol__control.html b/docs/Driver/html/group__sai__protocol__control.html new file mode 100644 index 0000000..7a8d36f --- /dev/null +++ b/docs/Driver/html/group__sai__protocol__control.html @@ -0,0 +1,259 @@ + + + + + +SAI Protocol +CMSIS-Driver: SAI Protocol + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Protocol
SAI Configuration
+
+
+ +

Defines Transmitter/Receiver protocol. +More...

+ + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SAI_PROTOCOL_USER   (0U << ARM_SAI_PROTOCOL_Pos)
 User defined (default) More...
 
#define ARM_SAI_PROTOCOL_I2S   (1U << ARM_SAI_PROTOCOL_Pos)
 I2S. More...
 
#define ARM_SAI_PROTOCOL_MSB_JUSTIFIED   (2U << ARM_SAI_PROTOCOL_Pos)
 MSB (left) justified. More...
 
#define ARM_SAI_PROTOCOL_LSB_JUSTIFIED   (3U << ARM_SAI_PROTOCOL_Pos)
 LSB (right) justified. More...
 
#define ARM_SAI_PROTOCOL_PCM_SHORT   (4U << ARM_SAI_PROTOCOL_Pos)
 PCM with short frame. More...
 
#define ARM_SAI_PROTOCOL_PCM_LONG   (5U << ARM_SAI_PROTOCOL_Pos)
 PCM with long frame. More...
 
#define ARM_SAI_PROTOCOL_AC97   (6U << ARM_SAI_PROTOCOL_Pos)
 AC'97. More...
 
+

Description

+

Defines Transmitter/Receiver protocol.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_PROTOCOL_USER   (0U << ARM_SAI_PROTOCOL_Pos)
+
+ +

User defined (default)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_PROTOCOL_I2S   (1U << ARM_SAI_PROTOCOL_Pos)
+
+ +

I2S.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_PROTOCOL_MSB_JUSTIFIED   (2U << ARM_SAI_PROTOCOL_Pos)
+
+ +

MSB (left) justified.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_PROTOCOL_LSB_JUSTIFIED   (3U << ARM_SAI_PROTOCOL_Pos)
+
+ +

LSB (right) justified.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_PROTOCOL_PCM_SHORT   (4U << ARM_SAI_PROTOCOL_Pos)
+
+ +

PCM with short frame.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_PROTOCOL_PCM_LONG   (5U << ARM_SAI_PROTOCOL_Pos)
+
+ +

PCM with long frame.

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_PROTOCOL_AC97   (6U << ARM_SAI_PROTOCOL_Pos)
+
+ +

AC'97.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__protocol__control.js b/docs/Driver/html/group__sai__protocol__control.js new file mode 100644 index 0000000..ba00237 --- /dev/null +++ b/docs/Driver/html/group__sai__protocol__control.js @@ -0,0 +1,10 @@ +var group__sai__protocol__control = +[ + [ "ARM_SAI_PROTOCOL_USER", "group__sai__protocol__control.html#gacef87941052c21ebacd3dde6ce9d6925", null ], + [ "ARM_SAI_PROTOCOL_I2S", "group__sai__protocol__control.html#gaaaf423bbe59920b3c7813e22ce083ddc", null ], + [ "ARM_SAI_PROTOCOL_MSB_JUSTIFIED", "group__sai__protocol__control.html#gad931f9e8aedff4e6040d726d707862f0", null ], + [ "ARM_SAI_PROTOCOL_LSB_JUSTIFIED", "group__sai__protocol__control.html#gab88b6f9b61a20927ac8f8d39e46c6349", null ], + [ "ARM_SAI_PROTOCOL_PCM_SHORT", "group__sai__protocol__control.html#ga3762437e0b1402b5d4fd293ae745f103", null ], + [ "ARM_SAI_PROTOCOL_PCM_LONG", "group__sai__protocol__control.html#gad43530c5b6ae1e89db587b20d71440b4", null ], + [ "ARM_SAI_PROTOCOL_AC97", "group__sai__protocol__control.html#ga8b1669910f4db4bb3584543e7eb04d7a", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__slot__control.html b/docs/Driver/html/group__sai__slot__control.html new file mode 100644 index 0000000..f70ae67 --- /dev/null +++ b/docs/Driver/html/group__sai__slot__control.html @@ -0,0 +1,233 @@ + + + + + +SAI Slot +CMSIS-Driver: SAI Slot + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Slot
SAI Configuration
+
+
+ +

Defines data slots. +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SAI_SLOT_COUNT(n)   ((((n)-1)&0x1FU) << ARM_SAI_SLOT_COUNT_Pos)
 Number of slots in frame (1..32); default=1; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_SLOT_SIZE_DEFAULT   (0U << ARM_SAI_SLOT_SIZE_Pos)
 Slot size is equal to data size (default) More...
 
#define ARM_SAI_SLOT_SIZE_16   (1U << ARM_SAI_SLOT_SIZE_Pos)
 Slot size = 16 bits; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_SLOT_SIZE_32   (3U << ARM_SAI_SLOT_SIZE_Pos)
 Slot size = 32 bits; User Protocol only (ignored otherwise) More...
 
#define ARM_SAI_SLOT_OFFSET(n)   (((n)&0x1FU) << ARM_SAI_SLOT_OFFSET_Pos)
 Offset of first data bit in slot (0..31); default=0; User Protocol only (ignored otherwise) More...
 
+

Description

+

Defines data slots.

+

Macro Definition Documentation

+ +
+
+ + + + + + + + +
#define ARM_SAI_SLOT_COUNT( n)   ((((n)-1)&0x1FU) << ARM_SAI_SLOT_COUNT_Pos)
+
+ +

Number of slots in frame (1..32); default=1; User Protocol only (ignored otherwise)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_SLOT_SIZE_DEFAULT   (0U << ARM_SAI_SLOT_SIZE_Pos)
+
+ +

Slot size is equal to data size (default)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_SLOT_SIZE_16   (1U << ARM_SAI_SLOT_SIZE_Pos)
+
+ +

Slot size = 16 bits; User Protocol only (ignored otherwise)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_SLOT_SIZE_32   (3U << ARM_SAI_SLOT_SIZE_Pos)
+
+ +

Slot size = 32 bits; User Protocol only (ignored otherwise)

+ +
+
+ +
+
+ + + + + + + + +
#define ARM_SAI_SLOT_OFFSET( n)   (((n)&0x1FU) << ARM_SAI_SLOT_OFFSET_Pos)
+
+ +

Offset of first data bit in slot (0..31); default=0; User Protocol only (ignored otherwise)

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__slot__control.js b/docs/Driver/html/group__sai__slot__control.js new file mode 100644 index 0000000..28600b4 --- /dev/null +++ b/docs/Driver/html/group__sai__slot__control.js @@ -0,0 +1,8 @@ +var group__sai__slot__control = +[ + [ "ARM_SAI_SLOT_COUNT", "group__sai__slot__control.html#ga8f2cf3a212ca7fe389e00b082efb5d0b", null ], + [ "ARM_SAI_SLOT_SIZE_DEFAULT", "group__sai__slot__control.html#gad77c6c0de2a4e7223a0c42e1594f0a2c", null ], + [ "ARM_SAI_SLOT_SIZE_16", "group__sai__slot__control.html#ga2bb9cf53b07cac81fb0fe71de6c97c83", null ], + [ "ARM_SAI_SLOT_SIZE_32", "group__sai__slot__control.html#gaaa5c4cc18a0f5668bc9f117874cd83dd", null ], + [ "ARM_SAI_SLOT_OFFSET", "group__sai__slot__control.html#ga48d4a142f3a1bb0fa4e88c9e427932a0", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__sai__sync__control.html b/docs/Driver/html/group__sai__sync__control.html new file mode 100644 index 0000000..932070a --- /dev/null +++ b/docs/Driver/html/group__sai__sync__control.html @@ -0,0 +1,174 @@ + + + + + +SAI Synchronization +CMSIS-Driver: SAI Synchronization + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SAI Synchronization
SAI Configuration
+
+
+ +

Defines Transmitter/Receiver synchronization. +More...

+ + + + + + + + +

+Macros

#define ARM_SAI_ASYNCHRONOUS   (0U << ARM_SAI_SYNCHRONIZATION_Pos)
 Asynchronous (default) More...
 
#define ARM_SAI_SYNCHRONOUS   (1U << ARM_SAI_SYNCHRONIZATION_Pos)
 Synchronous. More...
 
+

Description

+

Defines Transmitter/Receiver synchronization.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SAI_ASYNCHRONOUS   (0U << ARM_SAI_SYNCHRONIZATION_Pos)
+
+ +

Asynchronous (default)

+ +
+
+ +
+
+ + + + +
#define ARM_SAI_SYNCHRONOUS   (1U << ARM_SAI_SYNCHRONIZATION_Pos)
+
+ +

Synchronous.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__sai__sync__control.js b/docs/Driver/html/group__sai__sync__control.js new file mode 100644 index 0000000..f786241 --- /dev/null +++ b/docs/Driver/html/group__sai__sync__control.js @@ -0,0 +1,5 @@ +var group__sai__sync__control = +[ + [ "ARM_SAI_ASYNCHRONOUS", "group__sai__sync__control.html#gad123537cb6ab9eefd6feab193ed74655", null ], + [ "ARM_SAI_SYNCHRONOUS", "group__sai__sync__control.html#gad2ad5406c30c353e80f54b40b3de5db8", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__bit__order__ctrls.html b/docs/Driver/html/group__spi__bit__order__ctrls.html new file mode 100644 index 0000000..50fdbea --- /dev/null +++ b/docs/Driver/html/group__spi__bit__order__ctrls.html @@ -0,0 +1,176 @@ + + + + + +SPI Bit Order +CMSIS-Driver: SPI Bit Order + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SPI Bit Order
SPI Control Codes
+
+
+ +

Defines the bit order. +More...

+ + + + + + + + +

+Macros

#define ARM_SPI_MSB_LSB   (0UL << ARM_SPI_BIT_ORDER_Pos)
 SPI Bit order from MSB to LSB (default) More...
 
#define ARM_SPI_LSB_MSB   (1UL << ARM_SPI_BIT_ORDER_Pos)
 SPI Bit order from LSB to MSB. More...
 
+

Description

+

Defines the bit order.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SPI_MSB_LSB   (0UL << ARM_SPI_BIT_ORDER_Pos)
+
+ +

SPI Bit order from MSB to LSB (default)

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_LSB_MSB   (1UL << ARM_SPI_BIT_ORDER_Pos)
+
+ +

SPI Bit order from LSB to MSB.

+
See Also
ARM_SPI_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__spi__bit__order__ctrls.js b/docs/Driver/html/group__spi__bit__order__ctrls.js new file mode 100644 index 0000000..a58b5c8 --- /dev/null +++ b/docs/Driver/html/group__spi__bit__order__ctrls.js @@ -0,0 +1,5 @@ +var group__spi__bit__order__ctrls = +[ + [ "ARM_SPI_MSB_LSB", "group__spi__bit__order__ctrls.html#ga98228a708cbab6e214c7ac696f77dab6", null ], + [ "ARM_SPI_LSB_MSB", "group__spi__bit__order__ctrls.html#ga41c53c3b396a89ce78018467e561aaaf", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__data__bits__ctrls.html b/docs/Driver/html/group__spi__data__bits__ctrls.html new file mode 100644 index 0000000..0a9c139 --- /dev/null +++ b/docs/Driver/html/group__spi__data__bits__ctrls.html @@ -0,0 +1,162 @@ + + + + + +SPI Data Bits +CMSIS-Driver: SPI Data Bits + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SPI Data Bits
SPI Control Codes
+
+
+ +

Defines the number of data bits. +More...

+ + + + + +

+Macros

#define ARM_SPI_DATA_BITS(n)   (((n) & 0x3F) << ARM_SPI_DATA_BITS_Pos)
 Number of Data bits. More...
 
+

Description

+

Defines the number of data bits.

+

Macro Definition Documentation

+ +
+
+ + + + + + + + +
#define ARM_SPI_DATA_BITS( n)   (((n) & 0x3F) << ARM_SPI_DATA_BITS_Pos)
+
+ +

Number of Data bits.

+
See Also
ARM_SPI_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__spi__data__bits__ctrls.js b/docs/Driver/html/group__spi__data__bits__ctrls.js new file mode 100644 index 0000000..02471f7 --- /dev/null +++ b/docs/Driver/html/group__spi__data__bits__ctrls.js @@ -0,0 +1,4 @@ +var group__spi__data__bits__ctrls = +[ + [ "ARM_SPI_DATA_BITS", "group__spi__data__bits__ctrls.html#gaf6c099a1d67256a32010120c66c55250", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__execution__status.html b/docs/Driver/html/group__spi__execution__status.html new file mode 100644 index 0000000..3f9422a --- /dev/null +++ b/docs/Driver/html/group__spi__execution__status.html @@ -0,0 +1,231 @@ + + + + + +Status Error Codes +CMSIS-Driver: Status Error Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Status Error Codes
SPI Interface
+
+
+ +

Negative values indicate errors (SPI has specific codes in addition to common Status Error Codes). +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SPI_ERROR_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 Specified Mode not supported. More...
 
#define ARM_SPI_ERROR_FRAME_FORMAT   (ARM_DRIVER_ERROR_SPECIFIC - 2)
 Specified Frame Format not supported. More...
 
#define ARM_SPI_ERROR_DATA_BITS   (ARM_DRIVER_ERROR_SPECIFIC - 3)
 Specified number of Data bits not supported. More...
 
#define ARM_SPI_ERROR_BIT_ORDER   (ARM_DRIVER_ERROR_SPECIFIC - 4)
 Specified Bit order not supported. More...
 
#define ARM_SPI_ERROR_SS_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 5)
 Specified Slave Select Mode not supported. More...
 
+

Description

+

Negative values indicate errors (SPI has specific codes in addition to common Status Error Codes).

+

The SPI driver has additional status error codes that are listed below. Note that the SPI driver also returns the comon Status Error Codes.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SPI_ERROR_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
+
+ +

Specified Mode not supported.

+

The mode requested with the function ARM_SPI_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_SPI_ERROR_FRAME_FORMAT   (ARM_DRIVER_ERROR_SPECIFIC - 2)
+
+ +

Specified Frame Format not supported.

+

The frame format requested with the function ARM_SPI_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_SPI_ERROR_DATA_BITS   (ARM_DRIVER_ERROR_SPECIFIC - 3)
+
+ +

Specified number of Data bits not supported.

+

The number of data bits requested with the function ARM_SPI_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_SPI_ERROR_BIT_ORDER   (ARM_DRIVER_ERROR_SPECIFIC - 4)
+
+ +

Specified Bit order not supported.

+

The bit order requested with the function ARM_SPI_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_SPI_ERROR_SS_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 5)
+
+ +

Specified Slave Select Mode not supported.

+

The slave select mode requested with the function ARM_SPI_Control is not supported by this driver.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__spi__execution__status.js b/docs/Driver/html/group__spi__execution__status.js new file mode 100644 index 0000000..9987bcc --- /dev/null +++ b/docs/Driver/html/group__spi__execution__status.js @@ -0,0 +1,8 @@ +var group__spi__execution__status = +[ + [ "ARM_SPI_ERROR_MODE", "group__spi__execution__status.html#ga273a55c5d19491c565e5f05d03d66f3f", null ], + [ "ARM_SPI_ERROR_FRAME_FORMAT", "group__spi__execution__status.html#gac47584fe5691889c056611bc589b25aa", null ], + [ "ARM_SPI_ERROR_DATA_BITS", "group__spi__execution__status.html#ga76f895d3380ca474124f83acbebc5651", null ], + [ "ARM_SPI_ERROR_BIT_ORDER", "group__spi__execution__status.html#ga6b8ac31930ea6ca3a9635f2ac935466d", null ], + [ "ARM_SPI_ERROR_SS_MODE", "group__spi__execution__status.html#gaae7b1a1feb46faa1830c92b73bd775ad", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__frame__format__ctrls.html b/docs/Driver/html/group__spi__frame__format__ctrls.html new file mode 100644 index 0000000..3d6f1b0 --- /dev/null +++ b/docs/Driver/html/group__spi__frame__format__ctrls.html @@ -0,0 +1,248 @@ + + + + + +SPI Frame Format +CMSIS-Driver: SPI Frame Format + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SPI Frame Format
SPI Control Codes
+
+
+ +

Defines the frame format. +More...

+ + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SPI_CPOL0_CPHA0   (0UL << ARM_SPI_FRAME_FORMAT_Pos)
 Clock Polarity 0, Clock Phase 0 (default) More...
 
#define ARM_SPI_CPOL0_CPHA1   (1UL << ARM_SPI_FRAME_FORMAT_Pos)
 Clock Polarity 0, Clock Phase 1. More...
 
#define ARM_SPI_CPOL1_CPHA0   (2UL << ARM_SPI_FRAME_FORMAT_Pos)
 Clock Polarity 1, Clock Phase 0. More...
 
#define ARM_SPI_CPOL1_CPHA1   (3UL << ARM_SPI_FRAME_FORMAT_Pos)
 Clock Polarity 1, Clock Phase 1. More...
 
#define ARM_SPI_TI_SSI   (4UL << ARM_SPI_FRAME_FORMAT_Pos)
 Texas Instruments Frame Format. More...
 
#define ARM_SPI_MICROWIRE   (5UL << ARM_SPI_FRAME_FORMAT_Pos)
 National Microwire Frame Format. More...
 
+

Description

+

Defines the frame format.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SPI_CPOL0_CPHA0   (0UL << ARM_SPI_FRAME_FORMAT_Pos)
+
+ +

Clock Polarity 0, Clock Phase 0 (default)

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_CPOL0_CPHA1   (1UL << ARM_SPI_FRAME_FORMAT_Pos)
+
+ +

Clock Polarity 0, Clock Phase 1.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_CPOL1_CPHA0   (2UL << ARM_SPI_FRAME_FORMAT_Pos)
+
+ +

Clock Polarity 1, Clock Phase 0.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_CPOL1_CPHA1   (3UL << ARM_SPI_FRAME_FORMAT_Pos)
+
+ +

Clock Polarity 1, Clock Phase 1.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_TI_SSI   (4UL << ARM_SPI_FRAME_FORMAT_Pos)
+
+ +

Texas Instruments Frame Format.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_MICROWIRE   (5UL << ARM_SPI_FRAME_FORMAT_Pos)
+
+ +

National Microwire Frame Format.

+
See Also
ARM_SPI_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__spi__frame__format__ctrls.js b/docs/Driver/html/group__spi__frame__format__ctrls.js new file mode 100644 index 0000000..e70b89c --- /dev/null +++ b/docs/Driver/html/group__spi__frame__format__ctrls.js @@ -0,0 +1,9 @@ +var group__spi__frame__format__ctrls = +[ + [ "ARM_SPI_CPOL0_CPHA0", "group__spi__frame__format__ctrls.html#gab4ac9a609c078d1e8332cf95da34e50e", null ], + [ "ARM_SPI_CPOL0_CPHA1", "group__spi__frame__format__ctrls.html#ga5498eb08c2ba8de2e1c2801428e79d71", null ], + [ "ARM_SPI_CPOL1_CPHA0", "group__spi__frame__format__ctrls.html#ga67193d9b5af1ec312a66d007c33b597f", null ], + [ "ARM_SPI_CPOL1_CPHA1", "group__spi__frame__format__ctrls.html#ga7fab572b2fec303e979e47eb2d13ca74", null ], + [ "ARM_SPI_TI_SSI", "group__spi__frame__format__ctrls.html#ga225185710ba38848a489013ba4475915", null ], + [ "ARM_SPI_MICROWIRE", "group__spi__frame__format__ctrls.html#ga44f481d32b9a9ea93673f05af82ccf86", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__interface__gr.html b/docs/Driver/html/group__spi__interface__gr.html new file mode 100644 index 0000000..ca046f8 --- /dev/null +++ b/docs/Driver/html/group__spi__interface__gr.html @@ -0,0 +1,1183 @@ + + + + + +SPI Interface +CMSIS-Driver: SPI Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
SPI Interface
+
+
+ +

Driver API for SPI Bus Peripheral (Driver_SPI.h) +More...

+ + + + + + + + + + + +

+Content

 Status Error Codes
 Negative values indicate errors (SPI has specific codes in addition to common Status Error Codes).
 
 SPI Events
 The SPI driver generates call back events that are notified via the function ARM_SPI_SignalEvent.
 
 SPI Control Codes
 Many parameters of the SPI driver are configured using the ARM_SPI_Control function.
 
+ + + + + + + + + + +

+Data Structures

struct  ARM_DRIVER_SPI
 Access structure of the SPI Driver. More...
 
struct  ARM_SPI_CAPABILITIES
 SPI Driver Capabilities. More...
 
struct  ARM_SPI_STATUS
 SPI Status. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_SPI_SignalEvent_t )(uint32_t event)
 Pointer to ARM_SPI_SignalEvent : Signal SPI Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_SPI_GetVersion (void)
 Get driver version. More...
 
ARM_SPI_CAPABILITIES ARM_SPI_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_SPI_Initialize (ARM_SPI_SignalEvent_t cb_event)
 Initialize SPI Interface. More...
 
int32_t ARM_SPI_Uninitialize (void)
 De-initialize SPI Interface. More...
 
int32_t ARM_SPI_PowerControl (ARM_POWER_STATE state)
 Control SPI Interface Power. More...
 
int32_t ARM_SPI_Send (const void *data, uint32_t num)
 Start sending data to SPI transmitter. More...
 
int32_t ARM_SPI_Receive (void *data, uint32_t num)
 Start receiving data from SPI receiver. More...
 
int32_t ARM_SPI_Transfer (const void *data_out, void *data_in, uint32_t num)
 Start sending/receiving data to/from SPI transmitter/receiver. More...
 
uint32_t ARM_SPI_GetDataCount (void)
 Get transferred data count. More...
 
int32_t ARM_SPI_Control (uint32_t control, uint32_t arg)
 Control SPI Interface. More...
 
ARM_SPI_STATUS ARM_SPI_GetStatus (void)
 Get SPI status. More...
 
void ARM_SPI_SignalEvent (uint32_t event)
 Signal SPI Events. More...
 
+

Description

+

Driver API for SPI Bus Peripheral (Driver_SPI.h)

+

The Serial Peripheral Interface Bus (SPI) implements a synchronous serial bus for data exchange. In microcontroller (MCU) applications, the interface is often used to connect peripheral components at board (PCB) level. SPI devices can operate as Master (SCLK and SS are outputs) or Slave (SCLK and SS are inputs). Wikipedia offers more information about the Serial Peripheral Interface Bus.

+

Block Diagram

+

The SPI Driver API defines a SPI interface for middleware components. The SPI Driver supports multiple slaves, but if only one slave is connected, then the Slave Select signal can be omitted.

+
+SPI_Master1Slaves.png +
+SPI Master connected to a single slave
+

 

+
+SPI_Master3Slaves.png +
+SPI Master connected to 3 slaves
+

The SPI Driver functions control the following SPI signal lines.

+ + + + + + + + + + + +
Signal Name Description
SS Slave Select (active low) Selects the slave. This signal can be part of the SPI peripheral or implemented using a GPIO pin.
MOSI Master Out, Slave In MOSI output of the Master connects to MOSI input of the Slave.
SCLK Serial Clock Serial clock output from Master. Controls the transfer speed and when data are sent and read.
MISO Master In, Slave Out MISO input of the Master connects to MISO output of the Slave.
+

SPI API

+

The following header files define the Application Programming Interface (API) for the SPI interface:

+
    +
  • Driver_SPI.h : Driver API for SPI Bus Peripheral
    • +
+

The driver implementation is a typical part of the Device Family Pack (DFP) that supports the peripherals of the microcontroller family.

+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +

Example Code

+

The following example code shows the usage of the SPI interface.

+
#include "Driver_SPI.h"
+
#include "cmsis_os.h" // ARM::CMSIS:RTOS:Keil RTX
+
+
+
void mySPI_Thread(void const *argument);
+
osThreadId tid_mySPI_Thread;
+
+
+
/* SPI Driver */
+
extern ARM_DRIVER_SPI Driver_SPI0;
+
+
+
void mySPI_callback(uint32_t event)
+
{
+
switch (event)
+
{
+
case ARM_SPI_EVENT_TRANSFER_COMPLETE:
+
/* Success: Wakeup Thread */
+
osSignalSet(tid_mySPI_Thread, 0x01);
+
break;
+
case ARM_SPI_EVENT_DATA_LOST:
+
/* Occurs in slave mode when data is requested/sent by master
+
but send/receive/transfer operation has not been started
+
and indicates that data is lost. Occurs also in master mode
+
when driver cannot transfer data fast enough. */
+
__breakpoint(0); /* Error: Call debugger or replace with custom error handling */
+
break;
+
case ARM_SPI_EVENT_MODE_FAULT:
+
/* Occurs in master mode when Slave Select is deactivated and
+
indicates Master Mode Fault. */
+
__breakpoint(0); /* Error: Call debugger or replace with custom error handling */
+
break;
+
}
+
}
+
+
/* Test data buffers */
+
const uint8_t testdata_out[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
+
uint8_t testdata_in [8];
+
+
void mySPI_Thread(void const* arg)
+
{
+
ARM_DRIVER_SPI* SPIdrv = &Driver_SPI0;
+
osEvent evt;
+
+
#ifdef DEBUG
+
ARM_DRIVER_VERSION version;
+
ARM_SPI_CAPABILITIES drv_capabilities;
+
+
version = SPIdrv->GetVersion();
+
if (version.api < 0x200) /* requires at minimum API version 2.00 or higher */
+
{ /* error handling */
+
return;
+
}
+
+
drv_capabilities = SPIdrv->GetCapabilities();
+
if (drv_capabilities.event_mode_fault == 0)
+
{ /* error handling */
+
return;
+
}
+
#endif
+
+
/* Initialize the SPI driver */
+
SPIdrv->Initialize(mySPI_callback);
+
/* Power up the SPI peripheral */
+
SPIdrv->PowerControl(ARM_POWER_FULL);
+
/* Configure the SPI to Master, 8-bit mode @10000 kBits/sec */
+
SPIdrv->Control(ARM_SPI_MODE_MASTER | ARM_SPI_CPOL1_CPHA1 | ARM_SPI_MSB_LSB | ARM_SPI_SS_MASTER_SW | ARM_SPI_DATA_BITS(8), 10000000);
+
+
/* SS line = INACTIVE = HIGH */
+
SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE);
+
+
/* thread loop */
+
while (1)
+
{
+
/* SS line = ACTIVE = LOW */
+
SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE);
+
/* Transmit some data */
+
SPIdrv->Send(testdata_out, sizeof(testdata_out));
+
/* Wait for completion */
+
evt = osSignalWait(0x01, 100);
+
if (evt.status == osEventTimeout) {
+
__breakpoint(0); /* Timeout error: Call debugger */
+
}
+
/* SS line = INACTIVE = HIGH */
+
SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE);
+
+
/* SS line = ACTIVE = LOW */
+
SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE);
+
/* Receive 8 bytes of reply */
+
SPIdrv->Receive(testdata_in, 8);
+
evt = osSignalWait(0x01, 100);
+
if (evt.status == osEventTimeout) {
+
__breakpoint(0); /* Timeout error: Call debugger */
+
}
+
/* SS line = INACTIVE = HIGH */
+
SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE);
+
}
+
}
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_SPI
+
+

Access structure of the SPI Driver.

+

The functions of the SPI driver are accessed by function pointers exposed by this structure. Refer to Common Driver Functions for overview information.

+

Each instance of a SPI interface provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:

+
    +
  • Driver_SPI0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_SPI1 is the name of the access struct of the second instance (no. 1).
    • +
+

A middleware configuration setting allows connecting the middleware to a specific driver instance Driver_SPIn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_SPI_GetVersion : Get driver version. More...
 
ARM_SPI_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_SPI_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_SPI_SignalEvent_t cb_event)
 Pointer to ARM_SPI_Initialize : Initialize SPI Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_SPI_Uninitialize : De-initialize SPI Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_SPI_PowerControl : Control SPI Interface Power. More...
 
int32_t(* Send )(const void *data, uint32_t num)
 Pointer to ARM_SPI_Send : Start sending data to SPI Interface. More...
 
int32_t(* Receive )(void *data, uint32_t num)
 Pointer to ARM_SPI_Receive : Start receiving data from SPI Interface. More...
 
int32_t(* Transfer )(const void *data_out, void *data_in, uint32_t num)
 Pointer to ARM_SPI_Transfer : Start sending/receiving data to/from SPI. More...
 
uint32_t(* GetDataCount )(void)
 Pointer to ARM_SPI_GetDataCount : Get transferred data count. More...
 
int32_t(* Control )(uint32_t control, uint32_t arg)
 Pointer to ARM_SPI_Control : Control SPI Interface. More...
 
ARM_SPI_STATUS(* GetStatus )(void)
 Pointer to ARM_SPI_GetStatus : Get SPI status. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_SPI_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_SPI_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_SPI_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_SPI_SignalEvent_t cb_event)
+
+ +

Pointer to ARM_SPI_Initialize : Initialize SPI Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_SPI_Uninitialize : De-initialize SPI Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_SPI_PowerControl : Control SPI Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* Send)(const void *data, uint32_t num)
+
+ +

Pointer to ARM_SPI_Send : Start sending data to SPI Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Receive)(void *data, uint32_t num)
+
+ +

Pointer to ARM_SPI_Receive : Start receiving data from SPI Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Transfer)(const void *data_out, void *data_in, uint32_t num)
+
+ +

Pointer to ARM_SPI_Transfer : Start sending/receiving data to/from SPI.

+ +
+
+ +
+
+ + + + +
uint32_t(* GetDataCount)(void)
+
+ +

Pointer to ARM_SPI_GetDataCount : Get transferred data count.

+ +
+
+ +
+
+ + + + +
int32_t(* Control)(uint32_t control, uint32_t arg)
+
+ +

Pointer to ARM_SPI_Control : Control SPI Interface.

+ +
+
+ +
+
+ + + + +
ARM_SPI_STATUS(* GetStatus)(void)
+
+ +

Pointer to ARM_SPI_GetStatus : Get SPI status.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_SPI_CAPABILITIES
+
+

SPI Driver Capabilities.

+

A SPI driver can be implemented with different capabilities. The data fields of this structure encode the capabilities implemented by this driver.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +simplex: 1 +supports Simplex Mode (Master and Slave)
+uint32_t +ti_ssi: 1 +supports TI Synchronous Serial Interface
+uint32_t +microwire: 1 +supports Microwire Interface
+uint32_t +event_mode_fault: 1 +Signal Mode Fault event: ARM_SPI_EVENT_MODE_FAULT.
+uint32_t +reserved: 28 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_SPI_STATUS
+
+

SPI Status.

+

Structure with information about the status of the SPI. The data fields encode busy flag and error flags.

+

Returned by:

+ +
+ + + + + + + + + + + + + +
Data Fields
+uint32_t +busy: 1 +Transmitter/Receiver busy flag.
+uint32_t +data_lost: 1 +Data lost: Receive overflow / Transmit underflow (cleared on start of transfer operation)
+uint32_t +mode_fault: 1 +Mode fault detected; optional (cleared on start of transfer operation)
+uint32_t +reserved: 29 +
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_SPI_SignalEvent_t
+
+ +

Pointer to ARM_SPI_SignalEvent : Signal SPI Event.

+

Provides the typedef for the callback function ARM_SPI_SignalEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_SPI_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_SPI_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_SPI Driver_SPI0;
+
ARM_DRIVER_SPI *drv_info;
+
+
void setup_spi (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_SPI0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_SPI_CAPABILITIES ARM_SPI_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_SPI_CAPABILITIES
+

The function ARM_SPI_GetCapabilities returns information about the capabilities in this driver implementation. The data fields of the structure ARM_SPI_CAPABILITIES encode various capabilities, for example supported modes.

+

Example:

+
extern ARM_DRIVER_SPI Driver_SPI0;
+
ARM_DRIVER_SPI *drv_info;
+
+
void read_capabilities (void) {
+
ARM_SPI_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_SPI0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_SPI_Initialize (ARM_SPI_SignalEvent_t cb_event)
+
+ +

Initialize SPI Interface.

+
Parameters
+ + +
[in]cb_eventPointer to ARM_SPI_SignalEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_SPI_Initialize initializes the SPI interface.

+

The parameter cb_event is a pointer to the ARM_SPI_SignalEvent callback function; use a NULL pointer when no callback signals are required.

+

The function is called when the middleware component starts operation and performs the following:

+
    +
  • Initializes the resources needed for the SPI interface.
    • +
  • Registers the ARM_SPI_SignalEvent callback function.
    • +
+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_SPI_Uninitialize (void )
+
+ +

De-initialize SPI Interface.

+
Returns
Status Error Codes
+

The function ARM_SPI_Uninitialize de-initializes the resources of SPI interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_SPI_PowerControl (ARM_POWER_STATE state)
+
+ +

Control SPI Interface Power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_SPI_PowerControl controls the power modes of the SPI interface.

+

The parameter state sets the operation and can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_SPI_Send (const void * data,
uint32_t num 
)
+
+ +

Start sending data to SPI transmitter.

+
Parameters
+ + + +
[in]dataPointer to buffer with data to send to SPI transmitter
[in]numNumber of data items to send
+
+
+
Returns
Status Error Codes
+

This function ARM_SPI_Send is used to send data to the SPI transmitter (received data is ignored).

+

The parameter data specifies the data buffer.
+The parameter num specifies the number of items to send.
+The item size is defined by the data type, which depends on the configured number of data bits.

+

Data type is:

+
    +
  • uint8_t when configured for 1..8 data bits
    • +
  • uint16_t when configured for 9..16 data bits
    • +
  • uint32_t when configured for 17..32 data bits
    • +
+

Calling the function ARM_SPI_Send only starts the send operation. When in slave mode, the operation is only registered and started when the master starts the transfer. The function is non-blocking and returns as soon as the driver has started the operation (driver typically configures DMA or the interrupt system for continuous transfer). During the operation it is not allowed to call this function or any other data transfer function again. Also the data buffer must stay allocated and the contents of unsent data must not be modified. When send operation is completed (requested number of items sent), the ARM_SPI_EVENT_TRANSFER_COMPLETE event is generated. Progress of send operation can also be monitored by reading the number of items already sent by calling ARM_SPI_GetDataCount.

+

Status of the transmitter can also be monitored by calling the ARM_SPI_GetStatus and checking the busy data field, which indicates if transmission is still in progress or pending.

+

When in master mode and configured to monitor slave select and the slave select gets deactivated during transfer, then the SPI mode changes to inactive and the ARM_SPI_EVENT_MODE_FAULT event is generated (instead of ARM_SPI_EVENT_TRANSFER_COMPLETE).

+

When in slave mode but send/receive/transfer operation is not started and data is sent/requested by the master, then the ARM_SPI_EVENT_DATA_LOST event is generated.

+

Send operation can be aborted by calling ARM_SPI_Control with ARM_SPI_ABORT_TRANSFER as the control parameter.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_SPI_Receive (void * data,
uint32_t num 
)
+
+ +

Start receiving data from SPI receiver.

+
Parameters
+ + + +
[out]dataPointer to buffer for data to receive from SPI receiver
[in]numNumber of data items to receive
+
+
+
Returns
Status Error Codes
+

The function ARM_SPI_Receive is used to receive data (transmits the default value as specified by ARM_SPI_Control with ARM_SPI_SET_DEFAULT_TX_VALUE as control parameter).

+

The parameter data specifies the data buffer.
+The parameter num specifies the number of items to receive.
+The item size is defined by the data type, which depends on the configured number of data bits.

+

Data type is:

+
    +
  • uint8_t when configured for 1..8 data bits
    • +
  • uint16_t when configured for 9..16 data bits
    • +
  • uint32_t when configured for 17..32 data bits
    • +
+

Calling the function ARM_SPI_Receive only starts the receive operation. The function is non-blocking and returns as soon as the driver has started the operation (driver typically configures DMA or the interrupt system for continuous transfer). When in slave mode, the operation is only registered and started when the master starts the transfer. During the operation it is not allowed to call this function or any other data transfer function again. Also the data buffer must stay allocated. When receive operation is completed (requested number of items received), the ARM_SPI_EVENT_TRANSFER_COMPLETE event is generated. Progress of receive operation can also be monitored by reading the number of items already received by calling ARM_SPI_GetDataCount.

+

Status of the receiver can also be monitored by calling the ARM_SPI_GetStatus and checking the busy data field, which indicates if reception is still in progress or pending.

+

When in master mode and configured to monitor slave select and the slave select gets deactivated during transfer, then the SPI mode changes to inactive and the ARM_SPI_EVENT_MODE_FAULT event is generated (instead of ARM_SPI_EVENT_TRANSFER_COMPLETE).

+

When in slave mode but send/receive/transfer operation is not started and data is sent/requested by the master, then the ARM_SPI_EVENT_DATA_LOST event is generated.

+

Receive operation can be aborted by calling ARM_SPI_Control with ARM_SPI_ABORT_TRANSFER as the control parameter.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_SPI_Transfer (const void * data_out,
void * data_in,
uint32_t num 
)
+
+ +

Start sending/receiving data to/from SPI transmitter/receiver.

+
Parameters
+ + + + +
[in]data_outPointer to buffer with data to send to SPI transmitter
[out]data_inPointer to buffer for data to receive from SPI receiver
[in]numNumber of data items to transfer
+
+
+
Returns
Status Error Codes
+

The function ARM_SPI_Transfer transfers data via SPI. It synchronously sends data to the SPI transmitter and receives data from the SPI receiver.

+

The parameter data_out is a pointer to the buffer with data to send.
+The parameter data_in is a pointer to the buffer which receives data.
+The parameter num specifies the number of items to transfer.
+The item size is defined by the data type which depends on the configured number of data bits.

+

Data type is:

+
    +
  • uint8_t when configured for 1..8 data bits
    • +
  • uint16_t when configured for 9..16 data bits
    • +
  • uint32_t when configured for 17..32 data bits
    • +
+

Calling the function ARM_SPI_Transfer only starts the transfer operation. The function is non-blocking and returns as soon as the driver has started the operation (driver typically configures DMA or the interrupt system for continuous transfer). When in slave mode, the operation is only registered and started when the master starts the transfer. During the operation it is not allowed to call this function or any other data transfer function again. Also the data buffers must stay allocated and the contents of unsent data must not be modified. When transfer operation is completed (requested number of items transferred), the ARM_SPI_EVENT_TRANSFER_COMPLETE event is generated. Progress of transfer operation can also be monitored by reading the number of items already transferred by calling ARM_SPI_GetDataCount.

+

Status of the transmitter and receiver can also be monitored by calling the ARM_SPI_GetStatus and checking the busy flag.

+

When in master mode and configured to monitor slave select and the slave select gets deactivated during transfer, then the SPI mode changes to inactive and the ARM_SPI_EVENT_MODE_FAULT event is generated (instead of ARM_SPI_EVENT_TRANSFER_COMPLETE).

+

When in slave mode but send/receive/transfer operation is not started and data is sent/requested by the master, then the ARM_SPI_EVENT_DATA_LOST event is generated.

+

Transfer operation can also be aborted by calling ARM_SPI_Control with ARM_SPI_ABORT_TRANSFER as the control parameter.

+ +
+
+ +
+
+ + + + + + + + +
uint32_t ARM_SPI_GetDataCount (void )
+
+ +

Get transferred data count.

+
Returns
number of data items transferred
+

The function ARM_SPI_GetDataCount returns the number of currently transferred data items during ARM_SPI_Send, ARM_SPI_Receive and ARM_SPI_Transfer operation.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_SPI_Control (uint32_t control,
uint32_t arg 
)
+
+ +

Control SPI Interface.

+
Parameters
+ + + +
[in]controlOperation
[in]argArgument of operation (optional)
+
+
+
Returns
common Status Error Codes and driver specific Status Error Codes
+

The function ARM_SPI_Control controls the SPI interface settings and executes various operations.

+

The parameter control is a bit mask that specifies various operations.

+
    +
  • Controls form different categories can be ORed.
    • +
  • If one control is omitted, then the default value of that category is used.
    • +
  • Miscellaneous controls cannot be combined.
    • +
+

The parameter arg provides (depending on the parameter control) additional information, for example the Bus Speed.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Parameter control Bit Category Description
ARM_SPI_MODE_INACTIVE 0..7 Mode Controls Set SPI to inactive.
ARM_SPI_MODE_MASTER Set the SPI Master (Output on MOSI, and the Input on MISO); arg = Bus Speed in bps
ARM_SPI_MODE_MASTER_SIMPLEX Set the SPI Master (Output and Input on MOSI); arg = Bus Speed in bps
ARM_SPI_MODE_SLAVE Set the SPI Slave (Output on MISO, and the Input on MOSI)
ARM_SPI_MODE_SLAVE_SIMPLEX Set the SPI Slave (Output and Input on MISO)
ARM_SPI_CPOL0_CPHA0 (default) 8..11 Clock Polarity
+ (Frame Format) 		CPOL=0 and CPHA=0: Clock Polarity 0, Clock Phase 0
ARM_SPI_CPOL0_CPHA1 CPOL=0 and CPHA=1: Clock Polarity 0, Clock Phase 1
ARM_SPI_CPOL1_CPHA0 CPOL=1 and CPHA=0: Clock Polarity 1, Clock Phase 0
ARM_SPI_CPOL1_CPHA1 CPOL=1 and CPHA=1: Clock Polarity 1, Clock Phase 1
ARM_SPI_TI_SSI Specifies that the frame format corresponds to the Texas Instruments Frame Format
ARM_SPI_MICROWIRE Specifies that the frame format corresponds to the National Microwire Frame Format
ARM_SPI_DATA_BITS(n) 12..17 Data Bits Set the number of bits per SPI frame; range for n = 1..32. This is the minimum required parameter.
ARM_SPI_MSB_LSB (default) 18 Bit Order Set the bit order from MSB to LSB
ARM_SPI_LSB_MSB Set the bit order from LSB to MSB
ARM_SPI_SS_MASTER_UNUSED (default) 19..21 Slave Select
+when Master
 
Must be used with the corresponding master or slave controls from category Mode Controls.
 
Slave Select
+when Slave 		Set the Slave Select mode for the master to Not used. Used with Mode Control ARM_SPI_MODE_MASTER. Master does not drive or monitor the SS line. For example, when connecting to a single slave, which has the SS line connected to a fixed low level.
ARM_SPI_SS_MASTER_SW Set the Slave Select mode for the master to Software controlled. Used with Mode Control ARM_SPI_MODE_MASTER. The Slave Select line is configured as output and controlled via the Miscellaneous Control ARM_SPI_CONTROL_SS. By default, the line it is not active (high), and is not affected by transfer-, send-, or receive functions.
ARM_SPI_SS_MASTER_HW_OUTPUT Set the Slave Select mode for the master to Hardware controlled Output. Used with Mode Control ARM_SPI_MODE_MASTER. The Slave Select line is configured as output and controlled by hardware. The line gets activated or deactivated automatically by the hardware for transfers and is not controlled by the Miscellaneous Control ARM_SPI_CONTROL_SS. When exactly the line is activated or deactivated is hardware dependent. Typically, the hardware will activate the line before starting the transfer and deactivate it after the transfer completes. Some hardware will leave the line activated until the SPI stays master.
Note
Some devices require that the SS signal is strictly defined regarding transfers. Refer to the documentaiton of your device.
+
ARM_SPI_SS_MASTER_HW_INPUT Set the Slave Select mode for the master to Hardware monitored Input. Used with Mode Control ARM_SPI_MODE_MASTER. Used in multi-master configuration where a master does not drive the Slave Select when driving the bus, but rather monitors it. When another master activates this line, the active master backs off. This is called Mode Fault. Slave Select is configured as input and hardware only monitors the line. When the line is deactivated externally while we are master, it presents a Mode Fault (ARM_SPI_EVENT_MODE_FAULT) and the SPI switches to inactive mode.
ARM_SPI_SS_SLAVE_HW (default) Set the Slave Select mode for the slave to Hardware monitored. Used with Mode Control ARM_SPI_MODE_SLAVE. Hardware monitors the Slave Select line and accepts transfers only when the line is active. Transfers are ignored while the Slave Select line is inactive.
ARM_SPI_SS_SLAVE_SW Set the Slave Select mode for the slave to Software controlled. Used with Mode Control ARM_SPI_MODE_SLAVE. Used only when the Slave Select line is not used. For example, when a single master and slave are connected in the system then the Slave Select line is not needed. Software controls if the slave is responding or not (by default it is not responding). Software enables or disables transfers by using the Miscellaneous Control ARM_SPI_CONTROL_SS.
ARM_SPI_SET_BUS_SPEED 0..21 Miscellaneous Controls
+(cannot be ORed) 		Set the bus speed; arg= Bus Speed in bps
ARM_SPI_GET_BUS_SPEED Get the bus speed; Retrun values >= 0 reperesent the bus speed in bps. Negative values are Status Error Codes.
ARM_SPI_SET_DEFAULT_TX_VALUE Set the default transmission value; the parameter arg sets the value
ARM_SPI_CONTROL_SS Control the Slave Select signal (SS); the values for the parameter arg are: ARM_SPI_SS_INACTIVE; ARM_SPI_SS_ACTIVE
ARM_SPI_ABORT_TRANSFER Abort the current data transfer
+

Example

+
extern ARM_DRIVER_SPI Driver_SPI0;
+
+
// configure: SPI master | clock polarity=1, clock phase=1 | bits per frame=16 | bus speed : 1000000
+
status = Driver_SPI0.Control(ARM_SPI_MODE_MASTER |
+
ARM_SPI_CPOL1_CPHA1 |
+
ARM_SPI_DATA_BITS(16), 1000000);
+
+
+
+ +
+
+ + + + + + + + +
ARM_SPI_STATUS ARM_SPI_GetStatus (void )
+
+ +

Get SPI status.

+
Returns
SPI status ARM_SPI_STATUS
+

The function ARM_SPI_GetStatus returns the current SPI interface status.

+ +
+
+ +
+
+ + + + + + + + +
void ARM_SPI_SignalEvent (uint32_t event)
+
+ +

Signal SPI Events.

+
Parameters
+ + +
[in]eventSPI Events notification mask
+
+
+
Returns
none
+

The function ARM_SPI_SignalEvent is a callback function registered by the function ARM_SPI_Initialize.

+

The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the data fields of the structure ARM_SPI_CAPABILITIES, which can be retrieved with the function ARM_SPI_GetCapabilities.

+

The following events can be generated:

+ + + + + + + + + +
Parameter event Bit Description supported when ARM_SPI_CAPABILITIES
ARM_SPI_EVENT_TRANSFER_COMPLETE 0 Occurs after call to ARM_SPI_Send, ARM_SPI_Receive, or ARM_SPI_Transfer to indicate that all the data has been transferred. The driver is ready for the next transfer operation. allways supported
ARM_SPI_EVENT_DATA_LOST 1 Occurs in slave mode when data is requested/sent by master but send/receive/transfer operation has not been started and indicates that data is lost. Occurs also in master mode when driver cannot transfer data fast enough. allways supported
ARM_SPI_EVENT_MODE_FAULT 2 Occurs in master mode when Slave Select is deactivated and indicates Master Mode Fault. The driver is ready for the next transfer operation. data field event_mode_fault = 1
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__spi__interface__gr.js b/docs/Driver/html/group__spi__interface__gr.js new file mode 100644 index 0000000..3af0e0e --- /dev/null +++ b/docs/Driver/html/group__spi__interface__gr.js @@ -0,0 +1,45 @@ +var group__spi__interface__gr = +[ + [ "Status Error Codes", "group__spi__execution__status.html", "group__spi__execution__status" ], + [ "SPI Events", "group__SPI__events.html", "group__SPI__events" ], + [ "SPI Control Codes", "group__SPI__control.html", "group__SPI__control" ], + [ "ARM_DRIVER_SPI", "group__spi__interface__gr.html#structARM__DRIVER__SPI", [ + [ "GetVersion", "group__spi__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__spi__interface__gr.html#a065b5fc24d0204692f0f95a44351ac1e", null ], + [ "Initialize", "group__spi__interface__gr.html#afac50d0b28860f7b569293e6b713f8a4", null ], + [ "Uninitialize", "group__spi__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__spi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "Send", "group__spi__interface__gr.html#a44eedddf4428cf4b98883b6c27d31922", null ], + [ "Receive", "group__spi__interface__gr.html#adb9224a35fe16c92eb0dd103638e4cf3", null ], + [ "Transfer", "group__spi__interface__gr.html#ad88b63ed74c03ba06b0599ab06ad4cf7", null ], + [ "GetDataCount", "group__spi__interface__gr.html#ad1d892ab3932f65cd7cdf2d0a91ae5da", null ], + [ "Control", "group__spi__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "GetStatus", "group__spi__interface__gr.html#a7305e7248420cdb4b02ceba87672178d", null ] + ] ], + [ "ARM_SPI_CAPABILITIES", "group__spi__interface__gr.html#structARM__SPI__CAPABILITIES", [ + [ "simplex", "group__spi__interface__gr.html#af244e2c2facf6414e3886495ee6b40bc", null ], + [ "ti_ssi", "group__spi__interface__gr.html#a8053c540e5d531b692224bdc2463f36a", null ], + [ "microwire", "group__spi__interface__gr.html#a9b4e858eb1d414128994742bf121f94c", null ], + [ "event_mode_fault", "group__spi__interface__gr.html#a309619714f0c4febaa497ebdb9b7e3ca", null ], + [ "reserved", "group__spi__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_SPI_STATUS", "group__spi__interface__gr.html#structARM__SPI__STATUS", [ + [ "busy", "group__spi__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a", null ], + [ "data_lost", "group__spi__interface__gr.html#a9675630df67587ecd171c7ef12b9d22a", null ], + [ "mode_fault", "group__spi__interface__gr.html#aeaf54ec655b7a64b9e88578c5f39d4e3", null ], + [ "reserved", "group__spi__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_SPI_SignalEvent_t", "group__spi__interface__gr.html#gafde9205364241ee81290adc0481c6640", null ], + [ "ARM_SPI_GetVersion", "group__spi__interface__gr.html#gad5db9209ef1d64a7915a7278d6a402c8", null ], + [ "ARM_SPI_GetCapabilities", "group__spi__interface__gr.html#gaf4823a11ab5efcd47c79b13801513ddc", null ], + [ "ARM_SPI_Initialize", "group__spi__interface__gr.html#ga1a3c11ed523a4355cd91069527945906", null ], + [ "ARM_SPI_Uninitialize", "group__spi__interface__gr.html#ga0c480ee3eabb82fc746e89741ed2e03e", null ], + [ "ARM_SPI_PowerControl", "group__spi__interface__gr.html#ga1a1e7e80ea32ae381b75213c32aa8067", null ], + [ "ARM_SPI_Send", "group__spi__interface__gr.html#gab2a303d1071e926280d50682f4808479", null ], + [ "ARM_SPI_Receive", "group__spi__interface__gr.html#ga726aff54e782ed9b47f7ba1280a3d8f6", null ], + [ "ARM_SPI_Transfer", "group__spi__interface__gr.html#gaa24026b3822c10272e301f1505136ec2", null ], + [ "ARM_SPI_GetDataCount", "group__spi__interface__gr.html#gaaaecaaf4ec1922f22e7f9de63af5ccdb", null ], + [ "ARM_SPI_Control", "group__spi__interface__gr.html#gad18d229992598d6677bec250015e5d1a", null ], + [ "ARM_SPI_GetStatus", "group__spi__interface__gr.html#ga60d33d8788a76c388cc36e066240b817", null ], + [ "ARM_SPI_SignalEvent", "group__spi__interface__gr.html#ga505b2d787348d51351d38fee98ccba7e", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__interface__gr_structARM__DRIVER__SPI.js b/docs/Driver/html/group__spi__interface__gr_structARM__DRIVER__SPI.js new file mode 100644 index 0000000..ce921f7 --- /dev/null +++ b/docs/Driver/html/group__spi__interface__gr_structARM__DRIVER__SPI.js @@ -0,0 +1,14 @@ +var group__spi__interface__gr_structARM__DRIVER__SPI = +[ + [ "GetVersion", "group__spi__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__spi__interface__gr.html#a065b5fc24d0204692f0f95a44351ac1e", null ], + [ "Initialize", "group__spi__interface__gr.html#afac50d0b28860f7b569293e6b713f8a4", null ], + [ "Uninitialize", "group__spi__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__spi__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "Send", "group__spi__interface__gr.html#a44eedddf4428cf4b98883b6c27d31922", null ], + [ "Receive", "group__spi__interface__gr.html#adb9224a35fe16c92eb0dd103638e4cf3", null ], + [ "Transfer", "group__spi__interface__gr.html#ad88b63ed74c03ba06b0599ab06ad4cf7", null ], + [ "GetDataCount", "group__spi__interface__gr.html#ad1d892ab3932f65cd7cdf2d0a91ae5da", null ], + [ "Control", "group__spi__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "GetStatus", "group__spi__interface__gr.html#a7305e7248420cdb4b02ceba87672178d", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__interface__gr_structARM__SPI__CAPABILITIES.js b/docs/Driver/html/group__spi__interface__gr_structARM__SPI__CAPABILITIES.js new file mode 100644 index 0000000..b673411 --- /dev/null +++ b/docs/Driver/html/group__spi__interface__gr_structARM__SPI__CAPABILITIES.js @@ -0,0 +1,8 @@ +var group__spi__interface__gr_structARM__SPI__CAPABILITIES = +[ + [ "simplex", "group__spi__interface__gr.html#af244e2c2facf6414e3886495ee6b40bc", null ], + [ "ti_ssi", "group__spi__interface__gr.html#a8053c540e5d531b692224bdc2463f36a", null ], + [ "microwire", "group__spi__interface__gr.html#a9b4e858eb1d414128994742bf121f94c", null ], + [ "event_mode_fault", "group__spi__interface__gr.html#a309619714f0c4febaa497ebdb9b7e3ca", null ], + [ "reserved", "group__spi__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__interface__gr_structARM__SPI__STATUS.js b/docs/Driver/html/group__spi__interface__gr_structARM__SPI__STATUS.js new file mode 100644 index 0000000..9f73cbe --- /dev/null +++ b/docs/Driver/html/group__spi__interface__gr_structARM__SPI__STATUS.js @@ -0,0 +1,7 @@ +var group__spi__interface__gr_structARM__SPI__STATUS = +[ + [ "busy", "group__spi__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a", null ], + [ "data_lost", "group__spi__interface__gr.html#a9675630df67587ecd171c7ef12b9d22a", null ], + [ "mode_fault", "group__spi__interface__gr.html#aeaf54ec655b7a64b9e88578c5f39d4e3", null ], + [ "reserved", "group__spi__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__misc__ctrls.html b/docs/Driver/html/group__spi__misc__ctrls.html new file mode 100644 index 0000000..56c2742 --- /dev/null +++ b/docs/Driver/html/group__spi__misc__ctrls.html @@ -0,0 +1,230 @@ + + + + + +SPI Miscellaneous Controls +CMSIS-Driver: SPI Miscellaneous Controls + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SPI Miscellaneous Controls
SPI Control Codes
+
+
+ +

Specifies additional miscellaneous controls. +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SPI_SET_BUS_SPEED   (0x10UL << ARM_SPI_CONTROL_Pos)
 Set Bus Speed in bps; arg = value. More...
 
#define ARM_SPI_GET_BUS_SPEED   (0x11UL << ARM_SPI_CONTROL_Pos)
 Get Bus Speed in bps. More...
 
#define ARM_SPI_SET_DEFAULT_TX_VALUE   (0x12UL << ARM_SPI_CONTROL_Pos)
 Set default Transmit value; arg = value. More...
 
#define ARM_SPI_CONTROL_SS   (0x13UL << ARM_SPI_CONTROL_Pos)
 Control Slave Select; arg: 0=inactive, 1=active. More...
 
#define ARM_SPI_ABORT_TRANSFER   (0x14UL << ARM_SPI_CONTROL_Pos)
 Abort current data transfer. More...
 
+

Description

+

Specifies additional miscellaneous controls.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SPI_SET_BUS_SPEED   (0x10UL << ARM_SPI_CONTROL_Pos)
+
+ +

Set Bus Speed in bps; arg = value.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_GET_BUS_SPEED   (0x11UL << ARM_SPI_CONTROL_Pos)
+
+ +

Get Bus Speed in bps.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SET_DEFAULT_TX_VALUE   (0x12UL << ARM_SPI_CONTROL_Pos)
+
+ +

Set default Transmit value; arg = value.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_CONTROL_SS   (0x13UL << ARM_SPI_CONTROL_Pos)
+
+ +

Control Slave Select; arg: 0=inactive, 1=active.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_ABORT_TRANSFER   (0x14UL << ARM_SPI_CONTROL_Pos)
+
+ +

Abort current data transfer.

+
See Also
ARM_SPI_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__spi__misc__ctrls.js b/docs/Driver/html/group__spi__misc__ctrls.js new file mode 100644 index 0000000..5f221bb --- /dev/null +++ b/docs/Driver/html/group__spi__misc__ctrls.js @@ -0,0 +1,8 @@ +var group__spi__misc__ctrls = +[ + [ "ARM_SPI_SET_BUS_SPEED", "group__spi__misc__ctrls.html#ga5ef3d114979f3fd6010d0df16c2bf5c1", null ], + [ "ARM_SPI_GET_BUS_SPEED", "group__spi__misc__ctrls.html#gafc00fe35bb4c89b076d014b43168b2b3", null ], + [ "ARM_SPI_SET_DEFAULT_TX_VALUE", "group__spi__misc__ctrls.html#gae9861221dee78d52bd1522b7846535ce", null ], + [ "ARM_SPI_CONTROL_SS", "group__spi__misc__ctrls.html#ga5776272b82decff92da003568540c92f", null ], + [ "ARM_SPI_ABORT_TRANSFER", "group__spi__misc__ctrls.html#ga44708b80e48984be099cd6eb11780dc3", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__mode__ctrls.html b/docs/Driver/html/group__spi__mode__ctrls.html new file mode 100644 index 0000000..851a95b --- /dev/null +++ b/docs/Driver/html/group__spi__mode__ctrls.html @@ -0,0 +1,230 @@ + + + + + +SPI Mode Controls +CMSIS-Driver: SPI Mode Controls + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SPI Mode Controls
SPI Control Codes
+
+
+ +

Specifies SPI mode. +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SPI_MODE_INACTIVE   (0x00UL << ARM_SPI_CONTROL_Pos)
 SPI Inactive. More...
 
#define ARM_SPI_MODE_MASTER   (0x01UL << ARM_SPI_CONTROL_Pos)
 SPI Master (Output on MOSI, Input on MISO); arg = Bus Speed in bps. More...
 
#define ARM_SPI_MODE_SLAVE   (0x02UL << ARM_SPI_CONTROL_Pos)
 SPI Slave (Output on MISO, Input on MOSI) More...
 
#define ARM_SPI_MODE_MASTER_SIMPLEX   (0x03UL << ARM_SPI_CONTROL_Pos)
 SPI Master (Output/Input on MOSI); arg = Bus Speed in bps. More...
 
#define ARM_SPI_MODE_SLAVE_SIMPLEX   (0x04UL << ARM_SPI_CONTROL_Pos)
 SPI Slave (Output/Input on MISO) More...
 
+

Description

+

Specifies SPI mode.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SPI_MODE_INACTIVE   (0x00UL << ARM_SPI_CONTROL_Pos)
+
+ +

SPI Inactive.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_MODE_MASTER   (0x01UL << ARM_SPI_CONTROL_Pos)
+
+ +

SPI Master (Output on MOSI, Input on MISO); arg = Bus Speed in bps.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_MODE_SLAVE   (0x02UL << ARM_SPI_CONTROL_Pos)
+
+ +

SPI Slave (Output on MISO, Input on MOSI)

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_MODE_MASTER_SIMPLEX   (0x03UL << ARM_SPI_CONTROL_Pos)
+
+ +

SPI Master (Output/Input on MOSI); arg = Bus Speed in bps.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_MODE_SLAVE_SIMPLEX   (0x04UL << ARM_SPI_CONTROL_Pos)
+
+ +

SPI Slave (Output/Input on MISO)

+
See Also
ARM_SPI_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__spi__mode__ctrls.js b/docs/Driver/html/group__spi__mode__ctrls.js new file mode 100644 index 0000000..11ed874 --- /dev/null +++ b/docs/Driver/html/group__spi__mode__ctrls.js @@ -0,0 +1,8 @@ +var group__spi__mode__ctrls = +[ + [ "ARM_SPI_MODE_INACTIVE", "group__spi__mode__ctrls.html#ga974e3d7c178b76b0540d7644b977bff3", null ], + [ "ARM_SPI_MODE_MASTER", "group__spi__mode__ctrls.html#ga3143ef07c1607b9bc57e29df35cf2fa8", null ], + [ "ARM_SPI_MODE_SLAVE", "group__spi__mode__ctrls.html#ga382b394c5e68f7d1206b837843732a3e", null ], + [ "ARM_SPI_MODE_MASTER_SIMPLEX", "group__spi__mode__ctrls.html#gaf34d849c7cde1151a768887f154e19bd", null ], + [ "ARM_SPI_MODE_SLAVE_SIMPLEX", "group__spi__mode__ctrls.html#ga9b113d8b336047e1c22f73ad44851fdf", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__spi__slave__select__mode__ctrls.html b/docs/Driver/html/group__spi__slave__select__mode__ctrls.html new file mode 100644 index 0000000..93fcdc4 --- /dev/null +++ b/docs/Driver/html/group__spi__slave__select__mode__ctrls.html @@ -0,0 +1,255 @@ + + + + + +SPI Slave Select Mode +CMSIS-Driver: SPI Slave Select Mode + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
SPI Slave Select Mode
SPI Control Codes
+
+
+ +

Specifies SPI slave select mode. +More...

+ + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_SPI_SS_MASTER_UNUSED   (0UL << ARM_SPI_SS_MASTER_MODE_Pos)
 SPI Slave Select when Master: Not used (default) More...
 
#define ARM_SPI_SS_MASTER_SW   (1UL << ARM_SPI_SS_MASTER_MODE_Pos)
 SPI Slave Select when Master: Software controlled. More...
 
#define ARM_SPI_SS_MASTER_HW_OUTPUT   (2UL << ARM_SPI_SS_MASTER_MODE_Pos)
 SPI Slave Select when Master: Hardware controlled Output. More...
 
#define ARM_SPI_SS_MASTER_HW_INPUT   (3UL << ARM_SPI_SS_MASTER_MODE_Pos)
 SPI Slave Select when Master: Hardware monitored Input. More...
 
#define ARM_SPI_SS_SLAVE_HW   (0UL << ARM_SPI_SS_SLAVE_MODE_Pos)
 SPI Slave Select when Slave: Hardware monitored (default) More...
 
#define ARM_SPI_SS_SLAVE_SW   (1UL << ARM_SPI_SS_SLAVE_MODE_Pos)
 SPI Slave Select when Slave: Software controlled. More...
 
+

Description

+

Specifies SPI slave select mode.

+

SPI Slave Select Mode configures the behavior of the Slave Select (SS) signal. The configuration is separate for Master (ARM_SPI_SS_MASTER_*) and for Slave (ARM_SPI_SS_SLAVE_HW, ARM_SPI_SS_SLAVE_SW). The active configuration depends on the current state (Master/Slave).

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_SPI_SS_MASTER_UNUSED   (0UL << ARM_SPI_SS_MASTER_MODE_Pos)
+
+ +

SPI Slave Select when Master: Not used (default)

+

An SPI master does not drive or monitor the SS line. For example, when connecting to a single slave, the SS line can be connected to a fixed low level.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_MASTER_SW   (1UL << ARM_SPI_SS_MASTER_MODE_Pos)
+
+ +

SPI Slave Select when Master: Software controlled.

+

SS is configured as an output and controlled via ARM_SPI_Control (ARM_SPI_CONTROL_SS). By default, it is not active (high). It is activated (low) by ARM_SPI_Control (ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE) and deactivated by ARM_SPI_Control (ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE). It is not affected by transfer/send/receive functions.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_MASTER_HW_OUTPUT   (2UL << ARM_SPI_SS_MASTER_MODE_Pos)
+
+ +

SPI Slave Select when Master: Hardware controlled Output.

+

Here, SS is configured as an output. It will be automatically activated/deactivated for the transfers by hardware (not controlled by ARM_SPI_Control (ARM_SPI_CONTROL_SS)). The activation/deactivation of the line is completely hardware dependent. Typically, the hardware will activate it before starting a transfer and deactivate it after a transfer completes. Some hardware will leave it activated as long as the SPI stays master. Due to different hardware behavior, this mode is typically not useful because certain devices require that the SS signal is strictly defined with regards to transfers.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_MASTER_HW_INPUT   (3UL << ARM_SPI_SS_MASTER_MODE_Pos)
+
+ +

SPI Slave Select when Master: Hardware monitored Input.

+

This is normally used in a multi-master configuration, where a master does not drive the SS line when driving the bus but only monitors it. When another master activates this line, the active master backs off. This is called mode fault. SS is configured as input and the hardware only monitors it. When it is externally deactivated while being the master, it presents a mode fault and the SPI switches to inactive mode.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_SLAVE_HW   (0UL << ARM_SPI_SS_SLAVE_MODE_Pos)
+
+ +

SPI Slave Select when Slave: Hardware monitored (default)

+

Hardware monitors the SS line and accepts transfers only when SS line is activate. Transfers while SS is not active are ignored.

+
See Also
ARM_SPI_Control
+ +
+
+ +
+
+ + + + +
#define ARM_SPI_SS_SLAVE_SW   (1UL << ARM_SPI_SS_SLAVE_MODE_Pos)
+
+ +

SPI Slave Select when Slave: Software controlled.

+

Used only when SS line is not used. For example, when a single master and slave are connected in a system, the SS line is not needed (reduces the number of lines and pins used). Slave responses are controlled by software (by default, it is not responding). Software enables/disables transfers by calling ARM_SPI_Control (ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE / ARM_SPI_SS_INACTIVE).

+
See Also
ARM_SPI_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__spi__slave__select__mode__ctrls.js b/docs/Driver/html/group__spi__slave__select__mode__ctrls.js new file mode 100644 index 0000000..0dd045c --- /dev/null +++ b/docs/Driver/html/group__spi__slave__select__mode__ctrls.js @@ -0,0 +1,9 @@ +var group__spi__slave__select__mode__ctrls = +[ + [ "ARM_SPI_SS_MASTER_UNUSED", "group__spi__slave__select__mode__ctrls.html#gae19343adc7bd71408b51733171f99dc7", null ], + [ "ARM_SPI_SS_MASTER_SW", "group__spi__slave__select__mode__ctrls.html#gab5e319aa3f9d4d8c9ed92f0fe865f624", null ], + [ "ARM_SPI_SS_MASTER_HW_OUTPUT", "group__spi__slave__select__mode__ctrls.html#ga07762709a40dc90aca85553f500c8761", null ], + [ "ARM_SPI_SS_MASTER_HW_INPUT", "group__spi__slave__select__mode__ctrls.html#ga8561bd0cc25ab2bb02b138c1c6a586cd", null ], + [ "ARM_SPI_SS_SLAVE_HW", "group__spi__slave__select__mode__ctrls.html#ga2bd0d1f3ade2dc0cc48cc0593336ad70", null ], + [ "ARM_SPI_SS_SLAVE_SW", "group__spi__slave__select__mode__ctrls.html#gad371f6ba0d12a57bdcc3217c351abfb0", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__storage__interface__gr.html b/docs/Driver/html/group__storage__interface__gr.html new file mode 100644 index 0000000..2a1a07f --- /dev/null +++ b/docs/Driver/html/group__storage__interface__gr.html @@ -0,0 +1,1369 @@ + + + + + +Storage Interface +CMSIS-Driver: Storage Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Enumerations | +Functions
+
+
Storage Interface
+
+
+ +

Driver API for Storage Device Interface (Driver_Storage.h) +More...

+ + + + + + +

+Content

 Use of Storage APIs
 
 Sample Use of Storage Driver
 
+ + + + + + + + + + + + + + + + + +

+Data Structures

struct  ARM_STORAGE_BLOCK_ATTRIBUTES
 Attributes of the storage range within a storage block. More...
 
struct  ARM_STORAGE_BLOCK
 A storage block is a range of memory with uniform attributes. More...
 
struct  ARM_STORAGE_INFO
 
struct  ARM_DRIVER_STORAGE
 
struct  ARM_STORAGE_CAPABILITIES
 Storage Driver API Capabilities. More...
 
struct  ARM_STORAGE_STATUS
 Operating status of the storage controller. More...
 
+ + + +

+Typedefs

typedef void(* ARM_Storage_Callback_t )(int32_t status, ARM_STORAGE_OPERATION operation)
 
+ + + +

+Enumerations

enum  ARM_STORAGE_OPERATION {
+  ARM_STORAGE_OPERATION_GET_VERSION, +
+  ARM_STORAGE_OPERATION_GET_CAPABILITIES, +
+  ARM_STORAGE_OPERATION_INITIALIZE, +
+  ARM_STORAGE_OPERATION_UNINITIALIZE, +
+  ARM_STORAGE_OPERATION_POWER_CONTROL, +
+  ARM_STORAGE_OPERATION_READ_DATA, +
+  ARM_STORAGE_OPERATION_PROGRAM_DATA, +
+  ARM_STORAGE_OPERATION_ERASE, +
+  ARM_STORAGE_OPERATION_ERASE_ALL, +
+  ARM_STORAGE_OPERATION_GET_STATUS, +
+  ARM_STORAGE_OPERATION_GET_INFO, +
+  ARM_STORAGE_OPERATION_RESOLVE_ADDRESS, +
+  ARM_STORAGE_OPERATION_GET_NEXT_BLOCK, +
+  ARM_STORAGE_OPERATION_GET_BLOCK +
+ }
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_Storage_GetVersion (void)
 Get driver version. More...
 
ARM_STOR_CAPABILITIES ARM_Storage_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_Storage_Initialize (ARM_Storage_Callback_t callback)
 Initialize the Storage interface. More...
 
int32_t ARM_Storage_Uninitialize (void)
 De-initialize the Storage Interface. More...
 
int32_t ARM_Storage_PowerControl (ARM_POWER_STATE state)
 Control the Storage interface power. More...
 
int32_t ARM_Storage_ReadData (uint64_t addr, void *data, uint32_t size)
 Read data from Storage. More...
 
int32_t ARM_Storage_ProgramData (uint64_t addr, const void *data, uint32_t size)
 Program data to Storage. More...
 
int32_t ARM_Storage_Erase (uint64_t addr, uint32_t size)
 Erase Storage range. More...
 
int32_t ARM_Storage_EraseAll (void)
 Erase complete Storage. More...
 
ARM_Storage_STATUS ARM_Storage_GetStatus (void)
 Get Storage status. More...
 
int32_t ARM_Storage_GetInfo (ARM_STORAGE_INFO *info)
 Get Storage information. More...
 
uint32_t ARM_Storage_ResolveAddress (uint64_t addr)
 Resolve an address relative to the storage controller into a memory address. More...
 
int32_t ARM_Storage_GetNextBlock (const ARM_STORAGE_BLOCK *prev_block, ARM_STORAGE_BLOCK *next_block)
 Advance to the successor of the current block (iterator). More...
 
int32_t ARM_Storage_GetBlock (uint64_t addr, ARM_STORAGE_BLOCK *block)
 Find the storage block (iterator) encompassing a given storage address. More...
 
+

Description

+

Driver API for Storage Device Interface (Driver_Storage.h)

+

This is an abstraction for a storage controller. It offers an interface to access an address space of storage locations, comprising APIs for initialization, erase, access, program, and status-fetch operations. It also offers APIs to iterate over the available Storage Blocks (ARM_STORAGE_BLOCK), allowing the discovery of block attributes such as write/erase granularities. Using the Storage abstraction, it becomes possible to write generic algorithms, such as block copy, to operate on any conforming storage device.

+
Note
The storage abstraction layer is not responsible for storage management. Algorithms such as block-allocation, wear-leveling, erase-before-write and other storage-management policies are the responsibility of modules external to the storage abstraction layer. In essence, the storage interface is the lowest abstraction upon which block management policies can be implemented.
+

Here's a picture to help locate the storage abstraction in the software stack. The part below the box labeled 'Storage abstraction layer' is implemented by a storage driver.

+
+storage_sw_stack.png +
+

Storage API

+

The following header files define the Application Programming Interface (API) for the Flash interface:

+
    +
  • Driver_Storage.h : Driver API for Storage Device Interface
    • +
+

Driver Functions

+

The driver functions are published in the access struct as explained in Use of Storage APIs

+ +

A sample use for the driver can be found at: Sample Use of Storage Driver

+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_STORAGE_BLOCK_ATTRIBUTES
+
+

Attributes of the storage range within a storage block.

+

Contained in:

+ +
+ + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +erasable: 1 +Erasing blocks is permitted with a minimum granularity of 'erase_unit'.
Note
if 'erasable' is 0 (i.e. the 'erase' operation isn't available) then 'erase_unit' (see below) is immaterial and should be 0.
+
+uint32_t +programmable: 1 +Writing to ranges is permitted with a minimum granularity of 'program_unit'. Writes are typically achieved through the ProgramData operation (following an erase); if storage isn't erasable (see 'erasable' above) but is memory-mapped (i.e. 'memory_mapped'), it can be written directly using memory-store operations.
+uint32_t +executable: 1 +This storage block can hold program data; the processor can fetch and execute code sourced from it. Often this is accompanied with the device being 'memory_mapped' (see ARM_STORAGE_INFO).
+uint32_t +protectable: 1 +The entire block can be protected from program and erase operations. Once protection is enabled for a block, its 'erasable' and 'programmable' bits are turned off.
+uint32_t +reserved: 28 +
+uint32_t +erase_unit +Minimum erase size in bytes. The offset of the start of the erase-range should also be aligned with this value. Applicable if the 'erasable' attribute is set for the block.
Note
if 'erasable' (see above) is 0 (i.e. the 'erase' operation isn't available) then 'erase_unit' is immaterial and should be 0.
+
+uint32_t +protection_unit +Minimum protectable size in bytes. Applicable if the 'protectable' attribute is set for the block. This should be a divisor of the block's size. A block can be considered to be made up of consecutive, individually-protectable fragments.
+ +
+
+ +
+
+ + + + +
struct ARM_STORAGE_BLOCK
+
+

A storage block is a range of memory with uniform attributes.

+

Storage blocks combine to make up the address map of a storage controller.

+
+ + + + + + + + + + +
Data Fields
+uint64_t +addr +This is the start address of the storage block. It is expressed as an offset from the start of the storage map maintained by the owning storage controller.
+uint64_t +size +This is the size of the storage block, in units of bytes. Together with addr, it describes a range [addr, addr+size).
+ARM_STORAGE_BLOCK_ATTRIBUTES +attributes +Attributes for this block.
+ +
+
+ +
+
+ + + + +
struct ARM_STORAGE_INFO
+
+

Device level metadata regarding the Storage implementation.

+

It describes the characteristics of a Storage device. This includes total storage, programming size, a default value for erased memory etc. This information can be obtained from the Storage device datasheet and is used by the middleware in order to properly interact with the Storage device.

+

Total available storage (in bytes) is contained in total_storage. Minimum programming size (in bytes) is described by program_unit (applicable only if the programmable attribute is set for a block). It defines the granularity for programming data. The offset of the start of a program-range and the size should also be aligned with program_unit.

+
Note
: setting program_unit to 0 has the effect of disabling the size and alignment restrictions (setting it to 1 also has the same effect).
+

Optimal programming page-size (in bytes) is specified by optimal_program_unit. Some storage controllers have internal buffers into which to receive data. Writing in chunks of optimal_program_unit would achieve maximum programming speed. Like with program_unit, this is applicable only if the programmable attribute is set for the underlying storage block(s).

+

program_cycles is a measure of endurance for reprogramming. A value of ARM_STORAGE_PROGRAM_CYCLES_INFINITE may be used to signify infinite or unknown endurance.

+

Contents of erased memory is specified by the erased_value. It is usually 1 to indicate erased bytes with state 0xFF.

+

memory_mapped can be set to 1 to indicate that the storage device has a mapping onto the processor's memory address space.

+
Note
: For a memory-mapped block which isn't erasable but is programmable, writes should be possible directly to the memory-mapped storage without going through the ARM_Storage_ProgramData operation.
+

The field programmability holds a value to indicate storage programmability. Similarly, retention_level holds a for encoding data-retention levels for all storage blocks.

+
Note
These fields serve a different purpose than the ones contained in ARM_STORAGE_CAPABILITIES, which is another structure containing device-level metadata. ARM_STORAGE_CAPABILITIES describes the API capabilities, whereas ARM_STORAGE_INFO describes the device. Furthermore ARM_STORAGE_CAPABILITIES fits within a single word, and is designed to be passed around by value; ARM_STORAGE_INFO, on the other hand, contains metadata which doesn't fit into a single word and requires the use of pointers to be moved around.
+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint64_t +total_storage +Total available storage, in bytes.
+uint32_t +program_unit +Minimum programming size in bytes. The offset of the start of the program-range should also be aligned with this value. Applicable only if the 'programmable' attribute is set for a block.
Note
setting program_unit to 0 has the effect of disabling the size and alignment restrictions (setting it to 1 also has the same effect).
+
+uint32_t +optimal_program_unit +Optimal programming page-size in bytes. Some storage controllers have internal buffers into which to receive data. Writing in chunks of 'optimal_program_unit' would achieve maximum programming speed. Applicable only if the 'programmable' attribute is set for the underlying block(s).
+uint32_t +program_cycles +A measure of endurance for reprogramming. Use ARM_STORAGE_PROGRAM_CYCLES_INFINITE for infinite or unknown endurance.
+uint32_t +erased_value: 1 +Contents of erased memory (usually 1 to indicate erased bytes with state 0xFF).
+uint32_t +memory_mapped: 1 +This storage device has a mapping onto the processor's memory address space.
Note
For a memory-mapped block which isn't erasable but is programmable (i.e. if 'erasable' is set to 0, but 'programmable' is 1), writes should be possible directly to the memory-mapped storage without going through the ProgramData operation.
+
+uint32_t +programmability: 4 +A value to indicate storage programmability.
+uint32_t +retention_level: 4 +
+uint32_t +reserved: 22 +
+ARM_STORAGE_SECURITY_FEATURES +security +ARM_STORAGE_SECURITY_FEATURES
+ +
+
+ +
+
+ + + + +
struct ARM_DRIVER_STORAGE
+
+

The set of operations constituting the Storage driver.

+

This is the set of operations constituting the Storage driver. Their implementation is platform-specific, and needs to be supplied by the porting effort. The functions of the Storage driver are accessed by function pointers exposed by this structure. Refer to Use of Storage APIs for overview information.

+

Each instance of a Storage interface provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:

+
    +
  • Driver_Storage0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_Storage1 is the name of the access struct of the second instance (no. 1).
    • +
+

A middleware configuration setting allows connecting the middleware to a specific driver instance Driver_Flashn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_Storage_GetVersion : Get driver version. More...
 
ARM_STORAGE_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_Storage_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_Storage_Callback_t callback)
 Pointer to ARM_Storage_Initialize : Initialize the Storage Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_Storage_Uninitialize : De-initialize the Storage Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_Storage_PowerControl : Control the Storage interface power. More...
 
int32_t(* ReadData )(uint64_t addr, void *data, uint32_t size)
 Pointer to ARM_Storage_ReadData : Read data from Storage. More...
 
int32_t(* ProgramData )(uint64_t addr, const void *data, uint32_t size)
 Pointer to ARM_Storage_ProgramData : Program data to Storage. More...
 
int32_t(* Erase )(uint64_t addr, uint32_t size)
 Pointer to ARM_Storage_Erase : Erase Storage range. More...
 
int32_t(* EraseAll )(void)
 Pointer to ARM_Storage_EraseAll : Erase complete Storage. More...
 
ARM_STORAGE_STATUS(* GetStatus )(void)
 Pointer to ARM_Storage_GetStatus : Get Storage status. More...
 
int32_t(* GetInfo )(ARM_STORAGE_INFO *info)
 Pointer to ARM_Storage_GetInfo : Get Storage information. More...
 
uint32_t(* ResolveAddress )(uint64_t addr)
 Pointer to ARM_Storage_ResolveAddress : Resolve a storage address. More...
 
int32_t(* GetNextBlock )(const ARM_STORAGE_BLOCK *prev, ARM_STORAGE_BLOCK *next)
 Pointer to ARM_Storage_GetNextBlock : fetch successor for current block. More...
 
int32_t(* GetBlock )(uint64_t addr, ARM_STORAGE_BLOCK *block)
 Pointer to ARM_Storage_GetBlock : More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_Storage_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_STORAGE_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_Storage_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_Storage_Callback_t callback)
+
+ +

Pointer to ARM_Storage_Initialize : Initialize the Storage Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_Storage_Uninitialize : De-initialize the Storage Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_Storage_PowerControl : Control the Storage interface power.

+ +
+
+ +
+
+ + + + +
int32_t(* ReadData)(uint64_t addr, void *data, uint32_t size)
+
+ +

Pointer to ARM_Storage_ReadData : Read data from Storage.

+ +
+
+ +
+
+ + + + +
int32_t(* ProgramData)(uint64_t addr, const void *data, uint32_t size)
+
+ +

Pointer to ARM_Storage_ProgramData : Program data to Storage.

+ +
+
+ +
+
+ + + + +
int32_t(* Erase)(uint64_t addr, uint32_t size)
+
+ +

Pointer to ARM_Storage_Erase : Erase Storage range.

+ +
+
+ +
+
+ + + + +
int32_t(* EraseAll)(void)
+
+ +

Pointer to ARM_Storage_EraseAll : Erase complete Storage.

+ +
+
+ +
+
+ + + + +
ARM_STORAGE_STATUS(* GetStatus)(void)
+
+ +

Pointer to ARM_Storage_GetStatus : Get Storage status.

+ +
+
+ +
+
+ + + + +
int32_t(* GetInfo)(ARM_STORAGE_INFO *info)
+
+ +

Pointer to ARM_Storage_GetInfo : Get Storage information.

+ +
+
+ +
+
+ + + + +
uint32_t(* ResolveAddress)(uint64_t addr)
+
+ +

Pointer to ARM_Storage_ResolveAddress : Resolve a storage address.

+ +
+
+ +
+
+ + + + +
int32_t(* GetNextBlock)(const ARM_STORAGE_BLOCK *prev, ARM_STORAGE_BLOCK *next)
+
+ +

Pointer to ARM_Storage_GetNextBlock : fetch successor for current block.

+ +
+
+ +
+
+ + + + +
int32_t(* GetBlock)(uint64_t addr, ARM_STORAGE_BLOCK *block)
+
+ +

Pointer to ARM_Storage_GetBlock :

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_STORAGE_CAPABILITIES
+
+

Storage Driver API Capabilities.

+

A Storage driver can be implemented with different capabilities. The data fields of this struct encode the API capabilities implemented by this driver.

+

The element asynchronous_ops indicates if APIs like initialize, read, erase, program, etc. can operate in asynchronous mode. Having this bit set to 1 means that the driver is capable of launching asynchronous operations; command completion for asynchronous operations is signaled by the invocation of a completion callback. If set to 1, drivers may still complete asynchronous operations synchronously as necessary–in which case they return a positive error code to indicate synchronous completion. If asynchronous_ops is not set, then all such APIs execute synchronously, and control returns to the caller with a status code only after the completion of the operation (or the discovery of a failure condition).

+

The element erase_all specifies that the ARM_Storage_EraseAll function is supported. Typically full chip erase is much faster than erasing the whole device using ARM_Storage_Erase.

+

Returned by:

+ +
Note
This data structure is designed to fit within a single word so that it can be fetched cheaply using a call to driver->GetCapabilities().
+
+ + + + + + + + + + +
Data Fields
+uint32_t +asynchronous_ops: 1 +Used to indicate if APIs like initialize, read, erase, program, etc. can operate in asynchronous mode. Setting this bit to 1 means that the driver is capable of launching asynchronous operations; command completion is signaled by the invocation of a completion callback. If set to 1, drivers may still complete asynchronous operations synchronously as necessary (in which case they return a positive error code to indicate synchronous completion).
+uint32_t +erase_all: 1 +Supports EraseAll operation.
+uint32_t +reserved: 30 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_STORAGE_STATUS
+
+

Operating status of the storage controller.

+

Structure with information about the status of the Storage device.

+

The flag busy indicates that the driver is busy executing read/program/erase operation.

+

The flag error flag is cleared on start of read/program/erase operation and is set at the end of the current operation in case of error.

+

Returned by:

+ +
+ + + + + + + + + + +
Data Fields
+uint32_t +busy: 1 +Controller busy flag.
+uint32_t +error: 1 +Read/Program/Erase error flag (cleared on start of next operation)
+uint32_t +reserved: 30 +
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_Storage_Callback_t
+
+

Provides the typedef for the callback function ARM_Storage_Callback_t.

+

Provides the typedef for the callback function ARM_Storage_Callback_t.

+
Parameters
+ + + +
[in]statusA code to indicate the status of the completed operation. For data transfer operations, the status field is overloaded in case of success to return the count of bytes successfully transferred; this can be done safely because error codes are negative values.
[in]operationThe command op-code. This value isn't essential, but it is expected that this information could be a quick and useful filter for the handler.
+
+
+

Parameter for:

+ + +
+
+

Enumeration Type Documentation

+ +
+
+ + + + +
enum ARM_STORAGE_OPERATION
+
+

Command opcodes for Storage.

+

Command opcodes for the Storage interface. Completion callbacks use these codes to refer to completing commands. Refer to ARM_Storage_Callback_t.

+ + + + + + + + + + + + + + + +
Enumerator
ARM_STORAGE_OPERATION_GET_VERSION  +
ARM_STORAGE_OPERATION_GET_CAPABILITIES  +
ARM_STORAGE_OPERATION_INITIALIZE  +
ARM_STORAGE_OPERATION_UNINITIALIZE  +
ARM_STORAGE_OPERATION_POWER_CONTROL  +
ARM_STORAGE_OPERATION_READ_DATA  +
ARM_STORAGE_OPERATION_PROGRAM_DATA  +
ARM_STORAGE_OPERATION_ERASE  +
ARM_STORAGE_OPERATION_ERASE_ALL  +
ARM_STORAGE_OPERATION_GET_STATUS  +
ARM_STORAGE_OPERATION_GET_INFO  +
ARM_STORAGE_OPERATION_RESOLVE_ADDRESS  +
ARM_STORAGE_OPERATION_GET_NEXT_BLOCK  +
ARM_STORAGE_OPERATION_GET_BLOCK  +
+ +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_Storage_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_Storage_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION.

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_STORAGE *drv_info;
+
+
void read_version (void) {
+
ARM_DRIVER_VERSION version;
+
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
Note
This API returns synchronously–it does not result in an invocation of a completion callback.
+
+The function GetVersion() can be called any time to obtain the required information from the driver (even before initialization). It always returns the same information.
+ +
+
+ +
+
+ + + + + + + + +
ARM_STORAGE_CAPABILITIES ARM_Storage_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_STORAGE_CAPABILITIES
+

The function ARM_Storage_GetCapabilities returns information about capabilities in this driver implementation. The data fields of the struct ARM_STORAGE_CAPABILITIES encode various capabilities, for example if the device is able to execute operations asynchronously.

+

Example:

+
extern ARM_DRIVER_STORAGE *drv_info;
+
+
void read_capabilities (void) {
+
ARM_STORAGE_CAPABILITIES drv_capabilities;
+
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
Note
This API returns synchronously–it does not result in an invocation of a completion callback.
+
+The function GetCapabilities() can be called any time to obtain the required information from the driver (even before initialization). It always returns the same information.
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_Storage_Initialize (ARM_Storage_Callback_t callback)
+
+ +

Initialize the Storage interface.

+
Parameters
+ + +
[in]callbackPointer to ARM_Storage_Callback_t. Caller-defined callback to be invoked upon command completion for asynchronous APIs (including the completion of initialization). Use a NULL pointer when no callback signals are required.
+
+
+
Returns
If asynchronous activity is launched, invocation ARM_DRIVER_OK, and the caller can expect to receive a callback in the future with a status value of ARM_DRIVER_OK or an error-code. In the case of synchronous execution, control returns after completion with a value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
+

The function ARM_Storage_Initialize is called when the middleware component starts operation. In addition to bringing the controller to a ready state, Initialize() receives a callback handler to be invoked upon completion of asynchronous operations.

+

ARM_Storage_Initialize() needs to be called explicitly before powering the peripheral using ARM_Storage_PowerControl(), and before initiating other accesses to the storage controller.

+

The function performs the following operations:

+
    +
  • Initializes the resources needed for the Storage interface.
    • +
  • Registers the ARM_Storage_Callback_t callback function.
    • +
+

To start working with a peripheral the functions ARM_Storage_Initialize and ARM_Storage_PowerControl() need to be called in this order:

+
drv->Initialize (...); // Allocate I/O pins
+
drv->PowerControl (ARM_POWER_FULL); // Power up peripheral, setup IRQ/DMA
+
    +
  • ARM_Storage_Initialize() typically allocates the I/O resources (pins) for the peripheral. The function can be called multiple times; if the I/O resources are already initialized it performs no operation and just returns with ARM_DRIVER_OK.
    • +
  • ARM_Storage_PowerControl (ARM_POWER_FULL) sets the peripheral registers including interrupt (NVIC) and optionally DMA. The function can be called multiple times; if the registers are already set it performs no operation and just returns with ARM_DRIVER_OK.
    • +
+

To stop working with a peripheral the functions ARM_Storage_PowerControl() and ARM_Storage_Uninitialize() need to be called in this order:

+
drv->PowerControl (ARM_POWER_OFF); // Terminate any pending transfers, reset IRQ/DMA, power off peripheral
+
drv->Uninitialize (...); // Release I/O pins
+

The functions ARM_Storage_PowerControl() and ARM_Storage_Uninitialize() always execute and can be used to put the peripheral into a Safe State, for example after any data transmission errors. To restart the peripheral in an error condition, you should first execute the Stop Sequence and then the Start Sequence.

+
Note
This API may execute asynchronously if ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous execution is optional even if 'asynchronous_ops' is set.
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_Storage_Uninitialize (void )
+
+ +

De-initialize the Storage Interface.

+
Returns
If asynchronous activity is launched, an invocation returns ARM_DRIVER_OK, and the caller can expect to receive a callback in the future with a status value of ARM_DRIVER_OK or an error-code. In the case of synchronous execution, control returns after completion with a value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
+

It is called when the middleware component stops operation, and wishes to release the software resources used by the interface.

+
Note
This API may execute asynchronously if ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous execution is optional even if 'asynchronous_ops' is set.
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_Storage_PowerControl (ARM_POWER_STATE state)
+
+ +

Control the Storage interface power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
If asynchronous activity is launched, an invocation returns ARM_DRIVER_OK, and the caller can expect to receive a callback in the future with a status value of ARM_DRIVER_OK or an error-code. In the case of synchronous execution, control returns after completion with a value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
+

The function ARM_Storage_PowerControl operates the power modes of the Storage interface.

+

To start working with a peripheral the functions Initialize and PowerControl need to be called in this order:

+
drv->Initialize (...); // Allocate I/O pins
+
drv->PowerControl (ARM_POWER_FULL); // Power up peripheral, setup IRQ/DMA
+
    +
  • ARM_Storage_Initialize() typically allocates the I/O resources (pins) for the peripheral. The function can be called multiple times; if the I/O resources are already initialized it performs no operation and just returns with ARM_DRIVER_OK.
    • +
  • PowerControl (ARM_POWER_FULL) sets the peripheral registers including interrupt (NVIC) and optionally DMA. The function can be called multiple times; if the registers are already set it performs no operation and just returns with ARM_DRIVER_OK.
    • +
+

To stop working with a peripheral the functions PowerControl and Uninitialize need to be called in this order:

+
drv->PowerControl (ARM_POWER_OFF); // Terminate any pending transfers, reset IRQ/DMA, power off peripheral
+
drv->Uninitialize (...); // Release I/O pins
+

The functions ARM_Storage_PowerControl and ARM_Storage_Uninitialize always execute and can be used to put the peripheral into a Safe State, for example after any data transmission errors. To restart the peripheral in an error condition, you should first execute the Stop Sequence and then the Start Sequence.

+

The parameter state can have the following values:

+
    +
  • ARM_POWER_FULL : set-up the Storage device for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the device is already in this mode, then the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+
Note
This API may execute asynchronously if ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous execution is optional even if 'asynchronous_ops' is set.
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_Storage_ReadData (uint64_t addr,
void * data,
uint32_t size 
)
+
+ +

Read data from Storage.

+
Parameters
+ + + + +
[in]addrData address.
[out]dataPointer to a buffer storing the data read from Storage.
[in]sizeNumber of bytes to read. The data buffer should be at least as large as this size.
+
+
+
Returns
If asynchronous activity is launched, an invocation returns ARM_DRIVER_OK, and the caller can expect to receive a callback in the future with the number of successfully transferred bytes passed in as the 'status' parameter. In the case of synchronous execution, control returns after completion with a positive transfer-count. Return values less than ARM_DRIVER_OK (0) signify errors.
+

Read the contents of a range of storage memory into a buffer supplied by the caller. The buffer is owned by the caller and should remain accessible for the lifetime of this command.

+
Note
This API may execute asynchronously if ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous execution is optional even if 'asynchronous_ops' is set.
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_Storage_ProgramData (uint64_t addr,
const void * data,
uint32_t size 
)
+
+ +

Program data to Storage.

+
Parameters
+ + + + +
[in]addrThis is the start address of the range to be written into. It needs to be aligned to the device's program_unit specified in ARM_STORAGE_INFO.
[in]dataThe source of the write operation. The buffer is owned by the caller and should remain accessible for the lifetime of this command.
[in]sizeThe number of bytes requested to be written. The buffer should be at least as large as this size.
+
+
+
Note
'size' should be a multiple of the device's 'program_unit' (see ARM_STORAGE_INFO).
+
Returns
If asynchronous activity is launched, an invocation returns ARM_DRIVER_OK, and the caller can expect to receive a callback in the future with the number of successfully transferred bytes passed in as the 'status' parameter. In the case of synchronous execution, control returns after completion with a positive transfer-count. Return values less than ARM_DRIVER_OK (0) signify errors.
+

Write the contents of a given memory buffer into a range of storage memory. In the case of flash memory, the destination range in storage memory typically has its contents in an erased state from a preceding erase operation. The source memory buffer is owned by the caller and should remain accessible for the lifetime of this command.

+
Note
It is best for the middleware to write in units of 'optimal_program_unit' (ARM_STORAGE_INFO) of the device.
+
+This API may execute asynchronously if ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous execution is optional even if 'asynchronous_ops' is set.
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_Storage_Erase (uint64_t addr,
uint32_t size 
)
+
+ +

Erase Storage range.

+
Parameters
+ + + +
[in]addrThis is the start-address of the range to be erased. It must start at an 'erase_unit' boundary of the underlying block.
[in]sizeSize (in bytes) of the range to be erased. 'addr + size' must be aligned with the 'erase_unit' of the underlying block.
+
+
+
Returns
If the range to be erased doesn't align with the erase_units of the respective start and end blocks, ARM_DRIVER_ERROR_PARAMETER is returned. If any part of the range is protected, ARM_STORAGE_ERROR_PROTECTED is returned. If any part of the range is not erasable, ARM_STORAGE_ERROR_NOT_ERASABLE is returned. All such sanity-check failures result in the error code being returned synchronously and the storage bytes within the range remain unaffected. Otherwise the function executes in the following ways: If asynchronous activity is launched, an invocation returns ARM_DRIVER_OK, and the caller can expect to receive a callback in the future with the number of successfully erased bytes passed in as the 'status' parameter. In the case of synchronous execution, control returns after completion with a positive erase-count. Return values less than ARM_DRIVER_OK (0) signify errors.
+

This function erases a range of storage specified by [addr, addr + size). Both 'addr' and 'addr + size' should align with the 'erase_unit'(s) of the respective owning storage block(s) (see ARM_STORAGE_BLOCK and ARM_STORAGE_BLOCK_ATTRIBUTES). The range to be erased will have its contents returned to the un-programmed state– i.e. to ARM_STORAGE_INFO::erased_value, which is usually 1 to indicate the pattern of all ones: 0xFF.

+
Note
This API may execute asynchronously if ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous execution is optional even if 'asynchronous_ops' is set.
+
+Erase() may return a smaller (positive) value than the size of the requested range. The returned value indicates the actual number of bytes erased. It is the caller's responsibility to follow up with an appropriate request to complete the operation.
+
+in the case of a failed erase (except when ARM_DRIVER_ERROR_PARAMETER, ARM_STORAGE_ERROR_PROTECTED, or ARM_STORAGE_ERROR_NOT_ERASABLE is returned synchronously), the requested range should be assumed to be in an unknown state. The previous contents may not be retained.
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_Storage_EraseAll (void )
+
+ +

Erase complete Storage.

+
Returns
If any part of the storage range is protected, ARM_STORAGE_ERROR_PROTECTED is returned. If any part of the storage range is not erasable, ARM_STORAGE_ERROR_NOT_ERASABLE is returned. All such sanity-check failures result in the error code being returned synchronously and the storage bytes within the range remain unaffected. Otherwise the function executes in the following ways: If asynchronous activity is launched, an invocation returns ARM_DRIVER_OK, and the caller can expect to receive a callback in the future with ARM_DRIVER_OK passed in as the 'status' parameter. In the case of synchronous execution, control returns after completion with a value of 1. Return values less than ARM_DRIVER_OK (0) signify errors.
+

This optional function erases the complete device. If the device does not support global erase then the function returns the error value ARM_DRIVER_ERROR_UNSUPPORTED. The data field 'erase_all' = 1 of the structure ARM_STORAGE_CAPABILITIES encodes that ARM_Storage_EraseAll is supported.

+
Note
This API may execute asynchronously if ARM_STORAGE_CAPABILITIES::asynchronous_ops is set. Asynchronous execution is optional even if 'asynchronous_ops' is set.
+ +
+
+ +
+
+ + + + + + + + +
ARM_STORAGE_STATUS ARM_Storage_GetStatus (void )
+
+ +

Get Storage status.

+
Returns
Storage status ARM_STORAGE_STATUS
+

Get the status of the current (or previous) command executed by the storage controller; stored in the structure ARM_STORAGE_STATUS.

+
Note
This API returns synchronously–it does not result in an invocation of a completion callback.
+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_Storage_GetInfo (ARM_STORAGE_INFO * info)
+
+ +

Get Storage information.

+
Parameters
+ + +
[out]infoA caller-supplied buffer capable of being filled in with an ARM_STORAGE_INFO.
+
+
+
Returns
ARM_DRIVER_OK if a ARM_STORAGE_INFO structure containing top level metadata about the storage controller is filled into the supplied buffer, else an appropriate error value.
+

Get information about the Storage device; stored in the structure ARM_STORAGE_INFO.

+
Note
It is the caller's responsibility to ensure that the buffer passed in is able to be initialized with a ARM_STORAGE_INFO.
+
+This API returns synchronously–it does not result in an invocation of a completion callback.
+ +
+
+ +
+
+ + + + + + + + +
uint32_t ARM_Storage_ResolveAddress (uint64_t addr)
+
+ +

Resolve an address relative to the storage controller into a memory address.

+
Parameters
+ + +
[in]addrThe address for which we want a resolution to the processor's physical address space. It is an offset from the start of the storage map maintained by the owning storage controller.
+
+
+
Returns
The resolved address in the processor's address space, else ARM_STORAGE_INVALID_ADDRESS.
+

Only applicable to devices with memory-mapped storage.

+
Note
This API returns synchronously. The invocation should return quickly, and result in a resolved address.
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_Storage_GetNextBlock (const ARM_STORAGE_BLOCK * prev_block,
ARM_STORAGE_BLOCK * next_block 
)
+
+ +

Advance to the successor of the current block (iterator).

+
Parameters
+ + + +
[in]prev_blockAn existing block (iterator) within the same storage controller. The memory buffer holding this block is owned by the caller. This pointer may be NULL; if so, the invocation fills in the first block into the out parameter: 'next_block'.
[out]next_blockA caller-owned buffer large enough to be filled in with the following ARM_STORAGE_BLOCK. It is legal to provide the same buffer using 'next_block' as was passed in with 'prev_block'. It is also legal to pass a NULL into this parameter if the caller isn't interested in populating a buffer with the next block, i.e. if the caller only wishes to establish the presence of a next block.
+
+
+
Returns
ARM_DRIVER_OK if a valid next block is found (or first block, if prev_block is passed as NULL); upon successful operation, the contents of the next (or first) block are filled into the buffer pointed to by the parameter 'next_block' and ARM_STORAGE_VALID_BLOCK(next_block) is guaranteed to be true. Upon reaching the end of the sequence of blocks (iterators), or in case the driver is unable to fetch information about the next (or first) block, an error (negative) value is returned and an invalid StorageBlock is populated into the supplied buffer. If prev_block is NULL, the first block is returned.
+

This helper function fetches (an iterator to) the next block (or the first block if 'prev_block' is passed in as NULL). In the failure case, a terminating, invalid block iterator is filled into the out parameter: 'next_block'. In combination with ARM_STORAGE_VALID_BLOCK, it can be used to iterate over the sequence of blocks within the storage map:

+
ARM_STORAGE_BLOCK block;
+
for (drv->GetNextBlock(NULL, &block); ARM_STORAGE_VALID_BLOCK(&block); drv->GetNextBlock(&block, &block)) {
+
// make use of block
+
}
+
Note
This API returns synchronously–it does not result in an invocation of a completion callback.
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_Storage_GetBlock (uint64_t addr,
ARM_STORAGE_BLOCK * block 
)
+
+ +

Find the storage block (iterator) encompassing a given storage address.

+
Parameters
+ + + +
[in]addrStorage address in bytes.
[out]blockA caller-owned buffer large enough to be filled in with the ARM_STORAGE_BLOCK encapsulating the given address. This value can also be passed in as NULL if the caller isn't interested in populating a buffer with the block, if the caller only wishes to establish the presence of a containing storage block.
+
+
+
Returns
ARM_DRIVER_OK if a containing storage-block is found. In this case, if block is non-NULL, the buffer pointed to by it is populated with the contents of the storage block, i.e. if block is valid and a block is found, ARM_STORAGE_VALID_BLOCK(block) would return true following this call. If there is no storage block containing the given offset, or in case the driver is unable to resolve an address to a storage-block, an error (negative) value is returned and an invalid StorageBlock is populated into the supplied buffer.
+
Note
This API returns synchronously–it does not result in an invocation of a completion callback.
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__storage__interface__gr.js b/docs/Driver/html/group__storage__interface__gr.js new file mode 100644 index 0000000..2e0417f --- /dev/null +++ b/docs/Driver/html/group__storage__interface__gr.js @@ -0,0 +1,88 @@ +var group__storage__interface__gr = +[ + [ "Use of Storage APIs", "group__StorageDriverFunctions.html", null ], + [ "Sample Use of Storage Driver", "group__SampleUseOfStorageDriver.html", null ], + [ "ARM_STORAGE_BLOCK_ATTRIBUTES", "group__storage__interface__gr.html#structARM__STORAGE__BLOCK__ATTRIBUTES", [ + [ "erasable", "group__storage__interface__gr.html#ab350afb2119388ebd3f096bd24f019ef", null ], + [ "programmable", "group__storage__interface__gr.html#a7f4aebaeeb818b0e2a0592f96559fa1b", null ], + [ "executable", "group__storage__interface__gr.html#a910da8e2e909faab1d32cca7f8b05656", null ], + [ "protectable", "group__storage__interface__gr.html#a7c8899f46a471e1b7698a75a759e67c1", null ], + [ "reserved", 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"group__storage__interface__gr.html#abbfb3aa4b6adb4407de79221bf12cc55", null ], + [ "Initialize", "group__storage__interface__gr.html#a4a126668a113ce450b0d831c74199b23", null ], + [ "Uninitialize", "group__storage__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__storage__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "ReadData", "group__storage__interface__gr.html#a79b015933daca07a88f98a8f20e1144d", null ], + [ "ProgramData", "group__storage__interface__gr.html#aedda6cc77ea7c4ef2356c683f9013d8b", null ], + [ "Erase", "group__storage__interface__gr.html#abb5018d1afb3ea4632e6e6006314f37f", null ], + [ "EraseAll", "group__storage__interface__gr.html#ad4dc5af362c0f2043138618aea9c6a73", null ], + [ "GetStatus", "group__storage__interface__gr.html#a820e9b9de75ebe93e64b067468b369af", null ], + [ "GetInfo", "group__storage__interface__gr.html#aec80a5d1ccf1cd996f6e863ac8868d65", null ], + [ "ResolveAddress", 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"group__storage__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_Storage_Callback_t", "group__storage__interface__gr.html#ga4b290224fea782e6d2ad06f541b28a98", null ], + [ "ARM_STORAGE_OPERATION", "group__storage__interface__gr.html#ga3a9277f89946d61c41b22da72e3eef7c", [ + [ "ARM_STORAGE_OPERATION_GET_VERSION", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7cac82e2ca0f9b7ec94e24ae56c45f12f8c", null ], + [ "ARM_STORAGE_OPERATION_GET_CAPABILITIES", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7ca314621ae4384fef7094d8724d59b65c4", null ], + [ "ARM_STORAGE_OPERATION_INITIALIZE", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7caca3985b874bf393dc2e448b339668971", null ], + [ "ARM_STORAGE_OPERATION_UNINITIALIZE", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7cab9488e567ad58b16c5df2637df3902e9", null ], + [ "ARM_STORAGE_OPERATION_POWER_CONTROL", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7ca213a74ac5a692a80f17fd6d8e6565e05", null ], + [ "ARM_STORAGE_OPERATION_READ_DATA", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7ca177812f3cb27c413473d94ebe9480454", null ], + [ "ARM_STORAGE_OPERATION_PROGRAM_DATA", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7ca586b4774a7a092d1932d3415cc42abb0", null ], + [ "ARM_STORAGE_OPERATION_ERASE", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7cab52a1d10b8087452fd97af8cdb9a6f75", null ], + [ "ARM_STORAGE_OPERATION_ERASE_ALL", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7ca60a0511bd5e32db2a22d3ab2023a601e", null ], + [ "ARM_STORAGE_OPERATION_GET_STATUS", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7ca7c595cd3c439753efe0a0b17efd7bb7f", null ], + [ "ARM_STORAGE_OPERATION_GET_INFO", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7ca0fe0ef7c0a9e69d053a0419282248f40", null ], + [ "ARM_STORAGE_OPERATION_RESOLVE_ADDRESS", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7ca3292512d0222e4119d0cdf77de1508df", null ], + [ "ARM_STORAGE_OPERATION_GET_NEXT_BLOCK", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7ca9bfab6ee9caa3ace32338d4ef2d856f5", null ], + [ "ARM_STORAGE_OPERATION_GET_BLOCK", "Driver__Storage_8h.html#ga3a9277f89946d61c41b22da72e3eef7cac75096931c3d29af1029f25fc44e7523", null ] + ] ], + [ "ARM_Storage_GetVersion", "group__storage__interface__gr.html#gaf28193431b1a2ee64b22bfb36aed27e3", null ], + [ "ARM_Storage_GetCapabilities", "group__storage__interface__gr.html#ga8378b3901dfe76d8f31728a50e10dae2", null ], + [ "ARM_Storage_Initialize", "group__storage__interface__gr.html#gacc5dc090a35ac16caff8957030eaa174", null ], + [ "ARM_Storage_Uninitialize", "group__storage__interface__gr.html#ga1d14b15ddcda2836c6e3c1d0b5e60dca", null ], + [ "ARM_Storage_PowerControl", "group__storage__interface__gr.html#ga979a2484bf05b2986de95a5d98307d54", null ], + [ "ARM_Storage_ReadData", "group__storage__interface__gr.html#gabaa24553c165add98020434c980b3ab4", null ], + [ "ARM_Storage_ProgramData", "group__storage__interface__gr.html#gabd20d561854c06918b0515b6c1bba230", null ], + [ "ARM_Storage_Erase", "group__storage__interface__gr.html#gaceef4851d9181cce65c8b2d05f4429bc", null ], + [ "ARM_Storage_EraseAll", "group__storage__interface__gr.html#ga04e77387a3c628d6fc661e82f7daddaa", null ], + [ "ARM_Storage_GetStatus", "group__storage__interface__gr.html#ga29e7bfe78f41abb16973bdb4e0188a20", null ], + [ "ARM_Storage_GetInfo", "group__storage__interface__gr.html#gad557e8e6e33cd4528d398ecf4dddc747", null ], + [ "ARM_Storage_ResolveAddress", "group__storage__interface__gr.html#ga5a1934750a51c74b8b0fea52588a3b9a", null ], + [ "ARM_Storage_GetNextBlock", "group__storage__interface__gr.html#gad318f8cb38626cbeea1fcf36a0977c44", null ], + [ "ARM_Storage_GetBlock", "group__storage__interface__gr.html#ga5fe9d27ce8afe65124dec62566114073", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__storage__interface__gr_structARM__DRIVER__STORAGE.js b/docs/Driver/html/group__storage__interface__gr_structARM__DRIVER__STORAGE.js new file mode 100644 index 0000000..64b4e8a --- /dev/null +++ b/docs/Driver/html/group__storage__interface__gr_structARM__DRIVER__STORAGE.js @@ -0,0 +1,17 @@ +var group__storage__interface__gr_structARM__DRIVER__STORAGE = +[ + [ "GetVersion", "group__storage__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__storage__interface__gr.html#abbfb3aa4b6adb4407de79221bf12cc55", null ], + [ "Initialize", "group__storage__interface__gr.html#a4a126668a113ce450b0d831c74199b23", null ], + [ "Uninitialize", "group__storage__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__storage__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "ReadData", "group__storage__interface__gr.html#a79b015933daca07a88f98a8f20e1144d", null ], + [ "ProgramData", "group__storage__interface__gr.html#aedda6cc77ea7c4ef2356c683f9013d8b", null ], + [ "Erase", "group__storage__interface__gr.html#abb5018d1afb3ea4632e6e6006314f37f", null ], + [ "EraseAll", "group__storage__interface__gr.html#ad4dc5af362c0f2043138618aea9c6a73", null ], + [ "GetStatus", "group__storage__interface__gr.html#a820e9b9de75ebe93e64b067468b369af", null ], + [ "GetInfo", "group__storage__interface__gr.html#aec80a5d1ccf1cd996f6e863ac8868d65", null ], + [ "ResolveAddress", "group__storage__interface__gr.html#a6e1b3f9abb40bb5c70c6141587ee6e6a", null ], + [ "GetNextBlock", "group__storage__interface__gr.html#adda93f4d74519247517f036c4551dd13", null ], + [ "GetBlock", "group__storage__interface__gr.html#af43edebfb5463d22ffeda6de20e1d1bd", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__BLOCK.js b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__BLOCK.js new file mode 100644 index 0000000..2b2cf43 --- /dev/null +++ b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__BLOCK.js @@ -0,0 +1,6 @@ +var group__storage__interface__gr_structARM__STORAGE__BLOCK = +[ + [ "addr", "group__storage__interface__gr.html#a0e89cf6b9f6cd3125470b1bed2b823df", null ], + [ "size", "group__storage__interface__gr.html#af931a8871310b4dad23f0f0b0f623560", null ], + [ "attributes", "group__storage__interface__gr.html#ade62c905888479b4f6d078d45cec5830", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__BLOCK__ATTRIBUTES.js b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__BLOCK__ATTRIBUTES.js new file mode 100644 index 0000000..c4c371a --- /dev/null +++ b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__BLOCK__ATTRIBUTES.js @@ -0,0 +1,10 @@ +var group__storage__interface__gr_structARM__STORAGE__BLOCK__ATTRIBUTES = +[ + [ "erasable", "group__storage__interface__gr.html#ab350afb2119388ebd3f096bd24f019ef", null ], + [ "programmable", "group__storage__interface__gr.html#a7f4aebaeeb818b0e2a0592f96559fa1b", null ], + [ "executable", "group__storage__interface__gr.html#a910da8e2e909faab1d32cca7f8b05656", null ], + [ "protectable", "group__storage__interface__gr.html#a7c8899f46a471e1b7698a75a759e67c1", null ], + [ "reserved", "group__storage__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ], + [ "erase_unit", "group__storage__interface__gr.html#aac21d3f798c9fcad415b99cf4157935a", null ], + [ "protection_unit", "group__storage__interface__gr.html#ae319384dfb356cbb0b08ccbf8c04a590", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__CAPABILITIES.js b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__CAPABILITIES.js new file mode 100644 index 0000000..985654f --- /dev/null +++ b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__CAPABILITIES.js @@ -0,0 +1,6 @@ +var group__storage__interface__gr_structARM__STORAGE__CAPABILITIES = +[ + [ "asynchronous_ops", "group__storage__interface__gr.html#a15ade4ca762bc6ce72d435a16febb4cc", null ], + [ "erase_all", "group__storage__interface__gr.html#a63882f6a571f20aad1b5b3542cdaafa1", null ], + [ "reserved", "group__storage__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__INFO.js b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__INFO.js new file mode 100644 index 0000000..9c3f7c4 --- /dev/null +++ b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__INFO.js @@ -0,0 +1,13 @@ +var group__storage__interface__gr_structARM__STORAGE__INFO = +[ + [ "total_storage", "group__storage__interface__gr.html#a4b14ce1ca2ceea5ce49e81348c5b38f6", null ], + [ "program_unit", "group__storage__interface__gr.html#a483c41066757e2865bf3a27a2a627a54", null ], + [ "optimal_program_unit", "group__storage__interface__gr.html#a407e16dc7e4da08cea7785efeebd9b6d", null ], + [ "program_cycles", "group__storage__interface__gr.html#ac501623ba5adb4904cdd6c286e7388eb", null ], + [ "erased_value", "group__storage__interface__gr.html#a902510dbedab116ab6a260a83fbd0f27", null ], + [ "memory_mapped", "group__storage__interface__gr.html#a616b41da466430ed481d791e63784f0c", null ], + [ "programmability", "group__storage__interface__gr.html#aac0da06bf0775bd9b877aafbc4bcad77", null ], + [ "retention_level", "group__storage__interface__gr.html#a16d1a2aead689ffa28fd89cb6779e5a7", null ], + [ "reserved", "group__storage__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ], + [ "security", "group__storage__interface__gr.html#aee43dd20848f45fe05efc10a8198817a", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__STATUS.js b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__STATUS.js new file mode 100644 index 0000000..41f55ac --- /dev/null +++ b/docs/Driver/html/group__storage__interface__gr_structARM__STORAGE__STATUS.js @@ -0,0 +1,6 @@ +var group__storage__interface__gr_structARM__STORAGE__STATUS = +[ + [ "busy", "group__storage__interface__gr.html#a50c88f3c1d787773e2ac1b59533f034a", null ], + [ "error", "group__storage__interface__gr.html#aa8d183302fdfa4a6892f1d80300cdb32", null ], + [ "reserved", "group__storage__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__clock__phase.html b/docs/Driver/html/group__usart__clock__phase.html new file mode 100644 index 0000000..e97e623 --- /dev/null +++ b/docs/Driver/html/group__usart__clock__phase.html @@ -0,0 +1,176 @@ + + + + + +USART Clock Phase +CMSIS-Driver: USART Clock Phase + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USART Clock Phase
USART Control Codes
+
+
+ +

Defines the clock phase for the synchronous mode. +More...

+ + + + + + + + +

+Macros

#define ARM_USART_CPHA0   (0UL << ARM_USART_CPHA_Pos)
 CPHA = 0 (default) More...
 
#define ARM_USART_CPHA1   (1UL << ARM_USART_CPHA_Pos)
 CPHA = 1. More...
 
+

Description

+

Defines the clock phase for the synchronous mode.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_CPHA0   (0UL << ARM_USART_CPHA_Pos)
+
+ +

CPHA = 0 (default)

+
See Also
ARM_USART_Control; ARM_USART_Receive; ARM_USART_Send; ARM_USART_Transfer
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CPHA1   (1UL << ARM_USART_CPHA_Pos)
+
+ +

CPHA = 1.

+
See Also
ARM_USART_Control; ARM_USART_Receive; ARM_USART_Send; ARM_USART_Transfer
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__clock__phase.js b/docs/Driver/html/group__usart__clock__phase.js new file mode 100644 index 0000000..7c3a3c8 --- /dev/null +++ b/docs/Driver/html/group__usart__clock__phase.js @@ -0,0 +1,5 @@ +var group__usart__clock__phase = +[ + [ "ARM_USART_CPHA0", "group__usart__clock__phase.html#ga5eb27c2294b7d14a20d0c7e2ef0a47b4", null ], + [ "ARM_USART_CPHA1", "group__usart__clock__phase.html#ga4b9f16371870476739a198c52dba6862", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__clock__polarity.html b/docs/Driver/html/group__usart__clock__polarity.html new file mode 100644 index 0000000..749ced3 --- /dev/null +++ b/docs/Driver/html/group__usart__clock__polarity.html @@ -0,0 +1,176 @@ + + + + + +USART Clock Polarity +CMSIS-Driver: USART Clock Polarity + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USART Clock Polarity
USART Control Codes
+
+
+ +

Defines the clock polarity for the synchronous mode. +More...

+ + + + + + + + +

+Macros

#define ARM_USART_CPOL0   (0UL << ARM_USART_CPOL_Pos)
 CPOL = 0 (default) More...
 
#define ARM_USART_CPOL1   (1UL << ARM_USART_CPOL_Pos)
 CPOL = 1. More...
 
+

Description

+

Defines the clock polarity for the synchronous mode.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_CPOL0   (0UL << ARM_USART_CPOL_Pos)
+
+ +

CPOL = 0 (default)

+
See Also
ARM_USART_Control; ARM_USART_Receive; ARM_USART_Send; ARM_USART_Transfer
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CPOL1   (1UL << ARM_USART_CPOL_Pos)
+
+ +

CPOL = 1.

+
See Also
ARM_USART_Control; ARM_USART_Receive; ARM_USART_Send; ARM_USART_Transfer
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__clock__polarity.js b/docs/Driver/html/group__usart__clock__polarity.js new file mode 100644 index 0000000..22e6d32 --- /dev/null +++ b/docs/Driver/html/group__usart__clock__polarity.js @@ -0,0 +1,5 @@ +var group__usart__clock__polarity = +[ + [ "ARM_USART_CPOL0", "group__usart__clock__polarity.html#ga472d459abb99f1caaff94fa0cdd2ad27", null ], + [ "ARM_USART_CPOL1", "group__usart__clock__polarity.html#ga9e5541d8937a9d92e42aeb273138592a", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__data__bits.html b/docs/Driver/html/group__usart__data__bits.html new file mode 100644 index 0000000..581c5cd --- /dev/null +++ b/docs/Driver/html/group__usart__data__bits.html @@ -0,0 +1,230 @@ + + + + + +USART Data Bits +CMSIS-Driver: USART Data Bits + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USART Data Bits
USART Control Codes
+
+
+ +

Defines the number of data bits. +More...

+ + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USART_DATA_BITS_5   (5UL << ARM_USART_DATA_BITS_Pos)
 5 Data bits More...
 
#define ARM_USART_DATA_BITS_6   (6UL << ARM_USART_DATA_BITS_Pos)
 6 Data bit More...
 
#define ARM_USART_DATA_BITS_7   (7UL << ARM_USART_DATA_BITS_Pos)
 7 Data bits More...
 
#define ARM_USART_DATA_BITS_8   (0UL << ARM_USART_DATA_BITS_Pos)
 8 Data bits (default) More...
 
#define ARM_USART_DATA_BITS_9   (1UL << ARM_USART_DATA_BITS_Pos)
 9 Data bits More...
 
+

Description

+

Defines the number of data bits.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_DATA_BITS_5   (5UL << ARM_USART_DATA_BITS_Pos)
+
+ +

5 Data bits

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_DATA_BITS_6   (6UL << ARM_USART_DATA_BITS_Pos)
+
+ +

6 Data bit

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_DATA_BITS_7   (7UL << ARM_USART_DATA_BITS_Pos)
+
+ +

7 Data bits

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_DATA_BITS_8   (0UL << ARM_USART_DATA_BITS_Pos)
+
+ +

8 Data bits (default)

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_DATA_BITS_9   (1UL << ARM_USART_DATA_BITS_Pos)
+
+ +

9 Data bits

+
See Also
ARM_USART_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__data__bits.js b/docs/Driver/html/group__usart__data__bits.js new file mode 100644 index 0000000..1ad129d --- /dev/null +++ b/docs/Driver/html/group__usart__data__bits.js @@ -0,0 +1,8 @@ +var group__usart__data__bits = +[ + [ "ARM_USART_DATA_BITS_5", "group__usart__data__bits.html#ga981ff25b4ff806f743d1af4575b87339", null ], + [ "ARM_USART_DATA_BITS_6", "group__usart__data__bits.html#ga92ba3d6cea5cd5c0b661667539a9e43c", null ], + [ "ARM_USART_DATA_BITS_7", "group__usart__data__bits.html#gad86a2d971ce521c6f6eda28d4f8786a4", null ], + [ "ARM_USART_DATA_BITS_8", "group__usart__data__bits.html#gadc5e8d17b5c69cd7f9135b849c2a4586", null ], + [ "ARM_USART_DATA_BITS_9", "group__usart__data__bits.html#gae238a08198dc7ac6178ae0a2a95a2764", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__execution__status.html b/docs/Driver/html/group__usart__execution__status.html new file mode 100644 index 0000000..c288ae5 --- /dev/null +++ b/docs/Driver/html/group__usart__execution__status.html @@ -0,0 +1,285 @@ + + + + + +Status Error Codes +CMSIS-Driver: Status Error Codes + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
Status Error Codes
USART Interface
+
+
+ +

Negative values indicate errors (USART has specific codes in addition to common Status Error Codes). +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USART_ERROR_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 Specified Mode not supported. More...
 
#define ARM_USART_ERROR_BAUDRATE   (ARM_DRIVER_ERROR_SPECIFIC - 2)
 Specified baudrate not supported. More...
 
#define ARM_USART_ERROR_DATA_BITS   (ARM_DRIVER_ERROR_SPECIFIC - 3)
 Specified number of Data bits not supported. More...
 
#define ARM_USART_ERROR_PARITY   (ARM_DRIVER_ERROR_SPECIFIC - 4)
 Specified Parity not supported. More...
 
#define ARM_USART_ERROR_STOP_BITS   (ARM_DRIVER_ERROR_SPECIFIC - 5)
 Specified number of Stop bits not supported. More...
 
#define ARM_USART_ERROR_FLOW_CONTROL   (ARM_DRIVER_ERROR_SPECIFIC - 6)
 Specified Flow Control not supported. More...
 
#define ARM_USART_ERROR_CPOL   (ARM_DRIVER_ERROR_SPECIFIC - 7)
 Specified Clock Polarity not supported. More...
 
#define ARM_USART_ERROR_CPHA   (ARM_DRIVER_ERROR_SPECIFIC - 8)
 Specified Clock Phase not supported. More...
 
+

Description

+

Negative values indicate errors (USART has specific codes in addition to common Status Error Codes).

+

The USART driver has additional status error codes that are listed below. Note that the USART driver also returns the common Status Error Codes.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_ERROR_MODE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
+
+ +

Specified Mode not supported.

+

The mode requested with the function ARM_USART_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_ERROR_BAUDRATE   (ARM_DRIVER_ERROR_SPECIFIC - 2)
+
+ +

Specified baudrate not supported.

+

The baude rate requested with the function ARM_USART_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_ERROR_DATA_BITS   (ARM_DRIVER_ERROR_SPECIFIC - 3)
+
+ +

Specified number of Data bits not supported.

+

The number of data bits requested with the function ARM_USART_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_ERROR_PARITY   (ARM_DRIVER_ERROR_SPECIFIC - 4)
+
+ +

Specified Parity not supported.

+

The parity bit requested with the function ARM_USART_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_ERROR_STOP_BITS   (ARM_DRIVER_ERROR_SPECIFIC - 5)
+
+ +

Specified number of Stop bits not supported.

+

The stop bit requested with the function ARM_USART_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_ERROR_FLOW_CONTROL   (ARM_DRIVER_ERROR_SPECIFIC - 6)
+
+ +

Specified Flow Control not supported.

+

The flow control requested with the function ARM_USART_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_ERROR_CPOL   (ARM_DRIVER_ERROR_SPECIFIC - 7)
+
+ +

Specified Clock Polarity not supported.

+

The clock polarity requested with the function ARM_USART_Control is not supported by this driver.

+ +
+
+ +
+
+ + + + +
#define ARM_USART_ERROR_CPHA   (ARM_DRIVER_ERROR_SPECIFIC - 8)
+
+ +

Specified Clock Phase not supported.

+

The clock phase requested with the function ARM_USART_Control is not supported by this driver.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__execution__status.js b/docs/Driver/html/group__usart__execution__status.js new file mode 100644 index 0000000..25d8419 --- /dev/null +++ b/docs/Driver/html/group__usart__execution__status.js @@ -0,0 +1,11 @@ +var group__usart__execution__status = +[ + [ "ARM_USART_ERROR_MODE", "group__usart__execution__status.html#gaa98f35611ec5bd7034f21cb47199322b", null ], + [ "ARM_USART_ERROR_BAUDRATE", "group__usart__execution__status.html#gab57c4e8d4cb3a4b73751a002f5ec4586", null ], + [ "ARM_USART_ERROR_DATA_BITS", "group__usart__execution__status.html#gaade95ddec6882e96c086dfe8e0ba9a4c", null ], + [ "ARM_USART_ERROR_PARITY", "group__usart__execution__status.html#gaefabd886c586a45f4f7346c1f04392d0", null ], + [ "ARM_USART_ERROR_STOP_BITS", "group__usart__execution__status.html#ga1d699654fbbed3ca41c5ea10aac8f859", null ], + [ "ARM_USART_ERROR_FLOW_CONTROL", "group__usart__execution__status.html#gaf8fea8d43ff72c76434d8b5e9eebd890", null ], + [ "ARM_USART_ERROR_CPOL", "group__usart__execution__status.html#ga2a1cd0a1e1bce9b545b0d7854a6fd6d6", null ], + [ "ARM_USART_ERROR_CPHA", "group__usart__execution__status.html#gade1af23c4ed5409dacd99ab76dc2ff8b", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__flow__control.html b/docs/Driver/html/group__usart__flow__control.html new file mode 100644 index 0000000..672d38f --- /dev/null +++ b/docs/Driver/html/group__usart__flow__control.html @@ -0,0 +1,212 @@ + + + + + +USART Flow Control +CMSIS-Driver: USART Flow Control + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USART Flow Control
USART Control Codes
+
+
+ +

Specifies RTS/CTS flow control. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_USART_FLOW_CONTROL_NONE   (0UL << ARM_USART_FLOW_CONTROL_Pos)
 No Flow Control (default) More...
 
#define ARM_USART_FLOW_CONTROL_RTS   (1UL << ARM_USART_FLOW_CONTROL_Pos)
 RTS Flow Control. More...
 
#define ARM_USART_FLOW_CONTROL_CTS   (2UL << ARM_USART_FLOW_CONTROL_Pos)
 CTS Flow Control. More...
 
#define ARM_USART_FLOW_CONTROL_RTS_CTS   (3UL << ARM_USART_FLOW_CONTROL_Pos)
 RTS/CTS Flow Control. More...
 
+

Description

+

Specifies RTS/CTS flow control.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_FLOW_CONTROL_NONE   (0UL << ARM_USART_FLOW_CONTROL_Pos)
+
+ +

No Flow Control (default)

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_FLOW_CONTROL_RTS   (1UL << ARM_USART_FLOW_CONTROL_Pos)
+
+ +

RTS Flow Control.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_FLOW_CONTROL_CTS   (2UL << ARM_USART_FLOW_CONTROL_Pos)
+
+ +

CTS Flow Control.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_FLOW_CONTROL_RTS_CTS   (3UL << ARM_USART_FLOW_CONTROL_Pos)
+
+ +

RTS/CTS Flow Control.

+
See Also
ARM_USART_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__flow__control.js b/docs/Driver/html/group__usart__flow__control.js new file mode 100644 index 0000000..8012bba --- /dev/null +++ b/docs/Driver/html/group__usart__flow__control.js @@ -0,0 +1,7 @@ +var group__usart__flow__control = +[ + [ "ARM_USART_FLOW_CONTROL_NONE", "group__usart__flow__control.html#gad04aa3fe4ea4b7363aee4bdca2ed3764", null ], + [ "ARM_USART_FLOW_CONTROL_RTS", "group__usart__flow__control.html#ga80c8a78e8868165cfcc543105bfd9621", null ], + [ "ARM_USART_FLOW_CONTROL_CTS", "group__usart__flow__control.html#gaa7b38ebff1ce0f5c3e4479d22e66715f", null ], + [ "ARM_USART_FLOW_CONTROL_RTS_CTS", "group__usart__flow__control.html#gab16151b5c376b41586faf033f4a42d02", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__interface__gr.html b/docs/Driver/html/group__usart__interface__gr.html new file mode 100644 index 0000000..d5b6a95 --- /dev/null +++ b/docs/Driver/html/group__usart__interface__gr.html @@ -0,0 +1,1563 @@ + + + + + +USART Interface +CMSIS-Driver: USART Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Enumerations | +Functions
+
+
USART Interface
+
+
+ +

Driver API for Universal Synchronous Asynchronous Receiver/Transmitter (Driver_USART.h) +More...

+ + + + + + + + + + + +

+Content

 Status Error Codes
 Negative values indicate errors (USART has specific codes in addition to common Status Error Codes).
 
 USART Events
 The USART driver generates call back events that are notified via the function ARM_USART_SignalEvent.
 
 USART Control Codes
 Many parameters of the USART driver are configured using the ARM_USART_Control function.
 
+ + + + + + + + + + + + + +

+Data Structures

struct  ARM_DRIVER_USART
 Access structure of the USART Driver. More...
 
struct  ARM_USART_CAPABILITIES
 USART Device Driver Capabilities. More...
 
struct  ARM_USART_STATUS
 USART Status. More...
 
struct  ARM_USART_MODEM_STATUS
 USART Modem Status. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_USART_SignalEvent_t )(uint32_t event)
 Pointer to ARM_USART_SignalEvent : Signal USART Event. More...
 
+ + + + +

+Enumerations

enum  ARM_USART_MODEM_CONTROL {
+  ARM_USART_RTS_CLEAR, +
+  ARM_USART_RTS_SET, +
+  ARM_USART_DTR_CLEAR, +
+  ARM_USART_DTR_SET +
+ }
 USART Modem Control. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_USART_GetVersion (void)
 Get driver version. More...
 
ARM_USART_CAPABILITIES ARM_USART_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_USART_Initialize (ARM_USART_SignalEvent_t cb_event)
 Initialize USART Interface. More...
 
int32_t ARM_USART_Uninitialize (void)
 De-initialize USART Interface. More...
 
int32_t ARM_USART_PowerControl (ARM_POWER_STATE state)
 Control USART Interface Power. More...
 
int32_t ARM_USART_Send (const void *data, uint32_t num)
 Start sending data to USART transmitter. More...
 
int32_t ARM_USART_Receive (void *data, uint32_t num)
 Start receiving data from USART receiver. More...
 
int32_t ARM_USART_Transfer (const void *data_out, void *data_in, uint32_t num)
 Start sending/receiving data to/from USART transmitter/receiver. More...
 
uint32_t ARM_USART_GetTxCount (void)
 Get transmitted data count. More...
 
uint32_t ARM_USART_GetRxCount (void)
 Get received data count. More...
 
int32_t ARM_USART_Control (uint32_t control, uint32_t arg)
 Control USART Interface. More...
 
ARM_USART_STATUS ARM_USART_GetStatus (void)
 Get USART status. More...
 
int32_t ARM_USART_SetModemControl (ARM_USART_MODEM_CONTROL control)
 Set USART Modem Control line state. More...
 
ARM_USART_MODEM_STATUS ARM_USART_GetModemStatus (void)
 Get USART Modem Status lines state. More...
 
void ARM_USART_SignalEvent (uint32_t event)
 Signal USART Events. More...
 
+

Description

+

Driver API for Universal Synchronous Asynchronous Receiver/Transmitter (Driver_USART.h)

+

The Universal Synchronous Asynchronous Receiver/Transmitter (USART) implements a synchronous and asynchronous serial bus for exchanging data. When only asynchronous mode is supported it is called Universal Asynchronous Receiver/Transmitter (UART). Almost all microcontrollers have a serial interface (UART/USART peripheral). A UART is a simple device to send data to a PC via a terminal emulation program (Hyperterm, TeraTerm) or to another microcontroller. A UART takes bytes of data and transmits the individual bits in a sequential mode. At the destination, a second UART reassembles the bits into complete bytes. Each UART contains a shift register for converting between serial and parallel transmission forms. Wikipedia offers more information about the Universal asynchronous receiver/transmitter.

+

USART API

+

The following header files define the Application Programming Interface (API) for the USART interface:

+
    +
  • Driver_USART.h : Driver API for Universal Synchronous Asynchronous Receiver/Transmitter
    • +
+

The driver implementation is a typical part of the Device Family Pack (DFP) that supports the peripherals of the microcontroller family.

+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +

Example Code

+

The following example code shows the usage of the USART interface for asynchronous communication.

+
#include "Driver_USART.h"
+
#include "cmsis_os.h" /* ARM::CMSIS:RTOS:Keil RTX */
+
#include <stdio.h>
+
#include <string.h>
+
+
void myUART_Thread(void const *argument);
+
osThreadId tid_myUART_Thread;
+
+
/* USART Driver */
+
extern ARM_DRIVER_USART Driver_USART3;
+
+
+
void myUSART_callback(uint32_t event)
+
{
+
uint32_t mask;
+
+
mask = ARM_USART_EVENT_RECEIVE_COMPLETE |
+
ARM_USART_EVENT_TRANSFER_COMPLETE |
+
ARM_USART_EVENT_SEND_COMPLETE |
+
ARM_USART_EVENT_TX_COMPLETE ;
+
+
if (event & mask) {
+
/* Success: Wakeup Thread */
+
osSignalSet(tid_myUART_Thread, 0x01);
+
}
+
+
if (event & ARM_USART_EVENT_RX_TIMEOUT) {
+
__breakpoint(0); /* Error: Call debugger or replace with custom error handling */
+
}
+
+
if (event & (ARM_USART_EVENT_RX_OVERFLOW | ARM_USART_EVENT_TX_UNDERFLOW)) {
+
__breakpoint(0); /* Error: Call debugger or replace with custom error handling */
+
}
+
}
+
+
+
/* CMSIS-RTOS Thread - UART command thread */
+
void myUART_Thread(const void* args)
+
{
+
static ARM_DRIVER_USART * USARTdrv = &Driver_USART3;
+
ARM_DRIVER_VERSION version;
+
ARM_USART_CAPABILITIES drv_capabilities;
+
char cmd;
+
+
#ifdef DEBUG
+
version = USARTdrv->GetVersion();
+
if (version.api < 0x200) /* requires at minimum API version 2.00 or higher */
+
{ /* error handling */
+
return;
+
}
+
drv_capabilities = USARTdrv->GetCapabilities();
+
if (drv_capabilities.event_tx_complete == 0)
+
{ /* error handling */
+
return;
+
}
+
#endif
+
+
/*Initialize the USART driver */
+
USARTdrv->Initialize(myUSART_callback);
+
/*Power up the USART peripheral */
+
USARTdrv->PowerControl(ARM_POWER_FULL);
+
/*Configure the USART to 4800 Bits/sec */
+
USARTdrv->Control(ARM_USART_MODE_ASYNCHRONOUS |
+
ARM_USART_DATA_BITS_8 |
+
ARM_USART_PARITY_NONE |
+
ARM_USART_STOP_BITS_1 |
+
ARM_USART_FLOW_CONTROL_NONE, 4800);
+
+
/* Enable Receiver and Transmitter lines */
+
USARTdrv->Control (ARM_USART_CONTROL_TX, 1);
+
USARTdrv->Control (ARM_USART_CONTROL_RX, 1);
+
+
USARTdrv->Send("\nPress Enter to receive a message", 34);
+
osSignalWait(0x01, osWaitForever);
+
+
while (1)
+
{
+
USARTdrv->Receive(&cmd, 1); /* Get byte from UART */
+
osSignalWait(0x01, osWaitForever);
+
if (cmd == 13) /* CR, send greeting */
+
{
+
USARTdrv->Send("\nHello World!", 12);
+
osSignalWait(0x01, osWaitForever);
+
}
+
+
}
+
}
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_USART
+
+

Access structure of the USART Driver.

+

The functions of the USART driver are accessed by function pointers exposed by this structure. Refer to Common Driver Functions for overview information.

+

Each instance of an USART interface provides such an access structure. The instance is identified by a postfix number in the symbol name of the access structure, for example:

+
    +
  • Driver_USART0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_USART1 is the name of the access struct of the second instance (no. 1).
    • +
+

A middleware configuration setting allows connecting the middleware to a specific driver instance Driver_USARTn. The default is 0, which connects a middleware to the first instance of a driver.

+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_USART_GetVersion : Get driver version. More...
 
ARM_USART_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_USART_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_USART_SignalEvent_t cb_event)
 Pointer to ARM_USART_Initialize : Initialize USART Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_USART_Uninitialize : De-initialize USART Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_USART_PowerControl : Control USART Interface Power. More...
 
int32_t(* Send )(const void *data, uint32_t num)
 Pointer to ARM_USART_Send : Start sending data to USART transmitter. More...
 
int32_t(* Receive )(void *data, uint32_t num)
 Pointer to ARM_USART_Receive : Start receiving data from USART receiver. More...
 
int32_t(* Transfer )(const void *data_out, void *data_in, uint32_t num)
 Pointer to ARM_USART_Transfer : Start sending/receiving data to/from USART. More...
 
uint32_t(* GetTxCount )(void)
 Pointer to ARM_USART_GetTxCount : Get transmitted data count. More...
 
uint32_t(* GetRxCount )(void)
 Pointer to ARM_USART_GetRxCount : Get received data count. More...
 
int32_t(* Control )(uint32_t control, uint32_t arg)
 Pointer to ARM_USART_Control : Control USART Interface. More...
 
ARM_USART_STATUS(* GetStatus )(void)
 Pointer to ARM_USART_GetStatus : Get USART status. More...
 
int32_t(* SetModemControl )(ARM_USART_MODEM_CONTROL control)
 Pointer to ARM_USART_SetModemControl : Set USART Modem Control line state. More...
 
ARM_USART_MODEM_STATUS(* GetModemStatus )(void)
 Pointer to ARM_USART_GetModemStatus : Get USART Modem Status lines state. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_USART_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_USART_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_USART_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_USART_SignalEvent_t cb_event)
+
+ +

Pointer to ARM_USART_Initialize : Initialize USART Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_USART_Uninitialize : De-initialize USART Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_USART_PowerControl : Control USART Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* Send)(const void *data, uint32_t num)
+
+ +

Pointer to ARM_USART_Send : Start sending data to USART transmitter.

+ +
+
+ +
+
+ + + + +
int32_t(* Receive)(void *data, uint32_t num)
+
+ +

Pointer to ARM_USART_Receive : Start receiving data from USART receiver.

+ +
+
+ +
+
+ + + + +
int32_t(* Transfer)(const void *data_out, void *data_in, uint32_t num)
+
+ +

Pointer to ARM_USART_Transfer : Start sending/receiving data to/from USART.

+ +
+
+ +
+
+ + + + +
uint32_t(* GetTxCount)(void)
+
+ +

Pointer to ARM_USART_GetTxCount : Get transmitted data count.

+ +
+
+ +
+
+ + + + +
uint32_t(* GetRxCount)(void)
+
+ +

Pointer to ARM_USART_GetRxCount : Get received data count.

+ +
+
+ +
+
+ + + + +
int32_t(* Control)(uint32_t control, uint32_t arg)
+
+ +

Pointer to ARM_USART_Control : Control USART Interface.

+ +
+
+ +
+
+ + + + +
ARM_USART_STATUS(* GetStatus)(void)
+
+ +

Pointer to ARM_USART_GetStatus : Get USART status.

+ +
+
+ +
+
+ + + + +
int32_t(* SetModemControl)(ARM_USART_MODEM_CONTROL control)
+
+ +

Pointer to ARM_USART_SetModemControl : Set USART Modem Control line state.

+ +
+
+ +
+
+ + + + +
ARM_USART_MODEM_STATUS(* GetModemStatus)(void)
+
+ +

Pointer to ARM_USART_GetModemStatus : Get USART Modem Status lines state.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_USART_CAPABILITIES
+
+

USART Device Driver Capabilities.

+

An USART driver can be implemented with different capabilities. The data fields of this structure encode the capabilities implemented by this driver.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +asynchronous: 1 +supports UART (Asynchronous) mode
+uint32_t +synchronous_master: 1 +supports Synchronous Master mode
+uint32_t +synchronous_slave: 1 +supports Synchronous Slave mode
+uint32_t +single_wire: 1 +supports UART Single-wire mode
+uint32_t +irda: 1 +supports UART IrDA mode
+uint32_t +smart_card: 1 +supports UART Smart Card mode
+uint32_t +smart_card_clock: 1 +Smart Card Clock generator available.
+uint32_t +flow_control_rts: 1 +RTS Flow Control available.
+uint32_t +flow_control_cts: 1 +CTS Flow Control available.
+uint32_t +event_tx_complete: 1 +Transmit completed event: ARM_USART_EVENT_TX_COMPLETE.
+uint32_t +event_rx_timeout: 1 +Signal receive character timeout event: ARM_USART_EVENT_RX_TIMEOUT.
+uint32_t +rts: 1 +RTS Line: 0=not available, 1=available.
+uint32_t +cts: 1 +CTS Line: 0=not available, 1=available.
+uint32_t +dtr: 1 +DTR Line: 0=not available, 1=available.
+uint32_t +dsr: 1 +DSR Line: 0=not available, 1=available.
+uint32_t +dcd: 1 +DCD Line: 0=not available, 1=available.
+uint32_t +ri: 1 +RI Line: 0=not available, 1=available.
+uint32_t +event_cts: 1 +Signal CTS change event: ARM_USART_EVENT_CTS.
+uint32_t +event_dsr: 1 +Signal DSR change event: ARM_USART_EVENT_DSR.
+uint32_t +event_dcd: 1 +Signal DCD change event: ARM_USART_EVENT_DCD.
+uint32_t +event_ri: 1 +Signal RI change event: ARM_USART_EVENT_RI.
+uint32_t +reserved: 11 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_USART_STATUS
+
+

USART Status.

+

Structure with information about the status of the USART. The data fields encode busy flags and error flags.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +tx_busy: 1 +Transmitter busy flag.
+uint32_t +rx_busy: 1 +Receiver busy flag.
+uint32_t +tx_underflow: 1 +Transmit data underflow detected (cleared on start of next send operation)
+uint32_t +rx_overflow: 1 +Receive data overflow detected (cleared on start of next receive operation)
+uint32_t +rx_break: 1 +Break detected on receive (cleared on start of next receive operation)
+uint32_t +rx_framing_error: 1 +Framing error detected on receive (cleared on start of next receive operation)
+uint32_t +rx_parity_error: 1 +Parity error detected on receive (cleared on start of next receive operation)
+uint32_t +reserved: 25 +
+ +
+
+ +
+
+ + + + +
struct ARM_USART_MODEM_STATUS
+
+

USART Modem Status.

+

Structure with information about the status of modem lines. The data fields encode states of modem status lines.

+

Returned by:

+ +
+ + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +cts: 1 +CTS state: 1=Active, 0=Inactive.
+uint32_t +dsr: 1 +DSR state: 1=Active, 0=Inactive.
+uint32_t +dcd: 1 +DCD state: 1=Active, 0=Inactive.
+uint32_t +ri: 1 +RI state: 1=Active, 0=Inactive.
+uint32_t +reserved: 28 +
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_USART_SignalEvent_t
+
+ +

Pointer to ARM_USART_SignalEvent : Signal USART Event.

+

Provides the typedef for the callback function ARM_USART_SignalEvent.

+

Parameter for:

+ + +
+
+

Enumeration Type Documentation

+ +
+
+ + + + +
enum ARM_USART_MODEM_CONTROL
+
+ +

USART Modem Control.

+

Specifies values for controlling the modem control lines.

+

Parameter for:

+ + + + + + +
Enumerator
ARM_USART_RTS_CLEAR  +

Deactivate RTS.

+
ARM_USART_RTS_SET  +

Activate RTS.

+
ARM_USART_DTR_CLEAR  +

Deactivate DTR.

+
ARM_USART_DTR_SET  +

Activate DTR.

+
+ +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_USART_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_USART_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_USART Driver_USART0;
+
ARM_DRIVER_USART *drv_info;
+
+
void setup_usart (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_USART0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_USART_CAPABILITIES ARM_USART_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_USART_CAPABILITIES
+

The function ARM_USART_GetCapabilities returns information about capabilities in this driver implementation. The data fields of the structure ARM_USART_CAPABILITIES encode various capabilities, for example supported modes, if a hardware is capable to create signal events using the ARM_USART_SignalEvent callback function ...

+

Example:

+
extern ARM_DRIVER_USART Driver_USART0;
+
ARM_DRIVER_USART *drv_info;
+
+
void read_capabilities (void) {
+
ARM_USART_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_USART0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_USART_Initialize (ARM_USART_SignalEvent_t cb_event)
+
+ +

Initialize USART Interface.

+
Parameters
+ + +
[in]cb_eventPointer to ARM_USART_SignalEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_USART_Initialize initializes the USART interface. It is called when the middleware component starts operation.

+

The function performs the following operations:

+
    +
  • Initializes the resources needed for the USART interface.
    • +
  • Registers the ARM_USART_SignalEvent callback function.
    • +
+

The parameter cb_event is a pointer to the ARM_USART_SignalEvent callback function; use a NULL pointer when no callback signals are required.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USART_Uninitialize (void )
+
+ +

De-initialize USART Interface.

+
Returns
Status Error Codes
+

The function ARM_USART_Uninitialize de-initializes the resources of USART interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USART_PowerControl (ARM_POWER_STATE state)
+
+ +

Control USART Interface Power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_USART_PowerControl operates the power modes of the USART interface.

+

The parameter state sets the operation and can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_USART_Send (const void * data,
uint32_t num 
)
+
+ +

Start sending data to USART transmitter.

+
Parameters
+ + + +
[in]dataPointer to buffer with data to send to USART transmitter
[in]numNumber of data items to send
+
+
+
Returns
Status Error Codes
+

This functions ARM_USART_Send is used in asynchronous mode to send data to the USART transmitter. It can also be used in synchronous mode when sending data only (received data is ignored).

+

Transmitter needs to be enabled by calling ARM_USART_Control with ARM_USART_CONTROL_TX as the control parameter and 1 as argument.

+

The function parameters specify the buffer with data and the number of items to send. The item size is defined by the data type which depends on the configured number of data bits.

+

Data type is:

+
    +
  • uint8_t when configured for 5..8 data bits
    • +
  • uint16_t when configured for 9 data bits
    • +
+

Calling the function ARM_USART_Send only starts the send operation. The function is non-blocking and returns as soon as the driver has started the operation (driver typically configures DMA or the interrupt system for continuous transfer). When in synchronous slave mode the operation is only registered and started when the master starts the transfer. During the operation it is not allowed to call this function again or any other data transfer function when in synchronous mode. Also the data buffer must stay allocated and the contents of unsent data must not be modified. When send operation is completed (requested number of items sent) the ARM_USART_EVENT_SEND_COMPLETE event is generated. Progress of send operation can also be monitored by reading the number of items already sent by calling ARM_USART_GetTxCount.

+

After send operation has completed there might still be some data left in the driver's hardware buffer which is still being transmitted. When all data has been physically transmitted the ARM_USART_EVENT_TX_COMPLETE event is generated (if supported and reported by event_tx_complete in ARM_USART_CAPABILITIES). At that point also the tx_busy data field in ARM_USART_STATUS is cleared.

+

Status of the transmitter can be monitored by calling the ARM_USART_GetStatus and checking the tx_busy flag which indicates if transmission is still in progress.

+

When in synchronous slave mode and transmitter is enabled but send/receive/transfer operation is not started and data is requested by the master then the ARM_USART_EVENT_TX_UNDERFLOW event is generated.

+

Send operation can be aborted by calling ARM_USART_Control with ARM_USART_ABORT_SEND as the control parameter.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_USART_Receive (void * data,
uint32_t num 
)
+
+ +

Start receiving data from USART receiver.

+
Parameters
+ + + +
[out]dataPointer to buffer for data to receive from USART receiver
[in]numNumber of data items to receive
+
+
+
Returns
Status Error Codes
+

This functions ARM_USART_Receive is used in asynchronous mode to receive data from the USART receiver. It can also be used in synchronous mode when receiving data only (transmits the default value as specified by ARM_USART_Control with ARM_USART_SET_DEFAULT_TX_VALUE as control parameter).

+

Receiver needs to be enabled by calling ARM_USART_Control with ARM_USART_CONTROL_RX as the control parameter and 1 as argument.

+

The function parameters specify the buffer for data and the number of items to receive. The item size is defined by the data type which depends on the configured number of data bits.

+

Data type is:

+
    +
  • uint8_t when configured for 5..8 data bits
    • +
  • uint16_t when configured for 9 data bits
    • +
+

Calling the function ARM_USART_Receive only starts the receive operation. The function is non-blocking and returns as soon as the driver has started the operation (driver typically configures DMA or the interrupt system for continuous transfer). When in synchronous slave mode the operation is only registered and started when the master starts the transfer. During the operation it is not allowed to call this function again or any other data transfer function when in synchronous mode. Also the data buffer must stay allocated. When receive operation is completed (requested number of items received) the ARM_USART_EVENT_RECEIVE_COMPLETE event is generated. Progress of receive operation can also be monitored by reading the number of items already received by calling ARM_USART_GetRxCount.

+

Status of the receiver can be monitored by calling the ARM_USART_GetStatus and checking the rx_busy flag which indicates if reception is still in progress.

+

During reception the following events can be generated (in asynchronous mode):

+ +

ARM_USART_EVENT_RX_OVERFLOW event is also generated when receiver is enabled but data is lost because receive operation in asynchronous mode or receive/send/transfer operation in synchronous slave mode has not been started.

+

Receive operation can be aborted by calling ARM_USART_Control with ARM_USART_ABORT_RECEIVE as the control parameter.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_USART_Transfer (const void * data_out,
void * data_in,
uint32_t num 
)
+
+ +

Start sending/receiving data to/from USART transmitter/receiver.

+
Parameters
+ + + + +
[in]data_outPointer to buffer with data to send to USART transmitter
[out]data_inPointer to buffer for data to receive from USART receiver
[in]numNumber of data items to transfer
+
+
+
Returns
Status Error Codes
+

This functions ARM_USART_Transfer is used in synchronous mode to transfer data via USART. It synchronously sends data to the USART transmitter and receives data from the USART receiver.

+

Transmitter needs to be enabled by calling ARM_USART_Control with ARM_USART_CONTROL_TX as the control parameter and 1 as argument. Receiver needs to be enabled by calling ARM_USART_Control with ARM_USART_CONTROL_RX as the control parameter and 1 as argument.

+

The function parameters specify the buffer with data to send, the buffer for data to receive and the number of items to transfer. The item size is defined by the data type which depends on the configured number of data bits.

+

Data type is:

+
    +
  • uint8_t when configured for 5..8 data bits
    • +
  • uint16_t when configured for 9 data bits
    • +
+

Calling the function ARM_USART_Transfer only starts the transfer operation. The function is non-blocking and returns as soon as the driver has started the operation (driver typically configures DMA or the interrupt system for continuous transfer). When in synchronous slave mode the operation is only registered and started when the master starts the transfer. During the operation it is not allowed to call this function or any other data transfer function again. Also the data buffers must stay allocated and the contents of unsent data must not be modified. When transfer operation is completed (requested number of items transferred) the ARM_USART_EVENT_TRANSFER_COMPLETE event is generated. Progress of transfer operation can also be monitored by reading the number of items already transferred by calling ARM_USART_GetTxCount or ARM_USART_GetRxCount.

+

Status of the transmitter or receiver can be monitored by calling the ARM_USART_GetStatus and checking the tx_busy or rx_busy flag.

+

When in synchronous slave mode also the following events can be generated:

+ +

Transfer operation can also be aborted by calling ARM_USART_Control with ARM_USART_ABORT_TRANSFER as the control parameter.

+ +
+
+ +
+
+ + + + + + + + +
uint32_t ARM_USART_GetTxCount (void )
+
+ +

Get transmitted data count.

+
Returns
number of data items transmitted
+

The function ARM_USART_GetTxCount returns the number of the currently transmitted data items during ARM_USART_Send and ARM_USART_Transfer operation.

+ +
+
+ +
+
+ + + + + + + + +
uint32_t ARM_USART_GetRxCount (void )
+
+ +

Get received data count.

+
Returns
number of data items received
+

The function ARM_USART_GetRxCount returns the number of the currently received data items during ARM_USART_Receive and ARM_USART_Transfer operation.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_USART_Control (uint32_t control,
uint32_t arg 
)
+
+ +

Control USART Interface.

+
Parameters
+ + + +
[in]controlOperation
[in]argArgument of operation (optional)
+
+
+
Returns
common Status Error Codes and driver specific Status Error Codes
+

The function ARM_USART_Control control the USART interface settings and execute various operations.

+

The parameter control sets the operation and is explained in the table below. Values from different categories can be ORed with the exception of Miscellaneous Operations.

+

The parameter arg provides, depending on the operation, additional information, for example the baudrate.

+

The table lists the available control operations.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Parameter control Bit Category Description
ARM_USART_MODE_ASYNCHRONOUS 0..7 Operation Mode Set to asynchronous UART mode. arg specifies baudrate.
ARM_USART_MODE_SYNCHRONOUS_MASTER Set to synchronous master mode with clock signal generation. arg specifies baudrate.
ARM_USART_MODE_SYNCHRONOUS_SLAVE Set to synchronous slave mode with external clock signal.
ARM_USART_MODE_SINGLE_WIRE Set to single-wire (half-duplex) mode. arg specifies baudrate.
ARM_USART_MODE_IRDA Set to Infra-red data mode. arg specifies baudrate.
ARM_USART_MODE_SMART_CARD Set to Smart Card mode. arg specifies baudrate.
ARM_USART_DATA_BITS_5 8..11 Data Bits Set to 5 data bits
ARM_USART_DATA_BITS_6 Set to 6 data bits
ARM_USART_DATA_BITS_7 Set to 7 data bits
ARM_USART_DATA_BITS_8 Set to 8 data bits (default)
ARM_USART_DATA_BITS_9 Set to 9 data bits
ARM_USART_PARITY_EVEN 12..13 Parity Bit Set to Even Parity
ARM_USART_PARITY_NONE Set to No Parity (default)
ARM_USART_PARITY_ODD Set to Odd Parity
ARM_USART_STOP_BITS_1 14..15 Stop Bit Set to 1 Stop bit (default)
ARM_USART_STOP_BITS_2 Set to 2 Stop bits
ARM_USART_STOP_BITS_1_5 Set to 1.5 Stop bits
ARM_USART_STOP_BITS_0_5 Set to 0.5 Stop bits
ARM_USART_FLOW_CONTROL_NONE 16..17 Flow Control No flow control signal (default)
ARM_USART_FLOW_CONTROL_CTS Set to use the CTS flow control signal
ARM_USART_FLOW_CONTROL_RTS Set to use the RTS flow control signal
ARM_USART_FLOW_CONTROL_RTS_CTS Set to use the RTS and CTS flow control signal
ARM_USART_CPOL0 18 Clock Polarity CPOL=0 (default) : data are captured on rising edge (low->high transition)
ARM_USART_CPOL1 CPOL=1 : data are captured on falling edge (high->lowh transition)
ARM_USART_CPHA0 19 Clock Phase CPHA=0 (default) : sample on first (leading) edge
ARM_USART_CPHA1 CPHA=1 : sample on second (trailing) edge
ARM_USART_ABORT_RECEIVE 0..19 Miscellaneous Operations
+(cannot be ORed) 		Abort receive operation (see also: ARM_USART_Receive)
ARM_USART_ABORT_SEND Abort send operation (see also: ARM_USART_Send)
ARM_USART_ABORT_TRANSFER Abort transfer operation (see also: ARM_USART_Transfer)
ARM_USART_CONTROL_BREAK Enable or disable continuous Break transmission; arg : 0=disabled; 1=enabled
ARM_USART_CONTROL_RX Enable or disable receiver; arg : 0=disabled; 1=enabled (see also: ARM_USART_Receive; ARM_USART_Transfer)
ARM_USART_CONTROL_SMART_CARD_NACK Enable or disable Smart Card NACK generation; arg : 0=disabled; 1=enabled
ARM_USART_CONTROL_TX Enable or disable transmitter; arg : 0=disabled; 1=enabled (see also: ARM_USART_Send; ARM_USART_Transfer)
ARM_USART_SET_DEFAULT_TX_VALUE Set the default transmit value (synchronous receive only); arg specifies the value. (see also: ARM_USART_Receive)
ARM_USART_SET_IRDA_PULSE Set the IrDA pulse value in ns; arg : 0=3/16 of bit period
ARM_USART_SET_SMART_CARD_CLOCK Set the Smart Card Clock in Hz; arg : 0=Clock not set
ARM_USART_SET_SMART_CARD_GUARD_TIME Set the Smart Card guard time; arg = number of bit periods
+

Example

+
extern ARM_DRIVER_USART Driver_USART0;
+
+
// configure to UART mode: 8 bits, no parity, 1 stop bit, no flow control, 9600 bps
+
status = Driver_USART0.Control(ARM_USART_MODE_ASYNCHRONOUS |
+
ARM_USART_DATA_BITS_8 |
+
ARM_USART_PARITY_NONE |
+
ARM_USART_STOP_BITS_1 |
+
ARM_USART_FLOW_CONTROL_NONE, 9600);
+
+
// identical with above settings (default settings removed)
+
// configure to UART mode: 8 bits, no parity, 1 stop bit, flow control, 9600 bps
+
status = Driver_USART0.Control(ARM_USART_MODE_ASYNCHRONOUS, 9600);
+
+
// enable TX output
+
status = Driver_USART0.Control(ARM_USART_CONTROL_TX, 1);
+
+
// disable RX output
+
status = Driver_USART0.Control(ARM_USART_CONTROL_RX, 0);
+
+
+
+ +
+
+ + + + + + + + +
ARM_USART_STATUS ARM_USART_GetStatus (void )
+
+ +

Get USART status.

+
Returns
USART status ARM_USART_STATUS
+

The function ARM_USART_GetStatus retrieves the current USART interface status.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USART_SetModemControl (ARM_USART_MODEM_CONTROL control)
+
+ +

Set USART Modem Control line state.

+
Parameters
+ + +
[in]controlARM_USART_MODEM_CONTROL
+
+
+
Returns
Status Error Codes
+

The function ARM_USART_SetModemControl activates or deactivates the selected USART modem control line.

+

The function ARM_USART_GetModemStatus returns information about status of the modem lines.

+ +
+
+ +
+
+ + + + + + + + +
ARM_USART_MODEM_STATUS ARM_USART_GetModemStatus (void )
+
+ +

Get USART Modem Status lines state.

+
Returns
modem status ARM_USART_MODEM_STATUS
+

The function ARM_USART_GetModemStatus returns the current USART Modem Status lines state.

+

The function ARM_USART_SetModemControl sets the modem control lines of the USART.

+ +
+
+ +
+
+ + + + + + + + +
void ARM_USART_SignalEvent (uint32_t event)
+
+ +

Signal USART Events.

+
Parameters
+ + +
[in]eventUSART Events notification mask
+
+
+
Returns
none
+

The function ARM_USART_SignalEvent is a callback function registered by the function ARM_USART_Initialize.

+

The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the data fields of the structure ARM_USART_CAPABILITIES, which can be retrieved with the function ARM_USART_GetCapabilities.

+

The following events can be generated:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Parameter event Bit Description supported when ARM_USART_CAPABILITIES
ARM_USART_EVENT_SEND_COMPLETE 0 Occurs after call to ARM_USART_Send to indicate that all the data to be sent was processed by the driver. All the data might have been already transmitted or parts of it are still queued in transmit buffers. The driver is ready for the next call to ARM_USART_Send; however USART may still transmit data. allways supported
ARM_USART_EVENT_RECEIVE_COMPLETE 1 Occurs after call to ARM_USART_Receive to indicate that all the data has been received. The driver is ready for the next call to ARM_USART_Receive. allways supported
ARM_USART_EVENT_TRANSFER_COMPLETE 2 Occurs after call to ARM_USART_Transfer to indicate that all the data has been transferred. The driver is ready for the next call to ARM_USART_Transfer. allways supported
ARM_USART_EVENT_TX_COMPLETE 3 Occurs after call to ARM_USART_Transfer to indicate that all the data has been transferred. The driver is ready for the next call to ARM_USART_Transfer. data field event_tx_complete = 1
ARM_USART_EVENT_TX_UNDERFLOW 4 Occurs in synchronous slave mode when data is requested by the master but send/receive/transfer operation has not been started. Data field rx_underflow = 1 of ARM_USART_STATUS. allways supported
ARM_USART_EVENT_RX_OVERFLOW 5 Occurs when data is lost during receive/transfer operation or when data is lost because receive operation in asynchronous mode or receive/send/transfer operation in synchronous slave mode has not been started. Data field rx_overflow = 1 of ARM_USART_STATUS. allways supported
ARM_USART_EVENT_RX_TIMEOUT 6 Occurs during receive when idle time is detected between consecutive characters (idle time is hardware dependent). data field event_rx_timeout = 1
ARM_USART_EVENT_RX_BREAK 7 Occurs when break is detected during receive. Data field rx_break = 1 of ARM_USART_STATUS. allways supported
ARM_USART_EVENT_RX_FRAMING_ERROR 8 Occurs when framing error is detected during receive. Data field rx_framing_error = 1 of ARM_USART_STATUS. allways supported
ARM_USART_EVENT_RX_PARITY_ERROR 9 Occurs when parity error is detected during receive. Data field rx_parity_error = 1 of ARM_USART_STATUS. allways supported
ARM_USART_EVENT_CTS 10 Indicates that CTS modem line state has changed. Data field cts = 1 of ARM_USART_MODEM_STATUS. data field event_cts = 1 and
+ data field cts = 1
ARM_USART_EVENT_CTS 11 Indicates that DSR modem line state has changed. Data field dsr = 1 of ARM_USART_MODEM_STATUS. data field event_dsr = 1 and
+ data field dsr = 1
ARM_USART_EVENT_DCD 12 Indicates that DCD modem line state has changed. Data field dcd = 1 of ARM_USART_MODEM_STATUS. data field event_dcd = 1 and
+ data field dcd = 1
ARM_USART_EVENT_RI 13 Indicates that RI modem line state has changed. Data field ri = 1 of ARM_USART_MODEM_STATUS. data field event_ri = 1 and
+ data field ri = 1
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__interface__gr.js b/docs/Driver/html/group__usart__interface__gr.js new file mode 100644 index 0000000..570b1b6 --- /dev/null +++ b/docs/Driver/html/group__usart__interface__gr.js @@ -0,0 +1,85 @@ +var group__usart__interface__gr = +[ + [ "Status Error Codes", "group__usart__execution__status.html", "group__usart__execution__status" ], + [ "USART Events", "group__USART__events.html", "group__USART__events" ], + [ "USART Control Codes", "group__USART__control.html", "group__USART__control" ], + [ "ARM_DRIVER_USART", "group__usart__interface__gr.html#structARM__DRIVER__USART", [ + [ "GetVersion", "group__usart__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__usart__interface__gr.html#a9cec078ea816ece7b2d989f35caadb12", null ], + [ "Initialize", "group__usart__interface__gr.html#a1a68601c09df8d37f3500ad373333962", null ], + [ "Uninitialize", "group__usart__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__usart__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "Send", "group__usart__interface__gr.html#a44eedddf4428cf4b98883b6c27d31922", null ], + [ "Receive", "group__usart__interface__gr.html#adb9224a35fe16c92eb0dd103638e4cf3", null ], + [ "Transfer", "group__usart__interface__gr.html#ad88b63ed74c03ba06b0599ab06ad4cf7", null ], + [ "GetTxCount", "group__usart__interface__gr.html#a0b28b2c21016702f50c28655653099df", null ], + [ "GetRxCount", "group__usart__interface__gr.html#a758c7822edf6ac18f82eb33c9dc09d71", null ], + [ "Control", "group__usart__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "GetStatus", "group__usart__interface__gr.html#a055ad4095356a022886828009a980316", null ], + [ "SetModemControl", "group__usart__interface__gr.html#af6703d4078818df27ab9f8a7a8ad7b7b", null ], + [ "GetModemStatus", "group__usart__interface__gr.html#a517a7a98a444126734782beb4951a9db", null ] + ] ], + [ "ARM_USART_CAPABILITIES", "group__usart__interface__gr.html#structARM__USART__CAPABILITIES", [ + [ "asynchronous", "group__usart__interface__gr.html#a75ba2507ea29601a309393e794f4413d", null ], + [ "synchronous_master", "group__usart__interface__gr.html#afb385bfd9fb2d714bb58aa7d8d9d7d51", null ], + [ "synchronous_slave", "group__usart__interface__gr.html#a37dcd87df8762e2bc9af9fea368b1537", null ], + [ "single_wire", "group__usart__interface__gr.html#ad1928b61021dd9ff689a3ccf9b8966a8", null ], + [ "irda", "group__usart__interface__gr.html#a9a72c5f0209a9ccf840fc196e9a9dffa", null ], + [ "smart_card", "group__usart__interface__gr.html#aa78e1ee1726d1db2cfa83fd7b5acc8bd", null ], + [ "smart_card_clock", "group__usart__interface__gr.html#a7b3c14ea1b5e9ba0a37ebc05fcfd51a6", null ], + [ "flow_control_rts", "group__usart__interface__gr.html#a1d55dd339a08293018608775fc8b4859", null ], + [ "flow_control_cts", "group__usart__interface__gr.html#a287da15773bb24a301cbfd806975e1e9", null ], + [ "event_tx_complete", "group__usart__interface__gr.html#a0190aabe8d8f59176be8d693f8874fb3", null ], + [ "event_rx_timeout", "group__usart__interface__gr.html#afe469796cfca4ea61bd6181afb4916be", null ], + [ "rts", "group__usart__interface__gr.html#afad044722f459552e9f0f602983659e9", null ], + [ "cts", "group__usart__interface__gr.html#a0a4ccfb729b3a40a5fd611021268c262", null ], + [ "dtr", "group__usart__interface__gr.html#aa3cc092c82fdc3e5e6646460be6ae9fd", null ], + [ "dsr", "group__usart__interface__gr.html#a437895b17519a16f920ae07461dd67d2", null ], + [ "dcd", "group__usart__interface__gr.html#aa56a9ad6e266df78157f0e04feb4b78c", null ], + [ "ri", "group__usart__interface__gr.html#aa6cf03b82235bedc0acf00acb46130fb", null ], + [ "event_cts", "group__usart__interface__gr.html#a4ebe5ddec8d99a63843f2a3c70ac85f9", null ], + [ "event_dsr", "group__usart__interface__gr.html#aefdb61f16498d650b5a7f5f9b62779df", null ], + [ "event_dcd", "group__usart__interface__gr.html#a7c1dd043d0db9738d6b5fa8d89211446", null ], + [ "event_ri", "group__usart__interface__gr.html#ab55f90aec5f909ff3a75bf36e61312ea", null ], + [ "reserved", "group__usart__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_USART_STATUS", "group__usart__interface__gr.html#structARM__USART__STATUS", [ + [ "tx_busy", "group__usart__interface__gr.html#a2c6d2b67fba3f3e084e96a6bc7fcac6b", null ], + [ "rx_busy", "group__usart__interface__gr.html#a9f5baee58ed41b382628a82a0b1cbcb4", null ], + [ "tx_underflow", "group__usart__interface__gr.html#a048f45e9d2257a21821f81d9edd17b72", null ], + [ "rx_overflow", "group__usart__interface__gr.html#ac403aefd9bce8b0172e1996c0f3dd8aa", null ], + [ "rx_break", "group__usart__interface__gr.html#aa5e3fa74f444688f9e727ffc1e988e5d", null ], + [ "rx_framing_error", "group__usart__interface__gr.html#af1d1cfd8b231843d5cc23e6a2b1ca8d0", null ], + [ "rx_parity_error", "group__usart__interface__gr.html#affb21b610e2d0d71727702441c238f4f", null ], + [ "reserved", "group__usart__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_USART_MODEM_STATUS", "group__usart__interface__gr.html#structARM__USART__MODEM__STATUS", [ + [ "cts", "group__usart__interface__gr.html#a0a4ccfb729b3a40a5fd611021268c262", null ], + [ "dsr", "group__usart__interface__gr.html#a437895b17519a16f920ae07461dd67d2", null ], + [ "dcd", "group__usart__interface__gr.html#aa56a9ad6e266df78157f0e04feb4b78c", null ], + [ "ri", "group__usart__interface__gr.html#aa6cf03b82235bedc0acf00acb46130fb", null ], + [ "reserved", "group__usart__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_USART_SignalEvent_t", "group__usart__interface__gr.html#gaa578c3829eea207e9e48df6cb6f038a1", null ], + [ "ARM_USART_MODEM_CONTROL", "group__usart__interface__gr.html#ga7b89d709f048b6a956aa211f63e75f6f", [ + [ "ARM_USART_RTS_CLEAR", "Driver__USART_8h.html#ga7b89d709f048b6a956aa211f63e75f6fab4d04e682d04f70c6aeba130656d3ec6", null ], + [ "ARM_USART_RTS_SET", "Driver__USART_8h.html#ga7b89d709f048b6a956aa211f63e75f6fa7f9d445e6e56642c4c4251a00bfa7434", null ], + [ "ARM_USART_DTR_CLEAR", "Driver__USART_8h.html#ga7b89d709f048b6a956aa211f63e75f6fa3ad44ce9f16c136ccad45c09ec65cb4c", null ], + [ "ARM_USART_DTR_SET", "Driver__USART_8h.html#ga7b89d709f048b6a956aa211f63e75f6fab938a21e1b59a2b92424e2521b9469d4", null ] + ] ], + [ "ARM_USART_GetVersion", "group__usart__interface__gr.html#gabca6151cef47565832decaf484781b61", null ], + [ "ARM_USART_GetCapabilities", "group__usart__interface__gr.html#gad2d3ace1fe7627bb72945efefaeddf0a", null ], + [ "ARM_USART_Initialize", "group__usart__interface__gr.html#ga51f06805e9a6197c553fa9513ac7b9d6", null ], + [ "ARM_USART_Uninitialize", "group__usart__interface__gr.html#ga96f31f07a6721cf75de2a7a0ab723d26", null ], + [ "ARM_USART_PowerControl", "group__usart__interface__gr.html#ga9bad012b28d544f3eeeea9c2f71a4086", null ], + [ "ARM_USART_Send", "group__usart__interface__gr.html#ga5cf758b0b9d03dca68846962f73c0b08", null ], + [ "ARM_USART_Receive", "group__usart__interface__gr.html#gae9efabdabb5aaa17bce83339f8a58803", null ], + [ "ARM_USART_Transfer", "group__usart__interface__gr.html#ga878899928d34a818edd3e97d67b65c2a", null ], + [ "ARM_USART_GetTxCount", "group__usart__interface__gr.html#gacb355584bcdf4ebd36f11d945800fa03", null ], + [ "ARM_USART_GetRxCount", "group__usart__interface__gr.html#ga1a8799aeeba1363a9e5d22bada715a29", null ], + [ "ARM_USART_Control", "group__usart__interface__gr.html#gad8ffdde2123b5412de3005c456da677d", null ], + [ "ARM_USART_GetStatus", "group__usart__interface__gr.html#ga1e8fdd54294b587438b2b72f4dbde004", null ], + [ "ARM_USART_SetModemControl", "group__usart__interface__gr.html#gad8eb0eb1d1c24fc725584ab93214cfc7", null ], + [ "ARM_USART_GetModemStatus", "group__usart__interface__gr.html#ga198af0d6a7c85b7c0b96f3d9db8c34e0", null ], + [ "ARM_USART_SignalEvent", "group__usart__interface__gr.html#gad796cd023f8f6300a6caadcc39d43cbf", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__interface__gr_structARM__DRIVER__USART.js b/docs/Driver/html/group__usart__interface__gr_structARM__DRIVER__USART.js new file mode 100644 index 0000000..b0b32b9 --- /dev/null +++ b/docs/Driver/html/group__usart__interface__gr_structARM__DRIVER__USART.js @@ -0,0 +1,17 @@ +var group__usart__interface__gr_structARM__DRIVER__USART = +[ + [ "GetVersion", "group__usart__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__usart__interface__gr.html#a9cec078ea816ece7b2d989f35caadb12", null ], + [ "Initialize", "group__usart__interface__gr.html#a1a68601c09df8d37f3500ad373333962", null ], + [ "Uninitialize", "group__usart__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__usart__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "Send", "group__usart__interface__gr.html#a44eedddf4428cf4b98883b6c27d31922", null ], + [ "Receive", "group__usart__interface__gr.html#adb9224a35fe16c92eb0dd103638e4cf3", null ], + [ "Transfer", "group__usart__interface__gr.html#ad88b63ed74c03ba06b0599ab06ad4cf7", null ], + [ "GetTxCount", "group__usart__interface__gr.html#a0b28b2c21016702f50c28655653099df", null ], + [ "GetRxCount", "group__usart__interface__gr.html#a758c7822edf6ac18f82eb33c9dc09d71", null ], + [ "Control", "group__usart__interface__gr.html#a6e0f47a92f626a971c5197fca6545505", null ], + [ "GetStatus", "group__usart__interface__gr.html#a055ad4095356a022886828009a980316", null ], + [ "SetModemControl", "group__usart__interface__gr.html#af6703d4078818df27ab9f8a7a8ad7b7b", null ], + [ "GetModemStatus", "group__usart__interface__gr.html#a517a7a98a444126734782beb4951a9db", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__interface__gr_structARM__USART__CAPABILITIES.js b/docs/Driver/html/group__usart__interface__gr_structARM__USART__CAPABILITIES.js new file mode 100644 index 0000000..29fb1f2 --- /dev/null +++ b/docs/Driver/html/group__usart__interface__gr_structARM__USART__CAPABILITIES.js @@ -0,0 +1,25 @@ +var group__usart__interface__gr_structARM__USART__CAPABILITIES = +[ + [ "asynchronous", "group__usart__interface__gr.html#a75ba2507ea29601a309393e794f4413d", null ], + [ "synchronous_master", "group__usart__interface__gr.html#afb385bfd9fb2d714bb58aa7d8d9d7d51", null ], + [ "synchronous_slave", "group__usart__interface__gr.html#a37dcd87df8762e2bc9af9fea368b1537", null ], + [ "single_wire", "group__usart__interface__gr.html#ad1928b61021dd9ff689a3ccf9b8966a8", null ], + [ "irda", "group__usart__interface__gr.html#a9a72c5f0209a9ccf840fc196e9a9dffa", null ], + [ "smart_card", "group__usart__interface__gr.html#aa78e1ee1726d1db2cfa83fd7b5acc8bd", null ], + [ "smart_card_clock", "group__usart__interface__gr.html#a7b3c14ea1b5e9ba0a37ebc05fcfd51a6", null ], + [ "flow_control_rts", "group__usart__interface__gr.html#a1d55dd339a08293018608775fc8b4859", null ], + [ "flow_control_cts", "group__usart__interface__gr.html#a287da15773bb24a301cbfd806975e1e9", null ], + [ "event_tx_complete", "group__usart__interface__gr.html#a0190aabe8d8f59176be8d693f8874fb3", null ], + [ "event_rx_timeout", "group__usart__interface__gr.html#afe469796cfca4ea61bd6181afb4916be", null ], + [ "rts", "group__usart__interface__gr.html#afad044722f459552e9f0f602983659e9", null ], + [ "cts", "group__usart__interface__gr.html#a0a4ccfb729b3a40a5fd611021268c262", null ], + [ "dtr", "group__usart__interface__gr.html#aa3cc092c82fdc3e5e6646460be6ae9fd", null ], + [ "dsr", "group__usart__interface__gr.html#a437895b17519a16f920ae07461dd67d2", null ], + [ "dcd", "group__usart__interface__gr.html#aa56a9ad6e266df78157f0e04feb4b78c", null ], + [ "ri", "group__usart__interface__gr.html#aa6cf03b82235bedc0acf00acb46130fb", null ], + [ "event_cts", "group__usart__interface__gr.html#a4ebe5ddec8d99a63843f2a3c70ac85f9", null ], + [ "event_dsr", "group__usart__interface__gr.html#aefdb61f16498d650b5a7f5f9b62779df", null ], + [ "event_dcd", "group__usart__interface__gr.html#a7c1dd043d0db9738d6b5fa8d89211446", null ], + [ "event_ri", "group__usart__interface__gr.html#ab55f90aec5f909ff3a75bf36e61312ea", null ], + [ "reserved", "group__usart__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__interface__gr_structARM__USART__MODEM__STATUS.js b/docs/Driver/html/group__usart__interface__gr_structARM__USART__MODEM__STATUS.js new file mode 100644 index 0000000..5d4c95d --- /dev/null +++ b/docs/Driver/html/group__usart__interface__gr_structARM__USART__MODEM__STATUS.js @@ -0,0 +1,8 @@ +var group__usart__interface__gr_structARM__USART__MODEM__STATUS = +[ + [ "cts", "group__usart__interface__gr.html#a0a4ccfb729b3a40a5fd611021268c262", null ], + [ "dsr", "group__usart__interface__gr.html#a437895b17519a16f920ae07461dd67d2", null ], + [ "dcd", "group__usart__interface__gr.html#aa56a9ad6e266df78157f0e04feb4b78c", null ], + [ "ri", "group__usart__interface__gr.html#aa6cf03b82235bedc0acf00acb46130fb", null ], + [ "reserved", "group__usart__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__interface__gr_structARM__USART__STATUS.js b/docs/Driver/html/group__usart__interface__gr_structARM__USART__STATUS.js new file mode 100644 index 0000000..28c4bf9 --- /dev/null +++ b/docs/Driver/html/group__usart__interface__gr_structARM__USART__STATUS.js @@ -0,0 +1,11 @@ +var group__usart__interface__gr_structARM__USART__STATUS = +[ + [ "tx_busy", "group__usart__interface__gr.html#a2c6d2b67fba3f3e084e96a6bc7fcac6b", null ], + [ "rx_busy", "group__usart__interface__gr.html#a9f5baee58ed41b382628a82a0b1cbcb4", null ], + [ "tx_underflow", "group__usart__interface__gr.html#a048f45e9d2257a21821f81d9edd17b72", null ], + [ "rx_overflow", "group__usart__interface__gr.html#ac403aefd9bce8b0172e1996c0f3dd8aa", null ], + [ "rx_break", "group__usart__interface__gr.html#aa5e3fa74f444688f9e727ffc1e988e5d", null ], + [ "rx_framing_error", "group__usart__interface__gr.html#af1d1cfd8b231843d5cc23e6a2b1ca8d0", null ], + [ "rx_parity_error", "group__usart__interface__gr.html#affb21b610e2d0d71727702441c238f4f", null ], + [ "reserved", "group__usart__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__misc__control.html b/docs/Driver/html/group__usart__misc__control.html new file mode 100644 index 0000000..be932bd --- /dev/null +++ b/docs/Driver/html/group__usart__misc__control.html @@ -0,0 +1,338 @@ + + + + + +USART Miscellaneous Control +CMSIS-Driver: USART Miscellaneous Control + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USART Miscellaneous Control
USART Control Codes
+
+
+ +

Specifies additional miscellaneous controls. +More...

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USART_SET_DEFAULT_TX_VALUE   (0x10UL << ARM_USART_CONTROL_Pos)
 Set default Transmit value (Synchronous Receive only); arg = value. More...
 
#define ARM_USART_SET_IRDA_PULSE   (0x11UL << ARM_USART_CONTROL_Pos)
 Set IrDA Pulse in ns; arg: 0=3/16 of bit period. More...
 
#define ARM_USART_SET_SMART_CARD_GUARD_TIME   (0x12UL << ARM_USART_CONTROL_Pos)
 Set Smart Card Guard Time; arg = number of bit periods. More...
 
#define ARM_USART_SET_SMART_CARD_CLOCK   (0x13UL << ARM_USART_CONTROL_Pos)
 Set Smart Card Clock in Hz; arg: 0=Clock not generated. More...
 
#define ARM_USART_CONTROL_SMART_CARD_NACK   (0x14UL << ARM_USART_CONTROL_Pos)
 Smart Card NACK generation; arg: 0=disabled, 1=enabled. More...
 
#define ARM_USART_CONTROL_TX   (0x15UL << ARM_USART_CONTROL_Pos)
 Transmitter; arg: 0=disabled, 1=enabled. More...
 
#define ARM_USART_CONTROL_RX   (0x16UL << ARM_USART_CONTROL_Pos)
 Receiver; arg: 0=disabled, 1=enabled. More...
 
#define ARM_USART_CONTROL_BREAK   (0x17UL << ARM_USART_CONTROL_Pos)
 Continuous Break transmission; arg: 0=disabled, 1=enabled. More...
 
#define ARM_USART_ABORT_SEND   (0x18UL << ARM_USART_CONTROL_Pos)
 Abort ARM_USART_Send. More...
 
#define ARM_USART_ABORT_RECEIVE   (0x19UL << ARM_USART_CONTROL_Pos)
 Abort ARM_USART_Receive. More...
 
#define ARM_USART_ABORT_TRANSFER   (0x1AUL << ARM_USART_CONTROL_Pos)
 Abort ARM_USART_Transfer. More...
 
+

Description

+

Specifies additional miscellaneous controls.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_SET_DEFAULT_TX_VALUE   (0x10UL << ARM_USART_CONTROL_Pos)
+
+ +

Set default Transmit value (Synchronous Receive only); arg = value.

+
See Also
ARM_USART_Control; ARM_USART_Receive;
+ +
+
+ +
+
+ + + + +
#define ARM_USART_SET_IRDA_PULSE   (0x11UL << ARM_USART_CONTROL_Pos)
+
+ +

Set IrDA Pulse in ns; arg: 0=3/16 of bit period.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_SET_SMART_CARD_GUARD_TIME   (0x12UL << ARM_USART_CONTROL_Pos)
+
+ +

Set Smart Card Guard Time; arg = number of bit periods.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_SET_SMART_CARD_CLOCK   (0x13UL << ARM_USART_CONTROL_Pos)
+
+ +

Set Smart Card Clock in Hz; arg: 0=Clock not generated.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CONTROL_SMART_CARD_NACK   (0x14UL << ARM_USART_CONTROL_Pos)
+
+ +

Smart Card NACK generation; arg: 0=disabled, 1=enabled.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CONTROL_TX   (0x15UL << ARM_USART_CONTROL_Pos)
+
+ +

Transmitter; arg: 0=disabled, 1=enabled.

+
See Also
ARM_USART_Control; ARM_USART_Send; ARM_USART_Transfer
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CONTROL_RX   (0x16UL << ARM_USART_CONTROL_Pos)
+
+ +

Receiver; arg: 0=disabled, 1=enabled.

+
See Also
ARM_USART_Control; ARM_USART_Receive; ARM_USART_Transfer;
+ +
+
+ +
+
+ + + + +
#define ARM_USART_CONTROL_BREAK   (0x17UL << ARM_USART_CONTROL_Pos)
+
+ +

Continuous Break transmission; arg: 0=disabled, 1=enabled.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_ABORT_SEND   (0x18UL << ARM_USART_CONTROL_Pos)
+
+ +

Abort ARM_USART_Send.

+
See Also
ARM_USART_Control;
+ +
+
+ +
+
+ + + + +
#define ARM_USART_ABORT_RECEIVE   (0x19UL << ARM_USART_CONTROL_Pos)
+
+ +

Abort ARM_USART_Receive.

+
See Also
ARM_USART_Control;
+ +
+
+ +
+
+ + + + +
#define ARM_USART_ABORT_TRANSFER   (0x1AUL << ARM_USART_CONTROL_Pos)
+
+ +

Abort ARM_USART_Transfer.

+
See Also
ARM_USART_Control;
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__misc__control.js b/docs/Driver/html/group__usart__misc__control.js new file mode 100644 index 0000000..cd82eb2 --- /dev/null +++ b/docs/Driver/html/group__usart__misc__control.js @@ -0,0 +1,14 @@ +var group__usart__misc__control = +[ + [ "ARM_USART_SET_DEFAULT_TX_VALUE", "group__usart__misc__control.html#gacd6f060afd55ffa1422567c31ebad950", null ], + [ "ARM_USART_SET_IRDA_PULSE", "group__usart__misc__control.html#gab8565d1f26382e832327e4553d18eb02", null ], + [ "ARM_USART_SET_SMART_CARD_GUARD_TIME", "group__usart__misc__control.html#ga169be809adc186c131bb8b1618005b28", null ], + [ "ARM_USART_SET_SMART_CARD_CLOCK", "group__usart__misc__control.html#ga79698a2bd564c1f5bb1829ea422e9d3d", null ], + [ "ARM_USART_CONTROL_SMART_CARD_NACK", "group__usart__misc__control.html#ga4bb5374e7db308b6ff48aa13aa9c4b8a", null ], + [ "ARM_USART_CONTROL_TX", "group__usart__misc__control.html#gad96ea1a80c97f968fbc0ae4c20e7fa6a", null ], + [ "ARM_USART_CONTROL_RX", "group__usart__misc__control.html#gad52c08553ae203d4f7741404589b8169", null ], + [ "ARM_USART_CONTROL_BREAK", "group__usart__misc__control.html#gab194a6f916e5b25e0262534c0cce54dc", null ], + [ "ARM_USART_ABORT_SEND", "group__usart__misc__control.html#ga54e88b32bc7368ff9c44613eae735c44", null ], + [ "ARM_USART_ABORT_RECEIVE", "group__usart__misc__control.html#ga3f57bcedf610dc844e6cc3a230dba5f7", null ], + [ "ARM_USART_ABORT_TRANSFER", "group__usart__misc__control.html#ga83d0ef402feb342f9939f0e4ffe26182", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__mode__control.html b/docs/Driver/html/group__usart__mode__control.html new file mode 100644 index 0000000..4a58b10 --- /dev/null +++ b/docs/Driver/html/group__usart__mode__control.html @@ -0,0 +1,248 @@ + + + + + +USART Mode Control +CMSIS-Driver: USART Mode Control + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USART Mode Control
USART Control Codes
+
+
+ +

Specify USART mode. +More...

+ + + + + + + + + + + + + + + + + + + + +

+Macros

#define ARM_USART_MODE_ASYNCHRONOUS   (0x01UL << ARM_USART_CONTROL_Pos)
 UART (Asynchronous); arg = Baudrate. More...
 
#define ARM_USART_MODE_SYNCHRONOUS_MASTER   (0x02UL << ARM_USART_CONTROL_Pos)
 Synchronous Master (generates clock signal); arg = Baudrate. More...
 
#define ARM_USART_MODE_SYNCHRONOUS_SLAVE   (0x03UL << ARM_USART_CONTROL_Pos)
 Synchronous Slave (external clock signal) More...
 
#define ARM_USART_MODE_SINGLE_WIRE   (0x04UL << ARM_USART_CONTROL_Pos)
 UART Single-wire (half-duplex); arg = Baudrate. More...
 
#define ARM_USART_MODE_IRDA   (0x05UL << ARM_USART_CONTROL_Pos)
 UART IrDA; arg = Baudrate. More...
 
#define ARM_USART_MODE_SMART_CARD   (0x06UL << ARM_USART_CONTROL_Pos)
 UART Smart Card; arg = Baudrate. More...
 
+

Description

+

Specify USART mode.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_MODE_ASYNCHRONOUS   (0x01UL << ARM_USART_CONTROL_Pos)
+
+ +

UART (Asynchronous); arg = Baudrate.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_MODE_SYNCHRONOUS_MASTER   (0x02UL << ARM_USART_CONTROL_Pos)
+
+ +

Synchronous Master (generates clock signal); arg = Baudrate.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_MODE_SYNCHRONOUS_SLAVE   (0x03UL << ARM_USART_CONTROL_Pos)
+
+ +

Synchronous Slave (external clock signal)

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_MODE_SINGLE_WIRE   (0x04UL << ARM_USART_CONTROL_Pos)
+
+ +

UART Single-wire (half-duplex); arg = Baudrate.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_MODE_IRDA   (0x05UL << ARM_USART_CONTROL_Pos)
+
+ +

UART IrDA; arg = Baudrate.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_MODE_SMART_CARD   (0x06UL << ARM_USART_CONTROL_Pos)
+
+ +

UART Smart Card; arg = Baudrate.

+
See Also
ARM_USART_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__mode__control.js b/docs/Driver/html/group__usart__mode__control.js new file mode 100644 index 0000000..2783a4d --- /dev/null +++ b/docs/Driver/html/group__usart__mode__control.js @@ -0,0 +1,9 @@ +var group__usart__mode__control = +[ + [ "ARM_USART_MODE_ASYNCHRONOUS", "group__usart__mode__control.html#gad85039731478c924d3b418ec00768388", null ], + [ "ARM_USART_MODE_SYNCHRONOUS_MASTER", "group__usart__mode__control.html#ga7d3e9e0e838a3f15f8661983b9ac4573", null ], + [ "ARM_USART_MODE_SYNCHRONOUS_SLAVE", "group__usart__mode__control.html#gae78778475f3fab09a080c2279afc69fa", null ], + [ "ARM_USART_MODE_SINGLE_WIRE", "group__usart__mode__control.html#ga4132136971d4f93f2e6a87c6775a9bb0", null ], + [ "ARM_USART_MODE_IRDA", "group__usart__mode__control.html#ga458f4f60d1d772cfd7567ae424d9aad9", null ], + [ "ARM_USART_MODE_SMART_CARD", "group__usart__mode__control.html#gade65a1c27d9097d9ef0e86c02b55cecd", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__parity__bit.html b/docs/Driver/html/group__usart__parity__bit.html new file mode 100644 index 0000000..5b65401 --- /dev/null +++ b/docs/Driver/html/group__usart__parity__bit.html @@ -0,0 +1,194 @@ + + + + + +USART Parity Bit +CMSIS-Driver: USART Parity Bit + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USART Parity Bit
USART Control Codes
+
+
+ +

Defines the parity bit. +More...

+ + + + + + + + + + + +

+Macros

#define ARM_USART_PARITY_NONE   (0UL << ARM_USART_PARITY_Pos)
 No Parity (default) More...
 
#define ARM_USART_PARITY_EVEN   (1UL << ARM_USART_PARITY_Pos)
 Even Parity. More...
 
#define ARM_USART_PARITY_ODD   (2UL << ARM_USART_PARITY_Pos)
 Odd Parity. More...
 
+

Description

+

Defines the parity bit.

+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_PARITY_NONE   (0UL << ARM_USART_PARITY_Pos)
+
+ +

No Parity (default)

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_PARITY_EVEN   (1UL << ARM_USART_PARITY_Pos)
+
+ +

Even Parity.

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_PARITY_ODD   (2UL << ARM_USART_PARITY_Pos)
+
+ +

Odd Parity.

+
See Also
ARM_USART_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__parity__bit.js b/docs/Driver/html/group__usart__parity__bit.js new file mode 100644 index 0000000..053c787 --- /dev/null +++ b/docs/Driver/html/group__usart__parity__bit.js @@ -0,0 +1,6 @@ +var group__usart__parity__bit = +[ + [ "ARM_USART_PARITY_NONE", "group__usart__parity__bit.html#ga141a64650f99a1f642c3b3b6ced0eb8d", null ], + [ "ARM_USART_PARITY_EVEN", "group__usart__parity__bit.html#gabc35e8dd2cbebb730abf36959e87a207", null ], + [ "ARM_USART_PARITY_ODD", "group__usart__parity__bit.html#ga02f30181eedd3b04d650dd507bf40d6d", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usart__stop__bits.html b/docs/Driver/html/group__usart__stop__bits.html new file mode 100644 index 0000000..af91e6e --- /dev/null +++ b/docs/Driver/html/group__usart__stop__bits.html @@ -0,0 +1,213 @@ + + + + + +USART Stop Bits +CMSIS-Driver: USART Stop Bits + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Macros
+
+
USART Stop Bits
USART Control Codes
+
+
+ +

Defines the number of stop bits. +More...

+ + + + + + + + + + + + + + +

+Macros

#define ARM_USART_STOP_BITS_1   (0UL << ARM_USART_STOP_BITS_Pos)
 1 Stop bit (default) More...
 
#define ARM_USART_STOP_BITS_2   (1UL << ARM_USART_STOP_BITS_Pos)
 2 Stop bits More...
 
#define ARM_USART_STOP_BITS_1_5   (2UL << ARM_USART_STOP_BITS_Pos)
 1.5 Stop bits More...
 
#define ARM_USART_STOP_BITS_0_5   (3UL << ARM_USART_STOP_BITS_Pos)
 0.5 Stop bits More...
 
+

Description

+

Defines the number of stop bits.

+
See Also
ARM_USART_Control
+

Macro Definition Documentation

+ +
+
+ + + + +
#define ARM_USART_STOP_BITS_1   (0UL << ARM_USART_STOP_BITS_Pos)
+
+ +

1 Stop bit (default)

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_STOP_BITS_2   (1UL << ARM_USART_STOP_BITS_Pos)
+
+ +

2 Stop bits

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_STOP_BITS_1_5   (2UL << ARM_USART_STOP_BITS_Pos)
+
+ +

1.5 Stop bits

+
See Also
ARM_USART_Control
+ +
+
+ +
+
+ + + + +
#define ARM_USART_STOP_BITS_0_5   (3UL << ARM_USART_STOP_BITS_Pos)
+
+ +

0.5 Stop bits

+
See Also
ARM_USART_Control
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usart__stop__bits.js b/docs/Driver/html/group__usart__stop__bits.js new file mode 100644 index 0000000..60af0b0 --- /dev/null +++ b/docs/Driver/html/group__usart__stop__bits.js @@ -0,0 +1,7 @@ +var group__usart__stop__bits = +[ + [ "ARM_USART_STOP_BITS_1", "group__usart__stop__bits.html#ga45f51a51e654b4753a538ed33f0d7d78", null ], + [ "ARM_USART_STOP_BITS_2", "group__usart__stop__bits.html#ga17f034b5f0d0328dc636b403d1954795", null ], + [ "ARM_USART_STOP_BITS_1_5", "group__usart__stop__bits.html#gafc1d0f2c95a76ef4c5152792a619f136", null ], + [ "ARM_USART_STOP_BITS_0_5", "group__usart__stop__bits.html#ga47f43cb83d9955a4c90d918acaaa44ba", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usb__interface__gr.html b/docs/Driver/html/group__usb__interface__gr.html new file mode 100644 index 0000000..b18f599 --- /dev/null +++ b/docs/Driver/html/group__usb__interface__gr.html @@ -0,0 +1,177 @@ + + + + + +USB Interface +CMSIS-Driver: USB Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
USB Interface
+
+
+ +

USB common definitions (Driver_USB.h) +More...

+ + + + + + + + + + + + + + +

+Content

 USB Device Interface
 Driver API for USB Device Peripheral (Driver_USBD.h)
 
 USB Host Interface
 Driver API for USB Host Peripheral (Driver_USBH.h)
 
 USB Speed
 USB Speed definitions.
 
 USB Endpoint Type
 USB Endpoint Type definitions.
 
+

Description

+

USB common definitions (Driver_USB.h)

+

The Universal Serial Bus (USB) implements a serial bus for data exchange. It is a host controlled, plug-and-play interface between a USB host and USB devices using a tiered star topology. In microcontroller (MCU) applications, the interface is often used to connect a device to a host for data exchange or control purposes.

+ +

Block Diagram

+

Typically only one USB Device is connected to a USB Host. If several USB devices must be connected to the same USB host, then the connection must be done via a USB hub.

+
+USB_Schematics.png +
+Simplified USB Schema
+

USB API

+

The following header files define the Application Programming Interface (API) for the USB interface:

+
    +
  • Driver_USB.h : Common definitions of the USBD and USBH interface
    • +
  • Driver_USBD.h : Driver API for USB Device Peripheral
    • +
  • Driver_USBH.h : Driver API for USB Host Peripheral
    • +
+

The driver implementation is a typical part of the Device Family Pack (DFP) that supports the peripherals of the microcontroller family.

+

Driver Functions

+

The driver functions are published in the access struct as explained in Common Driver Functions

+ +
+
+
+ + + + diff --git a/docs/Driver/html/group__usb__interface__gr.js b/docs/Driver/html/group__usb__interface__gr.js new file mode 100644 index 0000000..5d8ebe7 --- /dev/null +++ b/docs/Driver/html/group__usb__interface__gr.js @@ -0,0 +1,7 @@ +var group__usb__interface__gr = +[ + [ "USB Device Interface", "group__usbd__interface__gr.html", "group__usbd__interface__gr" ], + [ "USB Host Interface", "group__usbh__interface__gr.html", "group__usbh__interface__gr" ], + [ "USB Speed", "group__USB__speed.html", "group__USB__speed" ], + [ "USB Endpoint Type", "group__USB__endpoint__type.html", "group__USB__endpoint__type" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbd__interface__gr.html b/docs/Driver/html/group__usbd__interface__gr.html new file mode 100644 index 0000000..507e017 --- /dev/null +++ b/docs/Driver/html/group__usbd__interface__gr.html @@ -0,0 +1,1392 @@ + + + + + +USB Device Interface +CMSIS-Driver: USB Device Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
USB Device Interface
USB Interface
+
+
+ +

Driver API for USB Device Peripheral (Driver_USBD.h) +More...

+ + + + + + + + +

+Content

 USBD Device Events
 The USB Device driver generates Device call back events that are notified via the function ARM_USBD_SignalDeviceEvent.
 
 USBD Endpoint Events
 The USB Device driver generates Endpoint call back events that are notified via the function ARM_USBD_SignalEndpointEvent.
 
+ + + + + + + + + + +

+Data Structures

struct  ARM_DRIVER_USBD
 Access structure of the USB Device Driver. More...
 
struct  ARM_USBD_CAPABILITIES
 USB Device Driver Capabilities. More...
 
struct  ARM_USBD_STATE
 USB Device State. More...
 
+ + + + + + + +

+Typedefs

typedef void(* ARM_USBD_SignalDeviceEvent_t )(uint32_t event)
 Pointer to ARM_USBD_SignalDeviceEvent : Signal USB Device Event. More...
 
typedef void(* ARM_USBD_SignalEndpointEvent_t )(uint8_t ep_addr, uint32_t event)
 Pointer to ARM_USBD_SignalEndpointEvent : Signal USB Endpoint Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_USBD_GetVersion (void)
 Get driver version. More...
 
ARM_USBD_CAPABILITIES ARM_USBD_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_USBD_Initialize (ARM_USBD_SignalDeviceEvent_t cb_device_event, ARM_USBD_SignalEndpointEvent_t cb_endpoint_event)
 Initialize USB Device Interface. More...
 
int32_t ARM_USBD_Uninitialize (void)
 De-initialize USB Device Interface. More...
 
int32_t ARM_USBD_PowerControl (ARM_POWER_STATE state)
 Control USB Device Interface Power. More...
 
int32_t ARM_USBD_DeviceConnect (void)
 Connect USB Device. More...
 
int32_t ARM_USBD_DeviceDisconnect (void)
 Disconnect USB Device. More...
 
ARM_USBD_STATE ARM_USBD_DeviceGetState (void)
 Get current USB Device State. More...
 
int32_t ARM_USBD_DeviceRemoteWakeup (void)
 Trigger USB Remote Wakeup. More...
 
int32_t ARM_USBD_DeviceSetAddress (uint8_t dev_addr)
 Set USB Device Address. More...
 
int32_t ARM_USBD_ReadSetupPacket (uint8_t *setup)
 Read setup packet received over Control Endpoint. More...
 
int32_t ARM_USBD_EndpointConfigure (uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size)
 Configure USB Endpoint. More...
 
int32_t ARM_USBD_EndpointUnconfigure (uint8_t ep_addr)
 Unconfigure USB Endpoint. More...
 
int32_t ARM_USBD_EndpointStall (uint8_t ep_addr, bool stall)
 Set/Clear Stall for USB Endpoint. More...
 
int32_t ARM_USBD_EndpointTransfer (uint8_t ep_addr, uint8_t *data, uint32_t num)
 Read data from or Write data to USB Endpoint. More...
 
uint32_t ARM_USBD_EndpointTransferGetResult (uint8_t ep_addr)
 Get result of USB Endpoint transfer. More...
 
int32_t ARM_USBD_EndpointTransferAbort (uint8_t ep_addr)
 Abort current USB Endpoint transfer. More...
 
uint16_t ARM_USBD_GetFrameNumber (void)
 Get current USB Frame Number. More...
 
void ARM_USBD_SignalDeviceEvent (uint32_t event)
 Signal USB Device Event. More...
 
void ARM_USBD_SignalEndpointEvent (uint8_t ep_addr, uint32_t ep_event)
 Signal USB Endpoint Event. More...
 
+

Description

+

Driver API for USB Device Peripheral (Driver_USBD.h)

+

USB Device API

+

The header file Driver_USBD.h defines the API for the USB Device Driver interface used by middleware components. The driver implementation itself is a typical part of the Device Family Pack, which provides entry points to the interface as function pointers in the struct ARM_DRIVER_USBD. This structure can be available several times in each interface to control multiple USBD interfaces.

+

Header file Driver_USBD.h also defines callback routines that can be categorized as device event callbacks and endpoint event callbacks. Callbacks are called by the driver, in interrupt context when an appropriate event occurs, to signal device related events (USBD Device Events) and endpoint related events (USBD Endpoint Events).

+

USB Device Function Call Sequence

+

To use the USBD driver invoke the API functions in the following order:

+
+msc_inline_mscgraph_2 + + + + + + + + + + + + + +
+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_USBD
+
+

Access structure of the USB Device Driver.

+

The functions of the USB Device driver are accessed by function pointers. Refer to Common Driver Functions for overview information.

+

Each instance of an USBD provides such an access struct. The instance is indicated by a postfix in the symbol name of the access struct, for example:

+
    +
  • Driver_USBD0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_USBD1 is the name of the access struct of the second instance (no. 1).
    • +
+

A configuration setting in the middleware allows connecting the middleware to a specific driver instance Driver_USBDn. The default is 0, which connects a middleware to the first instance of a driver.

+
Note
The struct must remain unchanged.
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_USBD_GetVersion : Get driver version. More...
 
ARM_USBD_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_USBD_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_USBD_SignalDeviceEvent_t cb_device_event, ARM_USBD_SignalEndpointEvent_t cb_endpoint_event)
 Pointer to ARM_USBD_Initialize : Initialize USB Device Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_USBD_Uninitialize : De-initialize USB Device Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_USBD_PowerControl : Control USB Device Interface Power. More...
 
int32_t(* DeviceConnect )(void)
 Pointer to ARM_USBD_DeviceConnect : Connect USB Device. More...
 
int32_t(* DeviceDisconnect )(void)
 Pointer to ARM_USBD_DeviceDisconnect : Disconnect USB Device. More...
 
ARM_USBD_STATE(* DeviceGetState )(void)
 Pointer to ARM_USBD_DeviceGetState : Get current USB Device State. More...
 
int32_t(* DeviceRemoteWakeup )(void)
 Pointer to ARM_USBD_DeviceRemoteWakeup : Trigger USB Remote Wakeup. More...
 
int32_t(* DeviceSetAddress )(uint8_t dev_addr)
 Pointer to ARM_USBD_DeviceSetAddress : Set USB Device Address. More...
 
int32_t(* ReadSetupPacket )(uint8_t *setup)
 Pointer to ARM_USBD_ReadSetupPacket : Read setup packet received over Control Endpoint. More...
 
int32_t(* EndpointConfigure )(uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size)
 Pointer to ARM_USBD_EndpointConfigure : Configure USB Endpoint. More...
 
int32_t(* EndpointUnconfigure )(uint8_t ep_addr)
 Pointer to ARM_USBD_EndpointUnconfigure : Unconfigure USB Endpoint. More...
 
int32_t(* EndpointStall )(uint8_t ep_addr, bool stall)
 Pointer to ARM_USBD_EndpointStall : Set/Clear Stall for USB Endpoint. More...
 
int32_t(* EndpointTransfer )(uint8_t ep_addr, uint8_t *data, uint32_t num)
 Pointer to ARM_USBD_EndpointTransfer : Read data from or Write data to USB Endpoint. More...
 
uint32_t(* EndpointTransferGetResult )(uint8_t ep_addr)
 Pointer to ARM_USBD_EndpointTransferGetResult : Get result of USB Endpoint transfer. More...
 
int32_t(* EndpointTransferAbort )(uint8_t ep_addr)
 Pointer to ARM_USBD_EndpointTransferAbort : Abort current USB Endpoint transfer. More...
 
uint16_t(* GetFrameNumber )(void)
 Pointer to ARM_USBD_GetFrameNumber : Get current USB Frame Number. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_USBD_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_USBD_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_USBD_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_USBD_SignalDeviceEvent_t cb_device_event, ARM_USBD_SignalEndpointEvent_t cb_endpoint_event)
+
+ +

Pointer to ARM_USBD_Initialize : Initialize USB Device Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_USBD_Uninitialize : De-initialize USB Device Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_USBD_PowerControl : Control USB Device Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* DeviceConnect)(void)
+
+ +

Pointer to ARM_USBD_DeviceConnect : Connect USB Device.

+ +
+
+ +
+
+ + + + +
int32_t(* DeviceDisconnect)(void)
+
+ +

Pointer to ARM_USBD_DeviceDisconnect : Disconnect USB Device.

+ +
+
+ +
+
+ + + + +
ARM_USBD_STATE(* DeviceGetState)(void)
+
+ +

Pointer to ARM_USBD_DeviceGetState : Get current USB Device State.

+ +
+
+ +
+
+ + + + +
int32_t(* DeviceRemoteWakeup)(void)
+
+ +

Pointer to ARM_USBD_DeviceRemoteWakeup : Trigger USB Remote Wakeup.

+ +
+
+ +
+
+ + + + +
int32_t(* DeviceSetAddress)(uint8_t dev_addr)
+
+ +

Pointer to ARM_USBD_DeviceSetAddress : Set USB Device Address.

+ +
+
+ +
+
+ + + + +
int32_t(* ReadSetupPacket)(uint8_t *setup)
+
+ +

Pointer to ARM_USBD_ReadSetupPacket : Read setup packet received over Control Endpoint.

+ +
+
+ +
+
+ + + + +
int32_t(* EndpointConfigure)(uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size)
+
+ +

Pointer to ARM_USBD_EndpointConfigure : Configure USB Endpoint.

+ +
+
+ +
+
+ + + + +
int32_t(* EndpointUnconfigure)(uint8_t ep_addr)
+
+ +

Pointer to ARM_USBD_EndpointUnconfigure : Unconfigure USB Endpoint.

+ +
+
+ +
+
+ + + + +
int32_t(* EndpointStall)(uint8_t ep_addr, bool stall)
+
+ +

Pointer to ARM_USBD_EndpointStall : Set/Clear Stall for USB Endpoint.

+ +
+
+ +
+
+ + + + +
int32_t(* EndpointTransfer)(uint8_t ep_addr, uint8_t *data, uint32_t num)
+
+ +

Pointer to ARM_USBD_EndpointTransfer : Read data from or Write data to USB Endpoint.

+ +
+
+ +
+
+ + + + +
uint32_t(* EndpointTransferGetResult)(uint8_t ep_addr)
+
+ +

Pointer to ARM_USBD_EndpointTransferGetResult : Get result of USB Endpoint transfer.

+ +
+
+ +
+
+ + + + +
int32_t(* EndpointTransferAbort)(uint8_t ep_addr)
+
+ +

Pointer to ARM_USBD_EndpointTransferAbort : Abort current USB Endpoint transfer.

+ +
+
+ +
+
+ + + + +
uint16_t(* GetFrameNumber)(void)
+
+ +

Pointer to ARM_USBD_GetFrameNumber : Get current USB Frame Number.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_USBD_CAPABILITIES
+
+

USB Device Driver Capabilities.

+

A USB Device driver can be implemented with different capabilities. The data fields of this structure encode the capabilities implemented by this driver.

+

Returned by:

+ +
Note
The struct must remain unchanged.
+
+ + + + + + + + + + + + + +
Data Fields
+uint32_t +vbus_detection: 1 +VBUS detection.
+uint32_t +event_vbus_on: 1 +Signal VBUS On event.
+uint32_t +event_vbus_off: 1 +Signal VBUS Off event.
+uint32_t +reserved: 29 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_USBD_STATE
+
+

USB Device State.

+

This structure stores information about the state of the USB Device. The data fields encode the established speed, whether the device is powered and active.

+

Returned by:

+ +
+ + + + + + + + + + + + + +
Data Fields
+uint32_t +vbus: 1 +USB Device VBUS flag.
+uint32_t +speed: 2 +USB Device speed setting (ARM_USB_SPEED_xxx)
+uint32_t +active: 1 +USB Device active flag.
+uint32_t +reserved: 28 +
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_USBD_SignalDeviceEvent_t
+
+ +

Pointer to ARM_USBD_SignalDeviceEvent : Signal USB Device Event.

+

Provides the typedef for the callback function ARM_USBD_SignalDeviceEvent.

+

Parameter for:

+ + +
+
+ +
+
+ + + + +
ARM_USBD_SignalEndpointEvent_t
+
+ +

Pointer to ARM_USBD_SignalEndpointEvent : Signal USB Endpoint Event.

+

Provides the typedef for the callback function ARM_USBD_SignalEndpointEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_USBD_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_USBD_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_USBD Driver_USBD0;
+
ARM_DRIVER_USBD *drv_info;
+
+
void setup_usbd (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_USBD0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_USBD_CAPABILITIES ARM_USBD_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_USBD_CAPABILITIES
+

The function ARM_USBD_GetCapabilities returns information about capabilities in this driver implementation. The data fields of the structure ARM_USBD_CAPABILITIES encode various capabilities, for example if the hardware can create signal events using the ARM_USBD_SignalDeviceEvent callback function.

+

Example:

+
extern ARM_DRIVER_USBD Driver_USBD0;
+
ARM_DRIVER_USBD *drv_info;
+
+
void read_capabilities (void) {
+
ARM_USBD_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_USBD0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_USBD_Initialize (ARM_USBD_SignalDeviceEvent_t cb_device_event,
ARM_USBD_SignalEndpointEvent_t cb_endpoint_event 
)
+
+ +

Initialize USB Device Interface.

+
Parameters
+ + + +
[in]cb_device_eventPointer to ARM_USBD_SignalDeviceEvent
[in]cb_endpoint_eventPointer to ARM_USBD_SignalEndpointEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_USBD_Initialize initializes the USB Device interface. It is called when the middleware component starts operation.

+

The function performs the following operations:

+ +

The parameter cb_device_event is a pointer to the ARM_USBD_SignalDeviceEvent callback function; use a NULL pointer when no device callback signals are required.
+The parameter cb_endpoint_event is a pointer to the ARM_USBD_SignalEndpointEvent callback function.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBD_Uninitialize (void )
+
+ +

De-initialize USB Device Interface.

+
Returns
Status Error Codes
+

The function ARM_USBD_Uninitialize de-initializes the resources of USBD interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBD_PowerControl (ARM_POWER_STATE state)
+
+ +

Control USB Device Interface Power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_USBD_PowerControl operates the power modes of the USB Device interface.

+

The parameter state sets the operation and can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBD_DeviceConnect (void )
+
+ +

Connect USB Device.

+
Returns
Status Error Codes
+

The function ARM_USBD_DeviceConnect signals to the host that the device is connected.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBD_DeviceDisconnect (void )
+
+ +

Disconnect USB Device.

+
Returns
Status Error Codes
+

The function ARM_USBD_DeviceDisconnect signals to the host that the device is disconnected.

+ +
+
+ +
+
+ + + + + + + + +
ARM_USBD_STATE ARM_USBD_DeviceGetState (void )
+
+ +

Get current USB Device State.

+
Returns
Device State ARM_USBD_STATE
+

Retrieves the current USB device state.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBD_DeviceRemoteWakeup (void )
+
+ +

Trigger USB Remote Wakeup.

+
Returns
Status Error Codes
+

The function ARM_USBD_DeviceRemoteWakeup signals remote wakeup to the host.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBD_DeviceSetAddress (uint8_t dev_addr)
+
+ +

Set USB Device Address.

+
Parameters
+ + +
[in]dev_addrDevice Address
+
+
+
Returns
Status Error Codes
+

Assigns an address to the device.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBD_ReadSetupPacket (uint8_t * setup)
+
+ +

Read setup packet received over Control Endpoint.

+
Parameters
+ + +
[out]setupPointer to buffer for setup packet
+
+
+
Returns
Status Error Codes
+

The function ARM_USBD_ReadSetupPacket reads the last SETUP packet (8 bytes) that was received over Control Endpoint (Endpoint 0) which is indicated by ARM_USBD_EVENT_SETUP event.

+

See also:

+ + +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_USBD_EndpointConfigure (uint8_t ep_addr,
uint8_t ep_type,
uint16_t ep_max_packet_size 
)
+
+ +

Configure USB Endpoint.

+
Parameters
+ + + + +
[in]ep_addrEndpoint Address
    +
  • ep_addr.0..3: Address
    • +
  • ep_addr.7: Direction
    • +
+
[in]ep_typeEndpoint Type (ARM_USB_ENDPOINT_xxx)
[in]ep_max_packet_sizeEndpoint Maximum Packet Size
+
+
+
Returns
Status Error Codes
+

The function ARM_USBD_EndpointConfigure configures an endpoint for transfers.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBD_EndpointUnconfigure (uint8_t ep_addr)
+
+ +

Unconfigure USB Endpoint.

+
Parameters
+ + +
[in]ep_addrEndpoint Address
    +
  • ep_addr.0..3: Address
    • +
  • ep_addr.7: Direction
    • +
+
+
+
+
Returns
Status Error Codes
+

The function ARM_USBD_EndpointUnconfigure de-configures the specified endpoint.

+

The parameter ep_addr specifies the endpoint address.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_USBD_EndpointStall (uint8_t ep_addr,
bool stall 
)
+
+ +

Set/Clear Stall for USB Endpoint.

+
Parameters
+ + + +
[in]ep_addrEndpoint Address
    +
  • ep_addr.0..3: Address
    • +
  • ep_addr.7: Direction
    • +
+
[in]stallOperation
    +
  • false Clear
    • +
  • true Set
    • +
+
+
+
+
Returns
Status Error Codes
+

The function ARM_USBD_EndpointStall sets or clears stall condition for the specified endpoint.

+

The parameter ep_addr specifies the endpoint address.
+The parameter stall is a boolean parameter.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_USBD_EndpointTransfer (uint8_t ep_addr,
uint8_t * data,
uint32_t num 
)
+
+ +

Read data from or Write data to USB Endpoint.

+
Parameters
+ + + + +
[in]ep_addrEndpoint Address
    +
  • ep_addr.0..3: Address
    • +
  • ep_addr.7: Direction
    • +
+
[out]dataPointer to buffer for data to read or with data to write
[in]numNumber of data bytes to transfer
+
+
+
Returns
Status Error Codes
+

The function ARM_USBD_EndpointTransfer reads from or writes data to an USB Endpoint.

+

The parameter ep_addr specifies the endpoint address.
+The parameter data is a buffer for data to read or data to write.
+The parameter num is the number of bytes to transfer (must be multiple of endpoint maximum packet size for Read transfers).

+

The function is non-blocking and returns as soon as the driver starts the operation on the specified endpoint. During the operation it is not allowed to call this function again on the same endpoint. Also the data buffer must stay allocated and the contents of data must not be modified.

+

Direction in the endpoint address specifies the type of transfer:

+
    +
  • Endpoint Read for OUT endpoint (direction = 0)
    • +
  • Endpoint Write for IN endpoint (direction = 1)
    • +
+

Endpoint Read is finished when the requested number of data bytes have been received or when a short packet or ZLP (Zero-Length Packet) has been received. Completion of operation is indicated by ARM_USBD_EVENT_OUT event. Number of successfully received data bytes can be retrieved by calling ARM_USBD_EndpointTransferGetResult.

+

Endpoint Write is finished when the requested number of data bytes have been sent. Completion of operation is indicated by ARM_USBD_EVENT_IN event. Number of successfully sent data bytes can be retrieved by calling ARM_USBD_EndpointTransferGetResult.

+

Transfer operation can be aborted by calling ARM_USBD_EndpointTransferAbort.

+ +
+
+ +
+
+ + + + + + + + +
uint32_t ARM_USBD_EndpointTransferGetResult (uint8_t ep_addr)
+
+ +

Get result of USB Endpoint transfer.

+
Parameters
+ + +
[in]ep_addrEndpoint Address
    +
  • ep_addr.0..3: Address
    • +
  • ep_addr.7: Direction
    • +
+
+
+
+
Returns
number of successfully transferred data bytes
+

The function ARM_USBD_EndpointTransferGetResult returns the number of successfully transferred data bytes started by ARM_USBD_EndpointTransfer.

+

The parameter ep_addr specifies the endpoint address.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBD_EndpointTransferAbort (uint8_t ep_addr)
+
+ +

Abort current USB Endpoint transfer.

+
Parameters
+ + +
[in]ep_addrEndpoint Address
    +
  • ep_addr.0..3: Address
    • +
  • ep_addr.7: Direction
    • +
+
+
+
+
Returns
Status Error Codes
+

The function ARM_USBD_EndpointTransferAbort aborts the transfer to an endpoint started by ARM_USBD_EndpointTransfer.

+

The parameter ep_addr specifies the endpoint address.

+ +
+
+ +
+
+ + + + + + + + +
uint16_t ARM_USBD_GetFrameNumber (void )
+
+ +

Get current USB Frame Number.

+
Returns
Frame Number
+

Retrieves the sequential 11-bit frame number of the last Start of Frame (SOF) packet.

+ +
+
+ +
+
+ + + + + + + + +
void ARM_USBD_SignalDeviceEvent (uint32_t event)
+
+ +

Signal USB Device Event.

+
Parameters
+ + +
[in]eventUSBD Device Events
+
+
+
Returns
none
+

The function ARM_USBD_SignalDeviceEvent is a callback function registered by the function ARM_USBD_Initialize.

+

The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the data fields of the structure ARM_USBD_CAPABILITIES, which can be retrieved with the function ARM_USBD_GetCapabilities.

+

The following events can be generated:

+ + + + + + + + + + + + + + + +
Event BitDescription supported when ARM_USBD_CAPABILITIES
ARM_USBD_EVENT_VBUS_ON 0 Occurs when valid VBUS voltage is detected. data field event_vbus_on = 1
ARM_USBD_EVENT_VBUS_OFF 1 Occurs when VBUS voltage is turned off. data field event_vbus_off = 1
ARM_USBD_EVENT_RESET 2 Occurs when USB Reset is detected. always supported
ARM_USBD_EVENT_HIGH_SPEED 3 Occurs when USB Device is switched to High-speed. always supported
ARM_USBD_EVENT_SUSPEND 4 Occurs when USB Suspend is detected. always supported
ARM_USBD_EVENT_RESUME 5 Occurs when USB Resume is detected. always supported
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
void ARM_USBD_SignalEndpointEvent (uint8_t ep_addr,
uint32_t event 
)
+
+ +

Signal USB Endpoint Event.

+
Parameters
+ + + +
[in]ep_addrEndpoint Address
    +
  • ep_addr.0..3: Address
    • +
  • ep_addr.7: Direction
    • +
+
[in]eventUSBD Endpoint Events
+
+
+
Returns
none
+

The function ARM_USBD_SignalEndpointEvent is a callback function registered by the function ARM_USBD_Initialize.

+

The argument ep_addr specifies the endpoint.
+The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

The following events can be generated:

+ + + + + + + + + +
Event Bit Description
ARM_USBD_EVENT_SETUP 0 Occurs when SETUP packet is received over Control Endpoint.
ARM_USBD_EVENT_OUT 1 Occurs when data is received over OUT Endpoint.
ARM_USBD_EVENT_IN 2 Occurs when data is sent over IN Endpoint.
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usbd__interface__gr.js b/docs/Driver/html/group__usbd__interface__gr.js new file mode 100644 index 0000000..5bbb218 --- /dev/null +++ b/docs/Driver/html/group__usbd__interface__gr.js @@ -0,0 +1,59 @@ +var group__usbd__interface__gr = +[ + [ "USBD Device Events", "group__USBD__dev__events.html", "group__USBD__dev__events" ], + [ "USBD Endpoint Events", "group__USBD__ep__events.html", "group__USBD__ep__events" ], + [ "ARM_DRIVER_USBD", "group__usbd__interface__gr.html#structARM__DRIVER__USBD", [ + [ "GetVersion", "group__usbd__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__usbd__interface__gr.html#a52045edf0f555a0f0ecdf37a5e169f7a", null ], + [ "Initialize", "group__usbd__interface__gr.html#a84439aa5677d330d257a4b43e48d6426", null ], + [ "Uninitialize", "group__usbd__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__usbd__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "DeviceConnect", "group__usbd__interface__gr.html#a71d312ce5c5335c6a035da55c25848e4", null ], + [ "DeviceDisconnect", "group__usbd__interface__gr.html#adff9dd8a0dc764e78b0271113ae3b0af", null ], + [ "DeviceGetState", "group__usbd__interface__gr.html#ab906727173cbe8372bdc26ef20581baa", null ], + [ "DeviceRemoteWakeup", "group__usbd__interface__gr.html#a649343be3fcfc44431d19f51d13e03b3", null ], + [ "DeviceSetAddress", "group__usbd__interface__gr.html#a4e927b5593f416a8641e12016208b5d5", null ], + [ "ReadSetupPacket", "group__usbd__interface__gr.html#ab5593bf9bb516cc7b36c6072fc55260f", null ], + [ "EndpointConfigure", "group__usbd__interface__gr.html#a9fcafd15149d35022b05cf3c396e714e", null ], + [ "EndpointUnconfigure", "group__usbd__interface__gr.html#ad45578fffbd046231f69aa058d29bba5", null ], + [ "EndpointStall", "group__usbd__interface__gr.html#a6fbcf63ac9f962787cddc8f11a44dccb", null ], + [ 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"vbus", "group__usbd__interface__gr.html#aa961d5fb2bd3d2960578f1ac3b903070", null ], + [ "speed", "group__usbd__interface__gr.html#a220859a8b5da0232739a11cbe7f79fc5", null ], + [ "active", "group__usbd__interface__gr.html#ab22b96a3efad48f5a542f46c1b224800", null ], + [ "reserved", "group__usbd__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_USBD_SignalDeviceEvent_t", "group__usbd__interface__gr.html#ga7c1878799699ddd34cec696da499f7bd", null ], + [ "ARM_USBD_SignalEndpointEvent_t", "group__usbd__interface__gr.html#gaae754763700fc5059a6bde57ea2d4e2c", null ], + [ "ARM_USBD_GetVersion", "group__usbd__interface__gr.html#ga1dcb8b7790f0e3613ee3da77e5fd18fc", null ], + [ "ARM_USBD_GetCapabilities", "group__usbd__interface__gr.html#ga178d01ab7896e1c675b90bbccfe8ea7d", null ], + [ "ARM_USBD_Initialize", "group__usbd__interface__gr.html#ga60b95c9c0c6767ff5938464cfd748f81", null ], + [ "ARM_USBD_Uninitialize", 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b/docs/Driver/html/group__usbd__interface__gr_structARM__DRIVER__USBD.js new file mode 100644 index 0000000..75d7d44 --- /dev/null +++ b/docs/Driver/html/group__usbd__interface__gr_structARM__DRIVER__USBD.js @@ -0,0 +1,21 @@ +var group__usbd__interface__gr_structARM__DRIVER__USBD = +[ + [ "GetVersion", "group__usbd__interface__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__usbd__interface__gr.html#a52045edf0f555a0f0ecdf37a5e169f7a", null ], + [ "Initialize", "group__usbd__interface__gr.html#a84439aa5677d330d257a4b43e48d6426", null ], + [ "Uninitialize", "group__usbd__interface__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__usbd__interface__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "DeviceConnect", "group__usbd__interface__gr.html#a71d312ce5c5335c6a035da55c25848e4", null ], + [ "DeviceDisconnect", "group__usbd__interface__gr.html#adff9dd8a0dc764e78b0271113ae3b0af", null ], + [ "DeviceGetState", "group__usbd__interface__gr.html#ab906727173cbe8372bdc26ef20581baa", null ], + [ "DeviceRemoteWakeup", "group__usbd__interface__gr.html#a649343be3fcfc44431d19f51d13e03b3", null ], + [ "DeviceSetAddress", "group__usbd__interface__gr.html#a4e927b5593f416a8641e12016208b5d5", null ], + [ "ReadSetupPacket", "group__usbd__interface__gr.html#ab5593bf9bb516cc7b36c6072fc55260f", null ], + [ "EndpointConfigure", "group__usbd__interface__gr.html#a9fcafd15149d35022b05cf3c396e714e", null ], + [ "EndpointUnconfigure", "group__usbd__interface__gr.html#ad45578fffbd046231f69aa058d29bba5", null ], + [ "EndpointStall", "group__usbd__interface__gr.html#a6fbcf63ac9f962787cddc8f11a44dccb", null ], + [ "EndpointTransfer", "group__usbd__interface__gr.html#a0cc21434bc57e696fabf0207925fe5ff", null ], + [ "EndpointTransferGetResult", "group__usbd__interface__gr.html#a217e38c26bbcdecbad8c984753b2597a", null ], + [ "EndpointTransferAbort", "group__usbd__interface__gr.html#a4e36fd46291f71e4a748264e2f6ae431", null ], + [ "GetFrameNumber", "group__usbd__interface__gr.html#a31d1785d6d46f75241ebbf6b5a6b4919", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbd__interface__gr_structARM__USBD__CAPABILITIES.js b/docs/Driver/html/group__usbd__interface__gr_structARM__USBD__CAPABILITIES.js new file mode 100644 index 0000000..d405711 --- /dev/null +++ b/docs/Driver/html/group__usbd__interface__gr_structARM__USBD__CAPABILITIES.js @@ -0,0 +1,7 @@ +var group__usbd__interface__gr_structARM__USBD__CAPABILITIES = +[ + [ "vbus_detection", "group__usbd__interface__gr.html#a6673fc1aa13f62122ecf51e52a605c6e", null ], + [ "event_vbus_on", "group__usbd__interface__gr.html#a53f95b9ecb7c84197947e7542501c7d3", null ], + [ "event_vbus_off", "group__usbd__interface__gr.html#a72d905bc20735bafda40d73c91829709", null ], + [ "reserved", "group__usbd__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbd__interface__gr_structARM__USBD__STATE.js b/docs/Driver/html/group__usbd__interface__gr_structARM__USBD__STATE.js new file mode 100644 index 0000000..7000d8f --- /dev/null +++ b/docs/Driver/html/group__usbd__interface__gr_structARM__USBD__STATE.js @@ -0,0 +1,7 @@ +var group__usbd__interface__gr_structARM__USBD__STATE = +[ + [ "vbus", "group__usbd__interface__gr.html#aa961d5fb2bd3d2960578f1ac3b903070", null ], + [ "speed", "group__usbd__interface__gr.html#a220859a8b5da0232739a11cbe7f79fc5", null ], + [ "active", "group__usbd__interface__gr.html#ab22b96a3efad48f5a542f46c1b224800", null ], + [ "reserved", "group__usbd__interface__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbh__hci__gr.html b/docs/Driver/html/group__usbh__hci__gr.html new file mode 100644 index 0000000..81172f9 --- /dev/null +++ b/docs/Driver/html/group__usbh__hci__gr.html @@ -0,0 +1,583 @@ + + + + + +USB OHCI/EHCI +CMSIS-Driver: USB OHCI/EHCI + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Data Structures | +Typedefs | +Functions
+
+
USB OHCI/EHCI
USB Host Interface
+
+
+ +

Driver API for USB OHCI/EHCI. +More...

+ + + + + + + + +

+Data Structures

struct  ARM_DRIVER_USBH_HCI
 Access structure of USB Host HCI (OHCI/EHCI) Driver. More...
 
struct  ARM_USBH_HCI_CAPABILITIES
 USB Host HCI (OHCI/EHCI) Driver Capabilities. More...
 
+ + + + +

+Typedefs

typedef void(* ARM_USBH_HCI_Interrupt_t )(void)
 Pointer to Interrupt Handler Routine. More...
 
+ + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_USBH_HCI_GetVersion (void)
 Get USB Host HCI (OHCI/EHCI) driver version. More...
 
ARM_USBH_HCI_CAPABILITIES ARM_USBH_HCI_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_USBH_HCI_Initialize (ARM_USBH_HCI_Interrupt_t *cb_interrupt)
 Initialize USB Host HCI (OHCI/EHCI) Interface. More...
 
int32_t ARM_USBH_HCI_Uninitialize (void)
 De-initialize USB Host HCI (OHCI/EHCI) Interface. More...
 
int32_t ARM_USBH_HCI_PowerControl (ARM_POWER_STATE state)
 Control USB Host HCI (OHCI/EHCI) Interface Power. More...
 
int32_t ARM_USBH_HCI_PortVbusOnOff (uint8_t port, bool vbus)
 USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off. More...
 
void ARM_USBH_HCI_Interrupt (void)
 USB Host HCI Interrupt Handler. More...
 
+

Description

+

Driver API for USB OHCI/EHCI.

+

OHCI and EHCI compliant interfaces have memory mapped registers that are used to control the USB host.

+

Only certain functionalities (interrupts, VBUS control, power control) require device specific interface which is provided through functions of the struct ARM_DRIVER_USBH_HCI (functionality accessed with the struct ARM_DRIVER_USBH is not needed).

+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_USBH_HCI
+
+

Access structure of USB Host HCI (OHCI/EHCI) Driver.

+

The functions of the USB Host HCI (OHCI/EHCI) driver are accessed by function pointers. Refer to Common Driver Functions for overview information.

+

Each instance of an USBH provides such an access struct. The instance is indicated by a postfix in the symbol name of the access struct, for example:

+
    +
  • Driver_USBH0_HCI is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_USBH1_HCI is the name of the access struct of the second instance (no. 1).
    • +
+

A configuration setting in the middleware allows connecting the middleware to a specific driver instance Driver_USBHn_HCI. The default is 0, which connects a middleware to the first instance of a driver.

+
Note
The struct must remain unchanged.
+
+ + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_USBH_HCI_GetVersion : Get USB Host HCI (OHCI/EHCI) driver version. More...
 
ARM_USBH_HCI_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_USBH_HCI_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_USBH_HCI_Interrupt_t cb_interrupt)
 Pointer to ARM_USBH_HCI_Initialize : Initialize USB Host HCI (OHCI/EHCI) Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_USBH_HCI_Uninitialize : De-initialize USB Host HCI (OHCI/EHCI) Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_USBH_HCI_PowerControl : Control USB Host HCI (OHCI/EHCI) Interface Power. More...
 
int32_t(* PortVbusOnOff )(uint8_t port, bool vbus)
 Pointer to ARM_USBH_HCI_PortVbusOnOff : USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_USBH_HCI_GetVersion : Get USB Host HCI (OHCI/EHCI) driver version.

+ +
+
+ +
+
+ + + + +
ARM_USBH_HCI_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_USBH_HCI_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_USBH_HCI_Interrupt_t cb_interrupt)
+
+ +

Pointer to ARM_USBH_HCI_Initialize : Initialize USB Host HCI (OHCI/EHCI) Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_USBH_HCI_Uninitialize : De-initialize USB Host HCI (OHCI/EHCI) Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_USBH_HCI_PowerControl : Control USB Host HCI (OHCI/EHCI) Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* PortVbusOnOff)(uint8_t port, bool vbus)
+
+ +

Pointer to ARM_USBH_HCI_PortVbusOnOff : USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_USBH_HCI_CAPABILITIES
+
+

USB Host HCI (OHCI/EHCI) Driver Capabilities.

+

A USB Host HCI (OHCI/EHCI) driver can be implemented with different capabilities. The data fields of this structure encode the capabilities implemented by this driver.

+

Returned by:

+ +
Note
The struct must remain unchanged.
+
+ + + + + + + +
Data Fields
+uint32_t +port_mask: 15 +Root HUB available Ports Mask.
+uint32_t +reserved: 17 +Reserved (must be zero)
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
ARM_USBH_HCI_Interrupt_t
+
+ +

Pointer to Interrupt Handler Routine.

+

Provides the typedef for the interrupt handler ARM_USBH_HCI_Interrupt.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_USBH_HCI_GetVersion (void )
+
+ +

Get USB Host HCI (OHCI/EHCI) driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_USBH_HCI_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_USBH Driver_USBH0_HCI;
+
ARM_DRIVER_USBH *drv_info;
+
+
void setup_usbh (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_USBH0_HCI;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_USBH_HCI_CAPABILITIES ARM_USBH_HCI_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_USBH_HCI_CAPABILITIES
+

The function ARM_USBH_HCI_GetCapabilities returns information about capabilities in this driver implementation. The data fields of the structure ARM_USBH_HCI_CAPABILITIES encode various capabilities, for example available HUB ports.

+

Example:

+
extern ARM_DRIVER_USBH_HCI Driver_USBH0_HCI;
+
ARM_DRIVER_USBH_HCI *drv_info;
+
+
void read_capabilities (void) {
+
ARM_USBH_HCI_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_USBH0_HCI;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_HCI_Initialize (ARM_USBH_HCI_Interrupt_t * cb_interrupt)
+
+ +

Initialize USB Host HCI (OHCI/EHCI) Interface.

+
Parameters
+ + +
[in]cb_interruptPointer to Interrupt Handler Routine
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_HCI_Initialize initializes the USB Host HCI (OHCI/EHCI) interface. It is called when the middleware component starts operation.

+

The function performs the following operations:

+
    +
  • Initializes the resources needed for the USBH interface.
    • +
  • Registers the ARM_USBH_HCI_Interrupt interrupt handler.
    • +
+

The parameter cb_interrupt is a pointer to the interrupt routine of the OHCI/EHCI peripheral that needs to be registered. This function is called as ECHI Interrupt Service Handler.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_HCI_Uninitialize (void )
+
+ +

De-initialize USB Host HCI (OHCI/EHCI) Interface.

+
Returns
Status Error Codes
+

The function ARM_USBH_HCI_Uninitialize de-initializes the resources of USB Host HCI (OHCI/EHCI) interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_HCI_PowerControl (ARM_POWER_STATE state)
+
+ +

Control USB Host HCI (OHCI/EHCI) Interface Power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_HCI_PowerControl operates the power modes of the USB Host HCI (OHCI/EHCI) interface.

+

The parameter state sets the operation and can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_USBH_HCI_PortVbusOnOff (uint8_t port,
bool vbus 
)
+
+ +

USB Host HCI (OHCI/EHCI) Root HUB Port VBUS on/off.

+
Parameters
+ + + +
[in]portRoot HUB Port Number
[in]vbus
    +
  • false VBUS off
    • +
  • true VBUS on
    • +
+
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_HCI_PortVbusOnOff controls the VBUS signal of the specified port. Most HCI complained USB Host controllers do not require this optional function. It is only required when a external VBUS interface (for example via I/O pin) is required.

+ +
+
+ +
+
+ + + + + + + + +
void ARM_USBH_HCI_Interrupt (void )
+
+ +

USB Host HCI Interrupt Handler.

+
Returns
none
+

The function ARM_USBH_HCI_Interrupt is called from the USBH HCI Interrupt Handler.

+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usbh__hci__gr.js b/docs/Driver/html/group__usbh__hci__gr.js new file mode 100644 index 0000000..c976d23 --- /dev/null +++ b/docs/Driver/html/group__usbh__hci__gr.js @@ -0,0 +1,23 @@ +var group__usbh__hci__gr = +[ + [ "ARM_DRIVER_USBH_HCI", "group__usbh__hci__gr.html#structARM__DRIVER__USBH__HCI", [ + [ "GetVersion", "group__usbh__hci__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__usbh__hci__gr.html#a7a41769405bb3bb4cc9eaba26cf220d4", null ], + [ "Initialize", "group__usbh__hci__gr.html#a40cbaad9fd2458b1008d31e1469903bb", null ], + [ "Uninitialize", "group__usbh__hci__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__usbh__hci__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "PortVbusOnOff", "group__usbh__hci__gr.html#ab859fb9f73a60ffa1ce71ed961d4744f", null ] + ] ], + [ "ARM_USBH_HCI_CAPABILITIES", "group__usbh__hci__gr.html#structARM__USBH__HCI__CAPABILITIES", [ + [ "port_mask", "group__usbh__hci__gr.html#ac37c09b54483c2a1e41fa8a976721fc4", null ], + [ "reserved", "group__usbh__hci__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_USBH_HCI_Interrupt_t", "group__usbh__hci__gr.html#gac60df9d1f2b3a769f2c30141800a9806", null ], + [ "ARM_USBH_HCI_GetVersion", "group__usbh__hci__gr.html#ga10109d0c2a9a128225b5e893d3f72d08", null ], + [ "ARM_USBH_HCI_GetCapabilities", "group__usbh__hci__gr.html#gae607c49ca97202500631473a901e8c2b", null ], + [ "ARM_USBH_HCI_Initialize", "group__usbh__hci__gr.html#gabc1392a544cb64491b5ea5ce6590d832", null ], + [ "ARM_USBH_HCI_Uninitialize", "group__usbh__hci__gr.html#gaacb68fdf201cdb1846b31642a760f041", null ], + [ "ARM_USBH_HCI_PowerControl", "group__usbh__hci__gr.html#ga27fa5ec8854cd9877bbef4abffe9a12b", null ], + [ "ARM_USBH_HCI_PortVbusOnOff", "group__usbh__hci__gr.html#gade1e83403c6ea965fe3e6c4c21fbbded", null ], + [ "ARM_USBH_HCI_Interrupt", "group__usbh__hci__gr.html#ga79d3c2509ed869c8d7d1485acad7b6c6", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbh__hci__gr_structARM__DRIVER__USBH__HCI.js b/docs/Driver/html/group__usbh__hci__gr_structARM__DRIVER__USBH__HCI.js new file mode 100644 index 0000000..e9fecc1 --- /dev/null +++ b/docs/Driver/html/group__usbh__hci__gr_structARM__DRIVER__USBH__HCI.js @@ -0,0 +1,9 @@ +var group__usbh__hci__gr_structARM__DRIVER__USBH__HCI = +[ + [ "GetVersion", "group__usbh__hci__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__usbh__hci__gr.html#a7a41769405bb3bb4cc9eaba26cf220d4", null ], + [ "Initialize", "group__usbh__hci__gr.html#a40cbaad9fd2458b1008d31e1469903bb", null ], + [ "Uninitialize", "group__usbh__hci__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__usbh__hci__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "PortVbusOnOff", "group__usbh__hci__gr.html#ab859fb9f73a60ffa1ce71ed961d4744f", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbh__hci__gr_structARM__USBH__HCI__CAPABILITIES.js b/docs/Driver/html/group__usbh__hci__gr_structARM__USBH__HCI__CAPABILITIES.js new file mode 100644 index 0000000..cb70035 --- /dev/null +++ b/docs/Driver/html/group__usbh__hci__gr_structARM__USBH__HCI__CAPABILITIES.js @@ -0,0 +1,5 @@ +var group__usbh__hci__gr_structARM__USBH__HCI__CAPABILITIES = +[ + [ "port_mask", "group__usbh__hci__gr.html#ac37c09b54483c2a1e41fa8a976721fc4", null ], + [ "reserved", "group__usbh__hci__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbh__host__gr.html b/docs/Driver/html/group__usbh__host__gr.html new file mode 100644 index 0000000..8516fe6 --- /dev/null +++ b/docs/Driver/html/group__usbh__host__gr.html @@ -0,0 +1,1509 @@ + + + + + +USB Host +CMSIS-Driver: USB Host + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content | +Data Structures | +Typedefs | +Functions
+
+
USB Host
USB Host Interface
+
+
+ +

Driver API for USB Host. +More...

+ + + + + + + + + + + +

+Content

 USBH Port Events
 The USB Host driver generates Port call back events that are notified via the function ARM_USBH_SignalPortEvent.
 
 USBH Pipe Events
 The USB Host driver generates Pipe call back events that are notified via the function ARM_USBH_SignalPipeEvent.
 
 USBH Packet Information
 Specify USB packet information used by the function ARM_USBH_PipeTransfer.
 
+ + + + + + + + + + +

+Data Structures

struct  ARM_DRIVER_USBH
 Access structure of USB Host Driver. More...
 
struct  ARM_USBH_CAPABILITIES
 USB Host Driver Capabilities. More...
 
struct  ARM_USBH_PORT_STATE
 USB Host Port State. More...
 
+ + + + + + + + + + +

+Typedefs

typedef uint32_t ARM_USBH_PIPE_HANDLE
 USB Host Pipe Handle. More...
 
typedef void(* ARM_USBH_SignalPortEvent_t )(uint8_t port, uint32_t event)
 Pointer to ARM_USBH_SignalPortEvent : Signal Root HUB Port Event. More...
 
typedef void(* ARM_USBH_SignalPipeEvent_t )(ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t event)
 Pointer to ARM_USBH_SignalPipeEvent : Signal Pipe Event. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Functions

ARM_DRIVER_VERSION ARM_USBH_GetVersion (void)
 Get driver version. More...
 
ARM_USBH_CAPABILITIES ARM_USBH_GetCapabilities (void)
 Get driver capabilities. More...
 
int32_t ARM_USBH_Initialize (ARM_USBH_SignalPortEvent_t cb_port_event, ARM_USBH_SignalPipeEvent_t cb_pipe_event)
 Initialize USB Host Interface. More...
 
int32_t ARM_USBH_Uninitialize (void)
 De-initialize USB Host Interface. More...
 
int32_t ARM_USBH_PowerControl (ARM_POWER_STATE state)
 Control USB Host Interface Power. More...
 
int32_t ARM_USBH_PortVbusOnOff (uint8_t port, bool vbus)
 Root HUB Port VBUS on/off. More...
 
int32_t ARM_USBH_PortReset (uint8_t port)
 Do Root HUB Port Reset. More...
 
int32_t ARM_USBH_PortSuspend (uint8_t port)
 Suspend Root HUB Port (stop generating SOFs). More...
 
int32_t ARM_USBH_PortResume (uint8_t port)
 Resume Root HUB Port (start generating SOFs). More...
 
ARM_USBH_PORT_STATE ARM_USBH_PortGetState (uint8_t port)
 Get current Root HUB Port State. More...
 
ARM_USBH_PIPE_HANDLE ARM_USBH_PipeCreate (uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size, uint8_t ep_interval)
 Create Pipe in System. More...
 
int32_t ARM_USBH_PipeModify (ARM_USBH_PIPE_HANDLE pipe_hndl, uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint16_t ep_max_packet_size)
 Modify Pipe in System. More...
 
int32_t ARM_USBH_PipeDelete (ARM_USBH_PIPE_HANDLE pipe_hndl)
 Delete Pipe from System. More...
 
int32_t ARM_USBH_PipeReset (ARM_USBH_PIPE_HANDLE pipe_hndl)
 Reset Pipe. More...
 
int32_t ARM_USBH_PipeTransfer (ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t packet, uint8_t *data, uint32_t num)
 Transfer packets through USB Pipe. More...
 
uint32_t ARM_USBH_PipeTransferGetResult (ARM_USBH_PIPE_HANDLE pipe_hndl)
 Get result of USB Pipe transfer. More...
 
int32_t ARM_USBH_PipeTransferAbort (ARM_USBH_PIPE_HANDLE pipe_hndl)
 Abort current USB Pipe transfer. More...
 
uint16_t ARM_USBH_GetFrameNumber (void)
 Get current USB Frame Number. More...
 
void ARM_USBH_SignalPortEvent (uint8_t port, uint32_t event)
 Signal Root HUB Port Event. More...
 
void ARM_USBH_SignalPipeEvent (ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t event)
 Signal Pipe Event. More...
 
+

Description

+

Driver API for USB Host.

+

Data Structure Documentation

+ +
+
+ + + + +
struct ARM_DRIVER_USBH
+
+

Access structure of USB Host Driver.

+

The functions of the USB Host driver are accessed by function pointers. Refer to Common Driver Functions for overview information.

+

Each instance of an USBH provides such an access struct. The instance is indicated by a postfix in the symbol name of the access struct, for example:

+
    +
  • Driver_USBH0 is the name of the access struct of the first instance (no. 0).
    • +
  • Driver_USBH1 is the name of the access struct of the second instance (no. 1).
    • +
+

A configuration setting in the middleware allows connecting the middleware to a specific driver instance Driver_USBHn. The default is 0, which connects a middleware to the first instance of a driver.

+
Note
The struct must remain unchanged.
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

Data Fields

ARM_DRIVER_VERSION(* GetVersion )(void)
 Pointer to ARM_USBH_GetVersion : Get driver version. More...
 
ARM_USBH_CAPABILITIES(* GetCapabilities )(void)
 Pointer to ARM_USBH_GetCapabilities : Get driver capabilities. More...
 
int32_t(* Initialize )(ARM_USBH_SignalPortEvent_t cb_port_event, ARM_USBH_SignalPipeEvent_t cb_pipe_event)
 Pointer to ARM_USBH_Initialize : Initialize USB Host Interface. More...
 
int32_t(* Uninitialize )(void)
 Pointer to ARM_USBH_Uninitialize : De-initialize USB Host Interface. More...
 
int32_t(* PowerControl )(ARM_POWER_STATE state)
 Pointer to ARM_USBH_PowerControl : Control USB Host Interface Power. More...
 
int32_t(* PortVbusOnOff )(uint8_t port, bool vbus)
 Pointer to ARM_USBH_PortVbusOnOff : Root HUB Port VBUS on/off. More...
 
int32_t(* PortReset )(uint8_t port)
 Pointer to ARM_USBH_PortReset : Do Root HUB Port Reset. More...
 
int32_t(* PortSuspend )(uint8_t port)
 Pointer to ARM_USBH_PortSuspend : Suspend Root HUB Port (stop generating SOFs). More...
 
int32_t(* PortResume )(uint8_t port)
 Pointer to ARM_USBH_PortResume : Resume Root HUB Port (start generating SOFs). More...
 
ARM_USBH_PORT_STATE(* PortGetState )(uint8_t port)
 Pointer to ARM_USBH_PortGetState : Get current Root HUB Port State. More...
 
ARM_USBH_PIPE_HANDLE(* PipeCreate )(uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size, uint8_t ep_interval)
 Pointer to ARM_USBH_PipeCreate : Create Pipe in System. More...
 
int32_t(* PipeModify )(ARM_USBH_PIPE_HANDLE pipe_hndl, uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint16_t ep_max_packet_size)
 Pointer to ARM_USBH_PipeModify : Modify Pipe in System. More...
 
int32_t(* PipeDelete )(ARM_USBH_PIPE_HANDLE pipe_hndl)
 Pointer to ARM_USBH_PipeDelete : Delete Pipe from System. More...
 
int32_t(* PipeReset )(ARM_USBH_PIPE_HANDLE pipe_hndl)
 Pointer to ARM_USBH_PipeReset : Reset Pipe. More...
 
int32_t(* PipeTransfer )(ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t packet, uint8_t *data, uint32_t num)
 Pointer to ARM_USBH_PipeTransfer : Transfer packets through USB Pipe. More...
 
uint32_t(* PipeTransferGetResult )(ARM_USBH_PIPE_HANDLE pipe_hndl)
 Pointer to ARM_USBH_PipeTransferGetResult : Get result of USB Pipe transfer. More...
 
int32_t(* PipeTransferAbort )(ARM_USBH_PIPE_HANDLE pipe_hndl)
 Pointer to ARM_USBH_PipeTransferAbort : Abort current USB Pipe transfer. More...
 
uint16_t(* GetFrameNumber )(void)
 Pointer to ARM_USBH_GetFrameNumber : Get current USB Frame Number. More...
 
+

Field Documentation

+ +
+
+ + + + +
ARM_DRIVER_VERSION(* GetVersion)(void)
+
+ +

Pointer to ARM_USBH_GetVersion : Get driver version.

+ +
+
+ +
+
+ + + + +
ARM_USBH_CAPABILITIES(* GetCapabilities)(void)
+
+ +

Pointer to ARM_USBH_GetCapabilities : Get driver capabilities.

+ +
+
+ +
+
+ + + + +
int32_t(* Initialize)(ARM_USBH_SignalPortEvent_t cb_port_event, ARM_USBH_SignalPipeEvent_t cb_pipe_event)
+
+ +

Pointer to ARM_USBH_Initialize : Initialize USB Host Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* Uninitialize)(void)
+
+ +

Pointer to ARM_USBH_Uninitialize : De-initialize USB Host Interface.

+ +
+
+ +
+
+ + + + +
int32_t(* PowerControl)(ARM_POWER_STATE state)
+
+ +

Pointer to ARM_USBH_PowerControl : Control USB Host Interface Power.

+ +
+
+ +
+
+ + + + +
int32_t(* PortVbusOnOff)(uint8_t port, bool vbus)
+
+ +

Pointer to ARM_USBH_PortVbusOnOff : Root HUB Port VBUS on/off.

+ +
+
+ +
+
+ + + + +
int32_t(* PortReset)(uint8_t port)
+
+ +

Pointer to ARM_USBH_PortReset : Do Root HUB Port Reset.

+ +
+
+ +
+
+ + + + +
int32_t(* PortSuspend)(uint8_t port)
+
+ +

Pointer to ARM_USBH_PortSuspend : Suspend Root HUB Port (stop generating SOFs).

+ +
+
+ +
+
+ + + + +
int32_t(* PortResume)(uint8_t port)
+
+ +

Pointer to ARM_USBH_PortResume : Resume Root HUB Port (start generating SOFs).

+ +
+
+ +
+
+ + + + +
ARM_USBH_PORT_STATE(* PortGetState)(uint8_t port)
+
+ +

Pointer to ARM_USBH_PortGetState : Get current Root HUB Port State.

+ +
+
+ +
+
+ + + + +
ARM_USBH_PIPE_HANDLE(* PipeCreate)(uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_max_packet_size, uint8_t ep_interval)
+
+ +

Pointer to ARM_USBH_PipeCreate : Create Pipe in System.

+ +
+
+ +
+
+ + + + +
int32_t(* PipeModify)(ARM_USBH_PIPE_HANDLE pipe_hndl, uint8_t dev_addr, uint8_t dev_speed, uint8_t hub_addr, uint8_t hub_port, uint16_t ep_max_packet_size)
+
+ +

Pointer to ARM_USBH_PipeModify : Modify Pipe in System.

+ +
+
+ +
+
+ + + + +
int32_t(* PipeDelete)(ARM_USBH_PIPE_HANDLE pipe_hndl)
+
+ +

Pointer to ARM_USBH_PipeDelete : Delete Pipe from System.

+ +
+
+ +
+
+ + + + +
int32_t(* PipeReset)(ARM_USBH_PIPE_HANDLE pipe_hndl)
+
+ +

Pointer to ARM_USBH_PipeReset : Reset Pipe.

+ +
+
+ +
+
+ + + + +
int32_t(* PipeTransfer)(ARM_USBH_PIPE_HANDLE pipe_hndl, uint32_t packet, uint8_t *data, uint32_t num)
+
+ +

Pointer to ARM_USBH_PipeTransfer : Transfer packets through USB Pipe.

+ +
+
+ +
+
+ + + + +
uint32_t(* PipeTransferGetResult)(ARM_USBH_PIPE_HANDLE pipe_hndl)
+
+ +

Pointer to ARM_USBH_PipeTransferGetResult : Get result of USB Pipe transfer.

+ +
+
+ +
+
+ + + + +
int32_t(* PipeTransferAbort)(ARM_USBH_PIPE_HANDLE pipe_hndl)
+
+ +

Pointer to ARM_USBH_PipeTransferAbort : Abort current USB Pipe transfer.

+ +
+
+ +
+
+ + + + +
uint16_t(* GetFrameNumber)(void)
+
+ +

Pointer to ARM_USBH_GetFrameNumber : Get current USB Frame Number.

+ +
+
+ +
+
+ +
+
+ + + + +
struct ARM_USBH_CAPABILITIES
+
+

USB Host Driver Capabilities.

+

A USB Host driver can be implemented with different capabilities. The data fields of this structure encode the capabilities implemented by this driver.

+

Returned by:

+ +
Note
The struct must remain unchanged.
+
+ + + + + + + + + + + + + + + + + + + +
Data Fields
+uint32_t +port_mask: 15 +Root HUB available Ports Mask.
+uint32_t +auto_split: 1 +Automatic SPLIT packet handling.
+uint32_t +event_connect: 1 +Signal Connect event.
+uint32_t +event_disconnect: 1 +Signal Disconnect event.
+uint32_t +event_overcurrent: 1 +Signal Overcurrent event.
+uint32_t +reserved: 13 +Reserved (must be zero)
+ +
+
+ +
+
+ + + + +
struct ARM_USBH_PORT_STATE
+
+

USB Host Port State.

+

This structure stores information about the state of the USB Host Port. The data fields encode whether a device is connected to the port, if port overcurrent is detected, and the port speed.

+

Returned by:

+ +
+ + + + + + + + + + + + + +
Data Fields
+uint32_t +connected: 1 +USB Host Port connected flag.
+uint32_t +overcurrent: 1 +USB Host Port overcurrent flag.
+uint32_t +speed: 2 +USB Host Port speed setting (ARM_USB_SPEED_xxx)
+uint32_t +reserved: 28 +
+ +
+
+

Typedef Documentation

+ +
+
+ + + + +
uint32_t ARM_USBH_PIPE_HANDLE
+
+ +

USB Host Pipe Handle.

+

Each pipe is identified through a unique number, which is created by the function ARM_USBH_PipeCreate.

+

Parameter for:

+ +

Retruned by:

+ + +
+
+ +
+
+ + + + +
ARM_USBH_SignalPortEvent_t
+
+ +

Pointer to ARM_USBH_SignalPortEvent : Signal Root HUB Port Event.

+

Provides the typedef for the callback function ARM_USBH_SignalPortEvent.

+

Parameter for:

+ + +
+
+ +
+
+ + + + +
ARM_USBH_SignalPipeEvent_t
+
+ +

Pointer to ARM_USBH_SignalPipeEvent : Signal Pipe Event.

+

Provides the typedef for the callback function ARM_USBH_SignalPipeEvent.

+

Parameter for:

+ + +
+
+

Function Documentation

+ +
+
+ + + + + + + + +
ARM_DRIVER_VERSION ARM_USBH_GetVersion (void )
+
+ +

Get driver version.

+
Returns
ARM_DRIVER_VERSION
+

The function ARM_USBH_GetVersion returns version information of the driver implementation in ARM_DRIVER_VERSION

+
    +
  • API version is the version of the CMSIS-Driver specification used to implement this driver.
    • +
  • Driver version is source code version of the actual driver implementation.
    • +
+

Example:

+
extern ARM_DRIVER_USBH Driver_USBH0;
+
ARM_DRIVER_USBH *drv_info;
+
+
void setup_usbh (void) {
+
ARM_DRIVER_VERSION version;
+
+
drv_info = &Driver_USBH0;
+
version = drv_info->GetVersion ();
+
if (version.api < 0x10A) { // requires at minimum API version 1.10 or higher
+
// error handling
+
return;
+
}
+
}
+
+
+
+ +
+
+ + + + + + + + +
ARM_USBH_CAPABILITIES ARM_USBH_GetCapabilities (void )
+
+ +

Get driver capabilities.

+
Returns
ARM_USBH_CAPABILITIES
+

The function ARM_USBH_GetCapabilities returns information about capabilities in this driver implementation. The data fields of the structure ARM_USBH_CAPABILITIES encode various capabilities, for example available HUB ports or if the hardware can generate signal events using the ARM_USBH_SignalPortEvent callback function.

+

Example:

+
extern ARM_DRIVER_USBH Driver_USBH0;
+
ARM_DRIVER_USBH *drv_info;
+
+
void read_capabilities (void) {
+
ARM_USBH_CAPABILITIES drv_capabilities;
+
+
drv_info = &Driver_USBH0;
+
drv_capabilities = drv_info->GetCapabilities ();
+
// interrogate capabilities
+
+
}
+
+
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_USBH_Initialize (ARM_USBH_SignalPortEvent_t cb_port_event,
ARM_USBH_SignalPipeEvent_t cb_pipe_event 
)
+
+ +

Initialize USB Host Interface.

+
Parameters
+ + + +
[in]cb_port_eventPointer to ARM_USBH_SignalPortEvent
[in]cb_pipe_eventPointer to ARM_USBH_SignalPipeEvent
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_Initialize initializes the USB Host interface. It is called when the middleware component starts operation.

+

The function performs the following operations:

+ +

The parameter cb_port_event is a pointer to the ARM_USBH_SignalPortEvent callback function; use a NULL pointer when no port callback signals are required.

+

The parameter cb_pipe_event is a pointer to the ARM_USBH_SignalPipeEvent callback function.

+

Example:

+ + +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_Uninitialize (void )
+
+ +

De-initialize USB Host Interface.

+
Returns
Status Error Codes
+

The function ARM_USBH_Uninitialize de-initializes the resources of USB Host interface.

+

It is called when the middleware component stops operation and releases the software resources used by the interface.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_PowerControl (ARM_POWER_STATE state)
+
+ +

Control USB Host Interface Power.

+
Parameters
+ + +
[in]statePower state
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_PowerControl operates the power modes of the USB Host interface.

+

The parameter state sets the operation and can have the following values:

+
    +
  • ARM_POWER_FULL : set-up peripheral for data transfers, enable interrupts (NVIC) and optionally DMA. Can be called multiple times. If the peripheral is already in this mode the function performs no operation and returns with ARM_DRIVER_OK.
    • +
  • ARM_POWER_LOW : may use power saving. Returns ARM_DRIVER_ERROR_UNSUPPORTED when not implemented.
    • +
  • ARM_POWER_OFF : terminates any pending data transfers, disables peripheral, disables related interrupts and DMA.
    • +
+

Refer to Function Call Sequence for more information.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
int32_t ARM_USBH_PortVbusOnOff (uint8_t port,
bool vbus 
)
+
+ +

Root HUB Port VBUS on/off.

+
Parameters
+ + + +
[in]portRoot HUB Port Number
[in]vbus
    +
  • false VBUS off
    • +
  • true VBUS on
    • +
+
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_PortVbusOnOff controls the VBUS signal of the specified port.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_PortReset (uint8_t port)
+
+ +

Do Root HUB Port Reset.

+
Parameters
+ + +
[in]portRoot HUB Port Number
+
+
+
Returns
Status Error Codes
+

Executes reset signalling on the specified port.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_PortSuspend (uint8_t port)
+
+ +

Suspend Root HUB Port (stop generating SOFs).

+
Parameters
+ + +
[in]portRoot HUB Port Number
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_PortSuspend auspends USB signaling on the specified port.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_PortResume (uint8_t port)
+
+ +

Resume Root HUB Port (start generating SOFs).

+
Parameters
+ + +
[in]portRoot HUB Port Number
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_PortResume resumes USB signaling on the specified port.

+ +
+
+ +
+
+ + + + + + + + +
ARM_USBH_PORT_STATE ARM_USBH_PortGetState (uint8_t port)
+
+ +

Get current Root HUB Port State.

+
Parameters
+ + +
[in]portRoot HUB Port Number
+
+
+
Returns
Port State ARM_USBH_PORT_STATE
+

The function ARM_USBH_PortGetState returns the current state of the specified port.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ARM_USBH_PIPE_HANDLE ARM_USBH_PipeCreate (uint8_t dev_addr,
uint8_t dev_speed,
uint8_t hub_addr,
uint8_t hub_port,
uint8_t ep_addr,
uint8_t ep_type,
uint16_t ep_max_packet_size,
uint8_t ep_interval 
)
+
+ +

Create Pipe in System.

+
Parameters
+ + + + + + + + + +
[in]dev_addrDevice Address
[in]dev_speedDevice Speed
[in]hub_addrHub Address
[in]hub_portHub Port
[in]ep_addrEndpoint Address
    +
  • ep_addr.0..3: Address
    • +
  • ep_addr.7: Direction
    • +
+
[in]ep_typeEndpoint Type (ARM_USB_ENDPOINT_xxx)
[in]ep_max_packet_sizeEndpoint Maximum Packet Size
[in]ep_intervalEndpoint Polling Interval
+
+
+
Returns
Pipe Handle ARM_USBH_PIPE_HANDLE
+

The function ARM_USBH_PipeCreate creates a pipe for transfers (allocates required resources and configures the pipe).

+

The parameters specify pipe information (connection between host and device endpoint):

+
    +
  • device: address and speed
    • +
  • hub (optional): hub address and number of the hub port to which the device is connected
    • +
  • endpoint: address, type, maximum packet size and polling interval
    • +
+

The function returns an pipe handle that is used for all subsequent operations on that pipe. In case of errors an invalid handle (NULL) is returned.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_USBH_PipeModify (ARM_USBH_PIPE_HANDLE pipe_hndl,
uint8_t dev_addr,
uint8_t dev_speed,
uint8_t hub_addr,
uint8_t hub_port,
uint16_t ep_max_packet_size 
)
+
+ +

Modify Pipe in System.

+
Parameters
+ + + + + + + +
[in]pipe_hndlPipe Handle
[in]dev_addrDevice Address
[in]dev_speedDevice Speed
[in]hub_addrHub Address
[in]hub_portHub Port
[in]ep_max_packet_sizeEndpoint Maximum Packet Size
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_PipeModify modifies a pipe configuration that was created with ARM_USBH_PipeCreate.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_PipeDelete (ARM_USBH_PIPE_HANDLE pipe_hndl)
+
+ +

Delete Pipe from System.

+
Parameters
+ + +
[in]pipe_hndlPipe Handle
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_PipeDelete deletes a pipe that was created with ARM_USBH_PipeCreate (deactivates the pipe and releases used resources).

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_PipeReset (ARM_USBH_PIPE_HANDLE pipe_hndl)
+
+ +

Reset Pipe.

+
Parameters
+ + +
[in]pipe_hndlPipe Handle
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_PipeReset clears Halt condition and resets data toggle on the specified pipe.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
int32_t ARM_USBH_PipeTransfer (ARM_USBH_PIPE_HANDLE pipe_hndl,
uint32_t packet,
uint8_t * data,
uint32_t num 
)
+
+ +

Transfer packets through USB Pipe.

+
Parameters
+ + + + + +
[in]pipe_hndlPipe Handle
[in]packetPacket information
[in]dataPointer to buffer with data to send or for data to receive
[in]numNumber of data bytes to transfer
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_PipeTransfer generates packets for sending or receiving data from an USB Endpoint.

+

The function specifies the buffer with data to send or for data to receive and the number of bytes to transfer (must be multiple of device endpoint maximum packet size for receive). It also specifies USBH Packet Information with parameter packet.

+

The function is non-blocking and returns as soon as the driver starts the operation on the specified pipe. During the operation it is not allowed to call this function again on the same pipe. Also the data buffer must stay allocated and the contents of data must not be modified.

+

Operation is completed when the the requested number of data bytes have been transferred and is indicated with ARM_USBH_EVENT_TRANSFER_COMPLETE event. It can also finish earlier on reception of different handshake tokens which are also indicated through USBH Pipe Events.

+

Transfer operation can be aborted by calling ARM_USBH_PipeTransferAbort.

+ +
+
+ +
+
+ + + + + + + + +
uint32_t ARM_USBH_PipeTransferGetResult (ARM_USBH_PIPE_HANDLE pipe_hndl)
+
+ +

Get result of USB Pipe transfer.

+
Parameters
+ + +
[in]pipe_hndlPipe Handle
+
+
+
Returns
number of successfully transferred data bytes
+

The function ARM_USBH_PipeTransferGetResult returns the number of successfully transferred data bytes started by ARM_USBH_PipeTransfer operation.

+ +
+
+ +
+
+ + + + + + + + +
int32_t ARM_USBH_PipeTransferAbort (ARM_USBH_PIPE_HANDLE pipe_hndl)
+
+ +

Abort current USB Pipe transfer.

+
Parameters
+ + +
[in]pipe_hndlPipe Handle
+
+
+
Returns
Status Error Codes
+

The function ARM_USBH_PipeTransferAbort aborts an active pipe transfer started by ARM_USBH_PipeTransfer.

+ +
+
+ +
+
+ + + + + + + + +
uint16_t ARM_USBH_GetFrameNumber (void )
+
+ +

Get current USB Frame Number.

+
Returns
Frame Number
+

The function ARM_USBH_GetFrameNumber returns the sequential 11-bit frame number of the last Start of Frame (SOF) packet.

+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
void ARM_USBH_SignalPortEvent (uint8_t port,
uint32_t event 
)
+
+ +

Signal Root HUB Port Event.

+
Parameters
+ + + +
[in]portRoot HUB Port Number
[in]eventUSBH Port Events
+
+
+
Returns
none
+

The function ARM_USBH_SignalPortEvent is a callback function registered by the function ARM_USBH_Initialize.

+

The parameter port specifies the root hub port number.
+The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

Not every event is necessarily generated by the driver. This depends on the implemented capabilities stored in the data fields of the structure ARM_USBH_CAPABILITIES, which can be retrieved with the function ARM_USBH_GetCapabilities.

+

The following events can be generated:

+ + + + + + + + + + + + + + + + + +
Parameter event Bit Description supported when ARM_USBH_CAPABILITIES
ARM_USBH_EVENT_CONNECT 0 Occurs when USB Device connects to the Host. data field event_connect= 1
ARM_USBH_EVENT_DISCONNECT 1 Occurs when USB Device disconnects from the Host. data field event_disconnect= 1
ARM_USBH_EVENT_OVERCURRENT 2 Occurs when USB Overcurrent it detected. data field event_overcurrent= 1
ARM_USBH_EVENT_RESET 3 Occurs when USB Reset is completed after calling ARM_USBH_PortReset. always supported
ARM_USBH_EVENT_SUSPEND 4 Occurs when USB Suspend is detected. always supported
ARM_USBH_EVENT_RESUME 5 Occurs when USB Resume is detected. always supported
ARM_USBH_EVENT_REMOTE_WAKEUP 6 Occurs when USB Remote wakeup is detected. always supported
+ +
+
+ +
+
+ + + + + + + + + + + + + + + + + + +
void ARM_USBH_SignalPipeEvent (ARM_USBH_PIPE_HANDLE pipe_hndl,
uint32_t event 
)
+
+ +

Signal Pipe Event.

+
Parameters
+ + + +
[in]pipe_hndlPipe Handle
[in]eventUSBH Pipe Events
+
+
+
Returns
none
+

The function ARM_USBH_SignalPipeEvent is a callback function registered by the function ARM_USBH_Initialize.

+

The parameter pipe_hndl specifies the pipe handle.
+The parameter event indicates one or more events that occurred during driver operation. Each event is encoded in a separate bit and therefore it is possible to signal multiple events within the same call.

+

The following events can be generated:

+ + + + + + + + + + + + + + + + + +
Parameter event BitDescription
ARM_USBH_EVENT_TRANSFER_COMPLETE 0 Occurs after all the data has been transferred without errors.
ARM_USBH_EVENT_HANDSHAKE_NAK 1 Occurs when NAK Handshake is received before all the data is transferred.
ARM_USBH_EVENT_HANDSHAKE_NYET 2 Occurs when NYET Handshake is received before all the data is transferred.
ARM_USBH_EVENT_HANDSHAKE_MDATA 3 Occurs when MDATA Handshake is received before all the data is transferred.
ARM_USBH_EVENT_HANDSHAKE_STALL 4 Occurs when STALL Handshake is received before all the data is transferred.
ARM_USBH_EVENT_HANDSHAKE_ERR 5 Occurs when ERR Handshake is received before all the data is transferred.
ARM_USBH_EVENT_BUS_ERROR 6 Occurs when bus error is detected before all the data is transferred.
+

See also:

+
    +
  • ARM_USBH_PipeCreate
    • +
+ +
+
+
+
+ + + + diff --git a/docs/Driver/html/group__usbh__host__gr.js b/docs/Driver/html/group__usbh__host__gr.js new file mode 100644 index 0000000..1cdeb14 --- /dev/null +++ b/docs/Driver/html/group__usbh__host__gr.js @@ -0,0 +1,63 @@ +var group__usbh__host__gr = +[ + [ "USBH Port Events", "group__USBH__port__events.html", "group__USBH__port__events" ], + [ "USBH Pipe Events", "group__USBH__pipe__events.html", "group__USBH__pipe__events" ], + [ "USBH Packet Information", "group__USBH__packets.html", "group__USBH__packets" ], + [ "ARM_DRIVER_USBH", "group__usbh__host__gr.html#structARM__DRIVER__USBH", [ + [ "GetVersion", "group__usbh__host__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__usbh__host__gr.html#aaba1d9458e32389c21c3d899f9cb9313", null ], + [ "Initialize", "group__usbh__host__gr.html#a5bf141e46b7ced3abe3466cae4d811fb", null ], + [ "Uninitialize", "group__usbh__host__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__usbh__host__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "PortVbusOnOff", "group__usbh__host__gr.html#ab859fb9f73a60ffa1ce71ed961d4744f", null ], + [ "PortReset", "group__usbh__host__gr.html#a95125e80b07640860a7e16f510eca506", null ], + [ "PortSuspend", "group__usbh__host__gr.html#ab8be30d2d44a6447c8c085439ef117fb", null ], + [ "PortResume", "group__usbh__host__gr.html#a79126109256c1ccef901f22bc36ddc1d", null ], + [ "PortGetState", "group__usbh__host__gr.html#a84c391c0db065fa27b672eef6002905b", null ], + [ "PipeCreate", "group__usbh__host__gr.html#a7ce5ca579a8c535434187ad05f596fbd", null ], + [ "PipeModify", "group__usbh__host__gr.html#a3efae6fe31a53f7ecd765ba6db99992e", null ], + [ "PipeDelete", "group__usbh__host__gr.html#ab2f8047e89786bb7a459fb9c6c3f03d5", null ], + [ "PipeReset", "group__usbh__host__gr.html#afe91e3e22bc401546d033cb9554550b7", null ], + [ "PipeTransfer", "group__usbh__host__gr.html#a495b069fadf5ba5b069bfdec6cda8b88", null ], + [ "PipeTransferGetResult", "group__usbh__host__gr.html#a18369bada042ff5557ff919056636a62", null ], + [ "PipeTransferAbort", "group__usbh__host__gr.html#ab82fb8b02ff81156098b8210c0344f5e", null ], + [ "GetFrameNumber", "group__usbh__host__gr.html#a31d1785d6d46f75241ebbf6b5a6b4919", null ] + ] ], + [ "ARM_USBH_CAPABILITIES", "group__usbh__host__gr.html#structARM__USBH__CAPABILITIES", [ + [ "port_mask", "group__usbh__host__gr.html#ac37c09b54483c2a1e41fa8a976721fc4", null ], + [ "auto_split", "group__usbh__host__gr.html#a37eab684b9a8aa496bfec9fede42fe27", null ], + [ "event_connect", "group__usbh__host__gr.html#ae76b779cb9fdf447b20c8b6beed2d534", null ], + [ "event_disconnect", "group__usbh__host__gr.html#ab83941051cac8e19807b887354dc42fc", null ], + [ "event_overcurrent", "group__usbh__host__gr.html#acd3087b3a4a7691595dd75568c12d696", null ], + [ "reserved", "group__usbh__host__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_USBH_PORT_STATE", "group__usbh__host__gr.html#structARM__USBH__PORT__STATE", [ + [ "connected", "group__usbh__host__gr.html#abf1a0792d6af28877b0abd141d5524ac", null ], + [ "overcurrent", "group__usbh__host__gr.html#ae4b5761b8d095bee008a94856ceca46b", null ], + [ "speed", "group__usbh__host__gr.html#a220859a8b5da0232739a11cbe7f79fc5", null ], + [ "reserved", "group__usbh__host__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] + ] ], + [ "ARM_USBH_PIPE_HANDLE", "group__usbh__host__gr.html#ga2e4d0ebd0851ba7bf364ae1d8948672c", null ], + [ "ARM_USBH_SignalPortEvent_t", "group__usbh__host__gr.html#ga61edcbb6ee863fe87abee488d78e1051", null ], + [ "ARM_USBH_SignalPipeEvent_t", "group__usbh__host__gr.html#ga1a32ebfe0db4a002aae2b0c0f8ece30c", null ], + [ "ARM_USBH_GetVersion", "group__usbh__host__gr.html#gab11e67e11e7a0edbc8a1afa86b971784", null ], + [ "ARM_USBH_GetCapabilities", "group__usbh__host__gr.html#gadb509db50fdccfc7198dfd7ac54530d7", null ], + [ "ARM_USBH_Initialize", "group__usbh__host__gr.html#gad1e73f778c95dd46d4396e7741a97f0b", null ], + [ "ARM_USBH_Uninitialize", "group__usbh__host__gr.html#gafc2f18bc12bb0019f9cd1836dcca408d", null ], + [ "ARM_USBH_PowerControl", "group__usbh__host__gr.html#ga290a5e2e491da784e63be94699974d4a", null ], + [ "ARM_USBH_PortVbusOnOff", "group__usbh__host__gr.html#gaccca5ddd4a9d04388e7678a3aed3f6e4", null ], + [ "ARM_USBH_PortReset", "group__usbh__host__gr.html#gab99882e11ee03018da9ebe33797cc5ff", null ], + [ "ARM_USBH_PortSuspend", "group__usbh__host__gr.html#ga620f8852a70a47a581001ed3050436d6", null ], + [ "ARM_USBH_PortResume", "group__usbh__host__gr.html#gab438b55ada37e2987e77e105f061f2de", null ], + [ "ARM_USBH_PortGetState", "group__usbh__host__gr.html#gaea4ec5453c1d5fe37a2507d3cb4713bc", null ], + [ "ARM_USBH_PipeCreate", "group__usbh__host__gr.html#ga30dcc05151a98c5a8f6fe17e83777fe0", null ], + [ "ARM_USBH_PipeModify", "group__usbh__host__gr.html#ga2076a7ae55f603859c726e57b061ac73", null ], + [ "ARM_USBH_PipeDelete", "group__usbh__host__gr.html#gab2135041e6d481f186015f36fa0d0521", null ], + [ "ARM_USBH_PipeReset", "group__usbh__host__gr.html#ga7f5a605dbe98e450e6965d515fde65a7", null ], + [ "ARM_USBH_PipeTransfer", "group__usbh__host__gr.html#ga817d503a24ad8927fa362c8f6394920d", null ], + [ "ARM_USBH_PipeTransferGetResult", "group__usbh__host__gr.html#ga85baa421345a5b92881ad190d72ca47f", null ], + [ "ARM_USBH_PipeTransferAbort", "group__usbh__host__gr.html#ga1d4048a076aed71e585cea96a21f0afb", null ], + [ "ARM_USBH_GetFrameNumber", "group__usbh__host__gr.html#ga9dc305fc234c9987b9efd679b5042cc9", null ], + [ "ARM_USBH_SignalPortEvent", "group__usbh__host__gr.html#ga53619da2a3d56934629084b0d5c4700c", null ], + [ "ARM_USBH_SignalPipeEvent", "group__usbh__host__gr.html#gae58d36afd83a0e32b07e89fb7145c9de", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbh__host__gr_structARM__DRIVER__USBH.js b/docs/Driver/html/group__usbh__host__gr_structARM__DRIVER__USBH.js new file mode 100644 index 0000000..50cfe91 --- /dev/null +++ b/docs/Driver/html/group__usbh__host__gr_structARM__DRIVER__USBH.js @@ -0,0 +1,21 @@ +var group__usbh__host__gr_structARM__DRIVER__USBH = +[ + [ "GetVersion", "group__usbh__host__gr.html#a8834b281da48583845c044a81566c1b3", null ], + [ "GetCapabilities", "group__usbh__host__gr.html#aaba1d9458e32389c21c3d899f9cb9313", null ], + [ "Initialize", "group__usbh__host__gr.html#a5bf141e46b7ced3abe3466cae4d811fb", null ], + [ "Uninitialize", "group__usbh__host__gr.html#adcf20681a1402869ecb5c6447fada17b", null ], + [ "PowerControl", "group__usbh__host__gr.html#aba8f1c8019af95ffe19c32403e3240ef", null ], + [ "PortVbusOnOff", "group__usbh__host__gr.html#ab859fb9f73a60ffa1ce71ed961d4744f", null ], + [ "PortReset", "group__usbh__host__gr.html#a95125e80b07640860a7e16f510eca506", null ], + [ "PortSuspend", "group__usbh__host__gr.html#ab8be30d2d44a6447c8c085439ef117fb", null ], + [ "PortResume", "group__usbh__host__gr.html#a79126109256c1ccef901f22bc36ddc1d", null ], + [ "PortGetState", "group__usbh__host__gr.html#a84c391c0db065fa27b672eef6002905b", null ], + [ "PipeCreate", "group__usbh__host__gr.html#a7ce5ca579a8c535434187ad05f596fbd", null ], + [ "PipeModify", "group__usbh__host__gr.html#a3efae6fe31a53f7ecd765ba6db99992e", null ], + [ "PipeDelete", "group__usbh__host__gr.html#ab2f8047e89786bb7a459fb9c6c3f03d5", null ], + [ "PipeReset", "group__usbh__host__gr.html#afe91e3e22bc401546d033cb9554550b7", null ], + [ "PipeTransfer", "group__usbh__host__gr.html#a495b069fadf5ba5b069bfdec6cda8b88", null ], + [ "PipeTransferGetResult", "group__usbh__host__gr.html#a18369bada042ff5557ff919056636a62", null ], + [ "PipeTransferAbort", "group__usbh__host__gr.html#ab82fb8b02ff81156098b8210c0344f5e", null ], + [ "GetFrameNumber", "group__usbh__host__gr.html#a31d1785d6d46f75241ebbf6b5a6b4919", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbh__host__gr_structARM__USBH__CAPABILITIES.js b/docs/Driver/html/group__usbh__host__gr_structARM__USBH__CAPABILITIES.js new file mode 100644 index 0000000..7114462 --- /dev/null +++ b/docs/Driver/html/group__usbh__host__gr_structARM__USBH__CAPABILITIES.js @@ -0,0 +1,9 @@ +var group__usbh__host__gr_structARM__USBH__CAPABILITIES = +[ + [ "port_mask", "group__usbh__host__gr.html#ac37c09b54483c2a1e41fa8a976721fc4", null ], + [ "auto_split", "group__usbh__host__gr.html#a37eab684b9a8aa496bfec9fede42fe27", null ], + [ "event_connect", "group__usbh__host__gr.html#ae76b779cb9fdf447b20c8b6beed2d534", null ], + [ "event_disconnect", "group__usbh__host__gr.html#ab83941051cac8e19807b887354dc42fc", null ], + [ "event_overcurrent", "group__usbh__host__gr.html#acd3087b3a4a7691595dd75568c12d696", null ], + [ "reserved", "group__usbh__host__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbh__host__gr_structARM__USBH__PORT__STATE.js b/docs/Driver/html/group__usbh__host__gr_structARM__USBH__PORT__STATE.js new file mode 100644 index 0000000..dfc9e34 --- /dev/null +++ b/docs/Driver/html/group__usbh__host__gr_structARM__USBH__PORT__STATE.js @@ -0,0 +1,7 @@ +var group__usbh__host__gr_structARM__USBH__PORT__STATE = +[ + [ "connected", "group__usbh__host__gr.html#abf1a0792d6af28877b0abd141d5524ac", null ], + [ "overcurrent", "group__usbh__host__gr.html#ae4b5761b8d095bee008a94856ceca46b", null ], + [ "speed", "group__usbh__host__gr.html#a220859a8b5da0232739a11cbe7f79fc5", null ], + [ "reserved", "group__usbh__host__gr.html#aa43c4c21b173ada1b6b7568956f0d650", null ] +]; \ No newline at end of file diff --git a/docs/Driver/html/group__usbh__interface__gr.html b/docs/Driver/html/group__usbh__interface__gr.html new file mode 100644 index 0000000..b698099 --- /dev/null +++ b/docs/Driver/html/group__usbh__interface__gr.html @@ -0,0 +1,148 @@ + + + + + +USB Host Interface +CMSIS-Driver: USB Host Interface + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+Content
+
+
USB Host Interface
USB Interface
+
+
+ +

Driver API for USB Host Peripheral (Driver_USBH.h) +More...

+ + + + + + + + +

+Content

 USB Host
 Driver API for USB Host.
 
 USB OHCI/EHCI
 Driver API for USB OHCI/EHCI.
 
+

Description

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Driver API for USB Host Peripheral (Driver_USBH.h)

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USB Host API

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The header file Driver_USBH.h defines the API for the USB Host Driver interface used by middleware components. The driver implementation itself is a typical part of the Device Family Pack, which provides entry points to the interface as function pointers in the struct ARM_DRIVER_USBH. This structure can be available several times in each interface to control multiple USBH interfaces.

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Driver_USBH.h also defines callback routines, which are categorized in port event callbacks and pipe event callbacks. Callbacks are called by the driver, in interrupt context when an appropriate event occurs, to signal port related events (ARM_USBH_SignalPortEvent) and pipe related events (ARM_USBH_SignalPipeEvent).

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+ + + + diff --git a/docs/Driver/html/group__usbh__interface__gr.js b/docs/Driver/html/group__usbh__interface__gr.js new file mode 100644 index 0000000..90e7464 --- /dev/null +++ b/docs/Driver/html/group__usbh__interface__gr.js @@ -0,0 +1,5 @@ +var group__usbh__interface__gr = +[ + [ "USB Host", "group__usbh__host__gr.html", "group__usbh__host__gr" ], + [ "USB OHCI/EHCI", "group__usbh__hci__gr.html", "group__usbh__hci__gr" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/image006.png b/docs/Driver/html/image006.png new file mode 100644 index 0000000..857f040 Binary files /dev/null and b/docs/Driver/html/image006.png differ diff --git a/docs/Driver/html/index.html b/docs/Driver/html/index.html new file mode 100644 index 0000000..71348ae --- /dev/null +++ b/docs/Driver/html/index.html @@ -0,0 +1,163 @@ + + + + + +Overview +CMSIS-Driver: Overview + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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Overview
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The CMSIS-Driver specification is a software API that describes peripheral driver interfaces for middleware stacks and user applications. The CMSIS-Driver API is designed to be generic and independent of a specific RTOS making it reusable across a wide range of supported microcontroller devices. The CMSIS-Driver API covers a wide range of use cases for the supported peripheral types, but can not take every potential use-case into account. Over time, it is indented to extend the CMSIS-Driver API with further groups to cover new use-cases.

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The CMSIS Software Pack publishes the API Interface under the Component Class CMSIS Driver with header files and a documentation. These header files are the reference for the implementation of the standardized peripheral driver interfaces. These implementations are published typically in the Device Family Pack of a related microcontroller family under the Component Class CMSIS Driver. A Device Family Pack may contain additional interfaces in the Component Class Device to extend the standard Peripheral Drivers covered by this CMSIS-Driver specification with additional device specific interfaces for example for Memory BUS, GPIO, or DMA.

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The standard peripheral driver interfaces connect microcontroller peripherals for example with middleware that implements communication stacks, file systems, or graphic user interfaces. Each peripheral driver interface may provide multiple instances reflecting the multiple physical interfaces of the same type in a device. For example the two physical SPI interfaces are reflected with a separate Access Struct for SPI1 and SPI2. The Access Struct is the interface of a driver to the middleware component or the user application.

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+Peripheral Driver Interfaces and Middleware
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The following CMSIS-Driver API groups are defined:

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  • CAN: Interface to CAN bus peripheral.
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  • Ethernet: Interface to Ethernet MAC and PHY peripheral.
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  • I2C: Multi-master Serial Single-Ended Bus interface driver.
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  • MCI: Memory Card Interface for SD/MMC memory.
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  • NAND: NAND Flash Memory interface driver.
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  • Flash: Flash Memory interface driver.
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  • SAI: Serial audio interface driver (I2s, PCM, AC'97, TDM, MSB/LSB Justified).
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  • SPI: Serial Peripheral Interface Bus driver.
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  • Storage: Storage device interface driver.
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  • USART: Universal Synchronous and Asynchronous Receiver/Transmitter interface driver.
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  • USB: Interface driver for USB Host and USB Device communication.
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CMSIS-Driver in ARM::CMSIS Pack

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The following files relevant to CMSIS-Driver are present in the ARM::CMSIS Pack directories:

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Directory Content
CMSIS/Documentation/Driver This documentation
CMSIS/Driver/Include Driver header files (Driver_interface.h, Driver_Common.h)
CMSIS/Driver/DriverTemplates Driver implementation template files (Driver_interface.c)
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0},disableSelection:function(){return this.bind((a.support.selectstart?"selectstart":"mousedown")+".ui-disableSelection",function(e){e.preventDefault()})},enableSelection:function(){return this.unbind(".ui-disableSelection")}});a.each(["Width","Height"],function(g,e){var f=e==="Width"?["Left","Right"]:["Top","Bottom"],h=e.toLowerCase(),k={innerWidth:a.fn.innerWidth,innerHeight:a.fn.innerHeight,outerWidth:a.fn.outerWidth,outerHeight:a.fn.outerHeight};function j(m,l,i,n){a.each(f,function(){l-=parseFloat(a.curCSS(m,"padding"+this,true))||0;if(i){l-=parseFloat(a.curCSS(m,"border"+this+"Width",true))||0}if(n){l-=parseFloat(a.curCSS(m,"margin"+this,true))||0}});return l}a.fn["inner"+e]=function(i){if(i===d){return k["inner"+e].call(this)}return this.each(function(){a(this).css(h,j(this,i)+"px")})};a.fn["outer"+e]=function(i,l){if(typeof i!=="number"){return k["outer"+e].call(this,i)}return this.each(function(){a(this).css(h,j(this,i,true,l)+"px")})}});function c(g,e){var j=g.nodeName.toLowerCase();if("area"===j){var i=g.parentNode,h=i.name,f;if(!g.href||!h||i.nodeName.toLowerCase()!=="map"){return false}f=a("img[usemap=#"+h+"]")[0];return !!f&&b(f)}return(/input|select|textarea|button|object/.test(j)?!g.disabled:"a"==j?g.href||e:e)&&b(g)}function b(e){return !a(e).parents().andSelf().filter(function(){return a.curCSS(this,"visibility")==="hidden"||a.expr.filters.hidden(this)}).length}a.extend(a.expr[":"],{data:function(g,f,e){return !!a.data(g,e[3])},focusable:function(e){return c(e,!isNaN(a.attr(e,"tabindex")))},tabbable:function(g){var e=a.attr(g,"tabindex"),f=isNaN(e);return(f||e>=0)&&c(g,!f)}});a(function(){var e=document.body,f=e.appendChild(f=document.createElement("div"));f.offsetHeight;a.extend(f.style,{minHeight:"100px",height:"auto",padding:0,borderWidth:0});a.support.minHeight=f.offsetHeight===100;a.support.selectstart="onselectstart" in f;e.removeChild(f).style.display="none"});a.extend(a.ui,{plugin:{add:function(f,g,j){var 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a.call(b(this),e,f)})}}b.widget=function(f,h,e){var g=f.split(".")[0],j;f=f.split(".")[1];j=g+"-"+f;if(!e){e=h;h=b.Widget}b.expr[":"][j]=function(k){return !!b.data(k,f)};b[g]=b[g]||{};b[g][f]=function(k,l){if(arguments.length){this._createWidget(k,l)}};var i=new h();i.options=b.extend(true,{},i.options);b[g][f].prototype=b.extend(true,i,{namespace:g,widgetName:f,widgetEventPrefix:b[g][f].prototype.widgetEventPrefix||f,widgetBaseClass:j},e);b.widget.bridge(f,b[g][f])};b.widget.bridge=function(f,e){b.fn[f]=function(i){var g=typeof i==="string",h=Array.prototype.slice.call(arguments,1),j=this;i=!g&&h.length?b.extend.apply(null,[true,i].concat(h)):i;if(g&&i.charAt(0)==="_"){return j}if(g){this.each(function(){var k=b.data(this,f),l=k&&b.isFunction(k[i])?k[i].apply(k,h):k;if(l!==k&&l!==d){j=l;return false}})}else{this.each(function(){var k=b.data(this,f);if(k){k.option(i||{})._init()}else{b.data(this,f,new e(i,this))}})}return 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http://jquery.org/license + * + * http://docs.jquery.com/UI/Mouse + * + * Depends: + * jquery.ui.widget.js + */ +(function(b,c){var a=false;b(document).mouseup(function(d){a=false});b.widget("ui.mouse",{options:{cancel:":input,option",distance:1,delay:0},_mouseInit:function(){var d=this;this.element.bind("mousedown."+this.widgetName,function(e){return d._mouseDown(e)}).bind("click."+this.widgetName,function(e){if(true===b.data(e.target,d.widgetName+".preventClickEvent")){b.removeData(e.target,d.widgetName+".preventClickEvent");e.stopImmediatePropagation();return false}});this.started=false},_mouseDestroy:function(){this.element.unbind("."+this.widgetName)},_mouseDown:function(f){if(a){return}(this._mouseStarted&&this._mouseUp(f));this._mouseDownEvent=f;var e=this,g=(f.which==1),d=(typeof this.options.cancel=="string"&&f.target.nodeName?b(f.target).closest(this.options.cancel).length:false);if(!g||d||!this._mouseCapture(f)){return true}this.mouseDelayMet=!this.options.delay;if(!this.mouseDelayMet){this._mouseDelayTimer=setTimeout(function(){e.mouseDelayMet=true},this.options.delay)}if(this._mouseDistanceMet(f)&&this._mouseDelayMet(f)){this._mouseStarted=(this._mouseStart(f)!==false);if(!this._mouseStarted){f.preventDefault();return true}}if(true===b.data(f.target,this.widgetName+".preventClickEvent")){b.removeData(f.target,this.widgetName+".preventClickEvent")}this._mouseMoveDelegate=function(h){return e._mouseMove(h)};this._mouseUpDelegate=function(h){return e._mouseUp(h)};b(document).bind("mousemove."+this.widgetName,this._mouseMoveDelegate).bind("mouseup."+this.widgetName,this._mouseUpDelegate);f.preventDefault();a=true;return true},_mouseMove:function(d){if(b.browser.msie&&!(document.documentMode>=9)&&!d.button){return this._mouseUp(d)}if(this._mouseStarted){this._mouseDrag(d);return d.preventDefault()}if(this._mouseDistanceMet(d)&&this._mouseDelayMet(d)){this._mouseStarted=(this._mouseStart(this._mouseDownEvent,d)!==false);(this._mouseStarted?this._mouseDrag(d):this._mouseUp(d))}return !this._mouseStarted},_mouseUp:function(d){b(document).unbind("mousemove."+this.widgetName,this._mouseMoveDelegate).unbind("mouseup."+this.widgetName,this._mouseUpDelegate);if(this._mouseStarted){this._mouseStarted=false;if(d.target==this._mouseDownEvent.target){b.data(d.target,this.widgetName+".preventClickEvent",true)}this._mouseStop(d)}return false},_mouseDistanceMet:function(d){return(Math.max(Math.abs(this._mouseDownEvent.pageX-d.pageX),Math.abs(this._mouseDownEvent.pageY-d.pageY))>=this.options.distance)},_mouseDelayMet:function(d){return this.mouseDelayMet},_mouseStart:function(d){},_mouseDrag:function(d){},_mouseStop:function(d){},_mouseCapture:function(d){return true}})})(jQuery);(function(c,d){c.widget("ui.resizable",c.ui.mouse,{widgetEventPrefix:"resize",options:{alsoResize:false,animate:false,animateDuration:"slow",animateEasing:"swing",aspectRatio:false,autoHide:false,containment:false,ghost:false,grid:false,handles:"e,s,se",helper:false,maxHeight:null,maxWidth:null,minHeight:10,minWidth:10,zIndex:1000},_create:function(){var f=this,k=this.options;this.element.addClass("ui-resizable");c.extend(this,{_aspectRatio:!!(k.aspectRatio),aspectRatio:k.aspectRatio,originalElement:this.element,_proportionallyResizeElements:[],_helper:k.helper||k.ghost||k.animate?k.helper||"ui-resizable-helper":null});if(this.element[0].nodeName.match(/canvas|textarea|input|select|button|img/i)){this.element.wrap(c('
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');if(/sw|se|ne|nw/.test(j)){h.css({zIndex:++k.zIndex})}if("se"==j){h.addClass("ui-icon ui-icon-gripsmall-diagonal-se")}this.handles[j]=".ui-resizable-"+j;this.element.append(h)}}this._renderAxis=function(q){q=q||this.element;for(var n in this.handles){if(this.handles[n].constructor==String){this.handles[n]=c(this.handles[n],this.element).show()}if(this.elementIsWrapper&&this.originalElement[0].nodeName.match(/textarea|input|select|button/i)){var o=c(this.handles[n],this.element),p=0;p=/sw|ne|nw|se|n|s/.test(n)?o.outerHeight():o.outerWidth();var m=["padding",/ne|nw|n/.test(n)?"Top":/se|sw|s/.test(n)?"Bottom":/^e$/.test(n)?"Right":"Left"].join("");q.css(m,p);this._proportionallyResize()}if(!c(this.handles[n]).length){continue}}};this._renderAxis(this.element);this._handles=c(".ui-resizable-handle",this.element).disableSelection();this._handles.mouseover(function(){if(!f.resizing){if(this.className){var i=this.className.match(/ui-resizable-(se|sw|ne|nw|n|e|s|w)/i)}f.axis=i&&i[1]?i[1]:"se"}});if(k.autoHide){this._handles.hide();c(this.element).addClass("ui-resizable-autohide").hover(function(){if(k.disabled){return}c(this).removeClass("ui-resizable-autohide");f._handles.show()},function(){if(k.disabled){return}if(!f.resizing){c(this).addClass("ui-resizable-autohide");f._handles.hide()}})}this._mouseInit()},destroy:function(){this._mouseDestroy();var e=function(g){c(g).removeClass("ui-resizable ui-resizable-disabled ui-resizable-resizing").removeData("resizable").unbind(".resizable").find(".ui-resizable-handle").remove()};if(this.elementIsWrapper){e(this.element);var f=this.element;f.after(this.originalElement.css({position:f.css("position"),width:f.outerWidth(),height:f.outerHeight(),top:f.css("top"),left:f.css("left")})).remove()}this.originalElement.css("resize",this.originalResizeStyle);e(this.originalElement);return this},_mouseCapture:function(f){var g=false;for(var e in this.handles){if(c(this.handles[e])[0]==f.target){g=true}}return !this.options.disabled&&g},_mouseStart:function(g){var j=this.options,f=this.element.position(),e=this.element;this.resizing=true;this.documentScroll={top:c(document).scrollTop(),left:c(document).scrollLeft()};if(e.is(".ui-draggable")||(/absolute/).test(e.css("position"))){e.css({position:"absolute",top:f.top,left:f.left})}this._renderProxy();var k=b(this.helper.css("left")),h=b(this.helper.css("top"));if(j.containment){k+=c(j.containment).scrollLeft()||0;h+=c(j.containment).scrollTop()||0}this.offset=this.helper.offset();this.position={left:k,top:h};this.size=this._helper?{width:e.outerWidth(),height:e.outerHeight()}:{width:e.width(),height:e.height()};this.originalSize=this._helper?{width:e.outerWidth(),height:e.outerHeight()}:{width:e.width(),height:e.height()};this.originalPosition={left:k,top:h};this.sizeDiff={width:e.outerWidth()-e.width(),height:e.outerHeight()-e.height()};this.originalMousePosition={left:g.pageX,top:g.pageY};this.aspectRatio=(typeof j.aspectRatio=="number")?j.aspectRatio:((this.originalSize.width/this.originalSize.height)||1);var i=c(".ui-resizable-"+this.axis).css("cursor");c("body").css("cursor",i=="auto"?this.axis+"-resize":i);e.addClass("ui-resizable-resizing");this._propagate("start",g);return true},_mouseDrag:function(e){var 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a(j){j=j||location.href;return"#"+j.replace(/^[^#]*#?(.*)$/,"$1")}$.fn[c]=function(j){return j?this.bind(c,j):this.trigger(c)};$.fn[c].delay=50;g[c]=$.extend(g[c],{setup:function(){if(d){return false}$(f.start)},teardown:function(){if(d){return false}$(f.stop)}});f=(function(){var j={},p,m=a(),k=function(q){return q},l=k,o=k;j.start=function(){p||n()};j.stop=function(){p&&clearTimeout(p);p=b};function n(){var r=a(),q=o(m);if(r!==m){l(m=r,q);$(e).trigger(c)}else{if(q!==m){location.href=location.href.replace(/#.*/,"")+q}}p=setTimeout(n,$.fn[c].delay)}$.browser.msie&&!d&&(function(){var q,r;j.start=function(){if(!q){r=$.fn[c].src;r=r&&r+a();q=$(' + + +
+
+
Reference
+
+
+
Here is a list of all modules:
+
[detail level 1234]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
oCommon Driver DefinitionsDefinitions common in all driver interfaces (Driver_Common.h)
|\Status Error CodesNegative return values of functions indicate errors occurred during execution
oCAN InterfaceDriver API for CAN Bus Peripheral (Driver_CAN.h)
|oStatus Error CodesStatus codes of the CAN driver
|oCAN Unit EventsCallback unit events notified via ARM_CAN_SignalUnitEvent
|oCAN Object EventsCallback objects events notified via ARM_CAN_SignalObjectEvent
|\CAN Control CodesCodes to configure the CAN driver
| oCAN IdentifierSet object to standard or extended
| oCAN Operation CodesSet CAN operation modes
| oCAN Bus Communication ModeSet or initialize the CAN bus
| oCAN Bit Timing CodesSet bit timing
| oCAN Filter Operation CodesSet CAN filter manipulation codes
| \CAN Object Configuration CodesCAN Object Configuration codes
oEthernet InterfaceEthernet common definitions (Driver_ETH.h)
|oMedia Interface TypesEthernet Media Interface type
|oEthernet MAC InterfaceDriver API for Ethernet MAC Peripheral (Driver_ETH_MAC.h)
||oEthernet MAC EventsThe Ethernet MAC driver generates call back events that are notified via the function ARM_ETH_MAC_SignalEvent
||oEthernet MAC Control CodesConfigure and control the Ethernet MAC using the ARM_ETH_MAC_Control
||oEthernet MAC Timer Control CodesControl codes for ARM_ETH_MAC_ControlTimer function
||\Ethernet MAC Frame Transmit FlagsSpecify frame transmit flags
|\Ethernet PHY InterfaceDriver API for Ethernet PHY Peripheral (Driver_ETH_PHY.h)
| \Ethernet PHY ModeSpecify operation modes of the Ethernet PHY interface
oI2C InterfaceDriver API for I2C Bus Peripheral (Driver_I2C.h)
|oI2C EventsThe I2C driver generates call back events that are notified via the function ARM_I2C_SignalEvent
|oI2C Control CodesMany parameters of the I2C driver are configured using the ARM_I2C_Control function
||oI2C Control CodesSpecify operation parameters and various controls
||\I2C Bus SpeedSpecify the I2C bus speed
|\I2C Address FlagsSpecify address flags
oMCI InterfaceDriver API for Memory Card Interface using SD/MMC interface (Driver_MCI.h)
|oMCI EventsThe MCI driver generates call back events that are notified via the function ARM_MCI_SignalEvent
|oMCI Control CodesConfigure and control the MCI using the ARM_MCI_Control
||oMCI ControlsConfigure and control the MCI interface
||oMCI Bus Speed ModeSpecify the bus speed mode
||oMCI Bus Data WidthSpecify the data bus width
||oMCI CMD Line ModeSpecify the CMD line mode (Push-Pull or Open Drain)
||\MCI Driver StrengthSpecify the driver strength
|oMCI Send Command FlagsSpecify various options for sending commands to the card and the expected response
|oMCI Transfer ControlsSpecify data transfer mode
|\MCI Card Power ControlsSpecify Memory Card Power supply voltage
oNAND InterfaceDriver API for NAND Flash Device Interface (Driver_NAND.h)
|oStatus Error CodesNegative values indicate errors (NAND has specific codes in addition to common Status Error Codes)
|oNAND EventsThe NAND driver generates call back events that are notified via the function ARM_NAND_SignalEvent
|oNAND FlagsSpecify Flag codes
|oNAND Control CodesMany parameters of the NAND driver are configured using the ARM_NAND_Control function
||oNAND Mode ControlsSpecify operation modes of the NAND interface
||oNAND Bus ModesSpecify bus mode of the NAND interface
||oNAND Data Bus WidthSpecify data bus width of the NAND interface
||\NAND Driver StrengthSpecify driver strength of the NAND interface
|oNAND ECC CodesSpecify ECC codes
|\NAND Sequence Execution CodesSpecify execution codes
oFlash InterfaceDriver API for Flash Device Interface (Driver_Flash.h)
|\Flash EventsThe Flash driver generates call back events that are notified via the function ARM_Flash_SignalEvent
oSAI InterfaceDriver API for Serial Audio Interface (Driver_SAI.h)
|oStatus Error CodesNegative values indicate errors (SAI has specific codes in addition to common Status Error Codes)
|oSAI EventsThe SAI driver generates call back events that are notified via the function ARM_SAI_SignalEvent
|\SAI Control CodesMany parameters of the SAI driver are configured using the ARM_SAI_Control function
| oSAI ConfigurationSpecify Transmitter/Receiver configuration
| \SAI ControlsSpecifies controls
oSPI InterfaceDriver API for SPI Bus Peripheral (Driver_SPI.h)
|oStatus Error CodesNegative values indicate errors (SPI has specific codes in addition to common Status Error Codes)
|oSPI EventsThe SPI driver generates call back events that are notified via the function ARM_SPI_SignalEvent
|\SPI Control CodesMany parameters of the SPI driver are configured using the ARM_SPI_Control function
| oSPI Mode ControlsSpecifies SPI mode
| oSPI Frame FormatDefines the frame format
| oSPI Data BitsDefines the number of data bits
| oSPI Bit OrderDefines the bit order
| oSPI Slave Select ModeSpecifies SPI slave select mode
| \SPI Miscellaneous ControlsSpecifies additional miscellaneous controls
oStorage InterfaceDriver API for Storage Device Interface (Driver_Storage.h)
|oUse of Storage APIs
|\Sample Use of Storage Driver
oUSART InterfaceDriver API for Universal Synchronous Asynchronous Receiver/Transmitter (Driver_USART.h)
|oStatus Error CodesNegative values indicate errors (USART has specific codes in addition to common Status Error Codes)
|oUSART EventsThe USART driver generates call back events that are notified via the function ARM_USART_SignalEvent
|\USART Control CodesMany parameters of the USART driver are configured using the ARM_USART_Control function
| oUSART Mode ControlSpecify USART mode
| oUSART Miscellaneous ControlSpecifies additional miscellaneous controls
| oUSART Data BitsDefines the number of data bits
| oUSART Parity BitDefines the parity bit
| oUSART Stop BitsDefines the number of stop bits
| oUSART Flow ControlSpecifies RTS/CTS flow control
| oUSART Clock PolarityDefines the clock polarity for the synchronous mode
| \USART Clock PhaseDefines the clock phase for the synchronous mode
\USB InterfaceUSB common definitions (Driver_USB.h)
 oUSB Device InterfaceDriver API for USB Device Peripheral (Driver_USBD.h)
 |oUSBD Device EventsThe USB Device driver generates Device call back events that are notified via the function ARM_USBD_SignalDeviceEvent
 |\USBD Endpoint EventsThe USB Device driver generates Endpoint call back events that are notified via the function ARM_USBD_SignalEndpointEvent
 oUSB Host InterfaceDriver API for USB Host Peripheral (Driver_USBH.h)
 |oUSB HostDriver API for USB Host
 |\USB OHCI/EHCIDriver API for USB OHCI/EHCI
 oUSB SpeedUSB Speed definitions
 \USB Endpoint TypeUSB Endpoint Type definitions
+ + + + + + + diff --git a/docs/Driver/html/modules.js b/docs/Driver/html/modules.js new file mode 100644 index 0000000..e42f728 --- /dev/null +++ b/docs/Driver/html/modules.js @@ -0,0 +1,15 @@ +var modules = +[ + [ "Common Driver Definitions", "group__common__drv__gr.html", "group__common__drv__gr" ], + [ "CAN Interface", "group__can__interface__gr.html", "group__can__interface__gr" ], + [ "Ethernet Interface", "group__eth__interface__gr.html", "group__eth__interface__gr" ], + [ "I2C Interface", "group__i2c__interface__gr.html", "group__i2c__interface__gr" ], + [ "MCI Interface", "group__mci__interface__gr.html", "group__mci__interface__gr" ], + [ "NAND Interface", "group__nand__interface__gr.html", "group__nand__interface__gr" ], + [ "Flash Interface", "group__flash__interface__gr.html", "group__flash__interface__gr" ], + [ "SAI Interface", "group__sai__interface__gr.html", "group__sai__interface__gr" ], + [ "SPI Interface", "group__spi__interface__gr.html", "group__spi__interface__gr" ], + [ "Storage Interface", "group__storage__interface__gr.html", "group__storage__interface__gr" ], + [ "USART Interface", "group__usart__interface__gr.html", "group__usart__interface__gr" ], + [ "USB Interface", "group__usb__interface__gr.html", "group__usb__interface__gr" ] +]; \ No newline at end of file diff --git a/docs/Driver/html/msc_inline_mscgraph_1.png b/docs/Driver/html/msc_inline_mscgraph_1.png new file mode 100644 index 0000000..c4e9862 Binary files /dev/null and b/docs/Driver/html/msc_inline_mscgraph_1.png differ diff --git a/docs/Driver/html/msc_inline_mscgraph_2.png b/docs/Driver/html/msc_inline_mscgraph_2.png new file mode 100644 index 0000000..6faed07 Binary files /dev/null and b/docs/Driver/html/msc_inline_mscgraph_2.png differ diff --git a/docs/Driver/html/nav_f.png b/docs/Driver/html/nav_f.png new file mode 100644 index 0000000..72a58a5 Binary files /dev/null and b/docs/Driver/html/nav_f.png differ diff --git a/docs/Driver/html/nav_g.png b/docs/Driver/html/nav_g.png new file mode 100644 index 0000000..2093a23 Binary files /dev/null and b/docs/Driver/html/nav_g.png differ diff --git a/docs/Driver/html/nav_h.png b/docs/Driver/html/nav_h.png new file mode 100644 index 0000000..33389b1 Binary files /dev/null and b/docs/Driver/html/nav_h.png differ diff --git a/docs/Driver/html/navtree.css b/docs/Driver/html/navtree.css new file mode 100644 index 0000000..41a9cb9 --- /dev/null +++ b/docs/Driver/html/navtree.css @@ -0,0 +1,143 @@ +#nav-tree .children_ul { + margin:0; + padding:4px; +} + +#nav-tree ul { + list-style:none outside none; + margin:0px; + padding:0px; +} + +#nav-tree li { + white-space:nowrap; + margin:0px; + padding:0px; +} + +#nav-tree .plus { + margin:0px; +} + +#nav-tree .selected { + background-image: url('tab_a.png'); + background-repeat:repeat-x; + color: #fff; + text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); +} + +#nav-tree img { + margin:0px; + padding:0px; + border:0px; + vertical-align: middle; +} + +#nav-tree a { + text-decoration:none; + padding:0px; + margin:0px; + outline:none; +} + +#nav-tree .label { + margin:0px; + padding:0px; + font: 12px 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; +} + +#nav-tree .label a { + padding:2px; +} + +#nav-tree .selected a { + text-decoration:none; + color:#fff; +} + +#nav-tree .children_ul { + margin:0px; + padding:0px; +} + +#nav-tree .item { + margin:0px; + padding:0px; +} + +#nav-tree { + padding: 0px 0px; + background-color: #FAFAFF; + font-size:14px; + overflow:auto; +} + +#doc-content { + overflow:auto; + display:block; + padding:0px; + margin:0px; + -webkit-overflow-scrolling : touch; /* iOS 5+ */ +} + +#side-nav { + padding:0 6px 0 0; + margin: 0px; + display:block; + position: absolute; + left: 0px; + width: 250px; +} + +.ui-resizable .ui-resizable-handle { + display:block; +} + +.ui-resizable-e { + background:url("ftv2splitbar.png") repeat scroll right center transparent; + cursor:e-resize; + height:100%; + right:0; + top:0; + width:6px; +} + +.ui-resizable-handle { + display:none; + font-size:0.1px; + position:absolute; + z-index:1; +} + +#nav-tree-contents { + margin: 6px 0px 0px 0px; +} + +#nav-tree { + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + -webkit-overflow-scrolling : touch; /* iOS 5+ */ +} + +#nav-sync { + position:absolute; + top:5px; + right:24px; + z-index:0; +} + +#nav-sync img { + opacity:0.3; +} + +#nav-sync img:hover { + opacity:0.9; +} + +@media print +{ + #nav-tree { display: none; } + div.ui-resizable-handle { display: none; position: relative; } +} + diff --git a/docs/Driver/html/navtree.js b/docs/Driver/html/navtree.js new file mode 100644 index 0000000..5929b3b --- /dev/null +++ b/docs/Driver/html/navtree.js @@ -0,0 +1,567 @@ +var NAVTREE = +[ + [ "CMSIS-Driver", "index.html", [ + [ "Overview", "index.html", null ], + [ "Revision History of CMSIS-Driver", "driver_revisionHistory.html", null ], + [ "Theory of Operation", "theoryOperation.html", [ + [ "Common Driver Functions", "theoryOperation.html#DriverFunctions", [ + [ "Cortex-M Processor Mode", "theoryOperation.html#ProcessorMode", null ] + ] ], + [ "Function Call Sequence", "theoryOperation.html#CallSequence", [ + [ "Start Sequence", "theoryOperation.html#CS_start", null ], + [ "Stop Sequence", "theoryOperation.html#CS_stop", null ] + ] ], + [ "Shared I/O Pins", "theoryOperation.html#Share_IO", null ], + [ "Data Transfer Functions", "theoryOperation.html#Data_Xfer_Functions", null ], + [ "Access Struct", "theoryOperation.html#AccessStruct", [ + [ "Driver Instances", "theoryOperation.html#DriverInstances", null ] + ] ], + [ "Driver Configuration", "theoryOperation.html#DriverConfiguration", null ], + [ "Code Example", "theoryOperation.html#CodeExample", null ] + ] ], + [ "Reference Implementation", "referenceImplementation.html", [ + [ "Driver Header Files", "referenceImplementation.html#DriverHeaderFiles", null ], + [ "Driver Template Files", "referenceImplementation.html#DriverTemplates", null ], + [ "Driver Examples", "referenceImplementation.html#DriverExamples", null ] + ] ], + [ "Driver Validation", "driverValidation.html", [ + [ "Sample Test Output", "driverValidation.html#test_output", null ], + [ "Setup for Loop Back Communication", "driverValidation.html#loop_back_setup", null ] + ] ], + [ "Reference", "modules.html", "modules" ], + [ "Data Structures", "annotated.html", "annotated" ], + [ "Data Structure Index", "classes.html", null ], + [ "Data Fields", "functions.html", [ + [ "All", "functions.html", "functions_dup" ], + [ "Variables", "functions_vars.html", "functions_vars" ] + ] ] + ] ] +]; + +var NAVTREEINDEX = +[ +"Driver__CAN_8h.html#ga11c12020b81a63a73a8b53e96a7e3deaa3b6d191c99f1eba4f01bcc5fbfaf67f3", +"group__can__interface__gr.html#a96ec94acab56690b3801e3c5fbd09fa2", +"group__flash__interface__gr.html#gaa8baa4618ea33568f8b3752afb2ab5a2", +"group__nand__driver__ecc__codes.html#gaee653288a88318ee33d1db81baa69bbc", +"group__spi__interface__gr.html#a7305e7248420cdb4b02ceba87672178d", +"group__usbd__interface__gr.html#a6fbcf63ac9f962787cddc8f11a44dccb" +]; + +var SYNCONMSG = 'click to disable panel synchronisation'; +var SYNCOFFMSG = 'click to enable panel synchronisation'; +var SYNCONMSG = 'click to disable panel synchronisation'; +var SYNCOFFMSG = 'click to enable panel synchronisation'; +var navTreeSubIndices = new Array(); + +function getData(varName) +{ + var i = varName.lastIndexOf('/'); + var n = i>=0 ? varName.substring(i+1) : varName; + return eval(n.replace(/\-/g,'_')); +} + +function stripPath(uri) +{ + return uri.substring(uri.lastIndexOf('/')+1); +} + +function stripPath2(uri) +{ + var i = uri.lastIndexOf('/'); + var s = uri.substring(i+1); + var m = uri.substring(0,i+1).match(/\/d\w\/d\w\w\/$/); + return m ? uri.substring(i-6) : s; +} + +function localStorageSupported() +{ + try { + return 'localStorage' in window && window['localStorage'] !== null && window.localStorage.getItem; + } + catch(e) { + return false; + } +} + + +function storeLink(link) +{ + if (!$("#nav-sync").hasClass('sync') && localStorageSupported()) { + window.localStorage.setItem('navpath',link); + } +} + +function deleteLink() +{ + if (localStorageSupported()) { + window.localStorage.setItem('navpath',''); + } +} + +function cachedLink() +{ + if (localStorageSupported()) { + return window.localStorage.getItem('navpath'); + } else { + return ''; + } +} + +function getScript(scriptName,func,show) +{ + var head = document.getElementsByTagName("head")[0]; + var script = document.createElement('script'); + script.id = scriptName; + script.type = 'text/javascript'; + script.onload = func; + script.src = scriptName+'.js'; + if ($.browser.msie && $.browser.version<=8) { + // script.onload does not work with older versions of IE + script.onreadystatechange = function() { + if (script.readyState=='complete' || script.readyState=='loaded') { + func(); if (show) showRoot(); + } + } + } + head.appendChild(script); +} + +function createIndent(o,domNode,node,level) +{ + var level=-1; + var n = node; + while (n.parentNode) { level++; n=n.parentNode; } + if (node.childrenData) { + var imgNode = document.createElement("img"); + imgNode.style.paddingLeft=(16*level).toString()+'px'; + imgNode.width = 16; + imgNode.height = 22; + imgNode.border = 0; + node.plus_img = imgNode; + node.expandToggle = document.createElement("a"); + node.expandToggle.href = "javascript:void(0)"; + node.expandToggle.onclick = function() { + if (node.expanded) { + $(node.getChildrenUL()).slideUp("fast"); + node.plus_img.src = node.relpath+"ftv2pnode.png"; + node.expanded = false; + } else { + expandNode(o, node, false, false); + } + } + node.expandToggle.appendChild(imgNode); + domNode.appendChild(node.expandToggle); + imgNode.src = node.relpath+"ftv2pnode.png"; + } else { + var span = document.createElement("span"); + span.style.display = 'inline-block'; + span.style.width = 16*(level+1)+'px'; + span.style.height = '22px'; + span.innerHTML = ' '; + domNode.appendChild(span); + } +} + +var animationInProgress = false; + +function gotoAnchor(anchor,aname,updateLocation) +{ + var pos, docContent = $('#doc-content'); + if (anchor.parent().attr('class')=='memItemLeft' || + anchor.parent().attr('class')=='fieldtype' || + anchor.parent().is(':header')) + { + pos = anchor.parent().position().top; + } else if (anchor.position()) { + pos = anchor.position().top; + } + if (pos) { + var dist = Math.abs(Math.min( + pos-docContent.offset().top, + docContent[0].scrollHeight- + docContent.height()-docContent.scrollTop())); + animationInProgress=true; + docContent.animate({ + scrollTop: pos + docContent.scrollTop() - docContent.offset().top + },Math.max(50,Math.min(500,dist)),function(){ + if (updateLocation) window.location.href=aname; + animationInProgress=false; + }); + } +} + +function newNode(o, po, text, link, childrenData, lastNode) +{ + var node = new Object(); + node.children = Array(); + node.childrenData = childrenData; + node.depth = po.depth + 1; + node.relpath = po.relpath; + node.isLast = lastNode; + + node.li = document.createElement("li"); + po.getChildrenUL().appendChild(node.li); + node.parentNode = po; + + node.itemDiv = document.createElement("div"); + node.itemDiv.className = "item"; + + node.labelSpan = document.createElement("span"); + node.labelSpan.className = "label"; + + createIndent(o,node.itemDiv,node,0); + node.itemDiv.appendChild(node.labelSpan); + node.li.appendChild(node.itemDiv); + + var a = document.createElement("a"); + node.labelSpan.appendChild(a); + node.label = document.createTextNode(text); + node.expanded = false; + a.appendChild(node.label); + if (link) { + var url; + if (link.substring(0,1)=='^') { + url = link.substring(1); + link = url; + } else { + url = node.relpath+link; + } + a.className = stripPath(link.replace('#',':')); + if (link.indexOf('#')!=-1) { + var aname = '#'+link.split('#')[1]; + var srcPage = stripPath($(location).attr('pathname')); + var targetPage = stripPath(link.split('#')[0]); + a.href = srcPage!=targetPage ? url : "javascript:void(0)"; + a.onclick = function(){ + storeLink(link); + if (!$(a).parent().parent().hasClass('selected')) + { + $('.item').removeClass('selected'); + $('.item').removeAttr('id'); + $(a).parent().parent().addClass('selected'); + $(a).parent().parent().attr('id','selected'); + } + var anchor = $(aname); + gotoAnchor(anchor,aname,true); + }; + } else { + a.href = url; + a.onclick = function() { storeLink(link); } + } + } else { + if (childrenData != null) + { + a.className = "nolink"; + a.href = "javascript:void(0)"; + a.onclick = node.expandToggle.onclick; + } + } + + node.childrenUL = null; + node.getChildrenUL = function() { + if (!node.childrenUL) { + node.childrenUL = document.createElement("ul"); + node.childrenUL.className = "children_ul"; + node.childrenUL.style.display = "none"; + node.li.appendChild(node.childrenUL); + } + return node.childrenUL; + }; + + return node; +} + +function showRoot() +{ + var headerHeight = $("#top").height(); + var footerHeight = $("#nav-path").height(); + var windowHeight = $(window).height() - headerHeight - footerHeight; + (function (){ // retry until we can scroll to the selected item + try { + var navtree=$('#nav-tree'); + navtree.scrollTo('#selected',0,{offset:-windowHeight/2}); + } catch (err) { + setTimeout(arguments.callee, 0); + } + })(); +} + +function expandNode(o, node, imm, showRoot) +{ + if (node.childrenData && !node.expanded) { + if (typeof(node.childrenData)==='string') { + var varName = node.childrenData; + getScript(node.relpath+varName,function(){ + node.childrenData = getData(varName); + expandNode(o, node, imm, showRoot); + }, showRoot); + } else { + if (!node.childrenVisited) { + getNode(o, node); + } if (imm || ($.browser.msie && $.browser.version>8)) { + // somehow slideDown jumps to the start of tree for IE9 :-( + $(node.getChildrenUL()).show(); + } else { + $(node.getChildrenUL()).slideDown("fast"); + } + if (node.isLast) { + node.plus_img.src = node.relpath+"ftv2mlastnode.png"; + } else { + node.plus_img.src = node.relpath+"ftv2mnode.png"; + } + node.expanded = true; + } + } +} + +function glowEffect(n,duration) +{ + n.addClass('glow').delay(duration).queue(function(next){ + $(this).removeClass('glow');next(); + }); +} + +function highlightAnchor() +{ + var aname = $(location).attr('hash'); + var anchor = $(aname); + if (anchor.parent().attr('class')=='memItemLeft'){ + var rows = $('.memberdecls tr[class$="'+ + window.location.hash.substring(1)+'"]'); + glowEffect(rows.children(),300); // member without details + } else if (anchor.parents().slice(2).prop('tagName')=='TR') { + glowEffect(anchor.parents('div.memitem'),1000); // enum value + } else if (anchor.parent().attr('class')=='fieldtype'){ + glowEffect(anchor.parent().parent(),1000); // struct field + } else if (anchor.parent().is(":header")) { + glowEffect(anchor.parent(),1000); // section header + } else { + glowEffect(anchor.next(),1000); // normal member + } + gotoAnchor(anchor,aname,false); +} + +function selectAndHighlight(hash,n) +{ + var a; + if (hash) { + var link=stripPath($(location).attr('pathname'))+':'+hash.substring(1); + a=$('.item a[class$="'+link+'"]'); + } + if (a && a.length) { + a.parent().parent().addClass('selected'); + a.parent().parent().attr('id','selected'); + highlightAnchor(); + } else if (n) { + $(n.itemDiv).addClass('selected'); + $(n.itemDiv).attr('id','selected'); + } + if ($('#nav-tree-contents .item:first').hasClass('selected')) { + $('#nav-sync').css('top','30px'); + } else { + $('#nav-sync').css('top','5px'); + } + showRoot(); +} + +function showNode(o, node, index, hash) +{ + if (node && node.childrenData) { + if (typeof(node.childrenData)==='string') { + var varName = node.childrenData; + getScript(node.relpath+varName,function(){ + node.childrenData = getData(varName); + showNode(o,node,index,hash); + },true); + } else { + if (!node.childrenVisited) { + getNode(o, node); + } + $(node.getChildrenUL()).css({'display':'block'}); + if (node.isLast) { + node.plus_img.src = node.relpath+"ftv2mlastnode.png"; + } else { + node.plus_img.src = node.relpath+"ftv2mnode.png"; + } + node.expanded = true; + var n = node.children[o.breadcrumbs[index]]; + if (index+11) hash = '#'+parts[1]; + else hash=''; + } + if (hash.match(/^#l\d+$/)) { + var anchor=$('a[name='+hash.substring(1)+']'); + glowEffect(anchor.parent(),1000); // line number + hash=''; // strip line number anchors + //root=root.replace(/_source\./,'.'); // source link to doc link + } + var url=root+hash; + var i=-1; + while (NAVTREEINDEX[i+1]<=url) i++; + if (i==-1) { i=0; root=NAVTREE[0][1]; } // fallback: show index + if (navTreeSubIndices[i]) { + gotoNode(o,i,root,hash,relpath) + } else { + getScript(relpath+'navtreeindex'+i,function(){ + navTreeSubIndices[i] = eval('NAVTREEINDEX'+i); + if (navTreeSubIndices[i]) { + gotoNode(o,i,root,hash,relpath); + } + },true); + } +} + +function showSyncOff(n,relpath) +{ + n.html(''); +} + +function showSyncOn(n,relpath) +{ + n.html(''); +} + +function toggleSyncButton(relpath) +{ + var navSync = $('#nav-sync'); + if (navSync.hasClass('sync')) { + navSync.removeClass('sync'); + showSyncOff(navSync,relpath); + storeLink(stripPath2($(location).attr('pathname'))+$(location).attr('hash')); + } else { + navSync.addClass('sync'); + showSyncOn(navSync,relpath); + deleteLink(); + } +} + +function initNavTree(toroot,relpath) +{ + var o = new Object(); + o.toroot = toroot; + o.node = new Object(); + o.node.li = document.getElementById("nav-tree-contents"); + o.node.childrenData = NAVTREE; + o.node.children = new Array(); + o.node.childrenUL = document.createElement("ul"); + o.node.getChildrenUL = function() { return o.node.childrenUL; }; + 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+"theoryOperation.html#ProcessorMode":[2,0,0], +"theoryOperation.html#Share_IO":[2,2] +}; diff --git a/docs/Driver/html/open.png b/docs/Driver/html/open.png new file mode 100644 index 0000000..30f75c7 Binary files /dev/null and b/docs/Driver/html/open.png differ diff --git a/docs/Driver/html/pages.html b/docs/Driver/html/pages.html new file mode 100644 index 0000000..9168146 --- /dev/null +++ b/docs/Driver/html/pages.html @@ -0,0 +1,136 @@ + + + + + +Usage and Description +CMSIS-Driver: Usage and Description + + + + + + + + + + + + + + +
+
+ + + + + + + +
+
CMSIS-Driver +  Version 2.6.0 +
+
Peripheral Interface for Middleware and Application Code
+
+
+ +
+
    + +
+
+ + + +
+
+ +
+
+
+ +
+ + + + +
+ +
+ +
+
+
Usage and Description
+
+
+
Here is a list of all related documentation pages:
+ + + + + +
oRevision History of CMSIS-Driver
oTheory of Operation
oReference Implementation
\Driver Validation
+
+
+
+ + + + diff --git a/docs/Driver/html/printComponentTabs.js b/docs/Driver/html/printComponentTabs.js new file mode 100644 index 0000000..8afdb6b --- /dev/null +++ b/docs/Driver/html/printComponentTabs.js @@ -0,0 +1,39 @@ +var strgURL = location.pathname; // path of current component + +// constuctor for the array of objects +function tabElement(id, folderName, tabTxt ) { + this.id = id; // elementID as needed in html; + this.folderName = folderName; // folder name of the component + this.tabTxt = tabTxt; // Text displayed as menu on the web + this.currentListItem = '
  • ' + this.tabTxt + '
    • '; + this.listItem = '
  • ' + this.tabTxt + '
    • '; +}; + +// array of objects +var arr = []; + +// fill array + arr.push( new tabElement( "GEN", "/General/html/", "General") ); + arr.push( new tabElement( "CORE_A", "/Core_A/html/", "CMSIS-Core(A)") ); + arr.push( new tabElement( "CORE_M", "/Core/html/", "CMSIS-Core(M)") ); + arr.push( new tabElement( "DRV", "/Driver/html/", "Driver") ); + arr.push( new tabElement( "DSP", "/DSP/html/", "DSP") ); + arr.push( new tabElement( "NN", "/NN/html/", "NN") ); + arr.push( new tabElement( "RTOSv1", "/RTOS/html/", "RTOS v1") ); + arr.push( new tabElement( "RTOSv2", "/RTOS2/html/", "RTOS v2") ); + arr.push( new tabElement( "PACK", "/Pack/html/", "Pack") ); + arr.push( new tabElement( "SVD", "/SVD/html/", "SVD") ); + arr.push( new tabElement( "DAP", "/DAP/html/", "DAP") ); + arr.push( new tabElement( "ZONE", "/Zone/html/", "Zone") ); + +// write tabs +// called from the header file. +function writeComponentTabs() { + for ( var i=0; i < arr.length; i++ ) { + if (strgURL.search(arr[i].folderName) > 0) { // if this is the current folder + document.write(arr[i].currentListItem); // then print and hightlight the tab + } else { + document.write(arr[i].listItem); // else, print the tab + } + } +}; diff --git a/docs/Driver/html/referenceImplementation.html b/docs/Driver/html/referenceImplementation.html new file mode 100644 index 0000000..8275969 --- /dev/null +++ b/docs/Driver/html/referenceImplementation.html @@ -0,0 +1,240 @@ + + + + + +Reference Implementation +CMSIS-Driver: Reference Implementation + + + + + + + + + + + + + + +
    +
    + + + + + + + +
    +
    CMSIS-Driver +  Version 2.6.0 +
    +
    Peripheral Interface for Middleware and Application Code
    +
    +
    + +
    +
      + +
    +
    + + + +
    +
    + +
    +
    +
    + +
    + + + + +
    + +
    + +
    +
    +
    Reference Implementation
    +
    +
    +

    The API of the CMSIS-Drivers is published in the Driver Header Files.

    +

    To simplify the development of a CMSIS-Driver both Driver Template Files and Driver Examples are provided.

    +

    ARM offers also a Software Pack for CMSIS-Driver Validation as described in Driver Validation.

    +

    +Driver Header Files

    +

    The API of each CMSIS-Driver is published in a header file. It is recommended to include the header file that is part of the CMSIS specification in the implementation file of the CMSIS-Driver.

    +

    The following header files are available in the directory .\CMSIS\Driver\Include.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Header File Description
    Driver_Common.h Common Driver Definitions
    Driver_CAN.h CAN Interface
    Driver_ETH.h Ethernet Interface
    Driver_ETH_MAC.h Ethernet MAC Interface
    Driver_ETH_PHY.h Ethernet PHY Interface
    Driver_Flash.h Flash Interface
    Driver_I2C.h I2C Interface
    Driver_MCI.h MCI Interface
    Driver_NAND.h NAND Interface
    Driver_SPI.h SPI Interface
    Driver_Storage.h Storage Interface
    Driver_SAI.h SAI Interface
    Driver_USART.h USART Interface
    Driver_USB.h USB Interface
    Driver_USBD.h USB Device Interface
    Driver_USBH.h USB Host Interface
    +

    +Driver Template Files

    +

    Driver template files are code skeletons that provide the structure of a CMSIS-Driver. The following templates are available in the directory .\CMSIS\Driver\DriverTemplates.

    + + + + + + + + + + + + + + + + + + + + + + + + + + + +
    Source File Description
    Driver_CAN.c CAN Interface
    Driver_ETH_MAC.c Ethernet MAC Interface
    Driver_ETH_PHY.c Ethernet MAC Interface
    Driver_Flash.c Flash Interface
    Driver_I2C.c I2C Interface
    Driver_MCI.c MCI Interface
    Driver_SAI.c SAI Interface
    Driver_SPI.c SPI Interface
    Driver_Storage.c Storage Interface
    Driver_USART.c USART Interface
    Driver_USBD.c USB Device Interface
    Driver_USBH.c USB Host Interface
    +

    +Driver Examples

    +

    The driver examples are full working CMSIS-Drivers that may be adapted to a different hardware. Examples are currently available for the NXP LPC1800 series and provide the implementation of a complete CMSIS-Driver. The following examples are available in the directory .\CMSIS\Pack\Example\CMSIS_Driver.

    + + + + + + + + + + + + + + + + + + + + + +
    Source File Header File Description
    EMAC_LPC18xx.c EMAC_LPC18xx.h Ethernet MAC Interface
    SSP_LPC18xx.c SSP_LPC18xx.h SPI Interface
    I2C_LPC18xx.c I2C_LPC18xx.h I2C Interface
    I2S_LPC18xx.c I2S_LPC18xx.h SAI Interface
    MCI_LPC18xx.c MCI_LPC18xx.h MCI Interface
    USART_LPC18xx.c USART_LPC18xx.h USART Interface
    USBn_LPC18xx.c USB_LPC18xx.h common files for USB Device Interface and USB Host Interface
    USBDn_LPC18xx.c none USB Device Interface
    USBHn_LPC18xx.c none USB Host Interface
    +

    These CMSIS-Drivers use additional modules for GPIO and DMA control:

    + + + + + + + + + +
    Source File Header File Description
    GPIO_LPC18xx.c GPIO_LPC18xx.h GPIO Interface for LPC1800 series
    GPDMA_LPC18xx.c none DMA Interface for LPC1800 series
    SCU_LPC18xx.c SCU_LPC18xx.h SCU Interface for LPC1800 series
    +

    The CMSIS-Drivers for the LPC1800 device have also many configuration options that are controls using #define statements in the file .\CMSIS\Pack\Example\CMSIS_Driver\Config\RTE_Device.h. Using this file, the I/O pin and DMA assignment can be set among other parameters such as USB speed and PHY interfaces.

    +

    Further driver reference implementations are available in Device Family Packs (DFP) labeled with version 2.0.0 or higher.

    +
    +
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expires=" + expiration+"; path=/"; +} + +function resizeWidth() +{ + var windowWidth = $(window).width() + "px"; + var sidenavWidth = $(sidenav).outerWidth(); + content.css({marginLeft:parseInt(sidenavWidth)+"px"}); + writeCookie('width',sidenavWidth, null); +} + +function restoreWidth(navWidth) +{ + var windowWidth = $(window).width() + "px"; + content.css({marginLeft:parseInt(navWidth)+6+"px"}); + sidenav.css({width:navWidth + "px"}); +} + +function resizeHeight() +{ + var headerHeight = header.outerHeight(); + var footerHeight = footer.outerHeight(); + var windowHeight = $(window).height() - headerHeight - footerHeight; + content.css({height:windowHeight + "px"}); + navtree.css({height:windowHeight + "px"}); + sidenav.css({height:windowHeight + "px",top: headerHeight+"px"}); +} + +function initResizable() +{ + header = $("#top"); + sidenav = $("#side-nav"); + content = $("#doc-content"); + navtree = $("#nav-tree"); + footer = $("#nav-path"); + $(".side-nav-resizable").resizable({resize: function(e, ui) { resizeWidth(); } }); + $(window).resize(function() { resizeHeight(); }); + var width = readCookie('width'); + if (width) { restoreWidth(width); } else { resizeWidth(); } + resizeHeight(); + var url = location.href; + var i=url.indexOf("#"); + if (i>=0) window.location.hash=url.substr(i); + var _preventDefault = function(evt) { evt.preventDefault(); }; + $("#splitbar").bind("dragstart", _preventDefault).bind("selectstart", _preventDefault); + $(document).bind('touchmove',function(e){ + var device = navigator.userAgent.toLowerCase(); + var ios = device.match(/(iphone|ipod|ipad)/); + if (ios) { + try { + var target = e.target; + while (target) { + if ($(target).css('-webkit-overflow-scrolling')=='touch') return; + target = target.parentNode; + } + e.preventDefault(); + } catch(err) { + e.preventDefault(); + } + } + }); +} + + diff --git a/docs/Driver/html/search.css b/docs/Driver/html/search.css new file mode 100644 index 0000000..1746d13 --- /dev/null +++ b/docs/Driver/html/search.css @@ -0,0 +1,240 @@ +/*---------------- Search Box */ + +#FSearchBox { + float: left; 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    + + diff --git a/docs/Driver/html/search/pages_3.js b/docs/Driver/html/search/pages_3.js new file mode 100644 index 0000000..340210d --- /dev/null +++ b/docs/Driver/html/search/pages_3.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['theory_20of_20operation',['Theory of Operation',['../theoryOperation.html',1,'']]] +]; diff --git a/docs/Driver/html/search/search.css b/docs/Driver/html/search/search.css new file mode 100644 index 0000000..1746d13 --- /dev/null +++ b/docs/Driver/html/search/search.css @@ -0,0 +1,240 @@ +/*---------------- Search Box */ + +#FSearchBox { + float: left; +} + +#searchli { + float: right; + display: block; + width: 170px; + height: 24px; +} + +#MSearchBox { + white-space : nowrap; + position: absolute; + float: none; + display: inline; + margin-top: 3px; + right: 0px; + width: 170px; + z-index: 102; +} + +#MSearchBox .left +{ + display:block; + position:absolute; + left:10px; + width:20px; + height:19px; + background:url('search_l.png') no-repeat; + background-position:right; +} + +#MSearchSelect { + display:block; + position:absolute; + width:20px; + height:19px; +} + +.left #MSearchSelect { + left:4px; +} + +.right #MSearchSelect { + right:5px; +} + +#MSearchField { + display:block; + position:absolute; + height:19px; + background:url('search_m.png') repeat-x; + border:none; + width:116px; + margin-left:20px; + padding-left:4px; + color: #909090; + outline: none; + font: 9pt Arial, Verdana, sans-serif; +} + +#FSearchBox #MSearchField { + margin-left:15px; +} + +#MSearchBox .right { + display:block; + position:absolute; + right:10px; + top:0px; + width:20px; + height:19px; + background:url('search_r.png') no-repeat; + background-position:left; +} + +#MSearchClose { + display: none; + position: absolute; + top: 4px; + background : none; + border: none; + margin: 0px 4px 0px 0px; + padding: 0px 0px; + outline: none; +} + +.left #MSearchClose { + left: 6px; +} + +.right #MSearchClose { + right: 2px; +} + +.MSearchBoxActive #MSearchField { + color: #000000; +} + +/*---------------- Search filter selection */ + +#MSearchSelectWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #90A5CE; + background-color: #F9FAFC; + z-index: 1; + padding-top: 4px; + padding-bottom: 4px; + -moz-border-radius: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +.SelectItem { + font: 8pt Arial, Verdana, sans-serif; + padding-left: 2px; + padding-right: 12px; + border: 0px; +} + +span.SelectionMark { + margin-right: 4px; + font-family: monospace; + outline-style: none; + text-decoration: none; +} + +a.SelectItem { + display: block; + outline-style: none; + color: #000000; + text-decoration: none; + padding-left: 6px; + padding-right: 12px; +} + +a.SelectItem:focus, +a.SelectItem:active { + color: #000000; + outline-style: none; + text-decoration: none; +} + +a.SelectItem:hover { + color: #FFFFFF; + background-color: #3D578C; + outline-style: none; + text-decoration: none; + cursor: pointer; + display: block; +} + +/*---------------- Search results window */ + +iframe#MSearchResults { + width: 60ex; + height: 15em; +} + +#MSearchResultsWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #000; + background-color: #EEF1F7; +} + +/* ----------------------------------- */ + + +#SRIndex { + clear:both; + padding-bottom: 15px; +} + +.SREntry { + font-size: 10pt; + padding-left: 1ex; +} + +.SRPage .SREntry { + font-size: 8pt; + padding: 1px 5px; +} + +body.SRPage { + margin: 5px 2px; +} + +.SRChildren { + padding-left: 3ex; padding-bottom: .5em +} + +.SRPage .SRChildren { + display: none; +} + +.SRSymbol { + font-weight: bold; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRScope { + display: block; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRSymbol:focus, a.SRSymbol:active, +a.SRScope:focus, a.SRScope:active { + text-decoration: underline; +} + +.SRPage .SRStatus { + padding: 2px 5px; + font-size: 8pt; + font-style: italic; +} + +.SRResult { + display: none; +} + +DIV.searchresults { + margin-left: 10px; + margin-right: 10px; +} diff --git a/docs/Driver/html/search/search.js b/docs/Driver/html/search/search.js new file mode 100644 index 0000000..71d7393 --- /dev/null +++ b/docs/Driver/html/search/search.js @@ -0,0 +1,813 @@ +// Search script generated by doxygen +// Copyright (C) 2009 by Dimitri van Heesch. + +// The code in this file is loosly based on main.js, part of Natural Docs, +// which is Copyright (C) 2003-2008 Greg Valure +// Natural Docs is licensed under the GPL. + +var indexSectionsWithContent = +{ + 0: "_abcdefghilmnoprstuvw", + 1: "a", + 2: "dg", + 3: "a", + 4: "abcdefghilmnoprstuvw", + 5: "a", + 6: "a", + 7: "a", + 8: "_a", + 9: "cefimnsu", + 10: "dort" +}; + +var indexSectionNames = +{ + 0: "all", + 1: "classes", + 2: "files", + 3: "functions", + 4: "variables", + 5: "typedefs", + 6: "enums", + 7: "enumvalues", + 8: "defines", + 9: "groups", + 10: "pages" +}; + +function convertToId(search) +{ + var result = ''; + for (i=0;i do a search + { + this.Search(); + } + } + + this.OnSearchSelectKey = function(evt) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==40 && this.searchIndex0) // Up + { + this.searchIndex--; + this.OnSelectItem(this.searchIndex); + } + else if (e.keyCode==13 || e.keyCode==27) + { + this.OnSelectItem(this.searchIndex); + this.CloseSelectionWindow(); + this.DOMSearchField().focus(); + } + return false; + } + + // --------- Actions + + // Closes the results window. + this.CloseResultsWindow = function() + { + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.Activate(false); + } + + this.CloseSelectionWindow = function() + { + this.DOMSearchSelectWindow().style.display = 'none'; + } + + // Performs a search. + this.Search = function() + { + this.keyTimeout = 0; + + // strip leading whitespace + var searchValue = this.DOMSearchField().value.replace(/^ +/, ""); + + var code = searchValue.toLowerCase().charCodeAt(0); + var idxChar = searchValue.substr(0, 1).toLowerCase(); + if ( 0xD800 <= code && code <= 0xDBFF && searchValue > 1) // surrogate pair + { + idxChar = searchValue.substr(0, 2); + } + + var resultsPage; + var resultsPageWithSearch; + var hasResultsPage; + + var idx = indexSectionsWithContent[this.searchIndex].indexOf(idxChar); + if (idx!=-1) + { + var hexCode=idx.toString(16); + resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + '.html'; + resultsPageWithSearch = resultsPage+'?'+escape(searchValue); + hasResultsPage = true; + } + else // nothing available for this search term + { + resultsPage = this.resultsPath + '/nomatches.html'; + resultsPageWithSearch = resultsPage; + hasResultsPage = false; + } + + window.frames.MSearchResults.location = resultsPageWithSearch; + var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow(); + + if (domPopupSearchResultsWindow.style.display!='block') + { + var domSearchBox = this.DOMSearchBox(); + this.DOMSearchClose().style.display = 'inline'; + if (this.insideFrame) + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + domPopupSearchResultsWindow.style.position = 'relative'; + domPopupSearchResultsWindow.style.display = 'block'; + var width = document.body.clientWidth - 8; // the -8 is for IE :-( + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResults.style.width = width + 'px'; + } + else + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; + var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + } + } + + this.lastSearchValue = searchValue; + this.lastResultsPage = resultsPage; + } + + // -------- Activation Functions + + // Activates or deactivates the search panel, resetting things to + // their default values if necessary. + this.Activate = function(isActive) + { + if (isActive || // open it + this.DOMPopupSearchResultsWindow().style.display == 'block' + ) + { + this.DOMSearchBox().className = 'MSearchBoxActive'; + + var searchField = this.DOMSearchField(); + + if (searchField.value == this.searchLabel) // clear "Search" term upon entry + { + searchField.value = ''; + this.searchActive = true; + } + } + else if (!isActive) // directly remove the panel + { + this.DOMSearchBox().className = 'MSearchBoxInactive'; + this.DOMSearchField().value = this.searchLabel; + this.searchActive = false; + this.lastSearchValue = '' + this.lastResultsPage = ''; + } + } +} + +// ----------------------------------------------------------------------- + +// The class that handles everything on the search results page. +function SearchResults(name) +{ + // The number of matches from the last run of . + this.lastMatchCount = 0; + this.lastKey = 0; + this.repeatOn = false; + + // Toggles the visibility of the passed element ID. + this.FindChildElement = function(id) + { + var parentElement = document.getElementById(id); + var element = parentElement.firstChild; + + while (element && element!=parentElement) + { + if (element.nodeName == 'DIV' && element.className == 'SRChildren') + { + return element; + } + + if (element.nodeName == 'DIV' && element.hasChildNodes()) + { + element = element.firstChild; + } + else if (element.nextSibling) + { + element = element.nextSibling; + } + else + { + do + { + element = element.parentNode; + } + while (element && element!=parentElement && !element.nextSibling); + + if (element && element!=parentElement) + { + element = element.nextSibling; + } + } + } + } + + this.Toggle = function(id) + { + var element = this.FindChildElement(id); + if (element) + { + if (element.style.display == 'block') + { + element.style.display = 'none'; + } + else + { + element.style.display = 'block'; + } + } + } + + // Searches for the passed string. If there is no parameter, + // it takes it from the URL query. + // + // Always returns true, since other documents may try to call it + // and that may or may not be possible. + this.Search = function(search) + { + if (!search) // get search word from URL + { + search = window.location.search; + search = search.substring(1); // Remove the leading '?' + search = unescape(search); + } + + search = search.replace(/^ +/, ""); // strip leading spaces + search = search.replace(/ +$/, ""); // strip trailing spaces + search = search.toLowerCase(); + search = convertToId(search); + + var resultRows = document.getElementsByTagName("div"); + var matches = 0; + + var i = 0; + while (i < resultRows.length) + { + var row = resultRows.item(i); + if (row.className == "SRResult") + { + var rowMatchName = row.id.toLowerCase(); + rowMatchName = rowMatchName.replace(/^sr\d*_/, ''); // strip 'sr123_' + + if (search.length<=rowMatchName.length && + rowMatchName.substr(0, search.length)==search) + { + row.style.display = 'block'; + matches++; + } + else + { + row.style.display = 'none'; + } + } + i++; + } + document.getElementById("Searching").style.display='none'; + if (matches == 0) // no results + { + document.getElementById("NoMatches").style.display='block'; + } + else // at least one result + { + document.getElementById("NoMatches").style.display='none'; + } + this.lastMatchCount = matches; + return true; + } + + // return the first item with index index or higher that is visible + this.NavNext = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index++; + } + return focusItem; + } + + this.NavPrev = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index--; + } + return focusItem; + } + + this.ProcessKeys = function(e) + { + if (e.type == "keydown") + { + this.repeatOn = false; + this.lastKey = e.keyCode; + } + else if (e.type == "keypress") + { + if (!this.repeatOn) + { + if (this.lastKey) this.repeatOn = true; + return false; // ignore first keypress after keydown + } + } + else if (e.type == "keyup") + { + this.lastKey = 0; + this.repeatOn = false; + } + return this.lastKey!=0; + } + + this.Nav = function(evt,itemIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + var newIndex = itemIndex-1; + var focusItem = this.NavPrev(newIndex); + if (focusItem) + { + var child = this.FindChildElement(focusItem.parentNode.parentNode.id); + if (child && child.style.display == 'block') // children visible + { + var n=0; + var tmpElem; + while (1) // search for last child + { + tmpElem = document.getElementById('Item'+newIndex+'_c'+n); + if (tmpElem) + { + focusItem = tmpElem; + } + else // found it! + { + break; + } + n++; + } + } + } + if (focusItem) + { + focusItem.focus(); + } + else // return focus to search field + { + parent.document.getElementById("MSearchField").focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = itemIndex+1; + var focusItem; + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem && elem.style.display == 'block') // children visible + { + focusItem = document.getElementById('Item'+itemIndex+'_c0'); + } + if (!focusItem) focusItem = this.NavNext(newIndex); + if (focusItem) focusItem.focus(); + } + else if (this.lastKey==39) // Right + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'block'; + } + else if (this.lastKey==37) // Left + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'none'; + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } + + this.NavChild = function(evt,itemIndex,childIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + if (childIndex>0) + { + var newIndex = childIndex-1; + document.getElementById('Item'+itemIndex+'_c'+newIndex).focus(); + } + else // already at first child, jump to parent + { + document.getElementById('Item'+itemIndex).focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = childIndex+1; + var elem = document.getElementById('Item'+itemIndex+'_c'+newIndex); + if (!elem) // last child, jump to parent next parent + { + elem = this.NavNext(itemIndex+1); + } + if (elem) + { + elem.focus(); + } + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } +} + +function setKeyActions(elem,action) +{ + elem.setAttribute('onkeydown',action); + elem.setAttribute('onkeypress',action); + elem.setAttribute('onkeyup',action); +} + +function setClassAttr(elem,attr) +{ + elem.setAttribute('class',attr); + elem.setAttribute('className',attr); +} + +function createResults() +{ + var results = document.getElementById("SRResults"); + for (var e=0; e + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/Driver/html/search/typedefs_0.js b/docs/Driver/html/search/typedefs_0.js new file mode 100644 index 0000000..91cced6 --- /dev/null +++ b/docs/Driver/html/search/typedefs_0.js @@ -0,0 +1,22 @@ +var searchData= +[ + ['arm_5fcan_5fsignalobjectevent_5ft',['ARM_CAN_SignalObjectEvent_t',['../group__can__interface__gr.html#ga7ceceac3e9aa0981c5cacfab88efb4eb',1,'Driver_CAN.h']]], + ['arm_5fcan_5fsignalunitevent_5ft',['ARM_CAN_SignalUnitEvent_t',['../group__can__interface__gr.html#gaac07b9fdf614bf439414f5417aaa376e',1,'Driver_CAN.h']]], + ['arm_5feth_5fmac_5fsignalevent_5ft',['ARM_ETH_MAC_SignalEvent_t',['../group__eth__mac__interface__gr.html#gadfc95cb09c541a29a72da86963668726',1,'Driver_ETH_MAC.h']]], + ['arm_5feth_5fphy_5fread_5ft',['ARM_ETH_PHY_Read_t',['../group__eth__phy__interface__gr.html#ga987d5dd36f179192721c03df37d93e87',1,'Driver_ETH_PHY.h']]], + ['arm_5feth_5fphy_5fwrite_5ft',['ARM_ETH_PHY_Write_t',['../group__eth__phy__interface__gr.html#gaf690fde16281b25f2ffa07f9c4e8e240',1,'Driver_ETH_PHY.h']]], + ['arm_5fflash_5fsignalevent_5ft',['ARM_Flash_SignalEvent_t',['../group__flash__interface__gr.html#gabeb4ad43b1e6fa4ed956cd5c9371d327',1,'Driver_Flash.h']]], + ['arm_5fi2c_5fsignalevent_5ft',['ARM_I2C_SignalEvent_t',['../group__i2c__interface__gr.html#ga24277c48248a09b0dd7f12bbe22ce13c',1,'Driver_I2C.h']]], + ['arm_5fmci_5fsignalevent_5ft',['ARM_MCI_SignalEvent_t',['../group__mci__interface__gr.html#ga0d14651f6788c1ffd81544602565faf1',1,'Driver_MCI.h']]], + ['arm_5fnand_5fsignalevent_5ft',['ARM_NAND_SignalEvent_t',['../group__nand__interface__gr.html#ga09f4cf2f2df0bb690bce38b13d77e50f',1,'Driver_NAND.h']]], + ['arm_5fsai_5fsignalevent_5ft',['ARM_SAI_SignalEvent_t',['../group__sai__interface__gr.html#gad8ca8e2459e540928f6315b3df6da0ee',1,'Driver_SAI.h']]], + ['arm_5fspi_5fsignalevent_5ft',['ARM_SPI_SignalEvent_t',['../group__spi__interface__gr.html#gafde9205364241ee81290adc0481c6640',1,'Driver_SPI.h']]], + ['arm_5fstorage_5fcallback_5ft',['ARM_Storage_Callback_t',['../group__storage__interface__gr.html#ga4b290224fea782e6d2ad06f541b28a98',1,'Driver_Storage.h']]], + ['arm_5fusart_5fsignalevent_5ft',['ARM_USART_SignalEvent_t',['../group__usart__interface__gr.html#gaa578c3829eea207e9e48df6cb6f038a1',1,'Driver_USART.h']]], + ['arm_5fusbd_5fsignaldeviceevent_5ft',['ARM_USBD_SignalDeviceEvent_t',['../group__usbd__interface__gr.html#ga7c1878799699ddd34cec696da499f7bd',1,'Driver_USBD.h']]], + ['arm_5fusbd_5fsignalendpointevent_5ft',['ARM_USBD_SignalEndpointEvent_t',['../group__usbd__interface__gr.html#gaae754763700fc5059a6bde57ea2d4e2c',1,'Driver_USBD.h']]], + ['arm_5fusbh_5fhci_5finterrupt_5ft',['ARM_USBH_HCI_Interrupt_t',['../group__usbh__hci__gr.html#gac60df9d1f2b3a769f2c30141800a9806',1,'Driver_USBH.h']]], + ['arm_5fusbh_5fpipe_5fhandle',['ARM_USBH_PIPE_HANDLE',['../group__usbh__host__gr.html#ga2e4d0ebd0851ba7bf364ae1d8948672c',1,'Driver_USBH.h']]], + ['arm_5fusbh_5fsignalpipeevent_5ft',['ARM_USBH_SignalPipeEvent_t',['../group__usbh__host__gr.html#ga1a32ebfe0db4a002aae2b0c0f8ece30c',1,'Driver_USBH.h']]], + ['arm_5fusbh_5fsignalportevent_5ft',['ARM_USBH_SignalPortEvent_t',['../group__usbh__host__gr.html#ga61edcbb6ee863fe87abee488d78e1051',1,'Driver_USBH.h']]] +]; diff --git a/docs/Driver/html/search/variables_0.html b/docs/Driver/html/search/variables_0.html new file mode 100644 index 0000000..1b8adc9 --- /dev/null +++ b/docs/Driver/html/search/variables_0.html @@ -0,0 +1,26 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/Driver/html/search/variables_0.js b/docs/Driver/html/search/variables_0.js new file mode 100644 index 0000000..7cfec07 --- /dev/null +++ b/docs/Driver/html/search/variables_0.js @@ -0,0 +1,15 @@ +var searchData= +[ + ['abortsequence',['AbortSequence',['../group__nand__interface__gr.html#ad6e1d53e9028baff856899f795c0d0c8',1,'ARM_DRIVER_NAND']]], + ['aborttransfer',['AbortTransfer',['../group__mci__interface__gr.html#afa8103cc20ba96420b7471455bbb87e4',1,'ARM_DRIVER_MCI']]], + ['acls',['acls',['../Driver__Storage_8h.html#abbd64eb8edcf2263db5c8ac140dc0448',1,'ARM_STORAGE_SECURITY_FEATURES']]], + ['active',['active',['../group__usbd__interface__gr.html#ab22b96a3efad48f5a542f46c1b224800',1,'ARM_USBD_STATE']]], + ['addr',['addr',['../group__storage__interface__gr.html#a0e89cf6b9f6cd3125470b1bed2b823df',1,'ARM_STORAGE_BLOCK']]], + ['address_5f10_5fbit',['address_10_bit',['../group__i2c__interface__gr.html#a4ffaaf168a9f43e98d710abff5861ed5',1,'ARM_I2C_CAPABILITIES']]], + ['api',['api',['../group__common__drv__gr.html#ad180da20fbde1d3dafc074af87c19540',1,'ARM_DRIVER_VERSION']]], + ['arbitration_5flost',['arbitration_lost',['../group__i2c__interface__gr.html#ab3e3c8eeeae7fbe3c51dcb3d4104af24',1,'ARM_I2C_STATUS']]], + ['asynchronous',['asynchronous',['../group__sai__interface__gr.html#a75ba2507ea29601a309393e794f4413d',1,'ARM_SAI_CAPABILITIES::asynchronous()'],['../group__usart__interface__gr.html#a75ba2507ea29601a309393e794f4413d',1,'ARM_USART_CAPABILITIES::asynchronous()']]], + ['asynchronous_5fops',['asynchronous_ops',['../group__storage__interface__gr.html#a15ade4ca762bc6ce72d435a16febb4cc',1,'ARM_STORAGE_CAPABILITIES']]], + ['attributes',['attributes',['../group__storage__interface__gr.html#ade62c905888479b4f6d078d45cec5830',1,'ARM_STORAGE_BLOCK']]], + ['auto_5fsplit',['auto_split',['../group__usbh__host__gr.html#a37eab684b9a8aa496bfec9fede42fe27',1,'ARM_USBH_CAPABILITIES']]] +]; diff --git a/docs/Driver/html/search/variables_1.html b/docs/Driver/html/search/variables_1.html new file mode 100644 index 0000000..78f63cd --- /dev/null +++ b/docs/Driver/html/search/variables_1.html @@ -0,0 +1,26 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
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+.tabs2 { + font-size: 10px; +} +.tabs3 { + font-size: 9px; +} + +.tablist { + margin: 0; + padding: 0; + display: table; + line-height: 24px; +} + +.tablist li { + float: left; + display: table-cell; + background-image: url('tab_b.png'); + list-style: none; +} + +.tabs1 .tablist li { + float: left; + display: table-cell; + background-image: url('tab_topnav.png'); + list-style: none; +} + +.tablist a { + display: block; + padding: 0 20px; + font-weight: bold; + background-image:url('tab_s.png'); + background-repeat:no-repeat; + background-position:right; + color: #283A5D; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; + outline: none; +} + +.tabs3 .tablist a { + padding: 0 10px; +} + +.tablist a:hover { + background-image: url('tab_h.png'); + background-repeat:repeat-x; + color: #fff; + text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); + text-decoration: none; +} + +.tablist li.current a { + background-image: url('tab_a.png'); + background-repeat:repeat-x; + color: #fff; + text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0); +} diff --git a/docs/Driver/html/theoryOperation.html b/docs/Driver/html/theoryOperation.html new file mode 100644 index 0000000..1a581ba --- /dev/null +++ b/docs/Driver/html/theoryOperation.html @@ -0,0 +1,379 @@ + + + + + +Theory of Operation +CMSIS-Driver: Theory of Operation + + + + + + + + + + + + + + +
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    CMSIS-Driver +  Version 2.6.0 +
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    Peripheral Interface for Middleware and Application Code
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    Theory of Operation
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    +

    Table of Contents

    + +
    +

    This section gives an overview of the general operation of CMSIS-Drivers. It explains the Common Driver Functions that are common in all CMSIS-Drivers along with the Function Call Sequence. The topic Data Transfer Functions describes how data read/write operations to the peripheral are implemented.

    +

    Each CMSIS-Driver defines an Access Struct for calling the various driver functions and each peripheral (that is accessed via a CMSIS-Driver) has one Driver Instance.

    +

    +Common Driver Functions

    +

    Each CMSIS-Driver contains these functions:

    +
      +
    • GetVersion: can be called at any time to obtain version information of the driver interface.
      • +
    • GetCapabilities: can be called at any time to obtain capabilities of the driver interface.
      • +
    • Initialize: must be called before powering the peripheral using PowerControl. This function performs the following:
        +
      • allocate I/O resources.
          +
        • register an optional SignalEvent callback function.
          • +
        +
        • +
      +
      • +
    • SignalEvent: is an optional callback function that is registered with the Initialize function. This callback function is initiated from interrupt service routines and indicates hardware events or the completion of a data block transfer operation.
      • +
    • PowerControl: Controls the power profile of the peripheral and needs to be called after Initialize. Typically, three power options are available:
        +
      • ARM_POWER_FULL: Peripheral is turned on and fully operational. The driver initializes the peripheral registers, interrupts, and (optionally) DMA.
        • +
      • ARM_POWER_LOW: (optional) Peripheral is in low power mode and partially operational; usually, it can detect external events and wake-up.
        • +
      • ARM_POWER_OFF: Peripheral is turned off and not operational (pending operations are terminated). This is the state after device reset.
        • +
      +
      • +
    • Uninitialize: Complementary function to Initialize. Releases the I/O pin resources used by the interface.
      • +
    • Control: Several drivers provide a control function to configure communication parameters or execute miscellaneous control functions.
      • +
    +

    The section Function Call Sequence contains more information on the operation of each function. Additional functions are specific to each driver interface and are described in the individual sections of each driver.

    +

    +Cortex-M Processor Mode

    +

    The CMSIS-Driver functions access peripherals and interrupts and are designed to execute in Privileged mode. When calling CMSIS-Driver functions from RTOS threads, it should be ensure that these threads execute in Privileged mode.

    +

    +Function Call Sequence

    +

    For normal operation of the driver, the API functions GetVersion, GetCapabilities, Initialize, PowerControl, Uninitialize are called in the following order:

    +
    +msc_inline_mscgraph_1 + +
    +

    The functions GetVersion and GetCapabilities can be called any time to obtain the required information from the driver. These functions return always the same information.

    +

    +Start Sequence

    +

    To start working with a peripheral the functions Initialize and PowerControl need to be called in this order:

    +
    drv->Initialize (...); // Allocate I/O pins
    +
    drv->PowerControl (ARM_POWER_FULL); // Power up peripheral, setup IRQ/DMA
    +
      +
    • Initialize typically allocates the I/O resources (pins) for the peripheral. The function can be called multiple times; if the I/O resources are already initialized it performs no operation and just returns with ARM_DRIVER_OK.
      • +
    • PowerControl (ARM_POWER_FULL) sets the peripheral registers including interrupt (NVIC) and optionally DMA. The function can be called multiple times; if the registers are already set it performs no operation and just returns with ARM_DRIVER_OK.
      • +
    +

    +Stop Sequence

    +

    To stop working with a peripheral the functions PowerControl and Uninitialize need to be called in this order:

    +
    drv->PowerControl (ARM_POWER_OFF); // Terminate any pending transfers, reset IRQ/DMA, power off peripheral
    +
    drv->Uninitialize (...); // Release I/O pins
    +

    The functions PowerControl and Uninitialize always execute and can be used to put the peripheral into a Safe State, for example after any data transmission errors. To restart the peripheral in a error condition, you should first execute the Stop Sequence and then the Start Sequence.

    +
      +
    • PowerControl (ARM_POWER_OFF) terminates any pending data transfers with the peripheral, disables the peripheral and leaves it in a defined mode (typically the reset state).
        +
      • when DMA is used it is disabled (including the interrupts)
        • +
      • peripheral interrupts are disabled on NVIC level
        • +
      • the peripheral is reset using a dedicated reset mechanism (if available) or by clearing the peripheral registers
        • +
      • pending peripheral interrupts are cleared on NVIC level
        • +
      • driver variables are cleared
        • +
      +
      • +
    • Uninitialize always releases I/O pin resources.
      • +
    +

    +Shared I/O Pins

    +

    All CMSIS-Driver provide a Start Sequence and Stop Sequence. Therefore two different drivers can share the same I/O pins, for example UART1 and SPI1 can have overlapping I/O pins. In this case the communication channels can be used as shown below:

    +
    SPI1drv->Initialize (...); // Start SPI1
    +
    SPI1drv->PowerControl (ARM_POWER_FULL);
    +
    ... // Do operations with SPI1
    +
    SPI1drv->PowerControl (ARM_POWER_OFF); // Stop SPI1
    +
    SPI1drv->Uninitialize ();
    +
    ...
    +
    USART1drv->Initialize (...); // Start USART1
    +
    USART1drv->PowerControl (ARM_POWER_FULL);
    +
    ... // Do operations with USART1
    +
    USART1drv->PowerControl (ARM_POWER_OFF); // Stop USART1
    +
    USART1drv->Uninitialize ();
    +

    +Data Transfer Functions

    +

    A CMSIS-Driver implements non-blocking functions to transfer data to a peripheral. This means that the driver configures the read or write access to the peripheral and instantly returns to the calling application. The function names for data transfer end with:

    +
      +
    • Send to write data to a peripheral.
      • +
    • Receive to read data from a peripheral.
      • +
    • Transfer to indicate combined read/write operations to a peripheral.
      • +
    +

    During a data transfer, the application can query the number of transferred data items using functions named GetxxxCount. On completion of a data transfer, the driver calls a callback function with a specific event code.

    +

    During the data exchange with the peripheral, the application can decide to:

    +
      +
    • Wait (using an RTOS scheduler) for the callback completion event. The RTOS is controlled by the application code which makes the driver itself RTOS independent.
      • +
    • Use polling functions that return the number of transferred data items to show progress information or partly read or fill data transfer buffers.
      • +
    • Prepare another data transfer buffer for the next data transfer.
      • +
    +

    The following diagram shows the basic communication flow when using the _Send function in an application.

    +
    +Non_blocking_transmit_small.png +
    +Non-blocking Send Function
    +

    +Access Struct

    +

    A CMSIS-Driver publishes an Access Struct with the data type name ARM_DRIVER_xxxx that gives to access the driver functions.

    +

    Code Example: Function Access of the SPI driver

    +
    typedef struct _ARM_DRIVER_SPI {
    +
    ARM_DRIVER_VERSION (*GetVersion) (void);
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    ARM_SPI_CAPABILITIES (*GetCapabilities) (void);
    +
    int32_t (*Initialize) (ARM_SPI_SignalEvent_t cb_event);
    +
    int32_t (*Uninitialize) (void);
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    int32_t (*PowerControl) (ARM_POWER_STATE state);
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    int32_t (*Send) (const void *data, uint32_t num);
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    int32_t (*Receive) ( void *data, uint32_t num);
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    int32_t (*Transfer) (const void *data_out, void *data_in, uint32_t num);
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    uint32_t (*GetDataCount) (void);
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    int32_t (*Control) (uint32_t control, uint32_t arg);
    +
    ARM_SPI_STATUS (*GetStatus) (void);
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    } const ARM_DRIVER_SPI;
    +

    +Driver Instances

    +

    A device may offer several peripherals of the same type. For such devices, the CMSIS-Driver publishes multiple instances of the Access Struct. The name of each driver instance reflects the names of the peripheral available in the device.

    +

    Code Example: Access Struct for three SPIs in a microcontroller device.

    +
    ARM_DRIVER_SPI Driver_SPI1; // access functions for SPI1 interface
    +
    ARM_DRIVER_SPI Driver_SPI2; // access functions for SPI2 interface
    +
    ARM_DRIVER_SPI Driver_SPI3; // access functions for SPI3 interface
    +

    The access functions can be passed to middleware to specify the driver instance that the middleware should use for communication.

    +

    Example:

    +
    void init_middleware (ARM_DRIVER_SPI *Drv_spi) ...
    +
    \\ inside the middleware the SPI driver functions are called with:
    +
    \\ Drv_spi->function (...);
    +
    \\ setup middleware
    +
    init_middleware (&Driver_SPI1); // connect middleware to SPI1 interface
    +
    :
    +
    init_middleware (&Driver_SPI2); // connect middleware to SPI2 interface
    +

    +Driver Configuration

    +

    For a device family, the drivers may be configurable. The Reference Implementation stores configuration options in a central file with the name RTE_Device.h. However, the configuration of the drivers itself is not part of the CMSIS-Driver specification.

    +

    +Code Example

    +

    The following example code shows the usage of the SPI interface.

    +
    #include "Driver_SPI.h"
    +
    #include "cmsis_os.h" // ARM::CMSIS:RTOS:Keil RTX
    +
    +
    +
    void mySPI_Thread(void const *argument);
    +
    osThreadId tid_mySPI_Thread;
    +
    +
    +
    /* SPI Driver */
    +
    extern ARM_DRIVER_SPI Driver_SPI0;
    +
    +
    +
    void mySPI_callback(uint32_t event)
    +
    {
    +
    switch (event)
    +
    {
    +
    case ARM_SPI_EVENT_TRANSFER_COMPLETE:
    +
    /* Success: Wakeup Thread */
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    osSignalSet(tid_mySPI_Thread, 0x01);
    +
    break;
    +
    case ARM_SPI_EVENT_DATA_LOST:
    +
    /* Occurs in slave mode when data is requested/sent by master
    +
    but send/receive/transfer operation has not been started
    +
    and indicates that data is lost. Occurs also in master mode
    +
    when driver cannot transfer data fast enough. */
    +
    __breakpoint(0); /* Error: Call debugger or replace with custom error handling */
    +
    break;
    +
    case ARM_SPI_EVENT_MODE_FAULT:
    +
    /* Occurs in master mode when Slave Select is deactivated and
    +
    indicates Master Mode Fault. */
    +
    __breakpoint(0); /* Error: Call debugger or replace with custom error handling */
    +
    break;
    +
    }
    +
    }
    +
    +
    /* Test data buffers */
    +
    const uint8_t testdata_out[8] = { 0, 1, 2, 3, 4, 5, 6, 7 };
    +
    uint8_t testdata_in [8];
    +
    +
    void mySPI_Thread(void const* arg)
    +
    {
    +
    ARM_DRIVER_SPI* SPIdrv = &Driver_SPI0;
    +
    osEvent evt;
    +
    +
    #ifdef DEBUG
    +
    ARM_DRIVER_VERSION version;
    +
    ARM_SPI_CAPABILITIES drv_capabilities;
    +
    +
    version = SPIdrv->GetVersion();
    +
    if (version.api < 0x200) /* requires at minimum API version 2.00 or higher */
    +
    { /* error handling */
    +
    return;
    +
    }
    +
    +
    drv_capabilities = SPIdrv->GetCapabilities();
    +
    if (drv_capabilities.event_mode_fault == 0)
    +
    { /* error handling */
    +
    return;
    +
    }
    +
    #endif
    +
    +
    /* Initialize the SPI driver */
    +
    SPIdrv->Initialize(mySPI_callback);
    +
    /* Power up the SPI peripheral */
    +
    SPIdrv->PowerControl(ARM_POWER_FULL);
    +
    /* Configure the SPI to Master, 8-bit mode @10000 kBits/sec */
    +
    SPIdrv->Control(ARM_SPI_MODE_MASTER | ARM_SPI_CPOL1_CPHA1 | ARM_SPI_MSB_LSB | ARM_SPI_SS_MASTER_SW | ARM_SPI_DATA_BITS(8), 10000000);
    +
    +
    /* SS line = INACTIVE = HIGH */
    +
    SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE);
    +
    +
    /* thread loop */
    +
    while (1)
    +
    {
    +
    /* SS line = ACTIVE = LOW */
    +
    SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE);
    +
    /* Transmit some data */
    +
    SPIdrv->Send(testdata_out, sizeof(testdata_out));
    +
    /* Wait for completion */
    +
    evt = osSignalWait(0x01, 100);
    +
    if (evt.status == osEventTimeout) {
    +
    __breakpoint(0); /* Timeout error: Call debugger */
    +
    }
    +
    /* SS line = INACTIVE = HIGH */
    +
    SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE);
    +
    +
    /* SS line = ACTIVE = LOW */
    +
    SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE);
    +
    /* Receive 8 bytes of reply */
    +
    SPIdrv->Receive(testdata_in, 8);
    +
    evt = osSignalWait(0x01, 100);
    +
    if (evt.status == osEventTimeout) {
    +
    __breakpoint(0); /* Timeout error: Call debugger */
    +
    }
    +
    /* SS line = INACTIVE = HIGH */
    +
    SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE);
    +
    }
    +
    }
    +
    +
    + + + + -- cgit