From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/Driver/html/group__mci__mode__ctrls.html | 396 ++++++++++++++++++++++++++ 1 file changed, 396 insertions(+) create mode 100644 docs/Driver/html/group__mci__mode__ctrls.html (limited to 'docs/Driver/html/group__mci__mode__ctrls.html') diff --git a/docs/Driver/html/group__mci__mode__ctrls.html b/docs/Driver/html/group__mci__mode__ctrls.html new file mode 100644 index 0000000..a796623 --- /dev/null +++ b/docs/Driver/html/group__mci__mode__ctrls.html @@ -0,0 +1,396 @@ + + + + + +MCI Controls +CMSIS-Driver: MCI Controls + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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+Macros
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MCI Controls
MCI Control Codes
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Configure and control the MCI interface. +More...

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+Macros

#define ARM_MCI_BUS_SPEED   (0x01)
 Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s. More...
 
#define ARM_MCI_BUS_SPEED_MODE   (0x02)
 Set Bus Speed Mode as specified with arg. More...
 
#define ARM_MCI_BUS_CMD_MODE   (0x03)
 Set CMD Line Mode as specified with arg. More...
 
#define ARM_MCI_BUS_DATA_WIDTH   (0x04)
 Set Bus Data Width as specified with arg. More...
 
#define ARM_MCI_DRIVER_STRENGTH   (0x05)
 Set SD UHS-I Driver Strength as specified with arg. More...
 
#define ARM_MCI_CONTROL_RESET   (0x06)
 Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active. More...
 
#define ARM_MCI_CONTROL_CLOCK_IDLE   (0x07)
 Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled. More...
 
#define ARM_MCI_UHS_TUNING_OPERATION   (0x08)
 Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute. More...
 
#define ARM_MCI_UHS_TUNING_RESULT   (0x09)
 Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error. More...
 
#define ARM_MCI_DATA_TIMEOUT   (0x0A)
 Set Data timeout; arg = timeout in bus cycles. More...
 
#define ARM_MCI_CSS_TIMEOUT   (0x0B)
 Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles. More...
 
#define ARM_MCI_MONITOR_SDIO_INTERRUPT   (0x0C)
 Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled. More...
 
#define ARM_MCI_CONTROL_READ_WAIT   (0x0D)
 Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled. More...
 
#define ARM_MCI_SUSPEND_TRANSFER   (0x0E)
 Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer. More...
 
#define ARM_MCI_RESUME_TRANSFER   (0x0F)
 Resume Data transfer (SD I/O) More...
 
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Description

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Configure and control the MCI interface.

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The following codes are used as values for the parameter control of the function ARM_MCI_Control to setup the MCI interface.

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Macro Definition Documentation

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#define ARM_MCI_BUS_SPEED   (0x01)
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Set Bus Speed; arg = requested speed in bits/s; returns configured speed in bits/s.

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#define ARM_MCI_BUS_SPEED_MODE   (0x02)
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Set Bus Speed Mode as specified with arg.

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#define ARM_MCI_BUS_CMD_MODE   (0x03)
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Set CMD Line Mode as specified with arg.

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#define ARM_MCI_BUS_DATA_WIDTH   (0x04)
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Set Bus Data Width as specified with arg.

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#define ARM_MCI_DRIVER_STRENGTH   (0x05)
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Set SD UHS-I Driver Strength as specified with arg.

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#define ARM_MCI_CONTROL_RESET   (0x06)
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Control optional RST_n Pin (eMMC); arg: 0=inactive, 1=active.

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#define ARM_MCI_CONTROL_CLOCK_IDLE   (0x07)
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Control Clock generation on CLK Pin when idle; arg: 0=disabled, 1=enabled.

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#define ARM_MCI_UHS_TUNING_OPERATION   (0x08)
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Sampling clock Tuning operation (SD UHS-I); arg: 0=reset, 1=execute.

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#define ARM_MCI_UHS_TUNING_RESULT   (0x09)
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Sampling clock Tuning result (SD UHS-I); returns: 0=done, 1=in progress, -1=error.

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#define ARM_MCI_DATA_TIMEOUT   (0x0A)
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Set Data timeout; arg = timeout in bus cycles.

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#define ARM_MCI_CSS_TIMEOUT   (0x0B)
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Set Command Completion Signal (CCS) timeout; arg = timeout in bus cycles.

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#define ARM_MCI_MONITOR_SDIO_INTERRUPT   (0x0C)
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Monitor SD I/O interrupt: arg: 0=disabled, 1=enabled.

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#define ARM_MCI_CONTROL_READ_WAIT   (0x0D)
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Control Read/Wait for SD I/O; arg: 0=disabled, 1=enabled.

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#define ARM_MCI_SUSPEND_TRANSFER   (0x0E)
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Suspend Data transfer (SD I/O); returns number of remaining bytes to transfer.

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#define ARM_MCI_RESUME_TRANSFER   (0x0F)
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Resume Data transfer (SD I/O)

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