From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/Driver/html/group__USART__control.js | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 docs/Driver/html/group__USART__control.js (limited to 'docs/Driver/html/group__USART__control.js') diff --git a/docs/Driver/html/group__USART__control.js b/docs/Driver/html/group__USART__control.js new file mode 100644 index 0000000..0929874 --- /dev/null +++ b/docs/Driver/html/group__USART__control.js @@ -0,0 +1,11 @@ +var group__USART__control = +[ + [ "USART Mode Control", "group__usart__mode__control.html", "group__usart__mode__control" ], + [ "USART Miscellaneous Control", "group__usart__misc__control.html", "group__usart__misc__control" ], + [ "USART Data Bits", "group__usart__data__bits.html", "group__usart__data__bits" ], + [ "USART Parity Bit", "group__usart__parity__bit.html", "group__usart__parity__bit" ], + [ "USART Stop Bits", "group__usart__stop__bits.html", "group__usart__stop__bits" ], + [ "USART Flow Control", "group__usart__flow__control.html", "group__usart__flow__control" ], + [ "USART Clock Polarity", "group__usart__clock__polarity.html", "group__usart__clock__polarity" ], + [ "USART Clock Phase", "group__usart__clock__phase.html", "group__usart__clock__phase" ] +]; \ No newline at end of file -- cgit