From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/Driver/html/Driver__Storage_8h.html | 602 +++++++++++++++++++++++++++++++ 1 file changed, 602 insertions(+) create mode 100644 docs/Driver/html/Driver__Storage_8h.html (limited to 'docs/Driver/html/Driver__Storage_8h.html') diff --git a/docs/Driver/html/Driver__Storage_8h.html b/docs/Driver/html/Driver__Storage_8h.html new file mode 100644 index 0000000..9da2db5 --- /dev/null +++ b/docs/Driver/html/Driver__Storage_8h.html @@ -0,0 +1,602 @@ + + + + + +Driver_Storage.h File Reference +CMSIS-Driver: Driver_Storage.h File Reference + + + + + + + + + + + + + + +
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CMSIS-Driver +  Version 2.6.0 +
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Peripheral Interface for Middleware and Application Code
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Driver_Storage.h File Reference
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+Data Structures

struct  ARM_STORAGE_BLOCK_ATTRIBUTES
 Attributes of the storage range within a storage block. More...
 
struct  ARM_STORAGE_BLOCK
 A storage block is a range of memory with uniform attributes. More...
 
struct  ARM_STORAGE_SECURITY_FEATURES
 
struct  ARM_STORAGE_INFO
 
struct  ARM_STORAGE_STATUS
 Operating status of the storage controller. More...
 
struct  ARM_STORAGE_CAPABILITIES
 Storage Driver API Capabilities. More...
 
struct  ARM_DRIVER_STORAGE
 
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+Macros

#define ARM_STORAGE_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */
 
#define _ARM_Driver_Storage_(n)   Driver_Storage##n
 
#define ARM_Driver_Storage_(n)   _ARM_Driver_Storage_(n)
 
#define ARM_STORAGE_INVALID_OFFSET   (0xFFFFFFFFFFFFFFFFULL)
 Invalid address (relative to a storage controller's address space). A storage block may never start at this address. More...
 
#define ARM_STORAGE_INVALID_ADDRESS   (0xFFFFFFFFUL)
 Invalid address within the processor's memory address space. Refer to memory-mapped storage, i.e. ARM_DRIVER_STORAGE::ResolveAddress(). More...
 
#define ARM_STORAGE_ERROR_NOT_ERASABLE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
 Part (or all) of the range provided to Erase() isn't erasable. More...
 
#define ARM_STORAGE_ERROR_NOT_PROGRAMMABLE   (ARM_DRIVER_ERROR_SPECIFIC - 2)
 Part (or all) of the range provided to ProgramData() isn't programmable. More...
 
#define ARM_STORAGE_ERROR_PROTECTED   (ARM_DRIVER_ERROR_SPECIFIC - 3)
 Part (or all) of the range to Erase() or ProgramData() is protected. More...
 
#define ARM_STORAGE_VALID_BLOCK(BLK)   (((BLK)->addr != ARM_STORAGE_INVALID_OFFSET) && ((BLK)->size != 0))
 
#define ARM_STORAGE_PROGRAMMABILITY_RAM   (0x0)
 Values for encoding storage memory-types with respect to programmability. More...
 
#define ARM_STORAGE_PROGRAMMABILITY_ROM   (0x1)
 Read-only memory. More...
 
#define ARM_STORAGE_PROGRAMMABILITY_WORM   (0x2)
 write-once-read-only-memory (WORM). More...
 
#define ARM_STORAGE_PROGRAMMABILITY_ERASABLE   (0x3)
 re-programmable based on erase. Supports multiple writes. More...
 
#define ARM_RETENTION_WHILE_DEVICE_ACTIVE   (0x0)
 Data is retained only during device activity. More...
 
#define ARM_RETENTION_ACROSS_SLEEP   (0x1)
 Data is retained across processor sleep. More...
 
#define ARM_RETENTION_ACROSS_DEEP_SLEEP   (0x2)
 Data is retained across processor deep-sleep. More...
 
#define ARM_RETENTION_BATTERY_BACKED   (0x3)
 Data is battery-backed. Device can be powered off. More...
 
#define ARM_RETENTION_NVM   (0x4)
 Data is retained in non-volatile memory. More...
 
#define ARM_STORAGE_PROGRAM_CYCLES_INFINITE   (0UL)
 
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+Typedefs

typedef void(* ARM_Storage_Callback_t )(int32_t status, ARM_STORAGE_OPERATION operation)
 
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+Enumerations

enum  ARM_STORAGE_OPERATION {
+  ARM_STORAGE_OPERATION_GET_VERSION, +
+  ARM_STORAGE_OPERATION_GET_CAPABILITIES, +
+  ARM_STORAGE_OPERATION_INITIALIZE, +
+  ARM_STORAGE_OPERATION_UNINITIALIZE, +
+  ARM_STORAGE_OPERATION_POWER_CONTROL, +
+  ARM_STORAGE_OPERATION_READ_DATA, +
+  ARM_STORAGE_OPERATION_PROGRAM_DATA, +
+  ARM_STORAGE_OPERATION_ERASE, +
+  ARM_STORAGE_OPERATION_ERASE_ALL, +
+  ARM_STORAGE_OPERATION_GET_STATUS, +
+  ARM_STORAGE_OPERATION_GET_INFO, +
+  ARM_STORAGE_OPERATION_RESOLVE_ADDRESS, +
+  ARM_STORAGE_OPERATION_GET_NEXT_BLOCK, +
+  ARM_STORAGE_OPERATION_GET_BLOCK +
+ }
 
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Data Structure Documentation

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struct ARM_STORAGE_SECURITY_FEATURES
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Device Data Security Protection Features. Applicable mostly to EXTERNAL_NVM.

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Data Fields
+uint32_t +acls: 1 +Protection against internal software attacks using ACLs.
+uint32_t +rollback_protection: 1 +Roll-back protection. Set to true if the creator of the storage can ensure that an external attacker can't force an older firmware to run or to revert back to a previous state.
+uint32_t +tamper_proof: 1 +Tamper-proof memory (will be deleted on tamper-attempts using board level or chip level sensors).
+uint32_t +internal_flash: 1 +Internal flash.
+uint32_t +reserved1: 12 +
+uint32_t +software_attacks: 1 +device software (malware running on the device).

Encode support for hardening against various classes of attacks.

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+uint32_t +board_level_attacks: 1 +board level attacks (debug probes, copy protection fuses.)
+uint32_t +chip_level_attacks: 1 +chip level attacks (tamper-protection).
+uint32_t +side_channel_attacks: 1 +side channel attacks.
+uint32_t +reserved2: 12 +
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+

Macro Definition Documentation

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#define ARM_STORAGE_API_VERSION   ARM_DRIVER_VERSION_MAJOR_MINOR(1,1) /* API version */
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#define _ARM_Driver_Storage_( n)   Driver_Storage##n
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#define ARM_Driver_Storage_( n)   _ARM_Driver_Storage_(n)
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#define ARM_STORAGE_INVALID_OFFSET   (0xFFFFFFFFFFFFFFFFULL)
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Invalid address (relative to a storage controller's address space). A storage block may never start at this address.

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#define ARM_STORAGE_INVALID_ADDRESS   (0xFFFFFFFFUL)
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Invalid address within the processor's memory address space. Refer to memory-mapped storage, i.e. ARM_DRIVER_STORAGE::ResolveAddress().

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#define ARM_STORAGE_ERROR_NOT_ERASABLE   (ARM_DRIVER_ERROR_SPECIFIC - 1)
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Part (or all) of the range provided to Erase() isn't erasable.

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#define ARM_STORAGE_ERROR_NOT_PROGRAMMABLE   (ARM_DRIVER_ERROR_SPECIFIC - 2)
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Part (or all) of the range provided to ProgramData() isn't programmable.

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#define ARM_STORAGE_ERROR_PROTECTED   (ARM_DRIVER_ERROR_SPECIFIC - 3)
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Part (or all) of the range to Erase() or ProgramData() is protected.

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#define ARM_STORAGE_VALID_BLOCK( BLK)   (((BLK)->addr != ARM_STORAGE_INVALID_OFFSET) && ((BLK)->size != 0))
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The check for a valid ARM_STORAGE_BLOCK.

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#define ARM_STORAGE_PROGRAMMABILITY_RAM   (0x0)
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Values for encoding storage memory-types with respect to programmability.

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Please ensure that the maximum of the following memory types doesn't exceed 16; we encode this in a 4-bit field within ARM_STORAGE_INFO::programmability.

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#define ARM_STORAGE_PROGRAMMABILITY_ROM   (0x1)
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Read-only memory.

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#define ARM_STORAGE_PROGRAMMABILITY_WORM   (0x2)
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write-once-read-only-memory (WORM).

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#define ARM_STORAGE_PROGRAMMABILITY_ERASABLE   (0x3)
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re-programmable based on erase. Supports multiple writes.

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#define ARM_RETENTION_WHILE_DEVICE_ACTIVE   (0x0)
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Data is retained only during device activity.

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Values for encoding data-retention levels for storage blocks.

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Please ensure that the maximum of the following retention types doesn't exceed 16; we encode this in a 4-bit field within ARM_STORAGE_INFO::retention_level.

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#define ARM_RETENTION_ACROSS_SLEEP   (0x1)
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Data is retained across processor sleep.

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#define ARM_RETENTION_ACROSS_DEEP_SLEEP   (0x2)
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Data is retained across processor deep-sleep.

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#define ARM_RETENTION_BATTERY_BACKED   (0x3)
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Data is battery-backed. Device can be powered off.

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#define ARM_RETENTION_NVM   (0x4)
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Data is retained in non-volatile memory.

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#define ARM_STORAGE_PROGRAM_CYCLES_INFINITE   (0UL)
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Infinite or unknown endurance for reprogramming.

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+ + + + -- cgit