Date: Tue, 28 Jul 2020 11:24:49 +0100 Subject: Official ARM version: v5.6.0 --- docs/DSP/html/group__power.html | 95 ++++++++++++++++++----------------------- 1 file changed, 42 insertions(+), 53 deletions(-) (limited to 'docs/DSP/html/group__power.html') diff --git a/docs/DSP/html/group__power.html b/docs/DSP/html/group__power.html index da0412d..6ea1d38 100644 --- a/docs/DSP/html/group__power.html +++ b/docs/DSP/html/group__power.html @@ -32,7 +32,7 @@ Logo

CMSIS-DSP - Version 1.5.2 + Version 1.7.0

CMSIS DSP Software Library

@@ -116,33 +116,33 @@ $(document).ready(function(){initNavTree('group__power.html','');}); - - - - - - - - - - - - + + + + + + + + + + + +

Functions
void	arm_power_f32 (float32_t pSrc, uint32_t blockSize, float32_t pResult)
	Sum of the squares of the elements of a floating-point vector. More...

void	arm_power_q15 (q15_t pSrc, uint32_t blockSize, q63_t pResult)
	Sum of the squares of the elements of a Q15 vector. More...

void	arm_power_q31 (q31_t pSrc, uint32_t blockSize, q63_t pResult)
	Sum of the squares of the elements of a Q31 vector. More...

void	arm_power_q7 (q7_t pSrc, uint32_t blockSize, q31_t pResult)
	Sum of the squares of the elements of a Q7 vector. More...

void	arm_power_f32 (const float32_t pSrc, uint32_t blockSize, float32_t pResult)
	Sum of the squares of the elements of a floating-point vector. More...

void	arm_power_q15 (const q15_t pSrc, uint32_t blockSize, q63_t pResult)
	Sum of the squares of the elements of a Q15 vector. More...

void	arm_power_q31 (const q31_t pSrc, uint32_t blockSize, q63_t pResult)
	Sum of the squares of the elements of a Q31 vector. More...

void	arm_power_q7 (const q7_t pSrc, uint32_t blockSize, q31_t pResult)
	Sum of the squares of the elements of a Q7 vector. More...

Description

Calculates the sum of the squares of the elements in the input vector. The underlying algorithm is used:

-        Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
+    Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];

There are separate functions for floating point, Q31, Q15, and Q7 data types.

Function Documentation

- +

- + @@ -166,26 +166,24 @@ Functions

Parameters

void arm_power_f32 ( float32_t * const float32_t * pSrc,

- - - + + +

[in]	*pSrc	points to the input vector
[in]	blockSize	length of the input vector
[out]	*pResult	sum of the squares value returned here
[in]	pSrc	points to the input vector
[in]	blockSize	number of samples in input vector
[out]	pResult	sum of the squares value returned here

Returns: none.

- -

References blockSize.

Returns: none

- +

- + @@ -209,28 +207,25 @@ Functions

Parameters

void arm_power_q15 ( q15_t * const q15_t * pSrc,

- - - + + +

[in]	*pSrc	points to the input vector
[in]	blockSize	length of the input vector
[out]	*pResult	sum of the squares value returned here
[in]	pSrc	points to the input vector
[in]	blockSize	number of samples in input vector
[out]	pResult	sum of the squares value returned here

Returns: none.

Scaling and Overflow Behavior:

: The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 34.30 format.

- -

References __SIMD32, __SMLALD(), and blockSize.

Returns: none

Scaling and Overflow Behavior: The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 34.30 format.

- +

- + @@ -254,28 +249,25 @@ Functions

Parameters

void arm_power_q31 ( q31_t * const q31_t * pSrc,

- - - + + +

[in]	*pSrc	points to the input vector
[in]	blockSize	length of the input vector
[out]	*pResult	sum of the squares value returned here
[in]	pSrc	points to the input vector
[in]	blockSize	number of samples in input vector
[out]	pResult	sum of the squares value returned here

Returns: none.

Scaling and Overflow Behavior:

: The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format. Intermediate multiplication yields a 2.62 format, and this result is truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 16.48 format.

- -

References blockSize.

Returns: none

Scaling and Overflow Behavior: The function is implemented using a 64-bit internal accumulator. The input is represented in 1.31 format. Intermediate multiplication yields a 2.62 format, and this result is truncated to 2.48 format by discarding the lower 14 bits. The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format. With 15 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 16.48 format.

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- + @@ -299,17 +291,14 @@ Functions

Parameters

void arm_power_q7 ( q7_t * const q7_t * pSrc,

- - - + + +

[in]	*pSrc	points to the input vector
[in]	blockSize	length of the input vector
[out]	*pResult	sum of the squares value returned here
[in]	pSrc	points to the input vector
[in]	blockSize	number of samples in input vector
[out]	pResult	sum of the squares value returned here

Returns: none.

Scaling and Overflow Behavior:

: The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format. Intermediate multiplication yields a 2.14 format, and this result is added without saturation to an accumulator in 18.14 format. With 17 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 18.14 format.

- -

References __SIMD32, __SMLAD(), __SXTB16(), and blockSize.

Returns: none

Scaling and Overflow Behavior: The function is implemented using a 32-bit internal accumulator. The input is represented in 1.7 format. Intermediate multiplication yields a 2.14 format, and this result is added without saturation to an accumulator in 18.14 format. With 17 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the return result is in 18.14 format.

@@ -318,7 +307,7 @@ Functions