From 9f95ff5b6ba01db09552b84a0ab79607060a2666 Mon Sep 17 00:00:00 2001 From: Ali Labbene Date: Wed, 11 Dec 2019 08:59:21 +0100 Subject: Official ARM version: v5.4.0 Add CMSIS V5.4.0, please refer to index.html available under \docs folder. Note: content of \CMSIS\Core\Include has been copied under \Include to keep the same structure used in existing projects, and thus avoid projects mass update Note: the following components have been removed from ARM original delivery (as not used in ST packages) - CMSIS_EW2018.pdf - .gitattributes - .gitignore - \Device - \CMSIS - \CoreValidation - \DAP - \Documentation - \DoxyGen - \Driver - \Pack - \RTOS\CMSIS_RTOS_Tutorial.pdf - \RTOS\RTX - \RTOS\Template - \RTOS2\RTX - \Utilities - All ARM/GCC projects files are deleted from \DSP, \RTOS and \RTOS2 Change-Id: Ia026c3f0f0d016627a4fb5a9032852c33d24b4d3 --- docs/DSP/html/group__CmplxMatrixMult.html | 292 ++++++++++++++++++++++++++++++ 1 file changed, 292 insertions(+) create mode 100644 docs/DSP/html/group__CmplxMatrixMult.html (limited to 'docs/DSP/html/group__CmplxMatrixMult.html') diff --git a/docs/DSP/html/group__CmplxMatrixMult.html b/docs/DSP/html/group__CmplxMatrixMult.html new file mode 100644 index 0000000..8e11533 --- /dev/null +++ b/docs/DSP/html/group__CmplxMatrixMult.html @@ -0,0 +1,292 @@ + + + + + +Complex Matrix Multiplication +CMSIS-DSP: Complex Matrix Multiplication + + + + + + + + + + + + + + +
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CMSIS-DSP +  Version 1.5.2 +
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CMSIS DSP Software Library
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Complex Matrix Multiplication
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arm_status arm_mat_cmplx_mult_f32 (const arm_matrix_instance_f32 *pSrcA, const arm_matrix_instance_f32 *pSrcB, arm_matrix_instance_f32 *pDst)
 Floating-point Complex matrix multiplication. More...
 
arm_status arm_mat_cmplx_mult_q15 (const arm_matrix_instance_q15 *pSrcA, const arm_matrix_instance_q15 *pSrcB, arm_matrix_instance_q15 *pDst, q15_t *pScratch)
 Q15 Complex matrix multiplication. More...
 
arm_status arm_mat_cmplx_mult_q31 (const arm_matrix_instance_q31 *pSrcA, const arm_matrix_instance_q31 *pSrcB, arm_matrix_instance_q31 *pDst)
 Q31 Complex matrix multiplication. More...
 
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Description

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Complex Matrix multiplication is only defined if the number of columns of the first matrix equals the number of rows of the second matrix. Multiplying an M x N matrix with an N x P matrix results in an M x P matrix. When matrix size checking is enabled, the functions check: (1) that the inner dimensions of pSrcA and pSrcB are equal; and (2) that the size of the output matrix equals the outer dimensions of pSrcA and pSrcB.

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Function Documentation

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arm_status arm_mat_cmplx_mult_f32 (const arm_matrix_instance_f32pSrcA,
const arm_matrix_instance_f32pSrcB,
arm_matrix_instance_f32pDst 
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Floating-point, complex, matrix multiplication.

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Parameters
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[in]*pSrcApoints to the first input complex matrix structure
[in]*pSrcBpoints to the second input complex matrix structure
[out]*pDstpoints to output complex matrix structure
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Returns
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
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References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_f32::numCols, arm_matrix_instance_f32::numRows, arm_matrix_instance_f32::pData, and status.

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arm_status arm_mat_cmplx_mult_q15 (const arm_matrix_instance_q15pSrcA,
const arm_matrix_instance_q15pSrcB,
arm_matrix_instance_q15pDst,
q15_tpScratch 
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Q15, complex, matrix multiplication.

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Parameters
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[in]*pSrcApoints to the first input complex matrix structure
[in]*pSrcBpoints to the second input complex matrix structure
[out]*pDstpoints to output complex matrix structure
[in]*pScratchpoints to the array for storing intermediate results
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Returns
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
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Conditions for optimum performance
Input, output and state buffers should be aligned by 32-bit
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Restrictions
If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE In this case input, output, scratch buffers should be aligned by 32-bit
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Scaling and Overflow Behavior:

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The function is implemented using a 64-bit internal accumulator. The inputs to the multiplications are in 1.15 format and multiplications yield a 2.30 result. The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format. This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
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Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function.
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References __SIMD32, __SMUADX(), __SMUSD(), ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, arm_matrix_instance_q15::numCols, arm_matrix_instance_q15::numRows, arm_matrix_instance_q15::pData, and status.

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arm_status arm_mat_cmplx_mult_q31 (const arm_matrix_instance_q31pSrcA,
const arm_matrix_instance_q31pSrcB,
arm_matrix_instance_q31pDst 
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Q31, complex, matrix multiplication.

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Parameters
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[in]*pSrcApoints to the first input complex matrix structure
[in]*pSrcBpoints to the second input complex matrix structure
[out]*pDstpoints to output complex matrix structure
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Returns
The function returns either ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
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Scaling and Overflow Behavior:

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The function is implemented using an internal 64-bit accumulator. The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit. There is no saturation on intermediate additions. Thus, if the accumulator overflows it wraps around and distorts the result. The input signals should be scaled down to avoid intermediate overflows. The input is thus scaled down by log2(numColsA) bits to avoid overflows, as a total of numColsA additions are performed internally. The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
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References ARM_MATH_SIZE_MISMATCH, ARM_MATH_SUCCESS, clip_q63_to_q31(), arm_matrix_instance_q31::numCols, arm_matrix_instance_q31::numRows, arm_matrix_instance_q31::pData, and status.

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